Cirrus Logic CS4272 User Manual

CS4272

24-Bit, 192 kHz Stereo Audio CODEC

D/A Features

!High Performance

–114 dB Dynamic Range

–-100 dB THD+N

!Up to 192 kHz Sampling Rates

!Differential Analog Architecture

!Volume Control with Soft Ramp

–1 dB Step Size

–Zero Crossing Click-free Transitions

!Selectable Digital Filters

–Fast and Slow Roll Off

!ATAPI Mixing Functions

!Selectable Serial Audio Interface Formats

–Left Justified up to 24-bit

–I2S up to 24-bit

–Right Justified 16-, 18-, 20-, and 24-Bit

!Control Output for External Muting

!Selectable 50/15 s De-emphasis

A/D Features

!High Performance

–114 dB Dynamic Range

–-100 dB THD+N

!Up to 192 kHz Sampling Rates

!Differential Analog Architecture

!Multi-bit Delta Sigma Conversion

!High-pass Filter or DC Offset Calibration

!Low-Latency Digital Anti-alias Filtering

!Automatic Dithering of 16-bit Data

!Selectable Serial Audio Interface Formats

–Left Justified up to 24-bit

–I2S up to 24-bit

System Features

!Direct Interface with 5V to 2.5V Logic Levels

!Internal Digital Loopback

!On-chip Oscillator

!Stand-Alone or Control Port Functionality

	2.5 V to 5 V		3.3 V to 5 V				5 V
Hardware or	Translator				Internal Voltage		Internal	External	Left and
I2C/SPI									Right Mute
Control Data		Register / Hardware			Reference		Oscillator	Mute Control	Controls
		Configuration
Reset	Level
			Volume		Selectable			Switched Capacitor	Left
							∆Σ Modulator
		Serial Interface / Loopback			Interpolation				Differential
			Control					DAC and Filter
				Mixer	Filter				Output
Serial	Level Translator		Volume		Selectable			Switched Capacitor	Right
							∆Σ Modulator
					Interpolation				Differential
Audio			Control					DAC and Filter
					Filter				Output
Input
Serial								Multibit	Left
Audio				High Pass Filter &		Low-Latency
								Oversampling	Differential
Output				DC Offset Calibration		Anti-Alias Filter
								ADC	Input
		PCM		High Pass Filter &		Low-Latency		Multibit	Right
				DC Offset Calibration		Anti-Alias Filter		Oversampling	Differential
								ADC	Input

Cirrus Logic, Inc.	Copyright ♥ Cirrus Logic, Inc. 2005	AUGUST '05
www.cirrus.com	(All Rights Reserved)	DS593F1

Stand-Alone Mode Feature Set

!System Features

–Serial Audio Port Master or Slave Operation

–Internal Oscillator for Master Clock

!D/A Features

–Auto-mute on Static Samples

–44.1 kHz 50/15 s De-emphasis Available

–Selectable Serial Audio Interface Formats

"Left Justified up to 24-bit "I2S up to 24-bit

!A/D Features

–Automatic Dithering for 16-bit Data

–High-pass Filter

–Selectable Serial Audio Interface Formats

"Left Justified up to 24-bit "I2S up to 24-bit

Software Mode Feature Set

!System Features

–Serial Audio Port Master or Slave Operation

–Internal Oscillator for Master Clock

–Internal Digital Loopback Available

!D/A Features

–Selectable Auto-mute

–Selectable Interpolation Filters

–Selectable 32-, 44.1-, and 48-kHz De-emphasis Filters

–Configurable ATAPI Mixing Functions

–Configurable Volume and Muting Controls

–Selectable Serial Audio Interface Formats

"Left Justified up to 24-bit "I2S up to 24-bit

"Right Justified 16, 18, 20, and 24-bit

!A/D Features

–Selectable Dithering for 16-bit Data

–Selectable High-pass Filter or DC Offset Calibration

–Selectable Serial Audio Interface Formats

"Left Justified up to 24-bit "I2S up to 24-bit

CS4272

General Description

The CS4272 is a high-performance, integrated audio CODEC. The CS4272 performs stereo analog-to-digital (A/D) and digital-to-analog (D/A) conversion of up to 24-bit serial values at sample rates up to 192 kHz.

The D/A offers a volume control that operates with a 1 dB step size. It incorporates selectable soft ramp and zero crossing transition functions to eliminate clicks and pops.

The D/A’s integrated digital mixing functions allow a variety of output configurations ranging from a channel swap to a stereo-to-mono downmix.

Standard 50/15 s de-emphasis is available for sampling rates of 32, 44.1, and 48 kHz for compatibility with digital audio programs mastered using the 50/15 s preemphasis technique.

Integrated level translators allow easy interfacing between the CS4272 and other devices operating over a wide range of logic levels.

An on-chip oscillator eliminates the need for an external crystal oscillator circuit. This can reduce overall design cost and conserve circuit board space. The CS4272 automatically uses the on-chip oscillator in the absence of an applied master clock, making this feature easy to use.

Independently addressable high-pass filters are available for the right and left channel of the A/D. This allows the A/D to be used in a wide variety of applications where one audio channel and one DC measurement channel is desired.

The CS4272’s wide dynamic range, negligible distortion, and low noise make it ideal for applications such as A/V receivers, DVD-R, CD-R, digital mixing consoles, effects processors, set-top box systems, and automotive audio systems.

Ordering Information

	Product	Description	Package	Pb-Free	Grade	Temp Range	Container	Order #
					Commercial	-10° to +70° C	Tube	CS4272-CZZ
	CS4272	24-Bit, 192 kHz	28-pin	YES			Tape & Reel	CS4272-CZZR
		Stereo Audio CODEC	TSSOP		Automotive	-40° to +85° C	Tube	CS4272-DZZ
							Tape & Reel	CS4272-DZZR
	CDB4272	CS4272 Evaluation Board		No	-	-	-	CDB4272

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	CS4272
TABLE OF CONTENTS
1. PIN DESCRIPTIONS - SOFTWARE MODE .............................................................................	5
2. PIN DESCRIPTIONS - STAND-ALONE MODE .......................................................................	7
3. CHARACTERISTICS AND SPECIFICATIONS ........................................................................	9
SPECIFIED OPERATING CONDITIONS.................................................................................	9
ABSOLUTE MAXIMUM RATINGS ...........................................................................................	9
DAC ANALOG CHARACTERISTICS - COMMERCIAL GRADE............................................	10
DAC ANALOG CHARACTERISTICS - AUTOMOTIVE GRADE ............................................	11
DAC COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE................	12
ADC ANALOG CHARACTERISTICS - COMMERCIAL GRADE............................................	14
ADC ANALOG CHARACTERISTICS - AUTOMOTIVE GRADE ............................................	15
ADC DIGITAL FILTER CHARACTERISTICS.........................................................................	16
DC ELECTRICAL CHARACTERISTICS ................................................................................	17
DIGITAL CHARACTERISTICS...............................................................................................	17
SWITCHING CHARACTERISTICS - SERIAL AUDIO PORT.................................................	18
SWITCHING CHARACTERISTICS - I²C MODE CONTROL PORT.......................................	21
SWITCHING CHARACTERISTICS - SPI CONTROL PORT .................................................	22
4. TYPICAL CONNECTION DIAGRAM .....................................................................................	23
5. APPLICATIONS .....................................................................................................................	24
5.1 Stand-Alone Mode ...........................................................................................................	24
5.1.1 Recommended Power-Up Sequence .................................................................	24
5.1.2 Master/Slave Mode .............................................................................................	24
5.1.3 System Clocking .................................................................................................	24
5.1.3.1 Crystal Applications (XTI/XTO) ...........................................................	24
5.1.3.2 Clock Ratio Selection ..........................................................................	25
5.1.4 16-Bit Auto-Dither ...............................................................................................	26
5.1.5 Auto-Mute ...........................................................................................................	26
5.1.6 High Pass Filter ...................................................................................................	26
5.1.7 Interpolation Filter ..............................................................................................	26
5.1.8 Mode Selection & De-Emphasis .........................................................................	26
5.1.9 Serial Audio Interface Format Selection .............................................................	26
5.2 Control Port Mode ...........................................................................................................	27
5.2.1 Recommended Power-Up Sequence - Access to Control Port Mode ................	27
5.2.2 Master / Slave Mode Selection ...........................................................................	27
5.2.3 System Clocking .................................................................................................	27
5.2.3.1 Crystal Applications (XTI/XTO) ...........................................................	27
5.2.3.2 Clock Ratio Selection ..........................................................................	28
5.2.4 Internal Digital Loopback ....................................................................................	30
5.2.5 Dither for 16-Bit Data ..........................................................................................	30
5.2.6 Auto-Mute ...........................................................................................................	30
5.2.7 High Pass Filter and DC Offset Calibration .........................................................	30
5.2.8 Interpolation Filter ..............................................................................................	31
5.2.9 De-Emphasis ......................................................................................................	31
5.2.10 Oversampling Modes ........................................................................................	31
5.3 De-Emphasis Filter ..........................................................................................................	31
5.4 Analog Connections ........................................................................................................	32
5.4.1 Input Connections ...............................................................................................	32
5.4.2 Output Connections ............................................................................................	33
5.5 Mute Control ....................................................................................................................	34
5.6 Synchronization of Multiple Devices ................................................................................	34
5.7 Grounding and Power Supply Decoupling .......................................................................	34
6. CONTROL PORT INTERFACE ..............................................................................................	35
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		CS4272
6.1	SPI Mode .........................................................................................................................	35
6.2	I²C Mode ..........................................................................................................................	36
7. REGISTER QUICK REFERENCE ..........................................................................................		37
8. REGISTER DESCRIPTION ....................................................................................................		38
8.1	Mode Control 1 - Address 01h .........................................................................................	38
	8.1.1 Functional Mode (Bits 7:6) ..................................................................................	38
	8.1.2 Ratio Select (Bits 5:4) .........................................................................................	38
	8.1.3 Master / Slave Mode (Bit 3) .................................................................................	38
	8.1.4 DAC Digital Interface Format (Bits 2:0) ...............................................................	38
8.2	DAC Control - Address 02h .............................................................................................	39
	8.2.1 Auto-Mute (Bit 7) .................................................................................................	39
	8.2.2 Interpolation Filter Select (Bit 6) ..........................................................................	39
	8.2.3 De-Emphasis Control (Bits 5:4) ...........................................................................	39
	8.2.4 Soft Volume Ramp-Up After Error (Bit 3) ............................................................	40
	8.2.5 Soft Ramp-Down Before Filter Mode Change (Bit 2) ..........................................	40
	8.2.6 Invert Signal Polarity (Bits 1:0) ............................................................................	40
8.3	DAC Volume & Mixing Control - Address 03h .................................................................	40
	8.3.1 Channel B Volume = Channel A Volume (Bit 6) .................................................	40
	8.3.2 Soft Ramp or Zero Cross Enable (Bits 5:4) .........................................................	40
	8.3.3 ATAPI Channel Mixing and Muting (Bits 3:0) ......................................................	41
8.4	DAC Channel A Volume Control - Address 04h ..............................................................	42
8.5	DAC Channel B Volume Control - Address 05h ..............................................................	42
	8.5.1 Mute (Bit 7) ..........................................................................................................	42
	8.5.2 Volume Control (Bits 6:0) ....................................................................................	42
8.6	ADC Control - Address 06h .............................................................................................	43
	8.6.1 Dither for 16-Bit Data (Bit 5) ................................................................................	43
	8.6.2 ADC Digital Interface Format (Bit 4) ....................................................................	43
	8.6.3 ADC Channel A & B Mute (Bits 3:2) ....................................................................	43
	8.6.4 Channel A & B High Pass Filter Disable (Bits 1:0) ..............................................	43
8.7	Mode Control 2 - Address 07h .........................................................................................	43
	8.7.1 Digital Loopback (Bit 4) .......................................................................................	43
	8.7.2 AMUTEC = BMUTEC (Bit 3) ...............................................................................	43
	8.7.3 Freeze (Bit 2) ......................................................................................................	44
	8.7.4 Control Port Enable (Bit 1) ..................................................................................	44
	8.7.5 Power Down (Bit 0) .............................................................................................	44
8.8	Chip ID - Register 08h .....................................................................................................	44
	8.8.1 Chip ID (Bits 7:4) .................................................................................................	44
	8.8.2 Chip Revision (Bits 3:0) .......................................................................................	44
9. PARAMETER DEFINITIONS ..................................................................................................		45
10. PACKAGE DIMENSIONS .....................................................................................................		46
11. APPENDIX ............................................................................................................................		47

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CS4272

1.PIN DESCRIPTIONS - SOFTWARE MODE

XTO								1	28					BMUTEC
	XTI							2	27					AOUTB-
MCLK								3	26					AOUTB+
LRCK								4	25					AOUTA+
SCLK								5	24					AOUTA-
SDOUT
								6	23					AMUTEC
SDIN								7	28-Pin TSSOP 22					FILT+
DGND								8	21				AGND
		VD						9	20					VA
		VL						10	19					AINB-
SCL/CCLK								11	18					AINB+
SDA/CDIN								12	17					AINA+
AD0/CS								13	16					AINA-
														VCOM
	RST							14	15

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		Pin Name					#	Pin Description
		XTO					1,2	Crystal Connections (Input/Output) - I/O pins for an external crystal which may be used to generate
		XTI						MCLK. See “Crystal Applications (XTI/XTO)” on page 24 or “Crystal Applications (XTI/XTO)” on page 27.
		MCLK					3	Master Clock (Input/Output) -Clock source for the delta-sigma modulators. See “Crystal Applications
								(XTI/XTO)” on page 24 or “Crystal Applications (XTI/XTO)” on page 27.
		LRCK					4	Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the
								serial audio data line.
		SCLK					5	Serial Clock (Input/Output) - Serial clock for the serial audio interface.
		SDOUT					6	Serial Audio Data Output (Output) - Output for two’s complement serial audio data.
		SDIN					7	Serial Audio Data Input (Input) - Input for two’s complement serial audio data.
		DGND					8	Digital Ground (Input) - Ground reference for the internal digital section.
		VD					9	Digital Power (Input) - Positive power for the internal digital section.
		VL					10	Logic Power (Input) - Positive power for the digital input/output interface.
		SCL/CCLK					11	Serial Control Port Clock (Input) - Serial clock for the serial control port.
		SDA/CDIN					12	Serial Control Data (Input/Output) - SDA is a data I/O in I²C mode. CDIN is the input data line for the
								control port interface in SPI mode.
								Address Bit 0 (I²C) / Control Port Chip Select (SPI) (Input) - AD0 is a chip address pin in I²C mode;
							13		CS
		AD0/CS
								is the chip select signal for SPI format.
							14	Reset (Input) - The device enters a low power mode when this pin is driven low.
		RST
		VCOM					15	Common Mode Voltage (Output) - Filter connection for internal common mode voltage.
		AINA-					16,
		AINA+					17,	Differential Analog Input (Input) - The full scale differential input signals are presented to the delta-
		AINB+					18,	sigma modulators. The full scale level is specified in the ADC Analog Characteristics specification table.
		AINB-					19
		VA					20	Analog Power (Input) - Positive power for the internal analog section.
		AGND					21	Analog Ground (Input) - Ground reference for the internal analog section.
		FILT+					22	Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.
							23	Channel A Mute Control (Output) - This pin is active during power-up initialization, reset, muting, when
		AMUTEC
								master clock to left/right clock frequency ratio is incorrect, or power-down.
		AOUTA-					24,
		AOUTA+					25,	Differential Analog Audio Output (Output) - The full scale differential output level is specified in the
		AOUTB+					26,	DAC Analog Characteristics specification table.
		AOUTB-					27
							28	Channel B Mute Control (Output) - This pin is active during power-up initialization, reset, muting, when
		BMUTEC
								master clock to left/right clock frequency ratio is incorrect, or power-down.

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CS4272

2.PIN DESCRIPTIONS - STAND-ALONE MODE

XTO										1	28					BMUTEC
	XTI									2	27					AOUTB-
MCLK										3	26					AOUTB+
LRCK										4	25					AOUTA+
SCLK										5	24					AOUTA-
SDOUT (M/S)										6	23					AMUTEC
SDIN										7	28-Pin TSSOP 22					FILT+
DGND										8	21				AGND
	VD									9	20					VA
	VL									10	19					AINB-
	M0									11	18				AINB+
	M1									12	17				AINA+
																AINA-
I2S/LJ										13	16
																VCOM
	RST									14	15

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CS4272

		Pin Name					#	Pin Description
		XTO					1,2	Crystal Connections (Input/Output) - I/O pins for an external crystal which may be used to generate the
								master clock. See “Crystal Applications (XTI/XTO)” on page 24 or “Crystal Applications (XTI/XTO)” on
		XTI
								page 27.
		MCLK					3	Master Clock (Input/Output) -Clock source for the delta-sigma modulators. See “Crystal Applications
								(XTI/XTO)” on page 24 or “Crystal Applications (XTI/XTO)” on page 27.
		LRCK					4	Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the
								serial audio data line.
		SCLK					5	Serial Clock (Input/Output) - Serial clock for the serial audio interface.
		SDOUT					6	Serial Audio Data Output (Output) - Output for two’s complement serial audio data. This pin must be
		(M/S)						pulled-up or pulled-down to select Master or Slave Mode. See “Master/Slave Mode” on page 24.
		SDIN					7	Serial Audio Data Input (Input) - Input for two’s complement serial audio data.
		DGND					8	Digital Ground (Input) - Ground reference for the internal digital section.
		VD					9	Digital Power (Input) - Positive power for the internal digital section.
		VL					10	Logic Power (Input) - Positive power for the digital input/output interface.
		M0					11	Mode Select 0 (Input) - In conjunction with M1, selects operating mode. Functionality is described in the
								Hardware Mode Speed Configuration table.
		M1					12	Mode Select 1 (Input) - In conjunction with M0, selects operating mode. Functionality is described in the
								Hardware Mode Speed Configuration table.
							13	Serial Audio Interface Select (Input) - Selects either the left-justified or I2S format for the Serial Audio
		I2S/LJ
								Interface.
							14	Reset (Input) - The device enters a low power mode when this pin is driven low.
		RST
		VCOM					15	Common Mode Voltage (Output) - Filter connection for internal common mode voltage.
		AINA-					16,
		AINA+					17,	Differential Analog Input (Input) - The full scale differential input signals are presented to the delta-
		AINB+					18,	sigma modulators. The full scale level is specified in the ADC Analog Characteristics specification table.
		AINB-					19
		VA					20	Analog Power (Input) - Positive power for the internal analog section.
		AGND					21	Analog Ground (Input) - Ground reference for the internal analog section.
		FILT+					22	Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits.
							23	Channel A Mute Control (Output) - This pin is active during power-up initialization, reset, muting, when
		AMUTEC
								master clock to left/right clock frequency ratio is incorrect, or power-down.
		AOUTA-					24,
		AOUTA+					25,	Differential Analog Audio Output (Output) - The full scale differential output level is specified in the
		AOUTB+					26,	Analog Characteristics specification table.
		AOUTB-					27
							28	Channel B Mute Control (Output) - This pin is active during power-up initialization, reset, muting, when
		BMUTEC
								master clock to left/right clock frequency ratio is incorrect, or power-down.

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CS4272

3.CHARACTERISTICS AND SPECIFICATIONS

(All Min/Max characteristics and specifications are guaranteed over the Specified Operating Conditions. Typical performance characteristics and specifications are derived from measurements taken at nominal supply voltages and TA = 25°C.)

SPECIFIED OPERATING CONDITIONS (AGND = 0 V; all voltages with respect to ground.)

	Parameters	Symbol	Min	Nom	Max	Units
DC Power Supplies:	Positive Analog	VA	4.75	5.0	5.25	V
	Positive Digital	VD	3.1	3.3	5.25	V
	Positive Logic	VL	2.37	3.3	5.25	V
Ambient Operating Temperature (Power Applied)						°C
	Commercial Grade	TA	-10	-	+70
	Automotive Grade		-40	-	+85	°C

ABSOLUTE MAXIMUM RATINGS (GND = 0 V, All voltages with respect to ground.) (Note 1)

Parameter		Symbol	Min	Typ	Max	Units
DC Power Supplies:	Analog	VA	-0.3	-	+6.0	V
	Logic	VL	-0.3	-	+6.0	V
	Digital	VD	-0.3	-	+6.0	V
Input Current	(Note 2)	Iin	-	-	±10	mA
Analog Input Voltage		VIN	GND-0.3	-	VA+0.3	V
Digital Input Voltage		VIND	-0.3	-	VL+0.3	V
Ambient Operating Temperature (Power Applied)		TA	-50	-	+95	°C
Storage Temperature		Tstg	-65	-	+150	°C

Notes: 1. Operation beyond these limits may result in permanent damage to the device. Normal operation is not guaranteed at these extremes.

2.Any pin except supplies. Transient currents of up to ±100 mA on the analog input pins will not cause SCR latch-up.

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								CS4272
	DAC ANALOG CHARACTERISTICS - COMMERCIAL GRADE (Notes 3 to 7)
	Parameter			Symbol	Min	Typ	Max		Unit
	Dynamic Performance
	Dynamic Range	24-Bits	A-Weighted		108	114	-		dB
			unweighted		105	111	-		dB
		16-Bits	unweighted		-	94	-		dB
	Total Harmonic Distortion + Noise		0 dB	THD+N	-	-100	-94		dB
			-20 dB		-	-91	-		dB
			-60 dB		-	-51	-45		dB
	Idle Channel Noise / Signal-to-Noise Ratio				-	114	-		dB
	Interchannel Isolation		(1 kHz)		-	100	-		dB
	DC Accuracy
	Interchannel Gain Mismatch			ICGM	-	0.1	-		dB
	Gain Drift				-	100	-		ppm/°C
	Analog Output Characteristics and Specifications
	Full Scale Differential Output Voltage			VFS	0.91xVA	0.96xVA	1.01xVA		Vpp
	Output Resistance		(note 7)	Zout	-	100	-		Ω
	Minimum AC-Load Resistance			RL	-	3	-		kΩ
	Maximum Load Capacitance			CL	-	100	-		pF

Notes: 3. One-half LSB of Triangular PDF dither is added to data.

4.Performance measurements taken with a full-scale 997 Hz sine wave under Test load RL = 3 kΩ, CL = 10 pF

5.Measurement bandwidth is 10 Hz to 20 kHz.

6.Logic “0” = GND = 0V; Logic “1” = VL; VL = VA unless otherwise noted.

7.VFS is tested under load RL but does not include attenuation due to ZOUT

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								CS4272
	DAC ANALOG CHARACTERISTICS - AUTOMOTIVE GRADE (Notes 3 to 7)
	Parameter			Symbol	Min	Typ	Max		Unit
	Dynamic Performance
	Dynamic Range	24-Bits	A-Weighted		106	114	-		dB
			unweighted		103	111	-		dB
		16-Bits	unweighted		-	94	-		dB
	Total Harmonic Distortion + Noise		0 dB	THD+N	-	-100	-92		dB
			-20 dB		-	-91	-		dB
			-60 dB		-	-51	-43		dB
	Idle Channel Noise / Signal-to-Noise Ratio				-	114	-		dB
	Interchannel Isolation		(1 kHz)		-	100	-		dB
	DC Accuracy
	Interchannel Gain Mismatch			ICGM	-	0.1	-		dB
	Gain Drift				-	100	-		ppm/°C
	Analog Output Characteristics and Specifications
	Full Scale Differential Output Voltage			VFS	0.91xVA	0.96xVA	1.01xVA		Vpp
	Output Resistance		(note 7)	Zout	-	100	-		Ω
	Minimum AC-Load Resistance			RL	-	3	-		kΩ
	Maximum Load Capacitance			CL	-	100	-		pF

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CS4272

DAC COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE

(Note 12)

			Fast Roll-Off
Parameter		Min	Typ	Max	Unit
Single Speed Mode - 48 kHz
Passband (Note 9)	to -0.01 dB corner	0	-	.454	Fs
	to -3 dB corner	0	-	.499	Fs
Frequency Response 10 Hz to 20 kHz		-0.01	-	+0.01	dB
StopBand		.547	-	-	Fs
StopBand Attenuation	(Note 10)	90	-	-	dB
Group Delay		-	12/Fs	-	s
De-emphasis Error (Note 11)	Fs = 32 kHz	-	-	±0.23	dB
(Relative to 1kHz)	Fs = 44.1 kHz	-	-	±0.14	dB
	Fs = 48 kHz	-	-	±0.09	dB
Double Speed Mode - 96 kHz
Passband (Note 9)	to -0.01 dB corner	0	-	.430	Fs
	to -3 dB corner	0	-	.499	Fs
Frequency Response 10 Hz to 20 kHz		-0.01	-	0.01	dB
StopBand		.583	-	-	Fs
StopBand Attenuation	(Note 10)	80	-	-	dB
Group Delay		-	4.6/Fs	-	s
Quad Speed Mode - 192 kHz
Passband (Note 9)	to -0.01 dB corner	0	-	.105	Fs
	to -3 dB corner	0	-	.490	Fs
Frequency Response 10 Hz to 20 kHz		-0.01	-	0.01	dB
StopBand		.635	-	-	Fs
StopBand Attenuation	(Note 10)	90	-	-	dB
Group Delay		-	4.7/Fs	-	s

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DAC COMBINED INTERPOLATION & ON-CHIP ANALOG FILTER RESPONSE

(cont) (Note 12)

		Slow Roll-Off (Note 8)
Parameter		Min	Typ	Max	Unit
Single Speed Mode - 48 kHz
Passband (Note 9)	to -0.01 dB corner	0	-	0.417	Fs
	to -3 dB corner	0	-	0.499	Fs
Frequency Response 10 Hz to 20 kHz		-0.01	-	+0.01	dB
StopBand		.583	-	-	Fs
StopBand Attenuation	(Note 10)	64	-	-	dB
Group Delay		-	6.5/Fs	-	s
De-emphasis Error (Note 11)	Fs = 32 kHz	-	-	±0.23	dB
(Relative to 1 kHz)	Fs = 44.1 kHz	-	-	±0.14	dB
	Fs = 48 kHz	-	-	±0.09	dB
Double Speed Mode - 96 kHz
Passband (Note 9)	to -0.01 dB corner	0	-	.296	Fs
	to -3 dB corner	0	-	.499	Fs
Frequency Response 10 Hz to 20 kHz		-0.01	-	0.01	dB
StopBand		.792	-	-	Fs
StopBand Attenuation	(Note 10)	70	-	-	dB
Group Delay		-	3.9/Fs	-	s
Quad Speed Mode - 192 kHz
Passband (Note 9)	to -0.01 dB corner	0	-	.104	Fs
	to -3 dB corner	0	-	.481	Fs
Frequency Response 10 Hz to 20 kHz		-0.01	-	0.01	dB
StopBand		.868	-	-	Fs
StopBand Attenuation	(Note 10)	75	-	-	dB
Group Delay		-	4.2/Fs	-	s

Notes: 8. Slow Roll-Off interpolation filter is only available in control port mode.

9.Response is clock dependent and will scale with Fs. Note that the response plots (Figures 21 to 44) have been normalized to Fs and can be de-normalized by multiplying the X-axis scale by Fs.

10.Single and Double Speed Mode Measurement Bandwidth is from stopband to 3 Fs. Quad Speed Mode Measurement Bandwidth is from stopband to 1.34 Fs.

11.De-emphasis is available only in Single Speed Mode; Only 44.1 kHz De-emphasis is available in StandAlone Mode.

12.Plots of this data are contained in the “Appendix” on page 47. See Figure 21 through Figure 44.

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CS4272

ADC ANALOG CHARACTERISTICS - COMMERCIAL GRADE

Measurement Bandwidth is 10 Hz to 20 kHz unless otherwise specified. Input is 1 kHz sine wave.

Parameter			Symbol	Min	Typ	Max	Unit
Single Speed Mode	Fs = 48 kHz
Dynamic Range		A-weighted		108	114	-	dB
		unweighted		105	111	-	dB
Total Harmonic Distortion + Noise		(Note 13)	THD+N	-	-100	-94	dB
		-1 dB
		-20 dB		-	-91	-	dB
		-60 dB		-	-51	-	dB
Double Speed Mode	Fs = 96 kHz
Dynamic Range		A-weighted		108	114	-	dB
		unweighted		105	111	-	dB
40 kHz bandwidth unweighted				-	108	-	dB
Total Harmonic Distortion + Noise		(Note 13)	THD+N	-	-100	-94	dB
		-1 dB
		-20 dB		-	-91	-	dB
		-60 dB		-	-51	-	dB
40 kHz bandwidth		-1 dB		-	-97	-	dB
Quad Speed Mode	Fs = 192 kHz
Dynamic Range		A-weighted		108	114	-	dB
		unweighted		105	111	-	dB
40 kHz bandwidth unweighted				-	108	-	dB
Total Harmonic Distortion + Noise		(Note 13)	THD+N	-	-100	-94	dB
		-1 dB
		-20 dB		-	-91	-	dB
		-60 dB		-	-51	-	dB
40 kHz bandwidth		-1 dB		-	-97	-	dB
Dynamic Performance for All Modes
Interchannel Isolation				-	110	-	dB
Interchannel Phase Deviation				-	0.0001	-	Degree
DC Accuracy
Interchannel Gain Mismatch				-	0.1	-	dB
Gain Error					-	±5	%
Gain Drift				-	±100	-	ppm/°C
Offset Error	HPF enabled			-	0	-	LSB
	HPF disabled			-	100	-	LSB
Analog Input Characteristics
Full-scale Input Voltage				1.07xVA	1.13xVA	1.19xVA	Vpp
Input Impedance (Differential)		(Note 14)		37	-	-	kΩ
Common Mode Rejection Ratio			CMRR	-	82	-	dB

Notes: 13. Referred to the typical full-scale input voltage.

Notes: 14. Measured between AIN+ and AIN-

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CS4272

ADC ANALOG CHARACTERISTICS - AUTOMOTIVE GRADE

Measurement Bandwidth is 10 Hz to 20 kHz unless otherwise specified. Input is 1 kHz sine wave.)

Parameter			Symbol	Min	Typ	Max	Unit
Single Speed Mode	Fs = 48 kHz
Dynamic Range		A-weighted		106	114	-	dB
		unweighted		103	111	-	dB
Total Harmonic Distortion + Noise		(Note 15)	THD+N	-	-100	-92	dB
		-1 dB
		-20 dB		-	-91	-	dB
		-60 dB		-	-51	-	dB
Double Speed Mode	Fs = 96 kHz
Dynamic Range		A-weighted		106	114	-	dB
		unweighted		103	111	-	dB
40 kHz bandwidth unweighted				-	108	-	dB
Total Harmonic Distortion + Noise		(Note 15)	THD+N	-	-100	-92	dB
		-1 dB
		-20 dB		-	-91	-	dB
		-60 dB		-	-51	-	dB
40 kHz bandwidth		-1 dB		-	-97	-	dB
Quad Speed Mode	Fs = 192 kHz
Dynamic Range		A-weighted		106	114	-	dB
		unweighted		103	111	-	dB
40 kHz bandwidth unweighted				-	108	-	dB
Total Harmonic Distortion + Noise		(Note 15)	THD+N	-	-100	-92	dB
		-1 dB
		-20 dB		-	-91	-	dB
		-60 dB		-	-51	-	dB
40 kHz bandwidth		-1 dB		-	-97	-	dB
Dynamic Performance for All Modes
Interchannel Isolation				-	110	-	dB
Interchannel Phase Deviation				-	0.0001	-	Degree
DC Accuracy
Interchannel Gain Mismatch				-	0.1	-	dB
Gain Error					-	±5	%
Gain Drift				-	±100	-	ppm/°C
Offset Error	HPF enabled			-	0	-	LSB
	HPF disabled			-	100	-	LSB
Analog Input Characteristics
Full-scale Input Voltage				1.07xVA	1.13xVA	1.19xVA	Vpp
Input Impedance (Differential)		(Note 16)		37	-	-	kΩ
Common Mode Rejection Ratio			CMRR	-	82	-	dB

Notes: 15. Referred to the typical full-scale input voltage.

Notes: 16. Measured between AIN+ and AIN-

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15

CS4272

	ADC DIGITAL FILTER CHARACTERISTICS			(Note 19)
		Parameter			Symbol	Min	Typ	Max	Unit
	Single Speed Mode
	Passband	(-0.1 dB).	(Note 17)			0	-	0.47	Fs
	Passband Ripple.					-	-	±0.035	dB
	Stopband.		(Note 17)			0.58	-	-	Fs
	Stopband Attenuation.					-95	-	-	dB
	Group Delay.				tgd	-	12/Fs	-	s
	Double Speed Mode
	Passband	(-0.1 dB).	(Note 17)			0	-	0.45	Fs
	Passband Ripple.					-	-	±0.035	dB
	Stopband.		(Note 17)			0.68	-	-	Fs
	Stopband Attenuation.					-92	-	-	dB
	Group Delay.				tgd	-	9/Fs	-	s
	Quad Speed Mode
	Passband	(-0.1 dB).	(Note 17)			0	-	0.24	Fs
	Passband Ripple.					-	-	±0.035	dB
	Stopband.		(Note 17)			0.78	-	-	Fs
	Stopband Attenuation.					-97	-	-	dB
	Group Delay.				tgd	-	5/Fs	-	s
	High Pass Filter Characteristics
	Frequency Response	-3.0 dB.				-	1	-	Hz
		-0.13 dB.	(Note 18)				20	-	Hz
	Phase Deviation	@ 20 Hz.	(Note 18)			-	10	-	Deg
	Passband Ripple.					-	-	0	dB
	Filter Settling Time.						105/Fs		s

Notes: 17. The filter frequency response scales precisely with Fs.

18.Response shown is for Fs equal to 48 kHz. Filter characteristics scale with Fs.

19.Plots of this data are contained in the “Appendix” on page 47. See Figure 45 through Figure 56.

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