CDIDI CDLL4133, CDLL4132, CDLL4131, CDLL4130, CDLL4129 Datasheet

• 1N4099UR-1 THRU 1N4135UR-1 AVAILABLE IN																	JAN, JANTX, JANTXV AND JANS											1N4099UR-1
PER MIL-PRF-19500/435																													thru
• LEADLESS PACKAGE		FOR SURFACE			MOUNT																							1N4135UR-1
																														and
• LOW CURRENT OPERATION AT 250															A
																								CDLL4099 thru CDLL4135
• METALLURGICALLY BONDED
• DOUBLE PLUG CONSTRUCTION
	MAXIMUM	RATINGS
	Junction and Storage Temperature: -65°C to +175°C
	DC Power Dissipation:						500mW @ T					EC	= +125°C
	Power Derating: 10mW/ °C above T											EC	= +125°C
	Forward Derating @ 200 mA: 1.1 Volts maximum
	ELECTRICAL CHARACTERISTICS											@ 25°C, unless otherwise specified.
	CDI		NOMINAL				ZENER				MAXIMUM	MAXIMUM REVERSE						MAXIMUM
	TYPE		ZENER					TEST			ZENER				LEAKAGE				ZENER
	NUMBER	VOLTAGE			CURRENT			IMPEDANCE				CURRENT				CURRENT
			V	Z	@ l	ZT					l		Z	ZT				l	@ V	R		l
											ZT							R				ZM
				(Note 1)								(Note 2)
				VOLTS							A	OHMS						A		VOLTS		mA
	CDLL4099				6.8					250		200				10			5.17			56
	CDLL4100				7.5					250		200				10			5.70			51
	CDLL4101				8.2					250		200				1.0			6.24			46
	CDLL4102				8.7					250		200				1.0			6.61			44						MILLIMETERS					INCHES
	CDLL4103				9.1					250		200				1.0			6.92			42				DIM		MIN	MAX	MIN MAX
	CDLL4104				10					250		200				1.0			7.60			38
																										D		1.60	1.70		0.063		0.067
	CDLL4105				11					250		200				.05			8.44			35
	CDLL4106				12					250		200				.05			9.12			32				F		0.41	0.55		0.016		0.022
	CDLL4107				13					250		200				.05			9.87			29
																										G		3.30	3.70		.130		.146
	CDLL4108				14					250		200				.05			10.65			27
																										G1		2.54 REF.			.100	REF.
	CDLL4109				15					250		100				.05			11.40			25
	CDLL4110				16					250		100				.05			12.15			24				S		0.03 MIN.			.001	MIN.
	CDLL4111				17					250		100				.05			12.92			22
	CDLL4112				18					250		100				.05			13.67			21
	CDLL4113				19					250		150				.05			14.44			20							FIGURE 1
	CDLL4114				20					250		150				.01			15.20			19
	CDLL4115				22					250		150				.01			16.72			17
	CDLL4116				24					250		150				.01			18.25			16			DESIGN DATA
	CDLL4117				25					250		150				.01			19.00			15
	CDLL4118				27					250		150				.01			20.46			14
	CDLL4119				28					250		200				.01			21.28			14			CASE:		DO-213AA				, Hermetically sealed
	CDLL4120				30					250		200				.01			22.80			13
	CDLL4121				33					250		200				.01			25.08			12			glass case. (MELF, SOD-80, LL34)
	CDLL4122				36					250		200				.01			27.38			11
	CDLL4123				39					250		200				.01			29.65			9.8			LEAD FINISH:				Tin / Lead
	CDLL4124				43					250		250				.01			32.65			8.9
	CDLL4125				47					250		250				.01			35.75			8.1
	CDLL4126				51					250		300				.01			38.76			7.5			THERMAL RESISTANCE: (								R		O		JEC ):
	CDLL4127				56					250		300				.01			42.60			6.7
	CDLL4128				60					250		400				.01			45.60			6.4			100 ˚C/W maximum at L = 0 inch
	CDLL4129				62					250		500				.01			47.10			6.1			THERMAL IMPEDANCE: (								Z			JX ): 35
	CDLL4130				68					250		700				.01			51.68			5.6												O
	CDLL4131				75					250		700				.01			57.00			5.1
																									˚C/W maximum
	CDLL4132				82					250		800				.01			62.32			4.6
	CDLL4133				87					250		1000				.01			66.12		4.4				POLARITY:			Diode to be operated with
	CDLL4134				91					250		1200				.01			69.16		4.2
	CDLL4135			100						250		1500				.01			76.00		3.8				the banded (cathode) end positive.
	NOTE 1		The CDI type numbers shown above have a Zener voltage tolerance of
																									MOUNTING SURFACE SELECTION:
			+ 5% of the nominal Zener voltage. Nominal Zener voltage is measured
			with the device junction in thermal equilibrium at an ambient temperature																						The Axial Coefficient of Expansion
			of 25°C + 3°C. A "C" suffix denotes a + 2% tolerance and a "D" suffix																						(COE) Of this Device is Approximately
											1% tolerance.														+6PPM/°C. The COE of the Mounting
			denotes a +
																									Surface System Should Be Selected To
	NOTE 2		Zener impedance is derived by superimposing on l ZT , A 60 Hz rms a.c.																						Provide A Suitable Match With This
			current equal to 10% of l											(25		A a.c.).									Device.
												ZT

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