Apple K91 User Manual

TABLE_TABLEOFCONTENTS_ITEM

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

8

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE II NOT TO REPRODUCE OR COPY IT

3

B

7

ECNREV

BRANCH

DRAWING NUMBER

REVISION

SIZE

D

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

DRAWING TITLE

THE POSESSOR AGREES TO THE FOLLOWING:

Apple Inc.

SHEET

R

DATE

D

A

C

THE INFORMATION CONTAINED HEREIN IS THE

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

C

3456

D

B

8 7 6 5 4 2 1

12

APPD

CK

DESCRIPTION OF REVISION

TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEMTABLE_TABLEOFCONTENTS_ITEM TABLE_TABLEOFCONTENTS_ITEM

DRAWING

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

TABLE_TABLEOFCONTENTS_HEAD TABLE_TABLEOFCONTENTS_HEAD

REV B RELEASE, 01/31/11

SCHEM,FLYING_DUTCHMAN,MLB,K91F

Schematic / PCB #’s

ALIASES RESOLVED

1 OF 101

1 OF 132

2010-10-12

50

45

07/12/2010

K91_BEN

SMC Support

49

44

07/12/2010

K91_BEN

SMC

48

43

04/27/2010

K18_MLB

Front Flex Support

46

42

10/08/2010

K91_ERIC

External USB Connectors

45

41

11/08/2010

K91_ERIC

SATA/IR/SIL Connectors

43

40

06/10/2010

T27_REF

FireWire Connector

42

39

06/10/2010

T27_REF

FireWire Port & PHY Power

41

38

04/27/2010

K18_MLB

FireWire LLC/PHY (FW643)

40

37

05/26/2010

K91_TRINHNI

Ethernet Connector

39

36

10/11/2010

K91_ERIC

ETHERNET PHY (CAESAR IV)

38

35

10/12/2010

T29_REF

T29 Power Support

37

34

10/12/2010

T29_REF

T29 Host (2 of 2)

36

33

10/12/2010

T29_REF

T29 Host (1 of 2)

35

32

10/08/2010

K91_ERIC

SD READER CONNECTOR

34

31

10/08/2010

K91_MARY

X19/ALS/CAMERA CONNECTOR

33

30

04/27/2010

K18_MLB

FSB/DDR3/FRAMEBUF Vref Margining

32

29

04/27/2010

K18_MLB

CPU Memory S3 Support

31

28

06/23/2010

K92_SUMA

DDR3 SO-DIMM Connector B

30

27

05/10/2010

K92_SUMA

DDR3 Byte/Bit Swaps

29

26

06/23/2010

K92_SUMA

DDR3 SO-DIMM Connector A

28

25

07/06/2010

K92_MLB

Chipset Support

26

24

10/08/2010

K91_ERIC

USB HUBS

25

23

10/17/2010

K91_MLB

CPU & PCH XDP

24

22

07/06/2010

K92_MLB

PCH DECOUPLING

23

21

04/30/2010

K92_MLB

PCH GROUNDS

22

20

07/06/2010

K92_MLB

PCH POWER

21

19

10/20/2010

K91_MLB

PCH MISC

20

18

07/06/2010

K92_MLB

PCH PCI/FLASHCACHE/USB

19

17

07/06/2010

K92_MLB

PCH DMI/FDI/GRAPHICS

18

16

10/19/2010

K91_MLB

PCH SATA/PCIE/CLK/LPC/SPI

17

15

08/19/2010

K92_MLB

CPU DECOUPLING-II

16

14

08/19/2010

K92_MLB

CPU DECOUPLING-I

14

13

06/15/2010

K92_SUMA

CPU POWER AND GND

13

12

08/03/2010

K92_MLB

CPU POWER

12

11

06/15/2010

K92_SUMA

CPU DDR3 INTERFACES

11

10

08/03/2010

K92_MLB

CPU CLOCK/MISC/JTAG

10

9

06/21/2010

K92_SUMA

CPU DMI/PEG/FDI/RSVD

9

8

04/27/2010

K18_MLB

Signal Aliases

8

7

04/27/2010

K18_MLB

Power Aliases

7

6

04/27/2010

K18_MLB

Functional / ICT Test

5

05/28/2009

K17_REF

BOM Configuration

4

MASTER

Revision History

3

06/30/2009

K17_REF

Power Block Diagram

2

06/30/2009

K17_REF

System Block Diagram

100

K92_MLB

90

08/09/2010

CPU Constraints

99

K91_MARY

89

08/03/2010

Power Sequencing EG/PCH S0

97

K90I_KIRAN

88

06/25/2010

LCD Backlight Driver

96

K91_MARY

87

08/03/2010

Graphics MUX (GMUX)

95

K91_ERIC

86

10/08/2010

1V0 GPU / 1V5 FB Power Supply

94

T29_REF

85

10/16/2010

DisplayPort/T29 A Connector

93

T29_REF

84

10/16/2010

DisplayPort/T29 A MUXing

92

K92_MLB

83

11/21/2010

Muxed Graphics Support

90

K18_MLB

82

04/27/2010

LVDS Display Connector

89

K91_ERIC

81

12/21/2010

GPU (Whistler) CORE SUPPLY

88

K92_SUMA

80

06/15/2010

Whistler DP PWR/GNDs

87

K92_MLB

79

11/23/2010

Whistler GPIOs & STRAPs

86

K92_MLB

78

12/01/2010

Whistler LVDS/DP/GPIO

85

K92_MLB

77

08/19/2010

GDDR5 Frame Buffer B

84

K92_MLB

76

08/19/2010

GDDR5 Frame Buffer A

82

K92_MLB

75

08/03/2010

Whistler FRAME BUFFER I/F

81

K92_SUMA

74

06/15/2010

Whistler CORE/FB POWER

80

K92_SUMA

73

06/15/2010

Whistler PCI-E

79

K91_MARY

72

07/22/2010

Power Control 1/ENABLE

78

K91_MARY

71

10/14/2010

Power FETs

77

K91_ERIC

70

11/01/2010

Misc Power Supplies

76

K91_ERIC

69

10/08/2010

CPU VCCIO (1.05V) Power Supply

75

K91_ERIC

68

09/22/2010

CPU IMVP7 & AXG VCore Output

74

K91_ERIC

67

10/08/2010

CPU IMVP7 & AXG VCore Regulator

73

K91_ERIC

66

10/08/2010

1.5V DDR3 Supply

72

K91_ERIC

65

10/08/2010

5V / 3.3V Power Supply

71

K91_ERIC

64

10/08/2010

System Agent Supply

70

K91_CHANG

63

07/20/2010

PBus Supply & Battery Charger

69

K91_ERIC

62

10/08/2010

DC-In & Battery Connectors

68

K91_AUDIO

61

09/21/2010

AUDIO: JACK TRANSLATORS

67

K91_AUDIO

60

09/30/2010

AUDIO: JACKS

66

K91_AUDIO

59

07/12/2010

AUDIO: SPEAKER AMP

65

K91_AUDIO

58

07/12/2010

AUDIO: HEADPHONE FILTER

63

K91_AUDIO

57

07/12/2010

AUDIO: LINE INPUT FILTER

62

K91_AUDIO

56

09/30/2010

AUDIO: CODEC/REGULATOR

61

K91_BEN

55

06/08/2010

SPI ROM

59

K91_DINESH

54

08/06/2010

Digital Accelerometer

58

K91_ERIC

53

07/14/2010

WELLSPRING 2

57

K91_ERIC

52

10/08/2010

WELLSPRING 1

56

K18_MLB

51

04/27/2010

Fan Connectors

55

K91_DINESH

50

09/22/2010

Thermal Sensors

54

K91_DINESH

49

10/29/2010

High Side and CPU/AXG Current Sensing

53

K91_DINESH

48

08/16/2010

Voltage & Load Side Current Sensing

52

K18_MLB

47

04/27/2010

SMBus Connections

Power Supplies BIST

101

K91_DINESH

08/18/2010

132

DEBUG SENSORS AND ADC

100

K91_DINESH

08/06/2010

130

PCB Rule Definitions

99

K18_MLB

04/27/2010

109

Project Specific Constraints

98

K18_MLB

04/27/2010

108

GPU (Whistler) CONSTRAINTS

97

K92_MLB

08/09/2010

107

SMC Constraints

96

K18_MLB

04/27/2010

106

T29 Constraints

95

T29_REF

10/16/2010

105

Ethernet/FW Constraints

94

K91_ERIC

08/03/2010

104

PCH Constraints 2

93

K92_MLB

08/09/2010

103

PCH Constraints 1

92

K92_MLB

08/09/2010

102

SCHEM,MLB,K91

(.csa)

Date

Page SyncContents

CRITICAL

PCB

1

820-2915

PCBF,MLB,K91

SCHEM,MLB,K91

CRITICAL

SCH

1

051-8620

51

K18_MLB

46

04/27/2010

LPC+SPI Debug Connector

1

MASTER

Table of Contents

Memory Constraints

91

K18_MLB

04/27/2010

101

TITLE=MLB

ABBREV=DRAWING

LAST_MODIFIED=Mon Jan 31 12:49:37 2011

ContentsPage

Date

(.csa)

Sync ContentsPage

(.csa)

Sync

Date

www.rosefix.com

www.vinafix.vn

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

POWER SUPPLY

PG 63

DC/BATT

TEMP SENSOR

J6950

U4900

PG 23

SPI

Boot ROM

U6100

XDP CONN

J2500,J2550

J2900

DIMM

PG 26,28

J3100

PG 16

DDR3-1067/1333MHZ

2 DIMMS

RTC

DMI

PG 17

PG 44

PG 51

PG 44

POWER SENSE

FAN CONN AND CONTROL

J5650,5660

Fan

CONNECTION

SMBUS

PG 47

PG 63

SPEATKER

TRACKPAD/KEYBOARD

U6610,6620,6630

SPEATKER

Ser

ADC

PG 44

SMC

BSBB,0

J3402

U4900

Prt

PG 55

PG 46

U3600

CAMERA

PG 33

PG 41

PG 31

EXTERNAL B

EXTERNAL C

J4501

J4610

PG 34

PG 31

PG 53

BLUETOOTH

EXTERNAL A

J5713

J3401

J4600

USB

HUB 2

PG 33

HUB 1

USB

PG 34

U3700

LPC + SPI CONN Port80,serial

J5100

PG 19

Misc

SPI

PG 16

LPC

PG 16

PWR

1011 1312 98654 73210

CTRL

PG 17

(UP TO 14 DEVICES)

PG 18

USB

AUDIO

PG 56

DIMM

PG 26,28

U6201

AMP

PG 59

PG 60

FILTER

PG 58

AUDIO

CONN

PG 57

J6700,J6750

LINE TIN

FILTER

PG 16

SMB

HDA

J3500

PG 37

CONN

(UP TO 16 LINES)

SDCARD READER

COUGAR-POINT

U1800

2.X GHZ

INTEL CPU

SANDY BRIDGE

INTEL

MOBILE

PG 9

PG 17

FDI

PG 19

GPIO

GRAPHICS

AMD WHISTLER

U8000

PG 73

U2700

CLOCK

SATA3.0/6(GB/S)

SATA2.0/3(GB/S)

BUFFER

PG 16

CLK

4 5

SATA

2 3

PG 16

10

DP OUT

RGB OUT

HDMI OUT

LVDS OUT

DVI OUT

PG 18

TMDS OUT

PCI

PG 18

PG 24

PG 41

CK5G05

CONN

SATA

J4501

ODD

PG 41

SATA

CONN

J4500

HDD

PG 83

DP MUX

XP25-5G

PG 84

JTAG

PCI-E

PG 16

PEG

PG 16

BCM57765

GB

PG 36

E-NET

CONN

PG 37

E-NET

J4000

U3900

PG 38

PG 40

CONN

FIREWIRE

FW643

PG 83

DDC MUX

PG 86

GMUX

U4100

J4310PG 31

AirPort

J3401

MINI DP PORT

LCD PANEL

U9600

U9320

U9370

J9400

IR

(RESERVATION)

CODEC

HEADPHONE

SYNC_DATE=06/30/2009

SYNC_MASTER=K17_REF

System Block Diagram

2 OF 132 2 OF 101

www.rosefix.com

www.vinafix.vn

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

(PAGE 82)

PP3V3_S0_PWRCTL

P1V8S0_PGOOD

P5V3V3_PGOOD

AC

ADAPTER

CHGR_BGATE

VIN

U6200

PM_SLP_S4_L

PM_SLP_S5_L

PM_SLP_S3_L

SMC_ONOFF_L

RSMRST_PWRGD

(PAGE 45)

SLP_S4_L(P94)

SLP_S3_L(P93)

U4900

SLP_S5_L(P95)

H8S2117

PWRGD(P12)

RSMRST_IN(P13)

PWR_BUTTON(P90)

ALL_SYS_PWRGD

PP4V5_AUDIO_ANALOG

(PAGE 9~14)

SMC

CPU

U1000

U2850

PM_PCH_PWRGD

PS_PWRGD

U1800

(PAGE 70)

SMC_RESET_L

ISL95870

1.05V

PGOOD

VOUT

SMC AVREF SUPPLY

(PAGE 45)

REF3333

VOUT

CPUVTTS0_PGOOD

R7640

A

PROCPWRGD

DRAMPWROK

SMC_TPAD_RST_L

SMC_ONOFF_L

PLTRST#

RES*

P17(BTN_OUT)

SYSRST(PA2)

IMVP_VR_ON(P16)

99ms DLY

PP3V3_S5_AVREF_SMC

(P64)

RESET*

VCCCPUPWRGD

SM_DRAMPWROK

PWRBTN#

SYS_RERST#

(PAGE 16~21)

RSMRST#

COUGAR_POINT

PPCPUVTT_S0

SMC_CPU_FSB_ISENSE

RSMRST_OUT(P15)

ACPRESENT

SMC_RESET_L

PM_RSMRST_L

CPUIMVP_VR_ON

PM_SYSRST_L

PM_PWRBTN_L

SMC_ADAPTER_EN

PLT_RERST_L

CPU_PWRGD PM_MEM_PWRGD

PM_PWRBTN_L

EN

FW_PWR_EN

U4202

TPS22924

(PAGE 39)

U5001

PP3V3_S5_SMC

PP1V0_FW_FWPHY

DELAY

RC

DELAY

RC

DELAY

RC

CPUVTTS0_EN

P1V5CPU_EN

P1V8S0_EN

P1V2S0_EN

R7978

U1800

(PAGE 16~21)

SLP_S3#(P12)

SLP_S4#(H7)

DELAY

RC

MOBILE

(PAGE 44)

P60

SMC

(PAGE 86)

U4900

PL32A

SMC_PM_G2_EN

COUGAR-POINT

SLP_S5#(E4)

RC

DELAY

XP25-5

EG_RAIL4_EN

PB18A

GMUX

U9600

PB17A

PB17B

PB16B

(9 TO 12.6V)

3S2P

J6950

EG_RAIL2_EN EG_RAIL3_EN

EG_RAIL1_EN

PPVBATT_G3H_CONN

PM_SLP_S3_L

PM_SLP_S5_L

PM_SLP_S4_L

PM_ALL_GPU_PGOOD

P3V3S3_EN

DDRREG_EN

P5VS3_EN

PM_SLP_S3_L_R

PBUSVSENS_EN

P3V3S0_EN

P5VS0_EN

&&

SMC_ADAPTER_EN&&PM_SLP_S3_L

BKLT_PLT_RST_L

LCD_BKLT_NO

Q4260

BKLT_EN

ENA

(PAGE 87)

U9701

PFWBOOST

LP8550

VIN

VOUT

P3V3S5_EN

P1V1GPU_EN P3V3GPU_EN GPUVCORE_EN

Q7055

P1V5FB_EN

PPVBAT_G3H_CHGR_R

P1V0GPU_EN

U9500

Q9806

EN2

ISL6236

EN1

VIN

P5VS3_EN

1.503V(R/H)

(PAGE 85)

P3V3S5_EN

1.003V(L/H)

POK2

EN2

EN1

VOUT2

POK1

VOUT1

A

R5413

(PAGE 64)

IN

J6900

DCIN(16.5V)

6A FUSE

F6905

K91 POWER SYSTEM ARCHITECTURE

SMC_DCIN_ISENSE

SMC_RESET_L

A

VIN

R7020

PP18V5_DCIN_CONN

BATTERY CHARGER

PBUS SUPPLY/

U7000

ISL6259HRTZ

R6990

VOUT

SMC_BATT_ISENSE

PPVBAT_G3H

R7050

A

8A FUSE

F7040

SMC_GPU_1V8_ISENSE

PP1V5_GPU_REG

TPS51125

P1V5FB_PGOOD

P1V0GPU_PGOOD

P5V3V3_PGOOD

PPVOUT_S0_LCDBKLT

PP1V0_S0GPU_REG

(PAGE 65)

PGOOD

PPBUS_G3H

D6990

P1V8_S0_EN

U7201

Q7830

Q7870

Q7810

P3V3GPU_EN

PP3V3_S3

PP3V3_S0_FET

P3V3S0_EN

EN

P3V3S3_EN

P1V2ENET_EN

PP3V3_S0GPU

EN

U7760

(PAGE 70)

PGOOD

VOUT

ISL8014A

VIN

ISL8014A

U7720

(PAGE 70)

VOUT

PGOOD

PP1V2_ENET

P1V2ENET_PGOOD

P1V8S0_PGOOD

PP1V8_S0

EN

(PAGE 39)

TPS22924

U4201

PP3V3_FW_FWPHY

P1V8FB_EN

FW_PWR_EN

ON

Q7922

VIN

SLG5AP020

U7880

G

VIN

5V

3.3V

(R/H)

(L/H)

P1V5CPU_EN

VREG5

VOUT1

VOUT2

ON

SLG5AP020

DDRVTT_EN

DDRREG_EN

PP5V_S3

PP3V3_S5

VIN

U7801

G

PP1V5_S3

PP3V3_S5

S3

S5

SMC_CPU_HI_ISENSE

(PAGE 66)

U7300

P1V5S0FET_GATE

Q7801

TPS51116

1.5V

0.75V

CPUIMVP7_VR_ON

R5388/U5388

A

VIN

PP5V_S3_DDRREG

PP1V5_S3RS0

PGOOD

VOUT1

VLDOIN

VOUT2

Q7860

DDRREG_PGOOD

PPVTT_S0_DDR_LDO

PPDDR_S3_REG

PP5V_S0

P5VS0_EN

A

VR_ON

VIN

CPU VCORE

(PAGE 67)

U7400

ISL95831

PGOOD

VOUT

PP1V8_S0

PM_SLP_S3_L&&WOL_EN||SMC_ADAPTER_EN

P1V2S0_EN

PP1V2_S0

P1V8GPUIFPXFET_GATE

Q7850

PP3V3_ENET

CPUIMVP7_AXG_PGOOD

R7350

SMC_DDR_ISENSE

A

SMC_CPU_ISENSE

PP1V05_S0

PP1V5_S0

V4MON

V3MON

TRST = 200mS

(PAGE 72)

U7971

RST*

V2MON

PP3V3_S0

PP1V8_GPUIFPX

PP3V3_S0

VCC

S0PGOOD_PWROK

ISL88042IRTJJZ

PP3V3_S0_PWRCTL

PM_SLP_S4_L

PM_SLP_S5_L

PM_SLP_S3_L

SMC_ONOFF_L

RSMRST_PWRGD

Q7880

ALL_SYS_PWRGD

PP3V3_S0

EN

PP1V5_S3

4.5V

MAX8840

PM_ALL_GPU_PGOOD

U7980

VOUT

V

U5440

V

SMC_CPU_DDR_VSENSE

PPVCORE_S0_CPU

SMC_CPU_VSENSE

PP4V5_AUDIO_ANALOG

U2850

PM_PCH_PWRGD

PPBUS_G3H

PP5V_S3_GFXIMVP6_VDD

GPUVCORE_EN

SMC_PBUS_VSENSE

VR_ON

VDD

V

Q5315

GPU VCORE

ISL6263C

VIN

U8900

PGOOD

VOUT

U6990

3.425V G3HOT

ENABLE

PM6640

(PAGE 62)

SMC_GPU_ISENSE

U5410

A

GPUVCORE_PGOOD

V

PP3V42_G3H

PPVCORE_GPU

SMC_GPU_VSENSE

CPUVTTS0_EN

U5000

(PAGE 45)

PP5V_S0_CPUVTTS0

EN

VIN

NCP303LSN

SMC PWRGD

U7600

(PAGE 70)

SMC_RESET_L

VIN

ISL95870

1.05V

PGOOD

VOUT

SMC AVREF SUPPLY

(PAGE 45)

REF3333

VOUT

CPUVTTS0_PGOOD

SYNC_DATE=06/30/2009

SYNC_MASTER=K17_REF

Power Block Diagram

3 OF 132 3 OF 101

www.rosefix.com

www.vinafix.vn

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

Revision History

SYNC_MASTER=MASTER

SYNC_DATE=MASTER

4 OF 132 4 OF 101

www.rosefix.com

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TABLE_BOMGROUP_ITEM

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

TABLE_ALT_ITEM

TABLE_BOMGROUP_ITEM

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

TABLE_BOMGROUP_ITEM

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

TABLE_BOMGROUP_ITEM

BOM OPTIONS

BOM GROUP

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

TABLE_ALT_ITEM

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

BOM OPTIONS

BOM NAME

BOM NUMBER

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

K91 BOM GROUPS

Module Parts

Alternate Parts

EFI ROM

BOM Variants

(Primary)

Bar Code Labels

/ EEEE #’s

|

(Alternate)

SMC

PSOC

ETHERNET ROM

Programmables - All Builds

PCBA,MLB,K91F,DG64

639-1468

K91_COMMON,SODIMM:FOXCONN,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DG64

PCBA,MLB,K91F,DG65

639-1469

K91_COMMON,SODIMM:FOXCONN,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DG65

PCBA,MLB,K91F,DL86

639-1970

K91_COMMON,SODIMM:HYBRID,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DL86

K91_COMMON,SODIMM:HYBRID,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DL81

639-1973

PCBA,MLB,K91F,DL81

K91_COMMON,SODIMM:MOLEX,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DL7W

639-1956

PCBA,MLB,K91F,DL7W

SYNC_DATE=05/28/2009

BOM Configuration

SYNC_MASTER=K17_REF

ALL

Diodes alt for Rohm

376S0859376S0977

U6201 AUDIO CODEC OLD REV IS ALTERNATE FOR NEW REV

353S3199

ALL

353S2592 335S0550

add 4K byte as alternative to 2K

335S0777

ALL

NXP alternate for pin diodes

ALL

371S0652371S0679

138S0671 138S0673

ALL

Taiyo Yuden alt for Murata 10 uF caps

ALL

152S0796

Dale/Vishay/TDK alt for Cyntec

152S0685

ALL

Taiyo Yuden alt for Samsung

138S0638138S0681

138S0648

Samsung / Murata alt for Taiyo Yuden

138S0652

ALL

138S0691

Murata alt to Samsung cap

ALL

138S0676

ROHM alt to Toshiba N-FET

ALL

376S0972 376S0612

IC,EEPROM,SERIAL,8KB,SOIC

335S0777 CRITICAL

U3690

T29ROM:BLANK

1

Sanyo alt to Kemet

ALL

128S0264 128S0257

ST Micro alt to LT

ALL

353S3085 353S1658

ALL

155S0457

MAG LAYERS ALT TO MURATA

155S0329

ALL

152S0896

MAG LAYERS ALT TO CYNTEC

152S0518

Panasonic alt to Sanyo

ALL

128S0303 128S0282

Fairchild wafer option

ALL

353S2805 353S2603

ALL

376S0855 376S0613

Diodes alt to Toshiba dual N-FET

IC,SMC,DEVELOPMENT-DVT,K91

CRITICAL

1

U4900

SMC_PROG:DVT

341S2864

1

CRITICAL

IC,SMC,DEVELOPMENT-PROTO2,K91

U4900

SMC_PROG:PROTO2

341S2994

IC,SMC,DEVELOPMENT-PROTO1,K91

U4900

341S2935

SMC_PROG:PROTO1

CRITICAL

1

IC,SMC,DEVELOPMENT-PVT,K91

CRITICAL

U4900

1

SMC_PROG:PVT

341S2867

335S0740

64 MBIT SPI SERIAL DUAL I/O FLASH

BOOTROM_BLANK

1

CRITICAL

U6100

337S4033

U1000

CPU:2_3GHZ

CRITICAL

1

IC,CPU,SNB,SR00U,PRQ,D2,2.3,45W,4+2,1.30,8M,BGA

1

U4900

SMC_BLANK

CRITICAL

IC,SMC,HS8/2117,9MMX9MM,TLP

338S0895

IC,GPU ROM,K91/F,K92,BLANK

U8701

GPUROM:BLANK

1

CRITICAL335S0724

IC,GPU ROM,K91/F,K92,PROG

1

GPUROM:PROG

CRITICAL

U8701

341S2957

IC,MCU,32B,LPC1112A,16KB/2KB,HVQFN25

U9330

T29MCU:BLANK

CRITICAL337S3997

1

IC,EFI,ROM,PROTO0, K90/K90I/K91/K91F/K92

1

U6100

CRITICAL341S2893

BOOTROM_PROG:PROTO0

341S2830 CRITICAL

U9600

IC,CPLD,LATTICE,GMUX,K91/K91F

1

GMUX_PROG

826-4393

LBL,P/N LABEL,PCB,28MM X 6 MM

[EEEE_DL80]

EEEE:DL80

1

CRITICAL

826-4393

LBL,P/N LABEL,PCB,28MM X 6 MM

[EEEE_DL7Y]

EEEE:DL7Y

1

CRITICAL

[EEEE_DL7W]

EEEE:DL7W

1

826-4393 CRITICAL

LBL,P/N LABEL,PCB,28MM X 6 MM

826-4393

LBL,P/N LABEL,PCB,28MM X 6 MM

[EEEE_DL7V]

EEEE:DL7V

CRITICAL

1

LBL,P/N LABEL,PCB,28MM X 6 MM

[EEEE_DL7R]

1

EEEE:DL7R

CRITICAL826-4393

[EEEE_DL7Q]

826-4393

1

CRITICAL

EEEE:DL7Q

LBL,P/N LABEL,PCB,28MM X 6 MM

639-1574

PCBA,MLB,K91,DHMW

K91_COMMON,SODIMM:FOXCONN,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_SAMSUNG,EEEE:DHMW

639-1960

PCBA,MLB,K91,DL7Y

K91_COMMON,SODIMM:MOLEX,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_SAMSUNG,EEEE:DL7Y

K91_COMMON,SODIMM:HYBRID,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_HYNIX,EEEE:DL7Q

639-1945

PCBA,MLB,K91,DL7Q

K91_COMMON

ALTERNATE,COMMON,K91_COMMON1,K91_COMMON2,K91_PROGPARTS,K91_PROGPARTS1,UVGLUE_K91_K91F,K91_PVT

CPUMEM_S0,SMC_DEBUG_YES,HUB1_2NONREM,HUB2_2NONREM,USBHUB_2513B

K91_COMMON1 K91_COMMON2

GPUVID_1P11V,KB_BL,T29:YES,ENET_SD:B0,T29BST:Y,SDRV_PD,SDRVI2C:MCU,T29_DP_HPD:ALL_OR

K91_PVT

BMON:PROD,VREFMRGN_NOT,XDP,XDP_CPU_BPM,BKLT:PROD,ISNS_ON:NO,LPCPLUS_R:YES

K91_PROGPARTS

GMUX_PROG,IR_PROG,TPAD_PROG:PVT,ENETROM_PROG:PVT,T29ROM:PROG,T29MCU:PROG

SMC_PROG:PVT,BOOTROM_PROG:PVT

K91_PROGPARTS1

K91_DEVEL:PVT

SNB_CPT_XDP,LPCPLUS_CONN:YES,LPCPLUS_R:YES

SNB_CPT_XDP

XDP,XDP_CONN,XDP_CPU_BPM,XDP_PCH

1

IC,T29 EEPROM,PVT,K9x

T29ROM:PROG

U3690

CRITICAL341S3129

K91_COMMON,SODIMM:HYBRID,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_SAMSUNG,EEEE:DL80

639-1959

PCBA,MLB,K91,DL80

IC,EFI,ROM,PROTO1, K90/K90I/K91/K91F/K92

341S2934 CRITICAL

U6100

BOOTROM_PROG:PROTO1

1

K91_DEVEL:ENG

SNB_CPT_XDP,BMON:ENG,GMUX_JTAG_CONN,VREFMRGN,LPCPLUS_CONN:YES,LPCPLUS_R:YES,BKLT:ENG,S0PGOOD_ISL,CPURIPPLE_ENG,IMVPISNS_ENG,ISNS_ON:YES,DEBUG_ADC,DIGI_MIC

338S0945

U3600

IC,ASSP,LIGHTRIDGE,S LHAJ,PRQ,FCBGA,15X15MM

CRITICAL

1

T29:YES

725-1479

UV_GLUE_K91_K91F

UVGLUE_K91_K91F

1

CRITICAL

MLB LOCTITE UV EB CPU,PCH,T29,GPU,K91

CRITICAL

J2900

516-0246

SODIMM:FOXCONN

1

CONN,204P,SODIMM,SOCKET,DDR3,p=0.6M,FOXCONN

CONN,204P,SODIMM,SOCKET,DDR3,RAM,BGA,MOLEX

516S0805

SODIMM:MOLEX

J3100

1

CRITICAL

1

516-0245

SODIMM:MOLEX

CONN,204P,SODIMM,SOCKET,DDR3,p=0.6M,MOLEX

CRITICAL

J2900

516S0805

J3100

1

SODIMM:HYBRID

CONN,204P,SODIMM,SOCKET,DDR3,RAM,BGA,MOLEX

CRITICAL

J2900

516-0246

1

CRITICAL

CONN,204P,SODIMM,SOCKET,DDR3,p=0.6M,FOXCONN

SODIMM:HYBRID

IC,FLASH,SERIAL,SPI,1MBIT,2V7,8P,SOIC

335S0663

1

ENETROM_BLANK

CRITICAL

U3990

1

U3990

341S3096 CRITICAL

IC,ENET ROM,1MBIT,DVT,PVT,K90i/K91x

ENETROM_PROG:PVT

IC,ENET,1MBITFLASH,CIV REV01,K90i/K91/K92

1

CRITICAL

ENETROM_PROG:EVT

341S3026

U3990

341S2685

IC,ENET,1MBITFLASH,CIV REV01,K74/K75,K40

1

CRITICAL

ENETROM_PROG:A0_SD

U3990

SODIMM:FOXCONN

J3100

516S0806

1

CRITICAL

CONN,204P,SODIMM,SOCKET,DDR3,RAM,BGA,FOXCONN

TPAD_PROG:PROTO2

U5701

CRITICAL

IC,TP PSOC,K9x,PROTO2

1

341S3001

1

CRITICAL

TPAD_PROG:EVT

IC,TP PSOC,K9x,EVT

341S3024

U5701

341S2940

1

CRITICAL

TPAD_PROG:PROTO1

U5701

IC,TP PSOC,K9x,PROTO1

IC,EFI,ROM,PVT, K90/K90I/K91/K91F/K92

CRITICAL

BOOTROM_PROG:PVT

1

U6100

341S2896

341S2894 CRITICAL

BOOTROM_PROG:EVT

1

U6100

IC,EFI,ROM,EVT, K90/K90I/K91/K91F/K92

1

CRITICAL

U5701

341S2902

TPAD_PROG:PROTO0

IC,TP PSOC,K9x,PROTO0

1

341S3099

IC,TP PSOC,K9x,DVT,PVT

CRITICAL

TPAD_PROG:PVT

U5701

IC,SMC,DEVELOPMENT-EVT,K91

U4900

1

SMC_PROG:EVT

CRITICAL341S2861

U1000

1

337S4031

CPU:2_0GHZ

CRITICAL

IC,CPU,SNB,SR030,PRQ,D2,2.0,45W,4+2,1.20,6M,BGA

IC,PCH,COUGARPOINT,SLH9D,PRQ,BD82HM65

U1800

337S4029 CRITICAL

1

337S3936

U8000

IC,GPU,AMD,WHISTLER,962FCBGA,40NM,ES

1

GPU:WHISTLER

CRITICAL

1

337S4032

U1000

CPU:2_2GHZ

CRITICAL

IC,CPU,SNB,SR00W,PRQ,D2,2.2,45W,4+2,1.30,6M,BGA

K91_COMMON,SODIMM:MOLEX,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_HYNIX,EEEE:DL7R

PCBA,MLB,K91,DL7R

639-1953

337S3979 CRITICAL

IC,GPU,AMD,SEYMOUR,M2 LP,ES1,962BGA

1

GPU:SEYMOUR

U8000

K91_COMMON,SODIMM:MOLEX,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DL88

PCBA,MLB,K91F,DL88

639-1976

PCBA,MLB,K91F,DG67

639-1471

K91_COMMON,SODIMM:FOXCONN,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DG67

639-1974

PCBA,MLB,K91F,DL87

K91_COMMON,SODIMM:HYBRID,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DL87

PCBA,MLB,K91F,DL83

639-1972

K91_COMMON,SODIMM:HYBRID,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DL83

[EEEE_DG63]

CRITICAL826-4393

LBL,P/N LABEL,PCB,28MM X 6 MM

EEEE:DG63

1

[EEEE_DG66]

EEEE:DG66

826-4393

LBL,P/N LABEL,PCB,28MM X 6 MM

1

CRITICAL

IC,PROGRMD,LPC1112A,T29 PORT MCU,PVT,HVQFN25

341S3128

T29MCU:PROG

CRITICAL

U9330

1

SMC_PROG:PROTO0

U4900

IC,SMC,DEVELOPMENT-PROTO0,K91

1

CRITICAL341S2854

LBL,P/N LABEL,PCB,28MM X 6 MM

[EEEE_DL7T]

1

EEEE:DL7T

CRITICAL826-4393

341S2973

U3990

1

CRITICAL

ENETROM_PROG:B0_SD

IC,ENET,1MBITFLASH,CIV REV01,K60/K62

1

[EEEE_DL89]

EEEE:DL89

826-4393 CRITICAL

LBL,P/N LABEL,PCB,28MM X 6 MM

[EEEE_DL88]

CRITICAL

1

826-4393

EEEE:DL88

LBL,P/N LABEL,PCB,28MM X 6 MM

[EEEE_DL85]

CRITICAL826-4393

EEEE:DL85

1

353S3055

IC,PI3VEDP212,X2 DISPLAYPORT 2:1 MUX,QFN

CRITICAL

1

U9390

IC,SGRAM,GDDR5,64MX32,3.6GBPS,M-DIE,HF

U8400,U8450,U8500,U8550

FB_1G_HYNIX

CRITICAL333S0572

4

LBL,P/N LABEL,PCB,28MM X 6 MM

[EEEE_DL84]

1

CRITICAL826-4393

EEEE:DL84

LBL,P/N LABEL,PCB,28MM X 6 MM

[EEEE_DL82]

CRITICAL

1

826-4393

EEEE:DL82

LBL,P/N LABEL,PCB,28MM X 6 MM

826-4393

[EEEE_DHMV]

1

CRITICAL

EEEE:DHMV

[EEEE_DHMW]

LBL,P/N LABEL,PCB,28MM X 6 MM

826-4393

EEEE:DHMW

CRITICAL

1

BOOTROM_PROG:DVT

1

CRITICAL

U6100

341S2895

IC,EFI,ROM,DVT, K90/K90I/K91/K91F/K92

[EEEE_DL83]

CRITICAL

1

EEEE:DL83

826-4393

LBL,P/N LABEL,PCB,28MM X 6 MM

826-4393

LBL,P/N LABEL,PCB,28MM X 6 MM

[EEEE_DL86]

CRITICAL

1

EEEE:DL86

LBL,P/N LABEL,PCB,28MM X 6 MM

[EEEE_DL81]

CRITICAL

1

826-4393

EEEE:DL81

157S0055

ALL

157S0058

Delta alt to TDK Magnetics

LBL,P/N LABEL,PCB,28MM X 6 MM

[EEEE_DG67]

826-4393 CRITICAL

1

EEEE:DG67

LBL,P/N LABEL,PCB,28MM X 6 MM

[EEEE_DG64]

CRITICAL

1

EEEE:DG64

826-4393

[EEEE_DDKG]

LBL,P/N LABEL,PCB,28MM X 6 MM

826-4393

EEEE:DDKG

1

CRITICAL

[EEEE_DG65]

CRITICAL826-4393

LBL,P/N LABEL,PCB,28MM X 6 MM

1

EEEE:DG65

826-4393

LBL,P/N LABEL,PCB,28MM X 6 MM

[EEEE_DL87]

CRITICAL

1

EEEE:DL87

IC,SDRAM,GDDR5,32MX32,1.25GHz,A-DIE1.35V

U8400,U8450,U8500,U8550

CRITICAL

FB_512_HYNIX

333S0564

4

333S0543

U8500,U8550

FB_256_SAMSUNG

CRITICAL

2

IC,SGRAM,GDDR5,32MX32.1.25GHz,E-DIE,HF

IC,SDRAM,GDDR5,32MX32,1.25GHz,A-DIE1.35V

333S0564 CRITICAL

FB_256_HYNIX

2

U8500,U8550

IC,SGRAM,GDDR5,64MX32,3.6GBPS,C-DIE,HF

CRITICAL

FB_1G_SAMSUNG

333S0571

4

U8400,U8450,U8500,U8550

IC,EFI,ROM,PROTO2, K90/K90I/K91/K91F/K92

U6100

CRITICAL

1

BOOTROM_PROG:PROTO2

341S2991

1

IR,ENCORE II,CY7C63833-LFXC

IR_PROG

U4800

CRITICAL341S2384

IC,PLD,LATTICE,LFXP2-5E-5,132 BALL CSBGA

GMUX_BLANK

U9600

1

CRITICAL336S0042

639-1470

PCBA,MLB,K91F,DG66

K91_COMMON,SODIMM:FOXCONN,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DG66

PCBA,MLB,K91F,DL82

639-1971

K91_COMMON,SODIMM:MOLEX,CPU:2_2GHZ,GPU:WHISTLER,FB_1G_HYNIX,VRAM_DVP1,VRAM_DVP0,EEEE:DL82

1

343S0534

IC,ASIC,GBIT ETHNET&SD CTRLR,686 QFN8X8,B0

CRITICAL

U3900

ENET_SD:B0

K91_COMMON,SODIMM:FOXCONN,CPU:2_0GHZ,GPU:SEYMOUR,FB_256_HYNIX,EEEE:DHMV

639-1573

PCBA,MLB,K91,DHMV

639-1954

PCBA,MLB,K91F,DL7T

K91_COMMON,SODIMM:MOLEX,CPU:2_3GHZ,GPU:WHISTLER,FB_1G_SAMSUNG,VRAM_DVP0,EEEE:DL7T

IC,SGRAM,GDDR5,32MX32.1.25GHz,E-DIE,HF

FB_512_SAMSUNG

333S0543

U8400,U8450,U8500,U8550

CRITICAL

4

IC,FW643-E,1394B PHY/OHCI LINK/PCI-E,12

1

CRITICAL338S0753

U4100

IC,ASIC,GBIT ETHNET&SD CTRLR,686 QFN8X8,A0

1

CRITICAL

U3900

ENET_SD:A0

343S0494

085-1901

K91/K91F DEVELOPMENT BOM

K91_DEVEL:ENG

5 OF 132 5 OF 101

www.rosefix.com

www.vinafix.vn

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

NC NO_TESTs

NO_TEST

J6995 (BAT LED CONN)

J5800 (IPD FLEX CONN)

J6950 (BAT CONN)

NC NO_TESTs

J6950 (MAIN BATT CONN)

J6950 (BIL CABLE CONN)

Functional Test Points

J6900 (DC POWER CONN)

J6781 & J6782 (SPEAKERS CONN)

J5650 (LEFT FAN CONN)

POWER RAILS

NO_TEST=TRUE

FUNC_TEST

per Fan

2 TP needed

J3401 & J3402 (AIRPORT/BT/CAMERA CONN)

3 TPs per Fan

NO_TEST

FUNC_TEST

J9000 (LVDS CONN)

NC NO_TESTs

NO_TEST

CPU NO_TESTs

NO_TEST

3 TPs

6 TPs

NO_TEST

ICT Test Points

FUNC_TEST

PCH ALIASES

5 TPs

FUNC_TEST

5 TPs

J4500 (SATA ODD CONN)

J4501 (SATA HDD CONN)

4 TPs

J5713 (KEY BOARD CONN)

2 TPs

J5815 (KBD BACKLIGHT CONN)

J5660 (RIGHT FAN CONN)

J6780 (MIC CONN)

USB PORTS

I1000 I1001 I1002

I1003

I1004

I1005

I1006

I1007

I1008

I1009

I1010 I1011 I1012

I1013

I1014

I1015 I1016 I1017 I1018 I1019 I1020

I1021

I1022

I1024

I1025

I1026

I1027

I1028

I1029

I1031

I1032

I1033

I1034

I1035

I1038 I1039 I1040

I1042 I1043 I1044

I1050

I1051

I1052

I1053

I1054

I1055

I1056

I1057

I1058

I1059

I1060

I1061

I1062

I1063

I1064

I1065

I1066

I1086

I1088

I1089

I1090

I1092 I1093 I1094

I1095 I1096

I1097

I1098

I1099 I1100 I1101

I1102

I1103

I1104 I1105

I1106

I1107

I1108 I1109 I1110 I1111 I1112 I1113 I1114 I1115

I1116

I1117

I1118 I1119 I1120

I1121

I1122

I1123 I1124 I1125

I1126

I1127

I1128 I1129 I1130

I1131 I1132

I1134

I1135

I1136

I1137

I1140

I1141

I1142

I1143

I1145 I1146

I1149

I1150

I1151 I1152

I1156 I1160 I1161

I1273

I1288

I1292

I1297

I1436 I1437

I1438 I1439

I1440

I1441 I1442

I1443

I1464

I1477

I1478 I1479

I1480

I1481

I1482

I1483

I1484

I1485

I1486

I1487

I1488

I1489

I1490

I1491

I1492

I1493

I1494

I1495

I1496

I1497

I1498

I1508

I1509

I1510

I1513

I1514 I1515

I1516

I1517 I1518

I1519 I1520

I1521

I1522

I1523

I1524

I1525 I1526

I1527 I1528

I1529

I1530

I1531

I1532

I1533

I1534

I1535

I1536

I1537

I1539

I1540

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SYNC_MASTER=K18_MLB

Functional / ICT Test

SYNC_DATE=04/27/2010

TRUE

PP3V3_S0

TRUE

PP5V_S0

TRUE

PP3V3_S0

TRUE

PP5V_S0

PP1V8_S0

TRUE

MEM_A_SA<1..0>

TRUE

MEM_A_DQS_N<7..0> MEM_A_DQS_P<7..0>

TRUE

FB_A0_DQ<31..0>

TRUE

FB_A0_WCLK_P<1..0>

FB_B1_DBI_L<3..0>

TRUE

FB_B1_WCLK_P<1..0>

FB_A0_A<8..0>

TRUE

FB_A0_EDC<3..0>

TRUE

FB_A0_DBI_L<3..0>

TRUE

FB_A1_DQ<31..0>

TRUE

FB_A1_ABI_L

TRUE

FB_A0_ABI_L

TRUE

FB_B1_WCLK_N<1..0>

TRUE

FB_B1_A<8..0>

TRUE

FB_B0_DBI_L<3..0>

TRUE

FB_B1_ABI_L

TRUE

FB_A0_WCLK_N<1..0>

TRUE

MAKE_BASE=TRUE

NC_SATA_E_R2D_CN

TRUE

MEM_B_A<15..0>

MAKE_BASE=TRUE

TRUE

NC_SMC_P41

PP3V3_S0GPU

TRUE

Z2_CLKIN

TRUE

PP0V75_S0_DDRVTT

TRUE

SMC_LID_R

TRUE

SPI_ALT_CS_L

TRUE

SPI_ALT_MISO

NC_SATA_D_R2D_CN

MAKE_BASE=TRUE

NC_SATA_D_R2D_CP

TRUE

TRUE MAKE_BASE=TRUE

NC_SATA_E_D2RP

TRUE

FB_B0_ABI_L

TRUE

FB_B0_DQ<31..0>

TRUE

MEM_A_CS_L<1..0>

MEM_A_CLK_P<1..0>

TRUE

MEM_A_CKE<1..0>

NC_LVDS_EG_BKL_PWM

MEM_A_BA<2..0>

TRUE

MEM_A_CLK_N<1..0>

TRUE

MEM_A_ODT<1..0>

TRUE

MAKE_BASE=TRUE

TRUE

NC_PCIE_CLK100M_PE4P

TP_LVDS_IG_BKL_PWM

NC_SMC_BS_ALRT_L

TRUE

MEM_B_SA<1..0>

NC_LVDS_IG_CTRL_CLK

NC_CRT_IG_VSYNC

NC_CRT_IG_DDC_CLK

TRUE

SMC_NMI

TRUE

WS_KBD7

TP_LVDS_IG_B_CLKP

TRUE

MEM_B_DQS_N<7..0>

TRUE

MEM_B_DQ<63..0>

TRUE

MEM_B_ODT<1..0>

MAKE_BASE=TRUE

TRUE

NC_PCIE_CLK100M_PE7P

MAKE_BASE=TRUE

NC_LVDS_IG_BKL_PWM

TRUE

MEM_B_CKE<1..0>

TRUE

NC_SMC_BS_ALRT_L

TRUE

MAKE_BASE=TRUE

NC_LVDS_IG_B_CLKN

TRUE

MAKE_BASE=TRUE

TRUE

NC_LVDS_EG_BKL_PWM

MEM_B_BA<2..0>

TRUE

MEM_B_RAS_L

TRUE

MEM_B_CAS_L

TRUE

MEM_B_WE_L

NC_PCIE_CLK100M_PE6N

NC_PCIE_CLK100M_PE5P

NC_PCIE_CLK100M_PE5N

MAKE_BASE=TRUE

NC_PCIE_CLK100M_PE6N

TRUE

NC_PCIE_CLK100M_PE6P

TRUE MAKE_BASE=TRUE

NC_PSOC_P1_3

TRUE

MAKE_BASE=TRUE

NC_SATA_B_D2RN

TRUE MAKE_BASE=TRUE

NC_SATA_B_D2RP

NC_GPU_MIOA_DE

MAKE_BASE=TRUE

TRUE

NC_GPU_GSTATE<1>

MAKE_BASE=TRUE

TRUE

NC_SDVO_INTP

LPC_FRAME_L

TRUE

LPC_AD<0..3>

TRUE

TP_ISSP_SCLK_P1_1

TRUE

BKLT_EN

TRUE

BI_MIC_P

BI_MIC_N

TRUE

FAN_RT_PWM

TRUE

FAN_RT_TACH

FAN_LT_TACH

TRUE

SMBUS_SMC_BSA_SCL

TRUE

SMBUS_SMC_A_S3_SCL

TRUE

PSOC_SCLK

PP18V5_S4

TRUE

USB_LT2_N

TRUE

PP3V3_S3

TRUE

USB2_LT1_P

TRUE

PP3V42_G3H

TRUE

WS_KBD1

TRUE

WS_KBD2

TRUE

WS_KBD3

TRUE

WS_KBD4

TRUE

WS_KBD6

WS_KBD11

TRUE

WS_KBD8

TRUE

WS_KBD15_CAP

TRUE

SATA_HDD_D2R_C_N

TRUE

SPKRCONN_S_OUT_N

SMBUS_SMC_A_S3_SDA

TRUE

SATA_ODD_D2R_UF_P SATA_ODD_D2R_UF_N

TRUE

PP5V_S0_HDD_FLT

SATA_ODD_R2D_N

TRUE

SATA_ODD_D2R_C_N

TRUE TRUE

SATA_ODD_R2D_P

SATA_ODD_D2R_C_P

TRUE

SMC_ODD_DETECT

PP5V_SW_ODD

TRUE

SATA_HDD_R2D_N

TRUE

SATA_HDD_D2R_C_P

TRUE

SPKRCONN_R_OUT_N

TRUE

USB_LT2_P

NC_LPC_DREQ0_L

MAKE_BASE=TRUE

TP_GPU_GSTATE<0>

TP_GPU_MIOA_D<9..0>

TP_CPU_RSVD<2..1>

TRUE

MAKE_BASE=TRUE

NC_SATA_E_R2D_CP

NC_LPC_DREQ0_L

NC_HDA_SDIN2

TRUE MAKE_BASE=TRUE

TP_CPU_RSVD<65..62>

TP_CPU_RSVD<27..26>

TRUE

SMC_TCK

SMC_RX_L

TRUE

SMC_TDO

TRUE

SMC_TMS

TRUE

SMC_TRST_L

TRUE

NC_PCH_LVDS_VBG

TRUE MAKE_BASE=TRUE

NC_CRT_IG_HSYNC

TRUE MAKE_BASE=TRUE

NC_CRT_IG_HSYNC

NC_CRT_IG_RED

TP_ISSP_SDATA_P1_0

TRUE

SMC_ONOFF_L

TRUE

SMC_MD1

TRUE

SPKRCONN_L_OUT_P

TRUE

SPKRCONN_R_OUT_P

TRUE

SPKRCONN_S_OUT_P

SPKRCONN_L_OUT_N

TRUE

PP5V_S5

LVDS_CONN_A_DATA_N<2>

TRUE

LVDS_CONN_A_CLK_F_P

TRUE

LVDS_CONN_A_CLK_F_N

TRUE

LVDS_CONN_B_DATA_P<1>

TRUE

LVDS_CONN_B_DATA_N<1>

TRUE

PP3V42_G3H

TRUE

LVDS_CONN_A_DATA_N<0>

TRUE

NC_SMC_FAN_3_TACH NC_SMC_FAN_3_CTL

TRUE

NC_FW643_AVREG

MAKE_BASE=TRUE

TRUE

NC_TP_CPU_RSVD<65..62>

NC_TP_CPU_RSVD<43..32>

MAKE_BASE=TRUE

TRUE

TRUE MAKE_BASE=TRUE

NC_CRT_IG_GREEN

TRUE MAKE_BASE=TRUE

NC_CRT_IG_DDC_CLK

MAKE_BASE=TRUE

NC_SDVO_INTP

TRUE

NC_SDVO_STALLN

TRUE MAKE_BASE=TRUE

TP_DP_IG_D_MLP<3..0>

NC_DP_IG_D_CTRL_DATA

MAKE_BASE=TRUE

NC_DP_IG_D_CTRL_DATA

TRUE

NC_DP_IG_C_MLP<3..0>

MAKE_BASE=TRUE

TRUE

NC_DP_IG_C_CTRL_DATA

TRUE MAKE_BASE=TRUE

NC_FW643_AVREG

MAKE_BASE=TRUE

TRUE

NC_ESTARLDO_EN

TRUE

NC_FW2_TPAN

NC_FW2_TPAP

TRUE

NC_FW2_TPBIAS

TRUE

NC_FW2_TPBP

TRUE TRUE

NC_FW2_TPBN

TRUE

NC_SMC_FAN_2_CTL

TRUE

NC_SMC_FAN_2_TACH

TRUE

SMC_KDBLED_PRESENT_L

KBDLED_ANODE

TRUE

PPVOUT_S0_LCDBKLT

TRUE

NC_SMC_BS_ALRT_L

LPCPLUS_RESET_L

TRUE

LPC_CLK33M_LPCPLUS

TRUE

LPC_SERIRQ PM_CLKRUN_L

TRUE

PP3V3_SW_LCD

TRUE

LVDS_CONN_B_DATA_N<2>

TRUE

TP_CPU_RSVD<58..45> TP_CPU_RSVD<43..32>

TP_CPU_RSVD<24..15>

LCD_BKLT_PWM

TRUE

LED_RETURN_6

TRUE

LED_RETURN_4

TRUE

LVDS_CONN_B_CLK_F_N

TRUE

LVDS_CONN_B_CLK_F_P

LVDS_CONN_B_DATA_P<2>

TRUE

LVDS_CONN_A_DATA_P<2>

TRUE

LVDS_CONN_A_DATA_N<1>

TRUE

LVDS_DDC_DATA

TRUE

LED_RETURN_5

TRUE

LPCPLUS_GPIO

TRUE

PP18V5_DCIN_FUSE

TRUE

MAKE_BASE=TRUE

NC_TP_CPU_RSVD<58..45>

LVDS_DDC_CLK

TRUE

LED_RETURN_3

TRUE

WS_KBD5

NC_CRT_IG_GREEN

NC_CRT_IG_DDC_DATA

TP_CPU_RSVD_NCTF<8..5>

LVDS_CONN_A_DATA_P<0>

TRUE

SATA_HDD_R2D_P

PP3V3_S5_AVREF_SMC

TRUE

USB2_LT1_N

TRUE

WS_KBD13

SMC_RESET_L

TRUE

WS_KBD16_NUM

TRUE

LPC_PWRDWN_L

TRUE

SMC_TDI

MAKE_BASE=TRUE

TRUE

NC_TP_CPU_RSVD<2..1>

WS_KBD10

TRUE

NC_CLINK_CLK

TRUE

MAKE_BASE=TRUE

TRUE

NC_CLINK_DATA NC_CLINK_RESET_L

MAKE_BASE=TRUE

TRUE

NC_PCIE_CLK100M_PEBP

TP_DP_IG_C_MLP<3..0>

MAKE_BASE=TRUE

TRUE

NC_TP_CPU_RSVD<24..15>

TRUE

MAKE_BASE=TRUE

NC_TP_CPU_RSVD<27..26>

TRUE MAKE_BASE=TRUE

NC_CRT_IG_BLUE

MAKE_BASE=TRUE

TRUE

NC_CRT_IG_RED

NC_SATA_F_D2RN

TRUE

NC_CRT_IG_VSYNC

MAKE_BASE=TRUE

NC_DP_IG_C_AUXP

TRUE MAKE_BASE=TRUE

NC_DP_IG_C_CTRL_DATA

NC_DP_IG_C_CTRL_CLK

NC_DP_IG_C_HPD

NC_FW643_TDI

TRUE

MAKE_BASE=TRUE

NC_TP_CPU_RSVD_NCTF<8..5>

NC_SDVO_TVCLKINN NC_SDVO_TVCLKINP

NC_SDVO_STALLN NC_SDVO_STALLP

NC_CLINK_DATA NC_CLINK_RESET_L

MAKE_BASE=TRUE

TRUE

NC_PCIE_CLK100M_PEBN

NC_GPU_MIOA_DE

NC_SDVO_TVCLKINN

TRUE MAKE_BASE=TRUE

NC_DP_IG_C_AUXN

TRUE MAKE_BASE=TRUE

NC_DP_IG_C_MLN<3..0>

TRUE MAKE_BASE=TRUE

NC_ALS_GAIN

TRUE

NC_FW0_TPAP

TRUE

NC_FW0_TPBP

TRUE TRUE

NC_FW0_TPBN

MAKE_BASE=TRUE

NC_FW643_TDI

TRUE

NC_DP_IG_C_HPD

TRUE MAKE_BASE=TRUE

NC_DP_IG_C_CTRL_CLK

MAKE_BASE=TRUE

TRUE

NC_DP_IG_D_CTRL_CLK

TRUE MAKE_BASE=TRUE

NC_DP_IG_D_AUXN

NC_SATA_E_R2D_CN

TRUE

WS_KBD9

WS_LEFT_OPTION_KBD

TRUE

NC_PCH_LVDS_VBG

TRUE

FAN_LT_PWM

PP5V_S3_ALSCAMERA_F

TRUE

PP3V3_WLAN

TRUE

WS_KBD12

TRUE

WS_KBD14

TRUE

WS_KBD17

TRUE

WS_KBD19

WS_KBD23

TRUE

PP5V_S3_RTUSB_B_F

PCIE_AP_D2R_N

TRUE

PP3V3_FW_FWPHY

SMBUS_SMC_A_S3_SCL

TRUE

PSOC_MOSI

TRUE

WS_CONTROL_KBD

TRUE

LVDS_CONN_A_DATA_P<1>

TRUE

LVDS_CONN_B_DATA_P<0>

TRUE

LVDS_CONN_B_DATA_N<0>

TRUE

Z2_DEBUG3

TRUE

LED_RETURN_1

TRUE

LED_RETURN_2

TRUE

PCIE_AP_R2D_N

TRUE

PCIE_AP_R2D_P

WIFI_EVENT_L

TRUE

AP_CLKREQ_Q_L

TRUE

PCIE_CLK100M_AP_CONN_P PCIE_CLK100M_AP_CONN_N

TRUE

PCIE_WAKE_L

TRUE

SYS_DETECT_L

TRUE

AP_RESET_CONN_L

TRUE

SMBUS_SMC_A_S3_SDA

TRUE

PP5V_S3_IR_R

TRUE

PP5V_S3_RTUSB_A_F

NC_DP_IG_D_AUXN

MAKE_BASE=TRUE

TRUE

NC_DP_IG_D_AUXP

TRUE MAKE_BASE=TRUE

NC_DP_IG_D_CTRL_CLK

MAKE_BASE=TRUE

TRUE

NC_CRT_IG_DDC_DATA

NC_CRT_IG_BLUE

PM_SYSRST_L

TRUE

MAKE_BASE=TRUE

NC_GPU_GSTATE<0>

TRUE

NC_SDVO_INTN

NC_DP_IG_D_HPD

NC_DP_IG_C_AUXN

NC_DP_IG_C_AUXP

TP_DP_IG_C_MLN<3..0>

NC_DP_IG_D_HPD

TRUE MAKE_BASE=TRUE

NC_DP_IG_D_MLN<3..0>

MAKE_BASE=TRUE

TRUE

MAKE_BASE=TRUE

NC_SDVO_TVCLKINP

TRUE

NC_SDVO_STALLP

MAKE_BASE=TRUE

TRUE

NC_GPU_MIOA_D<9..0>

MAKE_BASE=TRUE

TRUE

NC_GPU_BUFRST_L

MAKE_BASE=TRUE

TRUE

TRUE MAKE_BASE=TRUE

NC_SDVO_INTN

TRUE

NC_DP_IG_D_MLP<3..0>

MAKE_BASE=TRUE

TP_DP_IG_D_MLN<3..0> NC_DP_IG_D_AUXP

TRUE

NC_HDA_SDIN3

MAKE_BASE=TRUE

NC_LVDS_IG_B_CLKP

MAKE_BASE=TRUE

TRUE

TP_LVDS_IG_B_CLKN

NC_GPU_BUFRST_L

TRUE

NC_SATA_F_D2RN

MAKE_BASE=TRUE

NC_SATA_F_D2RP

TRUE

SYS_LED_ANODE_R

TRUE

SPI_ALT_MOSI

TRUE

WS_KBD20

TRUE

WS_KBD21

TRUE

WS_KBD22

WS_LEFT_SHIFT_KBD

TRUE

CONN_USB2_BT_N

TRUE

USB_CAMERA_CONN_N

TRUE

USB_CAMERA_CONN_P

TRUE

PP1V0_FW_FWPHY

TRUE

PP18V5_S3

TRUE

SYS_LED_ANODE

TRUE

IR_RX_OUT

TRUE

NC_HDA_SDIN1

PP1V05_S0

TRUE

T29_D2R_P<1..0>

TRUE

PM_SLP_S3_L

TRUE

T29_D2R_N<1..0>

TRUE

PP1V05_S0GPU

TRUE

T29_D2R_C_N<1..0>

TRUE

T29DPA_ML_P<3..0>

TRUE

SPI_ALT_CLK

WS_KBD_ONOFF_L

TRUE

NC_PCIE_CLK100M_PE4P

NC_PCIE_CLK100M_PE4N

PP1V05_S5

TRUE

DP_T29SNK0_AUXCH_N

DP_T29SNK0_ML_C_P<3..0>

TRUE

DP_T29SNK0_ML_N<3..0>

TRUE

BI_MIC_SHIELD

TRUE

CONN_USB2_BT_P

SMBUS_SMC_0_S0_SCL

TRUE TRUE

SMBUS_SMC_0_S0_SDA

Z2_BOOST_EN

TRUE

PP1V8R1V55_S0GPU_ISNS

TRUE

DP_T29SNK0_AUXCH_C_P

TRUE

T29DPA_ML_N<3..0>

DP_T29SNK1_ML_P<3..0>

TRUE

NC_PCIE_CLK100M_PE7N NC_PCIE_CLK100M_PE7N

TRUE MAKE_BASE=TRUE

TRUE

MAKE_BASE=TRUE

NC_SATA_B_R2D_CN

MAKE_BASE=TRUE

TRUE

NC_SATA_B_R2D_CP

TRUE

FB_A1_A<8..0>

FB_A1_EDC<3..0>

TRUE

FB_A1_WCLK_N<1..0>

TRUE

FB_B1_EDC<3..0>

TRUE

FB_B1_DQ<31..0>

TRUE

FB_B0_WCLK_P<1..0>

TRUE

FB_B0_WCLK_N<1..0>

TRUE

FB_B0_EDC<3..0>

TRUE

FB_B0_A<8..0>

TRUE

MEM_B_DQS_P<7..0>

TRUE

MEM_B_CS_L<1..0>

TRUE

MEM_B_CLK_P<1..0>

MEM_B_CLK_N<1..0>

TRUE

MEM_A_DQ<63..0>

TRUE

MEM_A_A<15..0>

TRUE

MEM_A_CAS_L

TRUE

MEM_A_RAS_L

TRUE

MEM_A_WE_L

TRUE

FB_A1_WCLK_P<1..0> FB_A1_DBI_L<3..0>

TRUE

MAKE_BASE=TRUE

TRUE

NC_SATA_F_D2RP

MAKE_BASE=TRUE

NC_SATA_F_R2D_CN

TRUE

MAKE_BASE=TRUE

TRUE

NC_SATA_F_R2D_CP

TRUE

WS_KBD18

TRUE

T29_R2D_C_P<1..0>

T29_R2D_P<1..0>

TRUE

DP_T29SNK0_AUXCH_C_N

DP_T29SNK0_ML_C_N<3..0>

TRUE

DP_T29SNK0_ML_P<3..0>

TRUE

PPVCORE_GPU

TRUE

PPDCIN_G3H

TRUE

DP_T29SNK1_ML_C_P<3..0>

PSOC_MISO

TRUE

MAKE_BASE=TRUE

TRUE

NC_SATA_D_D2RN

MAKE_BASE=TRUE

TRUE

NC_SATA_D_D2RP

NC_PSOC_P1_3 NC_SATA_B_D2RN NC_SATA_B_D2RP NC_SATA_B_R2D_CN NC_SATA_B_R2D_CP

DP_T29SNK1_AUXCH_P

TRUE

DP_T29SNK1_AUXCH_C_N

TRUE

DP_T29SNK1_AUXCH_C_P

DP_T29SNK1_AUXCH_N

TRUE

DP_T29SNK1_ML_C_N<3..0>

TRUE

PP3V3_S3

TRUE

PP3V3_S5

TRUE

PP1V8R1V55_S0GPU_ISNS_R

TRUE

DP_SDRVA_ML_C_P<2>

TRUE

DP_SDRVA_ML_N<2>

TRUE

DP_SDRVA_ML_P<2>

TRUE

DP_SDRVA_ML_N<0>

TP_DP_T29SRC_AUXCH_CN

TRUE

TP_DP_T29SRC_AUXCH_CP

TRUE

TP_DP_T29SRC_ML_CN<3..0>

TRUE

TP_DP_T29SRC_ML_CP<3..0>

TRUE

DP_SDRVA_ML_C_N<0>

TRUE

DP_SDRVA_ML_C_P<0>

TRUE

PP3V42_G3H

TRUE

PPBUS_G3H

TRUE

DP_SDRVA_ML_P<0>

DP_SDRVA_ML_C_N<2>

TRUE

PPVCORE_S0_GFX

TRUE

TP_T29_PCIE_RESET0_L TP_T29_PCIE_RESET1_L

TRUE

SMC_TX_L

TRUE TRUE

SPIROM_USE_MLB

T29_D2R_C_P<1..0>

TRUE

T29_R2D_N<1..0>

TRUE

PP1V8_GPUIFPX

TRUE

PP3V3_ENET

Z2_KEY_ACT_L

TRUE

PP5V_S3

PICKB_L

TRUE

PSOC_F_CS_L

TRUE

Z2_RESET

TRUE

Z2_MOSI

TRUE

PPVTTDDR_S3

TRUE

TP_FW643_VAUX_ENABLE

PCIE_AP_D2R_P

TRUE

T29_R2D_C_N<1..0>

TRUE

NC_SATA_D_D2RN

NC_SATA_D_R2D_CP

NC_SATA_E_D2RP

PPVP_FW

TRUE

PPVCORE_S0_CPU

Z2_SCLK

TRUE

Z2_MISO

TRUE

Z2_CS_L

TRUE

Z2_HOST_INTN

TRUE

PPVBAT_G3H_CONN

TRUE

TP_FW643_VBUF

TRUE

TP_SMC_P24

TRUE

NC_CLINK_CLK

FDI_LSYNC<1..0>

TRUE

TP_USB_HUB1_PRTPWR1

TRUE

FDI_INT

TRUE

FDI_FSYNC<1..0>

FDI_DATA_P<1>

TRUE

TP_USB_HUB1_OCS1

TRUE

TP_USB_HUB2_PRTPWR1

TRUE

TP_FW643_TDO

TRUE

TP_FW643_TMS

TRUE

MAKE_BASE=TRUE

NC_SATA_E_D2RN

TRUE

MAKE_BASE=TRUE

NC_SATA_D_R2D_CN

MAKE_BASE=TRUE

TRUE

NC_PCI_PME_LNC_PCI_PME_L

MAKE_BASE=TRUE

NC_PCI_CLK33M_OUT3

TRUE

NC_PCI_CLK33M_OUT3

NC_PCIE_CLK100M_PE5P

MAKE_BASE=TRUE

TRUE

NC_PCIE_CLK100M_PE7P

DP_T29SNK1_ML_N<3..0>

TRUE

PP1V5_S3RS0

TRUE

PP1V5_S3

TRUE

PP1V2_S0

TRUE

PP1V2_ENET

TRUE

ADAPTER_SENSE

TRUE

SMBUS_SMC_BSA_SDA

SMC_BIL_BUTTON_L

TRUE

SMBUS_SMC_BSA_SCL

TRUE

SMBUS_SMC_BSA_SDA

TRUE

NC_PCIE_CLK100M_PE6P

NC_GPU_GSTATE<1>

TRUE MAKE_BASE=TRUE

NC_PCIE_CLK100M_PE4N

MAKE_BASE=TRUE

NC_PCIE_CLK100M_PE5N

TRUE

T29DPA_D2R1_AUXCH_P

TP_USB_HUB2_OCS1

TRUE

TP_SMC_PF5

TRUE

TP_DC_TEST_A62

TRUE

TP_DC_TEST_D65

TP_FW643_TCK

TRUE

DC_TEST_BH3_BJ2

DC_TEST_BH1_BG2

TRUE

NC_SATA_F_R2D_CP

TRUE

TP_SMC_P10

TRUE

TP_P7_7

TRUE

TP_PSOC_SCL TP_PSOC_SDA

TRUE

TP_FW643_SE

TRUE

TP_FW643_SDA

TRUE

TP_FW643_JASI_EN

TRUE

TP_FW643_FW620_L

TRUE

TP_FW643_CE

TRUE

TP_FW643_SM

TRUE

TP_FW643_OCR10_CTL

TRUE

TP_FW643_NAND_TREE

TRUE

TP_FW643_SCIFMC

TRUE

TP_FW643_SCIFDOUT

TRUE

TP_FW643_SCIFDAIN

TRUE

TP_FW643_SCIFCLK

TRUE

DMI_S2N_N<1>

TRUE

FDI_DATA_N<1>

TRUE

DMI_S2N_P<1>

NC_HDA_SDIN1

TRUE MAKE_BASE=TRUE

MAKE_BASE=TRUE

TRUE

NC_LVDS_IG_CTRL_CLK

NC_HDA_SDIN2

NC_LVDS_IG_CTRL_DATA NC_LVDS_IG_CTRL_DATA

TRUE MAKE_BASE=TRUE

NC_HDA_SDIN3

TP_AUD_GPIO_2

TRUE TRUE

TP_AUD_GPIO_1 TP_AUD_LO1_L_N

TRUE TRUE

TP_AUD_LO1_L_P

TRUE

TP_SPI_DESCRIPTOR_OVERRIDE_L

TP_BKL_FAULT

TRUE

CPUIMVP_BOOT1

TP_XDPPCH_HOOK2

TRUE TRUE

TP_XDPPCH_HOOK3

TRUE

TP_GMUX_PL6B PM_RSMRST_L

TRUE

CPUIMVP_BOOT2

DP_T29SNK0_AUXCH_P

TRUE

CPUIMVP_UGATE2

TRUE

TP_1V05_S0_PCH_VCCAPLLEXP

TRUE

T29_D2R1_BIAS

TRUE

T29DPA_D2R1_AUXCH_N

TRUE

TP_T29_PCIE_RESET3_L

TRUE

TP_T29_PCIE_RESET2_L

TRUE

NC_PCIE_CLK100M_PEBP

MAKE_BASE=TRUE

NC_PCIE_CLK100M_PEBN

TP_SMC_P41

NC_SATA_E_R2D_CP

NC_SATA_E_D2RN

NC_SATA_D_D2RP

NC_SATA_F_R2D_CN

TRUE

GND

TRUE

GND

TRUE

GND

TRUE

GND

TRUE

GND

TRUE

GND

TRUE

GND

TRUE

GND

TRUE

GND

TRUE

GND

TRUE

7 OF 132 6 OF 101

6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83

84 87 88 89 98

6 7 8

22 41

46 51 53 64

67 68 69 71

72 86 88

101

6 7 8

22 41

46 51 53 64 67 68 69 71 72 86 88

101

6 7

12 16

17 18 19

20 22 23

25 26 28

32 35 36

39 40 41

45 47 48

49 50 51

53 56 60

61 71 72

79 82 83

84 87 88

89 98

6 7 8

22

41 46 51

53 64 67

68 69 71

72 86 88

101

7

14 17 20

22 25 70

71 87

26

11 26

27

91

11 26

27

91

75 76 97

75 76

97

75 77 97

75 77

97

75 76 97

75

77

97

75 77 97

6

16

11 28 91

52 53

7

26

28 29

66

62

46

6

16

6

16

6

16

75 77 97

11 26 91

11 26

91

11 26 91

6

11 26 91

6

8

18

6

28

6

18

6

17

6

17

44 46

52

8

18

11 27 28 91

11 28 91

6

19

11 28 91

6

11 28 91

6

19

6

16

6

16

6

52

6

17

16 44 46 87 93

8

52

60 61

51

6

44 47 62 63 96

6

31 44 47 53 54 96

52 53

53

42 98

6 7 8

18 19

24 25 29 30

31 32 47 48

49 53 54 71

72 87

42 98

6 7

25 42 44 45 46 47 52 62 63 72

52

41 92

59 60 98

6

31 44 47 53 54 96

41 92

41

41 92

41

41 92

41

41 44

41

41 92

59 60 98

42 98

6

16

6

16

6 16

6

16

44 45 46

42 44 45 46

44 45 46

44 46

6

18

6

17

6

17

6

17

8

52

44 45 52

44 46

59 60 98

7

53 65 71

82 83 97

82 97

82 83 97

6 7

25 42 44 45 46 47 52

62 63 72

82 83 97

44 45

6

38

6

17

6

17

6

17

6

17

6

17

6

17

6

17

6

38

38 40

44 45

53

8 82 88

100

6

25 46 87 93

25 46 93

16 44 46

17 44 46

82

82 83 97

87 88

82 88

82 97

82 83 97

82 83

82 88

19 46

62

82 83

82 88

52

6

17

6

17

82 83 97

41 92

44 45

42 98

52

44 45 46 63

52

17 44 46

44 45 46

52

6

16

6

16

6

16

6

16

6

17

6

17

6

16

6

17

6

17

6

17

6

17

6

17

6

38

6

17

6

17

6

17

6

17

6

16

6

16

6

16

6

17

6

17

38 40 94

6

38

6

17

6

17

6

17

6

17

6

16

52

6

18

51

31

31 45

52

42

16 31 93

6

31 44 47 53 54 96

52 53

52

82 83 97

52 53

82 88

31 93

31 44 45

31

31 98

17 25 31 84

62

31

6

31 44 47 53 54 96

41

42

6

17

6

17

6

17

6

17

6

17

17 25 44

6

17

6

17

6

17

6

17

6

17

6

17

6

17

6

17

6

17

6

16

8

18

6

16

6

16

41

46

52

98

31 92

7

38 39

41 45

41 43

6 16

7 9

10 12

13 14 16

17 20 22

23 35 39

44 67 69

72

101

33 84 95

17 29 44

72

33 84 95

84 85 95

46 52

6

33 95

33 78 95

33 95

60 61

98

31 44 47 50 79 96

53

33 78 95

84 85 95

33 95

6

19

6

75 76 97

75 76

97

75 77

97

75 77 97

75 77

97

75

77

97

75 77

97

75 77 97

11 27 28 91

11 28 91

11 26 27

91

11 26 91

75 76

97 75 76 97

6

16

6

16

6

16

52

33 84 95

84 95

33 78 95

33 95

7

48 74 81

7

48 62 63

33 78 95

52 53

6

16

6

16

6

52

6

33 95

33 78 95

33 95

33 78 95

84 95

33

84 95

6 7

25 42 44

45

46 47

52 62 63 72

7 8

35 39

48 49 62

63 88

84 95

33

42 44 45 46

19 46 55

84 85 95

84 95

7

71

100

52 53

7

30 66

38

16 31 93

33 84 95

6

16

6

16

6

16

7

39 40

7

12 14 48

68

101

52 53

62 63

38

44 45

6

16

9 17

90

24

9 17 90

9

17

90

24

38

6

16

6

16

6

18

6 18

6

18

6

19

33 95

98

7

26 28 29

66 71

7

70 87

7

36 70

62

6

44 47 62 63 96

44 45 62

6

44 47 62 63 96

6

44 47 62 63 96

6

19

6

85 95

24

44 45

12

38

12

6

16

44 45

52

38

9 17

90

9 17

90

6

16

6

18

6

16

6

18

6

18

6

16

56

44

88

67 68

23

87

17 72

67 68

33 95

67 68

20

85 95

33

6

16

6

16

44 45

6

16

6

16

6

16

6

16

www.rosefix.com

www.vinafix.vn

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

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PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

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345678

D

B

8 7 5 4 2 1

3.3V Rails

Chipset "VCore" Rails

5V Rails

FireWire Rails

"GPU" Rails

Backlight Rails

ENET Rails

1.8V/1.5V/1.2V/1.05V Rails

2A max supply

T29 Rails

For PCH RTC Power

G3H Rails

Power Aliases

SYNC_DATE=04/27/2010

SYNC_MASTER=K18_MLB

PP3V3_S0

MIN_NECK_WIDTH=0.075 mm

VOLTAGE=3.3V MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.5 MM

PP3V3_S0

PP3V3_S0 PP3V3_S0

PP3V3_S0

MIN_NECK_WIDTH=0.2 MM MAKE_BASE=TRUE

VOLTAGE=3.3V

MIN_LINE_WIDTH=0.4 MM

PP3V3_T29

PP1V05_T29

VOLTAGE=15V MAKE_BASE=TRUE

PP15V_T29

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

PP1V05_T29

VOLTAGE=1.05V MAKE_BASE=TRUE

PP3V3_T29

PP15V_T29

PP5V_S0 PP5V_S0

PP15V_T29

PP3V3_S0

PP3V3_S0 PP3V3_S0

PP3V3_S0

PP1V05_T29

PP3V3_T29

MAKE_BASE=TRUE

PP5V_S0

VOLTAGE=5V

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM

PP3V3_S0

MAKE_BASE=TRUE

VOLTAGE=3.3V

MIN_LINE_WIDTH=0.50MM

PP3V3_S3

MIN_NECK_WIDTH=0.20MM

PP3V3_S3

PP3V3_S0

PP3V3_S0 PP3V3_S0 PP3V3_S0

PP3V3_S0

PP3V3_S0 PP3V3_S0

PP3V3_S0

PP3V3_S4

PP3V3_S5

MIN_LINE_WIDTH=0.3 MM VOLTAGE=0.75V

MAKE_BASE=TRUE

PPVTTDDR_S3

MIN_NECK_WIDTH=0.2 MM

PP3V3_S5

PP5V_S0 PP5V_S0

PP5V_S0

MAKE_BASE=TRUE

VOLTAGE=3.3V

PP3V3_S4

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.6 MM

PP3V3_S4

PP3V3_SUS PP3V3_SUS

PP3V3_SUS

PP5V_S3

PP3V3_S0

PP1V05_SUS

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM VOLTAGE=1.05V

MAKE_BASE=TRUE

PPVIN_S5_HS_OTHER_ISNS

PPVIN_S5_HS_COMPUTING_ISNS

PPBUS_G3H

PP3V3_S0

PP3V3_S0 PP3V3_S0

PP3V3_S0

PPVIN_S5_HS_GPU_ISNS

MIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.6 mm

VOLTAGE=12.8V MAKE_BASE=TRUE

PPVIN_S5_HS_OTHER_ISNS

PPDCIN_G3H

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

VOLTAGE=1.0V MAKE_BASE=TRUE

PP1V0_FW_FWPHY

PP3V3_FW_FWPHY

PP1V0_FW_FWPHY

PP3V3_ENET

PPVIN_S5_HS_OTHER_ISNS

MIN_LINE_WIDTH=0.6 MM

PPDCIN_G3H

MIN_NECK_WIDTH=0.25 MM

MAKE_BASE=TRUE

VOLTAGE=18.5V

PP3V3_S5

PP3V3_S5 PP3V3_S5

PP3V3_S5

PP5V_S3

PP5V_S0

PP3V3_SUS

PP3V3_S4

PP1V05_S0

PP1V05_SUS

PPBUS_G3H

PPBUS_G3H PPBUS_G3H

PPBUS_G3H

PPVIN_S5_HS_COMPUTING_ISNS

MIN_LINE_WIDTH=0.6 mm

MAKE_BASE=TRUE

VOLTAGE=12.8V

MIN_NECK_WIDTH=0.25 mm

PPVIN_S5_HS_COMPUTING_ISNS

PPDCIN_G3H

PPVIN_S5_HS_COMPUTING_ISNS PPVIN_S5_HS_COMPUTING_ISNS

MIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=0.6 mm

MAKE_BASE=TRUE

VOLTAGE=12.8V

PPVIN_S5_HS_GPU_ISNS

PPVIN_S5_HS_COMPUTING_ISNS

PPVIN_S5_HS_GPU_ISNS

PPVIN_S5_HS_COMPUTING_ISNS

PPVIN_S5_HS_GPU_ISNS

VOLTAGE=3.42V MAKE_BASE=TRUE

PPVRTC_G3H

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.3 MM

VOLTAGE=5V MAKE_BASE=TRUE

PP5V_S5

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.5 MM

PP5V_S0

PP1V05_S0

PP1V2_S0

MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.2V MAKE_BASE=TRUE

PP5V_S0

PP1V05_S0

PP5V_S0

PP1V8_S0

PP1V8_S0 PP1V8_S0

PP1V8_S0

PPVCCSA_S0_REG

MIN_LINE_WIDTH=0.6 MM VOLTAGE=1.5V

MAKE_BASE=TRUE

PP1V8_S0

MIN_NECK_WIDTH=0.2 MM

MAKE_BASE=TRUE

PPVCCSA_S0_REG

MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM

VOLTAGE=0.9V

MIN_NECK_WIDTH=0.2 MM VOLTAGE=3.3V

MIN_LINE_WIDTH=0.6 MM

PP3V3_ENET

MAKE_BASE=TRUE

PP1V2_ENET

PP1V8_S0_CPU_VCCPLL_R

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.6 MM VOLTAGE=1.5V

PP1V5_S3RS0_CPUDDR

PP1V5_S0

VOLTAGE=1.5V

MIN_NECK_WIDTH=0.2 MM

PP1V5_S0

MIN_LINE_WIDTH=0.6 MM

MAKE_BASE=TRUE

PP1V5_S0

PP1V5_S3RS0_CPUDDR PP1V5_S3RS0_CPUDDR

PP1V5_S3

PP1V8_S0_CPU_VCCPLL_R

MAKE_BASE=TRUE

VOLTAGE=1.8V

MIN_LINE_WIDTH=0.5 MM MIN_NECK_WIDTH=0.2 MM

PP5V_S5

PP3V42_G3H

PP1V5_S3_CPU_VCCDQ

PP1V05_S0_CPU_VCCPQE

PP3V3_ENET

VOLTAGE=12.8V

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.25 mm

PPBUS_SW_BKL

MIN_LINE_WIDTH=0.6 mm

PPBUS_SW_BKL

PP1V0_S0GPU_ISNS

PP1V0_S0GPU

MAKE_BASE=TRUE

VOLTAGE=1.0V

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.6 MM

PP1V5_S0GPU_ISNS

MAKE_BASE=TRUE

VOLTAGE=1.5V

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.6 MM

PP1V5_GPU_REG

VOLTAGE=1.5V

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.6 MM

MAKE_BASE=TRUE

PP1V8_S0GPU_ISNS

VOLTAGE=1.8V

MIN_LINE_WIDTH=0.6 MM

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.15 MM

PP1V8_GPUIFPX

VOLTAGE=1.8V MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.15 MM

MIN_LINE_WIDTH=0.6 MM

PP1V8_GPUIFPX

PP1V5_GPU_REG

PP1V5_S0GPU_ISNS

PP3V3_S0GPU

PP1V8_S0GPU_ISNS

PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS

PP1V8_S0GPU_ISNS

PP1V8_S0GPU_ISNS PP1V8_S0GPU_ISNS

PP1V5_S0GPU_ISNS PP1V5_S0GPU_ISNS

PP1V0_S0GPU

PP1V8_S0GPU_ISNS

PP1V0_S0GPU

PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS PP1V0_S0GPU_ISNS

PP1V0_S0GPU_ISNS

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.6 MM

VOLTAGE=1.0V MAKE_BASE=TRUE

PPVCORE_GPU

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.6 MM

VOLTAGE=1.0V MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.25 MM

VOLTAGE=1.25V

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 MM

PPVCORE_S0_CPU

MIN_NECK_WIDTH=0.2 MM

VOLTAGE=1.05V

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 MM

PPVCORE_S0_AXG

PPVCORE_S0_CPU

PPVCORE_S0_AXG

PP1V5_S3_CPU_VCCDQ

MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM

VOLTAGE=1.5V

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM

PP1V05_S0_CPU_VCCPQE

MAKE_BASE=TRUE

VOLTAGE=1.05V

PP3V3_FW_FWPHY

VOLTAGE=1.2V

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.6 MM

MAKE_BASE=TRUE

PP1V2_ENET

PP3V3_ENET PP3V3_ENET

PP1V2_ENET

PP1V2_S0

PP1V5_S0GPU_ISNS

PP3V42_G3H

PPVRTC_G3H

PP3V42_G3H

PPDCIN_G3H

PPVRTC_G3H

PP5V_S5

PP1V05_S0

PP1V05_S0 PP1V05_S0 PP1V05_S0 PP1V05_S0

PP1V8_S0GPU_ISNS

PP1V8_GPUIFPX

PP3V3_S0GPU PP3V3_S0GPU

MAKE_BASE=TRUE

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.10MM

MIN_LINE_WIDTH=0.3 MM

PP3V3_S0GPU PP3V3_S0GPU

PP3V3_S0GPU

PP1V8_S0GPU_ISNS

PP1V5_GPU_REG

PP1V5_S0GPU_ISNS

PPVCORE_S0_CPU

PPVP_FW

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

MAKE_BASE=TRUE

VOLTAGE=12.8V

PPVP_FW

PP1V0_FW_FWPHY

VOLTAGE=3.3V MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.4 MM

PP3V3_FW_FWPHY

MIN_NECK_WIDTH=0.2 MM

PPVP_FW

PP3V42_G3H

PP3V3_S5

PP1V05_S0

PP5V_SUS

PP5V_S3

MIN_LINE_WIDTH=0.5 mm MIN_NECK_WIDTH=0.2 mm

MAKE_BASE=TRUE

VOLTAGE=5V

PP3V42_G3H

PP0V75_S0_DDRVTT PP0V75_S0_DDRVTT

PPVCORE_GPU

PPVTTDDR_S3

PP1V05_SUS

PP0V75_S0_DDRVTT

PP1V8_S0GPU_ISNS

PP1V5_S3

VOLTAGE=1.5V MAKE_BASE=TRUE

PP1V5_S3

MIN_LINE_WIDTH=0.2 mm MIN_NECK_WIDTH=0.17 mm

PP1V5_S3RS0_CPUDDR

PP1V5_S0

PP1V05_S0

PP1V2_S0

PP1V05_S0

PP5V_S3

PP5V_SUS

PP1V5_S3

MIN_NECK_WIDTH=0.17 mm MAKE_BASE=TRUE

VOLTAGE=0.75V

MIN_LINE_WIDTH=2 mm

PP0V75_S0_DDRVTT

PP3V42_G3H

PP5V_S3

PP1V8_S0

PP3V42_G3H

MAKE_BASE=TRUE

VOLTAGE=3.42V

MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM

PP5V_SUS

MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM

VOLTAGE=5V MAKE_BASE=TRUE

PP5V_S5

PP5V_S3

MIN_NECK_WIDTH=0.25 mm VOLTAGE=12.8V MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 mm

PPBUS_G3H

PP3V3_S5

PP5V_S0

PP3V3_S3 PP3V3_S3 PP3V3_S3

PP3V3_S3

PP3V3_S3 PP3V3_S3

PP3V3_S3

PP3V3_S3 PP3V3_S3

PP3V3_S3

PP3V3_S5

PP3V3_S3

PP5V_S3

PP5V_S3 PP5V_S3

MIN_NECK_WIDTH=0.2 MM

VOLTAGE=3.3V MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 MM

PP3V3_S5

MIN_LINE_WIDTH=0.6 MM

VOLTAGE=3.3V

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2 MM

PP3V3_SUS

PP1V05_S0

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 MM VOLTAGE=1.05V

MIN_NECK_WIDTH=0.2 MM

8 OF 132 7 OF 101

6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22 23 25

26 28

32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48

49 50 51 53 56 60 61 71 72 79

82

83 84 87 88 89 98

6 7 12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45

47 48 49 50

51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

6 7

12

16 17 18 19 20 22 23 25 26 28 32

35

36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98 6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49

50 51 53 56 60 61 71 72 79 82

83

84 87 88 89 98

7

16 19 25 33 34 35 87

7

34 35

7 8

35 85

7

34 35

7

16 19 25 33 34 35 87

7

16 19 25 33 34 35 87

7

16 19 25 33 34 35 87

7

16 19 25 33 34

35 87

7 8

35 85

6 7 8

22 41 46 51 53 64 67 68 69 71 72 86

88

101

6 7 8

22 41 46 51 53 64 67 68 69 71 72 86

88

101

7 8

35 85

6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

7

34 35

7

16 19 25 33 34 35 87

6 7 8

22 41 46 51 53 64 67 68 69 71 72 86

88

101

6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7 8

18 19 24 25 29 30 31 32

47 48 49 53 54 71 72 87

6 7 8

18 19 24 25 29 30 31 32

47 48 49 53 54 71 72 87

6 7 8

18 19 24 25 29 30

31 32 47 48 49 53 54 71 72 87

6 7

12 16 17 18 19 20 22 23

25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61

71 72 79 82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22 23 25

26 28

32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

6 7

12

16

17

18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22 23 25

26 28

32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22 23 25

26 28

32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

6 7

12

16

17

18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47 48 49 50 51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

7

45 52 53 71

6 7

17 19 20 22 23 24 25 29 39

45 55 65 70 71 72 82 85 89 98

6 7

30 66

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 8

22 41 46 51 53 64 67 68 69 71 72 86

88

101

6 7 8

22 41 46 51 53 64 67 68 69 71 72 86

88

101

6 7 8

22 41 46 51 53 64 67 68 69 71 72 86

88

101

7

45 52 53 71

7

45 52 53 71

7

16 17 18 19 20 22 45 70 71 72

7

16 17 18 19 20 22

45 70 71

72

7

16 17 18 19 20 22 45 70 71 72

7

16 17 18 19 20 22 45 70 71 72

6 7

29 31 41 42 43 45 65 66 71 81

100

7

23 70

7

49 65

7

49 64 66 67 68 69

6 7 8

35 39 48 49 62 63 88

6 7 8

35 39 48 49 62 63 88

6 7

12 16 17 18 19 20 22 23

25 26 28 32 35 36 39 40 41 45

47 48 49 50 51

53 56 60 61 71 72 79

82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82

83 84

87 88

89

98

6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22 23 25 26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82

83 84 87 88 89 98

7

49 81 86

7

49 65

6 7

48 62 63

6 7

38 39

6 7

38 39 40

6 7

38 39

6 7

25 36 70 72

7

49

65

6 7

48 62 63

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89

98

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7

29 31 41 42 43 45 65 66 71 81

100

6 7

29 31 41 42 43 45 65 66 71 81

100

6 7 8

22 41 46 51 53 64 67 68 69 71 72 86

88

101

7

16 17 18 19 20 22 45 70 71 72

7

16 17 18 19 20 22

45 70 71

72

7

16 17 18 19 20 22 45 70 71 72

7

16 17 18 19 20

22 45 70 71 72

7

45 52 53 71

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

7

23 70

6 7 8 35 39 48

49 62 63

88

6 7 8

35 39 48 49 62 63 88

6 7 8

35 39 48 49 62 63 88

6 7 8

35 39 48 49 62 63 88

6 7 8

35 39 48 49 62 63 88

6 7 8

35 39 48 49 62 63 88

7

49 64 66 67 68 69

7

49 64

66 67 68

69

6 7

48

62

63

7

49 64 66 67 68 69

7

49 64 66 67 68 69

7

49 81 86

7

49 64 66 67 68 69

7

49

81 86

7

49 64 66 67 68 69

7

49 81 86

6 7

53 65 71

6 7 8

22 41 46 51 53 64 67 68 69 71 72 86

88

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7 9

10 12 13 14 16 17

20 22 23 35 39 44 67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7

70 87

6 7 8

22 41 46 51 53 64 67 68 69 71 72 86

88

101

6 7 8

22 41 46 51 53 64 67 68 69 71 72 86

88

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7 8

22 41 46 51 53 64 67 68 69 71 72 86

88

101

6 7 8

22 41 46 51 53 64 67 68 69 71 72 86

88

101

6 7 8

22 41 46 51 53 64 67 68 69 71 72 86

88

101

6 7 8

22 41 46 51

53 64 67 68

69 71 72 86

88

101

6 7 8

22 41 46 51 53 64 67 68 69 71 72 86

88

101

6 7

14 17 20 22 25 70 71 87

6 7

14 17 20 22 25 70 71 87

6 7

14 17 20 22 25 70 71 87

6 7

14 17 20 22 25 70 71 87

6 7

14 17 20 22 25 70 71 87

6 7

14 17 20 22 25 70 71 87

6 7

14 17 20 22 25 70 71 87

7

12 15 64

7

12 15 64

6 7

14 17 20 22 25 70 71 87

7

12 15

64

6 7

25 36 70 72

6 7

36 70

7

10 13 15 29 71 72

7

16 20 22 25 41 56 70

7

16 20 22 25 41 56 70

7

16 20 22 25 41 56 70

7

16 20 22 25 41 56 70

7

10 13 15 29 71 72

7

10 13 15 29 71 72

6 7

26 28 29 66 71

6 7

26 28 29 66 71

7

12 14

6 7

53 65

71

6 7

25 42 44 45 46 47 52 62 63

72

7

12 15

7

10 12 14

6 7

25 36

70 72

7

88

100

7

88

100

7

73 74 78 80

100

7

86

100

7

74 75 76 77

100

7

86

100

7

74 78 80

100

6 7

71

100

6 7

71

100

7

86

100

7

74 75 76 77

100

6 7

71 74 78 79

81 83

6 7

71 74 78 79

81 83

7

74 78 80

100

7

74 78 80

100

7

74 78 80

100

7

74 78 80

100

7

74 78 80

100

7

74 78 80

100

7

74 78 80

100

7

74 78 80

100

7

74 78 80

100

7

74 75 76 77

100 7

74 75 76 77

100

7

86

100

7

74 78 80

100

7

86

100

7

73 74 78 80

100 7

73 74 78 80

100 7

73 74 78 80

100 7

73 74 78 80

100 7

73 74 78 80

100 7

73 74 78 80

100 7

73 74 78 80

100

7

73 74 78 80

100

6 7

48 74 81

6 7

48 74 81

6 7

12 14

48 68

101

7

12 13

15 48 68

6 7

12 14

48 68

101

7

12 13

15 48 68

7

12 13 15 48 68

7

12 15

7

10 12

14

6 7

38 39 40

6 7

36 70

6 7

25 36 70 72

6 7

25 36 70 72

6 7

36 70

7

74 75 76 77

100

6 7

25 42 44 45 46 47 52 62 63

72

7

16 17

20 25

6 7

25 42 44 45 46 47 52 62 63

72

6 7

25 42 44 45 46 47 52 62 63

72

6 7

25 42 44 45 46 47 52 62 63

72

6 7

25 42 44 45 46 47 52 62 63

72

6 7

48 62 63

7

16 17 20 25

6 7

53 65 71

6 7

53 65 71

6 7

53 65 71

6 7 9

10 12 13

14 16 17 20 22 23 35 39 44 67 69 72

101

6 7 9

10 12 13 14 16 17

20 22 23 35

39 44 67 69 72

101

6 7 9

10 12 13 14 16 17

20 22 23 35

39 44 67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7 9

10 12 13 14 16 17

20 22 23 35 39 44 67 69

72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

7

74 78 80

100

6 7

71

100

6 7

71 74 78 79 81 83

6 7

71 74 78 79

81 83

6 7

71 74 78 79

81 83 6 7

71 74 78 79

81 83

6 7

71 74 78 79

81 83

6 7

71 74 78 79

81 83

7

74 78 80

100

7

86

100

7

74 75 76 77

100

6 7

39 40

6 7

39 40

6 7

39 40

6 7

38 39

6 7

38 39 40

6 7

25 42 44 45 46 47 52 62 63

72

6 7

17 19 20 22

23 24 25 29 39 45 55 65 70 71

72 82 85 89 98

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

7

22 71

6 7

29 31 41 42 43 45 65 66 71 81

100

6 7

25

42

44

45

46

47

52

62

63

72

6 7

26 28 29 66

6 7

26 28 29 66

6 7

48 74 81

6 7

30 66

7

23 70

6

7

26 28 29 66

6 7

26 28 29 66

7

74 78 80

100

6 7

26 28 29 66 71

6 7

26 28 29 66 71

7

16 20 22 25 41 56 70

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7 9

10 12 13 14 16 17

20 22

23 35 39 44 67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7

70 87

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7 9

10 12 13 14 16 17

20 22 23

35 39 44 67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7 9

10 12

13 14 16 17 20 22 23 35 39 44 67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7

29 31 41 42 43 45 65 66 71 81

100

7

22 71

6 7

26 28 29 66 71

6 7

26 28 29 66 71

6 7

26 28 29 66

6 7

25 42 44 45 46 47 52 62 63

72

6 7

25 42 44 45 46 47 52 62 63

72

6 7

25 42 44 45 46 47 52 62 63

72

6 7

29 31 41 42 43 45 65 66 71 81

100

6 7

29 31 41 42 43 45 65 66 71 81

100

6 7

14 17 20 22 25 70 71 87

6 7

25 42 44 45 46 47 52 62 63

72

7

22 71

6 7

53 65 71

6 7

29 31

41 42 43 45

65 66 71 81

100

6 7

29 31 41 42 43 45 65 66 71 81

100

6 7

29 31 41 42 43 45 65 66 71 81

100

6 7

29 31 41 42 43 45 65 66 71 81

100

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7 8

22 41 46 51 53 64 67 68 69 71 72 86

88

101

6 7 8

18 19 24 25 29 30 31 32

47 48 49 53 54 71 72 87 6 7 8

18 19 24 25 29 30 31 32

47 48

49 53

54 71 72 87

6 7

8

18 19 24 25 29 30 31 32 47

48 49 53 54 71 72 87

6 7 8

18 19 24 25 29 30 31 32

47 48 49 53 54 71 72 87 6 7 8

18 19 24 25 29 30 31 32

47 48 49 53 54 71 72 87 6 7 8

18 19 24 25 29 30 31 32

47 48 49 53 54 71 72 87

6 7 8

18 19 24 25 29 30 31 32

47 48 49 53 54 71 72 87

6 7 8

18 19 24 25 29 30 31 32

47 48 49 53 54 71 72 87

6 7 8

18 19 24 25 29 30 31 32

47 48 49 53 54 71 72 87

6 7 8

18 19 24 25 29 30 31 32

47 48 49 53 54 71 72 87

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

6 7

17 19 20 22 23 24 25 29 39

45 55 65 70 71 72 82 85 89

98

6 7 8

18

19 24 25 29 30 31 32 47 48 49

53 54 71 72 87

6 7

29 31 41 42 43 45 65 66 71 81

100

6 7

29 31 41 42 43 45 65 66 71 81

100

6 7

29 31 41 42 43 45 65 66 71 81

100

6 7

17 19 20 22 23 24 25 29 39 45 55 65 70 71 72 82 85 89 98

7 16 17 18 19

20 22 45 70 71 72

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

www.rosefix.com

www.vinafix.vn

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

Short (IO Row) EMI pogo pins

Tall EMI pogo pins

Keyboard / IPD Conn Protect

Thermal Module Holes

GPU signals

GMUX ALIASES

Heat spreader mounting boss for T29 router

Heat spreader mounting boss for PCH

Left Speaker Holes

Unused PEG signals

Frame Holes

CPU signals

T29 / GMUX JTAG Signals

T29 Signals Through PEG

Unused T29 Ports

Digital Ground

Fan Holes

SM

XW0901

1 2

SM

XW0902

1 2

SM

XW0903

1 2

STDOFF-4.0OD1.85H-SM

SH0920

1

STDOFF-4.0OD1.85H-SM

SH0923

1

STDOFF-4.0OD2.23H-SM

SH0921

1

STDOFF-4.0OD2.23H-SM

SH0922

1

MF-LF

2

1

R0916

1/16W 402

5%

10K

5%

1/16W

2

1

402

MF-LF

R0915

10K

1/8W

MF-LF

805

R0950

T29BST:N

0

5%

1 2

C0905

10%

2

201

0.01UF

10V

1

X5R

R0921

MF

51

1/20W

2

201

5%

1

0.01UF

C0901

10% 10V X5R

1

2

201

X5R

C0902

0.01UF

2

10V 201

10%

1

R0922

51

5%

1/20W

201

21

MF

2

10V 201

10%

1

X5R

0.01UF

C0903

R0923

201

1/20W

5%

21

MF

51

C0904

0.01UF

2

10V 201

10%

1

X5R

R0924

201

21 5% MF

1/20W

51

C0906

0.01UF

X5R 201

2

10V

10%

1

201

R0926

21

MF

1/20W

51

5%

10% 10V

0.01UF

2

1

201

X5R

C0907

201

R0927

1 2

5% MF

51

1/20W

C0908

0.01UF

2

X5R

1

10% 10V

201

STDOFF-4.5OD.98H-1.1-3.48-TH

ZT0984

1

3R2P5

ZT0990

1

3R2P5

ZT0960

1

SL-3.1X2.7-6CIR-NSP

ZT0950

TH

1

3R2P5

ZT0940

3R2P5

ZT0915

1

STDOFF-4.5OD.98H-1.1-3.48-TH

ZT0986

1

STDOFF-4.5OD.98H-1.1-3.48-TH

1

ZT0981

ZT0985

1

STDOFF-4.5OD.98H-1.1-3.48-TH

SH0917

SM

1

1.4DIA-SHORT-SILVER-K99

SM

SH0901

1

1.4DIA-SHORT-SILVER-K99

SM

SH0912

1

1.4DIA-SHORT-SILVER-K99

SM

SH0910

1

1.4DIA-SHORT-SILVER-K99

SM

SH0911

1

1.4DIA-SHORT-SILVER-K99

SM

SH0913

1

1.4DIA-SHORT-SILVER-K99

POGO-2.0OD-3.5H-K86-K87

1

SH0903

SM

POGO-2.0OD-3.5H-K86-K87

1

SM

SH0916

POGO-2.0OD-3.5H-K86-K87

1

SH0902

SM

POGO-2.0OD-3.5H-K86-K87

1

SM

SH0900

POGO-2.0OD-3.5H-K86-K87

SM

1

SH0904

SM

SH0914

1

1.4DIA-SHORT-SILVER-K99

STDOFF-4.5OD.98H-1.1-3.48-TH

ZT0991

1

ZT0988

STDOFF-4.5OD.98H-1.1-3.48-TH

1

STDOFF-4.5OD.98H-1.1-3.48-TH

ZT0989

1

STDOFF-4.5OD.98H-1.1-3.48-TH

ZT0987

1

STDOFF-4.5OD.98H-1.1-3.48-TH

ZT0980

1

4.0OD1.85H-M1.6X0.35

ZT0952

1

4.0OD1.85H-M1.6X0.35

ZT0953

1

STDOFF-4.0OD3.0H-TH

ZT0934

1

ZT0935

1

STDOFF-4.0OD3.0H-TH

STDOFF-4.5OD.98H-1.1-3.48-TH

ZT0930

1

NOSTUFF

R0903

1

402

10K

5%

2

MF-LF

1/16W

2

1

R0904

NOSTUFF

10K

5% 1/16W MF-LF 402

1/16W

R0901

4.7K

2

402

MF-LF

5%

1

NOSTUFF

MF-LF

402

5%

1/16W

10K

1

2

R0913

1/16W 402

5% MF-LF

1

2

10K

NOSTUFF

R0914

SYNC_MASTER=K18_MLB

SYNC_DATE=04/27/2010

Signal Aliases

T29_A_BIAS_R

DP_IG_DDC_DATA

MAKE_BASE=TRUE

DP_IG_HPD

MAKE_BASE=TRUE

DP_IG_DDC_CLK

DP_IG_AUX_CH_N

TP_DP_IG_B_MLP<3..0>

DP_A_BIAS0

DP_A_BIAS2

DP_IG_DDC_DATA

NC_PCH_CLKOUT_DPN

TRUE

MAKE_BASE=TRUE

DP_IG_AUX_CH_P

TP_DP_IG_B_MLN<3..0>

DP_IG_DDC_CLK

GND

TRUE

MAKE_BASE=TRUE

NC_PCIE_CLK100M_EXCARD_N

TP_SMC_EXCARD_PWR_EN

PEG_R2D_C_P<7..0>

MAKE_BASE=TRUE

JTAG_ISP_TDO

PPBUS_G3H

NC_PCIE_EXCARD_D2R_P

T29_LSEO_LSOE2

DP_IG_HPD

NO_TEST=TRUE

NC_DPB_EG_AUX_CHP

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_DPB_EG_MLP<3..0>

MAKE_BASE=TRUE

DPB_EG_ML_N<3..0>

NO_TEST=TRUE

NC_DPB_EG_AUX_CHN

MAKE_BASE=TRUE

NC_DPB_EG_DDC_DATA

NC_PCIE_EXCARD_R2D_C_N

TRUE

MAKE_BASE=TRUE

NC_DP_IG_MLP<3..0>

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_DPB_EG_MLN<3..0>

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_DPB_EG_DDC_CLK

MAKE_BASE=TRUE

DP_EG_AUXCH_N

FW643_WAKE_L

NC_DPB_EG_DDC_DATA

NO_TEST=TRUE

MAKE_BASE=TRUE

TRUE

NC_PCH_GPIO65_CLKOUTFLEX1

NC_DP_IG_MLN<3..0>

MAKE_BASE=TRUE

NO_TEST=TRUE

LCD_BKLT_EN

DP_EG_AUXCH_P

NC_DPB_EG_DDC_CLK

NC_DPB_EG_AUX_CHN

JTAG_ISP_TCK

USB_T29A_P

TRUE

MAKE_BASE=TRUE

NC_PCH_GPIO64_CLKOUTFLEX0

USB_T29A_N

MAKE_BASE=TRUE

USB_SDCARD_N

MAKE_BASE=TRUE

USB_SDCARD_P

USB_EXTC_P

USB_EXTC_N

=PEG_R2D_C_P<7..0>

MAKE_BASE=TRUE

JTAG_ISP_TCK

NC_PCH_GPIO65_CLKOUTFLEX1

NC_RT_GAIN_TP

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_PCIE_EXCARD_D2R_P

MAKE_BASE=TRUE

TRUE

NC_USB_HUB2_OCS4

MAKE_BASE=TRUE

USB_SDCARD_P USB_SDCARD_N

PP3V3_S3

NC_FSB_CLK133M_PCHP

MAKE_BASE=TRUE

GMUX_VSYNC

T29_LSEO_LSOE3

MAKE_BASE=TRUE

PM_ALL_GPU_PGOOD

TP_LVDS_MUX_SEL_EG

NO_TEST=TRUE

MAKE_BASE=TRUE

=PEG_D2R_N<15..12>

=PEG_D2R_P<15..12>

TP_LVDS_IG_B_CLKN

MAKE_BASE=TRUE

TP_LVDS_IG_B_CLKP

T29_LSEO_LSOE2

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_PEG_R2D_C_N<15..12>

JTAG_ISP_TDO

NC_PEG_R2D_C_P<15..12>

NO_TEST=TRUE

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_LVDS_IG_A_DATAN<3>

MAKE_BASE=TRUE

NC_LVDS_IG_A_DATAP<3>

NO_TEST=TRUE

NC_PEG_D2R_N<15..12>

NO_TEST=TRUE

MAKE_BASE=TRUE

PCIE_T29_R2D_C_N<3..0>

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_T29_D2RN<3..2> NC_T29_R2D_CP<3..2>

NO_TEST=TRUE

MAKE_BASE=TRUE

GND

NC_USB_HUB1_OCS4

MAKE_BASE=TRUE

NC_GPU_XTALOUT

NO_TEST=TRUE

NC_PCIE_CLK100M_EXCARD_N

T29_R2D_C_P<3..2>

T29_LSEO_LSOE3

MAKE_BASE=TRUE

NO_TEST=TRUE

JTAG_ISP_TDI

MAKE_BASE=TRUE

PEG_D2R_P<7..0>

=PEG_R2D_C_N<7..0>

NC_LVDS_IG_B_DATAN<3>

NO_TEST=TRUE

MAKE_BASE=TRUE

FW643_WAKE_L

T29_D2R_P<3..2>

PEX_CLKREQ_L

GND

MAKE_BASE=TRUE

EG_RESET_L

LVDS_IG_BKL_ON

MAKE_BASE=TRUE

PEG_D2R_N<7..0>

=PEG_D2R_P<7..0>

NO_TEST=TRUE

NC_FSB_CLK133M_PCHN

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_FSB_CLK133M_PCHP

MAKE_BASE=TRUE

T29_D2R_N<3..2>

NC_SW_GAIN_TP

NO_TEST=TRUE

MAKE_BASE=TRUE

JTAG_ISP_TDI

TP_LVDS_MUX_SEL_EG

NC_T29_R2D_CN<3..2>

MAKE_BASE=TRUE

NO_TEST=TRUE

TP_SMC_EXCARD_PWR_EN

MAKE_BASE=TRUE

NC_PCIE_EXCARD_D2R_N

NC_PCIE_EXCARD_R2D_C_P

NC_PCIE_EXCARD_R2D_C_N

=PEG_D2R_N<11..8>

TP_CPU_VTT_SELECT

GFXIMVP_VID<0..6>

CPUIMVP_VID<0..6>

MAKE_BASE=TRUE

TP_CPU_VTT_SELECT

MAKE_BASE=TRUE

PEG_CLKREQ_L

GND_CHASSIS_AUDIO_JACK

MAKE_BASE=TRUE

PEX_CLKREQ_L

PPVOUT_S0_LCDBKLT

MAKE_BASE=TRUE

MEMVTT_EN

MAKE_BASE=TRUE

CPU_VID<0..6> GFX_VID<0..6>

MAKE_BASE=TRUE

=PEG_R2D_C_P<15..12>

=PEG_D2R_P<11..8>

=PEG_R2D_C_P<11..8>

LVDS_IG_BKL_ON

PEG_CLKREQ_L

GMUX_VSYNC

LVDS_IG_PANEL_PWR

=PEG_R2D_C_N<15..12>

MAKE_BASE=TRUE

NC_PEG_D2R_P<15..12>

NO_TEST=TRUE

NC_LVDS_IG_B_DATAP<3>

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_LVDS_IG_B_DATAN<3>

MEMVTT_EN

NC_USB_HUB2_OCS4

TP_LVDS_IG_B_CLKP

NC_LVDS_IG_B_DATAP<3>

NC_LVDS_IG_A_DATAN<3>

NC_LVDS_IG_A_DATAP<3>

TP_LVDS_IG_BKL_PWM

TP_LVDS_IG_B_CLKN

MAKE_BASE=TRUE

PEG_R2D_C_N<7..0>

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_T29_D2RP<3..2>

MAKE_BASE=TRUE

PCIE_T29_D2R_N<3..0>

GND

NC_PCH_GPIO64_CLKOUTFLEX0

PP5V_S0_AUDIO_AMP_R

PP5V_S0

GND

PM_ALL_GPU_PGOOD

JTAG_ISP_TCK

T29_LSEO_LSOE2

NO_TEST=TRUE

MAKE_BASE=TRUE

T29_LSEO_LSOE3

PP3V3_S3

NC_FSB_CLK133M_PCHN

PP5V_S0_AUDIO_AMP_L

FW_PLUG_DET_L

MAKE_BASE=TRUE

LVDS_IG_PANEL_PWR

MAKE_BASE=TRUE

NC_SW_GAIN_TP

MAKE_BASE=TRUE

TP_LVDS_IG_BKL_PWM

NC_GPU_XTALOUT

NC_USB_HUB1_OCS4

PP3V3_S3

EG_RESET_L

=PEG_D2R_N<7..0>

=PEG_R2D_C_N<11..8>

MAKE_BASE=TRUE

PCIE_T29_R2D_C_P<3..0>

PCIE_T29_D2R_P<3..0>

MAKE_BASE=TRUE

T29_R2D_C_N<3..2>

TRUE

MAKE_BASE=TRUE

NC_PCIE_EXCARD_D2R_N

DP_EG_AUXCH_P

MAKE_BASE=TRUE

DP_EG_AUXCH_N

FW_PLUG_DET_L

MAKE_BASE=TRUE

PM_ENET_EN

MAKE_BASE=TRUE

DP_IG_AUX_CH_N

NC_PEG_B_CLKRQ_L_GPIO56

TRUE MAKE_BASE=TRUE

DP_IG_AUX_CH_P

MAKE_BASE=TRUE

NC_PCH_GPIO66_CLKOUTFLEX2

TRUE

MAKE_BASE=TRUE

NC_PCH_GPIO67_CLKOUTFLEX3

TRUE

MAKE_BASE=TRUE

NC_RT_GAIN_TP

NC_LT_GAIN_TP

NC_PCH_GPIO67_CLKOUTFLEX3

NC_PCIE_CLK100M_EXCARD_P

TP_ISSP_SDATA_P1_0

NC_PCIE_EXCARD_R2D_C_P

TRUE

MAKE_BASE=TRUE

NC_PCIE_CLK100M_EXCARD_P

MAKE_BASE=TRUE

TRUE

PM_ENET_EN

PPVOUT_S0_LCDBKLT

MAKE_BASE=TRUE

TP_ISSP_SDATA_P1_0

T29_A_BIAS_R

NC_PCIECLKRQ4_L_GPIO26

MAKE_BASE=TRUE

TRUE

NC_PCIECLKRQ4_L_GPIO26

T29_A_BIAS_R2D_N1

NC_PCH_CLKOUT_DPP

TRUE

MAKE_BASE=TRUE

T29_A_BIAS_D2R_P1

NC_PEG_B_CLKRQ_L_GPIO56

T29_A_BIAS_R

PP5V_S0_AUDIO

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_LT_GAIN_TP

MAKE_BASE=TRUE

NC_PCH_GPIO66_CLKOUTFLEX2

T29_A_BIAS_R2D_P0

T29_A_BIAS_R2D_N0

T29_A_BIAS_R2D_P1

GND

T29_A_BIAS_R

T29_A_BIAS_D2R_N1

DPB_EG_ML_P<3..0>

NC_DPB_EG_AUX_CHP

TP_ISSP_SCLK_P1_1

GND

TP_ISSP_SCLK_P1_1

MAKE_BASE=TRUE

NC_PCH_CLKOUT_DPN

NC_PCH_CLKOUT_DPP

PP15V_T29

MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.095 mm VOLTAGE=0V

GND

9 OF 132 8 OF 101

8

85

8

17 79 83

8

17 83

8

17 79 83

8

17 83 92

84

8

17 79 83

8

16

8

17 83 92

8

17 79 83

8

16 93

8

73 90

8

19 33 87

6 7

35 39 48 49 62 63 88

8

16

8

33

8

17 83

8

16

17

8

78 83 97

8

38 39

8

16

17

87 88

8

78 83 97

8

19 23 33

87

24 92

8

16

24 92

8

24

8

24

24 92

9

8

19 23 33 87

8

16

8

16

8

24

8

24

8

24

6 7 8

18 19 24

25 29 30 31 32

47 48 49 53 54

71 72 87

8

87 88

8

33

8

73 81 86 87 89

8

87

6 8

18

6 8

18

8

33

9

8

19 33 87

9

8

18 92

8

18 92

9

33 93

33

8

24

8

16 93

95

8

19 33 87

73 90

9

8

18

8

38 39

95

8

79 87

8

73 87

8

18 87

73 90

9

8

95

8

19 33 87

8

87

33

8

16

8

16

8

16

8

90

8

90

8

16 87

60

8

79 87

6 8

82 88

100

8

29 66

90

8

18 87

8

16 87

8

87 88

8

18 87

9

8

18

8

18

8

29 66

8

24

6 8

18

8

18

8

18 92

8

18 92

6 8

18

6 8

18

73 90

33

9

33 93

8

16

59

6 7

22 41 46 51 53 64 67 68 69 71 72 86

88

101

8

73 81 86 87 89

8

19 23 33 87

8

33

6 7 8

18 19 24 25 29 30 31 32

47 48 49 53 54 71 72 87

8

59

8

19 39

8

18 87

8

6 8

18

8

24

6 7 8

18 19 24 25 29 30 31

32 47 48 49 53 54 71 72 87

8

73 87

9

33 93

9

33 93

95

8

16

8

78 83 97

8

19 39

8

17 83 92

8

17 83 92

8

16

8

16

8

16

8

16 93

6 8

52

8

16

8

16 93

8

6 8

82 88

100

6 8

52

8

85

8

85

8

85

8 8

84

8

16

85

8

85

8

56

8

56

8

16

84

8

85

8

6 8

52

6 8

52

8

16

8

16

7

35 85

www.rosefix.com

www.vinafix.vn

IN IN IN IN

IN

OUT

IN

IN IN IN IN IN

OUT

OUT OUT OUT

OUT

OUT OUT OUT OUT OUT

OUT OUT OUT OUT

OUT

EDP_HPD

EDP_COMPIO

EDP_ICOMPO

EDP_AUX*

EDP_AUX

EDP_TX_3

EDP_TX_2

EDP_TX_1

EDP_TX_0

EDP_TX_3*

EDP_TX_2*

EDP_TX_1*

EDP_TX_0*

DMI_TX_3*

FDI1_LSYNC

FDI0_LSYNC

FDI_TX_3

FDI0_FSYNC FDI1_FSYNC

FDI_INT

FDI_TX_1

FDI_TX_0

FDI_TX_2

FDI_TX_3*

FDI_TX_2*

FDI_TX_1*

DMI_TX_1* DMI_TX_2*

DMI_TX_0

DMI_TX_2

DMI_TX_1

DMI_TX_3

FDI_TX_0*

DMI_RX_2*

DMI_RX_0 DMI_RX_1 DMI_RX_2 DMI_RX_3

DMI_TX_0*

DMI_RX_3*

DMI_RX_1*

DMI_RX_0*

PEG_ICOMPI PEG_ICOMPO PEG_RCOMPO

PEG_RX_2*

PEG_RX_0* PEG_RX_1*

PEG_RX_3* PEG_RX_4* PEG_RX_5*

PEG_RX_7*

PEG_RX_6*

PEG_RX_8* PEG_RX_9*

PEG_RX_10*

PEG_RX_12*

PEG_RX_11*

PEG_RX_14*

PEG_RX_13*

PEG_RX_15*

PEG_RX_0 PEG_RX_1

PEG_RX_3

PEG_RX_2

PEG_RX_4

PEG_RX_6

PEG_RX_5

PEG_RX_7 PEG_RX_8

PEG_RX_10

PEG_RX_9

PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX_1* PEG_TX_2*

PEG_TX_0*

PEG_TX_3* PEG_TX_4* PEG_TX_5*

PEG_TX_7*

PEG_TX_6*

PEG_TX_10*

PEG_TX_8* PEG_TX_9*

PEG_TX_11* PEG_TX_12* PEG_TX_13* PEG_TX_14* PEG_TX_15*

PEG_TX_1

PEG_TX_0

PEG_TX_2 PEG_TX_3 PEG_TX_4

PEG_TX_6

PEG_TX_5

PEG_TX_7 PEG_TX_8

PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12

PEG_TX_14

PEG_TX_13

PEG_TX_15

FDI_TX_4* FDI_TX_5* FDI_TX_6* FDI_TX_7*

FDI_TX_4 FDI_TX_5 FDI_TX_6 FDI_TX_7

(SYM 1 OF 11)

DMI

EMBEDDED DISPLAY PORT

PCI EXPRESS BASED INTERFACE SIGNALS

INTEL FLEXIBLE DISPLAY INTERFACE SIGNALS

RSVD_96

RSVD_95

RSVD_94

RSVD_93

RSVD_92

RSVD_91

RSVD_90

RSVD_97

RSVD_38 RSVD_39

RSVD_40

RSVD_36

RSVD_41 RSVD_42 RSVD_43

RSVD_45

RSVD_44

RSVD_48 RSVD_49 RSVD_50

RSVD_47

RSVD_46

RSVD_53

RSVD_52

RSVD_51

RSVD_55

RSVD_54

RSVD_57

RSVD_59 RSVD_60

RSVD_58

RSVD_56

RSVD_61

RSVD_63

RSVD_62

RSVD_65

RSVD_64

RSVD_66 RSVD_67

RSVD_69 RSVD_70

RSVD_68

RSVD_71 RSVD_72

RSVD_79 RSVD_80 RSVD_81

RSVD_78

RSVD_82 RSVD_83 RSVD_84

RSVD_86

RSVD_85

RSVD_89

RSVD_88

RSVD_87

CFG_4

CFG_3

CFG_2

CFG_1

CFG_0

CFG_9

CFG_8

CFG_7

CFG_6

CFG_5

CFG_14

CFG_13

CFG_12

CFG_11

CFG_10

CFG_15 CFG_16 CFG_17

RSVD_1

RSVD_5 RSVD_6

RSVD_4

RSVD_3

RSVD_2

RSVD_10 RSVD_11

RSVD_9

RSVD_8

RSVD_7

RSVD_15 RSVD_16

RSVD_14

RSVD_13

RSVD_12

RSVD_20

RSVD_19

RSVD_18

RSVD_17

RSVD_25 RSVD_26

RSVD_24

RSVD_22 RSVD_23

RSVD_31

RSVD_30

RSVD_29

RSVD_28

RSVD_27

RSVD_32 RSVD_33 RSVD_34

RSVD_35

(5 OF 11)

RESERVED

OUT OUT OUT OUT OUT

OUT

OUT OUT OUT OUT OUT

OUT

IN IN

IN

IN IN

BI BI

NC NC NC NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC NC NC

NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC

NC NC NC NC NC

NC

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

CFG [7] :PEG DEFER TRAINING 1 = (DEFAULT) IMMEDIATELY AFTER xxRESETB 0 = WAIT FOR BIOS

(IPU)

10K PU disables eDP HPD

FOR SANDYBRIDGE PROCESSOR

(IPU)

(IPU) (IPU)

(IPU)

Intel is investigating processor driven VREF_DQ generation.

(IPU)

(DDR_VREF0) (DDR_VREF1)

(THERMDA) (THERMDC)

NOTE:

This connection is to support the same.

(IPU)

CFG [4] :eDP ENABLE/DISABLE 1 = DISABLED 0 = ENABLED CFG [3] :PCIE x4 LANE REVERSAL 1 = NORMAL OPERATION 0 = LANES REVERSED CFG [2] :PCIE x16 LANE REVERSAL 1 = NORMAL OPERATION 0 = LANES REVERSED

CFG [6:5] :PCIE BIFURCATION 11 = 1 X16 (DEFAULT) 10 = 2 X8 01 = RSVD 00 = X8, X4, X4

CPU_CFG<4> should be pulled down to enable EDP

These can be Placed close to J2500 and Only for debug access

17 90

6

17 90

6

17 90

8

33 93

8

33 93

8

33 93

8

33 93

8

33 93

8

33 93

8

33 93

8

33 93

8

33 93

8

33 93

8

33 93

8

33 93

8

33 93

8

33 93

8

33 93

8

33 93

8

24.9

1/16W 402

MF-LF

1%

R1010

1

2

OMIT

MOBILE-REV1

SANDY-BRIDGE

BGA

U1000

N8

N10

T9

R10

R6

R8

U8

U10

N2

N4

R2

R4

P3

P1

T5

U6

AE4 AE2

AC2

AE8

AB1

AG4

AG2

AF3

AF1

AF7

AE6

AG8

AG6

AC8

AB7

AA2

AB3

AD9

W6

V7

W10

W8

Y9

AA8

AA10

AC10

U2

U4

W4

W2

V3

V1

AA6

Y5

G2 H1 F3

G22

F23

K23

H23

F11

H11

K11

J12

F9

E8

H9

G10

H7

J8

G6

F7

K21

H21

F19

H19

K19

J20

H17

G18

K15

K17

G14

F15

J16

H15

K13

H13

C22

A22

D23

B23

B13

D13

C10

A10

D11

B11

B9

D9

D7

B7

F13

E12

A18

C18

B21

D21

D19

B19

F21

E20

C14

A14

B17

D17

D15

B15

F17

E16

OMIT

MOBILE-REV1

BGA

SANDY-BRIDGE

U1000

B57 D57

F55 K55 F57 E58 H57 H55 D53 K57

B55 A54 A58 D55 C56 E54 J54 G56

BB17

AW46 BG26 BB25 BG34 BH35 BJ34 BF35 BF41 BH43 BJ42

AY17

BF43

AW50 BB57 BF63

AD5 AH5 AJ6

BF3 BG4

BD29

BD19 AY45 AY41 BG62 BB43

D49 B53

G52 G64

BD33

AJ10

BE6 AA4 AC4 AC6

C52

D3

C4 C24 D25

BC30

B25

K47 H47

F5 K9 H5 L10 G4 K7 K5

BE32

M9 L6 J2 L2 P7 M5 J4 L4 N6

G48

AW42

K49 H49 J50

AY13 BB13

BA48

BB15 AY15 AW14 BD13 BA16 BE16 BD15 BC14 BF19 BH19

BC42

BF21 BH21 BF23 BH23 BF25 BH25 BJ22 BG22

1%

MF-LF 402

1/16W

1K

R1020

1

2

1% 1/16W MF-LF 402

1K

R1022

1

2

NOSTUFF

MF-LF

5%

0

1/16W

402

R1021

1 2

NOSTUFF

402

1/16W MF-LF

5%

0

R1023

1 2

17 90

6

17 90

6

17 90

6

17 90

6

17 90

6

17 90

6

17 90

6

17 90

PLACE_NEAR=U1000.AB1:12.7mm

MF-LF

24.9

402

1% 1/16W

R1030

1

2

10K

1/16W

1%

402

MF-LF

R1031

1

2

50 98

1/16W MF-LF

5%

402

1K

NOSTUFF

R1047

1

2

NOSTUFF

1K

1/16W

5%

402

MF-LF

R1046

1

2

1/16W

5%

402

MF-LF

1K

R1045

1

2

EDP

402

1K

MF-LF

1/16W

5%

R1044

1

2

NOSTUFF

5%

1/16W

402

MF-LF

1K

R1042

1

2

1/16W MF-LF

5%

402

1K

NOSTUFF

R1040

1

2

1/16W MF-LF

5%

402

1K

NOSTUFF

R1041

1

2

1/16W MF-LF

5%

402

1K

NOSTUFF

R1043

1

2

1/16W MF-LF

5%

402

1K

NOSTUFF

R1049

1

2

CPU DMI/PEG/FDI/RSVD

CPU_EDP_COMP

TP_EDP_TX_N<2>

CPU_CFG<7>

CPU_CFG<16> CPU_CFG<3> CPU_CFG<1> CPU_CFG<0>

CPU_CFG<6>

NC_PEG_R2D_C_P<14>

CPU_CFG<5>

TP_EDP_AUX_N

TP_EDP_TX_N<3>

TP_EDP_TX_N<1>

FDI_DATA_N<2>

FDI_DATA_N<6>

FDI_DATA_P<5>

CPU_CFG<2>

CPU_CFG<5> CPU_CFG<6>

CPU_CFG<8>

CPU_CFG<7>

NC_PEG_D2R_P<12>

=PEG_D2R_P<3>

CPU_MEM_VREFDQ_B

PCIE_T29_D2R_P<2>

=PEG_D2R_P<4>

=PEG_D2R_P<1> =PEG_D2R_P<2>

CPU_MEM_VREFDQ_A

=PEG_R2D_C_N<4>

FDI_DATA_P<3>

PCIE_T29_R2D_C_P<1>

=PEG_R2D_C_P<7>

NC_PEG_D2R_N<13>

FDI_DATA_P<4>

DMI_N2S_P<0>

PCIE_T29_R2D_C_N<0>

=PEG_R2D_C_N<6>

CPU_THERMD_N

CPU_THERMD_P

PCIE_T29_R2D_C_N<1>

=PEG_R2D_C_N<3>

NC_PEG_R2D_C_N<14>

=PEG_R2D_C_P<2>

=PEG_R2D_C_N<7>

FDI_DATA_P<7>

FDI_DATA_N<5>

FDI_DATA_N<0>

NC_PEG_R2D_C_N<15>

TP_EDP_AUX_P

NC_PEG_D2R_P<13>

PCIE_T29_R2D_C_N<3>

PCIE_T29_D2R_P<1>

PCIE_T29_D2R_P<3>

PCIE_T29_R2D_C_P<2>

NC_PEG_R2D_C_N<12>

=PEG_R2D_C_P<4>

NC_PEG_R2D_C_P<12>

NC_PEG_D2R_P<14>

=PEG_R2D_C_P<0>

=PEG_R2D_C_N<2>

PCIE_T29_R2D_C_N<2>

CPU_CFG<1>

CPU_CFG<10>

CPU_CFG<4>

=PEG_R2D_C_P<1>

FDI_DATA_N<1>

DMI_S2N_P<1>

=PEG_D2R_P<6>

PP0V75_S3_MEM_VREFDQ_B

DMI_S2N_P<3>

DMI_N2S_N<1>

NC_PEG_R2D_C_P<15>

PP0V75_S3_MEM_VREFDQ_A

DMI_N2S_N<0>

DMI_N2S_P<1> DMI_N2S_P<2> DMI_N2S_P<3>

FDI_DATA_N<3>

FDI_DATA_N<7>

FDI_DATA_P<6>

FDI_DATA_P<2>

FDI_DATA_P<1>

FDI_DATA_P<0>

DMI_N2S_N<3>

DMI_S2N_P<0>

DMI_S2N_N<0>

CPU_CFG<12>

CPU_CFG<16>

CPU_CFG<9>

CPU_CFG<0>

CPU_CFG<17>

PCIE_T29_R2D_C_P<0>

=PEG_R2D_C_N<5>

CPU_CFG<15>

CPU_CFG<14>

CPU_CFG<13>

CPU_CFG<11>

=PEG_R2D_C_P<3>

=PEG_R2D_C_P<5> =PEG_R2D_C_P<6>

PCIE_T29_R2D_C_P<3>

NC_PEG_R2D_C_P<13>

CPU_CFG<2>

CPU_CFG<4>

FDI_DATA_N<4>

DMI_N2S_N<2>

DMI_S2N_N<3>

DMI_S2N_N<1>

DMI_S2N_P<2>

NC_PEG_D2R_N<14>

=PEG_D2R_P<5>

=PEG_D2R_P<0>

NC_PEG_D2R_N<15>

PCIE_T29_D2R_N<0> PCIE_T29_D2R_N<1> PCIE_T29_D2R_N<2> PCIE_T29_D2R_N<3>

=PEG_D2R_N<7>

NC_PEG_D2R_N<12>

DMI_S2N_N<2>

NC_PEG_R2D_C_N<13>

TP_EDP_TX_N<0>

CPU_CFG<3>

=PEG_D2R_N<4>

=PEG_D2R_N<0>

CPU_PEG_COMP

NC_PEG_D2R_P<15>

=PEG_R2D_C_N<0> =PEG_R2D_C_N<1>

FDI_LSYNC<1>

PP1V05_S0

FDI_INT

FDI_FSYNC<1>

FDI_FSYNC<0>

PCIE_T29_D2R_P<0>

PP1V05_S0

=PEG_D2R_N<1> =PEG_D2R_N<2> =PEG_D2R_N<3>

=PEG_D2R_N<5> =PEG_D2R_N<6>

FDI_LSYNC<0>

TP_EDP_TX_P<0> TP_EDP_TX_P<1> TP_EDP_TX_P<2> TP_EDP_TX_P<3>

CPU_EDP_HPD

=PEG_D2R_P<7>

10 OF 132

9 OF 101

9

23 90

9

23 90

9

23 90

9

23 90

9

23 90

9

23 90

9

23 90

9

23 90

9

23 90

9

23 90

9

23 90

9

23 90

9

23 90

28 30

26 30

23

9

23 90

9

23 90

23

23 90

9

23 90

9

23 90

9

23 90

90

6 7 9 10 12

13 14 16 17

20 22

23 35 39 44

67 69

72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

www.rosefix.com

www.vinafix.vn

BI BI BI BI BI

IN

OUT

IN IN

OUT

BI

DDR3 MISC

PWR MGMT

JTAG & BPM

CLOCKS

THERMAL

(2 OF 11)

PROC_SELECT*

PROC_DETECT*

SM_RCOMP_2

SM_RCOMP_1

SM_RCOMP_0

SM_VREF

SM_DRAMRST*

SM_DRAMPWROK

PM_SYNC

PREQ*

TMS

TRST*

TDI TDO

DBR*

BPM_0* BPM_1* BPM_2* BPM_3* BPM_4* BPM_5* BPM_6* BPM_7*

TCK

PRDY*

BCLK_ITP

BCLK_ITP*

UNCOREPWRGOOD

RESET*

THERMTRIP*

CATERR*

PECI

PROCHOT*

BCLK

BCLK*

DPLL_REF_CLK

DPLL_REF_CLK*

NC

OUT

BI

IN

OUT

IN IN

IN

OUT

IN

IN IN

IN

OUT

BI BI BI

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

Unused eDP CLK

(IPU)

(IPD)

(IPU) (IPU)

(IPU)

R1120 and R1121 are Intel recommended values

23 90

PLACE_NEAR=U1800.AY11:157mm

MF-LF 402

1/16W

5%

10K

R1111

1

2

17 29 90

19 23 90

29

16 90

17 90

19 90

19 44 90

1/16W MF-LF

1%

402

75

R1126

1

2

SANDY-BRIDGE

OMIT

BGA

MOBILE-REV1

U1000

D5 C6

K63 K65

C62 D61 E62 F63 D59 F61 F59 G60

H53

H61

AJ4 AJ2

F53

K53

J62 H65

B59

AH9

H51

K51

AY25

BE24

BJ46 BG46 BF45

BJ44

J58

K61 K59

F51

H59 H63

C60

PLACE_NEAR=U1000.BF45:12.7mm

1/16W

200

402

MF-LF

1%

R1114

1

2

PLACE_NEAR=U1000.BG46:12.7mm

MF-LF

1/16W

402

25.5

1%

R1113

1

2

402

1/16W MF-LF

140

1%

PLACE_NEAR=U1000.BJ46:12.7mm

R1112

1

2

90

1/16W

402

5%

MF-LF

68

R1101

1

2

NOSTUFF

402

MF-LF

1/16W

100

1%

PLACE_NEAR=U1000.BJ44:2.54mm

R1130

1

2

NOSTUFF

MF-LF

402

1/16W

100

1%

PLACE_NEAR=U1000.BJ44:2.54mm

R1131

1

2

NOSTUFF

X5R 402

PLACE_NEAR=U1000.BJ44:2.54mm

10%

0.1UF

16V

C1130

1

2

MF-LF 402

1K

5% 1/16W

R1141

1

2

1K

5% 1/16W MF-LF 402

R1140

1

2

402

5%

56

1/16W MF-LF

R1103

12

45 67 90

NOSTUFF

1K

201

1/20W

MF

5%

R1100

1

2

23 90

PLACE_NEAR=R1121.2:1mm

1/16W

1%

402

MF-LF

200

R1120

1

2

PLACE_NEAR=U1000.AY25:51.562mm

402

1%

MF-LF

1/16W

130

R1121

12

16 90

17 90

5% 1/16W

NOSTUFF

402

MF-LF

51

R1104

1

2

1%

402

43.2

MF-LF

1/16W

R1125

12

23 25

201

1/20W MF

NOSTUFF

1K

5%

R1102

1

2

23 25 90

23 90

CPU CLOCK/MISC/JTAG

PP1V05_S0

CPU_CATERR_L

CPU_DDR_VREF

CPU_SM_RCOMP<0>

PM_MEM_PWRGD_R

CPU_PWRGD

PM_SYNC

PLT_RESET_LS1V1_L

CPU_PROCHOT_R_L

CPU_PECI

PP1V05_S0

CPU_SM_RCOMP<2>

PLT_RST_CPU_BUF_L

XDP_BPM_L<7>

XDP_BPM_L<6>

XDP_BPM_L<4>

XDP_BPM_L<3>

XDP_BPM_L<2>

PP1V5_S3RS0_CPUDDR

PM_THRMTRIP_L

CPU_PROC_SEL_L

XDP_BPM_L<0>

XDP_CPU_PRDY_L

PP1V5_S3RS0_CPUDDR

XDP_BPM_L<1>

XDP_DBRESET_L

XDP_CPU_TDO

XDP_CPU_TRST_L

XDP_CPU_PREQ_L

ITPCPU_CLK100M_N

XDP_CPU_TMS

XDP_CPU_TCK

XDP_CPU_TDI

XDP_BPM_L<5>

CPU_PROCHOT_L

PP1V05_S0

DMI_CLK100M_CPU_N

DMI_CLK100M_CPU_P

PP1V05_S0_CPU_VCCPQE

ITPCPU_CLK100M_P

DPLL_REF_CLK_L

DPLL_REF_CLK

CPU_MEM_RESET_L

PM_MEM_PWRGD

CPU_SM_RCOMP<1>

11 OF 132 10 OF 101

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

7

10 13 15 29 71 72

7

10 13 15 29 71 72

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

7

12 14

www.rosefix.com

www.vinafix.vn

BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI

BI BI BI BI BI BI

BI

BI BI BI BI BI BI

BI

BI BI BI BI BI BI

BI

BI BI BI BI BI BI

BI

BI BI BI BI BI BI

BI

BI BI BI BI BI BI

BI

OUT

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

OUT OUT OUT

OUT

SA_CAS* SA_RAS* SA_WE*

SA_DQ_63

SA_DQ_62

SA_DQ_61

SA_DQ_60

SA_DQ_59

SA_DQ_58

SA_DQ_57

SA_BS_2

SA_BS_1

SA_BS_0

SA_DQ_47 SA_DQ_48 SA_DQ_49

SA_DQ_56

SA_DQ_55

SA_DQ_54

SA_DQ_53

SA_DQ_52

SA_DQ_51

SA_DQ_50

SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46

SA_DQ_36

SA_DQ_32 SA_DQ_33

SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31

SA_DQ_34 SA_DQ_35

SA_DQ_26

SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25

SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15

SA_DQ_9

SA_DQ_8

SA_DQ_7

SA_DQ_6

SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5

SA_DQ_0

SA_CK_1

SA_CK_0

SA_CKE_1

SA_CKE_0

SA_CK_1*

SA_CK_0*

SA_CS_1*

SA_CS_0*

SA_ODT_1

SA_ODT_0

SA_DQS_0* SA_DQS_1* SA_DQS_2* SA_DQS_3* SA_DQS_4* SA_DQS_5* SA_DQS_6* SA_DQS_7*

SA_DQS_0 SA_DQS_1

SA_DQS_3

SA_DQS_2

SA_DQS_5

SA_DQS_4

SA_DQS_6 SA_DQS_7

SA_MA_0 SA_MA_1

SA_MA_3

SA_MA_2

SA_MA_5

SA_MA_4

SA_MA_6 SA_MA_7 SA_MA_8 SA_MA_9

SA_MA_11

SA_MA_10

SA_MA_12

SA_MA_14

SA_MA_13

SA_MA_15

MEMORY CHANNEL A

(SYM 3 OF 11)

SB_CK_1*

SB_DQ_33

SB_CAS* SB_RAS* SB_WE*

SB_BS_0 SB_BS_1 SB_BS_2

SB_CK_0

SB_CK_0*

SB_CK_1

SB_CKE_0

SB_CKE_1

SB_DQ_0 SB_DQ_1

SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19

SB_DQ_2

SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29

SB_DQ_3

SB_DQ_30 SB_DQ_31 SB_DQ_32

SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39

SB_DQ_4

SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49

SB_DQ_5

SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59

SB_DQ_6

SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

SB_DQ_7 SB_DQ_8 SB_DQ_9

SB_CS_0* SB_CS_1*

SB_ODT_1

SB_ODT_0

SB_DQS_0* SB_DQS_1* SB_DQS_2* SB_DQS_3* SB_DQS_4* SB_DQS_5* SB_DQS_6* SB_DQS_7*

SB_DQS_0

SB_DQS_2

SB_DQS_1

SB_DQS_3 SB_DQS_4 SB_DQS_5

SB_DQS_7

SB_DQS_6

SB_MA_1

SB_MA_0

SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6

SB_MA_8

SB_MA_7

SB_MA_10 SB_MA_11

SB_MA_9

SB_MA_13

SB_MA_12

SB_MA_15

SB_MA_14

(SYM 4 OF 11)

MEMORY CHANNEL B

OUT OUT

OUT

OUT OUT

OUT

OUT OUT

BI BI BI BI BI BI BI BI

OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT

OUT OUT

OUT

OUT OUT

OUT

OUT OUT

BI BI BI BI BI BI BI BI

OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

26 27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 28 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

28 91

6

28 91

6

28 91

6

28 91

6

28 91

6

28 91

SANDY-BRIDGE

MOBILE-REV1

BGA

OMIT

U1000

BA36 BC38 BB19

BE44

BB31 BA32

AW34 AY33

BC18

BD17

BD41 BD45

AL6 AL8

AV7 AY5 AT5 AR6 AW6 AT9 BA6 BA8 BG6 AY9

AP7

AW8 BB7 BC8

BE4 AW12 AV11 BB11 BA12

BE8 BA10

AM5

BD11 BE12 BB49 AY49 BE52 BD51 BD49 BE48 BA52 AY51

AK7

BC54 AY53 AW54 AY55 BD53 BB53 BE56 BA56 BD57 BF61

AL10

BA60 BB61 BE60 BD63 BB59 BC58 AW58 AY59 AL60 AP61

AN10

AW60 AY57 AN60 AR60

AM9 AR10

AR8

AN6

AN8

AU8

AU6

BD5

BC6

BC10

BD9

BB51

BC50

BD55

BB55

BD61

BD59

AV61

AU60

BD27 BA28

AW38 AW22 BA20 BB45 BE20 AW18

BB27 AW26 BB23 BA24 AY21 BD21 BC22 BB21

BB41 BC46

BE36 BA44

BGA

MOBILE-REV1

SANDY-BRIDGE

OMIT

U1000

BJ38 BD37 AY29

BH39

BF33 BH33

BF37 BH37

BD25

BJ26

BE40 BH41

AL4 AK3

BA4 BB1 AV1 AU2 BA2 BB3 BC2

BF7 BF11 BJ10

AP3

BC4

BH7 BH11 BG10 BJ14 BG14 BF17 BJ18 BF13 BH13

AR2

BH17 BG18 BH49 BF47 BH53 BG50 BF49 BH47 BF53 BJ50

AL2

BF55 BH55 BJ58 BH59 BJ54 BG54 BG58 BF59 BA64 BC62

AK1

AU62 AW64 BA62 BC64 AU64 AW62 AR64 AT65 AL64 AM65

AP1

AR62 AT63 AL62 AM63

AR4

AV3

AU4

AN2

AN4

AW4

AW2

BF9

BH9

BH15

BF15

BH51

BF51

BF57

BH57

AY65

AY63

AN64

AN62

BF31 BH31

AY37 BJ30 AW30 BA40 BB29 BE28

BB37 BC34 BF27 BB33 BH27 BG30 BH29 BF29

BG42 BH45

BG38 BF39

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

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6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

26 27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

27 91

6

26 27 91

6

27 91

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

26 91

6

28 91

6

28 91

6

28 91

6

28 91

6

28 91

6

28 91

6

28 91

6

28 91

6

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6

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6

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6

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6

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6

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6

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6

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6

28 91

SYNC_DATE=06/15/2010

CPU DDR3 INTERFACES

MEM_B_DQS_N<2>

MEM_B_A<15>

MEM_B_A<14>

MEM_B_A<13>

MEM_B_A<12>

MEM_B_A<11>

MEM_B_A<10>

MEM_B_A<9>

MEM_B_A<8>

MEM_B_A<7>

MEM_B_A<6>

MEM_B_A<5>

MEM_B_A<4>

MEM_B_A<3>

MEM_B_A<2>

MEM_B_A<1>

MEM_B_A<0>

MEM_B_DQS_P<7>

MEM_B_DQS_P<6>

MEM_B_DQS_P<5>

MEM_B_DQS_P<4>

MEM_B_DQS_P<3>

MEM_B_DQS_P<2>

MEM_B_DQS_P<1>

MEM_B_DQS_P<0>

MEM_B_DQS_N<7>

MEM_B_DQS_N<6>

MEM_B_DQS_N<5>

MEM_B_DQS_N<4>

MEM_B_DQS_N<3>

MEM_B_DQS_N<1>

MEM_B_DQS_N<0>

MEM_B_ODT<1>

MEM_B_ODT<0>

MEM_B_CS_L<1>

MEM_B_CS_L<0>

MEM_B_DQ<1>

MEM_B_DQ<3>

MEM_B_DQ<2>

MEM_B_DQ<5>

MEM_B_DQ<7>

MEM_B_DQ<9>

MEM_B_CKE<1>

MEM_B_CLK_N<1>

MEM_B_CLK_P<1>

MEM_B_CKE<0>

MEM_B_CLK_N<0>

MEM_B_CLK_P<0>

MEM_B_WE_L

MEM_B_RAS_L

MEM_B_CAS_L

MEM_B_BA<2>

MEM_B_BA<1>

MEM_B_DQ<63>

MEM_B_DQ<62>

MEM_B_DQ<61>

MEM_B_DQ<60>

MEM_B_BA<0>

MEM_B_DQ<59>

MEM_B_DQ<58>

MEM_B_DQ<57>

MEM_B_DQ<56>

MEM_B_DQ<55>

MEM_B_DQ<54>

MEM_B_DQ<53>

MEM_B_DQ<52>

MEM_B_DQ<51>

MEM_B_DQ<50>

MEM_B_DQ<49>

MEM_B_DQ<48>

MEM_B_DQ<47>

MEM_B_DQ<46>

MEM_B_DQ<45>

MEM_B_DQ<44>

MEM_B_DQ<43>

MEM_B_DQ<42>

MEM_B_DQ<41>

MEM_B_DQ<40>

MEM_B_DQ<39>

MEM_B_DQ<38>

MEM_B_DQ<37>

MEM_B_DQ<36>

MEM_B_DQ<35>

MEM_B_DQ<34>

MEM_B_DQ<33>

MEM_B_DQ<32>

MEM_B_DQ<31>

MEM_B_DQ<30>

MEM_B_DQ<29>

MEM_B_DQ<28>

MEM_B_DQ<27>

MEM_B_DQ<26>

MEM_B_DQ<25>

MEM_B_DQ<24>

MEM_B_DQ<23>

MEM_B_DQ<22>

MEM_B_DQ<21>

MEM_B_DQ<20>

MEM_B_DQ<19>

MEM_B_DQ<18>

MEM_B_DQ<17>

MEM_B_DQ<16>

MEM_B_DQ<15>

MEM_B_DQ<14>

MEM_B_DQ<13>

MEM_B_DQ<12>

MEM_B_DQ<11>

MEM_B_DQ<10>

MEM_B_DQ<8>

MEM_B_DQ<6>

MEM_B_DQ<4>

MEM_B_DQ<0>

MEM_A_DQ<61>

MEM_A_DQ<60>

MEM_A_DQ<59>

MEM_A_DQ<56>

MEM_A_DQ<54>

MEM_A_DQ<53>

MEM_A_DQ<38>

MEM_A_DQ<24>

MEM_A_CLK_P<0> MEM_A_CLK_N<0>

MEM_A_A<15>

MEM_A_A<13> MEM_A_A<14>

MEM_A_A<10> MEM_A_A<11> MEM_A_A<12>

MEM_A_A<8> MEM_A_A<9>

MEM_A_A<7>

MEM_A_A<5> MEM_A_A<6>

MEM_A_A<4>

MEM_A_A<3>

MEM_A_A<2>

MEM_A_A<1>

MEM_A_A<0>

MEM_A_DQS_P<7>

MEM_A_DQS_P<6>

MEM_A_DQS_P<5>

MEM_A_DQS_P<4>

MEM_A_DQS_P<3>

MEM_A_DQS_P<2>

MEM_A_DQS_P<1>

MEM_A_DQS_P<0>

MEM_A_DQS_N<7>

MEM_A_DQS_N<6>

MEM_A_DQS_N<5>

MEM_A_DQS_N<4>

MEM_A_DQS_N<3>

MEM_A_DQS_N<2>

MEM_A_DQS_N<1>

MEM_A_DQS_N<0>

MEM_A_ODT<1>

MEM_A_ODT<0>

MEM_A_CS_L<1>

MEM_A_CS_L<0>

MEM_A_CKE<1>

MEM_A_CLK_N<1>

MEM_A_CLK_P<1>

MEM_A_CKE<0>

MEM_A_DQ<0>

MEM_A_DQ<5>

MEM_A_DQ<4>

MEM_A_DQ<3>

MEM_A_DQ<2>

MEM_A_DQ<1>

MEM_A_DQ<6> MEM_A_DQ<7> MEM_A_DQ<8> MEM_A_DQ<9>

MEM_A_DQ<15>

MEM_A_DQ<14>

MEM_A_DQ<13>

MEM_A_DQ<12>

MEM_A_DQ<11>

MEM_A_DQ<10>

MEM_A_DQ<25>

MEM_A_DQ<23>

MEM_A_DQ<22>

MEM_A_DQ<21>

MEM_A_DQ<20>

MEM_A_DQ<19>

MEM_A_DQ<18>

MEM_A_DQ<17>

MEM_A_DQ<16>

MEM_A_DQ<26>

MEM_A_DQ<35>

MEM_A_DQ<34>

MEM_A_DQ<31>

MEM_A_DQ<30>

MEM_A_DQ<29>

MEM_A_DQ<28>

MEM_A_DQ<27>

MEM_A_DQ<33>

MEM_A_DQ<32>

MEM_A_DQ<36>

MEM_A_DQ<46>

MEM_A_DQ<45>

MEM_A_DQ<44>

MEM_A_DQ<43>

MEM_A_DQ<42>

MEM_A_DQ<41>

MEM_A_DQ<40>

MEM_A_DQ<39>

MEM_A_DQ<37>

MEM_A_DQ<50> MEM_A_DQ<51> MEM_A_DQ<52>

MEM_A_DQ<55>

MEM_A_DQ<49>

MEM_A_DQ<48>

MEM_A_DQ<47>

MEM_A_BA<0> MEM_A_BA<1> MEM_A_BA<2>

MEM_A_DQ<57> MEM_A_DQ<58>

MEM_A_DQ<62> MEM_A_DQ<63>

MEM_A_WE_L

MEM_A_RAS_L

MEM_A_CAS_L

12 OF 132 11 OF 101

www.rosefix.com

www.vinafix.vn

(9 OF 11)

VIDALERT*

VCCSA_14 VCCSA_15 VCCSA_16

VCCSA_8

VCCIO_SEL

VCCPQE_3

VCCPQE_2

VCCPQE_1

VCCPQE_0

VCCPLL_2

VCCPLL_1

VCCPLL_0

VCCDQ_3

VCCDQ_2

VCCDQ_1

VCCDQ_0

VCCSA_1

VCCSA_0

VCCSA_3 VCCSA_4

VCCSA_2

VCCSA_5 VCCSA_6 VCCSA_7

VCCSA_9 VCCSA_10 VCCSA_11 VCCSA_12 VCCSA_13

VCCSA_17

VIDSOUT VIDSCLK

VCCSA_VID_0

VCC_SENSE

VCCSA_VID_1

VAXG_SENSE

VSS_SENSE

VSSAXG_SENSE

VCCIO_SENSE

VDDQ_SENSE

VSS_SENSE_VCCIO

VCCSA_SENSE

VSS_SENSE_VDDQ

VCC_VAL_SENSE

VCC_DIE_SENSE

VAXG_VAL_SENSE

VSS_VAL_SENSE

VSSAXG_VAL_SENSE

VSS_NCTF_0 VSS_NCTF_1 VSS_NCTF_2

VSS_NCTF_4

VSS_NCTF_3

VSS_NCTF_6

VSS_NCTF_5

VSS_NCTF_7

VSS_NCTF_9

VSS_NCTF_8

VSS_NCTF_11

VSS_NCTF_10

VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15

DC_TEST_D65

DC_TEST_D1

DC_TEST_C64

DC_TEST_C2

DC_TEST_BJ64

DC_TEST_BJ62

DC_TEST_BJ4

DC_TEST_BJ2

DC_TEST_BH65

DC_TEST_BH63

DC_TEST_BH3

DC_TEST_BH1

DC_TEST_BG64

DC_TEST_BG2

DC_TEST_BF65

DC_TEST_BF1

DC_TEST_B65

DC_TEST_B63

DC_TEST_B3

DC_TEST_A64

DC_TEST_A62

DC_TEST_A4

CORE POWER

(6 OF 11)

VCC_54 VCC_55 VCC_56 VCC_57 VCC_58

VCC_63

VCC_62

VCC_61

VCC_59 VCC_60

VCC_64 VCC_65 VCC_66 VCC_67 VCC_68

VCC_73

VCC_72

VCC_71

VCC_69 VCC_70

VCC_74 VCC_75 VCC_76 VCC_77 VCC_78 VCC_79

VCC_83

VCC_82

VCC_81

VCC_80

VCC_84 VCC_85 VCC_86 VCC_87 VCC_88 VCC_89

VCC_93

VCC_92

VCC_90 VCC_91

VCC_94 VCC_95 VCC_96 VCC_97 VCC_98 VCC_99

VCC_104

VCC_103

VCC_102

VCC_101

VCC_100

VCC_105 VCC_106 VCC_107

VCC_4

VCC_3

VCC_2

VCC_1

VCC_0

VCC_9

VCC_8

VCC_7

VCC_6

VCC_5

VCC_14

VCC_13

VCC_12

VCC_11

VCC_10

VCC_16

VCC_15

VCC_17 VCC_18 VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34 VCC_35 VCC_36 VCC_37 VCC_38 VCC_39 VCC_40 VCC_41 VCC_42 VCC_43 VCC_44 VCC_45 VCC_46 VCC_47 VCC_48 VCC_49 VCC_50 VCC_51 VCC_52 VCC_53

OUT OUT

OUT

BI

OUT

IN

OUT

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

HR_PPDG sections 6.2.1 and 6.3.1.

(IPU)

For Future Compatibility

PLACEMENT NOTE: Please place all sense line resistors on BOTTOM side. NOTE: Intel validation sense lines per doc 439028 rev1.0

BGA

OMIT

MOBILE-REV1

SANDY-BRIDGE

U1000

A4 A62 A64 B3 B63 B65 BF1 BF65 BG2 BG64 BH1 BH3 BH63 BH65 BJ2 BJ4 BJ62 BJ64 C2 C64 D1 D65

F49

B49

F47

B47

D47

AV23 AT23 AP23 AL23

AJ8

AW10

AK65 AK63 AK61

AV21 AT21 AP21 AL21

W17 W15

N16 N14 M17 M15 M12 M11 L18 L14

W12 U17 U15 U12 T16 T14 T11 N18

K3

AE10 AG10

AY19

B51

D51

A50

BJ60 BJ6

E64 E2 B61 B5 A60 A6

BH61 BH5 BE64 BE2 BD65 BD1 F65 F1

A46

AU10

AW20

C48

E50

A48

OMIT

SANDY-BRIDGE

MOBILE-REV1

BGA

U1000

R46 R42

N43

B29 A44 A40 A38 A34 A32 A28 A26

N39 N37 N33 N30 N26 N24 N20 M46 M42

R40

M40 M36 M34 M29 M27 M23 M21 L44 L40 L38

R36

L34 L32 L28 L26 L22 K45 K43 K41 K37 K35

R34

K31 K29 K25 J44 J40 J38 J34 J32 J28 J26

R29

H45 H43 H41 H37

H35 H31 H29 H25 G44 G40

R27 G38

G34 G32 G28 G26 F45 F43 F41 F37 F35

R23

F31 F29 F25 E44 E40 E38 E34 E32 E28 E26

R21

D45 D43 D41 D37 D35 D31 D29 C44 C40 C38

N45

C34 C32 C28 C26 B45 B43 B41 B37 B35 B31

67 90

69 90

64

MF-LF

402

10K

1/16W

5%

R1320

1

2

MF-LF

5%

0

1/16W

402

R1312

1 2

67 90

1%

402

1/16W

PLACE_NEAR=U1000.A50:2.54mm

MF-LF

130

R1302

1

2

5%

402

1/16W MF-LF

0

R1311

1 2

67 90

MF-LF

5%

PLACE_NEAR=U1000.B51:38mm

43

402

1/16W

R1310

1 2

67 90

75

MF-LF

1%

402

1/16W

PLACE_NEAR=R1310.1:2.54mm

R1300

1

2

1/16W MF-LF

10K

402

5%

R1313

1

2

PLACE_SIDE=BOTTOM

PLACE_NEAR=U1000.AU10:50.8mm

NOSTUFF

100

1/16W

402

MF-LF

1%

R1363

1

2

402

NOSTUFF

PLACE_NEAR=U1000.AW10:50.8mm

PLACE_SIDE=BOTTOM

MF-LF

1/16W

1%

100

R1362

1

2

NOSTUFF

PLACE_SIDE=BOTTOM

MF

1/20W

1%

49.9

201

R1370

1

2

49.9

PLACE_SIDE=BOTTOM

NOSTUFF

1%

MF

1/20W

201

R1371

1

2

PLACE_SIDE=BOTTOM

NOSTUFF

1%

MF

1/20W

49.9

201

R1364

1

2

PLACE_SIDE=BOTTOM

NOSTUFF

49.9

1%

MF

1/20W

201

R1365

1

2

PLACE_SIDE=BOTTOM

MF-LF

402

NOSTUFF

100

1/16W

1%

PLACE_NEAR=U1000.B47:50.8mm

R1360

1

2

PLACE_NEAR=U1000.A46:50.8mm

NOSTUFF

PLACE_SIDE=BOTTOM

MF-LF

1%

100

402

1/16W

R1361

1

2

MF-LF

1/16W

10K

402

5%

R1314

1

2

PLACE_NEAR=U1000.F49:50.8mm

402

1/16W

NOSTUFF

1%

PLACE_SIDE=BOTTOM

100

MF-LF

R1366

1

2

NOSTUFF

PLACE_SIDE=BOTTOM

PLACE_NEAR=U1000.E50:50.8mm

100

402

MF-LF

1% 1/16W

R1367

1

2

100

1/16W

1%

MF-LF 402

R1368

1

2

64

SYNC_DATE=08/03/2010

CPU POWER

SYNC_MASTER=K92_MLB

CPU_VCC_VALSENSE_N

CPU_AXG_VALSENSE_N

CPU_AXG_VALSENSE_P

CPU_VCC_VALSENSE_P

CPU_VCCSENSE_N

CPU_AXG_SENSE_N

CPU_VCCSASENSE

TP_CPU_DIE_SENSE

TP_CPU_VDDQSENSE_N

TP_CPU_VDDQSENSE_P

CPU_VCCIOSENSE_N

CPU_VCCIOSENSE_P

CPU_AXG_SENSE_P

CPU_VIDSCLK_R

CPU_VIDSOUT_R

CPU_VIDALERT_L_R

CPU_VCCSENSE_P

PPVCORE_S0_AXG

CPU_VCCSA_VID<1>

TP_DC_TEST_BF65

PPVCORE_S0_CPU PP1V05_S0

PP1V05_S0

CPU_VCCIO_SEL

CPU_VCCSA_VID<0>

DC_TEST_BH1_BG2

PPVCORE_S0_CPU

PP3V3_S0

DC_TEST_BH3_BJ2

DC_TEST_B65_C64

PPVCCSA_S0_REG

TP_DC_TEST_A4 TP_DC_TEST_A62

TP_DC_TEST_BF1

TP_DC_TEST_BJ62

TP_DC_TEST_D1 TP_DC_TEST_D65

DC_TEST_BJ64_BH63

DC_TEST_BG64_BH65

DC_TEST_B63_A64

TP_DC_TEST_BJ4

DC_TEST_B3_C2

PP1V5_S3_CPU_VCCDQ

PP1V05_S0

PP1V05_S0_CPU_VCCPQE

PP1V8_S0_CPU_VCCPLL_R

PPVCCSA_S0_REG

CPU_VIDALERT_L

CPU_VIDSCLK

CPU_VIDSOUT

PPVCORE_S0_CPU

PPVCORE_S0_AXG

13 OF 132 12 OF 101

7

12 13 15 48

68

6 7

12 14 48 68

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6

6 7

12 14 48 68

101

6 7

12 14 48 68

101

6 7

16 17 18 19 20 22 23 25 26

28 32 35 36 39 40 41 45 47 48

49 50 51 53 56 60 61 71 72 79

82 83 84 87 88 89 98

6

7

12

15 64

6

7

15

6 7 9

10 12 13 14 16 17 20 22

23 35 39 44 67 69 72

101

7

10 14

7

14

7

12 15 64

6 7

12 14

48 68

101

7

12 13

15 48 68

www.rosefix.com

www.vinafix.vn

VDDQ_0 VDDQ_1 VDDQ_2 VDDQ_3 VDDQ_4

VDDQ_9

VDDQ_8

VDDQ_7

VDDQ_5 VDDQ_6

VDDQ_10 VDDQ_11 VDDQ_12 VDDQ_13 VDDQ_14

VDDQ_19

VDDQ_18

VDDQ_17

VDDQ_15 VDDQ_16

VDDQ_20 VDDQ_21 VDDQ_22 VDDQ_23 VDDQ_24 VDDQ_25

VDDQ_29

VDDQ_28

VDDQ_27

VDDQ_26

VDDQ_30 VDDQ_31 VDDQ_32 VDDQ_33 VDDQ_34 VDDQ_35

VDDQ_39

VDDQ_38

VDDQ_36 VDDQ_37

VDDQ_40 VDDQ_41 VDDQ_42 VDDQ_43 VDDQ_44 VDDQ_45

VDDQ_50

VDDQ_49

VDDQ_48

VDDQ_47

VDDQ_46

VDDQ_51 VDDQ_52 VDDQ_53 VDDQ_54 VDDQ_55

VDDQ_60

VDDQ_59

VDDQ_58

VDDQ_56 VDDQ_57

VDDQ_61 VDDQ_62 VDDQ_63 VDDQ_64 VDDQ_65 VDDQ_66 VDDQ_67 VDDQ_68

VAXG_4

VAXG_3

VAXG_2

VAXG_1

VAXG_0

VAXG_9

VAXG_8

VAXG_7

VAXG_6

VAXG_5

VAXG_14

VAXG_13

VAXG_12

VAXG_11

VAXG_10

VAXG_16

VAXG_15

VAXG_17 VAXG_18 VAXG_19 VAXG_20 VAXG_21 VAXG_22 VAXG_23 VAXG_24 VAXG_25 VAXG_26 VAXG_27 VAXG_28 VAXG_29 VAXG_30 VAXG_31 VAXG_32 VAXG_33 VAXG_34 VAXG_35 VAXG_36 VAXG_37 VAXG_38 VAXG_39 VAXG_40 VAXG_41 VAXG_42 VAXG_43 VAXG_44 VAXG_45 VAXG_46 VAXG_47 VAXG_48 VAXG_49 VAXG_50 VAXG_51 VAXG_52 VAXG_53 VAXG_54 VAXG_55 VAXG_56 VAXG_57 VAXG_58 VAXG_59 VAXG_60 VAXG_61 VAXG_62 VAXG_63

IO POWER DDR3

GRAPHIC CORE POWER

(8 OF 11)

(10 OF 11)

VSS_85

VSS_84

VSS_83

VSS_82

VSS_81

VSS_80

VSS_79

VSS_78

VSS_77

VSS_76

VSS_75

VSS_74

VSS_73

VSS_72

VSS_71

VSS_70

VSS_69

VSS_68

VSS_67

VSS_66

VSS_65

VSS_64

VSS_63

VSS_62

VSS_61

VSS_60

VSS_59

VSS_58

VSS_57

VSS_56

VSS_55

VSS_54

VSS_53

VSS_52

VSS_51

VSS_50

VSS_49

VSS_48

VSS_47

VSS_46

VSS_45

VSS_44

VSS_43

VSS_42

VSS_41

VSS_40

VSS_39

VSS_38

VSS_37

VSS_36

VSS_35

VSS_34

VSS_33

VSS_32

VSS_31

VSS_30

VSS_29

VSS_28

VSS_27

VSS_26

VSS_25

VSS_24

VSS_23

VSS_22

VSS_21

VSS_20

VSS_19

VSS_18

VSS_17

VSS_15 VSS_16

VSS_10 VSS_11 VSS_12 VSS_13 VSS_14

VSS_5 VSS_6 VSS_7 VSS_8 VSS_9

VSS_0 VSS_1 VSS_2 VSS_3 VSS_4

VSS_171

VSS_170

VSS_169

VSS_168

VSS_167

VSS_164

VSS_163

VSS_165 VSS_166

VSS_162

VSS_161

VSS_160

VSS_159

VSS_158

VSS_157

VSS_153

VSS_152

VSS_154 VSS_155 VSS_156

VSS_151

VSS_150

VSS_149

VSS_148

VSS_147

VSS_143

VSS_142

VSS_144 VSS_145 VSS_146

VSS_141

VSS_140

VSS_139

VSS_138

VSS_137

VSS_132 VSS_133 VSS_134 VSS_135 VSS_136

VSS_131

VSS_130

VSS_129

VSS_128

VSS_127

VSS_126

VSS_123

VSS_122

VSS_124 VSS_125

VSS_121

VSS_120

VSS_119

VSS_118

VSS_117

VSS_116

VSS_112 VSS_113 VSS_114 VSS_115

VSS_111

VSS_110

VSS_109

VSS_108

VSS_107

VSS_106

VSS_102

VSS_101

VSS_103 VSS_104 VSS_105

VSS_100

VSS_99

VSS_98

VSS_97

VSS_96

VSS_92

VSS_91

VSS_93 VSS_94 VSS_95

VSS_90

VSS_89

VSS_88

VSS_87

VSS_86

(11 Of 11)

VSS_257

VSS_256

VSS_255

VSS_254

VSS_253

VSS_252

VSS_251

VSS_250

VSS_249

VSS_248

VSS_247

VSS_246

VSS_245

VSS_244

VSS_243

VSS_242

VSS_241

VSS_240

VSS_239

VSS_238

VSS_237

VSS_236

VSS_235

VSS_234

VSS_233

VSS_232

VSS_231

VSS_230

VSS_229

VSS_228

VSS_227

VSS_226

VSS_225

VSS_224

VSS_223

VSS_222

VSS_221

VSS_220

VSS_219

VSS_218

VSS_217

VSS_216

VSS_215

VSS_214

VSS_213

VSS_212

VSS_211

VSS_210

VSS_209

VSS_208

VSS_207

VSS_206

VSS_205

VSS_204

VSS_203

VSS_202

VSS_201

VSS_200

VSS_199

VSS_198

VSS_197

VSS_196

VSS_195

VSS_194

VSS_193

VSS_192

VSS_191

VSS_190

VSS_189

VSS_187 VSS_188

VSS_182 VSS_183 VSS_184 VSS_185 VSS_186

VSS_177 VSS_178 VSS_179 VSS_180 VSS_181

VSS_172 VSS_173 VSS_174 VSS_175 VSS_176

VSS_342

VSS_341

VSS_340

VSS_339

VSS_336

VSS_335

VSS_337 VSS_338

VSS_334

VSS_333

VSS_332

VSS_331

VSS_330

VSS_329

VSS_325

VSS_324

VSS_326 VSS_327 VSS_328

VSS_323

VSS_322

VSS_321

VSS_320

VSS_319

VSS_315

VSS_314

VSS_316 VSS_317 VSS_318

VSS_313

VSS_312

VSS_311

VSS_310

VSS_309

VSS_304 VSS_305 VSS_306 VSS_307 VSS_308

VSS_303

VSS_302

VSS_301

VSS_300

VSS_299

VSS_298

VSS_295

VSS_294

VSS_296 VSS_297

VSS_293

VSS_292

VSS_291

VSS_290

VSS_289

VSS_288

VSS_284 VSS_285 VSS_286 VSS_287

VSS_283

VSS_282

VSS_281

VSS_280

VSS_279

VSS_278

VSS_274

VSS_273

VSS_275 VSS_276 VSS_277

VSS_272

VSS_271

VSS_270

VSS_269

VSS_268

VSS_264

VSS_263

VSS_265 VSS_266 VSS_267

VSS_262

VSS_261

VSS_260

VSS_259

VSS_258

VSS_343

IO POWER

(7 OF 11)

VCCIO_33 VCCIO_34 VCCIO_35 VCCIO_36 VCCIO_37

VCCIO_42

VCCIO_41

VCCIO_40

VCCIO_38 VCCIO_39

VCCIO_43 VCCIO_44 VCCIO_45 VCCIO_46 VCCIO_47

VCCIO_52

VCCIO_51

VCCIO_50

VCCIO_48 VCCIO_49

VCCIO_53 VCCIO_54 VCCIO_55 VCCIO_56 VCCIO_57 VCCIO_58

VCCIO_62

VCCIO_61

VCCIO_60

VCCIO_59

VCCIO_63 VCCIO_64 VCCIO_65

VCCIO_4

VCCIO_3

VCCIO_2

VCCIO_1

VCCIO_0

VCCIO_9

VCCIO_8

VCCIO_7

VCCIO_6

VCCIO_5

VCCIO_16

VCCIO_15

VCCIO_14

VCCIO_13

VCCIO_12

VCCIO_11

VCCIO_10

VCCIO_17 VCCIO_18 VCCIO_19 VCCIO_20 VCCIO_21 VCCIO_22 VCCIO_23 VCCIO_24 VCCIO_25 VCCIO_26 VCCIO_27 VCCIO_28 VCCIO_29 VCCIO_30 VCCIO_31 VCCIO_32

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

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PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

SANDY-BRIDGE

MOBILE-REV1

BGA

OMIT

U1000

AH65 AH63

AE64 AE62 AE60 AD65 AD63 AD61 AD58 AD56 AB65 AB63

AH61

AB61 AB58 AB56 AA64 AA62 AA60

Y58 Y56 W64 W62

AH58

W60 V65 V63 V61 V58 V56 T65 T63 T61 T58

AH56

T56 R64 R62 R60 R55 R53 R48 N64 N62 N60

AG64

N58 N56 N52 N49 M65 M63 M61 M59 M55 M53

AG62

M48 L56 L52 L48

AG60 AF58 AF56

BJ36 BJ28

AY47 AY43 AY39 AY35 AY31 AY27 AY23 AV46 AV42 AV40

BG40

AV36 AV34 AV29 AV27 AU45 AU43 AU39 AU37 AU33 AU30

BG32

AU26 AU24 AT46 AT42 AT40 AT36 AT34 AT29 AT27 AR45

BD47

AR43 AR39 AR37 AR33 AR30 AR26 AR24 AP46 AP42 AP40

BD43

AP36 AP34 AP29 AP27 AN45 AN43 AN39 AN37 AN33 AN30

BD39

AN26 AN24 AL46 AL42 AL40 AL36 AL34 AL29 AL27

BD31 BD23 BB35

BGA

SANDY-BRIDGE

MOBILE-REV1

OMIT

U1000

BJ56 BJ52

BG60

AU47 AU41 AU35 AU28 AU22 AU16 AU14 AT61 AT57 AT50

BG56

AT44 AT38 AT31 AT25 AT19 AT11 AT7 AT3 AT1 AR54

BG52

AR47 AR41 AR35 AR28 AR22 AP65 AP63 AP57 AP50 AP44

BG48

AP38 AP31 AP25 AP19 AP17 AP15 AP12 AP11 AP9 AP5

BG44

AN54 AN47 AN41 AN35 AN28 AN22 AM61 AM7 AM3 AM1

BG36

AL57 AL50 AL44 AL38 AL31 AL25 AL19 AK16 AK14 AK11

BG28

AK9 AK5 AJ64 AJ62 AJ60 AJ57 AH7 AH3 AH1 AG57

BG24

AG17 AG15

BG20 BG16

BJ48

BG12

BG8

BF5 BE62 BE58 BE54 BE50 BE46 BE42 BE38

BJ40

BE34 BE30 BE26 BE22 BE18 BE14 BE10 BD35

BD7

BD3

BJ32

BC60 BC56 BC52 BC48 BC44 BC40 BC36 BC32 BC28 BC26

BJ24

BC24 BC20 BC16 BC12 BB65 BB63 BB47 BB39

BB9

BB5

BJ20

BA58 BA54 BA50 BA46 BA42 BA38 BA34 BA30 BA26 BA22

BJ16

BA18 BA14 AY61 AY11

AY7

AY3

AY1 AW56 AW52 AW48

BJ12

AW44 AW40 AW36 AW32 AW28 AW24

AW16 AV65 AV63 AV59

BJ8

AV57 AV50 AV44 AV38 AV31 AV25 AV19 AV9 AV5 AU54

SANDY-BRIDGE

BGA

MOBILE-REV1

OMIT

U1000

AG12 AF65 AF63 AF61 AF11

AF9

AF5 AE57 AD16 AD14

AD7

AD3

AD1 AC64 AC62 AC60 AC57 AB11

AB9

AB5 AA57 AA17 AA15 AA12

Y65

Y63

Y61

Y7 Y3

Y1 W57 V16 V14 V11

V9

V5 U64 U62 U60 U57

T7

T3

T1 R57 R50 R44 R38 R31 R25 R19 R17 R15 R12 P65 P63 P61 P11

P9

P5 N54 N47 N41 N35 N28 N22 M57 M50 M44 M38 M31 M25 M19

M7

M3

M1 L64 L62 L60 L58 L54 L50 L46 L42 L36 L30 L24

L20 L16 L12 L8 K39 K33 K27 K1 J64 J60 J56 J52 J48 J46 J42 J36 J30 J24 J22 J18 J14 J10 J6 H39 H33 H27 H3 G62 G58 G54 G50 G46 G42 G36 G30 G24 G20 G16 G12 G8 F39 F33 F27 E60 E56 E52 E48 E46 E42 E36 E30 E24 E22 E18 E14 E10 E6 E4 D63 D39 D33 D27 C58 C54 C50 C46 C42 C36 C30 C20 C16 C12 C8 B39 B33 B27 A56 A52 A42 A36 A30 A24 A20 A16 A12

A8

BGA

MOBILE-REV1

SANDY-BRIDGE

OMIT

U1000

AV55 AV53

AU20 AU18 AT55 AT53 AT48 AT17 AT15 AT12 AR58 AR56

AV48

AR52 AR49 AR20 AR18 AR16 AR14 AP55 AP53 AP48 AN58

AV17

AN56 AN52 AN49

AN20 AN18 AN16 AN14 AM11 AL55 AL53

AV15

AL48 AL17 AL15 AL12 AK58 AK56 AJ17 AJ15 AJ12 AH16

AV12

AH14 AH11 AF16 AF14 AE17 AE15 AE12 AD11 AC17 AC15

AU58

AC12 AB16 AB14 Y16 Y14 Y11

AU56 AU52 AU49

CPU POWER AND GND

PP1V05_S0PP1V05_S0

PP1V5_S3RS0_CPUDDR

PPVCORE_S0_AXG

14 OF 132 13 OF 101

6 7 9

10 12 13 14 16

17 20 22 23 35 39 44

67 69 72

101

6 7 9

10 12 13 14 16 17

20 22 23 35 39 44 67 69

72

101

7

10 15 29 71 72

7

12 15 48 68

www.rosefix.com

www.vinafix.vn

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

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REVISION

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SIZE

D

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PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

PLACEMENT_NOTE (C1620-C1623):

PLACEMENT_NOTE (C1624-C16D5):

PLACEMENT_NOTE (C1640-C1645):

Intel recommendation: 2x 330uF, 10x 10uF 0603, 26x 1uF 0402

Intel recommendation: 1x 10mOhn resistor, 1x 1uF 0402

CPU VCCIO/VCCPQ DECOUPLING

PLACEMENT_NOTE (C1600-C16C7):

PLACEMENT_NOTE (C1646-C1671):

PLACEMENT_NOTE (C1672-C1681):

Apple Implementation: 2x 330uF, 10x 10uF 0603, 26x 1uF 0402

CPU VCCPLL Low pass filter

Intel recommendation: 4x 470uF 4mOhm, 2x 470uF 4mOhm (NOSTUFF), 16x 22uF 0805, 4x 10uF 0603, 20x 1uF 0402, 28x 1uF 0402 (NOSTUFF) Apple Implementation: 4x 470uF 4mOhm, 1x 470uF 4mOhm (NOSTUFF), 16x 22uF 0603, 4x 10uF 0402, 20x 1uF 0402, 28x 1uF 0201 (NOSTUFF), 4x 22uF 0603 (NOSTUFF)

CPU VCORE DECOUPLING

CPU VCCPLL DECOUPLING

2

1

C1612

1UF

10% X5R

10V 402

2

1

C1611

10V

1UF

402

X5R

10%

2

1

C1610

10%

1UF

402

10V X5R

C16A4

0201

NOSTUFF

2

1

X5R

1UF

6.3V

20%

C16A3

2

1

1UF

X5R

6.3V 0201

20%

NOSTUFF

2

1

C1609

1UF

10% 10V X5R 402

2

1

C16A2

6.3V

1UF

X5R 0201

NOSTUFF

20%

2

1

C1608

1UF

402

X5R

10V

10%

2

1

C1607

10%

402

1UF

10V X5R

0201

2

1

C16A1

X5R

NOSTUFF

6.3V

20%

1UF

NOSTUFF

2

1

C16A0

1UF

X5R

20% 0201

6.3V

0603

X5R-CERM1

Place near inductors on bottom side.

CRITICAL

2

1

C1631

6.3V

20%

22UF

X5R

2

1

C1606

10% 10V

1UF

402

2

1

C1619

1UF

10% 10V X5R 402

2

1

C1605

1UF

10% 10V

402

X5R

2

1

C1618

1UF

X5R

10V

10%

402402

2

1

C1604

1UF

10% X5R

10V

2

1

C1617

1UF

10% 10V X5R 402

10V

2

Place on bottom side of U1000

C1603

1UF

1

10% X5R

402

10V

2

1

C1602

Place on bottom side of U1000

402

X5R

10%

1UF

2

1

C1616

1UF

10% 10V X5R 402

2

1

C1615

1UF

10% 10V X5R 402

X5R 402

1UF

1

2

C1601

10V

Place on bottom side of U100.

10%

2

1

C1614

1UF

402

X5R

10V

10%

2

1

C1600

402

10V X5R

10%

Place on bottom side of U1000

1UF

2

1

C1613

1UF

10% 10V X5R 402

0603

X5R-CERM1

CRITICAL

2

1

C1630

22UF

20%

Place near inductors on bottom side.

6.3V

0603

X5R-CERM1

C1629

CRITICAL

2

1

22UF

Place near inductors on bottom side.

20%

6.3V

Place near inductors on bottom side.

CRITICAL

3 2

1

C1643

2.0V D2T-SM

POLY-TANT

20%

470UF-4MOHM

0603

X5R-CERM1

C1627

CRITICAL

2

1

22UF

Place near inductors on bottom side.

20%

6.3V

0603

X5R-CERM1

2

CRITICAL

C1626

1

20%

Place near inductors on bottom side.

22UF

6.3V

3 2

1

470UF-4MOHM

POLY-TANT D2T-SM

20%

2.0V

Place near inductors on bottom side.

C1642

CRITICALCRITICAL

C1641

3 2

1

470UF-4MOHM

POLY-TANT

20%

2.0V

Place near inductors on bottom side.

D2T-SM

CRITICAL

3 2

1

C1640

POLY-TANT

470UF-4MOHM

2.0V

20%

D2T-SM

Place near inductors on bottom side.

2

1

C16A6

6.3V

NOSTUFF

1UF

X5R

20% 0201

6.3V

2

1

C16A5

NOSTUFF

X5R

1UF

0201

20%

Place near U1000 on bottom side

CRITICAL

CERM-X5R

6.3V

10UF

C1620

2

1

0402-1

20%

C1621

10UF

0402-1

CERM-X5R

6.3V

20%

CRITICAL

2

1

Place near U1000 on bottom side

20%

10UF

CRITICAL

2

1

C1622

0402-1

CERM-X5R

Place near U1000 on bottom side

6.3V

2

6.3V

CRITICAL

1

C1623

0402-1

10UF

CERM-X5R

20%

Place near U1000 on bottom side

0603

X5R-CERM1

20%

6.3V

Place near inductors on bottom side.

22UF

C1625

1

2

CRITICAL

0603

X5R-CERM1

CRITICAL

C1624

2

1

22UF

20%

Place near inductors on bottom side.

6.3V 0603

X5R-CERM1

C1628

CRITICAL

2

1

6.3V

Place near inductors on bottom side.

20%

22UF

0603

X5R-CERM1

CRITICAL

2

1

C1632

22UF

20%

6.3V

Place near inductors on bottom side.

0603

X5R-CERM1

CRITICAL

2

1

C1633

22UF

6.3V

20%

Place near inductors on bottom side.

0603

X5R-CERM1

6.3V

20%

22UF

Place near inductors on bottom side.

C1639

1

2

CRITICAL

0603

X5R-CERM1

Place near inductors on bottom side.

22UF

6.3V

20%

C1638

1

2

CRITICAL

0603

X5R-CERM1

Place near inductors on bottom side.

6.3V

20%

22UF

C1637

1

2

CRITICAL

0603

X5R-CERM1

22UF

C1636

CRITICAL

2

1

20%

6.3V

Place near inductors on bottom side.

0603

X5R-CERM1

Place near inductors on bottom side.

22UF

2

6.3V

CRITICAL

1

C1635

20%

0603

X5R-CERM1

2

1

22UF

6.3V

Place near inductors on bottom side.

20%

CRITICAL

C1634

C1644

470UF-4MOHM

3 2

1

NOSTUFF

D2T-SM

POLY-TANT

Place near inductors on bottom side.

20%

2.0V

2

1

C1686

1UF

10% 10V X5R

PLACE_NEAR=U1000.AK65:2.54 mm:NO_VIA

402

1

5% 1/16W MF-LF

402

2

R1600

0

2

1

C1685

PLACE_NEAR=U1000.AK63:2.54 mm:NO_VIA

402

X5R

10V

1UF

10%

2

1

C1684

1UF

402

X5R

10V

10%

2

1

C1658

10V

1UF

X5R 402

2

1

C1657

402

X5R

10V

10%

1UF

2

1

C1656

1UF

402

X5R

10% 10V

2

1

C1655

1UF

10% 10V X5R 402

2

1

C1654

10%

1UF

X5R

10V 402

2

1

C1653

402

10% 10V X5R

1UF

2

1

C1652

10V

10%

1UF

X5R 402402

2

1

C1651

1UF

10% 10V X5R

10V

2

1

C1650

1UF

402

X5R

10%

1UF

2

1

C1649

402

10V

Place on bottom side of U1000

10% X5R

C1648

2

1

Place on bottom side of U1000

1UF

10% X5R

10V 402

C1647

2

1

1UF

10V

Place on bottom side of U100.

402

X5R

10%

C1646

2

1

402

10V X5R

10%

Place on bottom side of U1000

1UF

C1664

2

1

1UF

10% 10V X5R 402

C1663

2

1

1UF

X5R

10V

10%

402

2

1

C1662

1UF

10V X5R 402

10%

2

1

C1661

10% 10V X5R

1UF

402

2

1

C1660

1UF

10% 10V X5R 402

2

1

C1659

1UF

402

X5R

10V

10%

10V X5R

2

1

C1671

1UF

402

10%

2

1

C1670

X5R

10V

10%

402

1UF

C1669

2

1

1UF

10% 10V X5R 402

C1668

2

1

1UF

10% 10V X5R 402

10V

C1667

2

1

1UF

10%

402

X5R

2

1

C1666

1UF

X5R

10V

10%

402

C1665

2

1

1UF

10% 10V X5R 402

CRITICAL

2

1

C1675

603

X5R

20%

6.3V

10UF

Place near U1000 on bottom side

CRITICAL

2

1

C1674

603

X5R

20%

10UF

6.3V

Place near U1000 on bottom side

CRITICAL

2

1

C1673

603

X5R

10UF

Place near U1000 on bottom side

20%

6.3V

CRITICAL

2

1

C1672

603

X5R

20%

Place near U1000 on bottom side

10UF

6.3V 603

CRITICAL

2

1

C1679

X5R

Place near U1000 on bottom side

6.3V

20%

10UF

CRITICAL

2

1

C1678

603

X5R

Place near U1000 on bottom side

6.3V

20%

10UF

CRITICAL

2

1

C1677

603

X5R

Place near U1000 on bottom side

20%

10UF

6.3V

CRITICAL

2

1

C1676

603

X5R

10UF

Place near U1000 on bottom side

20%

6.3V

CRITICAL

C1681

10UF

2

1

603

X5R

Place near U1000 on bottom side

6.3V

20%

2

CRITICAL

1

C1680

603

X5R

Place near U1000 on bottom side

10UF

20%

6.3V

CRITICAL

C1682

330UF-0.006OHM

2

1

Place near inductors on bottom side

CASE-D2-SM

POLY

2V

20%

21

R1601

0.010

1%

1/4W

MF

0603

NOSTUFF

2

1

C16A7

0201

6.3V

20% X5R

1UF

C16A8

2

1

6.3V 0201

20% X5R

1UF

NOSTUFF

2

1

C16A9

0201

6.3V

20% X5R

1UF

NOSTUFF

2

1

C16B0

0201

6.3V

20% X5R

1UF

NOSTUFF

2

1

C16B1

6.3V 0201

20% X5R

1UF

NOSTUFF

2

1

C16B2

6.3V 0201

20% X5R

1UF

NOSTUFF

2

1

C16B3

6.3V 0201

20% X5R

1UF

NOSTUFF

2

1

C16B4

6.3V 0201

20% X5R

1UF

NOSTUFF

2

1

C16B5

6.3V

20%

1UF

0201

X5R

NOSTUFF

2

1

C16B6

6.3V 0201

20% X5R

1UF

NOSTUFF

2

1

C16B7

6.3V 0201

20% X5R

1UF

NOSTUFF

2

1

C16B8

6.3V 0201

20% X5R

1UF

NOSTUFF

2

1

C16B9

6.3V 0201

20% X5R

1UF

NOSTUFF

1

C16C0

1UF

20% X5R

0201

NOSTUFF

2

6.3V

20%

1UF

0201

2

1

C16C7

X5R

6.3V

NOSTUFF

6.3V

C16C6

NOSTUFF

1UF

0201

1

20%

2

X5R

0201

1

NOSTUFF

1UF

6.3V

20% X5R

C16C5

2

0201

X5R

2

1

NOSTUFF

6.3V

20%

1UF

C16C4

2

1

X5R

6.3V 0201

20%

1UF

C16C3

NOSTUFF

20%

2

1

C16C1

6.3V 0201

X5R

1UF

NOSTUFF NOSTUFF

2

1

C16C2

6.3V 0201

20% X5R

1UF

0603

X5R-CERM1

Place near inductors on bottom side.

6.3V

20%

22UF

NOSTUFF

C16D3

1

2

0603

X5R-CERM1

NOSTUFF

6.3V

22UF

20%

Place near inductors on bottom side.

C16D2

1

2

0603

X5R-CERM1

6.3V

NOSTUFF

20%

22UF

Place near inductors on bottom side.

C16D1

1

2

0603

X5R-CERM1

NOSTUFF

22UF

6.3V

20%

Place near inductors on bottom side.

C16D0

1

2

CRITICAL

1

C1683

330UF-0.006OHM

2V

20% POLY

Place near inductors on bottom side

CASE-D2-SM

CRITICAL

2

1

C1687

CASE-D2-SM PLACE_NEAR=U1000.AK61:5 mm

POLY

20% 2V

330UF-0.006OHM

0603

X5R-CERM1

Place near inductors on bottom side.

6.3V

20%

22UF

NOSTUFF

C16D4

1

2

0603

X5R-CERM1

NOSTUFF

22UF

20%

6.3V

Place near inductors on bottom side.

C16D5

1

2

CPU DECOUPLING-I

SYNC_MASTER=K92_MLB

SYNC_DATE=08/19/2010

PP1V05_S0

PP1V8_S0_CPU_VCCPLL_R

PP1V05_S0_CPU_VCCPQE

PP1V8_S0

PPVCORE_S0_CPU

16 OF 132 14 OF 101

6 7 9

10 12

13 16 17 20

22 23 35 39

44 67 69 72

101

7

12

7

10 12

6 7

17 20 22 25 70 71 87

6 7

12 48 68

101

www.rosefix.com

www.vinafix.vn

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

PLACEMENT_NOTE (C1726-C1731):

PLACEMENT_NOTE (C1738-C1747):

Apple Implementation: 1x 330uF, 8x 10uF 0603, 10x 1uF 0402

CPU VDDQ/VCCDQ DECOUPLING

Intel recommendation: 1x 10mOhn resistor, 1x 1uF 0402

Apple Implementation: 2x 470uF 4mOhm, 1x 470uF 4mOhm (NOSTUFF), 6x 22uF 0603, 2x 22uF 0603 (NOSTUFF), 6x 10uF 0402, 2x 10uF 0402 (NOSTUFF), 9x 1uF 0402, 9x 1uF 0402 (NOSTUFF)

Intel recommendation: 1x 330uF, 5x 10uF 0603, 5x 1uF 0402

PLACEMENT_NOTE (C1758-C1762):

PLACEMENT_NOTE (C1700-C1708):

PLACEMENT_NOTE (C1718-C1723):

Intel recommendation: 1x 330uF, 8x 10uF 0603, 10x 1uF 0402

VAXG DECOUPLING

Intel recommendation: 2x 470uF 4mOhm, 2x 470uF 4mOhm (NOSTUFF), 6x 22uF 0805, 2x 22uF 0805 (NOSTUFF), 6x 10uF 0603, 2x 10uF 0603 (NOSTUFF), 9x 1uF 0402, 9x 1uF 0402 (NOSTUFF)

CPU VCCSA DECOUPLING

Apple Implementation: 1x 330uF, 5x 10uF 0603, 5x 1uF 0402

PLACEMENT_NOTE (C1734-C1735):

1UF

10% X5R

402

10V

NOSTUFF

C1717

1

2

1UF

X5R

10V

10%

NOSTUFF

402

C1716

1

2

1UF

402

X5R

10V

10%

NOSTUFF

C1715

1

2

1UF

10% 10V X5R 402

NOSTUFF

C1714

1

2

1UF

10% 10V X5R 402

NOSTUFF

C1713

1

2

X5R

10%

402

NOSTUFF

1UF

10V

C1712

1

2

X5R

NOSTUFF

402

10V

10%

1UF

C1711

1

2

10V

NOSTUFF

1UF

402

X5R

10%

C1710

1

2

10V 402

X5R

10%

1UF

NOSTUFF

C1709

1

2

X5R

10V

10%

402

1UF

C1708

1

2

1UF

10% 10V

402

X5R

C1707

1

2

402

10V

10%

1UF

X5R

C1706

1

2

0402-1

20%

NOSTUFF

10UF

6.3V CERM-X5R

C1725

1

2

Place close to U1000 on bottom side

0402-1

NOSTUFF

10UF

20%

6.3V CERM-X5R

Place close to U1000 on bottom side

C1724

1

2

0603

X5R-CERM1

Place near inductors on bottom side.

6.3V

20%

NOSTUFF

22UF

C1733

1

2

0603

X5R-CERM1

NOSTUFF

Place near inductors on bottom side.

6.3V

20%

22UF

C1732

1

2

1UF

402

10% 10V X5R

C1705

1

2

10UF

6.3V

20%

Place close to U1000 on bottom side

C1723

1

2

0402-1

CERM-X5R

1UF

402

10% X5R

10V

C1704

1

2

0402-1

20%

6.3V CERM-X5R

10UF

Place close to U1000 on bottom side

2

C1722

1

402

10V

1UF

10% X5R

Place on bottom side of U1000

C1703

1

2

0402-1

CERM-X5R

20%

10UF

Place close to U1000 on bottom side

6.3V

C1721

1

2

0603

X5R-CERM1

Place near inductors on bottom side.

20%

6.3V

22UF

C1731

1

2

0603

X5R-CERM1

22UF

20%

6.3V

Place near inductors on bottom side.

C1730

1

2

0603

X5R-CERM1

6.3V

Place near inductors on bottom side.

20%

22UF

C1729

1

2

Place near inductors on bottom side.

470UF-4MOHM

NOSTUFF

POLY-TANT D2T-SM

20%

2.0V

1

23

C1737

1UF

X5R 402

10V

10%

Place on bottom side of U1000

C1702

1

2

10V 402

Place on bottom side of U100.

X5R

10%

1UF

C1701

1

2

0402-1

10UF

20%

Place close to U1000 on bottom side

6.3V CERM-X5R

C1720

1

2

0402-1

6.3V

20%

Place close to U1000 on bottom side

CERM-X5R

10UF

C1719

1

2

1UF

402

10V

10%

Place on bottom side of U1000

X5R

C1700

1

2

20% CERM-X5R

0402-1

10UF

6.3V

Place close to U1000 on bottom side

C1718

1

2

0603

X5R-CERM1

6.3V

22UF

20%

Place near inductors on bottom side.

C1728

1

2

0603

X5R-CERM1

22UF

20%

Place near inductors on bottom side.

6.3V

C1727

1

2

2.0V

470UF-4MOHM

Place near inductors on bottom side.

20%

D2T-SM

POLY-TANT

C1735

1

23

0603

X5R-CERM1

22UF

Place near inductors on bottom side.

6.3V

20%

C1726

1

2

470UF-4MOHM

2.0V POLY-TANT

Place near inductors on bottom side.

20%

D2T-SM

C1734

1

23

402

10V

1UF

10% X5R

C1757

1

2

1UF

10% 402

10V X5R

C1747

1

2

X5R 402

1UF

10V

10%

C1746

1

2

1UF

10% 10V X5R 402

C1745

1

2

402

10V

10%

1UF

X5R

C1744

1

2

1UF

10% 10V

402

X5R

C1743

1

2

1UF

10% X5R

10V 402

C1742

1

2

Place on bottom side of U1000

402

1UF

10V

10% X5R

C1741

1

2

1UF

10V

10%

Place on bottom side of U1000

402

X5R

C1740

1

2

1UF

10V

Place on bottom side of U100.

X5R

10% 402

C1739

1

2

1UF

402

X5R

10%

Place on bottom side of U1000

10V

C1738

1

2

603

Place close to U1000 on bottom side

X5R

6.3V

10UF

20%

C1755

1

2

603

X5R

Place close to U1000 on bottom side

6.3V

20%

10UF

C1754

1

2

603

X5R

6.3V

Place close to U1000 on bottom side

20%

10UF

C1753

1

2

603

X5R

Place close to U1000 on bottom side

20%

6.3V

10UF

C1752

1

2

603

X5R

10UF

Place close to U1000 on bottom side

20%

6.3V

C1751

1

2

603

X5R

Place close to U1000 on bottom side

20%

6.3V

10UF

C1750

1

2

603

X5R

6.3V

20%

Place close to U1000 on bottom side

10UF

C1749

1

2

603

X5R

10UF

Place close to U1000 on bottom side

20%

6.3V

C1748

1

2

1UF

402

10% X5R

10V

C1762

1

2

1UF

10V 402

10% X5R

Place on bottom side of U1000

C1761

1

2

603

X5R

20%

10UF

6.3V

C1767

1

2

603

X5R

10UF

6.3V

20%

C1766

1

2

Place on bottom side of U1000

402

10V

10%

1UF

X5R

C1760

1

2

Place on bottom side of U100.

1UF

10V

10% X5R

402

C1759

1

2

603

X5R

6.3V

10UF

20%

C1765

1

2

603

X5R

10UF

20%

6.3V

C1764

1

2

402

10V

10%

1UF

Place on bottom side of U1000

X5R

C1758

1

2

X5R

10UF

20%

6.3V 603

C1763

1

2

0.010

1%

1/4W

MF

0603

R1700

1 2

270UF

CASE-B4-SM

2V TANT

20%

C1768

1

2

Place near inductors on bottom side

CASE-D2-SM

330UF-0.006OHM

2V

20% POLY

C1756

1

2

SYNC_DATE=08/19/2010

CPU DECOUPLING-II

SYNC_MASTER=K92_MLB

PPVCCSA_S0_REG

PP1V5_S3RS0_CPUDDR

PP1V5_S3_CPU_VCCDQ

PPVCORE_S0_AXG

17 OF 132 15 OF 101

7

12 64

7

10 13 29 71 72

7

12

7

12 13 48 68

www.rosefix.com

www.vinafix.vn

IN

OUT

IN

BI

OUT

BI

IN

IN OUT OUT

IN IN

OUT

OUT OUT

OUT

OUT OUT

IN

OUT OUT

OUT

IN

IN IN

IN

OUT

BI

OUT

BI

IN IN OUT OUT

OUT

BI

OUT

SATA1RXN

SATA0TXP

SATA0TXN

SATA2RXN SATA2RXP

SATA5RXP

SATA0RXP

LDRQ0*

RTCRST*

SRTCRST*

INTRUDER*

INTVRMEN

HDA_BCLK

HDA_SYNC

HDA_RST*

SPKR

HDA_SDIN0 HDA_SDIN1

HDA_SDIN3

HDA_SDIN2

HDA_SDO

HDA_DOCK_EN*/GPIO33 HDA_DOCK_RST*/GPIO13

JTAG_TCK

JTAG_TMS

JTAG_TDI

JTAG_TDO

SPI_CS0*

SPI_CLK

SPI_CS1*

SPI_MOSI

SPI_MISO

FWH0/LAD0

RTCX1 RTCX2

SATA1TXP

SATA0RXN

SERIRQ

LDRQ1*/GPIO23

FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

FWH4/LFRAME*

SATA1RXP SATA1TXN

SATA2TXN SATA2TXP

SATA3RXN SATA3RXP SATA3TXN SATA3TXP

SATA4RXN SATA4RXP SATA4TXN SATA4TXP

SATA5RXN

SATA5TXN SATA5TXP

SATAICOMPO SATAICOMPI

SATALED*

SATA0GP/GPIO21 SATA1GP/GPIO19

SATA3COMPI

SATA3RCOMP0

SATA3RBIAS

JTAG

SPI

SATA

LPC

IHDA

RTC

(1 OF 10)

(2 OF 10)

PCI-E*

PEG

FROM CLK BUFFER

CLOCK

FLEX

SMBUS

PEG_B_CLKRQ*/GPIO56

PEG_A_CLKRQ*/GPIO47

PCIECLKRQ4*/GPIO26

PCIECLKRQ3*/GPIO25

PCIECLKRQ1*/GPIO18

PCIECLKRQ0*/GPIO73

PERN3

PETP2

PETN2

PERP1

CL_RST1*

CL_DATA1

CL_CLK1

CLKIN_GND1_P

CLKIN_GND1_N

CLKOUT_ITPXDP_P

CLKOUT_ITPXDP_N

CLKOUTFLEX3/GPIO67

CLKOUTFLEX2/GPIO66

CLKOUTFLEX1/GPIO65

CLKOUTFLEX0/GPIO64

XCLK_RCOMP

XTAL25_OUT

XTAL25_IN

CLKIN_PCILOOPBACK

REFCLK14IN

CLKIN_SATA_N CLKIN_SATA_P

CLKIN_DOT_96P

CLKIN_DOT_96N

CLKIN_DMI_P

CLKIN_DMI_N

CLKOUT_DP_N CLKOUT_DP_P

CLKOUT_DMI_P

CLKOUT_DMI_N

CLKOUT_PEG_A_P

CLKOUT_PEG_A_N

CLKOUT_PEG_B_N CLKOUT_PEG_B_P

CLKOUT_PCIE5P

PCIECLKRQ5*/GPIO44

CLKOUT_PCIE4P

CLKOUT_PCIE5N

CLKOUT_PCIE3P

CLKOUT_PCIE4N

CLKOUT_PCIE3N

PCIECLKRQ2*/GPIO20

CLKOUT_PCIE2P

CLKOUT_PCIE2N

CLKOUT_PCIE1N CLKOUT_PCIE1P

CLKOUT_PCIE0N CLKOUT_PCIE0P

PETN1

PERN1

SMBCLK

SMBALERT*/GPIO11

PETP8

PERP8 PETN8

PETP7

PERN8

PETN7

PERP7

PERN7

PETN6 PETP6

PERP6

PERN6

PETP5

PETN5

PERP5

PETP4

PERN5

PETN4

PERP4

PETP3

PERN4

PETN3

PERP3

PERN2 PERP2

PETP1

SML1DATA/GPIO75

SML1CLK/GPIO58

SML1ALERT*/PCHHOT*/GPIO74

SML0DATA

SML0ALERT*/GPIO60

SML0CLK

SMBDATA

IN IN IN

IN

OUT OUT

IN

OUT

OUT OUT

NC

OUT

IN

OUT

IN

OUT

IN

IN OUT OUT

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

(IPU)

UNUSED clock terminations for FCIM MODE

376S0859 VGS 0.35~1V

Q1850 376S0859

R1849 cannot be used w/ VCCSUSHDA on S0

(IPU)

DOES THIS NEED LENGTH MATCH???

1.8V -> 1.1V

25

56 93

46 93

6

44 46 87 93

6

44 46 87 93

6

44 46 87 93

6

44 46 87 93

6

44 46 87 93

6

44 46

41 92

36 93

6

31 93

6

31 93

38 93

36 93

31 93

38 93

36 93

31 93

38 93

16 23 39

10 90

73 93

8

16 93

25 93

47 93

23 26 28 30 41 47 61 88 93

8

2

1

R1800

201

MF

330K

5%

1/20W

1M

MF 201

1/20W

5%

R1801

1

2

1

R1802

1/20W

MF

20K

5%

201

2

1

R1803

20K

5%

201

1/20W MF

2

1

C1803

10%

1UF

X5R 402

10V

2

1

1UF

10%

X5R

10V

402

C1802

2

1

R1830

PLACE_NEAR=U1800.Y11:2.54mm

201

1/20W

MF

37.4

1%

2

1

R1820

201

MF

1/20W

5%

10K

2

1

R1890

201

MF 1%

90.9

1/20W

PLACE_NEAR=U1800.Y47:2.54mm

201

1/20W

33

MF

5%

PLACE_NEAR=U1800.N34:1.27mm

R1810

1 2

21

R1811

201

1/20W

33

5%

PLACE_NEAR=U1800.L34:1.27mm

MF

PLACE_NEAR=U1800.K34:1.27mm

21

R1812

201

MF

33

5%

1/20W

21

R1813

PLACE_NEAR=U1800.A36:1.27mm

201

1/20W

MF

5%

33

56 93

47 93

16 33

21

R1860

33

201

1/20W

MF5%

21

R1861

1/20W

MF

33

5%

201

21

R1862

201

MF

33

1/20W

5%

21

20133MF

1/20W

R1863

5%

21

R1864

201

MF

33

1/20W

5%

2

1

R1832

201

1/20W

5%

750

MF

PLACE_NEAR=U1800.AH1:2.54mm

201

MF

1/20W

49.9

1%

R1831

1

2

PLACE_NEAR=U1800.AB12:2.54mm

2

1

R1870

MF

1/20W

5%

10K

201

2

1

R1871

10K

1/20W

201

MF

5%

V5

N34

K36

E36

D36

C37

B37

A38

T10

V4

U3

T1

T3

P3

Y11 Y10

AB1

AB3

Y1

Y3

AD1

AD3

Y5

Y7

AF1

AF3

AB10

AB8

AH1

AB13

AH4

AH5

AD5

AD7

AP10

AP11

AM8

AM10

P1

AP5

AM1

AM3

V14

C20

A20

H7

H1

K5

J3

L34

A36

A34

C34

G34

E34

K34

N32

C36

C38

Y14

D20

AB12

C17

G22

U1800

AP7

OMIT

FCBGA

MOBILE

COUGAR-POINT

K22

V49

V47

Y47

M16

E14

C13

G12

C8

A12

C9

H14

E12

K45

AY38

BB40

AV36

BB36

BB34

AU34

AY32

AU32

AW38

AY40

AU36

AY36

AY34

AV34

BB32

AV32

BC38

BJ40

BG38

BH37

BE36

BJ36

BF34

BJ34

BE38

BG40

BJ38

BG37

BF36

BG36

BE34

BG34

E6

M10

L14

L12

A8

V10

M1

J2

K49

H47

F47

K43

AB40

AB42

AB38

AB37

V46

V45

Y45

Y43

Y36

Y37

AA47

AA48

AB47

AB49

Y39

Y40

AK13

AK14

AM13

AM12

AU22

AV22

AK5

AK7

H45

BG30

BJ30

E24

G24

BE18

BF18

P10

T11

M7

U1800

FCBGA

OMIT

MOBILE

COUGAR-POINT

16 36

16 23 31

16

8

16 87

8

93

8

93

2

1

R1877

5%

1/20W

MF

4.7K

201

2

1

R1866

10K

NOSTUFF

1/20W

201

MF

5%

16 35

25

23

33 93

36 93

2

1

R1878

201

5%

1/20W

MF

4.7K

2

1

R1855

5%

201

MF

10K

1/20W

2

1

R1854

5%

10K

1/20W MF 201

2

1

R1853

5%

201

MF

1/20W

10K

2

1

R1848

MF

10K

5%

1/20W

201

1/20W

2

1

201

10K

5%

MF

R1847

2

1

R1833

5%

10K

MF

201

NOSTUFF

1/20W

10K

2

1

R1834

5%

201

MF

1/20W

2

1

R1843

5%

201

MF

1/20W

10K

2

1

R1846

1/20W

MF

5%

10K

201 201

2

1

R1845

5%

10K

MF

1/20W

2

1

R1844

MF

5%

1/20W

10K

201

2

1

R1842

5%

MF

10K

1/20W

201

2

1

R1869

1/20W

5%

MF

10K

201

2

1

R1876

10K

5%

201

1/20W

MF

2

1

R1849

NOSTUFF

10K

201

1/20W

5%

2 1

R1840

NOSTUFF

MF5%

1/20W

0

201

2 1

R1841

NOSTUFF

MF

1/20W

5%

201

0

16 23 41

21

R1872

1%

MF-LF

1/16W

604

402

2

1

R1873

1/20W

1%

1K

201

MF

25

1/20W MF

10K

5%

201

R1897

1

2

10K

5%

201

1/20W MF

R1896

1

2

10K

1/20W

5%

201

MF

1

2

R1895

10K

5%

201

1/20W MF

R1894

1

2

10K

5% 1/20W MF 201

R1893

1

2

10K

5% MF

201

1/20W

R1892

1

2

10K

201

5% MF

1/20W

R1891

1

2

16 23 84

2 1

R1888

201

0

MF

1/20W

5%

NOSTUFF

19 44

19

41 92

PCH SATA/PCIE/CLK/LPC/SPI

SYNC_MASTER=K91_MLB

SYNC_DATE=10/19/2010

PCH_SRTCRST_L

SATA_ODD_R2D_C_N SATA_ODD_R2D_C_P

TP_SATA_C_D2RN

TP_SATA_C_R2D_CN

TP_SATA_C_D2RP

TP_SATA_C_R2D_CP

SATA_HDD_D2R_P

SATA_ODD_D2R_P

SATA_ODD_D2R_N

SATA_HDD_R2D_C_N SATA_HDD_R2D_C_P

LPC_SERIRQ

SATA_HDD_D2R_N

NC_LPC_DREQ0_L

LPC_FRAME_R_L

PCIE_CLK100M_ENET_N

NC_PCIE_8_R2D_CP

PCH_GPIO11

PCIE_CLK100M_AP_N

PP3V3_S0

ITPXDP_CLK100M_P

NC_PCIE_8_R2D_CN

NC_PCIE_8_D2RP

NC_PCIE_6_R2D_CP

NC_PCIE_8_D2RN

NC_PCIE_6_D2RP NC_PCIE_6_R2D_CN

NC_PCIE_7_D2RN NC_PCIE_7_D2RP NC_PCIE_7_R2D_CN

NC_PCIE_6_D2RN

NC_PCIE_5_D2RP

NC_PCIE_5_D2RN

NC_PCIE_EXCARD_R2D_C_P

NC_PCIE_EXCARD_R2D_C_N

PCIE_ENET_R2D_C_P

NC_PCIE_EXCARD_D2R_N

PCIE_FW_R2D_C_P

PCIE_AP_R2D_C_N

PCIE_ENET_R2D_C_N

PCIE_AP_R2D_C_P

PCIE_AP_D2R_P

NC_PCIE_CLK100M_PE5N

SYSCLK_CLK25M_SB_R

EXCARD_CLKREQ_L

PCIE_CLK100M_ENET_P

NC_PCH_CLKOUT_DPN

SML_PCH_0_DATA

SML_PCH_1_DATA

PCIE_AP_D2R_N

PCH_CLKIN_GNDN1

ITPXDP_CLK100M_P

NC_CLINK_DATA

NC_CLINK_RESET_L

NC_PCH_GPIO67_CLKOUTFLEX3

ITPXDP_CLK100M_N

PCH_CLKIN_GNDP1

NC_CLINK_CLK

PCH_CLK100M_SATA_N

NC_PCH_GPIO66_CLKOUTFLEX2

PP1V05_S0

DMI_CLK100M_CPU_P

LPC_AD<0>

NC_PCH_GPIO64_CLKOUTFLEX0

PEG_CLKREQ_L

HDA_SDOUT_R

NC_PCH_GPIO65_CLKOUTFLEX1

HDA_BIT_CLK_R

SPI_CLK_R

RTC_RESET_L

PCH_INTRUDER_L

PEG_B_CLKRQ_L_GPIO56

PCIECLKRQ5_L_GPIO44

PCIE_CLK100M_AP_P

PCIE_CLK100M_FW_P

PCH_CLK96M_DOT_P

PCH_CLK100M_SATA_P

HDA_BIT_CLK_R

PCIE_CLK100M_T29_N

NC_PCIE_CLK100M_EXCARD_P

NC_PCH_CLKOUT_DPP

XDP_PCH_TDI

HDA_BIT_CLK

LPC_AD<1>

LPC_AD<2>

LPC_FRAME_L

DP_AUXCH_ISOL

PCIE_ENET_D2R_N PCIE_ENET_D2R_P

PP3V3_SUS

PCIE_FW_R2D_C_N

PCIE_FW_D2R_P

PCIE_FW_D2R_N

LPC_AD<3>

PP1V05_S0

PCIECLKRQ5_L_GPIO44

NC_PCIE_EXCARD_D2R_P

NC_SATA_D_R2D_CN

NC_SATA_F_R2D_CP

PCH_SATALED_L

NC_SATA_F_R2D_CN

NC_SATA_E_R2D_CP

NC_SATA_E_R2D_CN

NC_SATA_E_D2RP

HDA_SYNC_R

PCH_CLK33M_PCIIN

SYSCLK_CLK25M_SB_R

T29_CLKREQ_L

AP_CLKREQ_L

NC_PCIE_CLK100M_PE5P

PCH_XCLK_RCOMP

SML_PCH_1_ALERT_L

SML_PCH_1_CLK

PCH_CLK14P3M_REFCLK

PCH_CLK96M_DOT_N

PCIE_CLK100M_PCH_P

PCIE_CLK100M_PCH_N

DMI_CLK100M_CPU_N

PEG_CLK100M_P

PEG_CLK100M_N

SML_PCH_0_CLK

SML_PCH_0_ALERT_L

SMBUS_PCH_DATA

SMBUS_PCH_CLK

PCH_GPIO11

PP3V3_SUS

SYSCLK_CLK25M_SB

ITPCPU_CLK100M_N

HDA_RST_L

HDA_SDOUT

HDA_RST_R_L

ITPXDP_CLK100M_N

ITPCPU_CLK100M_P

SML_PCH_1_ALERT_L

SMC_SCI_L

NC_SATA_D_D2RN NC_SATA_D_D2RP

NC_PCIE_7_R2D_CP

NC_SATA_F_D2RP

HDA_SYNC

SATARDRVR_EN

NC_SATA_F_D2RN

NC_PCIE_5_R2D_CN NC_PCIE_5_R2D_CP

NC_PCIE_CLK100M_PEBP

NC_PCIE_CLK100M_PEBN

ENET_CLKREQ_L

SYSCLK_CLK32K_RTC

NC_HDA_SDIN3

NC_HDA_SDIN2

HDA_RST_R_L

XDP_PCH_TCK

XDP_PCH_TMS

XDP_PCH_TDO

SPI_MOSI_R

SPI_MISO

TP_SPI_CS1_L

PCH_CLK100M_SATA_P PCH_CLK96M_DOT_N PCH_CLK96M_DOT_P

PCH_SATA3COMP

PP1V05_S0

SATARDRVR_EN

JTAG_T29_TMS PCH_SPKR FW_CLKREQ_L AP_CLKREQ_L

ENET_CLKREQ_L

PP3V3_SUS

PP3V3_S0

PP3V3_T29

PP1V5_S0

HDA_SDOUT_R

HDA_SYNC_R

PEG_B_CLKRQ_L_GPIO56

SML_PCH_0_ALERT_L

FW_CLKREQ_L

PCIE_CLK100M_FW_N

NC_SATA_E_D2RN

NC_SATA_D_R2D_CP

PCIE_CLK100M_PCH_N

PCH_CLK100M_SATA_N

PCIE_CLK100M_PCH_P

T29_CLKREQ_L PEG_CLKREQ_L

PCH_CLK14P3M_REFCLK

PCH_SATALED_L EXCARD_CLKREQ_L

DP_AUXCH_ISOL

PCH_SATA3RBIAS

SPI_CS0_R_L

ENET_MEDIA_SENSE_RDIV

HDA_SDIN0

PCH_SPKR

PP3V3_S0

JTAG_T29_TMS

HDA_SDOUT_R

NC_HDA_SDIN1

HDA_SYNC_R

PCH_INTVRMEN_L

PCH_INTRUDER_L

PCH_INTVRMEN_L

RTC_RESET_L

PPVRTC_G3H

PCH_SRTCRST_L

PCIE_CLK100M_T29_P

NC_PCIE_CLK100M_EXCARD_N

PCH_SATAICOMP

LPC_R_AD<3>

PP3V3_S0

LPC_R_AD<0>

LPC_R_AD<1>

LPC_R_AD<2>

T29_PWR_EN_PCH

18 OF 132 16 OF 101

16

6

16

6 7

12 16 17 18 19 20 22 23

25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

16 23 90

6

16

16 23 90

6

8

16 23 90

6

8

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

8

16 93

8

16 93

16

16 93

16 23 84

7

16 17 18 19 20 22 45 70 71

72

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

16

6

16

6

16 93

16

6

16

7

16 17 18 19 20 22 45 70 71

72

10 90

16 93

16 23 90

10 90

16

6

16 23 41

6

16 93

92

6 7 9

10 12 13 14 16 17 20 22 23 35

39 44 67 69 72

101

16 33

16

16 23 39

16 23 31

16 36

7

16 17 18 19 20 22 45 70 71

72

6 7

12 16 17 18 19 20 22 23

25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61

71 72 79 82 83 84 87 88 89

98

7

20 22 25 41 56 70

16 93

16

6

16 93

16 35

8

16 87

16 93

16

6 7

12 16 17 18 19 20 22 23

25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

16 93

6

16 93

16

7

17 20 25

16

92

6 7

12 16 17 18 19 20 22 23

25 26 28 32 35 36 39 40 41 45

47 48 49 50

51 53 56 60 61 71 72 79 82 83 84 87 88 89 98

www.rosefix.com

www.vinafix.vn

IN

OUT

OUT OUT

IN

BI

OUT

IN

OUT

IN

OUT

IN

OUT

IN

OUT

(3 OF 10)

MANAGEMENT

SYSTEM POWER

DMI

FDI

DMI1RXN

DMI2RBIAS

FDI_RXP6

DMI3RXN

DMI0RXN

FDI_RXN5

FDI_RXN4

FDI_RXN2 FDI_RXN3

FDI_RXN1

FDI_RXN0

RI*

BATLOW*/GPIO72

PWROK

SYS_PWROK

SYS_RESET*

DMI_ZCOMP

DMI3TXP

DMI2TXP

DMI1TXP

DMI3TXN

DMI0TXP

DMI1TXN DMI2TXN

SUSACK*

SLP_SUS*

DSWVRMEN

DF_TVS

PMSYNCH

TP23

SLP_LAN*/GPIO29

SLP_A*

SLP_S4*

SLP_S5*/GPIO63

SUS_STAT*/GPIO61

SUSCLK/GPIO62

CLKRUN*/GPIO32

WAKE*

FDI_LSYNC1

FDI_FSYNC1

FDI_LSYNC0

FDI_FSYNC0

FDI_INT

FDI_RXP7

FDI_RXP4 FDI_RXP5

FDI_RXP2

FDI_RXP1

FDI_RXP3

FDI_RXP0

FDI_RXN7

FDI_RXN6

DRAMPWROK

DMI2RXN

DMI0TXN

DMI_IRCOMP

SLP_S3*

PWRBTN*

APWROK

RSMRST*

DMI0RXP DMI1RXP DMI2RXP DMI3RXP

DPWROK

SUSWARN*/SUSPWRDNACK/GPIO30

ACPRESENT/GPIO31

(4 OF 10)

DIGITAL DISPLAY INTERFACE

CRT

RSVD

DDPD_3P

DDPD_2P DDPD_3N

DDPD_2N

DDPD_1P

DDPD_1N

DDPD_0P

DDPD_0N

DDPD_HPD

DDPD_AUXN DDPD_AUXP

DDPD_CTRLDATA

DDPD_CTRLCLK

DDPC_3N DDPC_3P

DDPC_2N DDPC_2P

DDPC_1N

DDPC_0P

DDPC_1P

DDPC_0N

DDPC_HPD

DDPC_AUXP

DDPC_AUXN

DDPC_CTRLDATA

DDPC_CTRLCLK

DDPB_3P

DDPB_3N

DDPB_2N DDPB_2P

DDPB_1P

DDPB_1N

DDPB_0P

DDPB_HPD

DDPB_0N

DDPB_AUXP

DDPB_AUXN

SDVO_CTRLCLK

SDVO_CTRLDATA

SDVO_INTN SDVO_INTP

SDVO_STALLN SDVO_STALLP

SDVO_TVCLKINN SDVO_TVCLKINP

CRT_BLUE CRT_GREEN CRT_RED

CRT_DDC_CLK CRT_DDC_DATA

CRT_HSYNC CRT_VSYNC

CRT_IRTN

DAC_IREF

NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC

IN

OUT

IN

OUT

IN

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

Set to Vss when Low

DF_TVS:DMI & FDI Term Voltage

Set to Vcc when High

PD on SMC page

9

90

6 9

90

6 9

90

6 9

90

6 9

90

6 9

90

2

1

R1900

PLACE_NEAR=U1800.BJ24:12.7mm

MF

1%

49.9

1/20W

201

6

17 25 31 84

6

17 44 46

45

17 44 72

17 29 42 44 65 72

6

17 29 44 72

10 29 90

6

72

17 23 44

45

17 19 89

44

23 89

6

25 44

9

90

9

90

9

90

9

90

9

90

9

90

9

90

9

90

9

90

9

90

9

90

9

90

9

90

6 9

90

6 9

90

10 90

6

44 46

2

1

R1951

PLACE_NEAR=U1800.T43:2.54mm

5%

1K

MF

1/20W

201

2

1

R1909

201

1/20W

MF

5%

100K

2

1

R1920

201

PLACE_NEAR=U1800.BH21:2.54mm

1/20W MF

1%

750

2

1

R1981

5% MF

1/20W

201

2.2K

2 1

R1980

MF5%

1/20W

1K

201

P12

B9

AY16

K3

K16

N14

C12

G8

G16

D10

H4

K14

C21

A10

L22

E20

AP14

BH9

BJ10

BG12

BE12

BG13

BF14

BB14

BG14

BG9

BG10

BJ12

BC12

BH13

BE14

AY14

BJ14

BB10

AW16

BC10

AV12

A18

B13

E22

BJ24 BG25

AU18

AV18

BJ20

BG20

AY18

BB18

BJ18

BG18

BH21

AY20

AW20

BE20

AY24

AW24

BE24

BC24

AY1

N3

E10

L10

H20

U1800

MOBILE

FCBGA

COUGAR-POINT

OMIT

BC20

AV14

G10

F4

AP45

AP43

AM40

AM42

AP40

AP39

M39

P38

BG4

BF6

BF3

BE8

BD4

BC8

BB7

BB5

BB3

BB1

BA3

BA2

AY7

AY5

AY3

AV7

AV5

AV3

AV10

AV1

AU3

AU2

AT8

AT5

AT4

AT3

AT12

AT10

AT1

BH41

M36

M43

AT43

AT45

BG42

BJ42

BE42

BF42

BE44

BF44

BB45

BB43

AT38

P42

P46

AP49

AP47

BB49

BB47

BA48

BA47

AY45

AY43

AY49

AY47

AT40

AT47

AT49

AV49

AV47

AU47

AU48

AV46

AV45

AV40

AV42

T43

M49

T49

T42

P49

M40

T39

N48

U1800

COUGAR-POINT

OMIT

MOBILE

FCBGA

M47

2

1

R1915

390K

5% MF

1/20W

201

2

1

R1991

8.2K

5%

201

MF

1/20W

44 45 72

17

17 19 89

2

1

R1985

1K

1/20W

1%

201

MF

R1925

1K

2

1

1%

MF

201

1/20W

2

1

R1982

1/20W

MF

201

5%

10K

2

1

R1983

1/20W

MF

201

5%

10K

1/20W

R1905

10K

201

2

1

MF

5%

2 1

R1986

MF

0

5%

201

1/20W

17

17 72

2

1

R1921

100K

201

1/20W

MF

5%

2

1

R1922

100K

5%

MF

1/20W

201

2

1

R1923

100K

5%

MF

1/20W

201

2

1

R1924

201

1/20W

MF

5%

100K

6

17 25 31 84

PCH DMI/FDI/GRAPHICS

PP3V3_SUS

PP3V3_S5

PCH_RI_L

PP3V3_SUS

SUSWARN_L

SMC_ADAPTER_EN

PM_DSW_PWRGD

DMI_N2S_P<3>

DMI_S2N_P<1> DMI_S2N_P<2> DMI_S2N_P<3>

DMI_N2S_N<3>

PP3V3_S0

PM_CLKRUN_L

PM_SLP_SUS_L

PCH_DSWVRMEN

TP_PM_SLP_A_L

PM_SLP_SUS_L

PM_SLP_S5_L

PM_SLP_S3_L

TP_PCH_TP23

PM_SYNC

PM_SLP_S4_L

PCH_DF_TVS

PP1V8_S0

GPIO29_SLP_LAN_L

SUSWARN_L

PCH_SUSACK_L

CPU_PROC_SEL_L

PCH_DAC_IREF

DMI_N2S_N<1>

FDI_DATA_P<1>

FDI_DATA_P<3>

GPIO29_SLP_LAN_L

PCH_SUSACK_L

SUSWARN_L

PM_PWRBTN_L

PCIE_WAKE_L

PM_BATLOW_L

FDI_DATA_N<4>

FDI_DATA_N<2>

PM_RSMRST_L

PCH_DMI2RBIAS

DMI_N2S_N<2>

PP1V05_S0

DMI_N2S_N<0>

DMI_N2S_P<2>

DMI_N2S_P<1>

NC_CRT_IG_DDC_CLK

NC_CRT_IG_VSYNC

FDI_DATA_P<0>

FDI_DATA_N<6>

FDI_DATA_P<6>

FDI_DATA_P<5>

NC_DP_IG_C_MLP<2>

PPVRTC_G3H

NC_CRT_IG_BLUE NC_CRT_IG_GREEN

NC_CRT_IG_DDC_DATA

NC_DP_IG_C_MLN<3>

NC_DP_IG_MLN<3>

NC_DP_IG_MLP<2>

NC_DP_IG_MLN<2>

NC_DP_IG_MLP<1>

NC_DP_IG_C_CTRL_CLK NC_DP_IG_C_CTRL_DATA

NC_DP_IG_C_AUXP NC_DP_IG_C_HPD

NC_DP_IG_C_MLN<0> NC_DP_IG_C_MLP<0>

DP_IG_DDC_DATA

NC_DP_IG_MLN<0>

NC_DP_IG_MLN<1>

NC_DP_IG_MLP<0>

DP_IG_AUX_CH_N

DP_IG_DDC_CLK

NC_SDVO_INTP

NC_SDVO_INTN

NC_SDVO_STALLP

NC_SDVO_STALLN

FDI_DATA_N<5>

FDI_DATA_N<3>

FDI_DATA_N<1>

FDI_DATA_N<0>

FDI_DATA_N<7>

NC_DP_IG_D_MLP<0> NC_DP_IG_D_MLN<1>

NC_DP_IG_C_AUXN

NC_DP_IG_D_AUXN

NC_DP_IG_D_MLP<2>

NC_DP_IG_C_MLN<2>

NC_SDVO_TVCLKINN NC_SDVO_TVCLKINP

NC_DP_IG_D_MLP<3>

NC_DP_IG_D_MLP<1>

NC_DP_IG_D_MLN<0>

NC_DP_IG_D_HPD

NC_DP_IG_D_AUXP

NC_DP_IG_C_MLP<1>

NC_DP_IG_D_CTRL_DATA

NC_DP_IG_C_MLN<1>

NC_DP_IG_D_MLN<3>

NC_DP_IG_D_MLN<2>

DMI_S2N_N<3>

DP_IG_AUX_CH_P DP_IG_HPD

NC_DP_IG_MLP<3>

DMI_S2N_P<0>

FDI_DATA_P<4>

NC_CRT_IG_HSYNC

PM_PCH_PWROK

PM_PCH_SYS_PWROK

NC_CRT_IG_RED

PM_SYSRST_L

PCH_DMI_COMP

PM_MEM_PWRGD

NC_DP_IG_C_MLP<3>

NC_DP_IG_D_CTRL_CLK

PM_PCH_PWROK

DMI_S2N_N<2>

DMI_S2N_N<1>

DMI_N2S_P<0>

DMI_S2N_N<0>

FDI_LSYNC<0>

FDI_FSYNC<1>

PM_CLKRUN_L

LPC_PWRDWN_L

PM_SLP_S5_L

PM_SLP_S3_L

PM_CLK32K_SUSCLK_R

PM_SLP_S4_L

FDI_LSYNC<1>

PM_PWRBTN_L

PCIE_WAKE_L

FDI_DATA_P<2>

FDI_FSYNC<0>

FDI_INT

FDI_DATA_P<7>

PP3V3_SUS

PCIE_WAKE_L

MAKE_BASE=TRUE

PCIE_WAKE_L

19 OF 132 17 OF 101

7

16 17 18 19 20 22 45

70 71 72

6 7

19 20 22 23 24

25 29 39 45 55 65 70 71 72

82 85 89 98

7

16 17 18 19 20 22 45 70

71

72

17

6 7

12 16 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6

17 44 46

17 72

17 44 72

6

17 29 44 72

17 29 42 44 65 72

6 7 14 20 22 25 70 71 87

17

10 90

6 9

90

9

90

17

17 23 44

6

17 25 31 84

9

90

9

90

6 7 9

10 12 13 14 16 20 22 23 35 39 44 67

69 72

101

6

9

90

9

90

9

90

9

90

6 7

16 20 25

6

8

6

8

79 83

8

83 92

8

79 83

6

9

90

9

90

6 9

90

9

90

9

90

6

8

83 92

8

83

8

9

90

6

9

90

9

90

7

16 17 18 19 20 22 45 70 71 72

6

17 25 31 84

www.rosefix.com

www.vinafix.vn

OUT

USBP2N

USBP1N USBP1P

USBP0N USBP0P

OC7*/GPIO14

OC6*/GPIO10

OC5*/GPIO9

OC4*/GPIO43

OC3*/GPIO42

OC2*/GPIO41

OC1*/GPIO40

OC0*/GPIO59

USBRBIAS*

USBRBIAS

USBP13P

USBP13N

USBP12P

USBP12N

USBP11P

USBP11N

USBP10P

USBP10N

USBP9P

USBP9N

USBP8P

USBP8N

USBP7N USBP7P

USBP6N USBP6P

USBP5N USBP5P

USBP4P

USBP4N

USBP3P

USBP3N

USBP2P

PIRQA* PIRQB* PIRQC* PIRQD*

REQ1*/GPIO50

REQ3*/GPIO54

REQ2*/GPIO52

GNT2*/GPIO53

GNT1*/GPIO51

GNT3*/GPIO55

PIRQE*/GPIO2 PIRQF*/GPIO3 PIRQG*/GPIO4 PIRQH*/GPIO5

PME*

CLKOUT_PCI0

PLTRST*

CLKOUT_PCI2

CLKOUT_PCI1

CLKOUT_PCI3 CLKOUT_PCI4

LVDSA_DATA2*

LVDSA_DATA1*

LVDSA_DATA0*

LVDSA_DATA3*

LVDSA_DATA0

LVDSA_DATA2

LVDSA_DATA1

LVDSA_CLK*

LVDSA_DATA3

LVDSA_CLK

LVDSB_DATA0* LVDSB_DATA1* LVDSB_DATA2* LVDSB_DATA3*

LVDSB_DATA1

LVDSB_DATA0

LVDSB_DATA2 LVDSB_DATA3

LVDSB_CLK* LVDSB_CLK

L_BKLTEN

L_BKLTCTL

LVD_VREFL

LVD_VREFH

LVD_VBG

LVD_IBG

L_VDD_EN

L_CTRL_DATA L_DDC_CLK L_DDC_DATA

L_CTRL_CLK

(5 OF 10)

USB

PCI

LVDS

OUT OUT OUT

OUT OUT OUT OUT

OUT OUT

OUT

OUT OUT

OUT OUT OUT

OUT OUT

BI BI

OUT

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

Unused

USB HUB 1

USB HUB 2

Camera

87 92

COUGAR-POINT

FCBGA

OMIT

MOBILE

U1800

H49

J48 K42 H40

E42 F46

P45 J47

T45 P39 T40 K47

M45

AF37

AE48 AE47

AK40

AK39

AN47

AN48

AM49

AM47

AK49

AK47

AJ47

AJ48

AF40

AH43

AH45

AH49

AH47

AF47

AF49

AF43

AF45

A14 K20 B17 C16 L16 A16 D14 C14

K40 K38 H38 G38

G42 G40 C42 D44

C6

K10

C46 C44 E40

C24 A24

C30 A30

L32 K32

G32 E32

C32 A32

C25 B25

C26 A26

K28 H28

E28 D28

C28 A28

C29 B29

N28 M28

L30 K30

G30 E30

B33

C33

H43

AF39

AF36

D47

87 92

8

92

87 92

8

92

87 92

8

87 92

6 8

87 92

8

2.37K

1%

1/20W

MF

201

PLACE_NEAR=U1800.AF37:2.54mm

R2050

1

2

5%

MF

NOSTUFF

201

10K

1/20W

R2054

1

2

6 8

8

18 87

8

18 87

83

MF

1/20W

201

1 2

10K

5%

R2011

201

1

1/20W

2

10K

MF5%

R2012

201

MF5%

1/20W

10K

21

R2013

1/20W

MF

201

2

5%

1

R2016

10K

2

5% MF

10K

1

R2017

1/20W

201

1 2

5%

201

10K

1/20W

MF

R2018

1/20W

5% MF

R2030

21

10K

201

R2014

MF

1/20W

1 2

5%

201

10K

NOSTUFF

1/20W

MF

201

5%

10K

R2053

1

2

5%

NOSTUFF

10K

1/20W

MF

201

R2052

1

2

201

MF

1/20W

5%

100K

R2055

1

2

1/20W

10K

201

MF

5%

R2061

1

2

10K

MF

201

1/20W

5%

R2062

1

2

MF

1/20W

10K

5%

201

R2064

1

2

MF

201

5%

10K

1/20W

R2065

1

2

5% 1/20W MF 201

10K

R2067

1

2

10K

1/20W

201

MF

5%

R2069

1

2

10K

5%

201

1/20W MF

R2068

1

2

5% MF-LF

402

1/16W

100K

R2015

1

2

R2031

5%211/20W

10K

MF

201

24 92

1%

22.6

PLACE_NEAR=U1800.B33:2.54mm

MF

1/20W

201

R2070

1

2

5% MF

1/20W

1 2

201

10K

R2010

25 29 39

25

25 93

25

201

1/20W

5%

10K

MF

R2060

1

2

SYNC_DATE=07/06/2010

PCH PCI/FLASHCACHE/USB

SYNC_MASTER=K92_MLB

PP3V3_S0

PCI_REQ3_L

PCH_MLB_REVB_PD

JTAG_GMUX_TMS

PCI_INTC_L

PCI_INTB_L

PCI_INTA_L

AUD_IP_PERIPHERAL_DET

PCI_INTE_L

PCI_INTD_L

LVDS_IG_A_DATA_N<1>

LVDS_IG_A_DATA_N<0>

LPC_CLK33M_GMUX_R

LPC_CLK33M_SMC_R

PCH_PCI_GNT1_L

NC_USB_10P

ENET_PWR_EN

TP_LVDS_IG_B_CLKN

NC_LVDS_IG_B_DATAP<3>

AUD_I2C_INT_L

PLT_RESET_L

PCH_GPIO14_OC7_L

PP3V3_SUS

PP3V3_S3

SDCONN_STATE_RST_L

PCH_GPIO10_OC6_L

AP_PWR_EN

PCH_PCI_GNT2_L PCH_PCI_GNT3_L

LVDS_IG_A_DATA_N<2>

NC_LVDS_IG_A_DATAP<3>

LVDS_IG_A_DATA_P<0>

LVDS_IG_A_CLK_N

LVDS_IG_A_DATA_P<2>

LPC_CLK33M_LPCPLUS_R

NC_PCH_LVDS_VBG

LVDS_IG_B_DATA_N<1>

LVDS_IG_B_DATA_P<2>

NC_LVDS_IG_B_DATAN<3>

LVDS_IG_A_CLK_P

LVDS_IG_B_DATA_N<2>

PCH_PCI_GNT2_L

PCH_PCI_GNT3_L

NC_LVDS_IG_A_DATAN<3>

TP_LVDS_IG_B_CLKP

LVDS_IG_BKL_ON

LVDS_IG_DDC_DATA

LVDS_IG_B_DATA_P<0>

LVDS_IG_B_DATA_N<0>

LVDS_IG_B_DATA_P<1>

NC_LVDS_IG_CTRL_DATA

PCH_PCI_GNT1_L

LVDS_IG_PANEL_PWR

LVDS_IG_BKL_ON

PCH_LVDS_IBG

TP_LVDS_IG_BKL_PWM

LVDS_IG_PANEL_PWR NC_LVDS_IG_CTRL_CLK

LVDS_IG_DDC_CLK

LVDS_IG_A_DATA_P<1>

USB_HUB1_UP_P

USB_HUB1_UP_N

NC_USB_1N

NC_USB_2N

NC_USB_3N

NC_USB_1P

NC_USB_2P

NC_USB_3P

NC_USB_4N NC_USB_4P

NC_USB_5N NC_USB_5P

NC_USB_6N NC_USB_6P

NC_USB_7N NC_USB_7P

USB_HUB2_UP_N USB_HUB2_UP_P

USB_CAMERA_N USB_CAMERA_P

NC_USB_10N

NC_USB_11N

NC_USB_13P

NC_USB_13N

NC_USB_12P

NC_USB_12N

NC_USB_11P

PCH_GPIO43_OC4_L SDCONN_STATE_CHANGE

USB_HUB_SOFT_RESET_L

PCH_USB_RBIAS

NC_PCI_PME_L

PCH_CLK33M_PCIOUT

NC_PCI_CLK33M_OUT3

T29_MCU_INT_L

20 OF 132 18 OF 101

6 7

12 16 17 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

87

61

25

18

23

61

23

7

16 17 19 20 22 45 70 71 72

6 7 8

19 24 25 29 30 31 32 47

48 49 53 54 71 72 87

23

31 72

18

6

18

6

18

8

18 87

8

18 87

6

31

23

23 32

23 24

92

6

84

www.rosefix.com

www.vinafix.vn

OUT

BI

IN

CPU

NCTF

MISC

(6 OF 10)

GPIO

RSVD

TP38

SATA3GP/GPIO37

TACH5/GPIO69

TP18

STP_PCI*/GPIO34

GPIO15

SATA4GP/GPIO16

CLKOUT_PCIE7P

A20GATE

TACH3/GPIO7

LAN_PHY_PWR_CTRL/GPIO12

GPIO8

TACH0/GPIO17

GPIO24/MEM_LED

SCLOCK/GPIO22

GPIO27

GPIO28

GPIO35

SATA2GP/GPIO36

SLOAD/GPIO38

SDATAOUT0/GPIO39

PCIECLKRQ6*/GPIO45

PCIECLKRQ7*/GPIO46

SATA5GP/GPIO49

SDATAOUT1/GPIO48

TACH4/GPIO68

GPIO57

TACH6/GPIO70

TACH7/GPIO71

CLKOUT_PCIE6N

CLKOUT_PCIE7N

CLKOUT_PCIE6P

BMBUSY*/GPIO0

TACH2/GPIO6

TACH1/GPIO1

PECI

RCIN*

THRMTRIP*

PROCPWRGD

TP1

TP2

TP3

TP4

TP6

TP5

TP7

TP8

TP9

TP10

TP11

TP12

TP13

TP14

TP15

TP16

TP17

TP19

TP20

TP21

TP22

TP24

TP25

TP26

TP27

TP29

TP28

TP30

TP31

TP32

TP33

TP34

TP35

TP36

NC_1

INIT3_3V*

TP40

TP39

TP37

VSS_NCTF

VSS_NCTF VSS_NCTF

VSS_NCTF

VSS_NCTF VSS_NCTF

VSS_NCTF

VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF

VSS_NCTF

VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF

TS_VSS1 TS_VSS2 TS_VSS3

VSSADAC

TS_VSS4

IN

NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC NC

NC NC NC NC

IN

OUT

IN

BI

IN

OUT

NC

OUT

IN

Y

A

B

08

Y

A

B

08

Y

A

B

08

Y

A

B

08

OUT

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

GPIO ISOLATION CIRCUIT

(PUs necessary?)

(PU necessary?)

(IPU)

This has internal pull up and should not pulled low.

THIS SIGNAL IS INTENDED FOR FIRMWARE HUB AND WE ARE NOT USING IT.

ALL RSVD TPs NC-ed per INTEL approval

PD on audio page

(NC-ed per Intel chklist)

10 23 90

23 29

6

46

1/20W

201

5%

43

MF

R2170

1 2

NOSTUFF

5%

0

1/20W

201

MF

R2140

1 2

19 23

BG16

AH37

AH38

M20

BJ26

BD1

B47

AM5

L24

BJ44

AB45

BC30

C41

M3

N2

M5

FCBGA

MOBILE

COUGAR-POINT

OMIT

U1800

P4

T7 V40

V42

V38 V37

G2

E8

E16

P8

K4

D6

C10

T14

C4

P37

T13

K12

AU16

AY11

V8

U2

V3

T5

V13

K1

D40

A42

H36

E38

C40

B41

AY10

BG26

C18

N30

AM4

Y13

K24

AB46

BE32

BC28

BH25

BE30

BF32

BG32

AV26

BB26

AU28

AY30

AU26

AY26

AV28

BJ16

AW30

AK43

AK45

AH8 AK11 AH10 AK10

BE1 BE49

BF1 BF49

BG2 BG48

BH3 BH47

BJ4

A45

BJ45 BJ46

BJ5

BJ6

C2

C48

D1

D49

E1

E49

A46

F1

F49

A5

B3

BD49

U47

BJ32

BG46

BE28

B21

A6

A44

A4

A40

AH12

H3

P5

19 87

201

1/20W

MF

NOSTUFF

1K

5%

R2130

1

2

1/20W

201

10K

MF

5%

R2185

1

2

8

19 39

19 23

19 41

8

19 23 33 87

8

19 33 87

6

19 46 55

10 90

MF

390

1/20W

5%

201

R2156

1 2

MF

201

10K

R2160

1

2

5%

1/20W

MF

201

1/20W

5%

10K

R2184

1

2

MF

201

1/20W

10K

5%

R2186

1

2

5%

10K

1/20W

MF

201

R2172

1

2

MF

201

10K

5%

1/20W

R2173

1

2

10K

MF

201

5%

1/20W

R2174

1

2

5%

10K

201

1/20W

MF

R2175

1

2

1/20W

10K

5%

MF

201

NOSTUFF

R2115

1

2

MF

10K

201

5%

1/20W

R2114

1

2

1

R2192

201

5%

10K

1/20W

MF

2

201

MF

1/20W

5%

100K

R2193

1

2

MF

1/20W

201

5%

20K

1

2

R2111

10K

5%

1/20W

201

MF

R2112

1

2

MF

1/20W

201

5%

10K

R2113

1

2

R2190

100K

5%

201

MF

1

2

1/20W

2

1

R2199

10K

MF

1/20W

201

5%

2

1

R2198

5%

10K

201

MF

1/20W

5%

10K

1/20W

MF

201

R2196

1

2

201

MF

5%

10K

1/20W

NOSTUFF

R2197

1

2

5%

10K

201

1/20W

MF

R2155

1

2

10K

201

1/20W

MF

5%

R2150

1

2

16 19 44

19 23

2

1

R2116

NOSTUFF

MF

201

10K

5%

1/20W

10K

R2194

1/20W

5%

201

MF

1

2

10K

5%

1/20W

MF

201

R2191

1

2

MF

1/20W

NOSTUFF

201

5%

10K

R2117

1

2

8

19 33 87

19 72

19

19 44

C2150

2

1

10V

0.1UF

CERM

20%

402

2

1

8

4

CRITICAL

U2150

74LVC2G08GT

SOT833

7

SOT833

4

8

5

6

3

U2150

74LVC2G08GT

1

10V

402

2

CERM

20%

0.1UF

C2152

74LVC2G08GT

CRITICAL

4

8

1

2

U2152

7

SOT833

6

5

8

4

3

SOT833

74LVC2G08GT

U2152

32 36

39

61

35

R2180

201

5%

1 2

MF

1/20W

0

PCH MISC

SYNC_MASTER=K91_MLB

SYNC_DATE=10/20/2010

ISOLATE_CPU_MEM_L

T29_SW_RESET_L_R

T29_SW_RESET_L

NC_GPIO35

WOL_EN

JTAG_ISP_TDI

ENET_LOW_PWR_PCH

T29_PWR_EN

AUD_IPHS_SWITCH_EN

FW_PWR_EN

ENET_LOW_PWR

PP3V3_S0

SMC_RUNTIME_SCI_L

JTAG_ISP_TDO FW_PLUG_DET_L

PCH_GPIO15

PP3V3_SUS

PCH_GPIO69_TACH5

WOL_EN

PP3V3_S0

PCH_GPIO71_TACH7

PCH_GPIO12

NC_PCIE_CLK100M_PE6P

CPU_PWRGD

CPU_PECI

NC_PCIE_CLK100M_PE7N NC_PCIE_CLK100M_PE7P

PCH_INIT3V3_L

NC_PCIE_CLK100M_PE6N

PCH_GPIO46

PM_THRMTRIP_L

SMC_SCI_L

PP3V3_S5

PCH_GPIO68_TACH4

PCH_GPIO70_TACH6

JTAG_ISP_TCK

PP3V3_S0

GMUX_INT

PCH_GPIO15

SMC_RUNTIME_SCI_L

PP3V3_SUS

PCH_GPIO68_TACH4

FW_PWR_EN_PCH

PCH_GPIO12

FW_PLUG_DET_L

PM_THRMTRIP_L_R

PCH_PROCPWRGD

PCH_RCIN_L

FW_PWR_EN_PCH

PCH_GPIO71_TACH7

PP3V3_T29

SPIROM_USE_MLB

PCH_GPIO0

ENET_LOW_PWR_PCH

SPIROM_USE_MLB

PCH_GPIO69_TACH5

PCH_GPIO24

PP3V3_S0

PCH_INIT3V3_L

PCH_GPIO46

JTAG_ISP_TDO

T29_SW_RESET_L

JTAG_ISP_TDI PCH_GPIO36_SATA2GP

PP3V3_T29

PP3V3_S0

PCH_GPIO0

PM_PCH_PWROK

ENET_LOW_PWR_PCH

PM_PCH_PWROK

FW_PWR_EN_PCH

AUD_IPHS_SWITCH_EN_PCH

PM_PCH_PWROK

T29_PWR_EN_PCH

PP3V3_S3

SMC_SCI_L

PCH_PECI

PCH_A20GATE

PCH_GPIO36_SATA2GP

PCH_GPIO24

ODD_PWR_EN_L

LPCPLUS_GPIO

AUD_IPHS_SWITCH_EN_PCH

JTAG_ISP_TCK

ODD_PWR_EN_L

GMUX_INT

PM_PCH_PWROK

PP3V3_S3

21 OF 132 19 OF 101

19 35

19 23

6 7

12 16 17 18 19 20 22 23

25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

19 44

8

19 33 87

8

19 39

19

7

16 17 18 19 20 22 45 70 71

72

19

19 72

6 7

12 16 17 18

19 20 22

23 25 26 28 32

35 36 39

40 41 45 47 48

49 50 51

53 56 60 61 71

72 79 82

83 84 87 88 89

98

19

6

10 44 90

6

19

6

19 23

16 19 44

6 7

17 20 22 23 24 25 29 39

45 55 65 70 71 72 82 85 89 98

19

6 7

12 16 17 18 19 20

22 23 25 26 28 32 35 36 39 40

41 45 47 48 49 50 51

53 56 60 61 71 72 79 82 83

84 87 88 89 98

19

7

16 17 18 19 20 22 45 70

71 72

19

45

19

7

16 19 25

33 34 35 87

6

19 46 55

19 23

19

6 7

12 16

17 18 19 20

22 23 25

26 28 32 35

36 39 40

41 45 47 48

49 50 51

53 56 60 61 71 72 79 82 83 84 87 88 89 98

19

19 23

19 35

8

19 33

87 19 23

7

16 19 25 33 34 35 87

6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

17 19 89

19 23

17 19 89

19

19 23

17 19 89

16

6 7 8

18 19 24 25 29 30 31 32

47 48 49 53 54 71 72 87

19 23

19

8

19 23 33 87

19 41

19 87

17 19 89

6 7 8

18 19 24 25 29 30 31 32

47 48 49 53 54 71 72 87

www.rosefix.com

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VSSALVDS

VCCTX_LVDS

VCCDFTERM

VCCALVDS

VCCVRM_3_DMI

VCC3_3_7_HVCMOS

VCC3_3_5_PCI

VCCDFTERM

VCCSPI

VCCDFTERM

VCC3_3_6_HVCMOS

VCCIO_18_FDI

VCCIO_21_PCIE

VCCIO_20_PCIE

VCCIO_11_PLLPCIE

VCCIO_25_PCIE

VCCIO_24_PCIE

VCCCLKDMI

VCCCORE

VCCIO_27_DP

VCCIO_26_PCIE

VCCIO_19_PCIE

VCCIO_22_PCIE

VCCIO_10_PLLFDI

VCCIO_23_PCIE

VCCIO_17_FDI

VCCIO_28_DP

VCCDMI_0_FDI

VCCAPLLEXP

VCCCORE

VCCDMI_1_DMI

VCCCORE VCCCORE VCCCORE

VCCAFDIPLL

VCCCORE

VCCVRM_2_FDI

VCCADAC

VCCCORE

FDI CRT

DFT/SPI

DMI

HVCMOS

VCCIO

VCC CORE

LVDS

(7 OF 10)

VCCSUSHDA

VCCSUS3_3_3_USB VCCSUS3_3_4_USB

VCCSUS3_3_2_USB

VCCSUS3_3_1_USB

VCCIO_4_USB

VCCIO_2_USB VCCIO_3_USB

VCCIO_1_USB

VCCIO_0_USB

VCCASW_0_MISC

VCCASW_2_MISC VCCASW_1_MISC

VCCIO_8_SATA

VCCIO_6_SATA VCCIO_7_SATA

VCCAPLLSATA

VCCVRM_1_SATA

VCCIO_9_PLLSATA3

VCCIO_15_SATA3 VCCIO_16_SATA3

VCC3_3_0_SATA

VCCIO_5_PLLSATA

VCC3_3_2_GPIO VCC3_3_3_GPIO VCC3_3_1_GPIO

VCCSUS3_3_7_GPIO VCCSUS3_3_8_GPIO

VCCSUS3_3_5_GPIO VCCSUS3_3_6_GPIO

V5REF

VCCRTC

V_PROC_IO

DCPSUSBYP

VCCACLK

DCPRTC

VCCADPLLA VCCADPLLB

DCPSST

DCPSUS_2_CLK

DCPSUS_1_CLK

VCCDIFFCLKN_2

VCCDIFFCLKN_1

VCCDIFFCLKN_0

VCCDSW3_3

VCCIO_13_CLK

VCC3_3_4_CLK

VCCASW_4_CLK VCCASW_5_CLK VCCASW_6_CLK VCCASW_7_CLK VCCASW_8_CLK

VCCAPLLDMI2

VCCASW_20_CLK

VCCASW_10_CLK VCCASW_11_CLK VCCASW_12_CLK VCCASW_13_CLK VCCASW_14_CLK VCCASW_15_CLK VCCASW_16_CLK VCCASW_17_CLK VCCASW_18_CLK VCCASW_19_CLK

VCCASW_9_CLK

VCCVRM_0_CLK

VCCASW_22_CLK

VCCASW_21_CLK

VCCSSC

VCCSUS3_3_9_USB

VCCIO_14_PLLUSB

V5REF_SUS

VCCSUS3_3_0_SUS

DCPSUS_3_SUS

VCCASW_3_CLK

DCPSUS_0_CLK

VCCIO_12_PLLCLK

CPURTC

HDA

USB

MISC

SATA

PCI/GPIO/

LPC

CLK/MISC

(8 OF 10)

NC

NC NC

NC

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

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REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

VCCACLK pin left as NC per DG

AL24 left as NC per DG

VCCAFDIPLL pin left as NC per DG

VCCAPLLSATA pin left as NC per DG

NC-ed per DG

1.44 A Max, 474mA Idle

VCCAPLLDMI2 pin left as NC per DG

10 mA Max, 1mA Idle

PCH output, for decoupling only

NC-ed per DG

55mA Max, 5mA Idle

COUGAR-POINT

FCBGA

OMIT

MOBILE

U1800

BH29

V33 V34

U48

BG6

AK36

BJ22

AB36

AA23 AC23

AG27 AG29 AJ23 AJ26 AJ27 AJ29 AJ31

AD21 AD23 AF21 AF23 AG21 AG23 AG24 AG26

AG16 AG17 AJ16 AJ17

AU20

AT20

AP17

AN19

AN16 AN17

AN21 AN26 AN27 AP21 AP23 AP24 AP26 AT24

AN33 AN34

V1

AM37 AM38 AP36 AP37

AP16

AT16

AK37

FCBGA

COUGAR-POINT

OMIT

MOBILE

U1800

N16

V16

AL24

T17 V19

AN23

V12

P34

M26

BJ8

AJ2

T34

AA16 W16

T38

AD49

BD47 BF47

BH23

AK1

T19

AC26 AC27 AC29 AC31 AD29 AD31

W21 W23 W24 W26

V21

W29 W31 W33

T21

AA19 AA21 AA24 AA26 AA27 AA29 AA31

AF33 AF34 AG34

T16

N26

AL29

AF17

T26

AH13 AH14

P26 P28 T27 T29

AF13

AC16 AC17 AD17

AF14

A22

AG33

AN24

T23 T24 V23 V24

N20 N22 P20 P22

P24

P32

Y49

AF11

0.1UF

CERM

20% 10V

402

PLACE_NEAR=U1800.A22:2.54mm

C2232

1

2

CERM

10%

1UF

6.3V

402

PLACE_NEAR=U1800.A22:2.54mm

C2231

1

2

402

PLACE_NEAR=U1800.V16:2.54mm

CERM

0.1UF

20% 10V

C2222

1

2

0.1UF

CERM

20%

402

10V

PLACE_NEAR=U1800.N16:2.54mm

C2210

1

2

402

20% 10V

0.1UF

CERM

PLACE_NEAR=U1800.A22:2.54mm

C2233

1

2

PCH POWER

VOLTAGE=3.3V

MIN_LINE_WIDTH=0.2 mm

PPVOUT_S0_PCH_DCPSST

MIN_NECK_WIDTH=0.2 mm

PP1V05_S0_PCH_VCCADPLLB_F

PP1V05_S0

PP1V05_S0_PCH_VCCADPLLA_F

PP1V05_S0

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2 mm MIN_LINE_WIDTH=0.2 mm

PPVOUT_G3_PCH_DCPRTC

PP3V3_SUS

PP5V_S0_PCH_V5REF

PP1V8_S0

PP1V05_S0

PP5V_SUS_PCH_V5REFSUS

PP1V05_S0

PP3V3_SUS

PP3V3_S0

TP_1V05_S0_PCH_VCCAPLLEXP

PP1V05_S0_PCH_VCCCLKDMI_F

PP1V05_S0

PP3V3_S0

PP1V05_S0

PP1V8_S0_PCH_VCCTX_LVDS_F

PP1V05_S0

PP1V8_S0

PP3V3_S0_PCH_VCCA_DAC_F

PP3V3_S5

PP3V3_S0

TP_PPVOUT_PCH_DCPSUSBYP

PP1V05_S0

PP3V3_S0

PP1V05_S0

PPVRTC_G3H

PP3V3_S0_PCH_VCC3_3_CLK_F

PP3V3_S5

PP1V05_S0

PP3V3_SUS

PP1V5_S0

PP1V8_S0

22 OF 132 20 OF 101

22

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

22

6 7 9

10 12 13 14 16 17 20 22 23 35

39 44 67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

7

16 17 18 19 20 22 45 70 71 72

22

6 7

14 17 20 22 25 70 71 87

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35

39 44 67 69 72

101

22

6 7 9

10 12 13 14 16 17 20 22 23 35 39 44

67 69 72

101

7

16 17 18 19 20 22 45 70 71 72

6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6

22

6 7 9

10 12 13 14 16 17 20 22

23 35 39 44 67 69 72

101

6 7 9

10 12 13 14 16 17 20 22

23 35 39 44 67 69 72

101

6 7 9

10 12 13 14 16 17 20 22

23 35 39 44 67 69 72

101

6 7

12 16 17 18 19 20 22 23

25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

22

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

6 7

14 17 20 22 25 70 71 87

6 7

14 17 20 22 25 70 71 87

6 7

14 17 20 22 25 70 71 87

22

6 7

17 19 20 22 23 24 25 29

39 45 55 65 70 71 72 82 85 89

98

6 7

12 16 17 18 19 20 22 23

25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22 23

25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

6 7

12 16 17 18 19 20 22 23 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

7

16 17 25

22

6 7

17 19 20 22 23 24 25 29

39 45 55 65 70 71 72 82 85 89

98

6 7 9

10 12 13 14 16 17 20 22 23

35 39 44 67 69 72

101

7

16 17 18 19 20 22 45 70 71 72

7

16 22 25 41 56 70

6 7

14 17 20 22 25 70 71 87

www.rosefix.com

www.vinafix.vn

VSS

(9 OF 10)

VSS

VSS VSS

VSS

VSS VSS VSS

VSS

VSS VSS

VSS

VSS VSS

VSS

VSS VSS VSS VSS VSS

VSS

VSS VSS VSS VSS

VSS

VSS VSS VSS VSS

VSS

VSS VSS VSS VSS

VSS

VSS VSS VSS VSS

VSS

VSS VSS

VSS

VSS VSS

VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS

(10 OF 10)

VSS

VSS VSS VSS VSS VSS VSS VSS

VSS

VSS VSS VSS VSS VSS VSS VSS

VSS

VSS VSS VSS VSS VSS VSS VSS

VSS

VSS VSS VSS VSS

VSS

VSS VSS VSS VSS VSS VSS

VSS

VSS VSS VSS VSS VSS

VSS

VSS VSS VSS VSS VSS VSS VSS

VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS

VSS

VSS VSS VSS

VSS

VSS VSS VSS VSS

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

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REVISION

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SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

OMIT

FCBGA

MOBILE

COUGAR-POINT

U1800

AJ3 N24

AB14

AL48 AM11 AM14 AM36 AM39 AM43 AM45 AM46 AM7 AN2

AB39

AN29 AN3 AN31 AP12 AP13 AP19 AP28 AP30 AP32 AP38

AB4

AP4 AP42 AP46 AP8 AR2 AR48 AT11 AT13 AT18 AT22

AB43

AT26 AT28 AT30 AT32 AT34 AT39 AT42 AT46 AT7 AU24

AB5

AU30 AV11 AV16 AV20 AV24 AV30 AV38 AV4 AV43 AV8

AB7

AW14 AW18 AW2 AW22 AW26 AW28 AW32 AW34 AW36 AW40

AC19

AW48 AY12 AY22 AY28 AY4 AY42 AY46 AY8 B11 B15

AC2

B19 B23 B27 B31

AC21 AC24

BG29

AC33 AC34 AC48 AD10 AD11 AD12 AD13 AD14 AD16 AD19

H5

AD24 AD26 AD27 AD33 AD34 AD36 AD37 AD38 AD39

AD4

AA17

AD40 AD42 AD43 AD45 AD46 AD47

AD8 AE2 AE3

AF10

AA2

AF12 AF16 AF19 AF24 AF26 AF27 AF29 AF31 AF38

AF4

AA3

AF42 AF46

AF5 AF7 AF8

AG19

AG2 AG31 AG48 AH11

AA33

AH3 AH36 AH39 AH40 AH42 AH46

AH7 AJ19 AJ21 AJ24

AA34

AJ33 AJ34 AK12

AK3 AK38

AK4 AK42

AK46 AK8 AL16

AB11

AL17 AL19 AL2 AL21 AL23 AL26 AL27 AL31 AL33 AL34

OMIT

FCBGA

COUGAR-POINT

MOBILE

U1800

B35

B39 B43

B7 BB12 BB16 BB20 BB22 BB24 BB28 BB30 BB38

BB4 BB46 BC14 BC18

BC2 BC22 BC26 BC32 BC34 BC36 BC40 BC42 BC48

BD3 BD46

BD5 BE10 BE22 BE26 BE40 BF10 BF12 BF16 BF20 BF22 BF24 BF26 BF28 BF30 BF38 BF40

BF8 BG17 BG21 BG22 BG24 BG33 BG41 BG44

BG8 BH11 BH15 BH17 BH19 BH27 BH31 BH33 BH35 BH39 BH43

BH7

C22

D12

D16

D18

D22

D24

D26

D3 D30 D32 D34 D38 D42

D8 E18 E26

F3 F45 G14 G18 G20 G26 G28 G36

G48 H10 H12 H16 H18 H22 H24 H26 H30 H32 H34 H46 K18 K26 K39 K46 K7 L18 L2 L20 L26 L28 L36 L48 M12 M14 M18 M22 M24 M30 M32 M34 M38 M4 M42 M46 M8 N18 N47 P11 P16 P18 P30 P40 P43 P47 P7 R2 R48 T12 T31 T33 T36 T37 T4 T46 T47 T8 V11 V26 V27 V29 V31 V36 V39 V43 V7 W17 W19 W2 W27 W34 W48 Y12 Y38 Y4 Y42 Y46 Y8 V17 AP3 AP1 BE16 BC16 BG28 BJ28

SYNC_MASTER=K92_MLB

SYNC_DATE=04/30/2010

PCH GROUNDS

23 OF 132 21 OF 101

www.rosefix.com

www.vinafix.vn

NC

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

(PCH PCI 3.3V PWR)

(PCH DPLLB PWR)

(PCH DPLLA PWR)

68 mA

PCH V5REF_SUS Filter & Follower

(PCH Reference for 5V Tolerance on PCI)

NEED PWR CONSTRAINT

PCH VCCSUS3_3 BYPASS

(PCH SUSPEND USB 3.3V PWR)

(PCH 1.05V CORE PWR)

NEED PWR CONSTRAINT

<1 MA S0-S5

69 mA

PCH VCCCORE BYPASS

(PCH USB 1.05V PWR)

PCH VCCIO BYPASS

<1 MA

PCH VCCIO BYPASS

PCH VCCSUSHDA BYPASS

1 mA

1 mA S0-S5

PCH V5REF Filter & Follower

(PCH Reference for 5V Tolerance on USB)

PCH VCCADPLLB Filter

PCH VCCADPLLA Filter

PCH VCC3_3 BYPASS

2

1

C2439

PLACE_NEAR=U1800.P34:2.54mm

402

1UF

10V

10% X5R

1

2

R2405

100

5%

402

1/16W MF-LF

2

1

C2438

PLACE_NEAR=U1800.M26:2.54mm

0.1UF

CERM

402

10V

20%

D2400

5

6

1

SOT-363

BAT54DW-X-G

1

2

R2404

MF-LF

10

5%

1/16W

402

2

3

4

D2400

BAT54DW-X-G

SOT-363

2

1

C2423

402

X5R

0.1UF

16V

10%

PLACE_NEAR=U1800.AJ2:2.54mm

2

1

C2440

PLACE_NEAR=U1800.AJ16:2.54mm

0.1UF

20% CERM

402

10V

2

1

C2441

10V

0.1UF

20% CERM

402

PLACE_NEAR=U1800.P32:2.54mm

PLACE_NEAR=U1800.AT20:2.54mm

2

1

C2419

402

CERM

10%

1UF

6.3V

2

1

C2421

PLACE_NEAR=U1800.BH29:2.54mm

0.1UF

16V X5R 402

10%

2

1

C2413

PLACE_NEAR=U1800.V24:2.54mm

0.1UF

10%

402

16V X5R

2

1

C2417

PLACE_NEAR=U1800.BJ8:2.54mm

10% X5R

16V

0.1UF

402

2

1

C2416

PLACE_NEAR=U1800.BJ8:2.54mm

X5R 402

6.3V

4.7UF

20%

2

1

C2484

PLACE_NEAR=U1800.P24:2.54mm

X5R

16V

402

0.1UF

10%

2

1

C2485

PLACE_NEAR=U1800.AA16:2.54mm

0.1UF

402

X5R

10% 25V

2

1

C2463

CERM

10%

1UF

402

6.3V

PLACE_NEAR=U1800.AN27:2.54mm

2

1

C2475

PLACE_NEAR=U1800.AG33:2.54mm

1UF

402

CERM

6.3V

10%

PLACE_NEAR=U1800.AF34:2.54mm

2

1

C2434

CERM

1UF

10%

402

6.3V

2

1

C2469

10%

1UF

402

6.3V CERM

PLACE_NEAR=U1800.AF17:2.54mm

2

1

C2414

1UF

10%

402

6.3V CERM

PLACE_NEAR=U1800.AN27:2.54mm

2

1

C2401

10UF

0805

10% 16V

X5R-CERM

PLACE_NEAR=U1800.AN27:2.54mm

2

1

C2452

1UF

6.3V CERM

PLACE_NEAR=U1800.AC17:2.54mm

10%

402

PLACE_NEAR=U1800.T16:2.54mm

CERM

2

1

C2499

0.1UF

402

20% 10V

2

1

C2442

PLACE_NEAR=U1800.V1:2.54mm

CERM

1UF

402

6.3V

10%

2

1

C2486

PLACE_NEAR=U1800.T34:2.54mm

25V

0.1UF

10% X5R

402

2

1

C2444

1UF

CERM 402

6.3V

10%

PLACE_NEAR=U1800.AH13:2.54mm

2

1

C2446

6.3V

1UF

10% CERM

402

PLACE_NEAR=U1800.P28:2.54mm

2

1

C2424

PLACE_NEAR=U1800.V33:2.54mm

402

16V X5R

10%

0.1UF

2

1

C2460

6.3V

805

CERM

10UF

20%

PLACE_NEAR=U1800.AG26:2.54mm

2

1

C2482

402

1UF

10% CERM

6.3V

PLACE_NEAR=U1800.AG24:2.54mm

2

1

C2481

PLACE_NEAR=U1800.AD21:2.54mm

10% CERM

1UF

6.3V

402

2

1

C2483

10%

1UF

402

CERM

6.3V

PLACE_NEAR=U1800.AJ27:2.54mm

2

1

C2407

10%

402

1UF

CERM

6.3V

PLACE_NEAR=U1800.AN27:2.54mm

2

1

C2429

1UF

CERM

10%

402

6.3V

PLACE_NEAR=U1800.AN27:2.54mm

2

1

C2420

6.3V

20%

CERM

805

22UF

PLACE_NEAR=U1800.AC27:2.54mm

2

1

C2496

PLACE_NEAR=U1800.AC27:2.54mm

6.3V

10%

1UF

CERM 402

2

1

C2456

PLACE_NEAR=U1800.AC27:2.54mm

CERM

1UF

402

6.3V

10%

2

1

C2426

PLACE_NEAR=U1800.AC27:2.54mm

1UF

CERM

6.3V

10%

402

1210-HF

CRITICAL

L2406

21

10UH-0.45A

21

R2415

402

1/16W

5%

1

MF-LF

2

1

C2411

402

X5R

1UF

16V

10%

PLACE_NEAR=U1800.AB36:2.54mm

2

1

C2430

PLACE_NEAR=U1800.BJ8:2.54mm

402

16V

10% X5R

0.1UF

2

1

C2428

PLACE_NEAR=U1800.AC27:2.54mm

22UF

20%

6.3V

805

CERM

2

1

C2406

0.01UF

16V

402

CERM

10%

PLACE_NEAR=U1800.AM37:2.54mm

1

CERM

805

20%

6.3V

PLACE_NEAR=U1800.AM37:2.54mm

2

22UF

C2400

CRITICAL

C2408

16V

0.01UF

10%

2

1

CERM

402

PLACE_NEAR=U1800.AM37:2.54mm

1

0.1UH

L2407

2

0805

CRITICAL

0

21

R2450

5%

1/20W

MF

201

PLACE_NEAR=U1800.U48:2.54mm

2

1

16V

0.01UF

10%

402

CERM

C2455

0.1UF

PLACE_NEAR=U1800.U48:2.54mm

2

1

402

16V X5R

10%

C2451

2

1

C2450

10UF

PLACE_NEAR=U1800.U48:2.54mm

20%

805

CERM

6.3V

CRITICAL

1/16W

21

R2451

MF-LF

402

1

5%

CRITICAL

C2453

10UF

PLACE_NEAR=U1800.T38:2.54mm

603

2

1

6.3V

20% X5R

PLACE_NEAR=U1800.T38:2.54mm

C2454

2

1

X5R

10% 10V

402

1UF

10UH-0.12A-0.36OHM

CRITICAL

21

L2451

0603

2

1

C2476

PLACE_NEAR=U1800.P22:2.54mm

1UF

CERM 402

6.3V

10%

PLACE_NEAR=U1800.BD47:2.54MM

CRITICAL

C2491

220UF

20%

2.5V

2

CASE-B2-SM1

1

POLY-TANT

PLACE_NEAR=U1800.BD47:2.54MM

2

1

C2492

NO STUFF

1UF

6.3V 402

CERM

10%

2

1

C2494

402

NO STUFF

CERM

1UF

6.3V

10%

PLACE_NEAR=U1800.BF47:2.54MM

CRITICAL

2

1

C2493

CASE-B2-SM1

20%

2.5V

POLY-TANT

220UF

PLACE_NEAR=U1800.BF47:2.54MM

L2490

10UH-0.12A-0.36OHM

CRITICAL

0603

21

CRITICAL

L2491

10UH-0.12A-0.36OHM

21

0603

21

R2490

5%

0

1/16W

402

MF-LF

21

R2491

0

5%

MF-LF

1/16W

402

SYNC_MASTER=K92_MLB

PCH DECOUPLING

SYNC_DATE=07/06/2010

PP1V8_S0

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

MAKE_BASE=TRUE

VOLTAGE=3.3V

PP3V3_S0_PCH_VCCA_DAC_F

PP3V3_S5

PP3V3_S0

PP1V05_S0_PCH_VCCADPLLA_R

MIN_LINE_WIDTH=0.4MM VOLTAGE=1.05V

MIN_NECK_WIDTH=0.2MM

MIN_NECK_WIDTH=0.075 MM

MIN_LINE_WIDTH=0.5 MM

PP3V3_S0_PCH_VCC3_3_CLK_F

VOLTAGE=3.3V

MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V

PP1V05_S0_PCH_VCCADPLLB_F

MIN_LINE_WIDTH=0.4 MM

PP1V05_S0

PP5V_SUS_PCH_V5REFSUS

MAKE_BASE=TRUE

VOLTAGE=5V

MIN_LINE_WIDTH=0.3MM MIN_NECK_WIDTH=0.25MM

PP1V8_S0_PCH_VCCTX_LVDS_F

MIN_LINE_WIDTH=0.5MM MIN_NECK_WIDTH=0.25MM VOLTAGE=1.8V

PP3V3_SUS

PP3V3_S0

PP5V_SUS

PP5V_S0_PCH_V5REF

MIN_LINE_WIDTH=0.4 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=5V

PP5V_S0_PCH_V5REF

MAKE_BASE=TRUE

PP1V5_S0

PP1V05_S0_PCH_VCCADPLLB_R

MIN_NECK_WIDTH=0.2MM VOLTAGE=1.05V

MIN_LINE_WIDTH=0.4MM

PP3V3_S0

PP3V3_S5

PP5V_S0

PP3V3_S0

PP1V05_S0

PP3V3_S0

PP1V8_S0

PP1V05_S0

PP3V3_S0

PP1V05_S0

PP5V_SUS_PCH_V5REFSUS

PP1V05_S0

PP3V3_SUS

PP1V05_S0

MIN_LINE_WIDTH=0.5MM

VOLTAGE=1.05V

MIN_NECK_WIDTH=0.25MM

PP1V05_S0_PCH_VCCCLKDMI_R

VOLTAGE=1.05V

MIN_NECK_WIDTH=0.25MM

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.5MM

PP1V05_S0_PCH_VCCCLKDMI_F

PP1V05_S0

MIN_LINE_WIDTH=0.5 MM MIN_NECK_WIDTH=0.075 MM VOLTAGE=3.3V

PP3V3_S0_PCH_VCC3_3_CLK_R

PP1V05_S0

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.4 MM

PP1V05_S0_PCH_VCCADPLLA_F

VOLTAGE=1.05V

24 OF 132 22 OF 101

6 7

14 17 20 22

25 70 71

87

20

6 7

17 19 20 22 23 24 25 29

39 45 55 65 70 71 72 82 85 89

98

6 7

12 16 17 18 19 20 22 23

25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53

56 60 61 71 72 79 82 83 84

87 88 89 98

20

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

20 22

20

7

16 17 18 19 20 22 45 70 71

72

6 7

12 16 17 18 19 20 22 23

25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

7

71

20 22

7

16 20 25 41 56 70

6 7

12 16 17

18 19

20 22

23 25

26 28

32 35

36 39

40 41

45 47

48 49

50 51

53 56 60

61 71 72

79 82

83 84

87 88 89

98

6 7

17 19 20 22 23 24 25 29

39 45 55 65 70 71 72 82 85 89

98

6 7 8

41 46 51 53 64 67 68 69 71 72 86

88

101

6 7

12 16 17 18 19 20 22 23

25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22

23 25 26 28 32 35 36 39 40

41 45 47 48 49 50 51 53 56

60 61 71 72 79 82 83 84 87

88 89 98

6 7 9

10 12 13 14 16

17 20 22 23 35

39 44 67 69 72

101

6 7

12 16 17 18 19 20 22 23

25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7

14 17 20 22 25 70 71 87

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

6 7

12 16 17 18 19 20 22 23

25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7 9

10 12 13 14 16 17 20

22 23 35 39 44 67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35

39 44 67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

20 22

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

7

16 17 18 19 20 22 45 70 71

72

7

16 17 18 19 20 22 45 70 71

72

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

20

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

20

www.rosefix.com

www.vinafix.vn

IN

IN IN

IN

IN IN IN IN

IN IN IN

OUT

IN

OUT OUT

NC

IN

OUT

IN

BI IN

OUT

IN

OUT

IN

OUT

IN

OUT

IN

OUT OUT

IN IN

NC

BI

IN

IN IN

BI IN

OUT

IN

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

OBSDATA_C3

NOTE: XDP_DBRESET_L pulled-up to 3.3V on P. 28

PCH MINI XDP

OBSDATA_C0

PROCESSOR MINI XDP

517S0774

HOOK3

OBSFN_A1

OBSDATA_A1

TDI

TCK0

DBR#/HOOK7

OBSFN_B0 OBSFN_D0

ITPCLK#/HOOK5

TMS XDP_PRESENT#

OBSFN_B1

SCL

RESET#/HOOK6

OBSDATA_A2

OBSDATA_B1

OBSDATA_B2 OBSDATA_B3

VCC_OBS_AB

OBSDATA_A0

OBSDATA_B2

OBSDATA_A1

OBSFN_A1

SCL

OBSDATA_B0

TDO

OBSFN_C1

VCC_OBS_CD

TCK1

TDO

PLACE TDO TERM NEAR

TERM NEAR PCH

HOOK2

OBSFN_D0

OBSDATA_C3

TDI

OBSDATA_B1

SDA

TRSTn

OBSFN_C0

OBSDATA_C2

OBSDATA_C1

OBSFN_C1

OBSDATA_C0

517S0774

TMS

OBSFN_A0

OBSDATA_D0

OBSFN_A0

OBSDATA_B3

DESIGN NOTE:

PLACEMENT NOTE:

SDA

HOOK1

OBSDATA_A3

OBSFN_D1

OBSFN_C0

SNB XDP CONN

TERM NEAR CPU

PLACE TCK/TDI/TMS/TRST*

PLACE TDO TERM NEAR

PLACEMENT NOTE:

ODT AVAILABLE ON JTAG

PLACEMENT NOTE: PLACE TCK/TDI/TMS/TRST*

TCK1

OBSFN_B1

OBSFN_B0

OBSDATA_A3

OBSDATA_A2

OBSDATA_A0

PCH XDP CONN

OBSDATA_D1

XDP_PRESENT#

DBR#/HOOK7

VCC_OBS_CD RESET#/HOOK6

ITPCLK/HOOK4

NOTE: XDP_DBRESET_L pulled-up to 3.3V on P. 28

ITPCLK/HOOK4

OBSFN_D1

TRSTn

OBSDATA_C2

OBSDATA_C1

TCK0

OBSDATA_B0

HOOK3

PWRGD/HOOK0

HOOK2

ITPCLK#/HOOK5

OBSDATA_D3

OBSDATA_D2

VCC_OBS_AB

HOOK1

PWRGD/HOOK0

PLACEMENT NOTE:

OBSDATA_D3

OBSDATA_D2

OBSDATA_D0 OBSDATA_D1

1K series R on PCH Support P. 28

9

90

10 25

10 90

9

10 90

9

PLACE_NEAR=U1000.B57:2.54mm

MF

1K

201

5%

1/20W

XDP

R2501

1 2

9

23 90

16 39

16 31

9

90

19

XDP

201

1/20W

MF

5%

0

PLACE_NEAR=U1800.V10:2.54mm

R2576

1 2

1/20W

201

MF

XDP

PLACE_NEAR=U1800.M1:2.54mm

0

5%

R2577

1 2

19

16 41

PLACE_NEAR=U1800.U2:2.54mm

201

5%

0

MF

1/20W

XDP

R2579

1 2

8

19 33 87

19

9

90

25

16 23

9

90

PLACE_NEAR=U1800.A14:2.54mm

1/20W

5%

MF

201

0

XDP

R2580

1 2

18

16 23

9

90

18 24

CRITICAL

F-ST-SM-HF

XDP_CONN

DF40C-60DS-0.4V

J2550

1

10 11 12 13 14 15 16 17 18 19

2

20 21 22 23 24 25 26 27 28 29

3

30 31 32 33 34 35 36 37 38 39

4

40 41 42 43 44 45 46 47 48 49

5

50 51 52 53 54 55 56 57 58 59

6

60

7 8 9

PLACE_NEAR=U1800.J3:2.54mm

MF

201

5%

51

XDP

1/20W

R2556

1

2

16 23 26 28 30 41 47 61 88 93

10 23 25 90

0.1uF

16V

402

X5R

10%

XDP

C2580

1

2

16V

XDP

402

10%

X5R

0.1uF

C2581

1

2

19

5%

PLACE_NEAR=U4900.P17:2.54mm

0

MF

201

1/20W

XDP

R2502

1 2

17 23 44

201

PLACE_NEAR=U4900.P17:2.54mm

0

5%

MF

XDP

1/20W

R2585

1 2

17 23 44

330

201

1/20W

XDP

5%

MF

R2504

1 2

17 89

18

1/20W

PLACE_NEAR=J2550.39:2.54mm

5%

MF

201

1K

XDP

R2584

1 2

44 72 87 89

5%

0

MF

1/20W

201

XDP

PLACE_NEAR=U1800.A16:2.54mm

R2581

1 2

18 32

10 23 90

10 23 25 90

PLACE_NEAR=U1800.K12:2.54mm

1/20W

0

5%

XDP

MF

201

R2582

1 2

19

XDP

201

1/20W

MF

PLACE_NEAR=U1800.P8:2.54mm

5%

0

R2578

1 2

19 29

XDP

5%

MF

201

0

1/20W

PLACE_NEAR=U1800.K20:2.54mm

R2586

1 2

5%

0

XDP

MF

1/20W

PLACE_NEAR=U1800.C16:2.54mm

201

R2587

1 2

18

9

90

10 23 90

16 90

1/20W

201

MF

5%

0

PLACE_NEAR=R1841.1:2.54mm

XDP

R2515

1 2

PLACE_NEAR=R1840.1:2.54mm

XDP

0

201

5%

1/20W

MF

R2516

1 2

PLACE_NEAR=U1000.G3:2.54mm

XDP

1K

201

1/20W

MF

5%

R2505

1 2

16 84

PLACE_NEAR=J2550.52:2.54mm

201

5%

1/20W

MF

XDP

51

R2550

1

2

10 23 90

PLACE_NEAR=U1800.K5:2.54mm

201

51

5%

1/20W

MF

XDP

R2551

1

2

201

MF

1/20W

5%

51

XDP

PLACE_NEAR=U1800.H7:2.54mm

R2552

1

2

1/20W

XDP_CPU_BPM

5%

0

MF

201

R2560

1 2

5%

0

1/20W

201

MF

XDP_CPU_BPM

R2561

1 2

XDP_CPU_BPM

1/20W

5%

MF

201

0

R2562

1 2

XDP_CPU_BPM

201

5%

1/20W

0

MF

R2563

1 2

201

XDP_CPU_CFG

0

1/20W

MF

5%

R2564

1 2

10 23 90

XDP_CPU_CFG

0

1/20W

MF

201

5%

R2566

1 2

XDP_CPU_CFG

201

1/20W

5%

MF

0

R2567

1 2

XDP_CPU_CFG

0

201

MF

1/20W

5%

R2565

1 2

402

MF-LF

1/16W

5%

NOSTUFF

1K

R2540

1

2

9

23 90

0.1uF

16V

XDP

X5R 402

10%

C2501

1

2

9

90

10% 16V X5R

0.1uF

XDP

402

C2500

1

2

10 90

9

90

9

90

9

90

9

90

16 23 26 28 30 41 47 61

88 93

16 23 26 28 30 41 47 61 88 93

10 23 90

1K

1/20W

201

5%

MF

XDP

PLACE_NEAR=U1000.C60:2.54mm

R2500

1 2

9

90

10 19 90

9

90

J2500

F-ST-SM-HF

CRITICAL XDP_CONN

DF40C-60DS-0.4V

1

10 11 12 13 14 15 16 17 18 19

2

20 21 22 23 24 25 26 27 28 29

3

30 31 32 33 34 35 36 37 38 39

4

40 41 42 43 44 45 46 47 48 49

5

50 51 52 53 54 55 56 57 58 59

6

60

7 8 9

51

5%

201

1/20W

MF

PLACE_NEAR=J2500.52:2.54mm

XDP

R2510

1

2

PLACE_NEAR=U1000.K61:2.54mm

5%

51

MF

1/20W

201

XDP

R2511

1

2

51

5%

MF

1/20W

201

PLACE_NEAR=U1000.H59:2.54mm

XDP

R2512

1

2

PLACE_NEAR=U1000.H63:2.54mm

51

5%

XDP

MF

1/20W

201

R2513

1

2

PLACE_NEAR=U1000.J58:2.54mm

XDP

5%

51

MF

1/20W

201

R2514

1

2

10 90

SYNC_DATE=10/17/2010

CPU & PCH XDP

SYNC_MASTER=K91_MLB

XDP_CPU_CFG<0>

XDP_PCH_GPIO46

XDP_PCH_S5_PWRGD

XDP_OBSDATA_B<3>

XDP_CPU_PWRBTN_L

XDP_CPU_TCK

XDP_CPU_TMS

XDP_CPU_TDI

XDP_CPU_TDO

TP_XDP_PCH_OBSFN_D<0> TP_XDP_PCH_OBSFN_D<1>

AUD_IPHS_SWITCH_EN_PCH

ENET_LOW_PWR_PCH

XDP_PCH_AUD_IPHS_SWITCH_EN

TP_XDP_PCH_TRST_L

JTAG_ISP_TCK

PCH_GPIO36_SATA2GP

PP3V3_S5

TP_XDP_PCH_HOOK4 TP_XDP_PCH_HOOK5

PP3V3_S0

XDP_CPU_PWRGD

XDP_OBSDATA_B<2>

XDP_OBSDATA_B<1>

CPU_CFG<13> CPU_CFG<14>

XDP_VR_READY

XDP_CPU_PREQ_L XDP_CPU_PRDY_L

XDP_BPM_L<0>

CPU_CFG<10>

XDP_BPM_L<1>

XDP_PCH_TDI

XDP_PCH_TCK

XDP_CPU_TRST_L

TP_XDP_PCH_OBSFN_B<0>

PCH_GPIO10_OC6_L

TP_XDP_PCH_OBSFN_B<1>

XDP_PCH_ENET_PWR_EN

CPU_CFG<11>

XDP_BPM_L<3>

PP1V05_S0

CPU_CFG<8>

CPU_CFG<6> CPU_CFG<7>

XDP_CPURST_L

XDP_OBSDATA_B<0>

TP_XDPPCH_HOOK2

XDP_CPU_TMS

CPU_CFG<0>

PM_PCH_SYS_PWROK

TP_XDPPCH_HOOK3

XDP_BPM_L<4>

CPU_PWRGD

CPU_CFG<15>

TP_XDP_PCH_OBSFN_A<0>

PCH_GPIO43_OC4_L XDP_PCH_SDCONN_DET_L

XDP_PCH_PWRBTN_L

PCH_GPIO14_OC7_L

SMBUS_PCH_CLK

SMBUS_PCH_DATA

XDP_BPM_L<2>

XDP_PCH_TDI

CPU_CFG<5>

CPU_CFG<2>

CPU_CFG<9>

XDP_CPU_CLK100M_N

CPU_CFG<4>

PLT_RST_CPU_BUF_L

XDP_CPU_CLK100M_P

XDP_PCH_TDO

PP1V05_SUS

XDP_BPM_L<5>

PP1V05_S0

CPU_CFG<17>

AP_CLKREQ_L

ITPXDP_CLK100M_N

XDP_PCH_USB_HUB_SOFT_RST_L

SDCONN_STATE_RST_L

USB_HUB_SOFT_RESET_L

SDCONN_STATE_CHANGE

XDP_DBRESET_L

PM_PWRBTN_L

ENET_PWR_EN

XDP_PCH_TMS

ITPXDP_CLK100M_P

CPU_CFG<0>

CPU_CFG<16>

CPU_CFG<1>

CPU_CFG<12>

ALL_SYS_PWRGD

XDP_BPM_L<6>

XDP_PCH_ISOLATE_CPU_MEM_L

SMBUS_PCH_DATA

TP_XDP_PCH_OBSFN_A<1>

XDP_PCH_SDCONN_STATE_RST_L

ISOLATE_CPU_MEM_L

FW_CLKREQ_L

XDP_DBRESET_L

XDPPCH_PLTRST_L

XDP_PCH_TCK

XDP_PCH_TDO

XDP_CPU_TDI

PCH_GPIO46

PM_PWRBTN_L

XDP_BPM_L<7>

SMBUS_PCH_CLK

XDP_CPU_TCK

XDP_CPU_TDO XDP_CPU_TRST_L

XDP_PCH_TMS

XDP_AP_CLKREQ_L

DP_AUXCH_ISOL

SATARDRVR_EN

XDP_FW_CLKREQ_L

PCH_GPIO0

CPU_CFG<3>

25 OF 132 23 OF 101

10 23 90

6 7

17 19 20 22 24 25 29 39

45 55 65 70 71 72 82 85 89 98

6 7

12 16 17 18 19 20 22 25

26 28 32 35 36 39 40 41 45 47

48 49 50 51 53 56 60 61 71 72

79 82 83 84 87 88 89 98

90

16 23

10 23 90

6 7 9

10 12 13 14 16 17 20 22 23 35 39

44 67 69 72

101

90

6

90

16 23

7

70

6 7 9

10 12

13 14 16 17

20 22 23 35

39 44 67 69

72

101

16 23

www.rosefix.com

www.vinafix.vn

G

D

S

G

D

S

BI

IN

BI BI

BI

BI BI

BI

IN

VDD33

PLLFILT

CRFILT

SUSP_IND/LOCAL_PWR/NON_REM0

SDA/SMBDATA/NON_REM1

SCL/SMBCLK/CFG_SEL0

HS_IND/CFG_SEL1

XTALIN/CLKIN XTALOUT

TEST

RESET*

THRM_PAD

USBDP_UP

NC

OSC3*

OCS1* OCS2*

USBDM_UP

RBIAS

VBUS_DET

NC

NC NC

USBDP_DN3/PRT_DIS_P3

USBDM_DN3/PRT_DIS_M3

USBDP_DN2/PRT_DIS_P2

USBDM_DN2/PRT_DIS_M2

USBDP_DN1/PRT_DIS_P1

USBDM_DN1/PRT_DIS_M1

PRTPWR3/BC_EN3*

PRTPWR1/BC_EN1* PRTPWR2/BC_EN2*

SYM VER 1

VDD33

PLLFILT

CRFILT

SUSP_IND/LOCAL_PWR/NON_REM0

SDA/SMBDATA/NON_REM1

SCL/SMBCLK/CFG_SEL0

HS_IND/CFG_SEL1

XTALIN/CLKIN XTALOUT

TEST

RESET*

THRM_PAD

USBDP_UP

NC

OSC3*

OCS1* OCS2*

USBDM_UP

RBIAS

VBUS_DET

NC

NC NC

USBDP_DN3/PRT_DIS_P3

USBDM_DN3/PRT_DIS_M3

USBDP_DN2/PRT_DIS_P2

USBDM_DN2/PRT_DIS_M2

USBDP_DN1/PRT_DIS_P1

USBDM_DN1/PRT_DIS_M1

PRTPWR3/BC_EN3*

PRTPWR1/BC_EN1* PRTPWR2/BC_EN2*

SYM VER 1

TABLE_BOMGROUP_ITEM

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_BOMGROUP_ITEM

BOM OPTIONS

BOM GROUP

TABLE_BOMGROUP_HEAD

TABLE_BOMGROUP_ITEM

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

External C

T29 - no longer used, pulled up to 3V3 S0

1 1 Port 1, 2, and 3 are non removable

IPU

IR Receiver

NON_REM1 NON_REM0 DESCRIPTION

IPU

0 1 Port 1 is non removable 1 0 Port 1 and 2 are non removable

0 0 All ports are removable

BOM TABLE

IPU

Bluetooth

SD Card/Express Card

Trackpad/Keyboard

External A

External B

2

1

R2641

5%

402

MF-LF

1/16W

10K

CRITICAL

4

5

3

Q2640

SOT-363

2N7002DW-X-G

21

R2640

402

5%

20K

1/16W MF-LF

1

2

6

SOT-363

2N7002DW-X-G

Q2640

CRITICAL

2

1

C2641

5% 50V CERM 402

100PF

NOSTUFF

2

1

C2640

10%

6.3V 402

CERM-X5R

0.47UF

2

1

C2619

5%

50V

CERM

402

18PF

CRITICAL

21

R2630

1M

402

5%

MF-LF

1/16W

CRITICAL

2

1

C2620

18PF

402

5% 50V CERM

CRITICAL

21

R2680

402

CRITICAL

5%

MF-LF

1/16W

1M

R2600

2

1

402

MF

12K

1/16W

1%

CRITICAL

8

92

8

92

42 92

18 92

42 92

43 92

8

92

43 92

8

92

0.1UF

1

X7R-CERM

2

C2615

16V

10%

402

2

10%

1UF

C2616

1

16V 402

X5R

R2620

2

1

MF-LF

1/16W

5%

402

10K

2

10%

0.1UF

C2617

1

402

X7R-CERM

16V

C2618

1UF

2

1

16V X5R 402

10%

BYPASS=U2600.36::2MM

2

1

C2608

402

16V

10%

0.1UF

X7R-CERM

BYPASS=U2600.5::5MM

2

1

C2602

20%

6.3V X5R 603

4.7UF

C2609

2

1

402

16V

10%

0.1UF

X7R-CERM

BYPASS=U2600.29::2MM

BYPASS=U2600.23::2MM

2

1

C2610

10%

402

16V

X7R-CERM

0.1UF

BYPASS=U2600.15::2MM

16V

2

1

C2603

10%

0.1UF

402

X7R-CERM

18 23

2

1

5% 1/16W MF-LF

402

100K

R2642

8

42

21

R2605

5%

MF-LF

1/16W

402

100

2 1

SOD-523

BAT54XV2T1

D2600

2

1

R2606

402

MF-LF

10K

1/16W

5%

MF-LF

2

1

R2607

402

10K

1/16W

5%

2

1

R2604

10K

5% MF-LF

402

HUB1_NONREM0_0

1/16W

2

1

R2603

402

1/16W MF-LF

5%

10K

HUB1_NONREM0_1

2

1

R2601

MF-LF

1/16W

5%

10K

402

HUB1_NONREM1_1

2

1

R2602

HUB1_NONREM1_0

MF-LF

1/16W

5%

402

10K

C2668

X5R

2

1

16V

10%

402

1UF

2

1

C2667

0.1UF

16V

10%

402

X7R-CERM

2

1

C2666

X5R 402

10% 16V

1UF

X7R-CERM

0.1UF

C2665

2

1

10% 16V

402

2

1

C2660

0.1UF

10% 16V

402

X7R-CERM

BYPASS=U2650.23::2MM

2

1

R2670

1/16W

10K

MF-LF 402

5%

2

1

12K

402

1% MF

1/16W

R2650

CRITICAL

18 92

2

1

C2653

10%

402

X7R-CERM

0.1UF

16V

BYPASS=U2650.15::2MM

2

1

C2659

0.1UF

16V

10%

402

X7R-CERM

BYPASS=U2650.29::2MM

2

1

C2658

10%

402

X7R-CERM

16V

0.1UF

BYPASS=U2650.36::2MM

21

R2655

5%

1/16W

100

MF-LF

402

2

1

C2670

402

18PF

CERM

50V

5%

CRITICAL

2

1

C2669

5%

50V

CERM

18PF

402

CRITICAL

2

1

R2657

MF-LF

1/16W 402

5%

10K

2

1

R2656

402

10K

1/16W

5% MF-LF

2

1

R2653

HUB2_NONREM0_1

5%

402

10K

1/16W MF-LF

2

1

R2651

HUB2_NONREM1_1

10K

1/16W MF-LF

402

5%

2

1

R2654

5%

402

10K

1/16W MF-LF

HUB2_NONREM0_0

2

1

R2652

MF-LF

1/16W

10K

402

5%

HUB2_NONREM1_0

52 92

31 92

Y2600

24.000MHZ-16PF

31

42

CRITICAL

SM-2

31

42

Y2650

CRITICAL

24.000MHZ-16PF

SM-2

8

42 92

8

42

6

USB2513B

32

33

3629231510

5

27

31

7

4

2

30

3

1

37

11

28

22

24

26

35

18

16

12

34

19

17

13

21

20

9

8

25

14

OMIT

U2600

QFN

402

C2611

BYPASS=U2600.10::2MM

2

1

16V X7R-CERM

10%

0.1UF

BYPASS=U2600.5::2MM

2

1

C2612

402

16V

10%

0.1UF

X7R-CERM

BYPASS=U2600.23::5MM

4.7UF

20%

2

1

C2607

6.3V 603

X5R

U2650

2

32

33

3629231510

5

27

31

7

4

30

6

3

1

37

11

28 22

24

26

35

18

16

12

34

19

17

13

21

20

9

8

25

14

QFN

OMIT

USB2513B

2

1

C2661

402

16V

10% X7R-CERM

0.1UF

BYPASS=U2650.10::2MM

2

1

C2662

0.1UF

X7R-CERM

16V

10%

402

BYPASS=U2650.5::2MM

2

1

C2652

6.3V

20%

603

4.7UF

X5R

BYPASS=U2650.5::5MM

2

1

C2657

6.3V X5R

20%

4.7UF

603

BYPASS=U2650.23::5MM

SYNC_DATE=10/08/2010

USB HUBS

SYNC_MASTER=K91_ERIC

HUB1_1NONREM

HUB1_NONREM1_0,HUB1_NONREM0_1

HUB1_3NONREM

HUB1_NONREM1_1,HUB1_NONREM0_1

HUB1_ALLREM

HUB1_NONREM1_0,HUB1_NONREM0_0

HUB1_2NONREM

HUB1_NONREM1_1,HUB1_NONREM0_0

HUB2_NONREM1_0,HUB2_NONREM0_0

HUB2_ALLREM

HUB2_2NONREM

HUB2_NONREM1_1,HUB2_NONREM0_0

HUB2_3NONREM

HUB2_NONREM1_1,HUB2_NONREM0_1

338S0720

U2600,U2650

USBHUB_2514

2

CRITICAL

SMSC USB2514

U2600,U2650

USBHUB_2514B

2

SMSC USB2514B

CRITICAL

338S0824

338S0721

2

USBHUB_2061

U2600,U2650

CRITICAL

SMSC USX2061

338S0923

SMSC USX2513B

USBHUB_2513B

2

U2600,U2650

CRITICAL

HUB2_1NONREM

HUB2_NONREM1_0,HUB2_NONREM0_1

USB_HUB2_VBUS_DET

NC_USB_HUB2_OCS4

USB_EXTA_OC_L

USB_HUB_RESET_L

USB_HUB2_RBIAS

PP3V3_S3

USB_EXTB_N

PP3V3_S3

NC_USB_HUB1_OCS4

NC_USB_HUB1_OCS2

PPUSB_HUB1_VDD1V8

MIN_NECK_WIDTH=0.2MM

VOLTAGE=1.8V

MIN_LINE_WIDTH=0.4MM

NC_USB_HUB1_PRTPWR2

TP_USB_HUB1_PRTPWR1

NC_USB_HUB1_PRTPWR3

USB_HUB1_XTAL2

USB_HUB1_XTAL1

USB_HUB1_NONREM0

USB_HUB1_CFG_SEL1

USB_HUB1_NONREM1

USB_HUB2_NONREM1

USB_HUB1_UP_N

PP3V3_S3

USB_HUB_RESET

P3V3S3_EN_RC

PP3V3_S5

USB_HUB_SOFT_RESET_L

USB_HUB1_TEST USB_HUB_RESET_L

USB_HUB1_UP_P

USB_IR_N

USB_HUB1_CFG_SEL0

USB_HUB2_NONREM0

USB_HUB2_CFG_SEL0 USB_HUB2_CFG_SEL1

USB_HUB2_TEST USB_HUB_RESET_L

USB_HUB2_UP_P

NC_USB_HUB2_PRTPWR4

TP_USB_HUB2_OCS1 NC_USB_HUB2_OCS2

USB_HUB2_UP_N

USB_SDCARD_N USB_SDCARD_P

USB_EXTA_P

USB_EXTA_N

USB_TPAD_P

NC_USB_HUB2_PRTPWR3

TP_USB_HUB2_PRTPWR1 NC_USB_HUB2_PRTPWR2

MIN_NECK_WIDTH=0.2MM

PPUSB_HUB2_VDD1V8PLL

VOLTAGE=1.8V

MIN_LINE_WIDTH=0.4MM

USB_HUB2_XTAL2

USB_HUB2_XTAL1

PP3V3_S3

USB_EXTB_OC_L

USB_EXTC_P

NC_USB_HUB1_PRTPWR4

TP_USB_HUB1_OCS1

USB_BT_N USB_BT_P

USB_TPAD_N

PP3V3_S3

PPUSB_HUB1_VDD1V8PLL

MIN_LINE_WIDTH=0.4MM MIN_NECK_WIDTH=0.2MM

VOLTAGE=1.8V

USB_HUB1_VBUS_DET

USB_HUB1_RBIAS

MIN_NECK_WIDTH=0.2MM

PPUSB_HUB2_VDD1V8

MIN_LINE_WIDTH=0.4MM

VOLTAGE=1.8V

USB_EXTC_N

USB_EXTB_P

USB_T29A_P

USB_IR_P

USB_T29A_N

26 OF 132 24 OF 101

6 7 8

18 19 24 25 29 30 31 32

47 48 49 53 54 71 72 87

6 7 8

18 19 24 25 29 30

31 32 47 48 49 53 54 71

72 87

6

6 7 8

18 19 24 25 29 30 31 32

47 48 49 53 54 71 72 87

6 7

17 19 20 22 23 25 29 39

45 55 65 70 71 72 82 85 89 98

24

6

6 7 8

18 19 24 25 29 30 31 32

47 48 49 53 54 71 72 87

6

6 7 8

18 19 24 25 29

30 31 32 47 48 49 53 54

71 72 87

www.rosefix.com

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IN

OUT

IN

OUT

IN

OUT

IN

OUT

BI

OUT

D

GS

OUT

IN

OUT

NC

OUT

PAD

+3.42V

VDD_25M

+V3.3A

VDDIO_25M_C

VDDIO_25M_B

VDDIO_25M_A

25MHZ_C

25MHZ_B

25MHZ_A

X1

X2

VDD_RTC_OUT

THRM

GND

32KHZ_A

OUT

D

SG

IN

D

SG

NC NC

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

VDDIO_25M_B: Ethernet power rail for XTAL circuit. VDDIO_25M_C: T29 power rail for XTAL circuit.

NOTE: VDD_25M must be powered if any VDDIO_25M_x is powered.

GreenClk 25MHz Power

Ethernet XTAL Power SB XTAL Power T29 XTAL Power

NOTE: 30 PPM crystal required

PCH Reset Button

ENET_MEDIA_SENSE ISOLATION CIRCUIT

Ethernet WAKE# Isolation

Coin-Cell: VBAT (300-ohm & 10uF RC) No Coin-Cell: 3.42V G3Hot (no RC)

VBAT and +V3.3A are

create VDD_RTC_OUT. +V3.3A should be first

available ~3.3V power

internally ORed to

System RTC Power Source & 32kHz / 25MHz Clock Generator

to reduce VBAT draw.

ENET_RESET_L hooked up differently on both the projects.

This page is different for K92.

Buffered CPU reset

Coin-Cell & G3Hot: 3.42V G3Hot

Series R on Pg38, R3803

Platform Reset Connections

Unbuffered

VTT voltage divider on CPU page

Coin-Cell & No G3Hot: 3.3V S5

For SB RTC Power

VDDIO_25M_A: SB power rail for XTAL circuit.

NOTE:

Buffered

Note: Based on K91/K92 layout, ENET,AP and BKLT are moved to Buffered reset.

Series R is R4283

No Coin-Cell: 3.3V S5

No bypass necessary

10 23 90

402

MF-LF

XDP

1 2

1/16W

5%

0

R2896

33

402

MF-LF

1/16W

5%

R2883

1 2

1/16W

33

MF-LF

402

5%

R2881

1 2

6

25 46 87 93

44

31

PLACE_NEAR=U1800.P53

22

201

MF

5%

1/20W

R2856

1 2

5% MF

PLACE_NEAR=U1800.N52

22

201

1/20W

R2855

1 2

18 93

30

1/16W

402

MF-LF

5%

0

R2871

1 2

6

46 93

44 93

18

87

22

MF

PLACE_NEAR=U1800.P46

5%

1/20W

201

R2857

1 2

23

MF-LF

1K

402

5%

1/16W

XDP

R2889

1 2

0.1UF

402

20%

CERM

10V

C2880

1

2

SC70-HF

MC74VHC1G08

U2880

3

2

1

4

5

CRITICAL

1/16W 402

5% MF-LF

100K

R2880

1

2

16 93

22

5% MF

201

PLACE_NEAR=U1800.P48

1/20W

R2859

1 2

18

18 25

25 87

0

402

5% 1/16W MF-LF

R2887

1 2

0

5%

402

1/16W MF-LF

OMIT

SILK_PART=SYS RESET

R2897

1

2

6

25 46 87 93

88

4.7K

MF-LF

1/16W 402

5%

R2895

1

2

6

17 44

18 25 29 39

SOD-VESM-HF

SSM3K15FV

3

1

2

CRITICAL

Q2830

6

17 31 84 25 36

MF-LF

10K

5%

402

1/16W

R2830

1

2

16

33

6.3V CERM

1UF

10%

402

C2810

1

2

402-1

10%

1UF

10V

X5R

C2802

1

2

402

0.1UF

20%

10V

CERM

C2820

1

2

20%

10V

CERM

402

0.1UF

1

2

C2822

1/16W 402

5% MF-LF

NO STUFF

1M

R2806

1

2

20%

10V

402

CERM

0.1UF

C2824

1

2

5%

MF-LF

1/16W

0

R2805

1 2

402

CERM

2 1

12PF

C2805

5%

402

50V

402

CERM

5%

12PF

C2806

1 2

50V

10 23 25

MF-LF 402

1/16W

5%

100K

R2890

1

2

74LVC1G07

SC70

U2890

2

31

5

4

CRITICAL

402

CERM

20% 10V

0.1UF

C2890

1

2

R2888

5%

402

MF-LF

1/16W

0

1 2

0

402

5% 1/16W MF-LF

R2893

1 2

25 32 35

MF

5%

1/20W

201

0

R2800

1 2

36

TQFN

12

71016

17

1

3 4

9 8 15

11

6

14

2513

U2800

SLG3NB148V

CRITICAL

16

PLACE_NEAR=U1800.N32:5mm

R2819

2

1

201

10K

5%

MF

1/20W

R2810

1 2

402

12K

MF-LF 1/16W

5%

Q2810

SOT563

3

5

4

SSM6N37FEAPE

CRITICAL

R2811

1

2

201

1/20W

MF

5%

100K

36

Q2810

2

1

6

SOT563

SSM6N37FEAPE

R2812

1

2

402

0

1/16W

MF-LF

5%

3

4 2

1

25.000MHZ-12PF-20PPM

SM-3.2X2.5MM

Y2805

CRITICAL

SYNC_DATE=07/06/2010

SYNC_MASTER=K92_MLB

Chipset Support

SYSCLK_CLK25M_X1

PP1V8_S0

PP3V3_ENET

PLT_RESET_L

GMUX_RESET_L

MAKE_BASE=TRUE

PLT_RST_BUF_L

BKLT_PLT_RST_L

GMUX_RESET_L

MAKE_BASE=TRUE

ENET_WAKE_L

MAKE_BASE=TRUE

LPC_CLK33M_GMUX_R

MAKE_BASE=TRUE

PLT_RST_CPU_BUF_L

LPCPLUS_RESET_L

MAKE_BASE=TRUE

PLT_RST_CPU_BUF_L

PM_SYSRST_L

PCIE_WAKE_L ENET_WAKE_L

PP3V3_ENET

SMC_LRESET_L

PP3V3_S0

PCH_CLK33M_PCIIN

XDP_DBRESET_L

LPC_CLK33M_GMUX_R

XDPPCH_PLTRST_L

PCA9557D_RESET_L

LPC_CLK33M_LPCPLUS

LPCPLUS_RESET_L

PP3V3_S0

LPC_CLK33M_SMC_R

LPC_CLK33M_LPCPLUS_R

PCH_CLK33M_PCIOUT

AP_RESET_L

MAKE_BASE=TRUE

PLT_RST_BUF_L

PLT_RESET_L

MAKE_BASE=TRUE

PP3V3_S0

LPC_CLK33M_SMC

SYSCLK_CLK25M_ENET

PLT_RST_BUF_L

SYSCLK_CLK32K_RTC

PPVRTC_G3H

SYSCLK_CLK25M_X2_R

SYSCLK_CLK25M_SB SYSCLK_CLK25M_ENET_R SYSCLK_CLK25M_T29

PP3V3_ENET

PP3V3_T29

PP3V3_S5

PP3V42_G3H

ENET_MEDIA_SENSE_RDIV

ENET_MEDIA_SENSE_EN_L

PP3V3_S3

ENET_MEDIA_SENSE

ENET_MEDIA_SENSE_EN

PP1V5_S0

LPC_CLK33M_GMUX

SYSCLK_CLK25M_X2

28 OF 132 25 OF 101

6 7

14 17 20 22 70 71 87

6 7

25 36 70 72

25 87

25 36

18 25

10 23

25

6 7

25 36 70 72

6 7

12 16 17 18 19 20 22 23

25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

6 7

12 16 17 18 19 20 22 23

25 26 28 32 35 36 39 40 41

45 47 48 49 50 51 53 56 60

61 71 72 79 82 83 84 87 88

89 98

25 32

35

6 7

12 16 17 18 19 20 22 23

25 26 28 32 35 36 39 40 41 45

47 48 49 50 51 53 56 60 61 71

72 79 82 83 84 87 88 89 98

7

16 17 20

6 7

25 36 70 72

7

16 19 33 34 35 87

6 7

17 19 20 22 23 24 29 39

45 55 65 70 71 72 82 85 89

98

6 7

42 44 45 46 47 52 62 63

72

6 7 8

18 19 24 29 30 31 32 47

48 49 53 54 71 72 87

7

16 20 22 41 56 70

www.rosefix.com

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A6

A7

A11

A5

DQ33

VDD

A10/AP

VDD

VSS

SA1

VTT

VSS

DQS4* DQS4

VSS

DQ35

VSS

CK0*

SA0

VSS DQ58 DQ59

DM7

VSS

DQ57

DQ56

DQ50 DQ51

VSS

DQS6* DQS6

VSS

DQ49

DQ48

DQ43

VSS

DM5

VSS DQ42

SDA SCL

VTT

VSS

EVENT*

DQ62

VSS

DQ63

DQS7*

DQS7

DQ60 DQ61

VSS

DQ55

DQ54

DM6

VSS

DQ53

VSS

DQ52

DQ47

VSS

DQS5

VSS

DQ46

DQ41

VSS DQ40

DQ34

VSS

DQ32

TEST

VDD

S1*

A13

CAS*

WE*

BA0

VDD

VDD CK0

A1

A3

VDD

VDD A8

A9

A12/BC*

VDD

BA2

NC

VDD

CKE0

VSS

DQS5*

VSS DQ44 DQ45

DQ39

DQ38

VSS

DM4

VSS

DQ37

DQ36

VREFCA

VDD ODT1

NC

S0*

ODT0

BA1

RAS*

VDD

CK1*

VDD

A0

CK1

A2

VDD

A4

VDD

A14

A15

CKE1

VDD

VSS

VDDSPD

KEY

(SYMBOL 2 OF 2)

BI BIBI

BI

IN

BI BI

BI

IN

BI

BI BI

DQ16

DM3

DQ26 DQ27

DQ4

DQ31

DQ30

DQS3

DQS3*

DQ29

DQ28

DQ23

DQ22

DM2

DQ21

DQ20

DQ15

DQ14

RESET*

DM1

DQ13

DQ12

DQ7

DQ6

DQS0

DQS0*

DQ5

DQ24 DQ25

DQ19

DQ18

DQS2

DQS2*

DQ17

DQ11

DQ10

DQS1

DQS1*

DQ8 DQ9

DM0

DQ0 DQ1

VREFDQ

DQ3

DQ2

VSS

KEY

VSS

(SYMBOL 1 OF 2)

BI BI

BI

BI BI

BI

IN IN

IN

IN IN

IN

BI BI

IN

BI

BI BI

BI

BI BI

BI

OUT

BI

IN

IN IN

BI BI

NC

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

SPD ADDR=0xA0(WR)/0xA1(RD)

516-0229

"Factory" (top) slot

Signal aliases required by this page:

Page Notes

Power aliases required by this page:

- =PP1V5_S0_MEM_A

- =PP1V5_S3_MEM_A

- =PP0V75_S0_MEM_VTT_A

- =PPSPD_S0_MEM_A (2.5 - 3.3V)

- =I2C_SODIMMA_SCL

- =I2C_SODIMMA_SDA

BOM options provided by this page:

(NONE)

DDR3 DECOUPLING AND GND RETURN CAPS (SPACE EVENLY AT CONNECTOR)

See CSA05 BOM table

F-RT-THB

DDR3-SODIMM-DUAL-K6

J2900

9897

107

83

119

80

78

9695

91

9089

85

109

108

79

115

101 103

102 104

73 74

136

153

170

187

129 131

141 143

130 132

140 142

147 149

157 159

146 148

158 160

163 165

175 177

164 166

174 176

181 183

191 193

180 182

192 194

137

135

154

152

171

169

188

186

198

77

122

116

120

110

114

121

197

201 202

200

125

75 76

105 106

111 112

117 118

123 124

81 82

87 88

93 94

99

100

199

126

127 128

133 134

138

139

144

145

150

151

155 156

161 162

167 168

172

173

178

179

184

185

189 190

195 196

203 204

113

92

86

84

OMIT_TABLE

27

0.1UF

2

1

C2931

10V

20%

402

CERM

2.2UF

2

1

C2930

20%

402-LF

CERM

6.3V

27

6

11 91

27

28 29

27

OMIT_TABLE

2625

2019

1413

9

7271

6665

61

60

8

55

54

49

48

4443

3837

3231

3

21

30

62 64

45 47

27 29

10 12

23

21

18

16

6

4

70

68

17

58

56

69

67

59

57

52

50

42

40

15

53

51

41

39

36

34

24

22

35

33

7

5

63

46

28

11

J2900

F-RT-THB

DDR3-SODIMM-DUAL-K6

CRITICAL

27

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

27

6

11 91

27

6

11 27 91

27

2

1

C2936

0.1UF

CERM 402

20% 10V

2

1

C2935

CERM

2.2UF

6.3V

20%

402-LF

27

28 44

16 23 28 30 41 47 61 88 93

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

27

6

11 27 91

6

11 27 91

27

2

1

R2941

5% 1/16W MF-LF 402

10K

2

1

R2940

402

5% 1/16W MF-LF

10K

2

1

C2940

6.3V

402-LF

CERM

20%

2.2UF

C2900

PLACE_NEAR=J2900.75:2.54mm

2

1

20%

603

6.3V X5R

10UF

2

1

C2901

10UF

X5R

6.3V

20%

603

PLACE_NEAR=J2900.75:2.54mm

2

1

C2910

PLACE_NEAR=J2900.75:2.54mm

0.1UF

20% 10V

402

CERM

2

1

C2911

CERM

10V

20%

402

0.1UF

PLACE_NEAR=J2900.75:2.54mm

2

1

C2912

CERM

PLACE_NEAR=J2900.75:2.54mm

402

10V

20%

0.1UF

2

1

C2913

0.1UF

20% 10V CERM

PLACE_NEAR=J2900.75:2.54mm

402

2

1

C2914

0.1UF

20% CERM

402

10V

PLACE_NEAR=J2900.75:2.54mm

2

1

C2915

CERM 402

10V

20%

0.1UF

PLACE_NEAR=J2900.75:2.54mm

2

1

C2916

CERM 402

20%

0.1UF

10V

PLACE_NEAR=J2900.75:2.54mm

2

1

C2917

CERM 402

20%

0.1UF

10V

PLACE_NEAR=J2900.75:2.54mm

2

1

C2918

CERM 402

20% 10V

0.1UF

PLACE_NEAR=J2900.75:2.54mm

2

1

C2919

CERM 402

20%

0.1UF

10V

PLACE_NEAR=J2900.75:2.54mm

2

1

C2920

0.1UF

CERM 402

20% 10V

PLACE_NEAR=J2900.75:2.54mm

2

1

C2921

CERM 402

20%

0.1UF

10V

PLACE_NEAR=J2900.75:2.54mm

2

1

C2922

CERM 402

20%

0.1UF

10V

PLACE_NEAR=J2900.75:2.54mm

2

1

C2923

PLACE_NEAR=J2900.75:2.54mm

CERM 402

20%

0.1UF

10V

2

1

C2950

10% 10V

1UF

X5R 402

2

1

C2951

10% 10V

1UF

X5R 402

2

1

C2952

10% 10V

1UF

X5R 402

2

1

C2953

10% 10V

1UF

X5R 402

SYNC_MASTER=K92_SUMA SYNC_DATE=06/23/2010

DDR3 SO-DIMM Connector A

PP1V5_S3

MEM_A_BA<1>

MEM_A_CLK_P<0> MEM_A_CLK_N<0>

PP0V75_S3_MEM_VREFCA_A

MEM_A_A<3>

=MEM_A_DQ<0>

MEM_A_A<15>

MEM_A_CKE<1>

=MEM_A_DQ<25>

=MEM_A_DQ<8>

MEM_RESET_L

=MEM_A_DQ<27>

=MEM_A_DQ<19>

=MEM_A_DQS_N<2>

=MEM_A_DQ<17>

=MEM_A_DQ<10>

PP3V3_S0

=MEM_A_DQ<58> =MEM_A_DQ<59>

=MEM_A_DQ<52>

=MEM_A_DQ<45>

=MEM_A_DQ<44>

MEM_A_DQ<32>

=MEM_A_DQ<42> =MEM_A_DQ<43>

MEM_A_A<5>

MEM_A_BA<0>

=MEM_A_DQ<34>

=MEM_A_DQ<51>

=MEM_A_DQ<56>

=MEM_A_DQ<32>

=MEM_A_DQ<50>

=MEM_A_DQ<49>

=MEM_A_DQ<48>

MEM_A_A<11>

=MEM_A_DQ<11>

=MEM_A_DQ<29>

MEM_A_ODT<1>

MEM_A_CLK_P<1> MEM_A_CLK_N<1>

MEM_A_RAS_L

MEM_A_A<2>

MEM_A_CS_L<0>

MEM_A_A<8>

MEM_A_A<1>

MEM_A_A<10>

MEM_A_WE_L MEM_A_CAS_L

MEM_A_A<13> MEM_A_CS_L<1>

MEM_A_CKE<0>

=MEM_A_DQS_P<4>

=MEM_A_DQ<33>

=MEM_A_DQS_N<4>

=MEM_A_DQ<35>

=MEM_A_DQ<57>

MEM_A_DQS_N<6> MEM_A_DQS_P<6>

SMBUS_PCH_DATA

MEM_EVENT_L

=MEM_A_DQS_N<7> =MEM_A_DQS_P<7>

=MEM_A_DQ<60>

=MEM_A_DQ<40>

MEM_A_BA<2>

=MEM_A_DQ<39>

=MEM_A_DQ<38>

MEM_A_ODT<0>

=MEM_A_DQ<16>

=MEM_A_DQ<26>

=MEM_A_DQ<4>

=MEM_A_DQ<31>

=MEM_A_DQ<30>

=MEM_A_DQS_P<3>

=MEM_A_DQS_N<3>

=MEM_A_DQ<28>

=MEM_A_DQ<15>

=MEM_A_DQ<14>

=MEM_A_DQ<13>

=MEM_A_DQ<12>

=MEM_A_DQ<7>

=MEM_A_DQ<6>

=MEM_A_DQS_P<0>

=MEM_A_DQS_N<0>

=MEM_A_DQ<5>

=MEM_A_DQ<24>

=MEM_A_DQS_P<1>

=MEM_A_DQS_N<1>

=MEM_A_DQ<1>

=MEM_A_DQ<3>

=MEM_A_DQ<2>

=MEM_A_DQ<23>

=MEM_A_DQ<22>

=MEM_A_DQ<21>

MEM_A_A<4>

MEM_A_A<6>

MEM_A_A<12> MEM_A_A<9>

=MEM_A_DQ<9>

PP0V75_S3_MEM_VREFDQ_A

=MEM_A_DQ<53>

=MEM_A_DQ<41>

=MEM_A_DQ<20>

=MEM_A_DQ<46>

=MEM_A_DQ<55>

=MEM_A_DQS_P<2>

=MEM_A_DQ<18>

=MEM_A_DQ<47>

MEM_A_A<0>

MEM_A_A<7>

MEM_A_A<14>

=MEM_A_DQ<37>

=MEM_A_DQS_N<5> =MEM_A_DQS_P<5>

=MEM_A_DQ<61>

=MEM_A_DQ<63>

MEM_A_SA<1>

PP0V75_S0_DDRVTT

MEM_A_SA<0>

SMBUS_PCH_CLK

=MEM_A_DQ<54>

=MEM_A_DQ<62>

29 OF 132 26 OF 101

6 7

28 29 66 71

30

6 7

12 16 17 18

19 20 22 23 25 28 32 35

36 39 40 41 45

47 48 49 50 51 53 56 60

61 71 72 79 82

83 84 87 88 89 98

9

30

6

6 7

28 29 66

6

www.rosefix.com

www.vinafix.vn

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

CPU CHANNEL B DQS 0 -> DIMM B DQS 0

CPU CHANNEL B DQS 1 -> DIMM B DQS 1

CPU CHANNEL B DQS 5 -> DIMM B DQS 5

CPU CHANNEL A DQS 4 -> DIMM A DQS 4

CPU CHANNEL B DQS 2 -> DIMM B DQS 2

CPU CHANNEL B DQS 7 -> DIMM B DQS 7

CPU CHANNEL B DQS 3 -> DIMM B DQS 3

CPU CHANNEL A DQS 0 -> DIMM A DQS 0

CPU CHANNEL A DQS 1 -> DIMM A DQS 1

CPU CHANNEL A DQS 2 -> DIMM A DQS 2

CPU CHANNEL A DQS 5 -> DIMM A DQS 5

CPU CHANNEL B DQS 6 -> DIMM B DQS 6

CPU CHANNEL A DQS 7 -> DIMM A DQS 7

CPU CHANNEL B DQS 4 -> DIMM B DQS 4

CPU CHANNEL A DQS 3 -> DIMM A DQS 3

CPU CHANNEL A DQS 6 -> DIMM A DQS 6

DDR3 Byte/Bit Swaps

SYNC_MASTER=K92_SUMA SYNC_DATE=05/10/2010

MEM_A_DQ<33>

MAKE_BASE=TRUE

MEM_A_DQ<32>

MAKE_BASE=TRUE

MEM_A_DQS_P<5>

MAKE_BASE=TRUE

MEM_A_DQ<47>

MAKE_BASE=TRUE

MEM_A_DQ<40>

MAKE_BASE=TRUE

=MEM_A_DQ<51>

=MEM_A_DQ<58> =MEM_A_DQ<56>

=MEM_A_DQ<60>

MEM_A_DQ<56>

MAKE_BASE=TRUE

MEM_A_DQ<57>

MAKE_BASE=TRUE

MEM_A_DQ<58>

MAKE_BASE=TRUE

=MEM_A_DQ<62>

=MEM_A_DQ<63>

=MEM_A_DQ<61>

=MEM_A_DQS_P<7>

=MEM_A_DQ<50>

=MEM_A_DQ<55>

=MEM_A_DQ<54>

MEM_A_DQS_N<6>

=MEM_A_DQ<49>

=MEM_A_DQ<48>

=MEM_A_DQ<59>

MEM_A_DQ<60>

MAKE_BASE=TRUE

MEM_A_DQ<61>

MAKE_BASE=TRUE

MEM_A_DQ<59>

MAKE_BASE=TRUE

=MEM_A_DQ<52>

MAKE_BASE=TRUE

MEM_B_DQ<54> MEM_B_DQ<53>

MAKE_BASE=TRUE

=MEM_A_DQ<53>

MEM_A_DQ<20>

MAKE_BASE=TRUE

MEM_A_DQ<19>

MAKE_BASE=TRUE

MEM_A_DQ<29>

MAKE_BASE=TRUE

=MEM_A_DQ<28>

MEM_A_DQS_N<6>

MAKE_BASE=TRUE

MEM_A_DQ<55>

MAKE_BASE=TRUE

MEM_A_DQ<62>

MAKE_BASE=TRUE

=MEM_A_DQ<57>

=MEM_A_DQS_N<7>

MAKE_BASE=TRUE

MEM_A_DQ<63>

MAKE_BASE=TRUE

MEM_A_DQS_P<7>

MAKE_BASE=TRUE

MEM_A_DQS_N<7>

MEM_A_DQ<53>

MAKE_BASE=TRUE

MEM_A_DQ<51>

MAKE_BASE=TRUE

MEM_A_DQ<52>

MEM_A_DQ<49>

MAKE_BASE=TRUE

MEM_A_DQ<50>

MAKE_BASE=TRUE

MEM_A_DQ<54>

MAKE_BASE=TRUE

MEM_A_DQS_P<6> MEM_A_DQS_P<6>

MEM_B_DQS_N<6>

MAKE_BASE=TRUE

=MEM_B_DQ<62>

MEM_B_DQ<57>

MAKE_BASE=TRUE

MEM_A_DQ<41>

MAKE_BASE=TRUE

MEM_A_DQ<42>

MEM_A_DQS_N<5>

MAKE_BASE=TRUE

MEM_A_DQ<35>

MEM_A_DQ<38>

MAKE_BASE=TRUE

=MEM_A_DQ<40> =MEM_A_DQ<46>

=MEM_A_DQ<44>

=MEM_A_DQ<41> =MEM_A_DQ<43>

=MEM_A_DQ<47>

MAKE_BASE=TRUE

MEM_A_DQ<46>

MAKE_BASE=TRUE

MEM_A_DQ<45>

MAKE_BASE=TRUE

MEM_A_DQ<43>

MAKE_BASE=TRUE

MEM_A_DQ<44>

=MEM_A_DQ<42> =MEM_A_DQ<45>

=MEM_A_DQS_P<5>

=MEM_A_DQS_N<5>

MEM_A_DQ<32>

=MEM_A_DQ<39>

MEM_A_DQ<37>

MAKE_BASE=TRUE

MEM_A_DQ<39>

MAKE_BASE=TRUE

=MEM_A_DQ<37>

=MEM_A_DQ<33> =MEM_A_DQ<35>

=MEM_A_DQ<32>

MEM_A_DQ<34>

MAKE_BASE=TRUE

=MEM_A_DQ<34>

=MEM_A_DQ<38>

MEM_A_DQ<22>

MAKE_BASE=TRUE MAKE_BASE=TRUE

MEM_A_DQ<21>

MEM_A_DQ<17>

MAKE_BASE=TRUE

MEM_A_DQ<16>

=MEM_A_DQ<30> =MEM_A_DQ<29>

MAKE_BASE=TRUE

MEM_A_DQ<36>

=MEM_A_DQS_P<4>

=MEM_A_DQ<24>

=MEM_A_DQ<25>

=MEM_A_DQ<27> =MEM_A_DQ<26>

MEM_A_DQ<30>

MAKE_BASE=TRUE

MEM_A_DQ<28> MEM_A_DQ<27>

MAKE_BASE=TRUE MAKE_BASE=TRUE

MEM_A_DQ<26>

=MEM_A_DQ<31>

=MEM_A_DQ<18>

=MEM_A_DQ<19>

=MEM_A_DQ<20>

MAKE_BASE=TRUE

MEM_A_DQ<18>

=MEM_A_DQ<16>

=MEM_A_DQ<17>

=MEM_A_DQ<23> =MEM_A_DQ<22>

=MEM_A_DQ<21>

MAKE_BASE=TRUE

MEM_A_DQ<23>

=MEM_A_DQS_P<2>

MEM_A_DQS_N<2>

MAKE_BASE=TRUE

=MEM_A_DQ<8>

=MEM_A_DQ<9>

=MEM_A_DQ<10>

=MEM_A_DQ<13>

=MEM_A_DQ<12>

=MEM_A_DQ<15>

=MEM_A_DQS_N<1>

=MEM_A_DQ<1>

=MEM_A_DQ<7>

MEM_A_DQ<3>

MAKE_BASE=TRUE

MEM_A_DQ<4>

MAKE_BASE=TRUE

MEM_A_DQ<5>

MEM_A_DQ<7>

MAKE_BASE=TRUE

=MEM_A_DQ<4>

=MEM_A_DQ<5>

MAKE_BASE=TRUE

MEM_A_DQ<0>

MEM_A_DQ<11>

MAKE_BASE=TRUE MAKE_BASE=TRUE

MEM_A_DQ<10>

MEM_A_DQ<12>

MAKE_BASE=TRUE

MEM_A_DQ<13>

MEM_A_DQ<8>

MAKE_BASE=TRUE

MEM_A_DQ<9>

MAKE_BASE=TRUE

=MEM_A_DQS_P<1>

MEM_A_DQ<1>

MAKE_BASE=TRUE

MEM_A_DQS_N<1>

MAKE_BASE=TRUE

MEM_A_DQ<15>

MAKE_BASE=TRUE

MEM_A_DQ<14>

MAKE_BASE=TRUE

MEM_A_DQS_P<1>

MEM_A_DQ<2>

MAKE_BASE=TRUE

MEM_A_DQ<6>

=MEM_A_DQ<2>

=MEM_A_DQ<0>

=MEM_A_DQ<3> =MEM_A_DQ<6>

MEM_A_DQS_P<0>

MAKE_BASE=TRUE

MEM_A_DQS_N<0>

MEM_B_DQS_N<2>

MAKE_BASE=TRUE

MEM_B_DQS_P<2>

=MEM_B_DQ<21>

=MEM_B_DQ<19> =MEM_B_DQ<18>

=MEM_B_DQ<16>

MAKE_BASE=TRUE

MEM_B_DQ<18>

=MEM_B_DQ<29> =MEM_B_DQ<28>

MEM_B_DQ<12>

MAKE_BASE=TRUE

=MEM_B_DQ<26>

=MEM_B_DQS_N<4> =MEM_B_DQS_P<4>

=MEM_A_DQ<14>

=MEM_A_DQ<11>

=MEM_A_DQS_N<3>

MAKE_BASE=TRUE

MEM_A_DQS_N<3>

MAKE_BASE=TRUE

MEM_A_DQS_P<3>

MAKE_BASE=TRUE

MEM_A_DQ<31>

=MEM_B_DQ<46>

=MEM_B_DQ<40>

=MEM_B_DQ<45> =MEM_B_DQ<44> =MEM_B_DQ<43> =MEM_B_DQ<42>

MEM_B_DQ<42>

MAKE_BASE=TRUE

MEM_B_DQ<47>

MAKE_BASE=TRUE

=MEM_B_DQ<58>

=MEM_B_DQ<53>

=MEM_B_DQ<48>

MEM_B_DQ<30>

MAKE_BASE=TRUE

MEM_A_DQ<48>

MAKE_BASE=TRUE

=MEM_B_DQ<1>

=MEM_B_DQS_N<1> =MEM_B_DQS_P<1>

=MEM_B_DQ<14> =MEM_B_DQ<13>

=MEM_B_DQ<11>

MEM_B_DQ<11>

MAKE_BASE=TRUE

=MEM_B_DQ<10>

=MEM_B_DQ<8>

=MEM_B_DQS_N<2>

=MEM_B_DQ<23>

=MEM_B_DQ<17>

MEM_B_DQ<17>

MAKE_BASE=TRUE

=MEM_B_DQS_N<3>

=MEM_B_DQ<30>

=MEM_B_DQ<24>

MEM_B_DQS_N<4>

MAKE_BASE=TRUE

=MEM_B_DQ<39> =MEM_B_DQ<38> =MEM_B_DQ<37>

MAKE_BASE=TRUE

MEM_B_DQ<37>

MAKE_BASE=TRUE

MEM_B_DQ<35>

=MEM_B_DQ<36>

MAKE_BASE=TRUE

MEM_B_DQ<36>

MEM_B_DQ<32>

=MEM_B_DQS_N<5> =MEM_B_DQS_P<5>

=MEM_B_DQ<47>

=MEM_B_DQ<41>

MAKE_BASE=TRUE

MEM_B_DQ<41>

MEM_B_DQS_N<6> MEM_B_DQS_P<6>

MAKE_BASE=TRUE

MEM_B_DQS_P<6>

=MEM_B_DQ<55> =MEM_B_DQ<54>

=MEM_B_DQ<52> =MEM_B_DQ<51> =MEM_B_DQ<50> =MEM_B_DQ<49>

MEM_B_DQ<49>

MAKE_BASE=TRUE

MEM_B_DQ<48>

MAKE_BASE=TRUE

=MEM_B_DQS_P<7>

MEM_B_DQS_P<7>

MAKE_BASE=TRUE

=MEM_B_DQS_N<7>

MEM_B_DQS_N<7>

MAKE_BASE=TRUE

MEM_B_DQ<62>

MAKE_BASE=TRUE

=MEM_B_DQ<63>

MEM_B_DQ<63>

MAKE_BASE=TRUE

=MEM_B_DQ<60>

MEM_B_DQ<60>

MAKE_BASE=TRUE

=MEM_B_DQ<61>

MEM_B_DQ<61>

MAKE_BASE=TRUE

=MEM_B_DQ<59>

MEM_B_DQ<59>

MAKE_BASE=TRUE

=MEM_B_DQ<57>

MEM_B_DQ<58>

MAKE_BASE=TRUE

=MEM_B_DQ<56>

MEM_B_DQ<56>

MAKE_BASE=TRUE

=MEM_B_DQ<9>

=MEM_B_DQ<27>

=MEM_B_DQS_N<0>

MAKE_BASE=TRUE

MEM_B_DQS_P<1>

MAKE_BASE=TRUE

MEM_B_DQ<1>

=MEM_B_DQS_P<2>

=MEM_B_DQ<22>

MAKE_BASE=TRUE

MEM_B_DQ<15>

MEM_B_DQ<9>

MAKE_BASE=TRUE

=MEM_B_DQ<15>

=MEM_B_DQ<12>

=MEM_B_DQ<20>

=MEM_B_DQS_P<3>

=MEM_B_DQ<31>

MEM_B_DQ<22>

MAKE_BASE=TRUE

MEM_B_DQS_N<3>

MAKE_BASE=TRUE

=MEM_B_DQ<35> =MEM_B_DQ<34> =MEM_B_DQ<33>

=MEM_B_DQ<25>

MEM_B_DQ<29>

MAKE_BASE=TRUE

MEM_B_DQ<16>

MAKE_BASE=TRUE

=MEM_A_DQS_P<3>

MAKE_BASE=TRUE

MEM_B_DQ<51>

MEM_B_DQ<55>

MAKE_BASE=TRUE

MEM_B_DQ<43>

MAKE_BASE=TRUE

MEM_B_DQ<45>

MAKE_BASE=TRUE

MEM_B_DQ<46>

MAKE_BASE=TRUE

MEM_B_DQ<38>

MEM_B_DQ<28>

MAKE_BASE=TRUE

MEM_B_DQ<23>

MAKE_BASE=TRUE

MEM_B_DQ<14>

MAKE_BASE=TRUE

MEM_B_DQS_N<1>

MAKE_BASE=TRUE

MEM_B_DQ<0>

MAKE_BASE=TRUE

MEM_B_DQ<10>

MAKE_BASE=TRUE

MEM_B_DQ<8>

=MEM_A_DQS_P<0>

MEM_A_DQS_P<2>

MAKE_BASE=TRUE

MEM_A_DQ<25>

MAKE_BASE=TRUE

MEM_B_DQ<26>

MAKE_BASE=TRUE

=MEM_A_DQS_N<4>

MAKE_BASE=TRUE

MEM_A_DQS_P<4>

MAKE_BASE=TRUE

MEM_A_DQS_N<4>

MAKE_BASE=TRUE

MEM_A_DQ<24>

MEM_B_DQ<50>

MAKE_BASE=TRUE

MEM_B_DQ<52>

MAKE_BASE=TRUE

MEM_B_DQ<40>

MAKE_BASE=TRUE

MEM_B_DQ<44>

MEM_B_DQS_P<5>

MAKE_BASE=TRUE

MEM_B_DQS_N<5>

MAKE_BASE=TRUE

MEM_B_DQ<32>

MAKE_BASE=TRUE

MEM_B_DQ<33>

MAKE_BASE=TRUE

MEM_B_DQ<34>

MEM_B_DQ<39>

MAKE_BASE=TRUE

MEM_B_DQS_P<4>

MAKE_BASE=TRUE

MEM_B_DQ<24>

MAKE_BASE=TRUE

MEM_B_DQ<25>

MAKE_BASE=TRUE

MEM_B_DQ<27>

MAKE_BASE=TRUE

MEM_B_DQ<31>

MEM_B_DQS_P<3>

MAKE_BASE=TRUE

MEM_B_DQ<19>

MAKE_BASE=TRUE

MEM_B_DQ<20>

MAKE_BASE=TRUE

MEM_B_DQ<21>

MEM_B_DQ<13>

MAKE_BASE=TRUE

=MEM_A_DQS_N<0>

=MEM_A_DQS_N<2>

MAKE_BASE=TRUE

MEM_B_DQ<2>

MEM_B_DQS_N<0>

MAKE_BASE=TRUE

MEM_B_DQ<7>

MAKE_BASE=TRUE

MEM_B_DQ<6> MEM_B_DQ<5>

MAKE_BASE=TRUE

MEM_B_DQ<4>

MAKE_BASE=TRUE

MEM_B_DQ<3>

MAKE_BASE=TRUE

=MEM_B_DQ<0>

=MEM_B_DQ<2>

=MEM_B_DQ<7>

=MEM_B_DQ<4>

=MEM_B_DQ<5>

=MEM_B_DQ<3>

=MEM_B_DQ<6>

=MEM_B_DQS_P<0>

MEM_B_DQS_P<0>

MAKE_BASE=TRUE

30 OF 132 27 OF 101

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www.rosefix.com

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IN

BI

BI BI

OUT

BI

IN

IN IN

IN

IN IN

BI BI

BI

BI BI

NC

IN

VDD

A1

A3

VDD

A5

A8

VDD

A9

VDD

A12/BC*

VSS

DQ42 DQ43

DQ48 DQ49

VSS

DQ41

DQS4*

DM5

VDD

CKE1

A15 A14

VDD

A11

A7

A6

VDD

A4

A2

CK1

A0

VDD

CK1*

VDD

RAS*

BA1

ODT0

S0*

NC

ODT1

VDD

VREFCA

VDD

DQ36 DQ37

VSS

DM4

VSS

VSS DQ38 DQ39

DQ45

DQ44

VSS

DQS5*

VSS

CKE0

VDD NC

BA2

CK0

VDD

BA0

WE*

A13 S1*

VDD

TEST

DQ33

DQ32

VSS

DQ34

DQ40

VSS

DQ46

VSS

DQS5

VSS

DQ47

DQ52

VSS

DQ53

VSS

DM6

DQ54 DQ55

VSS

DQ61

DQ60

DQS7

DQS7*

DQ63

VSS DQ62

EVENT*

VSS

VTT

SCL

SDA

VSS

DQS6

DQS6*

VSS

DQ51

DQ50

A10/AP

VDD

CK0*

DQ35

VSS

DQS4

VSS

CAS*

VDD

DM7

VSS

DQ56

MTG PIN

MTG PIN MTG PIN MTG PIN MTG PIN

MTG PIN

VSS

DQ57

VTT

SA1

SA0

DQ58

VSS

DQ59

VSS

VDDSPD

MTG PIN

MTG PINS

KEY

(2 OF 2)

BI BI

BI

IN

BI

BI BI

BI

DQ2 DQ3

VREFDQ

DQ1

DQ0

DM0

DQ9

DQ8

DQS1* DQS1

DQ10 DQ11

DQ17

DQS2* DQS2

DQ18 DQ19

DQ25

DQ24

DQ5

DQS0*

DQS0

DQ6 DQ7

DQ12 DQ13

DM1

RESET*

DQ14 DQ15

DQ20 DQ21

DM2

DQ22 DQ23

DQ28 DQ29

DQS3*

DQS3

DQ30 DQ31

DQ4

DQ27

DQ26

DM3

DQ16

(1 OF 2)

VSS

KEY

VSS

BI BI

BI

BI BI

IN IN

IN

BI

IN

IN IN

BI BI

IN

BI BI

BI

BI BI

BI

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

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REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

- =PP1V5_S0_MEM_B

SPD ADDR=0xA4(WR)/0xA5(RD)

516S0806

- =PPSPD_S0_MEM_B (2.5 - 3.3V)

- =PP1V5_S3_MEM_B

"Expansion" (bottom) slot

(NONE)

- =I2C_SODIMMB_SCL

Power aliases required by this page:

DDR3 DECOUPLING AND GND RETURN CAPS (SPACE EVENLY AT CONNECTOR)

BOM options provided by this page:

Page Notes

- =PP0V75_S0_MEM_VTT_B

Signal aliases required by this page:

- =I2C_SODIMMB_SDA

6

11 91

27

26 44

16 23 26 30 41 47 61 88 93

CERM

10V

20%

402

0.1UF

C3131

1

2

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

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11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 27 91

27

6

11 27 91

6

11 27 91

27

CERM 402-LF

6.3V

20%

2.2UF

C3130

1

2

5%

MF-LF 402

10K

1/16W

R3141

1

2

MF-LF

1/16W

402

5%

10K

R3140

1

2

2.2UF

6.3V

402-LF

CERM

20%

C3140

1

2

PLACE_NEAR=J3100.75:2.54mm

603

6.3V X5R

20%

10UF

C3100

1

2

PLACE_NEAR=J3100.75:2.54mm

20%

603

X5R

10UF

6.3V

C3101

1

2

0.1UF

20% 10V

402

CERM

PLACE_NEAR=J3100.75:2.54mm

C3110

1

2

20% 10V CERM 402

0.1UF

PLACE_NEAR=J3100.75:2.54mm

C3111

1

2

PLACE_NEAR=J3100.75:2.54mm

402

10V

20%

0.1UF

CERM

C3112

1

2

PLACE_NEAR=J3100.75:2.54mm

20% 10V

0.1UF

402

CERM

C3113

1

2

27

PLACE_NEAR=J3100.75:2.54mm

20% CERM

402

10V

0.1UF

C3114

1

2

PLACE_NEAR=J3100.75:2.54mm

402

20%

0.1UF

CERM

10V

C3115

1

2

PLACE_NEAR=J3100.75:2.54mm

CERM 402

20%

0.1UF

10V

C3116

1

2

PLACE_NEAR=J3100.75:2.54mm

CERM 402

20%

0.1UF

10V

C3117

1

2

PLACE_NEAR=J3100.75:2.54mm

CERM 402

20%

0.1UF

10V

C3118

1

2

PLACE_NEAR=J3100.75:2.54mm

CERM 402

20%

0.1UF

10V

C3119

1

2

PLACE_NEAR=J3100.75:2.54mm

0.1UF

CERM 402

20% 10V

C3120

1

2

PLACE_NEAR=J3100.75:2.54mm

CERM 402

20%

0.1UF

10V

C3121

1

2

PLACE_NEAR=J3100.75:2.54mm

CERM 402

20%

0.1UF

10V

C3122

1

2

PLACE_NEAR=J3100.75:2.54mm

CERM 402

20%

0.1UF

10V

C3123

1

2

27

10% 10V X5R 402

1UF

C3153

1

2

10% 10V X5R 402

1UF

C3152

1

2

6

11 91

10% 10V

1UF

X5R 402

C3151

1

2

10% 10V

1UF

X5R 402

C3150

1

2

F-RT-BGA6

DDR3-SODIMM

J3100

9897

107

8483

119

80

78

9695

9291

90

86

89

85

109

108

79

115

101 103

102 104

73 74

136

153

170

187

129 131

141 143

130 132

140 142

147 149

157 159

146 148

158 160

163 165

175 177

164 166

174 176

181 183

191 193

180 182

192 194

137

135

154

152

171

169

188

186

198

77

122

116

120

110

114

121

197

201 202

200

125

75 76

105 106

111 112

117 118

123 124

81 82

87 88

93 94

99

100

199

126

127 128

133 134

138

139

144

145

150

151

155 156

161 162

167 168

172

173

178

179

184

185

189 190

195 196

205 206 207 208 209 210 211 212

203 204

113

OMIT_TABLE

27

26 29

27

F-RT-BGA6

DDR3-SODIMM

CRITICAL

J3100

11

28

46

63

5 7

33 35

22 24

34 36

39 41

51 53

15

40 42

50 52

57 59

67 69

56 58

17

68 70

4 6

16 18

21 23

12

10

29

27

47

45

64

62

30

1 2 3

31 32

37 38

43 44

48

49

54

55

8

60

61

65 66

71 72

9

13 14

19 20

25 26

OMIT_TABLE

27

6

11 91

6

11 91

6

11 91

27

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

6

11 91

27

6

11 91

27

CERM 402

10V

0.1UF

20%

C3136

1

2

2.2UF

6.3V CERM

20%

402-LF

C3135

1

2

27

DDR3 SO-DIMM Connector B

SYNC_DATE=06/23/2010SYNC_MASTER=K92_SUMA

MEM_B_WE_L

PP0V75_S0_DDRVTT

=MEM_B_DQS_P<0>

=MEM_B_DQ<60> =MEM_B_DQ<61>

=MEM_B_DQS_N<7> =MEM_B_DQS_P<7>

MEM_B_SA<0>

=MEM_B_DQ<43>

MEM_B_A<6>

PP1V5_S3

MEM_B_A<4>

PP3V3_S0

=MEM_B_DQS_P<4>

=MEM_B_DQ<34>

=MEM_B_DQ<62>

=MEM_B_DQ<50>

=MEM_B_DQ<16>

=MEM_B_DQ<26> =MEM_B_DQ<27>

=MEM_B_DQ<4>

=MEM_B_DQ<31>

=MEM_B_DQ<30>

=MEM_B_DQS_P<3>

=MEM_B_DQS_N<3>

=MEM_B_DQ<29>

=MEM_B_DQ<28>

=MEM_B_DQ<23>

=MEM_B_DQ<22>

=MEM_B_DQ<21>

=MEM_B_DQ<20>

=MEM_B_DQ<15>

=MEM_B_DQ<14>

MEM_RESET_L

=MEM_B_DQ<12>

=MEM_B_DQ<7>

=MEM_B_DQ<6>

=MEM_B_DQS_N<0>

=MEM_B_DQ<5>

=MEM_B_DQ<24> =MEM_B_DQ<25>

=MEM_B_DQ<19>

=MEM_B_DQ<18>

=MEM_B_DQS_P<2>

=MEM_B_DQS_N<2>

=MEM_B_DQ<17>

=MEM_B_DQ<11>

=MEM_B_DQ<10>

=MEM_B_DQS_P<1>

=MEM_B_DQS_N<1>

=MEM_B_DQ<8> =MEM_B_DQ<9>

=MEM_B_DQ<0> =MEM_B_DQ<1>

PP0V75_S3_MEM_VREFDQ_B

=MEM_B_DQ<3>

=MEM_B_DQ<2>

=MEM_B_DQ<58>

MEM_B_SA<1>

=MEM_B_DQ<57>

=MEM_B_DQ<56>

=MEM_B_DQ<35>

=MEM_B_DQ<51>

SMBUS_PCH_DATA SMBUS_PCH_CLK

MEM_EVENT_L

=MEM_B_DQ<63>

=MEM_B_DQ<55>

=MEM_B_DQ<53>

=MEM_B_DQ<52>

=MEM_B_DQ<47>

=MEM_B_DQS_P<5>

=MEM_B_DQ<46>

=MEM_B_DQ<40>

MEM_B_DQ<32>

MEM_B_A<13>

MEM_B_BA<2>

MEM_B_CKE<0>

=MEM_B_DQS_N<5>

=MEM_B_DQ<44> =MEM_B_DQ<45>

=MEM_B_DQ<39>

=MEM_B_DQ<38>

=MEM_B_DQ<37>

=MEM_B_DQ<36>

PP0V75_S3_MEM_VREFCA_B

MEM_B_CS_L<0>

MEM_B_BA<1>

MEM_B_CLK_N<1>

MEM_B_A<0>

MEM_B_A<2>

MEM_B_A<7>

MEM_B_A<11>

MEM_B_A<14>

MEM_B_A<15>

MEM_B_CKE<1>

=MEM_B_DQS_N<4>

=MEM_B_DQ<41>

MEM_B_A<12> MEM_B_A<9>

MEM_B_A<8> MEM_B_A<5>

MEM_B_A<1>

=MEM_B_DQ<13>

=MEM_B_DQ<59>

MEM_B_ODT<0>

MEM_B_RAS_L

MEM_B_CLK_P<1>

MEM_B_ODT<1>

MEM_B_CS_L<1>

MEM_B_CAS_L

MEM_B_BA<0>

MEM_B_A<10>

MEM_B_CLK_N<0>

MEM_B_CLK_P<0>

MEM_B_A<3>

MEM_B_DQS_P<6>

MEM_B_DQS_N<6>

=MEM_B_DQ<49>

=MEM_B_DQ<48>

=MEM_B_DQ<42>

=MEM_B_DQ<33>

=MEM_B_DQ<54>

31 OF 132 28 OF 101

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26 29 66

6

6 7

26 29 66 71

6 7

12 16 17 18 19

20 22 23 25 26 32 35 36 39

40 41 45 47 48 49

50 51 53 56 60 61 71 72 79

82 83 84 87 88 89

98

9

30

6

30

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IN IN

IN

OUT

D

SG

D

S G

D

SG

D

S G

D

SG

D

S G

D

S G

D

SG

OUT

IN

D

SG

D

SG

IN

G

D

S

OUT

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

The circuit below handles CPU and VTT power during S0->S3->S0 transitions, as well

ISOLATE_CPU_MEM_L GPIO state during S3<->S0 transitions determines behavior of signals.

WHEN LOW: CPU 1.5V follows S0 rails, VTT ensures clean CKE transition, MEM_RESET_L isolated.

MEMVTT_EN = (ISOLATE_CPU_MEM_L + PLT_RST_L) * PM_SLP_S3_L

WHEN HIGH: CPU 1.5V remains powered in S3, VTT follows S0 rails, MEM_RESET_L not isolated.

1V5 S0 "PGOOD" for CPU

as isolating the CPU’s SM_DRAMRST# output from the SO-DIMMs when necessary.

PM_MEM_PWRGD pull-up to CPU VTT rail is on CPU page

75mA max load @ 0.75V

MEM_RESET_L = !ISOLATE_CPU_MEM_L + CPU_MEM_RESET_L

7 1 1 1 1 1 CPU_MEM_RESET_L 1 1

6 0 1 1 1 1 1 1 1

5 0 1 1 1 0 (*) 1 1 1

4 0 0 1 1 X 1 0 1

3 0 0 0 1 X 1 0 0

2 0 0 1 1 1 1 0 1

0 1 1 1 1 1 CPU_MEM_RESET_L 1 1

Step ISOLATE_CPU_MEM_L PLT_RESET_L PM_SLP_S3_L PM_SLP_S4_L CPU_MEM_RESET_L MEM_RESET_L MEMVTT_EN P1V5CPU_EN

1 0 1 1 1 1 1 1 1

(*) CPU_MEM_RESET_L asserts due to loss of PM_MEM_PWRGD, must wait for software to clear before deasserting ISOLATE_CPU_MEM_L GPIO.

NOTE: In the event of a S3->S5 transition ISOLATE_CPU_MEM_L will still be asserted on next S5->S0

must deassert ISOLATE_CPU_MEM_L and then generate a valid reset cycle on CPU_MEM_RESET_L.

P1V5CPU_EN = (ISOLATE_CPU_MEM_L + PM_SLP_S3_L) * PM_SLP_S4_L

S0

to

S3

to

S0

60mW max power

Ensures CKE signals are held low in S3

MEMVTT Clamp

transition. Rails will power-up as if from S3, but MEM_RESET_L will not properly assert. Software

19 23

6

17 44 72

18 25 39

1/16W

5%

MF-LF

CPUMEM_S0

100K

402

R3202

1

2

8

29 66

10K

1/16W

5%

CPUMEM_S0

R3210

1

MF-LF 402

2

CPUMEM_S0

100K

MF-LF

402

5%

1/16W

R3215

1

2

26 28

20K

402

5% 1/16W

1

2

R3216

CPUMEM_S0

MF-LF

SOT563

SSM6N15FEAPE

CPUMEM_S0

Q3200

3

5

4

CRITICAL

SOT563

SSM6N15FEAPE

Q3205

3

5

4

CRITICAL

CPUMEM_S0

SOT563

CPUMEM_S0

SSM6N15FEAPE

Q3210

6

1

CRITICAL

2

Q3210

3

5

4

SOT563

SSM6N15FEAPE

CPUMEM_S0

CRITICAL

SOT563

SSM6N15FEAPE

CPUMEM_S0

6

2

1

CRITICAL

Q3200

6

2

1

CRITICAL

CPUMEM_S0

Q3215

SOT563

SSM6N15FEAPE

SOT563

3

5

4

CRITICAL

CPUMEM_S0

Q3215

SSM6N15FEAPE

Q3205

6

2

1

CRITICAL

CPUMEM_S0

SOT563

71

10K

1/16W

5%

402

MF-LF

CPUMEM_S0

R3205

1

2

17 42 44 65 72

100K

5%

MF-LF

CPUMEM_S0

1/16W

R3201

1

2

402

8

29 66

SSM6N15FEAPE

SOT563

Q3250

5

4

CRITICAL

3

CPUMEM_S0

402

CPUMEM_S0

2

1

R3251

100K

5% 1/16W MF-LF

402

NO STUFF

50V

0.001UF

20%

CERM

C3251

1

2

SOT563

CPUMEM_S0

6

2

1

CRITICAL

SSM6N15FEAPE

Q3250

MF-LF

10

5%

603

1/10W

CPUMEM_S0

R3250

1

2

MF-LF

1/16W

5%

402

0

R3217

1 2

CPUMEM_S3

10 29

MF-LF

1%

33.2K

402

1/16W

R3221

1

2

402

27.4K

1%

1/16W

R3220

1

2

MF-LF

SOT-563

5

3

4

CRITICAL

Q3220

DMB53D0UV

5%

10K

402

R3222

1

2

MF-LF

1/16W

SOT-563

DMB53D0UV

Q3220

6

2

1

CRITICAL

10 17 90

CERM

NO STUFF

402

50V

20%

0.001UF

C3220

1

2

402

1

2

10%

0.1UF

X5R

16V

C3216

CPUMEM_S0

SYNC_MASTER=K18_MLB

SYNC_DATE=04/27/2010

CPU Memory S3 Support

MEMRESET_ISOL_LS5V_L

CPU_MEM_RESET_L

MAKE_BASE=TRUE

VTTCLAMP_EN

MEMVTT_EN

ISOLATE_CPU_MEM_L

PP5V_S3

PLT_RESET_L

PP3V3_S3

P1V5CPU_EN_L

CPU_MEM_RESET_L

MEMVTT_EN

PM_SLP_S3_L

P1V5CPU_EN

PP0V75_S0_DDRVTT

VTTCLAMP_L

PP5V_S3

MEMVTT_EN_L

PM_SLP_S4_L

PP1V5_S3RS0_CPUDDR

PP3V3_S5

PM_MEM_PWRGD_L

PM_MEM_PWRGD

P1V5_S0_DIV

PP1V5_S3

MEM_RESET_L

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6 7

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100

7

10 13 15 71 72

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OUT

V-

V+

V-

V+

V-

V+

V-

V+

V-

V+

V-

V+

IN

RESET*

A0 A1 A2

SCL SDA

P0 P1 P2

P5 P6 P7

P3 P4

THRM

VCC

GND

PAD

NC

IN

BI

VDD

VOUTD

VOUTC

VOUTB

VOUTA

SCL

SDA

A0

A1

GND

IN

BI

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

II NOT TO REPRODUCE OR COPY IT III NOT TO REVEAL OR PUBLISH IT IN WHOLE OR PART

I TO MAINTAIN THIS DOCUMENT IN CONFIDENCE

THE POSESSOR AGREES TO THE FOLLOWING:

THE INFORMATION CONTAINED HEREIN IS THE

36

BRANCH

REVISION

DRAWING NUMBER

SIZE

D

R

SHEET

PAGE TITLE

C

A

D

2 1

PROPRIETARY PROPERTY OF APPLE COMPUTER, INC.

Apple Inc.

PAGE

NOTICE OF PROPRIETARY PROPERTY:

A

B

C

345678

D

B

8 7 5 4 2 1

both at the same time!

Addr=0x98(WR)/0x99(RD)

8.59mV / step @ output

MEM B VREF CA

1.5V (DAC: 0x3A)

0.000V - 3.000V (0x00 - 0x74)

GPU Frame Buffer (1.8V, 70% VRef)

Page Notes

C

MEM A VREF CA

+61uA - -61uA (- = sourced)

MEM VREG

MEM B VREF DQ

0.75V (DAC: 0x3A)

0.000V - 1.501V (0x00 - 0x74) +3.4mA - -3.4mA (- = sourced)

0.300V - 1.200V (+/- 450mV)

Addr=0x30(WR)/0x31(RD)

RST* on ’platform reset’ so that system

NOTE: Margining will be disabled across all soft-resets and sleep/wake cycles.

1.51mV / step @ output

0.000V - 3.300V (0x00 - 0xFF)

6

D

NOTE: Must not enable more than two SO-DIMM margining buffers at once or VRef source may be overloaded.

5

D

DAC Channel: PCA9557D Pin:

DAC range:

Nominal value

DAC step size:

VRef current:

Margined target:

MEM A VREF DQ

B 21

A

7.69mV / step @ output

C 3 4

- =PP3V3_S3_VREFMRGN

- =I2C_VREFDACS_SCL

- =I2C_VREFDACS_SDA

- =I2C_PCA9557D_SDA

Circuitry.

- =PPVTT_S3_DDR_BUF

Power aliases required by this page:

VREFMRGN - Stuffs VREF Margining

VREFMRGN_NOT - Bypasses VREF Margining

Signal aliases required by this page:

10mA max load

BOM options provided by this page:

- =I2C_PCA9557D_SCL

+6.0mA - -5.0mA (- = sourced)

1.056V - 1.442V (+/- 180mV)

(OD)

1.267V (DAC: 0x8B)

a DAC output, cannot enable

NOTE: MEMVREG and FRAMEBUF share

1.000V - 2.000V (+/- 500mV)

Required zero ohm resistors when no VREF margining circuit stuffed

watchdog will disable margining.

66

VREFMRGN

0.1UF

CERM

402

20% 10V

C3302

1

2

402

1%

1/16W

PLACE_NEAR=R7320.2:1mm

VREFMRGN

MF-LF

33.2K

R3314

1 2

402

MF-LF

100K

VREFMRGN

1/16W

5%

R3313

1

2

100K

5% 1/16W MF-LF 402

VREFMRGN

R3315

1

2

VREFMRGN MAX4253

UCSP

U3302

C3

C2

C1

C4

B1

B4

CRITICAL

MAX4253

UCSP

VREFMRGN

U3303

A3

A2

A1

A4

B1

B4

CRITICAL

MAX4253

UCSP

VREFMRGN

U3302

A3

A2

A1

A4

B1

B4

CRITICAL

UCSP

MAX4253

U3303

C3

C2

C1

C4

B1

B4

VREFMRGN

CRITICAL

UCSP

MAX4253

A3

A2

A1

A4

B1

B4

U3304

VREFMRGN

CRITICAL

UCSP

VREFMRGN MAX4253

U3304

C3

C2

C1

C4

B1

B4

CRITICAL

PLACE_NEAR=J2900.126:2.54mm

1/16W

1%

402

MF-LF

VREFMRGN

200

R3309

1 2

PLACE_NEAR=J3100.126:2.54mm

200

MF-LF

402

1%

1/16W

VREFMRGN

R3311

1 2

SHORT

NONE

402

NONE NONE

OMIT

R3318

1 2

NONE

402

NONE

SHORT

OMIT

NONE

R3319

1 2

25

200

MF-LF

402

1%

1/16W

VREFMRGN

PLACE_NEAR=J2900.1:2.54mm

R3303

1 2

133

PLACE_NEAR=R3303.2:1mm

1%

402

MF-LF

VREFMRGN

1/16W

R3304

1 2

VREFMRGN

200

MF-LF

402

1%

1/16W

PLACE_NEAR=J3100.1:2.54mm

R3305

1 2

133

PLACE_NEAR=R3305.2:1mm

VREFMRGN

1/16W

1%

MF-LF

402

R3306

1 2

402

MF-LF

1/16W

5%

0

VREFMRGN

R3317

1

2

MF-LF

402

1/16W

5%

0

VREFMRGN

R3316

1

2

MF-LF

VREFMRGN

5%

100K

1/16W 402

R3302

1

2

MF-LF

5%

100K

402

VREFMRGN

1/16W

R3301

1

2

133

PLACE_NEAR=R3309.2:1mm

VREFMRGN

MF-LF

402

1%

1/16W

R3310

1 2

1/16W

VREFMRGN

402

5% MF-LF

100K

R3307

1

2

PCA9557

QFN

VREFMRGN

U3301

3 4 5

8

6 7 9 10 11 12 13 14

15

1 2

17

16

CRITICAL

20%

CERM

10V

0.1UF

402

VREFMRGN

C3304

1

2

PLACE_NEAR=R3311.2:1mm

MF-LF

133

1%

VREFMRGN

1/16W

402

R3312

1 2

1/16W

5%

402

MF-LF

100K

VREFMRGN

R3308

1

2

16 23 26 28 30 41 47 61 88 93

DAC5574

CRITICAL

MSOP

VREFMRGN

U3300

9

10

3

6

7

8

1

2

4

5

16 23 26 28 30 41 47 61 88 93

10V

20% 402

CERM

0.1UF

VREFMRGN

C3301

1

2

20%

402-LF

CERM

2.2UF

VREFMRGN

1

2

6.3V

C3300

402

CERM

10V

20%

0.1UF

VREFMRGN

C3305

1

2

VREFMRGN

402

CERM

20% 10V

0.1UF

C3303

1

2

R3309,R3311

RES,MTL FILM,0,5%,0402,SM,LF

116S0004

2

VREFMRGN_NOT

R3303,R3305

116S0004

RES,MTL FILM,0,5%,0402,SM,LF

2

VREFMRGN_NOT

SYNC_DATE=04/27/2010

SYNC_MASTER=K18_MLB

FSB/DDR3/FRAMEBUF Vref Margining

VREFMRGN_FRAMEBUF_BUF

PPVTTDDR_S3

PCA9557D_RESET_L

VREFMRGN_DQ_SODIMMB_BUF

DDRREG_FB

VREFMRGN_SODIMMB_DQ

SMBUS_PCH_CLK

MIN_NECK_WIDTH=0.2 mm

MIN_LINE_WIDTH=0.3 mm VOLTAGE=0.75V

PP0V75_S3_MEM_VREFDQ_A

MIN_NECK_WIDTH=0.2 mm VOLTAGE=0.75V

MIN_LINE_WIDTH=0.3 mm

PP0V75_S3_MEM_VREFDQ_B

PP0V75_S3_MEM_VREFCA_A

MIN_LINE_WIDTH=0.3 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=0.75V

PP0V75_S3_MEM_VREFCA_B

MIN_LINE_WIDTH=0.3 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=0.75V

VREFMRGN_DQ_SODIMMA_BUF

SMBUS_PCH_DATA

VREFMRGN_DQ_SODIMMA_EN

MIN_NECK_WIDTH=0.2 mm VOLTAGE=3.3V

PP3V3_S3_VREFMRGN_CTRL

MIN_LINE_WIDTH=0.3 mm

VREFMRGN_MEMVREG_FBVREF_R

VREFMRGN_FRAMEBUF_EN

VREFMRGN_MEMVREG_BUF

VREFMRGN_CA_SODIMMB_EN

VREFMRGN_CA_SODIMMA_EN

PP3V3_S3

VREFMRGN_CA_SODIMMA_BUF

VREFMRGN_DQ_SODIMMB_EN

VREFMRGN_MEMVREG_FBVREF

VREFMRGN_SODIMMS_CA

VREFMRGN_SODIMMA_DQ

VREFMRGN_CA_SODIMMB_BUF

VREFMRGN_FRAMEBUF_BUF_R

VREFMRGN_MEMVREG_EN

SMBUS_PCH_DATA

MIN_NECK_WIDTH=0.2 mm

MIN_LINE_WIDTH=0.3 mm VOLTAGE=3.3V

PP3V3_S3_VREFMRGN_DAC

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