Apple A1181, K36C Schematics

TABLE_TABLEOFCONTENTS_ITEM

APPLE INC.

6

DESIGNER

DESCRIPTION OF CHANGE

REV.

A

D

C

B

A

D

C

B

8 7

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

TITLE

DRAWING NUMBER

SHT

OF

METRIC

DRAFTER

ENG APPD

QA APPD

RELEASE

DESIGN CK

MFG APPD

SCALE

NONE

MATERIAL/FINISH

NOTED AS

APPLICABLE

SIZE

D

THIRD ANGLE PROJECTION

DIMENSIONS ARE IN MILLIMETERS

XX

X.XX

X.XXX

DO NOT SCALE DRAWING

REV

ZONE

ECN

CK APPD

DATE

ENG APPD

DATE

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

ANGLES

TABLE_TABLEOFCONTENTS_ITEM

DESCRIPTION

REFERENCE DES

BOM OPTION

QTY

PART NUMBER

CRITICAL

TABLE_TABLEOFCONTENTS_ITEM

TABLE_TABLEOFCONTENTS_HEAD

TABLE_TABLEOFCONTENTS_ITEM

Schematic / PCB #’s

K36C MLB SCHEMATIC

APR/10/2009

051-8089

SCHEM,MLB,K36C

109

?

02 691395

04/09/09

1

02

ENGINEERING RELEASED

K36B_MLB

39

08/17/2008

46

External USB Connectors

SCHEM,MLB,K36C

051-8089 CRITICAL

1 SCH

820-2496

PCBF,MLB,K36B

CRITICAL

PCB1

24

08/17/2008

25

K36B_MLB

MCP Standard Decoupling

23

08/17/2008

24

K36B_MLB

MCP79 A01 Silicon Support

3

08/17/2008

3

K36B_MLB

Power Block Diagram

7

08/17/2008

7

K36B_MLB

FUNC TEST

8

K36B_MLB

Power Aliases

2

08/17/2008

2

K36B_MLB

System Block Diagram

4

08/17/2008

4

K36B_MLB

CONFIGURATION OPTIONS

37

(MASTER)

43

K36B_MLB

FireWire Ports

36

08/17/2008

42

K36B_MLB

FireWire Port Power

35

08/17/2008

41

K36B_MLB

FireWire LLC/PHY(FW643E)

34

04/04/2008

39

SUMA

ETHERNET CONNECTOR

33

04/04/2008

38

SUMA

Ethernet & AirPort Support

32

03/20/2008

37

SUMA

Ethernet PHY (RTL8211CL)

31

08/17/2008

34

K36B_MLB

Right Clutch Connector

30

08/17/2008

33

K36B_MLB

Memory Active Termination

29

08/17/2008

32

K36B_MLB

DDR2 SO-DIMM Connector B

28

08/17/2008

31

K36B_MLB

DDR2 SO-DIMM Connector A

27

08/17/2008

29

K36B_MLB

FSB/DDR2 VREF MARGINING

26

08/17/2008

28

K36B_MLB

SB Misc

25

08/17/2008

26

K36B_MLB

MCP Graphics Support

22

08/17/2008

22

K36B_MLB

MCP Power & Ground

21

08/17/2008

21

K36B_MLB

MCP HDA & MISC

20

08/17/2008

20

K36B_MLB

MCP SATA & USB

19

08/17/2008

19

K36B_MLB

MCP PCI & LPC

18

08/17/2008

18

K36B_MLB

MCP Ethernet & Graphics

17

08/17/2008

17

K36B_MLB

MCP PCIe Interfaces

16

08/17/2008

16

K36B_MLB

MCP Memory Misc

15

08/17/2008

15

K36B_MLB

MCP Memory Interface

14

08/17/2008

14

K36B_MLB

MCP CPU Interface

13

01/08/2008

13

M99_MLB

eXtended Debug Port(MiniXDP)

12

08/17/2008

12

K36B_MLB

CPU Decoupling

11

08/17/2008

11

K36B_MLB

CPU Power & Ground

10

08/18/2008

10

K36B_MLB

CPU FSB

9

K36B_MLB

SIGNAL ALIAS

6

08/17//2008

6

K36B_MLB

JTAG Scan Chain

5

K36B_MLB

Revision History

K36B_MLB

76

08/17/2008

109

K36B RULE DEFINITIONS

K36B_MLB

75

08/17/2008

106

SMC Constraints

K36B_MLB

74

08/17/2008

105

FireWire Constraints

K36B_MLB

73

08/17/2008

104

Ethernet Constraints

K36B_MLB

72

08/17/2008

103

MCP Constraints 2

K36B_MLB

71

08/17/2008

102

MCP Constraints 1

K36B_MLB

70

08/17/2008

101

Memory Constraints

K36B_MLB

69

08/17/2008

100

CPU/FSB Constraints

K36B_MLB

68

08/17/2008

94

MINI-DVI CONNECTOR

K36B_MLB

67

08/17/2008

93

TMDS ALIASES

K36B_MLB

66

08/17/2008

90

INVERTER,LVDS

K36B_MLB

65

08/17/2008

79

POWER FETS

K36B_MLB

64

08/17/2008

78

POWER SEQUENCING

K36B_MLB

63

08/17/2008

77

MISC POWER SUPPLIES

K36B_MLB

62

08/17/2008

76

CPU VTT(1.05V) SUPPLY

K36B_MLB

61

08/17/2008

75

MCP VCORE REGULATOR

K36B_MLB

60

08/17/2008

74

IMVP6 CPU VCore Regulator

K36B_MLB

59

08/17/2008

73

1.8V/0.9V DDR2 SUPPLY

K36B_MLB

58

08/17/2008

72

5V/3.3V SUPPLY

K36B_MLB

57

08/17/2008

70

PBUS Supply/Battery Charger

RAYMOND

56

08/17/2008

69

DC-In & Battery Connectors

K36A_MLB

55

08/29/2008

68

AUDIO: JACK TRANSLATORS

K36A_MLB

54

08/29/2008

67

AUDIO: JACK

K36A_MLB

53

08/29/2008

66

AUDI0: SPEAKER AMP

K36A_MLB

52

08/29/2008

62

AUDIO: CODEC

K36B_MLB

51

081/17/2008

61

SPI ROM

K36B_MLB

50

08/17/2008

59

SMS

K36B_MLB

49

08/17/2008

58

GEYSER

K36B_MLB

48

08/17/2008

56

Fan

K36B_MLB

47

08/17/2008

55

Thermal Sensors

K36B_MLB

46

08/17/2008

54

Current Sensing

K36B_MLB

45

08/17/2008

53

VOLTAGE SENSING

K36B_MLB

44

08/17/2008

52

SMBUS CONNECTIONS

K36B_MLB

43

08/17/2008

51

LPC+SPI Debug Connector

K36B_MLB

42

08/17/2008

50

SMC Support

K36B_MLB

41

08/17/2008

49

SMC

K36B_MLB

40

07/17/2008

48

Front Flex Support

Date

(.csa)

Page

Contents

Page

Date

(.csa)

Contents

K36B_MLB

38

08/17/2008

45

SATA Connectors

1

08/22/2007

1

K36BH_MLB

Table of Contents

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

FW643E

LVDS OUT

HDMI OUT

SYNTH

CLK

CONN

PG 71

J9401

MINI DVI

U4100

PCI-E

FIREWIRE

DIMM’s

Boot ROM

SPI

J3100,3200

J5520

J5601

U4900

J4600,4601J9001J4501J5800J4810

U6610,6620,6630U6801

Speaker

PG 57

Amps

J3900

U3700

J9001

J4500

J4501

2.X OR 3.X GHZ

J1300

XDP CONN

INTEL CPU

PG 25,26

EXTERNAL

USB

Connectors

PG 39

SMB

CONN

88E1116

AirPort

SMB

1 2

PG 40

KEYBOARD

TRACKPAD/

CAMERA

IR

MINI PCI-E

J4300

FW PORT

Conn

J3400

3GHZ.

PG 38

ODD

Conn

800/1067/1333 MHz

PG 14

DIMM

PG 37

E-NET

PG 33

Conn

PG 28

PG 16

UP TO 20 LANES3

30

PG 20

NVIDIA

Bluetooth

(UP TO 12 DEVICES)

FSB INTERFACE

MEMORY

PG 52

CONN

DP OUT

LVDS

PG 71

DVI OUT

TMDS OUT

PG 17

PG 18

(UP TO FOUR PORTS)

PCI

PCI-E

4

CTRL

SATA

Conns

PG 41

MCP79

PG 19

LPC

8 9

PG 40

SATA

PG 59

Audio

FSB

64-Bit

POWER SUPPLY

PG 31

GB

J6950

PG 12

U1000

PG 40

HD

E-NET

Conn

U6100

PG 40

USB

PG 45

POWER SENSE

PG 48,49

DC/BATT

PENRYN

SPI

PG 18

MAIN

TEMP SENSOR

FAN CONN AND CONTROL

J5100

PG 43

Ser

FanADC

SMC

B,0

Prt

BSB

PWR

Misc

Port80,serial

LPC Conn

GPIOs

SATA

RGB OUT

PG 38

PG 13

PG 24

PG 20

HDA

PG 41

PG 44

5 6 7

U1400

PG 17

RGMII

PG 60

PG 9

PG 20

PG 35

Amp

PG 56

Line Out

Codec

Audio

PG 53

Amp

U6200

J6800,6801,6802,6803

HEADPHONE

PG 55

U6801

2 UDIMMs

DDR2-800MHZ

SYNC_MASTER=K36B_MLB SYNC_DATE=08/17/2008

02

2

109

System Block Diagram

051-8089

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

PP1V5_S0_FET

P1V5_S0_PGOOD

16-3

P1V5S0_EN

EN

PVIN

1.5V (S0)

TPS62510

U7740

VOUT

19-1

05

(4A MAX CURRENT)

PP3V3_S5_REG

(4A MAX

VOUT1

ENTRIP2

SMC_PM_G2_EN

2418

17 06

13

01

02

07

02

09

08

28

PPVCORE_S0_CPU_REG

PP1V05_S5_REG

5V

(RT)

EN1

VOUT2

Q7910

Q3810

P3V3S0_EN

PG

U7750

(44A MAX CURRENT)

PP1V05_S0_FET

03

PBUS SUPPLY/

PM_RSMRST_L

PM_PWRBTN_L SMC_RESET_L

SLP_S4_L(P94)

CPUVTTS0_PGOOD

TPS51116

U7300

=DDRVTT_EN

=DDRREG_EN

04-1

SMC

VREG3

CPUVTTS0_PGOOD

PP4V6_AUDIO_ANALOG

ENTRIP1

P1V05_S5_EN

U7400

VR_ON

IMVP_VR_ON

LT3470

VOUT

PP3V42_G3H_REG

U1400

P5VLTS3_EN

S3

0.9V

VOUT1

PP3V3_S0

16-3

RC

AP_PWR_EN

PP1V05_S0

LTC2909

VIN

SMC_ADAPTER_EN

S0PGOOD_PWROK

U7870

Q7930

PP3V3_S0_FET

11-2

PPVCORE_S0_MCP

12

PP0V9_S0_REG

02

MCPCORES0_EN

MCP_CORE

11-2

PPVCORE_S0_MCP_REG_R

16-4

16-2

16-3

16-1

16-2

RC

DELAY

15

16

11-1

11

PM_SLP_S4_L

11-3

PCI_RESET0#

MCP79

RC

(S0)

BATT_POS_F

DDRREG_EN

J6950

P3V3S3_EN

DELAY

SMC_CPU_VSENSE

PPCPUVTT_S0_REG

RC

CPU VCORE

11-1

VIN

VOUT

A

P3V3S3_EN

09-1

25

CPU_PWRGD

PWRGD(P12)

RSMRST_PWRGD

10

PWRBTN*

U6201

ALL_SYS_PWRGD

V

4.6V AUDIO

U5403

32

SMC

RSMRST_OUT(P15)

IMVP_VR_ON(P16)

IMVP_VR_ON

30

29

PPVBAT_G3H_CHGR_OUT

MCP79

RSMRST*

PWRGOOD

RESET*

MAX8902A

99ms DLY

U1000

CPU

VOUT

PPBUS_G3H

26

U7000

ISL6258A

SMC PWRGD

SMC_RESET_L

RN5VD30A-F

CPUVTT

MCP_PS_PWRGD

U1400

U2850

PPBUS_G3H

CHGR_BGATE

04

PS_PWRGD

DCIN(16.5V)

U5000

EN_PSV

02

(9 TO 12.6V)

BATTERY CHARGER

RC

SMC_BATT_ISENSE

PBUS_VSENSE

U6990

CPUVTTS0_EN

(S5)

ENABLES

VIN

A

02

PPVIN_G3H_P3V42G3H

(S0)

01

TPS51117

Q7050

SMC_DCIN_ISENSE

(1.05V)

6A FUSE

R7955

U7600

PGOOD

D6905

U4900

SLP_S3_L

RST*

SLP_S5_L SLP_S4_L

EN

EN2

PP5VLT_S3_REG

VOUT2

U7500

5V (LT)

VOUT

A

1.8V

EN2

VIN

EN1

P5VLTS3_EN

PBUSVSENS_EN

RC

DELAY

3S2P

DELAY

RC

DELAY

RC

DELAY

SLP_S5_L(P95)

RSMRST_IN(P13)

3.3V

TPS51125

DELAY

(1A MAX CURRENT)

16-2

20

02

VOUT2

S5

(S0)

P1V05S0_EN

U4900

P60

(S5)

P3V3S0_EN

P5VRTS0_EN_L

(S0)

SLP_S3#

DELAY

16-2

U7200

PM_SLP_S3_L

PP3V3_S5

PP3V3_S3_FET

P5V3V3_PGOOD

PM_SLP_S3_L

MCPCORES0_EN

CPUVTTS0_EN

MCPDDR_EN

P1V5S0_EN

RST*

1.8V S0

CHGR_EN

AC

ADAPTER

IN

PPVBAT_G3H_CHGR_REG

SHDN*

3.425V G3HOT

VIN

Q5315

V

D6905

VIN

22

LPC_RESET0*

(8A MAX CURRENT)

CPUPWRGD

LPC_RESET_L

29-1

09-1

CPU_RESET#

7A FUSE

31

Q3805

PM_WLAN_EN_L

Q3805

P16

Q7800

PGOOD

IN

PP5VLT_S3_REG

SMC_LRESET_L

SEL ADJ1 ADJ2

PP1V8_S0

(23A MAX CURRENT)

(4.5A MAX CURRENT)

SN0802043

PP5V_LT_S3_PGOOD MCPCORES0_PGOOD

PP5VLT_S3

MCPCORES0_PGOOD

P5V_LT_S3_PGOOD

P1V5_S0_PGOOD

P5V3V3_PGOOD

04-1

EN

VOUT1

PGOOD1

PGOOD2

SLP_S3_L(P93)

SMC_ONOFF_L

OVT

PWR_BUTTON(P90)

P17(BTN_OUT)

K36B POWER SYSTEM ARCHITECTURE

25

PVIN

TPS62510

1.05V (S5)

PP1V8_S3_REG

14

(12A MAX CURRENT)

(Q7901 & Q7971)

FETS

R5490

S3 TO S0

21

P3V3_ENET_FET

PP1V8_S0_REG

P3V3ENET_EN_L

FL7700

21

R5490

PP1V5_S0PP1V5_S0_FET

PP1V8_S0_FET

CURRENT)

PP5VRT_S0_REG

P1V05_S5_PGOOD

VOUT

VR_PWRGOOD_DELAY

SMC_CPU_ISENSE

PGOOD

ISL9504B

VIN

109

3

SYNC_DATE=08/17/2008

02

SYNC_MASTER=K36B_MLB

Power Block Diagram

051-8089

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

TABLE_ALT_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

TABLE_ALT_ITEM

TABLE_5_ITEM

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

TABLE_ALT_ITEM

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

ALTERNATES OPTION

BOM OPTION

BOARD STACK-UP AND CONSTRUCTION

(NONE)

BOTTOM

11

10

9

8

7

6

5

4

3

2

SIGNAL(High Speed)

POWER

SIGNAL(High Speed)

POWER

GROUND

SIGNAL

SIGNAL(High Speed)

SIGNAL

GROUND

(NONE)

BOM options provided by this page:

Top

Signal aliases required by this page:

Power aliases required by this page:

Page Notes

ALL

ALTERNATE PER CYNDI

152S0516152S0874

ALTERNATE PER CYNDI

ALL

152S0586152S0847

ALTERNATE PER CYNDI

ALL

152S0694 152S0138

ALL

ALTERNATE PER CYNDI

152S0685152S0796

CRITICAL

J6700

1

514-0667

CONN,RCPT,3.5MM AUDIO OUT,R/A

J3900

CONN,RCPT,RJ45,NO FILTER,8P1

CRITICAL

514-0668

CONN,RCPT,USB,4P,MIDPLANE

514-0669

1

J4601

CRITICAL

J6750

CRITICAL

CONN,RCPT,3.5MM AUDIO IN,R/A

1

514-0666

ALL

ALTERNATE PER CYNDI

157S0055157S0058

ALTERNATE PER CYNDI

152S0693152S0778

ALL

514-0665

J9401

CRITICAL

1

CONN,RCPT,MINI-DVI,32P,R/A

U3700

IC,RTL8251CA-VB-GR,GIGE TRANSCEIVER,48P

CRITICAL

1

338S0694

341S2420

CRITICAL1SMC_PROG

IC,SMC,HS8/2117,9X9MM,TLP,HF,BLANK

U4900

341S2418

1

CRITICAL

BOOTROM_PROG

IC,FLASH,SPI,32MBIT,3.3V,86MHZ,8-SOP

U6100

341S2093

CRITICAL

1

IC, CYPRESS, CY7C63833

U4800

338S0654

1

CRITICAL

IC,FW643E,1394B PHY/OHCI LINK/PCI-E,127

U4100

LBL,P/N LABEL,PCB,28MMX6MM

1

CRITICAL

826-4393

[EEE:3TN]

337S3769

PDC,SLGVT,2.26,25W,1066,R0,3M,BGA,P7750

U1000

CRITICAL

1

CRITICAL

U1400

IC,GMCP,MCP79,35X35MM,BGA1437,B031

338S0702

J4600

CONN,RCPT,USB,4P,MIDPLANE

1

514-0669

CRITICAL

128S0093

ALTERNATE PER CYNDI

ALL

128S0218

051-8089

CONFIGURATION OPTIONS

SYNC_DATE=08/17/2008

109

02

4

SYNC_MASTER=K36B_MLB

PAGE_BORDER=TRUE

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

- CHANGE R1440 TO 150_5% AND NO STUFF

- RTC FOLLOW M97 DESIGN AND USE SUPERCAP SOLUTION

- MCP S0 PWRGD FOLLOW M97 DESIGN

- R2872 CHANGE TO 0OHM

- J6700 CHANGE FROM 514-0521 TO 514-0667

- DELETE L4502, NET SATA_HDD_D2R_UF_P / SATA_HDD_D2R_UF_N

- J3900 CHANGE FROM 514-0523 TO 514-0668

- J9401 CHANGE FROM 514-0517 TO 514-0665

- J6950 CHANGE FROM 516S0620 TO 516S0735

*****2008/11/06*****

- U5413 CHANGE FROM 353S1432 TO 353S2220

- R7417 CHANGE FROM 5.36K(114S0289) TO 4.42K(114S0280)

*****2008/11/12*****

- U1000 CHANGE FROM 373S3646 TO 373S3702

- NETNAME ENET_INTR_L CHANGE TO TP_ENET_INTR_L.

- DELETE R1987,R1988,R1995,R1970,R1971,R1972,R1973,R1996,R1997,R1998,R1999,R1978,R1979

- NET LVDSMUX_SEL_IG_L SYNC M97 NETNAME

- REMOVE NET DIMM_OVERTEMPA_L

- REMOVE NET DIMM_OVERTEMPA_L PAGE 42:

- ADD SMC_EXCARD_PWR_EN TO TP_SMC_EXCARD_PWR_EN

- ADD SMC_RSTGATE_L TO TP_SMC_RSTGATE_L

- ADD ALS_GAIN TO NC_ALS_GAIN

- PULL R3240 DOWN TO GND. PULL R3241 HIGH

- C6832, C6833 CHANGE FROM 127S0062 TO 127S0108

- L4501 / Fl4520 / FL4525 CHANGE FROM 155S0303 TO 155S0371

- DELETE PHYSICAL/SPACING SETTING OF SATA_HDD_D2R_UF_P / SATA_HDD_D2R_UF_N

PAGE 4:

PAGE 68:

PAGE 62:

*****2008/10/31*****

PAGE 41:

*****2008/08/25***** CHANGE CSA BASE ON WILL’S SUGGESTION.

- NET DPMUX_SEL_IG_L SYNC M97 NETNAME

- NET DPMUX_LOWPWR_L SYNC M97 NETNAME AUD_IPHS_SWITCH_EN

- ENET_PWRDWN_L CHANGE TO TP_ENET_PWRDWN_L

(FOLLOW M97 DESIGN).

*****2008/10/30*****

- J6950 516S0735 CHANGE TO 516S0620

PAGE 69:

- C7321 FROM 128S0111(POLY) CHANGE TO 128S0218 (POLY,CASE-D2E-SM)

- XDP FOLLOW M97 DESIGN. CONNECTOR FROM 998-1571 CHANGE TO 516S0625.

- C7040/C7041/C7047 CHANGE TO 138S0614

- L9002 CHANGE TO 116S0004(0ohm,5%,0402)

- C9003 CHANGE TO 116S0004(0ohm,5%,0402)

NOTE: All page numbers are .csa, not PDF. See page 1 for .csa -> PDF mapping.

- STUFF C5250/C5251/C5270/C5271/C5260/C5261/C5280/C5281

- J6700 514-0604 CHANGE TO HF APN 514-0521

- I2C_ALS_SDA CHANGE TO I2C_MINI_PCIE_SDA

- I2C_ALS_SCL CHANGE TO I2C_MINI_PCIE_SCL

- ADD C5250/C5251/C5270/C5271/C5260/C5261/C5280/C5281 131S1104 (22pF,5%,0402) NO STUFF

- J3400 516S0635 CHANGE TO HF APN 516S0729

- R2825/R2826 CHANGE TO 116s0004 (0 OHM,5%,0402)

- R1950/R1951/R1952/1953 CHANGE TO 116s0004 (0 OHM,5%,0402)

- TEXT "ALS" CHANGE TO "MINI-PCIE"

- J6750 514-0603 CHANGE TO HF APN 514-0519

- J6950 516S0620 CHANGE TO HF APN 516S0735

*****2008/10/25*****

PAGE 52:

- TP_RTL8211_CLK125 CHANGE TO RTL8211_CLK125

- ADD R3731 (116s0026 22 ohm 5% 0402) FOR EMI 125MHZ NOISE

- C6830/C6831 CHANGE TO APN 128S0220, and REMOVE BOMOPTION OMIT

- C6605 CHANGE TO APN 128s0148, HF APN 128s0221, and REMOVE BOMOPTION OMIT

- C6601/C6603 CHANGE TO APN 128S0135, and REMOVE BOMOPTION OMIT

PAGE 67:

PAGE 69:

- C7281, C7241, C7272 FROM 138S0555(603) CHANGE TO 138S0615(603-1)

- C7291, C7292, C7252, C7251 FROM 128S0115(POLY,CASE-B2) CHANGE TO

- Q7400, Q7402 FROM 376S0472 CHANGE TO 376S0617.

- C7280, C7240 FROM 128S0092(POLY) CHANGE TO 128S0128(POLY-TANT)

PAGE 9:

- ADD ESTARLDO_EN TO NC_ESTARLDO_EN

PAGE 29:

PAGE 28:

Revision History

PLAGE 23:

- CHANGE XDP_TDO_CONN TO XDP_TDO

PAGE 29:

PAGE 14:

- R7859 CHANGE TO 100 OHM.

PAGE 64:

PAGE 61:

PAGE 39:

PAGE 32,33,34

PAGE 44:

PAGE 68:

*****2008/08/23*****

PAGE 6:

- REMOVE ETHERNET CIRCUIT.

PAGE 9:

- REMOVE R3400, R3401

- L3401 FROM NO STUFF CHANGE TO STUFF. PAGE 39

PAGE 41:

PAGE 46:

- SMC_NB_CORE_ISENSE CHANGE TO SMC_MCP_CORE_ISENSE

- R5417 ADD BOM OPTION FOR NO STUFF

PAGE 50:

- ADD C5926 (10UF,20%.0603) TO =PP3V3_S3_SMS PAGE 63:

PAGE 66:

- REMOVE R9010, R9011 *****2008/08/24***** PAGE 6:

PAGE 13:

- =P3V3ENET_EN_L LINK TO PM_SLP_RMGT_L

- ADD =RTL8211_ENSWRE LINK TO GND.

- DELETE R4699.

PAGE 8:

- REMOVE USB_PWR_EN_S3

PAGE 31:

PAGE 13:

- =P1V05ENET_EN LINK TO PM_SLP_RMGT_L

- DELETE R2400~R2413 FOR MCP A01 VERSION.

- SMC_NB_CORE_ISENSE CHANGE TO SMC_MCP_CORE_ISENSE

- SMC_NB_DDR_ISENSE CHANGE TO SMC_MCP_DDR_ISENSE

- R4690 FROM NO STUFF CHANGE TO STUFF.

- R5416 ADD BOM OPTION FOR NO STUFF

- SMC_NB_DDR_ISENSE CHANGE TO SMC_MCP_DDR_ISENSE

PAGE 10:

- ADD =RTL8211_REGOUT LINK TO NC_RTL8211_REGOUT.

- C7601 FROM 138S0578 CHANGE TO 138S0614.

- Q7620 FROM 376S0512 CHANGE TO 376S0652.

PAGE 62:

- C7560 FROM 128S0092 CHANGE TO 128S0218.

- Q7500 FROM 376S0512 CHANGE TO 376S0652.

- L7500 FROM 152S0869 CHANGE TO 152S0685.

PAGE 61:

- XW7400 ADD BOMOPTION OMIT.

PAGE 60:

- C7343 FROM 128S0073 CHANGE TO 128S0233.

PAGE 59:

PAGE 18:

PAGE 25:

PAG3 35:

PAGE 58:

- Q7260, Q7261 FROM 376S0512 CHANGE TO 376S0652 (H-F)

128S0222(POLY,CASE-B2-SM)

PAGE 57:

PAGE 65:

*****2008/08/22*****

- R1410 CHANGE TO 49.9 OHM

- ADD =PP3V42_G3H_RTC_D LINK TO =PP3V42_G3H_REG

PAGE 8:

PAGE 7:

- R7011 CHANGE TO 9.31K OHM, 1%

*****2008/08/21*****

- R7879 CHANGE TO 100K OHM.

- ADD SMC_EXCARD_PWR_EN TEST_POINT

PAGE 43:

- ADD SMC_ANALOG_ID TO NC_SMC_ANALOG_ID

- ADD SMC_SYS_KBDLED TO NC_SMC_SYS_KBDLED

- ADD R5054 10KOHM LINK SMC_GPU_ISENSE PULL DOWN TO GND.

- R5142 CHANGE TO NO STUFF. PAGE 46:

- ADD =PP1V05_ENET_PHY LINK TO PP1V2R1V05_ENET.

- ADD =PP3V3_S5_P3V3ENETFET LINK TO PP3V3_S5

MODIFY ALL NOSTUFF TO NO STUFF.

- ADD R5055 10KOHM LINK SMC_NB_MISC_ISENSE PULL DOWN TO GND.

PAGE 19:

PAGE 18:

- DELETE 1.05V S0 FET CIRCUIT.

- U7500 PIN TONSEL LINK TO GND DIRECTLY.

- U7500 PIN V5DRV1 LINK TO PP5V_S0_MCPREG_VCC.

- ADD =PP3V3_ENET_PHY_VDDREG LINK TO TP_PP3V3_ENET_PHY_VDDREG.

- FOLLOW M97 DESIGN

PAGE 26:

PAGE :

PAGE 57:

- R5417 CHANGE TO 4.53K AND DELETE BOM OPTION.

- R5416 CHANGE TO 4.53K AND DELETE BOM OPTION.

*****2008/09/02*****

PAGE 66:

- REMOVE R7884 AND C7884

- XDP FOLLOW M98 DESIGN. CONNECTOR FROM 516S0625 CHANGE TO 998-1571.

PAGE 66:

PAGE 29:

- ADD STANDOFF 860-0749 X 1

- ADD STANDOFF 860-0723 X 1

- ADD STANDOFF 860-0964 X 4

PAGE 45:

- R1860 AND R1861 CHANGE TO PAGE 68.

- C2504-C2507 FROM 138S0578(402) CHANGE TO 138S0614(402-1)

- C2516-C2517 FROM 138S0578(402) CHANGE TO 138S0614(402-1)

- R4150 FROM 118S0343 (0201) CHANGE TO 116S0056(0402)

- R0602 BOMOPTION FROM JTAG_1DEV CHANGE TO NO STUFF.

- Q7320 FROM 376S0512 CHANGE TO 376S0652 (H-F)

- REMOVE ALT TABLE

- REMOVE ALT TABLE PAGE 94:

PAGE 74:

PAGE 50:

PAGE 29:

*****2008/10/20*****

*****2008/10/22*****

PAGE 37:

PAGE 90:

PAGE 48:

- C4803 CHANGE TO 138S0614

- C6605 CHANGE TO HF APN 128S0221

PAGE 66:

PAGE 70:

PAGE 52:

PAGE 28:

PAGE 12:

PAGE 72:

PAGE 68:

PAGE 9:

*****2008/09/27*****

- CHANGE ODD CONNECTOR FROM 516S0720 TO 516S0719

- REMOVE J9001 PIN 20 AND PIN21 NET.

- R5418 CHANGE TO 4.53K AND DELETE BOM OPTION.

- REMOVE BOMOPTION TABLE OF R2903/R2905/R2909/R2911

- REMOVE K36 BOM OPTION TABLE AND ALT TABLE

- C2870 CHANGE TO 138S0614

- C1200 ~ C1219 CHANGE TO 138S0580

- R7272 CHANGE FROM 57.6K 1%(114s0389) TO 75K 1%(114s0399)

- ADD R2903/R2905 BOMOTION AND CHANGE VALUE TO 200 OHM

*****2008/10/24*****

PAGE 19:

PAGE 34:

- Q7321 FROM 376S0511 CHANGE TO 376S0651 (H-F)

PAGE 34:

- J3400 516S0729 CHANGE TO 516S0635

*****2008/10/28*****

*****2008/11/01*****

- U4100 CHANGE FROM 338S0523 TO 338S0654

PAGE 45:

*****2008/11/05*****

- ADD GMUX_JTAG_TMS AND GMUX_JTAG_TDI IN MISC NC MCP79 ALIASES.

- BOM change U1400 CHANGE FROM 338S0678 TO 338S0702

- C6210 CHANGE FROM 127S0062 TO 127S0108

PAGE 102:

- NETNAME FROM CHGR LOWCURRENT GATE CHANGE TO CHGR_LOWCURRENT_GATE

- NETNAME FROM CHGR LOWCURRENT REF CHANGE TO CHGR_LOWCURRENT_REF

- CHANG C9442 AND C9443 TO 47PF

- CHANGE R9460,R9461 TO 0OHM,

- ADD C9480 0.1UF_16V_0402 FROM GND_CHASSIS_TMDS_DOWN TO GND

- CHANGE R9462, R9463 TO 2.7KOHM

- CHANGE C9411, C9412 TO 220PF

- R5280/R5281 = 1K (FOLLOW M97D)

- R5270/R5271 = 1K (FOLLOW M97D)

- D4600/D4601/PIN-6 CONNECT TO USB VBUS (FOLLOW M97D)

- J6750 CHANGE FROM 514-0519 TO 514-0666

*****2008/11/19*****

- J4600, J4601 CHANGE FROM 514-0527 TO 514-0669

- U3700 CHANGE FROM 338S0570 TO 338S0694

*****2008/11/26*****

- PAGE 61 NOTE : CORRECT REFERENCE TO R5164 AND R5144

- J3400 CHANGE TO 516S0729

- R5156, R5157, R5158 change from 0 to 33 ohm, 5%, 0402(116s0030)

*****2008/12/20*****

- U4900 symbol update

*****2008/12/17*****

- R5144 and R5164 changed to 10K 5% 0402 (116S0090)

*****2008/12/12*****

051-8089

02

SYNC_MASTER=K36B_MLB

109

5

02

IN

B1

OE*

VCCB

B2 B3 B4

GND

A4

A3

A2

A1

VCCA

OUT

IN

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

1.05V TO 3.3V LEVEL TRANSLATOR (K36B: ON ICT FIXTURE)

XDP connector

and/or level translator

U1000

U1400

From XDP connector

or via level translator

MCP

From XDP connector

To XDP connector

CPU

69 13 10

7 6

JTAG_ALLDEV

UQFN

NLSV4T244

U0600

2 3 4 5

10 9 8 7

6

12

1

11

10V 402

JTAG_ALLDEV

CERM

20%

0.1UF

C0601

1

2

10V CERM 402

0.1UF

JTAG_ALLDEV

20%

C0602

1

2

JTAG_ALLDEV

10K

5%

402

MF-LF

1/16W

R0601

1

2

402

MF-LF

1/16W

0

5%

NO STUFF

R0602

1

2

13

7

69 13 10

7 6

69 13 10

7

69 13 10

7 6

MF-LF

XDP

402

0

5%

1/16W

R0603

1 2

1/16W

5%

402

0

MF-LF

XDP

R0604

1 2

13

7

6

02

109

SYNC_DATE=08/17//2008

SYNC_MASTER=K36B_MLB

JTAG Scan Chain

051-8089

=PP3V3_S0_XDP

XDP_TRST_L

XDP_TMS

XDP_TCK XDP_TDI

XDP_TRST_L

JTAG_MCP_TDO_CONN

XDP_TCK

JTAG_MCP_TDO

XDP_TDO_CONN

XDP_TMS

MAKE_BASE=TRUE

JTAG_MCP_TCK

MAKE_BASE=TRUE

JTAG_MCP_TDI

MAKE_BASE=TRUE

JTAG_MCP_TMS

MAKE_BASE=TRUE

JTAG_MCP_TRST_L

XDP_TDO

=PP1V05_S0_CPU

JTAG_LVL_TRANS_EN_L

8

13

6 7

10 13 69

6 7

10 13 69

6 7

10 13 69

21

7

13 21

7

13 21

7

13 21

7

13 21

10 69

8

10 11 12 13

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

#J3400 Airport

Need 6 TP

# Other Func Test Points

#J4810 BLUETOOTH

Functional Test Points

Need 2 TP

Need 6 TP

Need 4 TP

Need 3 TP

Need 4 TP

Need 6 TP

Need 4 TP

Need 2 TP

#J4500 SATA ODD

#J6703 Right SUB SPEAKER CONNECTOR

#J6702 Left SPEAKER CONNECTOR

# J6701 MIC CONNECTOR

#J9001 LCD + CAMERA CONNECTOR

#J9000 INVERTER Connector

#J6900 MagSafe DC Power Jack

Need 2 TP

#J1300 XDP

Need 8 TP

# J5800 GEYSER AND DIMM0 REMOTE TEMP SENSORS

#J5520 CPU/MCP Thermal Sensor

# J5100 LPC+SPI Connector

# J4501 SATA HD System LED and IR

#J5601 Fan Connectors

#J6950 Battery/Lid Connector

I12 I15

I157

I158

I159

I16

I160

I161

I162

I163 I164

I165 I166

I167

I168

I169

I170

I171

I172

I173

I174

I175

I176

I177

I178

I179

I180

I181

I182

I183 I184

I185

I186

I187

I188

I189

I190

I191

I192

I193

I194

I195

I196 I197

I198

I199

I200

I201

I202

I203

I204 I205

I206

I207

I208

I209 I210

I211

I212

I213

I214

I215

I216

I217

I218

I219 I220

I221

I222

I223

I224

I225

I226

I227

I228

I229

I230

I231

I232

I233

I234

I235 I236

I237

I238

I239

I240 I241

I242

I243

I244

I245

I246

I247

I248 I249

I250

I251

I252

I253

I254

I255

I256

I257

I258

I259

I260

I261

I262

I263

I264

I265

I266

I267

I268

I269 I270

I271

I272

I273

I274

I275

I276

I277

I278

I279

I280

I281

I282

I283

I284

I285

I286

I287

I288

I289

I290

I291

I292

I293

I294

I295

I296

I297

I298 I299

I300

I301

I302

I303

I304

I305

I306

I307 I308 I309

I310 I311

I312

I313

I314

I315

I316

I317

I318

I319

I320

I321

I322 I323

I324

I325

I326

I327

I328

I329 I330

I331

I332

I333

I334

I335

I336

I337 I338

I339

I340

I341

I342

I343

I344

I345

109

02

7

051-8089

FUNC TEST

I2C_MINI_PCIE_SDA

TRUE

PCIE_WAKE_L

TRUE

MINI_CLKREQ_L

TRUE

PCIE_CLK100M_MINI_N

TRUE

PCIE_CLK100M_MINI_P

PP3V3_S3_AIRPORT_CONN

TRUE

I2C_MINI_PCIE_SCL

TRUE

GND

TRUE

ALL_SYS_PWRGD

TRUE

PPVCORE_S0_CPU

TRUE

PPCPUVTT_S0

PCIE_MINI_R2D_P

TRUE

PP3V3_WLAN

TRUE

PP1V5_S0_R

TRUE

MINI_RESET

TRUE

PCIE_MINI_D2R_P

TRUE

PCIE_MINI_R2D_N

TRUE

GND

TRUE

PP5V_S3_IR_CONN

TRUE

IR_RX_OUT

TRUE

SYS_LED_ANODE_L

TRUE

PP5V_S0_HDD_FLT

TRUE

SATA_HDD_D2R_C_P

TRUE

SATA_HDD_D2R_C_N

TRUE

GND_SMC_LID_F

TRUE

SMC_LID_F

TRUE

GND

TRUE

LPCPLUS_GPIO

TRUE

SMC_RX_L

TRUE

SMC_NMI

TRUE

JTAG_MCP_TDI

TRUE

MCP_DEBUG<1>

TRUE

PP3V3_S0

TRUE

SMBUS_MCP_0_CLK

TRUE

PM_LATRIGGER_L

TRUE

TP_XDP_OBSDATA_B3

TRUE

TP_XDP_OBSDATA_B1

TRUE

XDP_BPM_L<2>

TRUE

TP_XDP_OBSDATA_B2

TRUE

TP_XDP_OBSDATA_B0

TRUE

TP_XDP_OBSFN_B0

TRUE

XDP_BPM_L<0>

TRUE

PP5VRT_S0

TRUE

LPC_AD<1>

TRUE

SPI_ALT_MOSI

TRUE

LPC_FRAME_L

TRUE

PM_CLKRUN_L

TRUE

SMC_TMS

TRUE

DEBUG_RESET_L

TRUE

SMC_TDO

TRUE

SMC_TRST_L

TRUE

SMC_MD1

TRUE

SMC_TX_L

TRUE

SPI_ALT_MISO

TRUE

LPC_AD<0>

TRUE

LPC_CLK33M_LPCPLUS

TRUE

SPI_ALT_CS_L

TRUE

LPC_SERIRQ

TRUE

PP5V_S3_TPAD_F

TRUE

CPUTHMSNS_D2_P

TRUE

CPUTHMSNS_D2_N

TRUE

MCPTHMSNS_D2_P

TRUE

SMC_LID_LC

TRUE

CONN_TPAD_USB_N

TRUE

CONN_TPAD_USB_P

TRUE

CONN_TPAD_ONOFF_FLTR_L

TRUE

TPAD_GND_F

TRUE

SPKRCONN_R_N_OUT

TRUE

SPKRCONN_R_P_OUT

TRUE

PP3V42_G3H

TRUE

PP3V3_S5

TRUE

PPVTT_S3_DDR_BUF

TRUE

PP5VLT_S3

TRUE

PP3V3_S3

TRUE

PP1V8_S3

TRUE

PP1V0_FW

TRUE

PP5VRT_S0

TRUE

PP1V05_S0

TRUE

PP1V05_S0_MCP_SATA_AVDD

TRUE

PP1V05_S0

TRUE

PP1V05_S0_MCP_PEX_AVDD

TRUE

PP1V8_S0_R

TRUE

PP1V8_S0

TRUE

PP1V05_S0

TRUE

PPVCORE_S0_MCP_R

USB2_AIRPORT_P

TRUE

USB2_AIRPORT_N

TRUE

PCIE_MINI_D2R_N

TRUE

PP0V9_S0

TRUE

PPVCORE_S0_MCP

TRUE

PP1V5_S0_R

TRUE

PP3V3_S0

TRUE

PP1V05_S5_REG

TRUE

GND_BT_F_CONN

TRUE

USB2_BT_F_P_CONN

TRUE

MCPTHMSNS_D2_N

TRUE

SPKRCONN_SUB_P_OUT

TRUE

SPKRCONN_SUB_N_OUT

TRUE

SPKRCONN_L_P_OUT

TRUE

SPKRCONN_L_N_OUT

TRUE

MIC_LO_CONN

TRUE

MIC_HI_CONN

TRUE

MIC_SHLD_CONN

TRUE

PP5V_S3_CAMERA_F

TRUE

GND

TRUE

USB2_CAMERA_CONN_N

TRUE

LVDS_IG_A_CLK_F_N

TRUE

LVDS_IG_A_CLK_F_P

TRUE

LVDS_IG_A_DATA_P<2>

TRUE

USB2_CAMERA_CONN_P

TRUE

LVDS_IG_A_DATA_N<2>

TRUE

LVDS_IG_DDC_CLK

TRUE

LVDS_IG_A_DATA_N<0>

TRUE

LVDS_IG_DDC_DATA

TRUE

LVDS_IG_A_DATA_P<0>

TRUE

LVDS_IG_A_DATA_P<1>

TRUE

PP18V5_DCIN_FUSE

TRUE

PP3V3_LCDVDD_SW_F

TRUE

INV_GND

TRUE

PPBUS_ALL_INV_CONN

TRUE

GND

TRUE

GND

TRUE

PP3V42_G3H_LIDSWITCH_F

TRUE

PPVBAT_G3H_CONN_F

TRUE

SMBUS_BATT_SCL_F

TRUE

LVDS_IG_A_DATA_N<1>

TRUE

PP3V3_S0_LCD_F

TRUE

INV_BKLIGHT_PWM_L

TRUE

PP5V_INV_F

TRUE

ADAPTER_SENSE

TRUE

PPVP_FW

TRUE

PP1V2R1V05_ENET

TRUE

PP3V3_ENET_PHY

TRUE

PPBUS_G3H_CPU_ISNS

TRUE

PPBUS_G3H

TRUE

PP18V5_G3H

TRUE

LPC_AD<2>

TRUE

SPIROM_USE_MLB

TRUE

LPC_AD<3>

TRUE

SPI_ALT_CLK

TRUE

LPC_PWRDWN_L

TRUE

SMC_TDI

TRUE

SMC_TCK

TRUE

SMC_RESET_L

TRUE

XDP_BPM_L<4>

TRUE

XDP_BPM_L<5>

TRUE

XDP_BPM_L<3>

TRUE

JTAG_MCP_TCK

TRUE

XDP_TCK

TRUE

PPCPUVTT_S0

TRUE

JTAG_MCP_TDO_CONN

TRUE

MCP_DEBUG<2>

TRUE

MCP_DEBUG<3>

TRUE

MCP_DEBUG<4>

TRUE

MCP_DEBUG<6>

TRUE

MCP_DEBUG<5>

TRUE

MCP_DEBUG<7>

TRUE

FSB_CLK_ITP_P

TRUE

FSB_CLK_ITP_N

TRUE

XDP_CPURST_L

TRUE

XDP_TDO_CONN

TRUE

XDP_TDI

TRUE

XDP_TRST_L

TRUE

XDP_BPM_L<1>

TRUE

JTAG_MCP_TRST_L

SATA_HDD_R2D_P

TRUE

SATA_HDD_R2D_N

TRUE

SMBUS_BATT_SDA_F

TRUE

PP3V42_G3H

TRUE

XDP_PWRGD

TRUE

SMBUS_MCP_0_DATA

TRUE

MCP_DEBUG<0>

TRUE

JTAG_MCP_TMS

TRUE

XDP_TMS

TRUE

GND

TRUE

XDP_DBRESET_L

TRUE

XDP_OBS20

TRUE

TP_XDP_OBSFN_B1

TRUE

SATA_ODD_D2R_C_N

TRUE

SATA_ODD_D2R_C_P

TRUE

PP3V3_S0

TRUE

SMC_ODD_DETECT

TRUE

GND

TRUE

SATA_ODD_R2D_UF_P

TRUE

SATA_ODD_R2D_UF_N

PP3V3_S3_BT_F_CONN

TRUE TRUE

USB2_BT_F_N_CONN

TRUE

GND

TRUE

FAN_RT_TACH

TRUE

FAN_RT_PWM

TRUE

PP5VRT_S0

SMC_BS_ALRT_L_F

TRUE

31 44

17 31

17 31 71

31

31 44

26 41 64

8

7 8

31 71

31

7 8

31

17 31 71

31 71

38

38 40

38

38 71

56

18 43

39 41 42 43

41 43

6

13 21

13 19 72

7 8

13 21 44 72

13 19

13

10 13 69

13

10 13 69

7 8

19 41 43 72

43

19 41 43 72

19 41 43

41 42 43

26 43

41 42 43

41 43

39 41 42 43

43

19 41 43 72

26 43 72

43

19 41 43

49

47

49

49 72

49

53 54

7 8

8

7 8

8

24

7 8

8

24

8

7 8

8

31 72

17 31 71

8

7 8

8

40

40 72

47

53 54

54

54 55

66

66 72

66

18 66 71

66 72

18 66 71

18 66

18 66 71

18 66

18 66 71

56

66

56

18 66 71

66

56

8

19 41 43 72

43

19 41 43 72

43

19 41 43

41 42 43

10 13 69

6

13 21

6

10 13 69

7 8

6

13

13 19 72

13 14 69

13 69

6

13

6

10 13 69

6

10 13 69

6

13 21

38 71

56

7 8

13

13 21 44 72

13 19 72

6

13 21

6

10 13 69

10 13 26

13

38 71

7 8

38 41

38 71

40

40 72

48

7 8

56

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

"S5" RAILS

"FW" RAILS

"S0,S0M" RAILS

"ENET" RAILS

206 mA (A01)

PEX & SATA AVDD/DVDD aliases

57 mA (A01)

"S3" RAILS

206 mA (A01)

127 mA (A01)

43 mA (A01)

127 mA (A01)

206 mA (A01)

127 mA (A01)

(CPU VCORE PWR)

(MCP VCORE REG. OUTPUT)

"G3H" RAILS

(DDR PWR REG. OUTPUT)

(DDR PWR AFTER SENSE RES.)

(MCP VCORE AFTER SENSE RES)

051-8089

Power Aliases

109

8

02

SYNC_MASTER=K36B_MLB

PP3V3_S3

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2 mm

MIN_LINE_WIDTH=0.6 mm VOLTAGE=3.3V

PP1V8_S3

MIN_NECK_WIDTH=0.25 mm VOLTAGE=1.8V

MIN_LINE_WIDTH=1.5 mm

MAKE_BASE=TRUE

=PP1V8_S3_REG

=PP3V3_S3_BT

=PPVCORE_S0_CPU_VSENSE

PPVCORE_S0_CPU

MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.3 MM

MAKE_BASE=TRUE

VOLTAGE=0.9V

=PP1V05_S0_MCP_FSB

=PP1V05_S0_CPU

=PP1V8_S3_MEM

=PP3V3_S3_FET

=PP5V_S0_LCD

PP5VRT_S0

MIN_NECK_WIDTH=0.20 MM

MIN_LINE_WIDTH=0.30 MM

MAKE_BASE=TRUE

VOLTAGE=5V

=PP1V05_S0_SMC_LS

PPVCORE_S0_MCP_R

MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V MAKE_BASE=TRUE

=PP1V05_S0_FET

PPVTT_S3_DDR_BUF

MIN_LINE_WIDTH=0.3 MM MIN_NECK_WIDTH=0.2 MM

MAKE_BASE=TRUE

VOLTAGE=0.9V

=PPBUS_S5_FW_FET

=PPVTT_S3_DDR_BUF

PP5VLT_S3

MIN_NECK_WIDTH=0.2 MM

MIN_LINE_WIDTH=0.6 MM VOLTAGE=5V

MAKE_BASE=TRUE

=PP5V_S3_AUDIO

=PP5V_S3_1V8S3_0V9S0

=PP5V_S3_TPAD

=PP5V_S3_SYSLED

=PP5V_S3_VTTCLAMP

=PP5V_S3_IR

=PP5V_S3_EXTUSB

PP1V8_S0_R

VOLTAGE=1.8V

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.5MM

MAKE_BASE=TRUE

PP1V0_FW

MAKE_BASE=TRUE

VOLTAGE=1.0V

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.5MM

PP3V3_S0

MIN_LINE_WIDTH=0.30MM MIN_NECK_WIDTH=0.20MM VOLTAGE=3.3V MAKE_BASE=TRUE

PPBUS_G3H_CPU_ISNS

VOLTAGE=12.6V

MIN_LINE_WIDTH=0.6MM MIN_NECK_WIDTH=0.3MM

MAKE_BASE=TRUE

PPBUS_G3H

MIN_NECK_WIDTH=0.25MM MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.5MM VOLTAGE=12.6V

PP3V42_G3H

MAKE_BASE=TRUE

VOLTAGE=3.42V

MIN_NECK_WIDTH=0.2MM

MIN_LINE_WIDTH=0.6MM

PP1V05_S0_MCP_PEX_AVDD

MAKE_BASE=TRUE

PP1V05_S0_MCP_SATA_AVDD

MAKE_BASE=TRUE

PP1V5_S0_R

MIN_LINE_WIDTH=0.5 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=1.5V MAKE_BASE=TRUE

PP18V5_G3H

MAKE_BASE=TRUE

VOLTAGE=18.5V

MIN_NECK_WIDTH=0.3 MM

MIN_LINE_WIDTH=0.6 MM

PPCPUVTT_S0

MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM

MAKE_BASE=TRUE

VOLTAGE=1.05V

PP3V3_ENET_PHY

MIN_LINE_WIDTH=0.6 mm MIN_NECK_WIDTH=0.2 mm VOLTAGE=3.3V MAKE_BASE=TRUE

PP1V2R1V05_ENET

MAKE_BASE=TRUE

VOLTAGE=1.05V

MIN_NECK_WIDTH=0.2 mm

MIN_LINE_WIDTH=0.4 MM

PP1V05_S0

MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 MM

PP0V9_S0

MIN_NECK_WIDTH=0.2 mm

MIN_LINE_WIDTH=0.4 mm VOLTAGE=0.9V

MAKE_BASE=TRUE

PPVCORE_S0_MCP

MIN_LINE_WIDTH=0.6 MM MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V MAKE_BASE=TRUE

PP1V05_S5_REG

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2 MM VOLTAGE=1.05V

MIN_LINE_WIDTH=0.6 MM

PP3V3_S5

VOLTAGE=3.3V MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.25 mm

MIN_LINE_WIDTH=1.5 mm

=PP3V3_FW_LATEVG

=PP3V3_S5_MCPPWRGD =PP3V3_S5_AIRPORT_AUX

=PP3V3_S5_P3V3ENETFET

=PP3V3_S5_P3V3S0FET =PP3V3_S5_P1V05S5

=PP1V05_ENET_P1V05ENETFET

=PP1V05_S5_MCP_VDD_AUXC

=PP5V_S3_AUDIO_AMP

=PP5V_S3_MCPDDRFET

=PP5V_S3_CAMERA

=PP3V3_S3_SMS

=PP3V3_S0_XDP

=PP3V3_S0_MCP_DAC_UF

=PP3V3_S0_MCP

=PP3V3_S0_FAN_RT

=PP3V3_S0_TMDS

=PP1V05_S5_REG

=PP3V3_S3_AIRPORT_AUX

=PP3V3_S3_PDCISENS

=PP3V3_S3_SMBUS_SMC_A_S3

=PP1V05_S0_MCP_PEX_DVDD

=PPVCORE_S0_MCP

=PP1V8_S0

=PP1V8_S0_FET

=PPMCPCORE_S0_REG

=PP1V8_S0_FET_R

=PP3V3R1V8_S0_MCP_IFP_VDD

=PP1V8_S0_VMON

=PP1V05_ENET_MCP_RMGT

=PP1V05_ENET_PHY

=PP1V05_ENET_FET

=PP1V05_ENET_MCP_PLL_MAC

=PPVP_FW_PHY_CPS_FET

=PPVP_FW_PORT1

=PP3V3_ENET_FET

=PP3V3_ENET_MCP_RMGT =PP3V3_ENET_PHY

=PP1V5_S0_FET

=PPBUS_G3H_CPU_ISNS

=PP3V42_G3H_BMON_ISNS

=PPVIN_S5_SMCVREF =PP3V42_G3H_SMBUS_SMC_BSA =PP3V42_G3H_PWRCTL =PP3V42_G3H_CHGR =PP3V42_G3H_SMCUSBMUX =PP3V42_G3H_LIDSWITCH

=PP3V3_S5_SMC

=PPBUS_S5_INV

=PP1V0_FW_FWPHY

=PPVIN_S3_5VLTS3

=PP0V9_S0_REG

=PP3V3_S5_REG

=PP1V8_S3_P1V8S0FET

=PPSPD_S0_MEM

=PP5VR3V3_S0_MCPCOREISNS

=PP3V3_S0_CPUTHMSNS

=PP3V3_S0_MCPTHMSNS

=PP3V3R1V5_S0_MCP_HDA

=PP3V3_S0_MCP_PLL_UF

=PP3V3_S0_HDCPROM

=PP18V5_DCIN_CONN

=PPCPUVTT_S0_REG

=PP1V0_FW_REG

=PP3V3_S0_SMC

=PP3V3_S3_SMBUS_SMC_MGMT

=PP3V3_S5_LPCPLUS

=PP3V42_G3H_RTC_D

=PP18V5_G3H_CHGR

=PP3V42_G3H_REG

=PP1V05_S0_MCP_SATA_DVDD0

=PP1V05_S0_MCP_PEX_AVDD1

=PPVCORE_S0_CPU_REG

=PPVCORE_S0_MCP_REG_R

=PP3V3_S0_MCP_GPIO

=PP3V3_S0_SMBUS_MCP_0

=PP3V3_S0_SMBUS_SMC_B_S0

=PP3V3_S5_PWRCTL =PP3V3_S5_P1V05ENETFET

=PP3V3_S5_P3V3S3FET

=PP1V05_S0_MCP_SATA_AVDD0

=PP3V3_S5_LCD =PP3V3_S5_MCP

=PP1V05_S0_MCP_SATA_DVDD

=PP1V05_S0_MCP_PEX_DVDD1

=PP1V05_S0_MCP_SATA_DVDD1

=PP1V05_S0_MCP_SATA_AVDD1

=PP1V05_S0_MCP_PEX_DVDD0

=PP1V05_S0_MCP_PEX_AVDD0

=PP1V05_S0_MCP_PEX_DVDD

=PPVIN_S5_CPU_IMVP

=PPVIN_S0_CPUVTTS0

=PP3V3_S5_ROM

=PP3V3_S5_MCP_GPIO

=PP3V3_S3_VREFMRGN =PP3V3_S3_WLAN

=PPVIN_S0_MCPCORES0 =PPVIN_S0_MCPREG_VIN

=PPVIN_S5_3V3S5

=PPVIN_S5_1V8S3_0V9S0

=PPBUS_S5_FWPWRSW

=PPBUS_G3HRS5

=PPVIN_S0_5VRTS0

=PPBUS_G3H

=PPBUS_G3H_CPU_ISNS_R

=PP3V3_S0_LCD

=PPVCORE_S0_CPU

=PP5V_S0_HDD

=PP5V_S0_ODD

=PP5VRT_S0_REG

=PP3V3_S0_FET

=PP5VLT_S3_REG

=PP3V3_S0_MCP_VPLL_UF =PP3V3_S0_ODD =PP3V3_S0_LPCPLUS =PP3V3_S0_SMBUS_SMC_0_S0

=PP3V3_S0_AUDIO

=PP3V3_S0_IMVP

=PP1V8R1V5_S0_MCP_MEM

=PP1V5_S0_CPU

=PP1V5_S0_AIRPORT

=PP1V05_S0_VMON

=PP1V05_S0_MCP_HDMI_VDD

=PP1V05_S0_MCP_SATA_DVDD

=PP1V05_S0_MCP_PLL_UF

=PP1V05_S0_MCP_AVDD_UF

=PP0V9_S3M_MEM_TERM

=PPVTT_S0_VTTCLAMP

=PPVCORE_S0_MCP_VSENSE

=PP5V_S0_CPUVTTS0

=PP5V_S0_TMDS

=PP5V_S0_CPU_IMVP

=PP5V_S0_FAN_RT

=PP5V_S0_LPCPLUS

=PP5V_S0_AUDIO =PP5V_S0_AUDIO_AMP

=PP3V3_S0_PWRCTL =PP3V3_S0_VMON =PP3V3_S0_MCPDDRISNS =PP3V3_S0_CPUVTTISNS =PP3V3_FW_P1V0FW =PP3V3_FW_PHY =PP3V3_FW_FWPHY

PP1V8_S0

MIN_NECK_WIDTH=0.2MM VOLTAGE=1.8V

MIN_LINE_WIDTH=0.5MM

MAKE_BASE=TRUE

PPVP_FW

MAKE_BASE=TRUE

VOLTAGE=12.6V

MIN_LINK_WIDTH=0.4 MM

MIN_NECK_WIDTH=0.2 MM

7

59

40

45

7

14 22 24

6

10 11 12 13

28 29

21 65

66

7

42

7

65

7

36

27 59

7

59

49

42

65

38 40

39

7

24

7

24

7

36 37

26

33

65

63

33

22 24

65

66

50

6

13

25

21 22 24

48

68

63

31

59

44

8

24

22 24 46 61

46

65

61

46

18 25

64

18 24

32

33

24

37

33

18 24

32

63

46

42

44

64

57

39

56

41 42 50

66

35

61

59

58

65

28 29

46

47

21 24

24

25

56

62 65

63

42

44

43

26

57

56

20

17

60

46

18 19 21

44

64

33

65

20

66

22 24

8

24

17

20

17

8

24

60

62

43 51

18 20

27

31

61

58

59

36

45

58

57

46

66

11 12

38

58

63 65

61

25

38

44

52 54 55

60

16 24

11 12

31

64

18 25

8

24

30

65

45

62

68

60

48

43

52 55

53

64

46

63

37

35 37

7

OUT

IN

TABLE_5_ITEM

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

MISC NC MCP79 ALIASES

UNUSED EXPRESS CARD LANE

BLUETOOTH

CPU HEATSINK STANDOFF SCREW HOLE

BUT, NEED CHANGE TO HIGH STANDOFF SYMBOL

FOR LAYOUT PLACEMENT

PCI-E ALIASES

ETHERNET ALIASES

UNUSED GPU LANES

SO-DIMM ALIASES

(EMI PAD FOR INVERTER GONNECTOR)

HDA PULL-DOWN

LAN ALIASES

TRACKPAD(WELLSPRING)

FSB MHZ

0 1 0

CPU FSB FREQUENCY STRAPS

1 0 0

0 1 1

1 1 1

1 1 0

1 0 1

0 0 1

(RSVD)

(400)

200

100

133

333

(166)

266

BSEL<2..0>

0 0 0

UNUSED ADDRESS PINS

UNUSED USB PORTS

Screw Holes

BATTERY,AUDIO,DIP DIMM CONNECTOR CHASSIS GND

DCIN CONNECTOR CHASSIS GND

DP HOTPLUG PULL-DOWN

ROM FAILURE OVERRIDE

Z0903 USE SAME Z0913 NON SHAPE OF A HOOF SYMBOL

MCP_SAFE_MODE SIGNAL TO SUPPORT

FW PULL-DOWN

USB ALIASES

UNUSED LVDS SIGNALS

LVDS ALIASES

DIP DIMM CONNECTOR CHASSIS GND

SATA,LVDS CONNECTOR CHASSIS GND

DIP DIMM CONNECTOR CHASSIS GND

I/O CONNECTOR CHASSIS GND

5%

47K

1/16W MF-LF 402

R0930

1

2

14 69 10

20K

1/16W

5% MF-LF

402

R0940

1

2

OMIT

STDOFF-4.5OD3.95H-1.1-3.2-TH

Z0905

1

OMIT

STDOFF-4.2OD3.95H-5.52R3.37-6B

Z0903

1

5R2P3-7SQBNP

OMIT

Z0901

1

OMIT

STDOFF-4.5OD3.95H-1.1-3.2-TH

Z0921

1

STDOFF-4.2OD3.95H-5.52R3.37-7SQB

OMIT

Z0904

1

OMIT

5R2P3-7B

Z0911

1

5R2P3-7SQB

OMIT

Z0909

1

5R2P3-7SQB

OMIT

Z0910

1

OMIT

5P0R2P3-7BLB

Z0908

1

7X7R2P3-5B

OMIT

Z0902

1

6P5R2P6-7SQB

OMIT

Z0907

1

CLIP-SM-M42

EMI-SPRING

ZS0920

1

5R2P3-7SQBNP

OMIT

Z0906

1

OMIT

STDOFF-4.2OD2.15H-1.2-3.2-TH

Z0912

1

OMIT

STDOFF-4.2OD3.95H-5.52R3.37-6B

Z0913

1

47K

1/16W 402

MF-LF

5%

R0931

1

2

5%

402

47K

1/16W MF-LF

R0932

1

2

1/16W

5%

0

MF-LF 402

R0955

1

2

0

5%

MF-LF

1/16W

402

R0920

1 2

41

20K

402

MF-LF

1/16W

5%

R0977

1

2

1%

124

1/16W MF-LF

402

R0941

1

2

0.01UF

16V CERM 402

10%

C0940

1

2

SM

XW0902

1 2

SM

XW0901

1 2

?

860-0749

STANDOFF W/THRU HOLES,WIRELESS

Z0913

1

STANDOFF

051-8089

109

02

9

SYNC_MASTER=K36B_MLB

SIGNAL ALIAS

?

Z0903,Z0904,Z0905,Z0921

STANDOFF860-0964

4

THERMAL STANDOFF

Z0912

STANDOFF WIRELESS

1

860-0723

?

STANDOFF

=GND_CHASSIS_DIPDIMM_RIGHT =GND_CHASSIS_RJ45

=GND_CHASSIS_LVDS =GND_CHASSIS_DIPDIMM_CENTER

=GND_CHASSIS_FW_DOWN

=GND_CHASSIS_TMDS_DOWN

=GND_CHASSIS_FW_UPPER

=GND_CHASSIS_TMDS_UPPER

=GND_BATT_CHGND =GND_CHASSIS_AUDIO_JACK

=GND_CHASSIS_AUDIO_MIC

=GND_CHASSIS_DIPDIMM_LEFT

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_LVDS_IG_A_DATA_N3

MCP_TV_DAC_RSET

MCP_SPKR

PCIE_FW_PRSNT_L

DP_HOTPLUG_DET

PEG_PRSNT_L PEG_CLKREQ_L

=PEG_R2D_C_N<15:0> =PEG_R2D_C_P<15:0>

CPU_PECI_MCP

=GND_AUDIO_AMP

=GND_AUDIO_CODEC

USB_EXCARD_N

USB_EXTD_N

INVT_CHGND

MCP_MII_COL

PCIE_EXCARD_D2R_P

SMC_MCP_SAFE_MODE

MCP_MII_RXER

AUD_IPHS_SWITCH_EN

=MCP_BSEL<0:2>

MCP_MII_CRS

LVDS_IG_A_DATA_P<3> LVDS_IG_A_DATA_N<3>

GMUX_JTAG_TMS MCP_MEM_RESET_L

MEM_A_A<15> MEM_B_A<15>

GMUX_JTAG_TDI

USB_EXTD_P

USB_EXCARD_P

MCP_TV_DAC_VREF

=USB2_BT_P

=USB2_TPAD_N

=USB2_TPAD_P

USB_EXTC_P

PEG_CLK100M_P

EXTGPU_RESET_L

EXTGPU_PWR_EN

PEG_CLK100M_N

=P3V3ENET_EN

=PP3V3_ENET_PHY_VDDREG

MAKE_BASE=TRUE

USB_TPAD_P

TP_USB_EXTDP

MAKE_BASE=TRUE

USB_TPAD_N

MAKE_BASE=TRUE

TP_PEG_CLK100MP

MAKE_BASE=TRUE

TP_USB_EXCARDP

TP_USB_EXTCP

MAKE_BASE=TRUE

TP_EXTGPU_PWR_EN

MAKE_BASE=TRUE

TP_EXTGPU_RESET_L

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_PEG_R2D_C_N<15:0>

CPU_BSEL<0:2>

MAKE_BASE=TRUE

TP_PEG_CLK100MN

NC_LVDS_IG_A_DATA_P3

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_LVDS_IG_B_DATA_P<3:0>

NO_TEST=TRUE

MAKE_BASE=TRUE

TP_GMUX_JTAG_TMS

MAKE_BASE=TRUE

TP_GMUX_JTAG_TDI

MAKE_BASE=TRUE

TP_MCP_MEM_RESET_L

MAKE_BASE=TRUE

TP_CPU_PECI_MCP

TP_MEM_A_A15

MAKE_BASE=TRUE MAKE_BASE=TRUE

TP_MEM_B_A15

MAKE_BASE=TRUE

USB_BT_P

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_LVDS_IG_B_CLKP

MAKE_BASE=TRUE

GND_AUDIO_CODEC

MAKE_BASE=TRUE

GND_AUDIO_AMP

MAKE_BASE=TRUE

TP_PEG_PRSNT_L

NC_LVDS_IG_B_CLKN

MAKE_BASE=TRUE

NO_TEST=TRUE

PP3V3_ENET_PHY_VDDREG

MAKE_BASE=TRUE

NC_PEG_R2D_C_P<15:0>

MAKE_BASE=TRUE

NO_TEST=TRUE

MAKE_BASE=TRUE

TP_PEG_CLKREQ_L

PM_SLP_RMGT_L

MAKE_BASE=TRUE

NC_PEG_D2R_N<15:0>

MAKE_BASE=TRUE

NO_TEST=TRUE

=PEG_D2R_N<15:0> =PEG_D2R_P<15:0>

MAKE_BASE=TRUE

NO_TEST=TRUE

NC_PEG_D2R_P<15:0>

LVDS_IG_B_CLK_P LVDS_IG_B_CLK_N LVDS_IG_B_DATA_P<3:0>

NO_TEST=TRUE

MAKE_BASE=TRUE

NC_LVDS_IG_B_DATA_N<3:0>

USB_EXTC_N

MAKE_BASE=TRUE

NC_RTL8211_REGOUT

=P1V05ENET_EN

=RTL8211_ENSWREG

=RTL8211_REGOUT

TP_USB_EXCARDN

MAKE_BASE=TRUE

TP_USB_EXTDN

MAKE_BASE=TRUE

TP_PCIE_EXCARD_D2RP

LVDS_IG_B_DATA_N<3:0>

=USB2_BT_N

MAKE_BASE=TRUE

USB_BT_N

TP_USB_EXTCN

MAKE_BASE=TRUE

USB_MINI_P

MAKE_BASE=TRUE

=USB_MINI_P

USB_MINI_N

MAKE_BASE=TRUE

=USB_MINI_N

TP_PCIE_EXCARD_D2RN

MAKE_BASE=TRUE

PCIE_EXCARD_D2R_N

MAKE_BASE=TRUE

TP_PCIE_EXCARD_R2D_CP

PCIE_EXCARD_R2D_C_P

TP_PCIE_CLK100M_EXCARDP

MAKE_BASE=TRUE

PCIE_CLK100M_EXCARD_P

TP_EXCARD_CLKREQ_L

MAKE_BASE=TRUE

EXCARD_CLKREQ_L

MAKE_BASE=TRUE

TP_PCIE_CLK100M_EXCARDN

PCIE_CLK100M_EXCARD_N

TP_PCIE_EXCARD_PRSNT_L

MAKE_BASE=TRUE

PCIE_EXCARD_PRSNT_L

TP_PCIE_EXCARD_R2D_CN

MAKE_BASE=TRUE

PCIE_EXCARD_R2D_C_N

29

34

66

28 29

37

68

37

68

56

54

55

28

18 71

21

17

18

17

14

53

52 53 54 55

20 72

66

18

17 71

18

19

18

18 71

19

16

28

29

19

20 72

18 71

40

49

20 72

17 71

17

17 71

33

32

20 72

21

17

18 71

20 72

33

32

18 71

40 20 72

20 72 31

17 71

17

17 71

17

17 71

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

IN IN IN

IN

OUT

IN

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

OUT OUT

OUT

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI BI BI BI BI

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI

BI BI BI

BI

BI BI

BI BI BI BI BI

BI

OUT

IN

IN IN IN IN IN

IN IN

OUT

IN IN

IN

IN IN

IN

OUT

BI BI BI BI

TEST7

TEST6

DSTBP1* DINV1*

D31*

D30*

D25*

D11* D12* D13* D14*

DSTBP0* DINV0*

D9*

D8*

D7*

D6*

D19*

D18*

D0*

D32* D1* D2*

D5*

D16*

D20* D21* D22* D23* D24*

D26* D27* D28* D29*

DSTBN1*

GTLREF

TEST3 TEST4 TEST5

BSEL0 BSEL1 BSEL2

D33*

D34*

D35*

D36*

D37*

D38*

D39*

D40*

D41*

D42*

D43*

D44*

D45*

D46*

D47*

DSTBN2* DSTBP2*

DINV2*

D48*

D49*

D50*

D51*

D52*

D53*

D54*

D55*

D56*

D57*

D58*

D59*

D60*

D61*

D62*

D63*

DSTBN3* DSTBP3*

DINV3*

COMP0 COMP1 COMP2 COMP3

DPRSTP*

DPSLP*

DPWR*

PWRGOOD

SLP*

PSI*

D17*

D4*

D3*

DSTBN0*

D15*

D10*

TEST2

TEST1

2 OF 4

DATA GRP 3 DATA GRP 2

MISC

DATA GRP 0DATA GRP 1

LOCK*

INIT*

A20M*

A6*

A3* A4*

A14*

A16*

REQ0* REQ1* REQ2* REQ3* REQ4*

BCLK1

BCLK0

THERMTRIP*

THERMDA

PROCHOT*

DBR*

TRST*

TMS

TDO

TDI

TCK

PREQ*

PRDY*

BPM3*

BPM2*

BPM1*

BPM0*

HITM*

HIT*

TRDY*

RS2*

RS1*

RS0*

RESET*

IERR*

BR0*

DBSY*

DRDY*

DEFER*

BNR*

RSVD4

RSVD3

RSVD2

RSVD1

RSVD0

SMI*

LINT1

LINT0

STPCLK*

FERR*

ADSTB1*

A35*

A34*

A33*

A32*

A31*

A30*

A29*

A28*

A19*

A18*

A17*

ADSTB0*

A13*

A12*

BPRI*

A20* A21* A22* A23* A24*

A26* A27*

A9*

A8*

A7*

A11*

A25*

THERMDC

IGNNE*

ADS*

A10*

A15*

A5*

RSVD5 RSVD6 RSVD7 RSVD8

1 OF 4

CONTROL

THERMAL

XDP/ITP SIGNALS

H CLK

ADDR GROUP1

ICH

RESERVED

ADDR GROUP0

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

CHANGE CPU FROM SOCKET TO BGA SYMBOL

SYNC FROM T18

PLACEMENT_NOTE (all 4 resistors):

CPU JTAG Support

402

MF-LF

54.9

1/16W

1%

R1000

1

2

402

MF-LF

1/16W

5%

68

R1002

1

2

PLACEMENT_NOTE=Place R1005 within 12.7mm of CPU.

1/16W

1%

MF-LF

1K

402

R1005

1

2

PLACEMENT_NOTE=Place R1006 within 12.7mm of CPU.

2.0K

402

1/16W MF-LF

1%

R1006

1

2

54.9

1% 1/16W MF-LF

402

Place within 12.7mm of CPU

R1023

1

2

402

MF-LF

1/16W

1%

27.4

Place within 12.7mm of CPU

R1022

1

2

54.9

1% 1/16W MF-LF

402

Place within 12.7mm of CPU

R1021

1

2

27.4

402

MF-LF

1/16W

1%

Place within 12.7mm of CPU

R1020

1

2

69 14

69 60 14

69 14

60

69 14 13

69 14

69

9

69

9

69

9

69 14

69 13

7

69 13

7

69 13

7

69 13

7

69 13

7

69 13

7

69 10

6

26 13

7

69 60 42 14

47

69 42 14

69 14

69 14 13

69 14

69 13 10

7 6

69 13 10

7 6

69 13 10

7 6

69 13 10

7 6

47

69 14

402

0

1/16W MF-LF

5%

NO STUFF

R1010

1 2

402

1K

MF-LF

5%

1/16W

NO STUFF

R1011

1

2

1% 1/16W MF-LF

402

54.9

R1001

1

2

54.9

1/16W MF-LF

402

1%

R1090

1 2

402

54.9

MF-LF

1%

1/16W

R1091

1 2

402

54.9

1/16W MF-LF

1%

R1093

1 2

69 14

402

649

1/16W MF-LF

1%

R1094

1 2

1/16W

5%

1K

MF-LF 402

NO STUFF

R1012

1

2

402

16V

10%

0.1uF

X5R

PLACEMENT_NOTE=Place C1014 within 12.7mm of CPU.

NO STUFF

C1014

1

2

OMIT

PENRYN

FCBGA

U1000

B22

B23 C21

R26 U26

AA1 Y1

E22

F24

J24 J23

H22

F26 K22

H23

N22

K25

P26 R23

E26

L23

M24 L22

M23 P25

P23

P22 T24

R24

L25

G22

T25

N25

Y22

AB24 V24

V26

V23 T22

U25 U23

F23

Y25

W22 Y23

W24

W25 AA23

AA24

AB25

AE24

AD24

G25

AA21 AB22

AB21

AC26 AD20

AE22 AF23

AC25

AE21 AD21

E25

AC22

AD23 AF22

AC23

E23

K24 G24

H25

N24

U22

AC20

E5 B5

D24

J26

L26

Y26

AE25

H26

M26

AA26

AF24

AD26

AE6

D6 D7

C23 D25

C24

AF26

AF1

A26

C3

402

1%

MF-LF

1/16W

54.9

PLACEMENT_NOTE=Place R1092 near ITP connector (if present)

R1092

1 2

OMIT

PENRYN

FCBGA

U1000

N3

P5 P2

L2

P4 P1

R1

Y2

U5

R3 W6

A6

U4

Y5 U1

R4 T5

T3

W2 W5

Y4

J4

U2 V4

W3

AA4 AB2

AA3

L5

L4

K5 M3

N2

J1

H1

M1

V1

A22 A21

E2

AD4 AD3

AD1

AC4

G5

F1

C20

E1

H5

F21

A5

G6 E4

D20

C4

B3

C6

B4

H4

AC2

AC1

D21

K3

H2 K2

J3

L1

C1 F3

F4 G3

M4

N5

T2 V3

B2

F6 D2

D22

D3

A3

D5

AC5

AA6

AB3

A24

B25

C7

AB5

G2

AB6

SYNC_MASTER=K36B_MLB SYNC_DATE=08/18/2008

10

109

02

CPU FSB

051-8089

FSB_D_L<14>

FSB_D_L<20>

XDP_TDO

FSB_A_L<24> FSB_A_L<25> FSB_A_L<26> FSB_A_L<27>

FSB_CLK_CPU_N

XDP_TMS

XDP_TDO

XDP_TDI

XDP_DBRESET_L

XDP_TRST_L

XDP_TMS

CPU_THERMD_N

CPU_STPCLK_L

FSB_DINV_L<3>

FSB_D_L<63>

FSB_DINV_L<0>

FSB_DSTB_L_N<0>

FSB_D_L<10>

FSB_D_L<9>

FSB_D_L<7>

FSB_D_L<2>

FSB_D_L<1>

FSB_D_L<0>

TP_CPU_RSVD_T2

XDP_BPM_L<1>

FSB_D_L<3> FSB_D_L<4> FSB_D_L<5> FSB_D_L<6>

FSB_D_L<8>

FSB_D_L<11> FSB_D_L<12>

FSB_DSTB_L_P<0>

FSB_D_L<16> FSB_D_L<17>

FSB_D_L<21> FSB_D_L<22> FSB_D_L<23> FSB_D_L<24>

FSB_D_L<26>

FSB_D_L<29> FSB_D_L<30> FSB_D_L<31>

CPU_DPSLP_L

CPU_DPRSTP_L

FSB_DSTB_L_N<3> FSB_DSTB_L_P<3>

FSB_D_L<62>

FSB_D_L<61>

FSB_D_L<60>

FSB_D_L<59>

FSB_D_L<58>

FSB_D_L<56>

FSB_D_L<54>

FSB_D_L<53>

FSB_D_L<52>

FSB_D_L<51>

FSB_D_L<50>

FSB_D_L<49>

FSB_D_L<48>

FSB_DINV_L<2>

FSB_DSTB_L_P<2>

FSB_DSTB_L_N<2>

FSB_D_L<47>

FSB_D_L<46>

FSB_D_L<45>

FSB_D_L<44>

FSB_D_L<43>

FSB_D_L<42>

FSB_D_L<41>

FSB_D_L<40>

FSB_D_L<39>

FSB_D_L<38>

FSB_D_L<37>

FSB_D_L<36>

FSB_D_L<35>

FSB_D_L<34>

FSB_D_L<33>

FSB_D_L<32>

XDP_TRST_L

XDP_TCK

CPU_INIT_L

XDP_TCK

XDP_BPM_L<4>

FSB_BPRI_L

FSB_RS_L<2>

FSB_RS_L<0>

FSB_ADS_L FSB_BNR_L

FSB_DEFER_L FSB_DRDY_L FSB_DBSY_L

FSB_A_L<7> FSB_A_L<8>

FSB_A_L<11>

FSB_A_L<13> FSB_A_L<14> FSB_A_L<15> FSB_A_L<16> FSB_ADSTB_L<0>

FSB_REQ_L<0> FSB_REQ_L<1> FSB_REQ_L<2> FSB_REQ_L<3> FSB_REQ_L<4>

FSB_A_L<17> FSB_A_L<18>

FSB_A_L<23>

FSB_A_L<22>

FSB_A_L<20>

FSB_A_L<19>

FSB_A_L<21>

CPU_SMI_L

TP_CPU_RSVD_N5

TP_CPU_RSVD_F6

TP_CPU_RSVD_B2

TP_CPU_RSVD_D3

TP_CPU_RSVD_D22

TP_CPU_RSVD_D2

TP_CPU_RSVD_V3

TP_CPU_RSVD_M4

CPU_NMI

CPU_INTR

CPU_IGNNE_L

FSB_A_L<29>

FSB_A_L<28>

FSB_A_L<30> FSB_A_L<31> FSB_A_L<32> FSB_A_L<33> FSB_A_L<34> FSB_A_L<35> FSB_ADSTB_L<1>

CPU_FERR_L

CPU_A20M_L

CPU_THERMD_P

FSB_D_L<13>

FSB_D_L<15>

FSB_D_L<55>

FSB_D_L<57>

CPU_COMP<0>

CPU_COMP<2>

FSB_DSTB_L_P<1>

FSB_DSTB_L_N<1>

XDP_BPM_L<0>

FSB_HITM_L

FSB_D_L<18> FSB_D_L<19>

FSB_DPWR_L

CPU_BSEL<1>

CPU_PWRGD

FSB_DINV_L<1>

CPU_BSEL<2>

TP_CPU_TEST3

CPU_GTLREF

TP_CPU_TEST5 TP_CPU_TEST6

TP_CPU_TEST7

CPU_TEST4

CPU_TEST2

CPU_BSEL<0>

XDP_TDI

XDP_BPM_L<3>

XDP_BPM_L<2>

FSB_A_L<12>

FSB_CLK_CPU_P

PM_THRMTRIP_L

CPU_TEST1

CPU_COMP<3>

CPU_PROCHOT_L

FSB_A_L<10>

FSB_A_L<9>

FSB_A_L<6>

FSB_A_L<5>

FSB_LOCK_L

FSB_CPURST_L

FSB_RS_L<1>

FSB_TRDY_L

XDP_BPM_L<5>

CPU_PSI_L

FSB_CPUSLP_L

FSB_HIT_L

CPU_IERR_L

FSB_BREQ0_L

FSB_A_L<4>

FSB_A_L<3>

FSB_D_L<25>

FSB_D_L<27> FSB_D_L<28>

CPU_COMP<1>

=PP1V05_S0_CPU

6

10 69

6 7

10 13 69

6 7

10 13 69

6 7

10 13 69

6 7

10 13 69

69

27 69

69

6 8

11 12 13

OUT OUT OUT OUT OUT OUT OUT

OUT

VCC

VCCP

VCCA

VID0 VID1 VID2 VID3 VID4 VID5 VID6

VCCSENSE

VSSSENSE

VCC

3 OF 4

VSS VSS

4 OF 4

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

23 A (LV Design Target)

Current numbers from Merom for Santa Rosa EMTS, doc #20905.

(BR1#)

CHANGE CPU FROM SOCKET TO BGA SYMBOL

SYNC FROM T18

41 A (SV HFM)

30.4 A (SV LFM)

44 A (SV Design Target)

(CPU CORE POWER)

130 mA

NEED 1.5V POWER SOURCE

(CPU INTERNAL PLL POWER 1.5V)

(CPU IO POWER 1.05V)

4500 mA (before VCC stable) 2500 mA (after VCC stable)

(Socket-P KEY)

69 60

PLACEMENT_NOTE=Place R1101 within 25.4mm of CPU, no stubs.

1/16W

1%

100

402

MF-LF

R1101

1

2

69 60

OMIT

PENRYN

FCBGA

U1000

A7

A9

B9 B10

B12

B14 B15

B17

B18 B20

C9 C10

A10

C12

C13 C15

C17

C18

D9

D10

D12 D14

D15

A12

D17

D18

E7

E9

E10

E12 E13

E15

E17 E18

A13

E20

F7

F9

F10 F12

F14

F15 F17

F18

F20

A15

AA7

AA9

AA10

AA12

AA13 AA15

AA17

AA18 AA20

AB9

A17

AC10 AB10

AB12 AB14

AB15

AB17 AB18

AB20

AB7

AC7

A18

AC9

AC12

AC13 AC15

AC17 AC18

AD7

AD9 AD10

AD12

A20

AD14 AD15

AD17

AD18 AE9

AE10 AE12

AE13

AE15 AE17

B7

AE18

AE20 AF9

AF10 AF12

AF14 AF15

AF17

AF18 AF20

B26 C26

G21 V6

R21

R6

T21 T6

V21

W21

J6

K6 M6

J21 K21

M21

N21 N6

AF7

AD6 AF5

AE5

AF4 AE3

AF3

AE2

AE7

OMIT

PENRYN

FCBGA

U1000

A4 A8

B11

W1

W4 W23

W26 Y3

Y6 Y21

Y24

AA2 AA5

B13

AA8

AA11 AA14

AA16

AA19 AA22

AA25 AB1

AB4

AB8

B16

AB11

AB13

AB16 AB19

AB23

AB26 AC3

AC6

AC8

AC11

B19

AC14

AC16 AC19

AC21

AC24 AD2 AD5 AD8

AD11 AD13

B21

AD16

AD19 AD22

AD25

AE1

AE4 AE8

AE11

AE14 AE16

B24

AE19

AE23 AE26

A2 AF6

AF8

AF11 AF13

AF16

AF19

C5

AF21

A25

AF25

B1

C8

C11

C14

A11

C16

C19

C2 C22

C25

D1

D4

D8 D11

D13

A14

D16 D19

D23

D26

E3

E6

E8

E11 E14

E16

A16

E19

E21 E24

F5

F8 F11

F13 F16

F19

F2

A19

F22

F25

G4

G1

G23

G26

H3

H6 H21

H24

A23

J2

J5

J22

J25

K1

K4

K23 K26

L3

L6

AF2

L21

L24

M2

M5

M22 M25

N1

N4 N23

N26

B6

P3

P6

P21 P24

R2

R5 R22

R25 T1

T4

B8

T23 T26

U3 U6

U21 U24

V2

V5

V22 V25

PLACEMENT_NOTE=Place R1100 within 25.4mm of CPU, no stubs.

100

1% 1/16W

402

MF-LF

R1100

1

2

02

11

109

SYNC_DATE=08/17/2008SYNC_MASTER=K36B_MLB

CPU Power & Ground

051-8089

=PP1V05_S0_CPU

=PPVCORE_S0_CPU

CPU_VCCSENSE_P

CPU_VID<6>

CPU_VID<5>

CPU_VID<3>

CPU_VID<2>

CPU_VID<1>

CPU_VID<0>

=PP1V5_S0_CPU

CPU_VID<4>

CPU_VCCSENSE_N

=PPVCORE_S0_CPU

6 8

10 12 13

8

11 12

8

12

8

11 12

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

CPU VCore HF and Bulk Decoupling

6x 330uF. 32x 22uF 0805 (20 stuffed)

PLACEMENT_NOTE (C1200-C1219):

PLACEMENT_NOTE (C1240-C1243):

1x 330uF, 6x 0.1uF 0402

SYNC FROM T18

VCCP (CPU I/O) DECOUPLING

VCCA (CPU AVdd) DECOUPLING

1x 10uF, 1x 0.01uF

CERM 805

6.3V

20%

22UF

Place inside socket cavity on secondary side.

CRITICAL

C1206

1

2

PLACEMENT_NOTE=PLACE C1260 BETWEEN CPU & MCP79.

330UF

2.0V

20%

CRITICAL

D2T-SM2

POLY-TANT

C1260

1

2 3

CERM

Place inside socket cavity on secondary side.

6.3V

20%

22UF

805

CRITICAL

C1204

1

2

CERM

Place inside socket cavity on secondary side.

6.3V

20%

22UF

805

CRITICAL

C1216

1

2

CERM

6.3V

20%

Place inside socket cavity on secondary side.

22UF

805

CRITICAL

C1214

1

2

CERM

CRITICAL

Place inside socket cavity on secondary side.

6.3V

20%

22UF

805

C1208

1

2

CERM

6.3V

20%

805

Place inside socket cavity on secondary side.

22UF

CRITICAL

C1203

1

2

CERM

Place inside socket cavity on secondary side.

805

22UF

20%

6.3V

CRITICAL

C1207

1

2

CERM

Place inside socket cavity on secondary side.

6.3V

20%

805

22UF

CRITICAL

C1202

1

2

CERM

CRITICAL

22UF

Place inside socket cavity on secondary side.

805

20%

6.3V

C1201

1

2

CERM

20%

805

Place inside socket cavity on secondary side.

22UF

6.3V

CRITICAL

C1213

1

2

CERM 805

Place inside socket cavity on secondary side.

6.3V

20%

22UF

CRITICAL

C1212

1

2

CERM

Place inside socket cavity on secondary side.

805

22UF

20%

6.3V

CRITICAL

C1211

1

2

CERM

Place inside socket cavity on secondary side.

805

22UF

20%

6.3V

CRITICAL

C1219

1

2

CERM

CRITICAL

22UF

Place inside socket cavity on secondary side.

6.3V

20%

805

C1200

1

2

22UF

CERM

Place inside socket cavity on secondary side.

6.3V

20%

805

CRITICAL

C1210

1

2

20%

402

CERM

10V

0.1UF

C1261

1

2

CERM

CRITICAL

805

Place inside socket cavity on secondary side.

22UF

20%

6.3V

C1205

1

2

CERM

Place inside socket cavity on secondary side.

805

22UF

20%

6.3V

CRITICAL

C1209

1

2

CERM

Place inside socket cavity on secondary side.

805

22UF

20%

6.3V

CRITICAL

C1215

1

2

CERM

Place inside socket cavity on secondary side.

805

22UF

20%

6.3V

CRITICAL

C1217

1

2

20%

402

CERM

10V

0.1UF

C1262

1

2

20%

402

CERM

0.1UF

10V

C1263

1

2

20%

402

CERM

10V

0.1UF

C1264

1

2

20%

402

CERM

10V

0.1UF

C1265

1

2

20% CERM

10V

0.1UF

402

C1266

1

2

CERM

6.3V

20%

22UF

805

Place inside socket cavity on secondary side.

CRITICAL

C1218

1

2

PLACEMENT_NOTE=PLACE C1250 C1251 NEAR CPU PIN B26.

402

CERM

10% 16V

0.01UF

C1251

1

2

20%

6.3V X5R 603

10uF

C1250

1

2

Place on secondary side.

D2T-SM2

POLY-TANT

2.0V

20%

330UF

CRITICAL

C1240

1

23

330UF

20%

CRITICAL

2.0V POLY-TANT D2T-SM2

Place on secondary side.

C1241

1

23

Place on secondary side.

330UF

20%

2.0V POLY-TANT D2T-SM2

CRITICAL

C1242

1

23

CRITICAL

330UF

2.0V

D2T-SM2

Place on secondary side.

20%

POLY-TANT

C1243

1

23

SYNC_MASTER=K36B_MLB SYNC_DATE=08/17/2008

109

12

02

CPU Decoupling

051-8089

=PP1V5_S0_CPU

=PP1V05_S0_CPU

=PPVCORE_S0_CPU

8

11

6 8

10 11 13

8

11

IN

BI

BI BI

OUT

IN

BI

IN

IN IN

OUT

OUT OUT

BI BI

OUT

IN

IN IN

IN OUT OUT OUT

OUT

NC

IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

PWRGD/HOOK0

516S0625

OBSFN_B1

OBSDATA_D1

OBSDATA_D2

MCP79-specific pinout

OBSFN_A0 OBSFN_A1

VCC_OBS_CD

DBR#/HOOK7 NOTE: XDP_DBRESET_L must be pulled-up to 3.3V.

Direction of XDP module

XDP_PRESENT#

TDI

OBSFN_C1

OBSDATA_C0

OBSFN_D1

ITPCLK/HOOK4

RESET#/HOOK6

OBSDATA_C2

TCK0

OBSDATA_A3

OBSDATA_A1

OBSFN_C0

OBSDATA_C3

Mini-XDP Connector

Please avoid any obstructions

NOTE: This is not the standard XDP pinout.

VCC_OBS_AB

TDO

OBSFN_D0

SCL

SDA

TRSTn

HOOK3

HOOK2

HOOK1

TMS

OBSDATA_D0

TCK1

OBSDATA_B2 OBSDATA_B3

OBSFN_B0

ITPCLK#/HOOK5

OBSDATA_D3

OBSDATA_B1

OBSDATA_B0

OBSDATA_A2

OBSDATA_A0

OBSDATA_C1

Use with 920-0620 adapter board to support CPU, MCP debugging.

on even-numbered side of J1300

69 14 10

1/16W

5%

XDP

MF-LF

402

1K

R1399

1 2

72 44 21

7

72 44 21

7

XDP

402

1% 1/16W MF-LF

54.9

R1315

1

2

X5R

10% 16V

XDP

0.1uF

402

C1300

1

2

XDP

402

16V

0.1uF

10%

X5R

C1301

1

2

69 10

7

69 10

7

69 10

7 6

69 14 10

PLACEMENT_NOTE=Place close to CPU to minimize stub.

1K

5% 1/16W MF-LF

402

XDP

R1303

1 2

69 10

7

69 10

7

69 10

7

69 10

7

21

7 6

21

7 6

21

7 6

72 19

7

72 19

7

72 19

7

72 19

7

72 19

7

72 19

7

72 19

7

72 19

7

21

7 6

69 14

7

69 14

7

7 6

69 10

7 6

69 10

7 6

69 10

7 6

26 10

7

19

7

CRITICAL

6-1747769-0

XDP_CONN

F-ST-SM

J1300

61

62

63

64

1

10 11 12 13 14 15 16 17 18 19

2

20 21 22 23 24 25 26 27 28 29

3

30 31 32 33 34 35 36 37 38 39

4

40 41 42 43 44 45 46 47 48 49

5

50 51 52 53 54 55 56 57 58 59

6

60

7 8 9

109

02

SYNC_MASTER=M99_MLB

SYNC_DATE=01/08/2008

13

eXtended Debug Port(MiniXDP)

051-8089

FSB_CPURST_L

CPU_PWRGD

XDP_BPM_L<0>

XDP_BPM_L<4>

XDP_BPM_L<3> XDP_BPM_L<2>

XDP_BPM_L<1>

TP_XDP_OBSFN_B1

TP_XDP_OBSFN_B0

TP_XDP_OBSDATA_B0

TP_XDP_OBSDATA_B2 TP_XDP_OBSDATA_B3

XDP_OBS20

PM_LATRIGGER_L JTAG_MCP_TCK

MCP_DEBUG<3>

XDP_TRST_L

MCP_DEBUG<1>

MCP_DEBUG<2>

JTAG_MCP_TMS

MCP_DEBUG<0>

JTAG_MCP_TDI

JTAG_MCP_TRST_L

JTAG_MCP_TDO_CONN

XDP_BPM_L<5>

XDP_TCK

FSB_CLK_ITP_P

MCP_DEBUG<7>

MCP_DEBUG<6>

MCP_DEBUG<5>

MCP_DEBUG<4>

XDP_TMS

XDP_TDI

XDP_DBRESET_L

XDP_CPURST_L

FSB_CLK_ITP_N

TP_XDP_OBSDATA_B1

=PP3V3_S0_XDP

XDP_TDO_CONN

XDP_PWRGD

SMBUS_MCP_0_CLK

=PP1V05_S0_CPU

SMBUS_MCP_0_DATA

7

69

7

6 8

7

6 8

10 11 12

IN IN IN

IN

OUT

BI

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

BI BI BI

BI BI

BI

BI BI BI

BI

IN

BI

OUT

OUT OUT OUT

OUT OUT

OUT OUT OUT OUT OUT OUT

OUT

OUT OUT OUT OUT OUT

OUT OUT

IN

BI BI

CPU_BR0#

CPU_BNR#

BCLK_OUT_NB_N

CPU_BR1#

CPU_REQ4#

CPU_ADS#

CPU_A27#

CPU_A26#

CPU_A25#

CPU_A34#

CPU_D62#

CPU_D61#

CPU_D60#

CPU_A28# CPU_A29# CPU_A30# CPU_A31# CPU_A32#

CPU_A22# CPU_A23# CPU_A24#

CPU_REQ3#

CPU_REQ2#

CPU_DBI3#

CPU_D14#

CPU_D13#

CPU_D12#

CPU_D11#

CPU_D10#

CPU_DPWR#

CPU_RS1#

BCLK_VML_COMP_GND

CPU_COMP_VCC

CPU_TRDY#

CPU_PROCHOT#

CPU_BSEL0

CPU_RS2#

CPU_BSEL1

BCLK_IN_P

BCLK_OUT_CPU_N

CPU_PWRGD

CPU_DSTBP0#

CPU_DSTBP1#

CPU_DBI1#

CPU_DBI0#

CPU_DSTBN1#

CPU_DSTBN0#

CPU_DBI2#

CPU_DSTBP2# CPU_DSTBN2#

CPU_DSTBP3#

CPU_A4#

CPU_DSTBN3#

CPU_A3#

CPU_A5#

CPU_A9#

CPU_A8#

CPU_A6# CPU_A7#

CPU_A12#

CPU_A14#

CPU_A13#

CPU_A11#

CPU_A15# CPU_A16#

CPU_A19#

CPU_A17# CPU_A18#

CPU_A20# CPU_A21#

CPU_A35#

CPU_A33#

CPU_ADSTB0#

CPU_REQ0#

CPU_LOCK#

CPU_HIT# CPU_HITM#

CPU_FERR#

CPU_THERMTRIP#

CPU_PECI

CPU_COMP_GND

CPU_D0# CPU_D1#

CPU_D3#

CPU_D2#

CPU_D4# CPU_D5# CPU_D6#

CPU_D8#

CPU_D7#

CPU_D9#

CPU_D15#

CPU_D17# CPU_D18#

CPU_D16#

CPU_D19# CPU_D20# CPU_D21#

CPU_D23#

CPU_D22#

CPU_D24# CPU_D25# CPU_D26# CPU_D27# CPU_D28# CPU_D29# CPU_D30# CPU_D31# CPU_D32# CPU_D33# CPU_D34# CPU_D35# CPU_D36#

CPU_D38#

CPU_D37#

CPU_D39# CPU_D40# CPU_D41#

CPU_D43#

CPU_D42#

CPU_D44# CPU_D45# CPU_D46# CPU_D47#

CPU_D52# CPU_D53# CPU_D54# CPU_D55# CPU_D56# CPU_D57# CPU_D58# CPU_D59#

CPU_D63#

CPU_BPRI#

CPU_DEFER#

BCLK_OUT_CPU_P

BCLK_OUT_ITP_P BCLK_OUT_ITP_N

BCLK_OUT_NB_P

BCLK_IN_N

CPU_A20M#

CPU_NMI

CPU_INTR

CPU_SMI#

CPU_RESET#

CPU_SLP#

CPU_DPSLP#

CPU_STPCLK# CPU_DPRSTP#

CPU_D51#

CPU_D50#

CPU_D49#

CPU_D48#

CPU_ADSTB1#

CPU_IGNNE#

CPU_INIT#

BCLK_VML_COMP_VDD

CPU_RS0#

+V_DLL_DLCELL_AVDD +V_PLL_MCLK +V_PLL_FSB +V_PLL_CPU

CPU_A10#

CPU_BSEL2

CPU_DBSY# CPU_DRDY#

CPU_REQ1#

FSB

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

270 mA (A01)

Loop-back clock for delay matching.

20 mA

206 mA

15 mA

(MCP_BSEL<0>)

(MCP_BSEL<1>)

(MCP_BSEL<2>)

29 mA

9

69 10

69 13 10

69 10

69 13

7

69 13

7

69 10

69 13 10

69 10

69 60 10

9

69 60 42 10

69 42 10

69 10

49.9

1/16W

1%

402

MF-LF

R1436

1

2

1/16W

1%

402

MF-LF

49.9

R1431

1

2

49.9

MF-LF

402

1%

1/16W

R1430

1

2

402

49.9

1/16W

1%

MF-LF

R1435

1

2

NO STUFF

402

5%

1K

1/16W MF-LF

R1422

1

2

NO STUFF

1K

402

MF-LF

1/16W

5%

R1421

1

2

NO STUFF

1K

5%

402

MF-LF

1/16W

R1420

1

2

402

1/16W

62

5%

MF-LF

R1415

1

2

MF-LF

1/16W

402

1%

54.9

R1410

1

2

5% 1/16W

150

NO STUFF

402

MF-LF

R1440

1

2

OMIT

MCP79-TOPO-B

(1 OF 11)

BGA

U1400

AK41

AJ40

G41

G42

AL42

AL43

AK42

AL41

AM40

AM39

AF35

AG35

AG39 AE33

AG37 AG38

AG34

AN38 AL39

AG33

AL33

AF41

AJ33

AN36

AJ35 AJ37

AJ36 AJ38

AL37

AL34 AN37

AC34

AJ34

AL38 AL35

AN34

AR39 AN35

AE38

AE34

AC37 AE37

AE35

AB35

AD42

AE36

AK35

AD43

AA41

AE40

AL32

F41

D42

F42

AM42

AM43

Y43

W42

R42 T39

T42 T41

R41

T43 W35

AA37

W33 W34

Y40

AA36

AA34 AA38

AA35 U38

U36

U35 U33

U34

W38

W41

R33

U37

N34 N33

R34 R35

P35

R39 R37

R38

Y39

L37 L39

L38

N36 N38

J39 J38

J37

L42 M42

V42

P41

N41 N40

M40

H40 K42

H41 L41

H43

H42

Y41

K41

J40

H39 M43

Y42 P42

U41

V41

V35

N35

J41

AD39

AA40

AN32

AN33 AM32

AD41

U40

W37

L36

M41

T40

W39

N37

M39

AH40

AB42 AD40

AH39

AH42 AF42

AC43

AG41

E41

AJ41

AH43

AC38

AA33 AC39

AC33

AC35

H38

AC41 AB41

AC42

AM33

AH41

AG42

AG43

AE41

AG27

AH28

AG28

AH27

62

MF-LF

5%

402

1/16W

R1416

1

2

02

14

109

SYNC_DATE=08/17/2008SYNC_MASTER=K36B_MLB

MCP CPU Interface

051-8089

FSB_DSTB_L_P<2>

FSB_DSTB_L_P<3>

FSB_DINV_L<3>

FSB_A_L<3>

FSB_A_L<12>

FSB_A_L<23>

FSB_CLK_MCP_N

FSB_CLK_MCP_P

CPU_PROCHOT_L

FSB_RS_L<2>

FSB_RS_L<1>

FSB_RS_L<0>

MCP_BCLK_VML_COMP_GND

MCP_CPU_COMP_VCC MCP_CPU_COMP_GND

CPU_PECI_MCP

=PP1V05_S0_MCP_FSB

FSB_TRDY_L

FSB_HITM_L

FSB_HIT_L

FSB_DRDY_L

FSB_DBSY_L

FSB_BREQ0_L

FSB_BNR_L

FSB_ADS_L

FSB_A_L<21>

FSB_A_L<14>

FSB_A_L<16>

FSB_A_L<15>

FSB_A_L<33>

FSB_A_L<25>

FSB_DINV_L<0>

FSB_DINV_L<2>

FSB_DSTB_L_N<3>

FSB_A_L<4>

FSB_A_L<6> FSB_A_L<7> FSB_A_L<8> FSB_A_L<9>

FSB_A_L<17> FSB_A_L<18>

FSB_A_L<24>

FSB_A_L<26> FSB_A_L<27>

FSB_A_L<30>

FSB_A_L<35>

FSB_ADSTB_L<1>

FSB_REQ_L<0> FSB_REQ_L<1> FSB_REQ_L<2> FSB_REQ_L<3> FSB_REQ_L<4>

FSB_LOCK_L

FSB_D_L<0> FSB_D_L<1> FSB_D_L<2> FSB_D_L<3>

FSB_D_L<20>

CPU_INTR

CPU_DPRSTP_L

FSB_DSTB_L_N<2>

FSB_A_L<32>

FSB_ADSTB_L<0>

FSB_A_L<31>

FSB_A_L<28>

FSB_A_L<22>

FSB_A_L<20>

FSB_A_L<10> FSB_A_L<11>

FSB_A_L<13>

FSB_DINV_L<1>

FSB_DSTB_L_N<1>

FSB_DSTB_L_P<1>

FSB_DSTB_L_N<0>

FSB_DSTB_L_P<0>

FSB_BREQ1_L

FSB_D_L<47>

FSB_D_L<33>

FSB_D_L<31>

FSB_D_L<25>

FSB_D_L<14>

FSB_D_L<11>

FSB_D_L<4> FSB_D_L<5> FSB_D_L<6> FSB_D_L<7> FSB_D_L<8> FSB_D_L<9> FSB_D_L<10>

FSB_D_L<12> FSB_D_L<13>

FSB_D_L<15> FSB_D_L<16> FSB_D_L<17> FSB_D_L<18> FSB_D_L<19>

FSB_D_L<21> FSB_D_L<22> FSB_D_L<23> FSB_D_L<24>

FSB_D_L<26> FSB_D_L<27> FSB_D_L<28> FSB_D_L<29> FSB_D_L<30>

FSB_D_L<32>

FSB_D_L<34> FSB_D_L<35> FSB_D_L<36> FSB_D_L<37> FSB_D_L<38> FSB_D_L<39> FSB_D_L<40> FSB_D_L<41> FSB_D_L<42> FSB_D_L<43> FSB_D_L<44> FSB_D_L<45> FSB_D_L<46>

FSB_D_L<48> FSB_D_L<49>

FSB_D_L<51> FSB_D_L<52>

FSB_D_L<60>

FSB_D_L<53>

FSB_D_L<55>

FSB_D_L<57> FSB_D_L<58> FSB_D_L<59>

FSB_D_L<56>

FSB_D_L<54>

FSB_D_L<50>

FSB_BPRI_L FSB_DEFER_L

FSB_CLK_CPU_P FSB_CLK_CPU_N

FSB_CLK_ITP_P FSB_CLK_ITP_N

CPU_A20M_L

CPU_STPCLK_L

FSB_DPWR_L

CPU_DPSLP_L

FSB_CPURST_L

FSB_A_L<29>

FSB_A_L<34>

FSB_D_L<63>

FSB_D_L<62>

FSB_D_L<61>

PM_THRMTRIP_L

CPU_IGNNE_L CPU_INIT_L

=MCP_BSEL<0>

=MCP_BSEL<1>

CPU_NMI

PP1V05_S0_MCP_PLL_FSB

CPU_SMI_L

CPU_PWRGD

FSB_CPUSLP_L

MCP_BCLK_VML_COMP_VDD

=MCP_BSEL<2>

CPU_FERR_L

=PP1V05_S0_MCP_FSB

FSB_A_L<5>

FSB_A_L<19>

69

8

14 22 24

69

24

69

8

14 22 24

0A

MEMORY

MEMORY PARTITION 0

CONTROL

MCKE0A_1 MCKE0A_0

MODT0A_1 MODT0A_0

MCS0A_0#

MCS0A_1#

MCLK0A_0_N

MCLK0A_0_P

MCLK0A_1_N

MCLK0A_2_N

MCLK0A_1_P

MCLK0A_2_P

MA0_0

MA0_1

MA0_2

MA0_3

MA0_4

MA0_5

MA0_6

MA0_8 MA0_7

MA0_9

MA0_10

MA0_11

MA0_13 MA0_12

MA0_14

MBA0_2

MBA0_0

MBA0_1

MWE0#

MCAS0#

MRAS0#

MDQS0_0_P MDQS0_0_N

MDQS0_1_P

MDQS0_2_N

MDQS0_1_N

MDQS0_2_P

MDQS0_3_N

MDQS0_4_P

MDQS0_3_P

MDQS0_4_N

MDQS0_5_N

MDQS0_5_P

MDQS0_6_N

MDQS0_6_P

MDQS0_7_N

MDQS0_7_P

MDQM0_2 MDQM0_1 MDQM0_0

MDQM0_3

MDQM0_4

MDQ0_0

MDQM0_7

MDQM0_5

MDQM0_6

MDQ0_1

MDQ0_4 MDQ0_3 MDQ0_2

MDQ0_5

MDQ0_6

MDQ0_9 MDQ0_8 MDQ0_7

MDQ0_10

MDQ0_11

MDQ0_15 MDQ0_14 MDQ0_13 MDQ0_12

MDQ0_16

MDQ0_21 MDQ0_20

MDQ0_18

MDQ0_19

MDQ0_17

MDQ0_25 MDQ0_24 MDQ0_23 MDQ0_22

MDQ0_26

MDQ0_29 MDQ0_28 MDQ0_27

MDQ0_30

MDQ0_31

MDQ0_35 MDQ0_34

MDQ0_32

MDQ0_36

MDQ0_33

MDQ0_41

MDQ0_37

MDQ0_38

MDQ0_40 MDQ0_39

MDQ0_42

MDQ0_47 MDQ0_46

MDQ0_43

MDQ0_45 MDQ0_44

MDQ0_51 MDQ0_50 MDQ0_49

MDQ0_52

MDQ0_48

MDQ0_55 MDQ0_54 MDQ0_53

MDQ0_56

MDQ0_57

MDQ0_61 MDQ0_60

MDQ0_58

MDQ0_59

MDQ0_62

MDQ0_63

OUT

OUT OUT OUT OUT OUT OUT

BI

BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI BI

OUT OUT OUT

OUT OUT

BI BI

BI

BI BI

BI

BI BI BI BI

BI BI

BI

BI BI BI

BI

BI BI BI BI BI BI

BI

OUT OUT OUT

OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT

OUT OUT

MEMORY

CONTROL

1A

MEMORY PARTITION 1

MDQ1_63

MDQ1_60 MDQ1_59

MDQ1_62

MDQ1_58

MDQ1_61

MDQ1_57

MDQ1_53

MDQ1_56 MDQ1_55 MDQ1_54

MDQ1_52

MDQ1_49

MDQ1_51 MDQ1_50

MDQ1_48 MDQ1_47 MDQ1_46

MDQ1_43

MDQ1_44

MDQ1_45

MDQ1_42 MDQ1_41

MDQ1_37

MDQ1_38

MDQ1_39

MDQ1_36 MDQ1_35

MDQ1_32

MDQ1_33

MDQ1_34

MDQ1_31 MDQ1_30

MDQ1_27

MDQ1_28

MDQ1_29

MDQ1_22

MDQ1_26 MDQ1_25 MDQ1_24 MDQ1_23

MDQ1_17

MDQ1_19

MDQ1_20

MDQ1_18

MDQ1_21

MDQ1_16

MDQ1_12

MDQ1_13

MDQ1_14

MDQ1_15

MDQ1_11 MDQ1_10

MDQ1_7

MDQ1_8

MDQ1_9

MDQ1_3

MDQ1_6

MDQ1_2

MDQ1_4

MDQ1_5

MDQ1_1

MDQM1_6 MDQM1_5

MDQ1_0

MDQM1_7

MDQM1_4 MDQM1_3

MDQM1_0

MDQM1_1

MDQM1_2

MDQ1_40

MDQS1_7_P

MDQS1_6_N

MDQS1_6_P

MDQS1_7_N

MDQS1_5_N

MDQS1_5_P

MDQS1_4_P

MDQS1_3_P

MDQS1_4_N

MDQS1_2_P

MDQS1_3_N

MDQS1_1_P

MDQS1_2_N

MDQS1_1_N MDQS1_0_P MDQS1_0_N

MRAS1# MCAS1#

MWE1#

MBA1_2 MBA1_1 MBA1_0

MA1_14 MA1_13 MA1_12 MA1_11 MA1_10

MA1_9 MA1_8 MA1_7 MA1_6 MA1_5 MA1_4 MA1_3 MA1_2 MA1_1 MA1_0

MCLK1A_2_P

MCLK1A_1_P

MCLK1A_2_N

MCLK1A_0_P

MCLK1A_1_N

MCS1A_1# MCS1A_0#

MCLK1A_0_N

MODT1A_1 MODT1A_0

MCKE1A_0

MCKE1A_1

BI BI BI

BI

BI BI BI

BI

BI BI BI

BI

BI BI BI BI BI BI

BI

BI BI BI

BI

BI BI BI

BI

BI BI BI

BI

BI BI BI BI BI BI

BI

OUT

BI

OUT OUT OUT OUT OUT OUT OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

OMIT

BGA

MCP79-TOPO-B

(2 OF 11)

U1400

AR19

AT19

AN19

AW21

AN23

AU15

AR23

AU19

AV19

AN21

AR21

AP21

AU21

AR22

AV21

AW17

AP19

AP23

AP17

AT23

AU23

BC20

BB20

AY24

BA24

AV33

AW33

AR18

AT15

AP35

AR35

AV31

AT31

AW37

AV37

AR33

AU31

AN31

AV29

AN29

AV27

AW38

AR31

AP31

AR29

AP29

AR27

AP27

AR25

AP25

AU27

AT27

AV38

AU25

AR26

AU13

AR14

AT11

AR11

AW13

AV13

AV11

AU11

AR38

AV9

AU9

AY5

AW6

AP11

AW9

AU8

AU7

AV5

AU6

AR37

AR5

AN10

AW5

AV6

AR7

AR6

AN7

AN6

AL7

AL6

AV39

AN9

AP9

AL9

AL8

AW39

AU37

AT37

AR34

AV35

AW29

AN27

AN13

AR10

AU5

AN5

AT39

AU39

AU35

AT35

AU29

AU30

AW25

AV25

AR13

AP13

AW8

AW7

AR9

AR8

AL11

AL10

AV15

AP15

AV17

AR17

70 28

70 30 28

70 28

70 30 28

70 28

70 29

70 30 29

70 29

70 30 29

OMIT

(3 OF 11)

MCP79-TOPO-B

BGA

U1400

BA18

BB25

BA17

BC28

AW28

BA14

BA29

BA25

BB26

BA26

BA27

AY27

BA28

AY28

BB28

BB17

BB18

BB29

BA15

BB30

AY31

AY19

BA19

BA22

BB22

BB42

BA42

BB16

BB14

AP42

AR41

BC40

BA40

AV41

AV42

AW40

BB40

AY39

BA38

BB36

BA36

AU41

AY40

BA39

AW36

BC36

AY35

BA34

BB32

BA32

AY36

BA35

AU40

AW32

BC32

BA12

AY12

BB9

BB8

AW12

BB12

BB10

BA9

AN40

AY8

BA7

BC4

BB4

BC8

BA8

BA5

BB5

BB2

BA3

AP41

AW3

AW4

BC3

BB3

AY3

AY4

AU3

AU2

AR3

AR4

AT41

AV3

AV2

AT3

AT4

AT40

AW41

AW42

AR42

AY43

BB38

BB34

BA11

AY7

BA2

AT5

AT43

AT42

AY42

BA43

BA37

BB37

BA33

BB33

AY11

BA10

BA6

BB6

AY1

AY2

AT1

AT2

AY15

BB13

AW16

BA16

70 29

109

02

15

SYNC_DATE=08/17/2008SYNC_MASTER=K36B_MLB

MCP Memory Interface

051-8089

MEM_A_DQ<36>

MEM_B_DM<5>

MEM_A_DQ<47>

MEM_B_DQS_P<7> MEM_B_DQS_N<7> MEM_B_DQS_P<6> MEM_B_DQS_N<6> MEM_B_DQS_P<5> MEM_B_DQS_N<5> MEM_B_DQS_P<4> MEM_B_DQS_N<4> MEM_B_DQS_P<3> MEM_B_DQS_N<3> MEM_B_DQS_P<2> MEM_B_DQS_N<2> MEM_B_DQS_P<1> MEM_B_DQS_N<1> MEM_B_DQS_P<0> MEM_B_DQS_N<0>

MEM_B_RAS_L MEM_B_CAS_L MEM_B_WE_L

MEM_B_BA<2> MEM_B_BA<1>

MEM_B_A<14> MEM_B_A<13> MEM_B_A<12> MEM_B_A<11> MEM_B_A<10> MEM_B_A<9> MEM_B_A<8> MEM_B_A<7>

MEM_B_A<5> MEM_B_A<4>

MEM_B_A<2> MEM_B_A<1> MEM_B_A<0>

MEM_B_DQ<63> MEM_B_DQ<62> MEM_B_DQ<61> MEM_B_DQ<60> MEM_B_DQ<59> MEM_B_DQ<58> MEM_B_DQ<57> MEM_B_DQ<56> MEM_B_DQ<55> MEM_B_DQ<54> MEM_B_DQ<53> MEM_B_DQ<52> MEM_B_DQ<51> MEM_B_DQ<50> MEM_B_DQ<49> MEM_B_DQ<48> MEM_B_DQ<47> MEM_B_DQ<46> MEM_B_DQ<45> MEM_B_DQ<44> MEM_B_DQ<43> MEM_B_DQ<42> MEM_B_DQ<41> MEM_B_DQ<40> MEM_B_DQ<39> MEM_B_DQ<38> MEM_B_DQ<37> MEM_B_DQ<36> MEM_B_DQ<35> MEM_B_DQ<34> MEM_B_DQ<33> MEM_B_DQ<32> MEM_B_DQ<31> MEM_B_DQ<30> MEM_B_DQ<29> MEM_B_DQ<28> MEM_B_DQ<27> MEM_B_DQ<26> MEM_B_DQ<25> MEM_B_DQ<24> MEM_B_DQ<23> MEM_B_DQ<22> MEM_B_DQ<21> MEM_B_DQ<20> MEM_B_DQ<19> MEM_B_DQ<18> MEM_B_DQ<17> MEM_B_DQ<16> MEM_B_DQ<15> MEM_B_DQ<14> MEM_B_DQ<13> MEM_B_DQ<12> MEM_B_DQ<11> MEM_B_DQ<10> MEM_B_DQ<9>

MEM_B_DQ<2> MEM_B_DQ<1> MEM_B_DQ<0>

MEM_B_DM<6>

MEM_B_DM<4>

MEM_B_DM<1>

MEM_B_DQ<3>

MEM_B_DQ<4>

MEM_B_DQ<5>

MEM_B_DQ<7> MEM_B_DQ<6>

MEM_A_DQ<61>

MEM_A_DQ<59>

MEM_A_DQ<60>

MEM_A_DQ<57> MEM_A_DQ<56>

MEM_A_DQ<48>

MEM_A_DQ<51>

MEM_A_DQ<44>

MEM_A_DQ<45>

MEM_A_DQ<43>

MEM_A_DQ<46>

MEM_A_DQ<42>

MEM_A_DQ<39>

MEM_A_DQ<40>

MEM_A_DQ<38> MEM_A_DQ<37>

MEM_A_DQ<41>

MEM_A_DQ<33> MEM_A_DQ<32>

MEM_A_DQ<34>

MEM_A_DQ<35>

MEM_A_DQ<31> MEM_A_DQ<30>

MEM_A_DQ<27>

MEM_A_DQ<28>

MEM_A_DQ<29>

MEM_A_DQ<26>

MEM_A_DQ<22>

MEM_A_DQ<23>

MEM_A_DQ<24>

MEM_A_DQ<25>

MEM_A_DQ<17>

MEM_A_DQ<19> MEM_A_DQ<18>

MEM_A_DQ<20>

MEM_A_DQ<21>

MEM_A_DQ<16>

MEM_A_DQ<12>

MEM_A_DQ<13>

MEM_A_DQ<14>

MEM_A_DQ<15>

MEM_A_DQ<11> MEM_A_DQ<10>

MEM_A_DQ<7>

MEM_A_DQ<8>

MEM_A_DQ<9>

MEM_A_DQ<6> MEM_A_DQ<5>

MEM_A_DQ<2>

MEM_A_DQ<3>

MEM_A_DQ<4>

MEM_A_DQ<1>

MEM_A_DM<6> MEM_A_DM<5>

MEM_A_DM<7>

MEM_A_DQ<0>

MEM_A_DM<4> MEM_A_DM<3>

MEM_A_DM<0>

MEM_A_DM<1>

MEM_A_DM<2>

MEM_A_DQS_P<7>

MEM_A_DQS_N<6> MEM_A_DQS_P<5> MEM_A_DQS_N<5>

MEM_A_DQS_N<4> MEM_A_DQS_P<3>

MEM_A_DQS_P<4>

MEM_A_DQS_N<3> MEM_A_DQS_P<2>

MEM_A_DQS_N<1>

MEM_A_DQS_P<1>

MEM_A_DQS_N<0>

MEM_A_DQS_P<0>

MEM_A_RAS_L

MEM_A_BA<1> MEM_A_BA<0>

MEM_A_BA<2>

MEM_A_A<14>

MEM_A_A<12>

MEM_A_A<13>

MEM_A_A<11> MEM_A_A<10> MEM_A_A<9>

MEM_A_A<7>

MEM_A_A<8>

MEM_A_A<6>

MEM_A_A<2>

MEM_A_WE_L

MEM_A_CAS_L

MEM_A_ODT<1>

MEM_A_CKE<1> MEM_A_CKE<0> MEM_B_CKE<0>

MEM_B_DM<7>

MEM_A_A<0>

MEM_A_A<1>

MEM_A_A<4>

MEM_A_A<5>

MEM_A_CLK_P<0>

MEM_A_CS_L<1>

MEM_A_CLK_N<0>

TP_MEM_A_CLK2P

MEM_A_CS_L<0>

TP_MEM_B_CLK2P TP_MEM_B_CLK2N

MEM_B_CS_L<1> MEM_B_CS_L<0>

MEM_A_ODT<0>

MEM_A_CLK_N<1>

TP_MEM_A_CLK2N

MEM_A_CLK_P<1>

MEM_B_DM<3>

MEM_B_CLK_N<0>

MEM_B_CLK_P<0>

MEM_B_CLK_N<1>

MEM_B_CLK_P<1>

MEM_A_DQ<58>

MEM_B_DM<0>

MEM_B_DM<2>

MEM_B_CKE<1>

MEM_B_ODT<0>

MEM_B_ODT<1>

MEM_A_DQS_N<2>

MEM_A_DQ<62>

MEM_B_BA<0>

MEM_B_A<6>

MEM_B_A<3>

MEM_B_DQ<8>

MEM_A_DQ<53>

MEM_A_A<3>

MEM_A_DQS_P<6>

MEM_A_DQS_N<7>

MEM_A_DQ<63>

MEM_A_DQ<52>

MEM_A_DQ<54>

MEM_A_DQ<55>

MEM_A_DQ<50> MEM_A_DQ<49>

MCLK1B_2_P

MCLK1B_1_N

MCLK1B_0_P

MCLK1B_1_P

MCLK1B_2_N

MCS1B_1#

MCS1B_0#

MCLK1B_0_N

MODT1B_0

MCKE1B_1

MCKE1B_0

MODT1B_1

MRESET0#

GND55 GND56 GND57 GND58

GND60

GND59

GND61 GND62 GND63 GND64

GND52 GND53 GND54

GND51

GND49 GND50

GND48

GND47

GND46

GND44 GND45

GND43

GND42

GND41

GND39 GND40

GND38

GND37

GND36

GND35

GND33 GND34

GND32

GND31

GND30

GND28 GND29

GND27

GND26

GND25

GND24

GND18 GND19

GND17

GND16

GND15

GND13 GND14

GND10

GND12

GND11

GND8 GND9

GND7

GND6

GND5

GND2 GND3 GND4

GND1

MEM_COMP_VDD MEM_COMP_GND

MODT0B_0 MODT0B_1

MCKE0B_1

MCKE0B_0

MCLK0B_0_N

MCS0B_0# MCS0B_1#

MCLK0B_2_N

MCLK0B_1_P

MCLK0B_0_P

MCLK0B_1_N

MCLK0B_2_P

+V_PLL_XREF_XS

+V_PLL_CORE +V_VPLL

+VDD_MEM1 +VDD_MEM2 +VDD_MEM3 +VDD_MEM4 +VDD_MEM5 +VDD_MEM6 +VDD_MEM7 +VDD_MEM8

+VDD_MEM9 +VDD_MEM10 +VDD_MEM11

+VDD_MEM14 +VDD_MEM15 +VDD_MEM16 +VDD_MEM17 +VDD_MEM18 +VDD_MEM19 +VDD_MEM20

+VDD_MEM22

+VDD_MEM21

+VDD_MEM23 +VDD_MEM24 +VDD_MEM25 +VDD_MEM26

+VDD_MEM30

+VDD_MEM27

+VDD_MEM29

+VDD_MEM31 +VDD_MEM32 +VDD_MEM33 +VDD_MEM34

+VDD_MEM38 +VDD_MEM39 +VDD_MEM40 +VDD_MEM41

+VDD_MEM43 +VDD_MEM44 +VDD_MEM45

+VDD_MEM42

+V_PLL_DP

+VDD_MEM13

+VDD_MEM12

+VDD_MEM28

+VDD_MEM37

+VDD_MEM36

+VDD_MEM35

GND21

GND20

GND22 GND23

MEMORY CONTROL 0B

MEMORY CONTROL 1B

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

87 mA (A01)

19 mA

17 mA 12 mA

39 mA

Current numbers from email Poonacha Kongetira provided 11/30/2007 4:04pm (no official document number).

TP or NC for DDR2.

4771 MA (A01, DDR2)

MF-LF

402

1/16W

40.2

1%

R1610

1

2

40.2

1/16W

1%

MF-LF

402

R1611

1

2

OMIT

BGA

MCP79-TOPO-B

(4 OF 11)

U1400

AA22

AA39

AB22

AB7

AD22

AE20 AF24

AG24 AH35

AK7

AM28

AP12

AT25

AP30

AR36 AU10

F28

BC21

AY9

BC9 D34

F24

G30

G32 H31

K7

M38

M5

M6

M7 M9

N39

N8

P10

P33

P34 P37

P4

P40

P7

R36

R40 R43

R5

T10

T18

T20

AK11

T24

T26

T33

T34

T35 T37

T38

T6

T7

T9

U18 U20

U22

V10

V34

W5

AV23

AN25

BA30

BA31

BB21

BA21

BC24

BB24

AU34

AU33

AY20

BA20

BA23

AY23

BB41

BA41

AU17 AR15

BC16 BA13

AM41

AN41

AN17

AN15

AY16

BC13

AY32

U27

U28

T27

T28

AM17

AN20 AN24

AT17

AP16 AN22

AP20

AP24 AV16

AR16 AR20

AM19

AR24

AW15 AP22

AP18

AU16 AN18

AU24

AT21 AY29

AV24

AM21

AU20

AU22

AW27 BC17

AV20

AY17 AY18

AM15

AU18 AY25

AM23

AY26 AW19

AW24

BC25 AL30

AM31

AM25 AM27

AM29 AN16

BC29

109

16

02

SYNC_DATE=08/17/2008SYNC_MASTER=K36B_MLB

MCP Memory Misc

051-8089

MCP_MEM_RESET_L

TP_MEM_A_ODT<2>

PP1V05_S0_MCP_PLL_CORE

TP_MEM_A_CKE<2>

TP_MEM_B_CS_L<2>

MCP_MEM_COMP_GND

TP_MEM_A_CLK4N

TP_MEM_A_CLK5P TP_MEM_A_CLK5N

TP_MEM_B_CLK5P TP_MEM_B_CLK5N

TP_MEM_B_CLK4P TP_MEM_B_CLK4N

TP_MEM_B_CLK3P TP_MEM_B_CLK3N

TP_MEM_B_CS_L<3>

TP_MEM_B_ODT<2>

=PP1V8R1V5_S0_MCP_MEM

MCP_MEM_COMP_VDD

TP_MEM_A_ODT<3>

TP_MEM_A_CKE<3>

=PP1V8R1V5_S0_MCP_MEM

TP_MEM_A_CLK3N

TP_MEM_A_CLK3P

TP_MEM_A_CLK4P

TP_MEM_B_CKE<2> TP_MEM_B_CKE<3>

TP_MEM_A_CS_L<3>

TP_MEM_B_ODT<3>

TP_MEM_A_CS_L<2>

9

24

70

8

16 24

70

8

16 24

PE0_RX0_P

PE0_RX2_N

+AVDD0_PEX11

+AVDD0_PEX7 +AVDD0_PEX8

+AVDD1_PEX3

+AVDD1_PEX2

+AVDD1_PEX1

+AVDD0_PEX13

+AVDD0_PEX12

+AVDD0_PEX10

+AVDD0_PEX9

+AVDD0_PEX6

+AVDD0_PEX5

+AVDD0_PEX4

+AVDD0_PEX3

+AVDD0_PEX2

+AVDD0_PEX1

+V_PLL_PEX

+DVDD1_PEX2

+DVDD1_PEX1

+DVDD0_PEX8

+DVDD0_PEX7

+DVDD0_PEX6

+DVDD0_PEX5

+DVDD0_PEX4

+DVDD0_PEX3

+DVDD0_PEX2

+DVDD0_PEX1

PE0_RX0_N

PE0_RX2_P

PE0_RX4_P

PE0_RX6_P

PEB_PRSNT#

PE1_TX3_N

PE1_TX3_P

PE1_TX2_N

PE1_TX1_N

PE1_TX2_P

PE1_TX0_N

PE1_TX1_P

PE6_REFCLK_N

PEX_RST0#

PE1_TX0_P

PE5_REFCLK_N

PE5_REFCLK_P

PE6_REFCLK_P

PE4_REFCLK_N

PE4_REFCLK_P

PE3_REFCLK_N

PE2_REFCLK_N

PE1_REFCLK_N

PE2_REFCLK_P

PE0_REFCLK_N

PE0_REFCLK_P

PE1_REFCLK_P

PE0_TX15_N

PE0_TX14_N PE0_TX15_P

PE0_TX13_N PE0_TX14_P

PE0_TX12_N

PE0_TX12_P

PE0_TX13_P

PE0_TX11_N

PE0_TX11_P

PE0_TX10_N

PE0_TX9_N PE0_TX10_P

PE0_TX8_N

PE0_TX8_P

PE0_TX9_P

PE0_TX7_N

PE0_TX7_P

PE0_TX6_N

PE0_TX5_N

PE0_TX6_P

PE0_TX4_N

PE0_TX5_P

PE0_TX3_N

PE0_TX3_P

PE0_TX4_P

PE0_TX2_N

PE0_TX2_P

PE0_TX0_N

PE0_TX1_N

PE0_TX1_P

PE0_TX0_P

PEX_CLK_COMP

PE1_RX3_N

PE1_RX3_P

PE1_RX2_N

PE1_RX0_N

PE1_RX1_P

PE1_RX2_P

PE1_RX1_N

PE_WAKE#

PE1_RX0_P

PE0_PRSNT_16#

PE0_RX13_N PE0_RX14_P

PE0_RX15_P

PE0_RX14_N

PE0_RX15_N

PE0_RX12_P

PE0_RX11_P

PE0_RX13_P

PE0_RX11_N

PE0_RX12_N

PE0_RX10_N

PE0_RX8_P

PE0_RX9_P

PE0_RX10_P

PE0_RX8_N

PE0_RX9_N

PE0_RX5_N

PE0_RX7_P

PE0_RX6_N

PE0_RX7_N

PE0_RX3_P

PE0_RX5_P

PE0_RX3_N

PE0_RX4_N

PE0_RX1_P PE0_RX1_N

PEC_PRSNT#

PEC_CLKREQ#/GPIO_50

PE3_REFCLK_P

PED_CLKREQ#/GPIO_51

PED_PRSNT#

PEB_CLKREQ#/GPIO_49

PEE_CLKREQ#/GPIO_16 PEE_PRSNT#/GPIO_46

PEF_CLKREQ#/GPIO_17 PEF_PRSNT#/GPIO_47

PEG_CLKREQ#/GPIO_18 PEG_PRSNT#/GPIO_48

PCI EXPRESS

OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT OUT

OUT OUT

OUT

OUT OUT

OUT

IN IN

IN

IN IN

OUT

OUT OUT

OUT

IN

OUT

IN

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

Int PU

84 mA (A01)

Int PU

Int PU (S5)

IF PE1 INTERFACE IS NOT USED, GROUND DVDD1_PEX AND AVDD1_PEX

IF PE0 INTERFACE IS NOT USED, GROUND DVDD0_PEX AND AVDD0_PEX.

OMIT

BGA

(5 OF 11)

MCP79-TOPO-B

U1400

Y12

AC12 AD12

V12

W12

AA12 AB12

M12 P12

R12

N12 T12

U12

M13 N13

P13

T17

W19 U17

V19 W16

W17

W18 U16

T19 U19

T16

C9

D11

E11

E7

F7

L8

L9

L6

L7

N10

N11

P9

N9

N6

N7

N4

N5

C7

D7

F6

E6

F5

E5

E3

E4

D3

C3

H5

G5

J6

J7

J4

J5

L10

L11

D4

C5

J1

H1

J3

J2

K3

K2

L3

L4

M3

M4

M1

M2

B4

C4

A3

A4

B2

B3

D1

C1

E1

D2

F2

E2

F4

F3

H4

G3

H2

H3

F11

G11

J9

K9

G9

H9

E9

F9

G7

H7

C8

D8

A8

B8

B7

A7

C6

B6

J10

J11

F13

G13

H13

J13

K14

L14

M14

N14

F17

D5 D9

E8

C10

M15 B10

L16 L18

M16

M18

M17

M19

A11

K11

9

71

9

71

9

71 31

7

71 31

7

9

35

31

7

71 35

71

9

71

9

31

7

31

9

71 31

7

71 31

7

71 35

71

9

71

9

71 31

71

9

71

9

NO STUFF

2.37K

1/16W MF-LF 402

PLACEMENT_NOTE=Place within 12.7mm of U1400

1%

R1710

1

2

26

9

109

02

17

SYNC_DATE=08/17/2008SYNC_MASTER=K36B_MLB

MCP PCIe Interfaces

051-8089

=PEG_R2D_C_P<3>

=PEG_D2R_P<6>

=PEG_D2R_N<5>

=PEG_D2R_P<5>

=PP1V05_S0_MCP_PEX_AVDD0

=PP1V05_S0_MCP_PEX_AVDD1

=PP1V05_S0_MCP_PEX_DVDD0

PCIE_EXCARD_D2R_P PCIE_EXCARD_D2R_N

TP_PCIE_PE4_D2RP TP_PCIE_PE4_D2RN

PCIE_EXCARD_PRSNT_L

EXCARD_CLKREQ_L

FW_CLKREQ_L

PCIE_MINI_PRSNT_L

TP_PE4_CLKREQ_L TP_PE4_PRSNT_L

TP_MCP_GPIO_17

PCIE_WAKE_L

PCIE_MINI_D2R_P PCIE_MINI_D2R_N

PCIE_FW_D2R_P PCIE_FW_D2R_N

=PP1V05_S0_MCP_PEX_DVDD1

PEG_CLKREQ_L EXTGPU_RESET_L

PEG_PRSNT_L

TP_PCIE_PE4_R2D_CN

PCIE_FW_R2D_C_N

PCIE_EXCARD_R2D_C_P

TP_PCIE_CLK100M_PE6N

PP1V05_S0_MCP_PLL_PEX

TP_PCIE_CLK100M_PE4N

TP_PCIE_CLK100M_PE5N

PCIE_RESET_L

PCIE_MINI_R2D_C_P

PCIE_FW_R2D_C_P

=PEG_D2R_N<15>

=PEG_D2R_N<7>

=PEG_D2R_P<0>

=PEG_D2R_N<2>

=PEG_D2R_N<0>

=PEG_D2R_P<2>

=PEG_D2R_P<4>

PCIE_EXCARD_R2D_C_N

PCIE_MINI_R2D_C_N

TP_PCIE_CLK100M_PE5P

TP_PCIE_CLK100M_PE6P

TP_PCIE_CLK100M_PE4P

PCIE_CLK100M_EXCARD_N

PCIE_CLK100M_FW_N

PCIE_CLK100M_MINI_N

PCIE_CLK100M_FW_P

PEG_CLK100M_N

PEG_CLK100M_P

PCIE_CLK100M_MINI_P

=PEG_R2D_C_N<15>

=PEG_R2D_C_N<14> =PEG_R2D_C_P<15>

=PEG_R2D_C_N<13> =PEG_R2D_C_P<14>

=PEG_R2D_C_N<12>

=PEG_R2D_C_P<12>

=PEG_R2D_C_P<13>

=PEG_R2D_C_N<11>

=PEG_R2D_C_P<11>

=PEG_R2D_C_N<10>

=PEG_R2D_C_N<9> =PEG_R2D_C_P<10>

=PEG_R2D_C_N<8>

=PEG_R2D_C_P<8>

=PEG_R2D_C_P<9>

=PEG_R2D_C_N<7>

=PEG_R2D_C_P<7>

=PEG_R2D_C_N<6>

=PEG_R2D_C_N<5> =PEG_R2D_C_P<6>

=PEG_R2D_C_N<4> =PEG_R2D_C_P<5>

=PEG_R2D_C_N<3> =PEG_R2D_C_P<4>

=PEG_R2D_C_N<2>

=PEG_R2D_C_P<2>

=PEG_R2D_C_N<0>

=PEG_R2D_C_N<1>

=PEG_R2D_C_P<1>

=PEG_R2D_C_P<0>

=PEG_D2R_N<13> =PEG_D2R_P<14>

=PEG_D2R_P<15>

=PEG_D2R_N<14>

=PEG_D2R_P<12>

=PEG_D2R_P<11>

=PEG_D2R_P<13>

=PEG_D2R_N<11>

=PEG_D2R_N<12>

=PEG_D2R_N<10>

=PEG_D2R_P<8>

=PEG_D2R_P<9>

=PEG_D2R_N<8>

=PEG_D2R_N<9>

=PEG_D2R_P<7>

=PEG_D2R_N<6>

=PEG_D2R_P<3> =PEG_D2R_N<3>

=PEG_D2R_N<4>

=PEG_D2R_P<1> =PEG_D2R_N<1>

PCIE_CLK100M_EXCARD_P

EXTGPU_PWR_EN

MINI_CLKREQ_L

MCP_PEX_CLK_COMP

PCIE_FW_PRSNT_L

TP_PCIE_PE4_R2D_CP

=PEG_D2R_P<10>

8

24

71

IN

BI

OUT

IN IN IN IN

IN IN

OUT

OUT OUT OUT OUT OUT OUT

OUT OUT

IN IN

OUT OUT

OUT OUT OUT

OUT OUT

IN

IN OUT

IN IN IN

GPIO_7/NFERR*/IGPU_GPIO_7

+V_DUAL_MACPLL

+VDD_HDMI

+V_PLL_HDMI

+V_PLL_IFPAB

+VDD_IFPB

+VDD_IFPA

+V_TV_DAC

+V_RGB_DAC

+V_DUAL_RMGT2

MII_COMP_GND

MII_COMP_VDD

LCD_PANEL_PWR/GPIO_58

LCD_BKL_ON/GPIO_59

LCD_BKL_CTL/GPIO_57

XTALOUT_TV

GPIO_6/FERR*/IGPU_GPIO_6

HDMI_TXC_P/ML0_LANE3_P HDMI_TXC_N/ML0_LANE3_N

HDMI_TXD0_P/ML0_LANE2_P HDMI_TXD0_N/ML0_LANE2_N HDMI_TXD1_P/ML0_LANE1_P HDMI_TXD1_N/ML0_LANE1_N HDMI_TXD2_P/ML0_LANE0_P HDMI_TXD2_N/ML0_LANE0_N

HPLUG_DET2/GPIO_22

IFPA_TXC_N

XTALIN_TV

DDC_DATA2/GPIO_24

DDC_CLK2/GPIO_23

RGB_DAC_RSET RGB_DAC_VREF

TV_DAC_VREF

DP_AUX_CH0_P DP_AUX_CH0_N

HPLUG_DET3

HDMI_RSET HDMI_VPROBE

RGMII_MDIO

BUF_25MHZ

DDC_DATA0

DDC_CLK0

RGB_DAC_RED

RGB_DAC_GREEN

RGB_DAC_BLUE

RGB_DAC_HSYNC RGB_DAC_VSYNC

TV_DAC_RED

TV_DAC_GREEN

IFPA_TXC_P

IFPA_TXD0_P IFPA_TXD0_N

IFPA_TXD2_P

IFPA_TXD1_P IFPA_TXD1_N

IFPA_TXD3_P

IFPA_TXD2_N

IFPB_TXC_P IFPB_TXC_N

IFPB_TXD5_P

IFPB_TXD4_P IFPB_TXD4_N

IFPB_TXD6_P

IFPB_TXD5_N

IFPB_TXD6_N IFPB_TXD7_P IFPB_TXD7_N

DDC_DATA3

DDC_CLK3

IFPAB_RSET

IFPAB_VPROBE

TV_DAC_RSET

RGMII_RXD0

RGMII_INTR/GPIO_35

RGMII_RXD3

RGMII_RXCTL/MII_RXDV

RGMII_RXC/MII_RXCLK

RGMII_RXD2

RGMII_RXD1

MII_RESET#

RGMII_MDC

RGMII_PWRDWN/GPIO_37

MII_RXER/GPIO_36 MII_COL/GPIO_20/MSMB_DATA MII_CRS/GPIO_21/MSMB_CLK

TV_DAC_BLUE

TV_DAC_HSYNC/GPIO_44 TV_DAC_VSYNC/GPIO_45

+V_DUAL_RMGT1

MII_VREF

RGMII_TXCTL/MII_TXEN

RGMII_TXC/MII_TXCLK

RGMII_TXD3

RGMII_TXD2

RGMII_TXD1

RGMII_TXD0

+3.3V_DUAL_RMGT1 +3.3V_DUAL_RMGT2

IFPA_TXD3_N

LAN

DACS

FLAT PANEL

BI

OUT

OUT OUT

OUT OUT OUT

OUT

OUT OUT OUT OUT OUT

OUT OUT

OUT OUT OUT

OUT

OUT OUT OUT OUT OUT

OUT

BI

OUT

BI

OUT

OUT OUT

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

=MCP_HDMI_DDC_CLK

Comp / Pb

131 mA (A01)

MCP79 requires a S5 pull-up.

feature via software. This

MII, RGMII products will enable

Network Interface Select

Interface

RGMII

MII 0

1

83 mA (A01)

TV DAC Disable:

NOTE: All Apple products set strap to

Y / Y

ENET_TXD<0>

DDC_CLK0/DDC_DATA0 pull-ups still required.

Okay to float XTALIN_TV and XTALOUT_TV.

95 mA (A01)

8 mA

BY DEFAULT, PULL DOWN(1K OR SRONGER) MUST BE USED

(~10K TO 3.3V). TO ENSURE PINS ARE LOW

IN MCP79 THESE PINS HAVE UNDOCUMENTED PULL HIGH

level-shifters.

=MCP_HDMI_DDC_DATA =MCP_HDMI_HPD

DP_IG_DDC_CLK

TV / Component

Okay to float all TV_DAC signals.

avoids a leakage issue since

103 mA

206 mA (A01)

RGB ONLY

C / Pr

8 mA

16 mA (A01)

DP_IG_HPD

190 mA (A01, 1.8V)

TMDS_IG_TXC_P/N

GPIO 57-59 ( IF LCD PANEL IS USED):

WF: IFP is capable of LVDS (1.8V) or TMDS (3.3V), need aliases

DP_IG_AUX_CH_P/N

=MCP_HDMI_TXD_P/N<2>

DP_IG_ML_P/N<0>

DP_IG_ML_P/N<1>

DP_IG_ML_P/N<2>

DP_IG_ML_P/N<3>

=MCP_HDMI_TXD_P/N<1>

=MCP_HDMI_TXD_P/N<0>

=MCP_HDMI_TXC_P/N

MCP Signal

DisplayPort

5 mA (A01)

TMDS/HDMI

DP_IG_AUX_CH_P/N

DP_IG_DDC_DATA

be used to provide HDMI or dual-channel TMDS without

NOTE: HDMI port requires level-shifting. IFP interface can

NOTE: 20K pull-down required on DP_HOTPLUG_DET.

NOTE: 1M pull-down required on DP_IG_CA_DET if DP not used.

TP_DP_IG_AUX_CHP/N

TMDS_IG_HPD

TMDS_IG_DDC_DATA

TMDS_IG_DDC_CLK

TMDS_IG_TXD_P/N<2>

TMDS_IG_TXD_P/N<1>

TMDS_IG_TXD_P/N<0>

Interface Mode

24

73 32

73 33

32

73 32

66

67

9

67

71 25

71 68

49.9

1/16W

402

1%

MF-LF

R1810

1

2

49.9

1%

402

1/16W MF-LF

R1811

1

2

67

26

9

BGA

MCP79-TOPO-B

(6 OF 11)

OMIT

U1400

E23

B31

C30

D31

A31

B30

E31

C43

D43

E16

B15

J31

E35

D35

F35

G35

G33

F33

H33

J33

J30

C31 F31

C35

B35

A32

B32

C32

D32

C33

D33

C34

B34

E32

G31

K31

L31

H29

J29

K29

L29

K30

L30

M30

N30

G39

E37 F40

B26

B27

C27

B22

J23

F23

E28

J24

K24

T23

U23

V23

M29

M28

J32

K32

T25

M27 M26

B40

A39

A40

B39

C39

B38

A41

J22

D21

C21

G23

A23

C22

C23

B23

E24 A24

D24 C26

B24

C24 C25

D25

C36

B36

D36

A36

E36 A35

C37

C38

D38

1/16W MF-LF

5%

402

10K

R1850

1

2

43

7

47K

5%

1/16W

402

MF-LF

R1820

1

2

1/16W

402

MF-LF

5%

100K

R1861

12

73 32

100K

5%

MF-LF

402

1/16W

R1860

12

71

9

71

9

71 66

7

71 66

7

71 66

7

73 32

71 66

7

71 66

7

71 66

7

71

9

71

9

71

9

71

9

71

9

71

9

71

9

73 32

71

9

71

9

71

9

71

9

71

9

66

7

66

7

67

71 25

73 32

71 25

73 32

051-8089

SYNC_DATE=08/17/2008

MCP Ethernet & Graphics

02

18

109

SYNC_MASTER=K36B_MLB

ENET_TXD<3>

ENET_TXD<2>

ENET_CLK125M_RXCLK

NO_TEST=TRUE

NC_MCP_RGB_VSYNC

NC_MCP_RGB_BLUE

NO_TEST=TRUE

NC_MCP_RGB_RED

NO_TEST=TRUE

ENET_TXD<0>

=PP3V3_S5_MCP_GPIO

LPCPLUS_GPIO DP_IG_CA_DET

MCP_CLK27M_XTALIN MCP_CLK27M_XTALOUT

MCP_HDMI_TXD_P<1>

ENET_RXD<1>

LVDS_IG_PANEL_PWR

MCP_HDMI_TXC_P MCP_HDMI_TXC_N

MCP_HDMI_TXD_P<0>

MCP_HDMI_TXD_N<1>

TP_DP_IG_AUX_CHN

TP_DP_IG_AUX_CHP

MCP_HDMI_TXD_N<2>

MCP_HDMI_TXD_P<2>

=PP3V3_ENET_MCP_RMGT

CRT_IG_B_COMP_PB

CRT_IG_G_Y_Y

CRT_IG_R_C_PR

CRT_IG_VSYNC

LVDS_IG_A_CLK_P LVDS_IG_A_CLK_N

DP_HOTPLUG_DET MCP_HDMI_HPD

=PP3V3R1V8_S0_MCP_IFP_VDD

=PP1V05_S0_MCP_HDMI_VDD

PP3V3_S0_MCP_VPLL

=MCP_HDMI_DDC_DATA

LVDS_IG_B_DATA_N<0>

LVDS_IG_DDC_DATA

=MCP_HDMI_DDC_CLK

LVDS_IG_DDC_CLK

LVDS_IG_B_DATA_N<3>

MCP_IFPAB_RSET

CRT_IG_HSYNC

LVDS_IG_A_DATA_P<1> LVDS_IG_A_DATA_N<1>

=PP3V3_S0_MCP_GPIO

LVDS_IG_A_DATA_N<3>

=PP3V3_ENET_MCP_RMGT

MCP_MII_VREF

ENET_RXD<0>

MCP_IFPAB_VPROBE

LVDS_IG_B_DATA_P<3>

LVDS_IG_B_DATA_N<2>

LVDS_IG_B_DATA_N<1> LVDS_IG_B_DATA_P<2>

LVDS_IG_B_DATA_P<0>

LVDS_IG_B_DATA_P<1>

LVDS_IG_B_CLK_N

LVDS_IG_B_CLK_P

LVDS_IG_A_DATA_N<2> LVDS_IG_A_DATA_P<3>

LVDS_IG_A_DATA_P<2>

LVDS_IG_A_DATA_N<0>

LVDS_IG_A_DATA_P<0>

MCP_HDMI_VPROBE

MCP_HDMI_RSET

MCP_HDMI_TXD_N<0>

LVDS_IG_BKL_PWM LVDS_IG_BKL_ON

=PP1V05_ENET_MCP_RMGT

PP1V05_ENET_MCP_PLL_MAC

MCP_TV_DAC_VREF

MCP_TV_DAC_RSET

TP_ENET_INTR_L

MCP_MII_COL

MCP_MII_RXER

ENET_RXD<2> ENET_RXD<3>

ENET_RX_CTRL

MCP_MII_CRS

TP_MCP_RGB_DAC_VREF

PP3V3_S0_MCP_DAC

ENET_RESET_L

MCP_CLK25M_BUF0_R

ENET_TX_CTRL

ENET_CLK125M_TXCLK

ENET_TXD<1>

TP_ENET_PWRDWN_L

ENET_MDIO

ENET_MDC

MCP_DDC_DATA0

MCP_DDC_CLK0

MCP_MII_COMP_GND

MCP_MII_COMP_VDD

NO_TEST=TRUE

NC_MCP_RGB_DAC_RSET

NC_MCP_RGB_GREEN

NO_TEST=TRUE

NC_MCP_RGB_HSYNC

8

20

8

18 24

8

25

8

25

8

19 21

8

18 24

8

24

25

73

OUT

BI BI BI BI

LPC PCIGND

PCI_INTW# PCI_INTX# PCI_INTY# PCI_INTZ#

GND65

LPC_DRQ1#/GPIO_19

LPC_PWRDWN#/GPIO_54/EXT_NMI#

PCI_TRDY#

LPC_DRQ0# LPC_SERIRQ

PCI_AD4

PCI_AD0

PCI_AD3

PCI_AD2

PCI_AD1

PCI_AD5 PCI_AD6

PCI_AD9

PCI_AD8

PCI_AD7

PCI_AD10 PCI_AD11

PCI_AD14

PCI_AD13

PCI_AD12

PCI_AD15 PCI_AD16 PCI_AD17

PCI_AD20

PCI_AD19

PCI_AD18

PCI_AD21 PCI_AD22

PCI_AD25

PCI_AD23

PCI_AD26

PCI_AD29

PCI_AD31

GND66 GND67

GND69

GND68

GND70 GND71 GND72

GND74

GND73

GND75 GND76 GND77

GND79

GND78

GND80 GND81

GND84

GND83

GND82

GND85 GND86 GND87

GND89

GND88

GND90 GND91 GND92

GND94

GND93

GND95 GND96 GND97

PCI_GNT0#

PCI_CBE2#

PCI_CBE0#

PCI_CBE3#

PCI_IRDY#

PCI_FRAME#

PCI_DEVSEL#

PCI_PAR

PCI_SERR# PCI_STOP#

PCI_RESET0# PCI_RESET1#

PCI_CLK2

PCI_CLK1

PCI_CLK0

PCI_CLKIN

LPC_FRAME#

LPC_AD1

LPC_AD0

LPC_RESET0#

LPC_CLK0

LPC_AD3

LPC_AD2

GND99

GND98

GND100

GND102

GND101

GND104

GND103

GND105 GND106 GND107

GND109

GND108

GND110 GND111 GND112

GND115

GND114

GND113

GND116 GND117

GND120

GND119

GND118

GND121 GND122 GND123

GND125

GND124

GND126 GND127 GND128

GND130

GND129

PCI_AD30

PCI_AD27

PCI_AD24

PCI_CLKRUN#/GPIO_42

PCI_AD28

PCI_GNT2#/GPIO_41/RS232_DTR# PCI_GNT3#/GPIO_39/RS232_RTS#

PCI_GNT4#/GPIO_53/RS232_SOUT#

PCI_GNT1#/FANCTL2

PCI_CBE1#

PCI_PERR#/GPIO_43/RS232_DCD#

PCI_REQ3#/GPIO_38/RS232_CTS# PCI_REQ4#/GPIO_52/RS232_SIN#

PCI_PME#/GPIO_30

PCI_REQ2#/GPIO_40/RS232_DSR#

PCI_REQ0# PCI_REQ1#/FANRPM2

IN

BI

OUT

IN

OUT

BI BI BI BI BI BI BI BI

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

Strap for Boot ROM Selection (See HDA_SDOUT)

Int PU Int PU

Int PU (S5)

Int PU

72 43 41

7

72 26

72 43 41

7

72 43 41

7

72 43 41

7

72 43 41

7

OMIT

MCP79-TOPO-B

BGA

(7 OF 11)

U1400

AB18 H34

AB20 AB21

AB23

AB24 AB25

AB26

AB27 AB28

AB34

AB37 AB4

AB40 AC22

AC36

AC40 AB33

AC5

AD16 AD17

AD18

AD19 AD20

AD24 AD25

AD26

AD27 AD28

AD33

AD34

U24

U26

U39

U4

U8 V16

V17

V18 V20

V22

V24 V26

V27

V28 V33

V37

V4

V40

V7 W20

W22

W24 W36

W40

W43 Y16

Y17 Y18

Y19

Y20 Y22

Y24

Y25

Y26

Y27

AD3 AD2

AD1 AD5

AE9

AE1

AE2

AD4 AE12

AE5

AE6

AC3

AE10

AC9

AC10 AC11

AA1

AA5

Y5

W3

W6

W4

W7

AC4

V3

W8

V2

W9

U3

W11

U2

U5

U1

U6

AE11

T5

U7

AB3

AC6

AB2 AC7

AC8 AA2

AA3 AA6

AA11

W10

R6 R7

R8

R9

AD11

AA9

Y4

R3

U10 R4

U11 P3

P2

N3

N2

N1

AA10

Y1 AB9

T1

T2

V9

T3

U9

T4

R10

R11

AA7

Y2

Y3

43 41

7

43 41

7

72 26

43 41

7

22

5% 1/16W

402

MF-LF

PLACEMENT_NOTE=Place close to pin R8

R1910

1

2

402

5%

MF-LF1/16W

8.2K

R1989

1 2

402

MF-LF1/16W

5%

8.2K

R1991

1 2

5%

1/16W MF-LF

402

8.2K

R1990

1 2

8.2K

5%

MF-LF

402

1/16W

R1994

1 2

402

MF-LF1/16W

5%

8.2K

R1992

1 2

19

9

402

MF-LF

1/16W

5%

10K

R1961

1

2

22

5%

402

MF-LF1/16W

R1960

1 2

0

5%

1/16W MF-LF

402

R1950

1 2

0

1/16W5%MF-LF

402

R1951

1 2

0

5%

1/16W MF-LF

402

R1952

1 2

0

402

MF-LF1/16W

5%

R1953

1 2

26

35

19

9

19

13

7

72 13

7

72 13

7

72 13

7

72 13

7

72 13

7

72 13

7

72 13

7

72 13

7

109

19

SYNC_DATE=08/17/2008SYNC_MASTER=K36B_MLB

02

MCP PCI & LPC

051-8089

LPC_PWRDWN_L

LPC_RESET_L

LPC_AD_R<0>

LPC_FRAME_R_L

LPC_CLK33M_SMC_R

LPC_AD<3>

LPC_AD<2>

LPC_AD<1>

LPC_AD<0>

GMUX_JTAG_TDI

TP_PCI_C_BE_L<2> TP_PCI_C_BE_L<3>

TP_PCI_FRAME_L TP_PCI_IRDY_L TP_PCI_PAR TP_PCI_PERR_L TP_PCI_SERR_L TP_PCI_STOP_L

TP_PCI_RESET1_L

FW_PME_L

TP_PCI_AD<16>

TP_PCI_AD<15>

TP_PCI_AD<13>

TP_PCI_AD<12>

TP_PCI_AD<10>

TP_PCI_DEVSEL_L

TP_PCI_CLK1

TP_PCI_CLK0

MEM_VTT_EN_R

PM_LATRIGGER_L

PCI_REQ0_L

TP_PCI_C_BE_L<1>

TP_PCI_AD<11>

TP_PCI_AD<19>

GMUX_JTAG_TMS

PCI_REQ0_L PCI_REQ1_L CRTMUX_SEL_TV_L

MCP_RS232_SIN_L

MCP_DEBUG<1>

MCP_DEBUG<4>

TP_PCI_INTW_L

TP_PCI_AD<17> TP_PCI_AD<18>

PCI_REQ1_L

MCP_RS232_SIN_L

MCP_RS232_SOUT_L

PCI_CLK33M_MCP

LPC_AD_R<1> LPC_AD_R<2> LPC_AD_R<3>

TP_PCI_AD<14>

TP_PCI_AD<22> TP_PCI_AD<23>

TP_PCI_AD<27>

TP_PCI_AD<29> TP_PCI_AD<30> TP_PCI_AD<31>

PCI_CLK33M_MCP_R

TP_PCI_AD<20> TP_PCI_AD<21>

TP_PCI_AD<28>

LPC_SERIRQ

TP_LPC_DRQ0_L

TP_PCI_TRDY_L

TP_PCI_INTZ_L

TP_PCI_INTX_L TP_PCI_INTY_L

PM_CLKRUN_L

TP_PCI_AD<26>

TP_PCI_AD<25>

TP_PCI_AD<24>

AUD_IPHS_SWITCH_EN

TP_PCI_C_BE_L<0>

MCP_RS232_SOUT_L

TP_PCI_GNT1_L

TP_PCI_GNT0_L

MCP_DEBUG<0>

MCP_DEBUG<3>

MCP_DEBUG<5> MCP_DEBUG<6> MCP_DEBUG<7> TP_PCI_AD<8> TP_PCI_AD<9>

MCP_DEBUG<2>

CRTMUX_SEL_TV_L

=PP3V3_S0_MCP_GPIO

LPC_FRAME_L

19 72

19

72

19

8

18 21

BI BI

IN IN IN IN

SATA_B0_RX_N

SATA_A0_RX_P

SATA_A1_TX_P

GND160

GND158 GND159

GND157

GND156

GND155

GND153 GND154

GND152

GND151

GND150

GND148 GND149

GND147

GND146

GND145

GND143 GND144

GND142

GND141

GND140

GND139

GND136

GND133 GND134

GND132

GND131

USB_RBIAS_GND

USB11_N

USB11_P

USB10_N

USB10_P

USB9_N

USB9_P

USB7_N

USB8_N

USB8_P

USB7_P

USB6_N

USB6_P

USB5_N

USB4_N

USB4_P

USB5_P

USB2_N

USB2_P

USB0_N

USB1_N

USB1_P

USB0_P

SATA_TERMP

SATA_LED#

SATA_C1_RX_N SATA_C1_RX_P

SATA_C0_TX_P

SATA_B1_RX_N SATA_B1_RX_P

SATA_B1_TX_N

SATA_B1_TX_P

SATA_B0_TX_N

SATA_B0_RX_P

SATA_B0_TX_P

SATA_A1_RX_N SATA_A1_RX_P

SATA_A1_TX_N

SATA_A0_TX_P

GND138

GND137

GND135

USB3_P USB3_N

USB_OC0#/GPIO_25

USB_OC1#/GPIO_26 USB_OC2#/GPIO_27/MGPIO USB_OC3#/GPIO_28/MGPIO

SATA_A0_RX_N

SATA_A0_TX_N

SATA_C1_TX_N

SATA_C1_TX_P

SATA_C0_RX_P

SATA_C0_RX_N

SATA_C0_TX_N

+V_PLL_USB

+V_PLL_SATA

+DVDD0_SATA1 +DVDD0_SATA2 +DVDD0_SATA3 +DVDD0_SATA4

+DVDD1_SATA2

+AVDD0_SATA1 +AVDD0_SATA2 +AVDD0_SATA3 +AVDD0_SATA4 +AVDD0_SATA5 +AVDD0_SATA6 +AVDD0_SATA7 +AVDD0_SATA8 +AVDD0_SATA9

+AVDD1_SATA1 +AVDD1_SATA2 +AVDD1_SATA3 +AVDD1_SATA4

+DVDD1_SATA1

SATA

USB

OUT OUT

IN

OUT OUT

IN IN

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

127 mA (A01)

External C

ExpressCard

Bluetooth

IR

Camera

External D

AirPort (PCIe Mini-Card)

External A

External B

19 mA (A01)

84 mA (A01)

43 mA (A01)

Geyser Trackpad/Keyboard

72 39

72

9

72

9

72

9

72

9

72 66

72 40

72

9

72

9

72

9

72

9

72 39

72

9

72

9

72

9

72

9

39

42

2.49K

MF-LF

1% 1/16W

402

R2010

1

2

1/16W

402

1%

MF-LF

806

R2060

1

2

8.2K

402

1/16W

5%

MF-LF

R2053

1

2

8.2K

5% 1/16W MF-LF

402

R2052

1

2

1/16W MF-LF

5%

8.2K

402

R2051

1

2

OMIT

(8 OF 11)

BGA

MCP79-TOPO-B

U1400

AD35

AD37 AD38

AE22

AE24 AE39

AE4

AD6 AF16

AF17 AF18

AF20

AF22 AF26

AF27

AF28 AF33

AF34

AF37 AF40

AG18 AG20

AG22

AG26 AG36

AG40

AH18 AH20

AH22

AH24

AJ12

AN11 AK12

AK13

AL12 AM11

AM12 AN12

AL13

AN14

AL14

AM13 AM14

AF19 AG16

AG17

AG19

AH17 AH19

AE16

L28

AJ5

AJ4

AJ6

AJ7

AJ9 AK9

AJ10

AJ11

AJ2 AJ1

AJ3

AK2

AL4 AK3

AL3

AM4

AM2 AM3

AM1

AN1

AN3

AN2

AP2

AP3

E12

AE3

D29

C29

G25

F25

L23

K23

D28

C28

B28

A28

G29

F29

L27

K27

J27

J26

G27

F27

E27

D27

L25

K25

J25

H25

L21

K21 J21

H21

A27

71 38

8.2K

1/16W MF-LF

402

5%

R2050

1

2

051-8089

MCP SATA & USB

SYNC_MASTER=K36B_MLB SYNC_DATE=08/17/2008

109

20

02

SATA_ODD_D2R_P

TP_SATA_F_R2D_CP TP_SATA_F_R2D_CN

TP_SATA_F_D2RN

TP_MCP_SATALED_L

TP_SATA_F_D2RP

USB_EXTC_OC_L

=PP1V05_S0_MCP_SATA_DVDD1

PP3V3_S0_MCP_PLL_USB

PP1V05_S0_MCP_PLL_SATA

=PP1V05_S0_MCP_SATA_DVDD0

SATA_ODD_D2R_N

USB_EXCARD_P

USB_TPAD_P

MCP_SATA_TERMP

MCP_USB_RBIAS_GND

USB_EXTD_P

USB_IR_P USB_IR_N

USB_EXTA_P USB_EXTA_N

SATA_ODD_R2D_C_P

SATA_HDD_D2R_P

SATA_HDD_D2R_N

SATA_ODD_R2D_C_N

USB_EXTD_N

SATA_HDD_R2D_C_P

USB_CAMERA_N

USB_CAMERA_P

USB_MINI_N

USB_MINI_P

TP_SATA_E_R2D_CP

SATA_HDD_R2D_C_N

TP_SATA_E_D2RN

TP_SATA_E_R2D_CN

TP_USB_11N

TP_SATA_D_D2RP

TP_SATA_D_D2RN

TP_SATA_D_R2D_CN

TP_SATA_D_R2D_CP

TP_SATA_C_D2RP

TP_SATA_C_D2RN

TP_SATA_C_R2D_CN

TP_SATA_C_R2D_CP

USB_TPAD_N

USB_EXCARD_N

USB_EXTB_P

USB_BT_P USB_BT_N

USB_EXTB_N

USB_EXTC_P

TP_USB_10N

TP_USB_10P

USB_EXTC_N

=PP1V05_S0_MCP_SATA_AVDD1

=PP1V05_S0_MCP_SATA_AVDD0

TP_SATA_E_D2RP

=PP3V3_S5_MCP_GPIO

TP_USB_11P

USB_EXTA_OC_L USB_EXTB_OC_L

EXCARD_OC_L

8

24

8

71

72

8

18

OUT

BI

OUT

OUT OUT

OUT

IN

OUT

IN

OUT

IN IN

OUT

IN

OUT

HDA_SDATA_IN2_GPIO_3/PS2_KB_DATA

SLP_S3*

HDA_DOCK_EN*_GPIO_4/PS2_MS_CLK

SLP_RMGT*

HDA_BITCLK

HDA_SDATA_OUT

THERM_DIODE_N

THERM_DIODE_P

HDA_RESET*

HDA_PULLDN_COMP

HDA_SDATA_IN1_GPIO_2/PS2_KB_CLK

MCP_VID2/GPIO_15

MCP_VID1/GPIO_14

MCP_VID0/GPIO_13

EXT_SMI/GPIO_32*

FANCTL1/GPIO_62

FANRPM1/GPIO_63

FANCTL0/GPIO_61

FANRPM0/GPIO_60

SIO_PME*

KBRDRSTIN*

PKG_TEST

TEST_MODE_EN

BUF_SIO_CLK

CPUVDD_EN

SMB_DATA0

SMB_CLK0

SPKR

HDA_SYNC

XTALIN_RTC

XTALOUT

XTALOUT_RTC

JTAG_TRST*

XTALIN

JTAG_TCK

JTAG_TMS

CPU_VLD

JTAG_TDI JTAG_TDO

RTC_RST*

PS_PWRGD

PWRGD_SB

INTRUDER*

LID* LLB*

PWRBTN* RSTBTN*

CPU_DPRSLPVR

SLP_S5*

HDA_SDATA_IN0

SMB_CLK1/MSMB_CLK

SMB_DATA1/MSMB_DATA

SMB_ALERT*/GPIO_64

SPI_CS0/GPIO_10 SPI_CLK/GPIO_11

SPI_DI/GPIO_8 SPI_DO/GPIO_9

SUS_CLK/GPIO_34

+V_DUAL_HDA1 +V_DUAL_HDA2

HDA_DOCK_RST*_GPIO_5/PS2_MS_DATA

GPIO_1/PWRDN_OK/SPI_CS1

A20GATE

GPIO_12_SUS_STAT_ACCLMTR_EXT_TRIG_L

+V_PLL_SP_SPREF

+V_PLL_NV_H

MISC

HDA

OUT

IN

OUT

IN

OUT

IN

IN IN

IN

OUT

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

Int PU (S5)

Int PU

37 mA (A01)

17 mA

PCI

not use LPC for BootROM override.

LPC_FRAME# high for SPI1 ROM override.

SPI0 = SPI_CS0_L, SPI1 = SPI_CS1_L

Int PU

25 MHz

42 MHz 0

SPI1 option.

NOTE: MCP79 rev A01 does not support

LPC ROMs. So Apple designs will

0

1

HDA_SYNC

24 MHz

0

1

0

SPI_CLKSPI_DO

0

1

14.31818 MHz

BUF_SIO_CLK Frequency

Frequency

31 MHz

NOTE: Straps not provided on this page.

1 MHz

SPI Frequency Select

Frequency

NOTE: MCP79 does not support FWH, only

LPC

SPI0

SPI1

BIOS Boot Select

R1961 and R2160 selects SPI0 ROM by default, LPC+ debug card pulls

1

0

1

0

1

Int PU

Int PD

20 mA

Int PU (S5)

Int PU

Int PU (S5)

7 mA (A01)

HDA Output Caps

For EMI Reduction on HDA interface

Int PU (S5)

Int PD

I/F

HDA_SDOUT

LPC_FRAME#

72 43

64 41 36 33

64 42 41

72 44 13

7

72 44

72 44 13

7

72 44

61 21

47

21

61 21

33 31 21

47

9

69 60

41

72 52

MF-LF

1/16W

402

49.9K

1%

R2121

1

2

402

MF-LF

49.9K

1%

1/16W

R2120

1

2

402

MF-LF

1/16W

1K

1%

R2190

1

2

72 26

41

22

5%

402

1/16W MF-LF

R2170

1 2

22

402

1/16W

5%

MF-LF

R2171

1 2

1/16W MF-LF

5%

402

22

R2173

1 2

1/16W

5%

402

10K

MF-LF

R2163

1

2

402

MF-LF

8.2K

1/16W

5%

R2160

1

2

5%

10K

MF-LF

BOOT_MODE_SAFE

402

1/16W

R2180

1

2

1/16W

BOOT_MODE_USER

MF-LF 402

10K

5%

R2181

1

2

MF-LF

1/16W

22

5%

402

R2172

1 2

43

402

1%

MF-LF

1/16W

49.9

R2110

1

2

MF-LF

402

5%

1/16W

10K

R2150

1

2

13

7 6

13

7 6

13

7 6

13

7 6

6

CERM 402

5% 50V

10PF

C2171

1

2

CERM 402

5%

10PF

50V

C2173

1

2

CERM

402

5%

10PF

50V

C2170

1

2

CERM

402

5%

10PF

50V

C2172

1

2

OMIT

MCP79-TOPO-B

(9 OF 11)

BGA

U1400

K13

AE7

M22

C17 D17

C18

A12

C12

B12

D12

L26

L24

E15

K17

L17

A15

K15

G15

J14

J15

F15

L15

B20

G19

E19 F19

J19

J18

L13

M25

M24

L20

M20

M21

J16

K16

AE18

AE17

L22

E20

C16

D20

D16

C20

C19

J17

G17

H17

M23

L19

G21

K19

F21

D13

C14

C15

B14

C13

B18

K22

C11

B11

A16

A19

B16

B19

38

21

26 26

42 41 36 33

41 29 28 21

100K

5%

MF-LF

1/16W

402

R2147

1

2

100K

MF-LF

1/16W

402

5%

R2146

1

2

MF-LF

1/16W

10K

5%

402

R2142

1

2

402

MF-LF

1/16W

5%

10K

R2141

1

2

10K

402

1/16W MF-LF

5%

R2140

1

2

MF-LF 402

1/16W

5%

22K

R2157

1

2

402

1/16W MF-LF

5%

22K

R2156

1

2

402

1/16W MF-LF

5%

22K

R2155

1

2

402

5%

MF-LF

1/16W

100K

R2122

1

2

5%

1/16W

10K

402

MF-LF

R2159

1

2

10K

402

1/16W MF-LF

5%

R2143

1

2

26

41

26

43

72 43

SYNC_DATE=08/17/2008SYNC_MASTER=K36B_MLB

21

109

02

MCP HDA & MISC

051-8089

HDA_SDOUT

HDA_SYNC_R

TP_MCP_BUF_SIO_CLK

AUD_I2C_INT_L

HDA_RST_R_L

SPI_CS0_R_L

ARB_DETECT

SMC_IG_THROTTLE_L

ODD_PWR_EN_L

MEM_EVENT_L

MCP_CPUVDD_EN

SMBUS_MCP_1_DATA

SPI_CLK_R

HDA_BIT_CLK_R

MCP_CLK25M_XTALIN

JTAG_MCP_TCK

SM_INTRUDER_L

PM_DPRSLPVR

SMC_ADAPTER_EN

TP_MCP_KBDRSTIN_L

TP_SB_A20GATE

SMC_WAKE_SCI_L

TP_MCP_LID_L PM_BATLOW_L

PM_PWRBTN_L

MCP_HDA_PULLDN_COMP

SMC_RUNTIME_SCI_L

PP1V05_S0_MCP_PLL_NV

=PP3V3_S0_MCP

HDA_SYNC

HDA_RST_L

HDA_BIT_CLK

PP3V3_G3_RTC

=PP3V3R1V5_S0_MCP_HDA

MCP_VID<2>

MCP_VID<1>

MCP_VID<0>

TP_MLB_RAM_SIZE

TP_MLB_RAM_VENDOR

PM_SYSRST_DEBOUNCE_L

HDA_SDIN0

HDA_SYNC_R

HDA_SDOUT_R

HDA_RST_R_L

PM_CLK32K_SUSCLK_R

SPI_MOSI_R

SPI_MISO

PM_SLP_S4_L

HDA_SDOUT_R

=PP3V3R1V5_S0_MCP_HDA

MCP_TEST_MODE_EN

MCP_CLK25M_XTALOUT

RTC_CLK32K_XTALIN

HDA_BIT_CLK_R

JTAG_MCP_TRST_L

=PP3V3_S3_FET

RTC_CLK32K_XTALOUT

PM_RSMRST_L

JTAG_MCP_TDI

JTAG_MCP_TMS

JTAG_MCP_TDO

MCP_CPU_VLD

MCP_PS_PWRGD

RTC_RST_L

AP_PWR_EN

MEM_EVENT_L

AP_PWR_EN

SMBUS_MCP_1_CLK

SMBUS_MCP_0_DATA

SMBUS_MCP_0_CLK

MCP_SPKR

MCP_VID<2>

MCP_VID<1>

MCP_VID<0>

MCP_THMDIODE_N

MCP_THMDIODE_P

PM_SLP_S3_L

MCP_GPIO_4 AUD_I2C_INT_L

SMC_IG_THROTTLE_L

ARB_DETECT

MCP_GPIO_4

=PP3V3_S0_MCP_GPIO

PM_SLP_RMGT_L

=SPI_CS1_R_L_USE_MLB

21 72

21

21 72

21

21 42

21 72

72

24

8

22 24

22 26

8

21 24

21 61

21 72

8

21 24

21 72

8

65

21 31 33

21 28 29 41

9

21 42

21

8

18 19

GND

GND161

GND165 GND166

GND164

GND163

GND162

GND167 GND168

GND171

GND170

GND169

GND172 GND173

GND176

GND175

GND174

GND177 GND178

GND181

GND180

GND179

GND182 GND183 GND184

GND187

GND186

GND185

GND188 GND189

GND192

GND191

GND190

GND193 GND194

GND197

GND196

GND195

GND198

GND202

GND201

GND200

GND199

GND203

GND206 GND207

GND205

GND204

GND208

GND212

GND211

GND210

GND209

GND213 GND214

GND217

GND216

GND215

GND218 GND219

GND222

GND221

GND220

GND223 GND224 GND225

GND228

GND227

GND226

GND229 GND230

GND233

GND232

GND231

GND234 GND235

GND238

GND237

GND236

GND239 GND240

GND243

GND242

GND241

GND244

GND248

GND247

GND246

GND245

GND249

GND252

GND251

GND250 GND342

GND341

GND343

GND340

GND339

GND338

GND337

GND336

GND335

GND334

GND333

GND331 GND332

GND330

GND329

GND328

GND326 GND327

GND325

GND324

GND323

GND321 GND322

GND320

GND319

GND318

GND316 GND317

GND315

GND314

GND313

GND311

GND310

GND312

GND309

GND308

GND305 GND306 GND307

GND304

GND303

GND301

GND300

GND302

GND299

GND298

GND296

GND295

GND297

GND294

GND293

GND292

GND291

GND290

GND289

GND288

GND287

GND285 GND286

GND284

GND283

GND282

GND280 GND281

GND279

GND278

GND277

GND275 GND276

GND274

GND273

GND272

GND270

GND269

GND271

GND268

GND267

GND264 GND265 GND266

GND263

GND262

GND259 GND260 GND261

GND258

GND257

GND255

GND254

GND256

GND253

+VTT_CPUCLK

+VDD_CORE42

+3.3V_DUAL_USB2

+VTT_CPU17

+VTT_CPU16

+VTT_CPU15

+VTT_CPU14

+VTT_CPU13

+VTT_CPU12

+VTT_CPU11

+VTT_CPU10

+VTT_CPU1

+VDD_CORE7

+VDD_CORE1 +VDD_CORE2 +VDD_CORE3 +VDD_CORE4 +VDD_CORE5 +VDD_CORE6

+VDD_CORE13 +VDD_CORE14 +VDD_CORE15 +VDD_CORE16 +VDD_CORE17 +VDD_CORE18 +VDD_CORE19

+VDD_CORE21 +VDD_CORE22 +VDD_CORE23 +VDD_CORE24 +VDD_CORE25 +VDD_CORE26 +VDD_CORE27 +VDD_CORE28 +VDD_CORE29 +VDD_CORE30

+VDD_CORE32 +VDD_CORE33 +VDD_CORE34 +VDD_CORE35 +VDD_CORE36 +VDD_CORE37

+VDD_CORE39 +VDD_CORE40 +VDD_CORE41

+VDD_CORE47 +VDD_CORE48 +VDD_CORE49 +VDD_CORE50 +VDD_CORE51 +VDD_CORE52 +VDD_CORE53 +VDD_CORE54

+VTT_CPU51

+VTT_CPU50

+VTT_CPU47

+VTT_CPU46

+VTT_CPU45

+VTT_CPU43

+VTT_CPU42

+VTT_CPU41

+VTT_CPU40

+VTT_CPU39

+VTT_CPU38

+VTT_CPU37

+VTT_CPU36

+VTT_CPU35

+VTT_CPU34

+VTT_CPU32

+VTT_CPU31

+VTT_CPU30

+VTT_CPU29

+VTT_CPU28

+VTT_CPU26

+VTT_CPU25

+VTT_CPU24

+VTT_CPU23

+VTT_CPU22

+VTT_CPU21

+VTT_CPU20

+VTT_CPU19

+VTT_CPU18

+VTT_CPU9

+VTT_CPU8

+VTT_CPU7

+VTT_CPU6

+VTT_CPU5

+VTT_CPU4

+VTT_CPU3

+VDD_CORE38

+VTT_CPU33

+VTT_CPU27

+VDD_CORE55 +VDD_CORE56 +VDD_CORE57 +VDD_CORE58 +VDD_CORE59 +VDD_CORE60 +VDD_CORE61 +VDD_CORE62 +VDD_CORE63 +VDD_CORE64 +VDD_CORE65 +VDD_CORE66 +VDD_CORE67 +VDD_CORE68 +VDD_CORE69 +VDD_CORE70 +VDD_CORE71 +VDD_CORE72 +VDD_CORE73 +VDD_CORE74 +VDD_CORE75 +VDD_CORE76 +VDD_CORE77 +VDD_CORE78 +VDD_CORE79 +VDD_CORE80 +VDD_CORE81

+VBAT

+3.3V_1

+3.3V_8

+3.3V_DUAL1 +3.3V_DUAL2 +3.3V_DUAL3 +3.3V_DUAL4

+3.3V_DUAL_USB1

+3.3V_DUAL_USB3 +3.3V_DUAL_USB4

+VDD_AUXC1

+VDD_AUXC3

+VDD_AUXC2

+VDD_CORE43

+VTT_CPU2

+VDD_CORE46

+VDD_CORE45

+VDD_CORE44

+VTT_CPU52

+VDD_CORE31

+VTT_CPU49

+VTT_CPU48

+VTT_CPU44

+3.3V_7

+3.3V_6

+3.3V_5

+3.3V_4

+3.3V_3

+3.3V_2

+VDD_CORE20

+VDD_CORE12

+VDD_CORE11

+VDD_CORE10

+VDD_CORE9

+VDD_CORE8

POWER

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

105 mA (A01)

43 mA

1139 mA

250 mA

16996 mA (A01, 1.0V)

23065 mA (A01, 1.2V)

80 uA (S0)

10 uA (G3)

16 mA

266 mA (A01)

450 mA (A01)

1182 mA (A01)

BGA

MCP79-TOPO-B

(11 OF 11)

OMIT

U1400

AH26 AH33

AH34 AH37

AH38

AJ39

AJ8

AK10

AK33 AK34

AK37

AK4 AK40

AL36 AL40

AL5

AM10 AM16

AM18

AM20 AM22

AM24

AM26 AM30

AM34 AM35

AM37

AM38

AM5

AM6

AM7

AM9

AP26

AN28 AN30

AN39

AN4

Y7

AP10 AU26

AP14

AU14 AP28

AP32

AP34 AP36

AP37

AP4

AP40

AP7 AW23

AR28

AR32 AR40

AT10

AR12 AT13

AT29 AT33

AT6

AT7

AT9

AY21

AY22

L12

AU12

AU28 AP33

AU32 AR30

AU36

AU38

AU4

G28

F20 AV28

AV32

AV36

AV4

AV7 AW11

G20

AR43 AW43

AY10

AV12 AY30

AY33

AY34 AY37

AY38 AY41

AV40 BA1

BA4 AW31

AY6

L35 BC33

BC37

BC41 AY14

BC5

C2 D10

D14 D15

D18

D19 D22

D23

D26 D30

D37

D6 E13

E17 E21

E25

E29 E33

F12

F16 F32

F8

G10 G12

G14 G16

BC12

G22 G24

AW20

G34 G4

G43

G6 G8

H11 H15

AW35

H23 AN8

G40

J12 J8

K10

K12 K18

K26 K37

K4

K40 K8

AU1

L40 L43

L5

M10 M34

M35 M37

Y28

Y33 Y34

Y35

Y37 Y38

AB17

AB16 AN26

AD7 M11

AA4

AB19 AY13

P11

Y6 T11

V11

Y11 AH16

T22

MCP79-TOPO-B

BGA

(10 OF 11)

OMIT

U1400

AD10

AE8 AB10

AD9

Y10 AB11

AA8

Y9

G18

H19

J20 K20

G26 H27

J28

K28

A20

T21

U21

V21

AA25

AA26

AA27

AA28 AC16

AC17 AC18

AC19

AC20 AC21

AA17

AC23

AC24 AC25

AC26

AC27 AC28

AD21 AD23

W27

V25

AA18

U25

AE19

AE21 AE23

AE25

AE26 AE27

AE28 AF10

AF11

AA19

AH12

AF2

AF21

AF23 AF25

AF3

AF4 AF7

AH23

AF9

AA20

AG10

AG11 AG12

AG21

AG23 AG25

AG3

AG4

AA21

AG6 AG7

AG5

AG8

AG9 AH1

AH10

AH11

W26

AH2

AA23

W28

AH25

Y21

AH21

AH3

AH4 AH5

AH6

AH7 AH9

AA24

W21 W23

Y23

W25

AF12

AA16

R32

P31

AF32

AE32 AH32

AJ32 AK31

AK32

AD32 AL31

AB32

AC32

B41 B42

C40

C41 C42

D39 D40

D41

E38 E39

E40

F37

F38 F39

G36

G37 G38

H35 H37

J34

J35

J36

K33

K34

K35 L32

L33

L34 M31

M32 M33

N31

N32

P32 Y32

AA32

T32 U32

V32

W32

AG32

051-8089

MCP Power & Ground

SYNC_MASTER=K36B_MLB SYNC_DATE=08/17/2008

109

02

22

=PP3V3_S5_MCP

=PP1V05_S5_MCP_VDD_AUXC

=PP3V3_S0_MCP

PP3V3_G3_RTC

=PP1V05_S0_MCP_FSB

=PPVCORE_S0_MCP

8

24

8

24

8

21 24

21 26

8

14 24

8

24 46 61

APPLE INC.

NONE

SCALE

REV.

A

D

C

B

A

D

C

B

8 7

6

5

4

3

2 1

8

7 6

5

4

3

2

1

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR AGREES TO THE FOLLOWING

II NOT TO REPRODUCE OR COPY IT

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

NOTICE OF PROPRIETARY PROPERTY

DRAWING NUMBER

SHT

OF

SIZE

D

24

MCP79 A01 Silicon Support

SYNC_MASTER=K36B_MLB

051-8089

109

02

SYNC_DATE=08/17/2008