Apple IMAC G5 MLB PB15 051-6338 RevC Schematic

ANGLES

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

DATE

APPD

ENG

DATE

APPD

CK

ECN

ZONE

REV

DO NOT SCALE DRAWING

X.XXX

X.XX

XX

DIMENSIONS ARE IN MILLIMETERS

THIRD ANGLE PROJECTION

D

SIZE

APPLICABLE

NOTED AS

MATERIAL/FINISH

NONE

SCALE

DESIGNER

MFG APPD

DESIGN CK

RELEASE

QA APPD

ENG APPD

DRAFTER

METRIC

OF

SHT

DRAWING NUMBER

TITLE

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

Apple Computer Inc.

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

DESCRIPTION OF CHANGE

REFERENCE DESIGNATOR(S)

BOM OPTION

TABLE_5_HEAD

QTY

DESCRIPTION

PART#

TABLE_5_ITEM

DRAWING

TABLE_5_ITEM

CPU CORE VOLTAGE POWER SUPPLY

SOUND/LEFT USB/BLUETOOTH, SERIAL DEBUG

TITLE PAGE AND CONTENTS

PCB NOTES AND HOLES

SYSTEM BLOCK DIAGRAM

23

26

INTREPID MEMORY INTERFACE / BOOT ROM

GIGABIT ETHERNET INTERFACE

USB_MODEM

ATI_MEMIO_HI

OPTICAL DRIVE

41

38

External TMDS (DVI Transmitter SIL1162)

M10 AGP INTERFACE & SPREAD SPECTRUM SUPPORT

20

18 19

16

15

14

13

12

400PIN STACKED DDR SODIMM CONNECTOR

INTREPID AGP 4X/PCI

DDR MEMORY MUXES

INTREPID POWER RAILS/1.5V LDO

CARDBUS INTERFACE (PCI1510)

USB 2.0 INTERFACE (uPD720101)

SIGNAL CONSTRAINTS (2 OF 4) - CPU

PAGE

CONTENTS

PAGE

M10 LVDS/TMDS/GPIO & GPU VCORE

INTREPID ENET/FW/UATA/EIDE INTERFACES

INTREPID DECOUPLING

INTREPID MAXBUS AND BOOT STRAPS

CPU PLL AND CONFIGURATION STRAPS

POWER BLOCK DIAGRAM

MPC7447 MAXBUS INTERFACE

SSCG 5V_HD_LOGIC

BBANG

NO_BBANG

3V_HD_LOGIC

INT_2_5V_HOT ATI_MEMIO_LO

SOFT_MODEM

INT_2_5V_COLD

GPU_PWRMSR GPU_SS

BOM OPTIONS (IN COMMON PARTS)

STUFF

22

INTERNAL CONNECTORS - AIRPORT, HARD DRIVE,

NO_SSCG

32

2

25

39

27

40

3

COMPONENT LOCATIONS (2 OF 2)

COMPONENT LOCATIONS (1 OF 2)

REVISION HISTORY

SIGNAL LOCATIONS

43

42

PMU

37

36

33 34

30

1

4 5 6

8

7

10

9

17

FUNCTIONAL TESTPOINTS

35

21

M10 POWER

SIGNAL CONSTRAINTS (4 OF 4) - POWER NETS

28

24

LVDS

SIGNAL CONSTRAINTS (1 OF 4) - DDR MEM/CLK

FIREWIRE PHY

29

NO STUFF

31

PBUS SUPPLY / PMU SUPPLY / BACKUP BATTERY

1_8V_MAXBUS 1_5V_MAXBUS

11

FAN CONTROLLER, USB MODEM/SOFT MODEM,

MPC7447 DATA / NC PINS / BOOTBANGER

BATTERY CHARGER AND CONNECTOR

CONTENTS

3.3V / 5V SYSTEM POWER SUPPLY

FIREWIRE PORTS

INTREPID GPIOS/SERIAL/USB INTERFACES/SSCG

VGA_BUFFER_RES EXT_TMDS

INT_TMDS

VIDEO CONNECTORS - INVERTER, DVI, S-VIDEO,

KBD,TPAD,HALL EFFECT,PWR BUTTON,LMU/SENSOR

1.5V/ 1.8V / 2.5V SYSTEM POWER SUPPLIES

SIGNAL CONSTRAINTS (3 OF 4) - DIGITAL/DIFF

051-6338

40

?

12/05/02

02

1

ENGINEERING RELEASED

248015

C

SCHEM,MLB,PB15"

DMS630-4721

1

065-4479 DMS3

SELPRTS,MLB,PB15,BST

1

PCB1820-1441

PCBF,MLB,PB15

1

DMS1065-3951

DMS630-4285&DMS630-4721

CMNPRTS,MLB,PB15

051-6338

1

SCH1

SCHEM,MLB,PB15

DMS630-4285

065-3952 DMS2

1

SELPRTS,MLB,PB15,BTR

Fri Jan 23 20:30:40 2004

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

TMDS

(VIA SIL1162)

Connector

J4

Connector

P.22

Connector

P.22P.22

2:1 DDR MUXES

64BITS

167MHZ

MEMORY BUS

2.5V

LVDS

EDID (I2C)

RGB

DDC

J22

DVI-I

PCI

MEMORY

U17

RIGHT USB

(VIA LIO)

LEFT USB

(INTERNAL MEM)

EHCI HC

NEC USB2.0

P.24

DC-In

NOT USED

BOOT ROM

(MPC7447)

P.25

3.3V/5V

16/32 BITS

33MHZ

I2C

PMU

167MHZ

1.8V

MAXBUS

32BIT ADDRESS 64BIT DATA

NOT USED

EIDE

UIDE

1394 OHCI

3.3V

50MHZ

8BIT TX/RX

P.24

@ 400MHZ

2 DATA PAIRS

P.27

PHY

FW - B

FW - A

125MHZ

8BIT RX

8BIT TX

G/MII

3.3V

10/100/1000

P.26

PHY

66MHZ

1.5V/3.3V

AGP BUS

32BITS

Connector

P.14

SCCA

I2C

P.25

Connector

Power Supply

& Charger

Connector

ULTRA ATA/100

P.18

P.22

S-VIDEO

LCD Panel

Connector

P.19-21

4X AGP

CPU

P.5-6

P.7

PCI BUS

32BITS 33MHZ

3.3V

CardBus

64MB

CH. B

CH. A

MEMORY MEMORY

I2S

CPU PLL

Config

USB PORT E

USB PORT D

10/100/1000

ETHERNET FIREWIRE

SO-DIMM Connector

DDR SDRAM DIMM 0 DDR SDRAM DIMM 1

DDR MEMORY

UATA 100

33MHZ

64BITS

CARDSLOT

VIA/PMU

SYSTEM BLOCK DIAGRAM

FireWire

USB PORT F

USB PORT C

P.25

Connector

Battery

SMBUS

3.3V

INTREPID

400 MB/S

APOLLO

Ethernet

Connector

USB PORT B

USB PORT A

@ 200MHz

Connector

P.28

INTREPID

P.28

P.13 P.13

P.13

P.14

P.8

P.9

P.10

J25

P.11

P.13 P.14

P.14

P.12

P.30

U28

P.29

P.9

Inverter

COMPOSITE

S-Video

P.30-34

P.30

U8

P.17

P.25

Fan

I2CI2S

Connector

LIO/Audio

P.25

NOT USED

EIDE

P.13

P.25

MAXBUS

(INTERNAL MEM)

Serial Debug

TI PCI1510

Controller

Connector

1M X 8

(VIA STATLER)

CH. D

(INTERNAL MEM)

MEMORY

ATI M10

P.12

(INTERNAL MEM)

BlueTooth (LIO)

4 DATA PAIRS

Ethernet

J23

J24

U43

U36

J20

J13

J12

J3

J28

U11

J26

J27

J6

U47

J3

J17

J21J14

U16/U18/U28/U27

U56

J15

J3

U51

J5

Connector

P.18

CARDBUS

PMU

AIRPORT

CH. C

TRACKPAD

J10

P.23

SERIAL

5V

Connector

LED

J8

P.23

SLEEP

U53/J1/J18

Circuit

BOOTROM

OPTICAL DRIVE

Connector

J11

Connector

P.23

Keyboard

I2C

2 DATA PAIRS

RUX Board

LMU LUX Board

P.23

J2

J19

Modem/SW Modem

Connector

051-6338

2

40

C

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

BACKUP

SLEEP: D3COLD

(+1.385V)

+1.2V

(LTC1778)

GPU_VCORE

CPU_VCORE

+3V_SLEEP

1_5V_2_5V_OK

+3V_MAIN

+2_5V_SLEEP

SLEEP_L_LS5

~2.23MS

SHUTDOWN: STOPPED

RUN: RUNNING

RUN/SS

SLEEP: RUNNING

DC/DC

(LTC3411)

SHUTDOWN: STOPPED

SLEEP: STOPPED

RUN: RUNNING

(MAX1772)

FEED-IN PATH

NO INRUSH PROTECTION

BATTERY

CHARGER

PG 30

WHEN ONLY BATTERY IS CONNECTED

+4_6V_BU

SHUTDOWN: RUNNING

AC: 12.8V

REGULATOR

(LTC1625)

MAIN 2.5V/1.5V

SHUTDOWN: STOPPED

+PBUS

INTREPID CORE

SHUT-DOWN

CHARGER INPUT

PG 20

PG 33

INTERNAL 1.2UA CURRENT SOURCE

TURNS ON AS LOW AS 0.8V/TYP 1.5V

PG 34

PG 32

PG 31

PG 30

PG 31

NO AC: BATTERY VOLTAGE

VCC

POWER SYSTEM ARCHITECTURE

MAP31 DDR I/O

MAP31 DDR CORE

AND PREVENTS +PBUS AND +24V_PBUS FROM DROPPING BELOW 6V

BACKUP BATTERY CIRCUIT CHARGES OFF +PBUS

+PBUS

BATTERY VOLTAGE

RUN/SS

STARTS ~4.25MSEC AFTER DCDC_EN_L BECOMES LOW

RC AT 1M*0.1UF @ 24V

STARTS 2.0MSEC AFTER DCDC_EN_L BECOMES LOW

RC AT 1M*0.047UF @ 24V

INTERNAL ZENER CLAMP TO 6V

<100UA ALLOWED

TURNS ON AT >1V

RUN/SS - 5V

<100UA ALLOWED

MAIN 3V/5V

(LTC3707)

DC/DC

TURNS ON AT >1V

VCC

DCDC_EN_L

AFTER PMU IS UP AND RUNNING DCDC_EN_L WILL PULL ON1/ON2 LOW IN SHUTDOWN

+5V_MAIN

+1.8V_MAIN

+5V_MAIN

VCC

1_5V_2_5V_OK

+BATT

+24V_PBUS

NO INRUSH PROTECTION

TURNS ON OUTPUT @ 2.4V

RUN: RUNNING

SHUTDOWN: STOPPED

RUN/SS - 3V

SLEEP: RUNNING

RUN: RUNNING

24V IS OUTPUT ONLY FROM

BATTERY

BACKUP BATTERY

1V20_REF

+

-

& BOOST OUTPUT

POWER BLOCK DIAGRAM

(UNTIL DRAINED)

AC

IN

ADAPTER

LIMITER

INRUSH

>~13.44V TURNS-ON <~13.44V SHUTS-OFF

BUCK

RUN: RUNNING

+3.3V_MAIN

STBYMD

+3V_PMU

LDO

+3V_PMU

14V_PBUS

+5V_MAIN

WHEN ONLY BATTERY IS CONNECTED

14V CHARGES BACKUP BATTERY

HOLDS BOTH RUN/SS AT GND WHEN IT’S CONNECTED TO GND

WHEN IT’S OPEN

TURNS CONTROL TO RUN/SS

INVERTER

BACKLIGHT

DC/DC

(MAX1715)

PGOOD

3V_5V_OK

PGOOD

1625 NOT RUNNING

ON1/ON2

+1.5V_MAIN

+2.5V_MAIN

DDR POWER

AGP I/O

MAXBUS

SLEEP: STOPPED

SHUTDOWN: STOPPED

RUN: RUNNING

DC/DC

(MAX1717)

+5V_MAIN

SHDN

VCC

SLEEP

DCDC_EN

MAXBUS

SEQUENCING

+5V_MAIN

DC/DC

EXT_VCC

VCC

D3_COLD

SLEEP

DCDC_EN

HOWEVER, 5V SHOULD TURN ON ~2.23MS AFTER

RC CHARGING AT INT_VCC (5V)

DCDC_EN_L OR PMU_POWERUP_L BECOMES ’1’; MUCH LESS THAN THE

+5V_MAIN TURNS ON

1_5V_2_5V_OK WILL NOT PULL LOW UNTIL

D3_HOT

1_5V_2_5V_OK

DCDC_EN_L

SEQUENCING

GPU_VCORE

~5.88MS TO START SWITCHER

1M & 0.1UF @14V, IT TAKES

DCDC_EN_L

DCDC_EN

+5V_MAIN

+5V_SLEEP

2.4V - ??? MS

3V_5V_OK

SLEEP

??? MS

+2_5V_MAIN

??? MS

+1_5V_MAIN

+1_5V_SLEEP

1_5V_2_5V_OK

(MAX1715 OUTPUT)

(AT LTC1778 RUN/SS)

GPU_VCORE

(D3HOT)

GPU_VCORE

(D3COLD)

~8.2MS

~7.36MS

SLEEP

RUN

SHUT-DOWN

RUN

3S 2P 18650 CELLS

SLEEP: RUNNING

+5V_MAIN

INTERNAL ZENER CLAMP TO 6V

C

3

40

051-6338

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

GROUND VIAS

PCB SPECS

THICKNESS : 1.2 MM / 0.047 IN

PREPREG (3 MIL)

CORE (3 MIL)

PREPREG (3 MIL)

PREPREG (5 MIL)

CORE (5 MIL)

CUT POWER PLANE (1 OZ)

SIGNAL (1/2 OZ + COPPER PLATING)

BOARD HOLES

BOARD INFORMATION

SEE PCB CAD FILES FOR MORE SPECIFIC INFO.

IMPEDANCE : 50 OHMS +/- 10%

1/2 OZ CU THICKNESS: 0.7 MILS

DIELECTRIC: FR-4 LAYER COUNT: 10

BOARD STACK-UP AND CONSTRUCTION

SIGNAL TRACE WIDTH: 4 MILS PREPREG THICKNESS: 2-3 MILS

SIGNAL TRACE SPACING: 4 MILS

I/O AREA

1394

1

4

5

7

6

3

2

8

9

10

GROUND (1/2 OZ)

SIGNAL (1/2 OZ)

1-8-1 BLIND MICROVIA/20R10 BURIED VIA/20R10 TH VIA

SIGNAL (1/2 OZ)

GROUND (1/2 OZ)

SIGNAL (1/2 OZ)

1.0 OZ CU THICKNESS: 1.4 MILS

LWR CPU

UPPER RT GPU

LEFT CPU

LWR RT GPU

INVERTER

DVI

BATT. CHRGR

CHASSIS MOUNTS

ASICS HEATSINK MOUNTS

MECH. HOLES

1

ZT70

HOLE-VIA-20R10

1

ZT9

HOLE-VIA-20R10

1

ZT2

HOLE-VIA-20R10

1

ZT73

HOLE-VIA-20R10

1

ZT75

HOLE-VIA-20R10

1

ZT63

HOLE-VIA-20R10

1

ZT77

HOLE-VIA-20R10

1

ZT66

HOLE-VIA-20R10

1

ZT65

HOLE-VIA-20R10

1

ZT62

HOLE-VIA-20R10

1

ZT25

HOLE-VIA-20R10

1

ZT24

HOLE-VIA-20R10

1

ZT19

HOLE-VIA-20R10

1

ZT67

HOLE-VIA-20R10

1

ZT37

HOLE-VIA-20R10

1

ZT29

HOLE-VIA-20R10

1

ZT31

HOLE-VIA-20R10

1

ZT1

HOLE-VIA-20R10

1

ZT12

HOLE-VIA-20R10

1

ZT14

HOLE-VIA-20R10

1

ZT27

HOLE-VIA-20R10

1

ZT26

HOLE-VIA-20R10

1

ZT13

HOLE-VIA-20R10

1

ZT30

HOLE-VIA-20R10

1

ZT33

HOLE-VIA-20R10

1

ZT18

HOLE-VIA-20R10

3

2

1

SH1

SHLD-SM

OG-503040

CHGND5

1

ZT7

HOLE-VIA-20R10

1

ZT21

HOLE-VIA-20R10

1

ZT59

HOLE-VIA-20R10

1

ZT58

HOLE-VIA-20R10

1

ZT85

HOLE-VIA-20R10

1

ZT86

HOLE-VIA-20R10

1

ZT16

HOLE-VIA-20R10

1

ZT74

HOLE-VIA-20R10

1

ZT36

HOLE-VIA-20R10

1

ZT23

HOLE-VIA-20R10

1

ZT42

HOLE-VIA-20R10

CHGND2

CHGND1

CHGND3

1

ZT76

HOLE-VIA-20R10

1

ZT41

HOLE-VIA-20R10

1

ZT40

HOLE-VIA-20R10

1

ZT39

HOLE-VIA-20R10

1

ZT38

HOLE-VIA-20R10

1

ZT61

HOLE-VIA-20R10

1

ZT64

HOLE-VIA-20R10

1

ZT68

HOLE-VIA-20R10

1

ZT69

HOLE-VIA-20R10

1

ZT72

HOLE-VIA-20R10

1

ZT28

HOLE-VIA-20R10

1

ZT46

HOLE-VIA-20R10

1

ZT71

HOLE-VIA-20R10

1

ZT78

HOLE-VIA-20R10

1

ZT80

HOLE-VIA-20R10

1

ZT51

HOLE-VIA-20R10

1

ZT50

HOLE-VIA-20R10

1

ZT52

HOLE-VIA-20R10

1

ZT53

HOLE-VIA-20R10

1

ZT57

HOLE-VIA-20R10

1

ZT82

HOLE-VIA-20R10

1

ZT60

HOLE-VIA-20R10

1

ZT22

HOLE-VIA-20R10

1

ZT17

HOLE-VIA-20R10

1

ZT35

HOLE-VIA-20R10

1

ZT45

HOLE-VIA-20R10

1

ZT79

HOLE-VIA-20R10

1

ZT83

HOLE-VIA-20R10

1

ZT81

HOLE-VIA-20R10

1

ZT49

HOLE-VIA-20R10

1

ZT47

HOLE-VIA-20R10

1

ZT48

HOLE-VIA-20R10

1

ZT54

HOLE-VIA-20R10

1

ZT55

HOLE-VIA-20R10

1

ZT56

HOLE-VIA-20R10

1

ZT5

HOLE-VIA-20R10

1

ZT84

HOLE-VIA-20R10

1

ZT15

HOLE-VIA-20R10

1

ZT44

HOLE-VIA-20R10

1

ZT4

HOLE-VIA-20R10

1

ZT8

HOLE-VIA-20R10

1

ZT6

HOLE-VIA-20R10

1

ZT3

HOLE-VIA-20R10

1

ZT32

HOLE-VIA-20R10

1

ZT10

HOLE-VIA-20R10

1

ZT34

HOLE-VIA-20R10

1

ZT11

HOLE-VIA-20R10

1

ZT20

HOLE-VIA-20R10

1

ZT43

HOLE-VIA-20R10

C

40

4

051-6338

ZT10_SPN NO_TEST=TRUE

ZT302_SPN NO_TEST=TRUE

NO_TEST=TRUE

ZT301_SPN

(1 OF 3)

TEST4

TEST3

TEST2

TEST1

TEST0

EXT_QUAL

TBEN

L2TSTCLK

L1TSTCLK

TCK

TMS

TDO

TDI

DTI0 DTI1 DTI2 DTI3

PLL_EXT

PLLCFG3

PLLCFG2

PLLCFG1

PLLCFG0

CLKOUT

SYSCLK

BVSEL

TT3

TT2

TT1

TSIZ0

TSIZ2

TSIZ1

TT4

TT0

A33 A34 A35

AP0

AP3

AP2

AP4

AP1

A25

A24

A23

A26 A27 A28 A29 A30 A31 A32

A13 A14 A15 A16 A17 A18 A19 A20 A21 A22

A12

A10

A9

A8

A7

A6

A3 A4 A5

A11

A2

A0 A1

OVDD

VDD

GND

AVDD

BR* BG*

TS*

TRST*

LSSDMODE*

TA*

TEA*

QREQ* QACK*

CKSTP_IN*

CKSTP_OUT*

INT* SMI*

MCP* SRESET* HRESET*

PMON_IN*

PMON_OUT*

BMODE0*

BMODE1*

TBST*

GBL* WT* CI* AACK* ARTRY* SHD0*

HIT*

SHD1*

DRDY*

DBG*

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

MORE 0805 10UF CAPS ON VCORE POWER SUPPLY PAGE (PG 32)

CPU_VCORE DECOUPLING NETWORK

NC

470OHM FOR BOOT BANGER

NC

470OHM FOR BOOT BANGER

MPC7447 PULL-UPS

MPC7447 MAXBUS

CPU_OVDD DECOUPLING NETWORK

MPC7447

CPU INTERNAL PLL FILTERING

21

R46

10K

5%

1/16W

MF

402

21

R13

5%

1/16W

MF

402

10K

21

R20

402

MF

1/16W

5%

10K

21

R32

470

5%

1/16W

MF

402

21

R11

5%

1/16W

MF

402

10K

2

1

R10

NO_BBANG

402

200

5% 1/16W MF

21

R4

402

MF

1/16W

10K

5%

21

R7

1K

1/16W

MF

402

5%

21

R24

1/16W

MF

402

5%

10K

21

R34

10K

1/16W

MF

402

5%

2

1

C89

0.1uF

20% CERM

402

10V

2

1

C73

0.1uF

402

10V

20% CERM

2

1

C18

0.1uF

20% CERM

402

10V

2

1

C20

0.1uF

10V 402

CERM

20%

2

1

C75

0.1uF

CERM

20%

402

10V

2

1

C9

0.1uF

CERM

20% 10V

402

2

1

C49

0.1uF

402

10V CERM

20%

2

1

C46

0.1uF

CERM 402

10V

20%

2

1

C30

0.1uF

20% CERM

10V 402

2

1

C56

0.1uF

20% 10V

402

CERM

2

1

C45

0.1uF

20% CERM

10V 402

2

1

C48

0.1uF

CERM 402

10V

20%

2

1

C44

0.1uF

10V 402

CERM

20%

2

1

C86

0.1uF

402

10V

20% CERM

2

1

C88

0.1uF

10V 402

CERM

20%

2

1

C10

0.1uF

402

10V

20% CERM

2

1

C38

0.1uF

20% CERM

402

10V

2

1

C72

0.1uF

402

10V

20% CERM

2

1

R89

MF

5%

470

1/16W

402

2

1

C50

0.1uF

402

10V CERM

20%

2

1

C28

0.1uF

20% 10V

402

CERM

2

1

C39

0.1uF

402

CERM

20% 10V

2

1

C47

0.1uF

CERM 402

10V

20%

2

1

C26

0.1uF

20% CERM

10V 402

2

1

C31

0.1uF

20% 10V

402

CERM

2

1

R38

470

5%

1/16W

MF

402

21

R36

5%

1/16W

MF

402

10K

21

R45

470

5%

1/16W

MF

402

21

R28

5%

10K

402

1/16W

MF

21

R3

5%

402

MF

1/16W

1K

C32

10uF

805

CERM

6.3V

20%

2

1

C33

10uF

805

CERM

20%

6.3V

C59

805

CERM

6.3V

20%

10uF

2

1

C58

6.3V

20% CERM

805

10uF

21

R27

MF

5%

1/16W

402

10K

21

R33

402

1/16W

MF

5%

10K

1

2

R748

1/16W MF 402

402

1%

2

1

C62

2.2uF

10V 805

CERM

20%

2

1

C34

2.2uF

20%

805

10V CERM

21

R25

5%

10K

1/16W

MF

402

21

R8

5%

10K

1/16W

MF

402

21

R281

1_5V_MAXBUS

603

MF

1/16W

5%

0

21

R283

1_8V_MAXBUS

603

MF

1/16W

5%

0

+1_5V_SLEEP

+1_8V_SLEEP

2

1

R9

1/16W

470

5% MF

402

BBANG

21

R2

402

MF

1/16W

5%

470

D3

K10

K8

J13

J11

J9J7H12

H10

M12

M10

M8

L13

L11

L9L7K14

K12

H8

C5

E9

F6

E6

E5

E7

F7

G6

L4

A5

F1

D10

E10

B10

B6

A12

L1

A4

B9

C6

F11

E1

K6

A10

A2

F9

H5

E4

P4 G5

A9

D9

A7

D7

C7

C8

B8

J5H3G18

F2

E18

D5

C12

V14

V10

V7V4U16

U12

U2T9T6C2R16

R13

R4

P11

P8P2N6M3L5

K2

B4

C9

E8

B3

G8

D4

D8

B2

H7

H4

G17

F3

E17

V15

V11

V8

V5

U17

U13

U3

D13

T10

T7

R17

R14

R5

P12

P9P3N7

M13D6M11

M9M7M4

L12

L10

L8

L6

K13

K11

C3

K9K3K7

J12

J10

J8

J6

H13

H11

H9

B5

E2

A11

N1

P1

K1

G1

R3

M2

H2

B1

A3

J1

B7D2

F8

G9

M1

A8

N2

G7

F5

H6

E3

C1

R1

G2

C10

D1

D11

L2

F10

B11

G10

C4

B12

W1

N5

G3

U1

V2

T1

N3

P5

M5

J3

N4

K4

J2

C11

W2

K5

R2

J4

V1

F4

T2

G4

L3

D12

H1

E11

U56

800MHZ

BGA

APOLLO_MPC7445_360

OMIT

2

1

C29

0.1uF

20% CERM

10V 402

2

1

C27

0.1uF

402

10V CERM

20%

2

1

C25

0.1uF

20% CERM

10V 402

2

1

C54

0.1uF

20% CERM

10V 402

2

1

C53

0.1uF

20% CERM

10V 402

2

1

C55

0.1uF

20% CERM

10V 402

2

1

C87

0.1uF

20% CERM

402

10V

2

1

C69

0.1uF

10V 402

CERM

20%

2

1

C17

0.1uF

20% CERM

402

10V

2

1

C82

0.1uF

10V 402

CERM

20%

2

1

C81

0.1uF

20% CERM

402

10V

2

1

C61

0.1uF

10V 402

20% CERM

21

R6

5%

1/16W

MF

402

10K

21

R37

5%

1/16W

MF

402

10K

21

R19

5%

1/16W

MF

402

10K

21

R26

5%

1/16W

MF

402

10K

2

1

C2

0.1uF

20% CERM

10V 402

2

1

C103

0.1uF

20% CERM

10V 402

2

1

C68

0.1uF

20% CERM

10V 402

2

1

C109

20% CERM

10V

0.1uF

402

2

1

C107

CERM

20%

0.1uF

10V 402

2

1

C104

10uF

805

CERM

20%

6.3V 2

1

C108

0.1uF

402

10V CERM

20%

2

1

C110

0.1uF

20% CERM

10V 402

2

1

C1

0.1uF

20% CERM

10V 402

21

XW34

SM

OMIT

2

1

C810

402

10V

20% CERM

0.1uF

2

1

C811

805

CERM

20% 10V

2.2uF

1

CRITICAL

CPU_BTR

337S2732

U56

IC,APOLLO7,1.x,1.0GHZ,1.XV CORE,85C

U56

CPU_BST

1

CRITICAL

IC,APOLLO7,1.X,1.25GHZ,1.XV CORE,85C

337S2748

40

5

051-6338

C

CPU_SHD1_L

MAXBUS_SLEEP

CPU_AVDD

CPU_DRDY_L CPU_EDTI

MAXBUS_SLEEP

CPU_PULLDOWN

CPU_SRWX_L

JTAG_CPU_TDI

CPU_LSSD_MODE

CPU_PULLDOWN

JTAG_CPU_TCK

CPU_EDTI

JTAG_CPU_TMS

CPU_L1TSTCLK

MPIC_CPU_INT_L

CPU_SRESET_L

CPU_SMI_L

CPU_HRESET_L

CPU_EMODE1_L

CPU_PULLUP

CPU_PMONIN_L

CPU_SRWX_L

CPU_CHKSTP_OUT_L

CPU_MCP_L

CPU_SHD0_L

CPU_TBEN

CPU_CHKS_L

CPU_TT<0>

CPU_BR_L

CPU_TS_L

CPU_ADDR<2>

CPU_ADDR<0> CPU_ADDR<1>

CPU_ADDR<3> CPU_ADDR<4> CPU_ADDR<5> CPU_ADDR<6> CPU_ADDR<7>

CPU_ADDR<10>

CPU_ADDR<9>

CPU_ADDR<8>

CPU_ADDR<12>

CPU_ADDR<11>

CPU_ADDR<15>

CPU_ADDR<14>

CPU_ADDR<13>

CPU_ADDR<17>

CPU_ADDR<16>

CPU_ADDR<20>

CPU_ADDR<19>

CPU_ADDR<18>

CPU_ADDR<22>

CPU_ADDR<21>

CPU_ADDR<25>

CPU_ADDR<23> CPU_ADDR<24>

CPU_ADDR<27>

CPU_ADDR<26>

CPU_ADDR<28> CPU_ADDR<29> CPU_ADDR<30> CPU_ADDR<31>

CPU_TT<1>

CPU_TT<4>

CPU_TT<3>

CPU_TT<2>

CPU_TSIZ<0>

CPU_TBST_L

CPU_TSIZ<1>

CPU_GBL_L

CPU_TSIZ<2>

CPU_AACK_L

CPU_WT_L CPU_CI_L

CPU_ARTRY_L CPU_SHD0_L CPU_SHD1_L CPU_HIT_L

MAXBUS_SLEEP

JTAG_CPU_TRST_L

CPU_PLL_CFG<0> CPU_PLL_CFG<1>

SYSCLK_CPU

CPU_CLKOUT_SPN

NO_TEST=TRUE

CPU_PLL_CFG<4>

CPU_PLL_CFG<2>

CPU_DTI<2>

CPU_DTI<0> CPU_DTI<1>

CPU_DBG_L

CPU_PLL_CFG<3>

CPU_L2TSTCLK

CPU_LSSD_MODE CPU_L1TSTCLK

JTAG_CPU_TMS

JTAG_CPU_TRST_L

JTAG_CPU_TCK

JTAG_CPU_TDO_TP

JTAG_CPU_TDI

CPU_QACK_L

CPU_QREQ_L

CPU_TBEN

CPU_TEA_L

CPU_SRESET_L CPU_HRESET_L

CPU_SMI_L CPU_MCP_L

MPIC_CPU_INT_L

CPU_CHKSTP_OUT_L

CPU_PMONIN_L

CPU_EMODE0_L CPU_EMODE1_L

CPU_CHKS_L CPU_PULLUP

CPU_BUS_VSEL

CPU_L2TSTCLK

CPU_VCORE_SLEEP

ADT7460_VCORE_MON

CPU_VCORE_SLEEP

CPU_PULLDOWN

CPU_TA_L

CPU_BG_L

38

33

16

15

8

39

8

39

7

39

7

39

7

38

6

36

6

14

39

29

6

39

8

36

6

35

36

6

36

8

36

39

6

29

14

39

33

36

5

38

8

5

8

5

8

5

7

8

7

8

7

5

39

5

8

5

8

5

7

5

7

5

25

5

8

(2 OF 3)

D0

D60 D61 D62 D63

DP7

DP0 DP1 DP2 DP3 DP4 DP5 DP6

D59

D56 D57 D58

D55

D54

D53

D52

D50 D51

D49

D46

D45

D47 D48

D44

D43

D42

D41

D40

D39

D38

D37

D36

D35

D34

D33

D30 D31 D32

D29

D26

D25

D24

D23

D27 D28

D22

D21

D20

D19

D18

D17

D16

D15

D14

D13

D12

D11

D10

D9

D8

D7

D6

D5

D4

D1 D2 D3

(3 OF 3)

NC_B14

NC_B13

NC_E12

NC_B18

NC_N19

NC_K17

NC_N18

NC_N12

NC_A6

NC_C13

NC_G11

NC_A14

NC_F12

NC_A13

NC_A18

NC_C14

NC_A15

NC_B16

NC_E13

NC_F13

NC_F14

NC_G12

NC_A17

NC_C15

NC_G14

NC_H14

NC_E14

NC_G13

NC_C16

NC_C17

NC_B17

NC_B15

NC_E15

NC_D14

NC_A19

NC_B19

NC_A16

NC_C18

NC_G15

NC_D15

NC_C19

NC_K16

NC_J17

NC_K18

NC_L18

NC_L19

NC_M18

NC_P16

NC_L16

NC_H15

NC_J16

NC_K19

NC_J15

NC_J19

NC_J18

NC_J14

NC_K15

NC_L14

NC_L17

NC_M15

NC_N17

NC_P19

NC_M16

NC_M19

NC_N16

NC_N13

NC_M17

NC_M14

NC_N14

NC_P18

NC_N15

NC_D19 NC_F15 NC_G19 NC_E16 NC_D17 NC_D16

NC_P15 NC_L15

NC_H19 NC_H18 NC_H17 NC_H16 NC_E19 NC_D18 NC_F16 NC_G16

NC_F19

NC_F17

NC_F18

VCC

RESET* XTAL1 XTAL2 PB0

PD6

PD5

PD4

PD3

PD2

PD1

PD0

GND

PB1 PB2 PB3 PB4 PB5 PB6 PB7

SYM_VER2

WC*

VCC

VSS

SDA SCL

NC1 NC2 NC3

Y

B

A

Y

B

A

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

REFERENCE DESIGNATOR(S)

BOM OPTION

TABLE_5_HEAD

QTY

DESCRIPTION

PART#

TABLE_5_ITEM

NC

UNSTUFFING Ra AND STUFFING Rb WILL DISABLE THE CONTROLLER

MPC7447/BBANG

NC

NC NC NC

NC

NC NC

NC

NC NC NC NC NC NC NC NC NC

NC NC NC

NC

009-6240 FW GT4 BBANGER

INPUTS ARE 3V TOLERANT

BOOT BANGER - TWEAK PROCESSOR BITS AFTER POWER-ON

(Rb)

(Ra)

W6

N8

V3

M6

W9

T4

W4

T3

W13

V13

P14

T8

W8

R8

P6

U15

R7

U7

U8

U4

V17

W3

T17

T18

T16

W18

T15

W17

U18

W19

U19

T19

V19

R18

V18

R19

P17

W16

V6

P7

R6

W7

U5

T5

U6

W5

V9

U9

V16

W10

R9

U10

P10

N9

R10

T11

W11

U11

R11

T14

N10

N11

V12

W12

T12

R12

W14

U14

P13

T13

W15

R15

U56

OMIT

BGA

APOLLO_MPC7445_360

800MHZ

P19

P18

P16

P15

N19

N18

N17

N16

N15

N14

N13

N12

M19

M18

M17

M16

M15

M14

L19 L18

L17

L16

L15

L14

K19

K18

K17

K16

K15

J19

J18

J17

J16

J15

J14

H19 H18 H17 H16

H15

H14

G19

G16

G15

G14

G13

G12

G11

F19

F18 F17

F16

F15

F14 F13

F12

E19

E16

E15

E14

E13

E12

D19

D18

D17 D16

D15

D14

C19

C18

C17 C16

C15

C14

C13

B19

B18

B17

B16

B15

B14

B13

A6

A19

A18

A17

A16

A15

A14

A13

U56

800MHZ

BGA

OMIT

APOLLO_MPC7445_360

+3V_SLEEP

9

8

7

6

4

3

2

1

10

5

RP46

SM

25V

1/32W

5%

10K

BBANG

2

1

C762

BBANG

20% 10V CERM 402

0.1uF

2

1

R692

10K

1% 1/16W MF 603

BBANG

2

1

R709

NO STUFF

10K

1% 1/16W MF 603

2

1

R707

BBANG

603

MF

1/16W

1%

10K

2

1

R712

10K

1% 1/16W MF 603

BBANG

+3V_SLEEP

4

5

20

1

11

9

8

7

6

3

2

19

18

17

16

15

14

13

12

10

U54

OMIT

SSOP

AT90S1200A

2

1

C120

BBANG

CERM

10V

20%

402

0.1uF

+3V_SLEEP

7

4

8

5 6

3

2

1

U52

BBANG

SOI

32KX8_M24256B

2

1

R100

BBANG

402

MF

1/16W

5%

10K

4

5

3

2

1

U9

SN74AUC1G08

SC70-5

BBANG

21

R104

402

MF

1/16W

5%

0

NO_BBANG

+3V_SLEEP

2

1

R103

BBANG

402

MF

1/16W

5%

10K

4

5

3

2

1

U10

SN74AUC1G08

SC70-5

BBANG

2

1

R105

10K

5%

1/16W

MF

402

BBANG

2

1

R637

BBANG

603

MF

1/16W

1%

10K

C

051-6338

40

6

U54

BBANG

1

341S1135

MCU,PROGRAMMED W/ BBANGER

PMU_CPU_HRESET_L

BFR_TDO

INT_I2C_DATA0

BBANG_HRESET_L

PMU_CPU_HRESET_L

ICT_TRST_L

BFR_TDO

ESP_EN_L

BBANG_JTAG_TCK BB_MOSI BB_MISO BB_SCK BB_EEPR_ADDR

JTAG_CPU_TCK

BBANG_JTAG_TCK

BBANG_TCK_EN

MAXBUS_SLEEP

RESET_VREF

BB_RESET_L

BB_XTAL1_SPN

ESP_EN_L

BBANG_JTAG_TCK

JTAG_CPU_TDI

BBANG_HRESET_L INT_I2C_CLK0

BB_MOSI

BB_SCK

BB_EEPR_WP_PD

INT_I2C_CLK0

INT_I2C_DATA0

BB_EEPR_ADDR

CPU_DATA<0>

CPU_DATA<2>

CPU_DATA<1>

CPU_DATA<3>

CPU_DATA<5>

CPU_DATA<4>

CPU_DATA<6> CPU_DATA<7> CPU_DATA<8>

CPU_DATA<10>

CPU_DATA<9>

CPU_DATA<12>

CPU_DATA<11>

CPU_DATA<13>

CPU_DATA<15>

CPU_DATA<14>

CPU_DATA<17>

CPU_DATA<16>

CPU_DATA<18> CPU_DATA<19> CPU_DATA<20> CPU_DATA<21> CPU_DATA<22> CPU_DATA<23> CPU_DATA<24> CPU_DATA<25> CPU_DATA<26> CPU_DATA<27> CPU_DATA<28> CPU_DATA<29> CPU_DATA<30> CPU_DATA<31>

CPU_DATA<33>

CPU_DATA<32>

CPU_DATA<34> CPU_DATA<35> CPU_DATA<36> CPU_DATA<37> CPU_DATA<38>

CPU_DATA<40> CPU_DATA<41> CPU_DATA<42> CPU_DATA<43> CPU_DATA<44>

CPU_DATA<46>

CPU_DATA<45>

CPU_DATA<47> CPU_DATA<48> CPU_DATA<49>

CPU_DATA<51>

CPU_DATA<50>

CPU_DATA<52> CPU_DATA<53> CPU_DATA<54>

CPU_DATA<56>

CPU_DATA<55>

CPU_DATA<57> CPU_DATA<58> CPU_DATA<59>

CPU_DATA<61>

CPU_DATA<60>

CPU_DATA<62> CPU_DATA<63>

ICT_TRST_L

CPU_HRESET_L

MAXBUS_SLEEP

BB_MISO

JTAG_CPU_TMS

JTAG_CPU_TRST_L

CPU_DATA<39>

38

33

16

39

15

39

15

23

8

23

8

39

13

39

7

13

39

7

29

11

29 39

6

39

11

36

7

6

39

36

6

5

6

5

39

6

5

6

6 6

8

6

5

6

5

8

G

D

S

G

D

S

04

G

D

S

G

D

S

D

G

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

MULTIPLIER

R10D

STATE ENCODING CPU_PLL_STOP_OC CPU_VCORE_HI_OC

CPU CONFIGURATION

+5V_SLEEP NOW REQUIRED FOR PLL_STOP_L PULLUP TO ENSURE THAT Vgs OF PASS TRANSISTOR ON CPU_PLL_CFG<4> IS MET.

R10AR00A

MAXBUS VSEL

1.5V INTERFACE

INVERTED HRESET_L

BUSTYPE SELECT

APOLLO ONLY SUPPORTS MAXBUS

(PROCESSOR)

CPU_BUS_VSEL

SIGNAL

(PROCESSOR)

CPU_EMODE0_L

CPU_HRESET_L

CPU_HRESET_INV

CPU_HRESET_L

TIED

HIGH

LOW

1.8V INTERFACE

1.5V INTERFACE

2.5V INTERFACE

60X BUS MODE

APPLICATION

MAX BUS MODE

DESKTOP HAD PROBLEM USING INVERTER TO INVERT HRESET_L

NEED TO CHARACTERIZE

1.8V INTERFACE

933

267 400 533

867

800

733

667

0 1011 0B 0 1001 09

917

8335.0X

5.5X

333 500 667

9.5X

8.5X

8.0X

9.0X

7.5X

7.0X

6.5X

6.0X

4.0X

3.0X

2.0X

1.0X

0.0X

APOLLO 7

R10E R00ER01A

PLL DISABLE 1 X

HIGH SPEED 0 1

R01B R10B R00C R10C R00DR01D

LOW SPEED 0 0

R01E

CPU FREQUENCY CONFIGURATION

(MHZ)

PLL OFF

133MHZ

(Bus-to-Core)

0 1111 0F

CPU_PLL_CFG

(AT BUS FREQUENCY)

CORE FREQUENCY

167MHZ

PLL BYPASS 0 0011 03

0 0100 04 0 1000 08 0 1010 0A

0 1101 0D 0 0101 05 0 0010 02

0 1100 0C

0 0001 01

1000 1067

1000 1083 1167 1250 1333

1 0110 16

32004000

3733466728.0X

24.0X

1 1010 1A

0 0000 00

1 1000 18 1 1001 19

1833

1667 1750

1917

1467

1333 1400

1533

1 1100 1C 1 0001 11 1 1101 1D

1 0101 15 0 1110 0E

1 0000 10 1 0010 12 1 0011 13

1 1011 1B 1 1111 1F

1 0100 14

1667

1600

2667

2400

2267

1800

1733

2133

2000

18672333 2500 2667

2083

2000

3333

3000

2833

2250

2167

3500 2800

16.0X

15.0X

14.0X

10.0X

10.5X

11.0X

12.0X

11.5X

12.5X

13.0X

13.5X

17.0X

18.0X

20.0X

21.0X

1 0111 17

12001500

1417 1133

0 0110 06

1583 1267

0 0111 07

1 1110 1E

CPU CONFIGURATION

4 0123 E ABCD HEX

R10E, R01E, OR PULLUP STUFFED

STUFF PASS TRANSISTOR ONLY IF

CPU PLL CONFIG CIRCUITRY

R00B R01C

2

1

R63

402

MF

0

1/16W

5%

CPU_BST

2

1

R92

NO STUFF

402

MF

1/16W

5%

0

2

1

R35

1/16W

5% MF

402

10K

2

1

R50

402

MF

1/16W

5%

10K

2

1

R68

10K

5% 1/16W MF 402

2

1

R79

402

MF

1/16W

5%

10K

2

1

R133

402

5%

1/16W

MF

47K

2

1

R132

402

5% 1/16W MF

10K

2

1

R14

82K

402

MF

1/16W

5%

2

1

R31

0

5% 1/16W MF 402

NO STUFF

2

1

R23

0

5% 1/16W MF 402

NO STUFF

2

1

R18

10K

5% MF

402

1/16W

NO STUFF

4

5

3

Q14

SOT-363

2N7002DW

1

2

6

Q14

SOT-363

2N7002DW

4

5

3

2

U12

SC70-5

SN74AUC1G04

1_5V_MAXBUS

2

1

R12

402

MF

1/16W

5%

0

1

2

6

Q3

2N7002DW

NO STUFF

SOT-363

4

5

3

Q3

2N7002DW

NO STUFF

SOT-363

+5V_SLEEP

1 2

R5

1/16W

MF

5%

22

402

1_5V_MAXBUS

1 2

R110

22

1/16W

MF

5%

402

2

1

R17

10

MF

5%

1/16W

402

1_8V_MAXBUS

2

1

3

Q13

2N7002

SM

2

3

1

Q12

SM

2N3904

21

R131

249K

402

MF

1/16W

1%

2

1

R43

MF

0

5% 1/16W

402

CPU_BST

+3V_SLEEP

2

1

R44

NO STUFF

402

MF

1/16W

5%

0

2

1

R48

402

MF

1/16W

5%

0

NO STUFF

2

1

R60

NO STUFF

402

MF

1/16W

5%

0

2

1

R64

MF

1/16W

5%

0

402

CPU_BTR

2

1

R70

0

5% 1/16W MF 402

2

1

R76

NO STUFF

5%

0

1/16W MF 402

2

1

R84

402

MF

1/16W

5%

0

NO STUFF

2

1

R78

NO STUFF

0

5% 1/16W MF 402

2

1

R88

402

MF

1/16W

5%

0

NO STUFF

C

40

7

051-6338

CPU_PLL_CFG<1>

MAXBUS_SLEEP

CPU_PLL_CFG<0>

CPU_PLL_FS01

CPU_PLL_CFG<2>

CPU_PLL_FS00

CPU_PLL_STOP_BASE

CPU_PLL_CFG<4>

CPU_PLL_STOP_OC

PLL_STOP_L

CPU_PLL_STOP_OC

CPU_VCORE_HI_OC

CPU_BUS_VSEL

MAXBUS_SLEEP

CPU_HRESET_INV

CPU_HRESET_L

CPU_HRESET_L CPU_EMODE0_L

CPU_PLL_FS10

CPU_PLL_CFGEXT

CPU_PLL_CFG<3>

38

33

16

15

15 8 8

39

7

6

29

33

6

5

7

29

5

5 5

5

(PLL6)

VSSA_7

(PLL6)

VDD15A_7

D_42

D_41

D_40

D_39

D_38

D_44

D_43

D_45 D_46 D_47 D_48

D_52

D_51

D_50

D_49

D_53

D_55

D_54

D_56 D_57 D_58

D_60

D_59

D_62

D_61

D_63

DBG

DRDY

DTI_0

TEA

TA

DTI_2

DTI_1

D_1

D_0

D_2

D_6

D_5

D_4

D_3

D_7

D_11

D_10

D_9

D_8

D_12

D_14

D_13

D_15 D_16 D_17

D_22

D_21

D_20

D_19

D_18

D_23 D_24 D_25 D_26 D_27

D_32

D_31

D_30

D_29

D_28

D_34

D_33

D_35 D_36 D_37

BR

(1 OF 9)

MAXBUS

INTERFACE

TS

BG

A_0 A_1 A_2 A_3 A_4 A_5

A_9

A_6 A_7 A_8

A_10

A_14

A_13

A_12

A_11

A_20

A_16 A_17 A_18 A_19

A_15

A_27

A_22

A_21

A_30

A_29

A_28

A_26

A_25

A_24

A_23

TT_2

TT_1

TT_0

A_31

TBST TSIZ_0 TSIZ_1 TSIZ_2

CI GBL

TT_4

AACK

QREQ

ARTRY

TT_3

WT

HIT

ANALYZER_CLK

SUSPENDACK

SUSPENDREQ

QACK

STOPCPUCLK

CPU_FB_OUT

CPU_FB_IN

CPU_CLK

TBEN

ACS_REF

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

2/ D46 - SELPCI1SPREADCLK - SLEEP/WAKE CYCLE REQUIRED

FB BUFFER HAS 50 OHM OUTPUT IMPEDANCE

1: PLL4

0: PLL5 (no spread)

1: PLL4

0: PLL5 (no spread)

PCI0 Source Clock

BIT 40 TO 47

0: Active high

INTREPID BOOT STRAPS

1: Active

OBSOLETE (Should remain high)

OBSOLETE

1: 0-1 IDE / 2-3 PCI1

0: 0 IDE / 1 PCI1

ROM_Ovrly_Rng

1: BootROM on PCI1

0: BootROM on IDE/CardSlot

En_PCI_ROM_P

1: External source

SelPLL4ExtSrc

1: TI PHY workaround

011: 33.3 ohm 101: 40 ohm

110: 66.6 ohm

0: PLL5

BUF_REF_CLK_OUTEnable_h

0: Inactive

1: Active

1/ D47 - SELAGPSPREADCLK - SLEEP/WAKE CYCLE REQUIRED 3/ D44 - PLL4MODESEL_NXT<0> - SLEEP/WAKE CYCLE REQUIRED

4/ D43 - PLL4MODESEL_NXT<1> - SLEEP/WAKE CYCLE REQUIRED 5/ D42 - PLL4MODESEL_NXT<2> - SLEEP/WAKE CYCLE REQUIRED 6/ D33 - ANALYZERCLK_EN_H - IMMEDIATE EFFECT

IF A STRAP IS NOT LISTED, THEN IT CANNOT BE CHANGED BY SOFTWARE

THE FOLLOWING STRAP BITS CAN BE CHANGED BY SOFTWARE:

LONG = 1" LONGER THAN MATCHED LENGTH

SHORT = 1" SHORTER THAN MATCHED LENGTH

NO BUS KEEPER - ?

INPUT - PU

INPUT - PD

NO BUS KEEPER - PU

NO BUS KEEPER - PU NO BUS KEEPER - PU

INPUT - PU

NO BUS KEEPER - PU

INPUT NO BUS KEEPER

NO BUS KEEPER

Vout = MaxBus rail (1.8V)

Vin = Intrepid Vcore (1.5V)

BIT2 BIT1 BIT0

BIT0BIT1BIT2

001: 50 ohm

010: 100 ohm 100: 200 ohm 000: 200 ohm

111: 28.6 ohm

MaxBus output impedance

100: 83.20MHZ

001: 149.76MHZ

PLL4MODESEL_NXT[2:0]

INTREPID OUTPUTS HIGH BY DEFAULT

INTREPID BOOT STRAPS

DDR_TPDModeEnable_h

0: TDI input (JTAG)

Spare

PCI1_REQ1_L / PCI1_GNT1_L

PCI1_REQ2_L / PCI1_GNT2_L

0: REQ/GNT

1: GPIOs

0: REQ/GNT

1: GPIOs

PCI1_REQ0_L / PCI1_GNT0_L

Processor Bus Mode

0: Legacy interface

1: B-mode interface

FireWire PHY interface

1: 60x bus (G3)

0: Max Bus (G4)

BIT 56 TO 63

0: Normal 1394b

TI 1394b workaround

Spare

BIT 48 TO 55

0: Inactive

InternalSpreadEn

Spare

PCI1 Source Clock

AnalyzerClk_En_h

1: Active

0: Inactive

DDR_TPDEn_Pol

1: Active low

0: Active high

ExtPLL_SDwn_Pol

1: Active low

Spare

BIT 32 TO 39

Spare

Intrepid MaxBus

NO BUS KEEPER - PU

MAXBUS PULL-UPS

000: 166.4MHZ (2.5X)

010: 133.12MHZ (2.0X) 011: 99.84MHZ (1.5X)

MODE A (2.5X) IS FOR STATIC OPERATION MODE C (2.0X) IS FOR CLOCK SLEW OPERATION

1: TDI output

2

1

R161

1K

1%

1/16W

MF

402

2

1

C187

0.22uF

402

CERM

6.3V

20%

21

R159

402

MF

1/16W

5%

4.7

21

R168

0

5%

1/16W

MF

402

2 1

R155

0

402

MF

1/16W

5%

2

1

R169

511

402

1%

1/16W

MF

2

1

R666

NO STUFF

5%

1/16W

MF

402

10K

2

1

R638

10K

402

MF

1/16W

5%

NO STUFF

2

1

R639

5%

1/16W

MF

402

10K

NO STUFF

2

1

R650

MF

402

10K

5%

1/16W

2

1

R652

5%

1/16W

MF

402

10K

2

1

R620

10K

402

MF

1/16W

5%

2

1

R621

10K

402

MF

1/16W

5%

2

1

R653

5%

1/16W

MF

402

10K

2

1

R618

10K

402

MF

5%

1/16W

2

1

R619

5%

1/16W

MF

402

10K

2

1

R640

NO STUFF

5%

1/16W

MF

402

10K

2

1

R622

5%

1/16W

MF

402

10K

2

1

R699

10K

402

MF

1/16W

5%

NO STUFF

2

1

R693

5%

1/16W

MF

402

10K

NO_SSCG

2

1

R694

5%

1/16W

MF

402

10K

NO STUFF

2

1

R664

NO STUFF

10K

402

MF

1/16W

5%

2

1

R665

10K

402

MF

1/16W

5%

SSCG

2

1

R641

NO STUFF

5%

1/16W

MF

402

10K

2

1

R684

MF

5%

1/16W

402

10K

2

1

R679

5%

1/16W

MF

402

10K

2

1

R678

5%

10K

MF

1/16W

402

SSCG

2

1

R649

10K

402

MF

5%

1/16W

2

1

R651

10K

402

MF

1/16W

5%

NO_SSCG

2

1

R623

402

MF

1/16W

5%

10K

2

1

R677

5%

1/16W

MF

402

10K

2

1

R648

5%

1/16W

MF

402

10K

2

1

R642

NO STUFF

10K

402

MF

1/16W

5%

2

1

R698

5%

1/16W

MF

402

10K

2

1

R643

NO STUFF

5%

1/16W

MF

402

10K

2

1

R668

NO STUFF

10K

402

MF

1/16W

5%

2

1

R667

5%

1/16W

MF

402

10K

2

1

R695

10K

402

MF

1/16W

5%

SSCG

2

1

R626

5%

1/16W

MF

402

10K

2

1

R683

10K

402

MF

1/16W

5%

NO STUFF

2

1

R624

10K

402

MF

1/16W

5%

2

1

R625

5%

1/16W

MF

402

10K

2

1

R655

10K

402

MF

1/16W

5%

2

1

R654

NO STUFF

5%

1/16W

MF

402

10K

2

1

R680

10K

402

MF

1/16W

5%

NO_SSCG

2

1

R696

5%

1/16W

MF

402

10K

SSCG

2

1

R681

5%

1/16W

MF

402

10K

NO_SSCG

2

1

R646

NO STUFF

10K

402

MF

1/16W

5%

2

1

R644

5%

1/16W

MF

402

10K

2

1

R670

NO STUFF

10K

402

MF

1/16W

5%

2

1

R697

NO STUFF

5%

1/16W

MF

402

10K

2

1

R645

NO STUFF

10K

402

MF

1/16W

5%

2

1

R669

5%

1/16W

MF

402

10K

NO STUFF

2

1

R629

5%

1/16W

MF

402

10K

2

1

R658

5%

1/16W

MF

402

10K

2

1

R627

10K

402

MF

1/16W

5%

NO STUFF

2

1

R682

10K

402

MF

1/16W

5%

2

1

R628

5%

1/16W

MF

402

10K

2

1

R657

10K

402

MF

1/16W

5%

2

1

R685

5%

1/16W

MF

402

10K

2

1

R656

10K

402

MF

1/16W

5%

2

1

R146

NO STUFF

0

5%

1/16W

MF

402

21

R140

402

MF

1/16W

5%

0

2

1

R141

0

5%

1/16W

MF

402

21

R128

402

MF

1/16W

5%

0

NO STUFF

21

R147

0

5%

1/16W

MF

402

21

R136

0

5%

1/16W

MF

402

NO STUFF

D28

H25

H26

J25

D27

B28

G25

E25

D26

H24

G24

B27

E28

A28

A31

E27

AK9 AM8

AH9

A32

G27

B31

A29

D11

E12

A8

G20

B20

G19

E19

A9

D19

A20

J19

B19

H19

A19

A18

D18

B18

E18

B8

B17

A17

G18

D17

H18

J18

A16

E17

B16

A15

B9

H17

B15

G17

E16

D16

A13

A14

D15

J16

E15

H11

G16

A12

B14

D14

H15

B13

G15

B12

E14

H14

E11

G14

A11

D13

B11

G13

E13

D12

A10

J13

B10

G12

D10

B30

D29

K25

G28

A30H16

J24

J15

G26

E29 E26

E23

A25

D23

A26

B26

G23

A21

D20

E24

B21

E20

A22

H21

B22

H20

A23

D21

A24

E21

A27

G21

J21

E22

B23

B24

D22

G22

H22

B25

J22

D25

D24

H23

G8

H13

B29

U51

INTREPID-REV2.1

BGA

CRITCAL

21

R152

10K

402

MF

1/16W

5%

21

R150

5%

1/16W

MF

402

10K

21

R151

10K

402

MF

1/16W

5%

81

RP2

SM1

1/16W

5%

10K

54

RP2

SM1

1/16W

5%

10K

72

RP2

SM1

10K

5%

1/16W

72

RP3

SM1

10K

5%

1/16W

81

RP3

SM1

10K

5%

1/16W

63

RP3

SM1

10K

1/16W

5%

54

RP3

SM1

1/16W

5%

10K

63

RP2

SM1

10K

1/16W

5%

051-6338

408

C

CPU_DATA<47>

CPU_DATA<38>

CPU_DATA<34> CPU_DATA<35>

CPU_TSIZ<0>

CPU_GBL_L

SYSCLK_CPU

CPU_QREQ_L

CPU_DBG_L

CPU_BG_L

CPU_AACK_L

CPU_TEA_L

CPU_DRDY_L

CPU_HIT_L

CPU_ARTRY_L

CPU_BR_L

CPU_TS_L

CPU_TA_L

MAXBUS_SLEEP

CPU_DATA<39>

CPU_DATA<37>

CPU_DATA<36>

CPU_DATA<33>

CPU_DATA<55>

CPU_DATA<54>

CPU_DATA<45>

CPU_DATA<43>

CPU_DATA<41>

CPU_DATA<40>

CPU_DATA<53>

CPU_DATA<52>

CPU_DATA<51>

CPU_DATA<50>

CPU_DATA<49>

CPU_DATA<48>

CPU_DATA<63>

CPU_DATA<62>

CPU_DATA<61>

CPU_DATA<60>

CPU_DATA<59>

CPU_DATA<58>

CPU_DATA<57>

CPU_DATA<56>

CPU_DATA<32>

+1_5V_INTREPID_PLL

INT_CPUFB_OUT

INT_CPUFB_OUT_SHORT

INT_CPUFB_IN

INT_CPUFB_OUT_NORM

INT_CPUFB_IN_NORM

INT_CPUFB_LONG

MAXBUS_SLEEP

+1_5V_INTREPID_PLL7

CPU_TEA_L

CPU_TA_L

CPU_DTI<2>

CPU_DTI<1>

CPU_DTI<0>

CPU_DRDY_L

CPU_DBG_L

CPU_DATA<63>

CPU_DATA<61> CPU_DATA<62>

CPU_DATA<60>

CPU_DATA<58> CPU_DATA<59>

CPU_DATA<57>

CPU_DATA<56>

CPU_DATA<55>

CPU_DATA<53> CPU_DATA<54>

CPU_DATA<52>

CPU_DATA<51>

CPU_DATA<48>

CPU_DATA<50>

CPU_DATA<49>

CPU_DATA<47>

CPU_DATA<46>

CPU_DATA<44> CPU_DATA<45>

CPU_DATA<43>

CPU_DATA<41> CPU_DATA<42>

CPU_DATA<40>

CPU_DATA<39>

CPU_DATA<38>

CPU_DATA<37>

CPU_DATA<36>

CPU_DATA<35>

CPU_DATA<34>

CPU_DATA<33>

CPU_DATA<32>

CPU_DATA<30> CPU_DATA<31>

CPU_DATA<29>

CPU_DATA<28>

CPU_DATA<27>

CPU_DATA<25> CPU_DATA<26>

CPU_DATA<24>

CPU_DATA<23>

CPU_DATA<22>

CPU_DATA<20> CPU_DATA<21>

CPU_DATA<19>

CPU_DATA<17> CPU_DATA<18>

CPU_DATA<16>

CPU_DATA<15>

CPU_DATA<14>

CPU_DATA<12> CPU_DATA<13>

CPU_DATA<11>

CPU_DATA<10>

CPU_DATA<7>

CPU_DATA<9>

CPU_DATA<8>

CPU_DATA<6>

CPU_DATA<5>

CPU_DATA<2>

CPU_DATA<4>

CPU_DATA<3>

CPU_DATA<0> CPU_DATA<1>

CPU_BR_L CPU_BG_L

CPU_TS_L

CPU_ADDR<1>

CPU_ADDR<0>

CPU_ADDR<2> CPU_ADDR<3> CPU_ADDR<4> CPU_ADDR<5> CPU_ADDR<6> CPU_ADDR<7> CPU_ADDR<8> CPU_ADDR<9> CPU_ADDR<10>

CPU_ADDR<12>

CPU_ADDR<11>

CPU_ADDR<14>

CPU_ADDR<13>

CPU_ADDR<15> CPU_ADDR<16> CPU_ADDR<17>

CPU_ADDR<19>

CPU_ADDR<18>

CPU_ADDR<20>

CPU_ADDR<22>

CPU_ADDR<21>

CPU_ADDR<24>

CPU_ADDR<23>

CPU_ADDR<25> CPU_ADDR<26> CPU_ADDR<27>

CPU_ADDR<29>

CPU_ADDR<28>

CPU_ADDR<30> CPU_ADDR<31>

CPU_CI_L

CPU_TBST_L

CPU_TSIZ<2>

CPU_TSIZ<1>

CPU_TT<1>

CPU_TT<0>

CPU_TT<2>

CPU_TT<4>

CPU_TT<3>

CPU_WT_L

CPU_AACK_L

CPU_HIT_L

CPU_ARTRY_L

CPU_QREQ_L

CPU_QACK_L INT_SUSPEND_REQ_L INT_SUSPEND_ACK_L

INT_CPUFB_IN INT_CPUFB_OUT SYSCLK_LA_TP

CPU_CLK_EN

SYSCLK_CPU_UF

INTREPID_ACS_REF

CPU_TBEN

MAXBUS_SLEEP

CPU_DATA<42>

CPU_DATA<46>

MAXBUS_SLEEP

CPU_DATA<44>

38

33

16

15

8

36

7

36

38

7

36

7

36

7

36

8

36

35

8

6

8

14

35

6

8

36

8

36

8

36

8

36

35

6

8

6

8

6

5

6

12

8

35

8

35

5

38

5

6

5

29

8

29

35

5

6

5

6

A0 A1

A6

A2 A3 A4 A5

A9

A8

A7

A10 A11 A12 A13 A14 A15 A16

A20

A17 A18 A19

CE OE WE WP PWD

GND

DQ0 DQ1

DQ6

DQ5

DQ2 DQ3 DQ4

DQ7

VPP VCC

FEPR-1MX8

(2 OF 9)

DDR_VREF_1

DDR_VREF_0

DDR_DATA_0 DDR_DATA_1 DDR_DATA_2 DDR_DATA_3 DDR_DATA_4 DDR_DATA_5 DDR_DATA_6 DDR_DATA_7 DDR_DATA_8 DDR_DATA_9 DDR_DATA_10 DDR_DATA_11 DDR_DATA_12 DDR_DATA_13 DDR_DATA_14 DDR_DATA_15 DDR_DATA_16 DDR_DATA_17 DDR_DATA_18 DDR_DATA_19 DDR_DATA_20 DDR_DATA_21

DDR_DATA_25 DDR_DATA_26 DDR_DATA_27 DDR_DATA_28 DDR_DATA_29 DDR_DATA_30

DDR_DATA_33 DDR_DATA_34 DDR_DATA_35 DDR_DATA_36 DDR_DATA_37 DDR_DATA_38 DDR_DATA_39 DDR_DATA_40 DDR_DATA_41 DDR_DATA_42 DDR_DATA_43 DDR_DATA_44 DDR_DATA_45 DDR_DATA_46 DDR_DATA_47 DDR_DATA_48 DDR_DATA_49 DDR_DATA_50 DDR_DATA_51 DDR_DATA_52 DDR_DATA_53 DDR_DATA_54 DDR_DATA_55 DDR_DATA_56 DDR_DATA_57 DDR_DATA_58 DDR_DATA_59 DDR_DATA_60 DDR_DATA_61 DDR_DATA_62 DDR_DATA_63

DDR_DATA_22 DDR_DATA_23 DDR_DATA_24

DDR_DATA_31 DDR_DATA_32

DDR_BA_0 DDR_BA_1

DDRCS_3

DDRCS_2

DDRCS_1

DDRCS_0

DDR_DQS_7

DDR_DQS_6

DDR_DQS_5

DDR_DQS_4

DDR_DQS_3

DDR_DQS_2

DDR_DQS_1

DDR_DQS_0

DDR_DM_7

DDR_DM_6

DDR_DM_5

DDR_DM_4

DDR_DM_3

DDR_DM_2

DDR_DM_1

DDR_DM_0

DDRRAS DDRCAS

DDRWE DDRCKE0 DDRCKE1 DDRCKE2 DDRCKE3

DDR_MCLK_0_P DDR_MCLK_0_N DDR_MCLK_1_P DDR_MCLK_1_N DDR_MCLK_2_P DDR_MCLK_2_N DDR_MCLK_3_P DDR_MCLK_3_N DDR_MCLK_4_P DDR_MCLK_4_N DDR_MCLK_5_P DDR_MCLK_5_N

DDR_REF

DDR_SELHI_0 DDR_SELHI_1 DDR_SELLO_0 DDR_SELLO_1

MEMORY

DDR

INTERFACE

DDR_A_10 DDR_A_11 DDR_A_12

DDR_A_9

DDR_A_8

DDR_A_7

DDR_A_6

DDR_A_5

DDR_A_4

DDR_A_3

DDR_A_2

DDR_A_1

DDR_A_0

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

1MB BOOT ROM

Weak pulldowns ensure CKEs stay low

OVERRIDE ROM MODULE

after 2.5V I/O to Intrepid shuts off.

SERIES RESISTORS FOR CLOCK/CONTROL SIGNALS

PINS ARE SWAPABLE FOR RPAKS

INTERCEPTS ROM CHIP SELECT

MEM_VREF

INT - DDR/BOOTROM

CLOCKS

CS

CKE

ADDR

BA

CNTL

’0’S ARE SAME POLARITY (ACTIVE-LO) ’1’S ARE SAME POLARITY (ACTIVE-HI)

’0’ & ’1’ GO TO SLOT A ’2’ & ’3’ GO TO SLOT B

2

1

R260

INT_2_5V_COLD

10K

5% 1/16W MF 402

2

1

R265

INT_2_5V_COLD

402

MF

1/16W

5%

10K

12

9

11 3130

10

24

3923

35

34

33

32

28

27

26

25

22

7

8

14

15

16

17

18

38

19

37

13

40

1

2

3

4

5

6

36

20

21

U11

TSOP

1MX8-3.3V

21

R176

22

5%

1/16W

MF

402

2

1

R209

1K

1% 1/16W MF 402

2

1

R208

10K

1%

1/16W

MF

402

2

1

C249

0.1uF

20% 10V

CERM

402

2

1

R202

10K

402

MF

1/16W

1%

2

1

C125

2.2uF

20%

805

CERM

10V

2

1

C773

402

CERM

10V

20%

0.1uF

2

1

C122

402

CERM

10V

20%

0.1uF

2

1

R112

5%

10K

1/16W

MF

402

+3V_MAIN

T22

Y22

T32

N30

AE29

AB32

AA22

W35 W36

V33 V32

W32 W33

Y30 W30

Y35 Y36

Y32 Y33

L32

N29

P32

V30

AB30

AD32

AH31

AJ31

L33

N32

T33

T35

AC35

AD33

AH33

AJ33

AG35

AG33

AJ36

K35

K36

J36

K33

AJ35

K32

J35

J33

J32

M30

N33

L36

M33

M35

L35

AJ32

M36

N35

R32

R33

R35

R36

P36

P35

R30

P33

AK36

T36

U35

U36

T30

V35

U32

U33

V36

AB33

AA32

AK35

AC36

AB35

AB36

AA33

AA35

AA36

AD35

AD36

AE33

AE35

AK31

AE36

AF36

AF35

AE32

AG31

AG32

AH32

AH36

AG36

AH35

AK33

AK32

M29

L30

H36

D36

G32

E36

E35

F35

F36

G36

D35

H33

G33

G35

H35

K30

L29

AL33

AL35

AN36

AN34

AL36

AM36

AM35

AN35

H32

U51

CRITICAL

INTREPID-REV2.1

BGA

2

1

R691

402

MF

1/16W

10K

5%

21

R674

1K

5%

1/16W

MF

402

54

RP20

22

5%

1/16W

SM1

63

RP20

SM1

22

5%

1/16W

81

RP22

22

5%

1/16W

SM1

72

RP22

SM1

22

5%

1/16W

72

RP20

SM1

1/16W

5%

22

63

RP22

SM1

1/16W

5%

22

21

R162

22

402

MF

1/16W

5%

81

RP20

SM1

1/16W

5%

22

54

RP22

SM1

1/16W

5%

22

63

RP31

1/16W

5%

22

SM1

63

RP29

1/16W

5%

22

SM1

72

RP31

1/16W

5%

22

SM1

81

RP31

22

5%

1/16W

SM1

54

RP31

22

5%

1/16W

SM1

54

RP29

1/16W

5%

22

SM1

81

RP29

22

5%

1/16W

SM1

72

RP29

22

5%

1/16W

SM1

63

RP14

1/16W

5%

22

SM1

72

RP12

1/16W

5%

22

SM1

81

RP12

1/16W

5%

22

SM1

63

RP12

22

5%

1/16W

SM1

54

RP12

SM1

1/16W

5%

22

72

RP9

22

5%

1/16W

SM1

81

RP9

22

5%

1/16W

SM1

72

RP14

22

5%

1/16W

SM1

54

RP9

22

5%

1/16W

SM1

81

RP14

22

5%

1/16W

SM1

54

RP14

1/16W

5%

22

SM1

54

RP17

22

5%

1/16W

SM1

63

RP9

SM1

1/16W

5%

22

81

RP17

SM1

1/16W

5%

22

72

RP17

SM1

1/16W

5%

22

63

RP17

SM1

1/16W

5%

22

+3V_MAIN

2

1

R247

INT_2_5V_COLD

402

MF

1/16W

5%

10K

2

1

R257

INT_2_5V_COLD

402

MF

1/16W

5%

10K

051-6338

409

C

INT_MEM_VREF

MEM_ADDR<12>

MEM_ADDR<11>

MEM_ADDR<10>

MEM_ADDR<9>

MEM_ADDR<8>

MEM_ADDR<7>

MEM_ADDR<6>

MEM_ADDR<5>

MEM_ADDR<4>

MEM_ADDR<3>

MEM_ADDR<2>

MEM_ADDR<1>

MEM_ADDR<0>

MEM_MUXSEL_LSB

MEM_MUXSEL_MSB_L_TP

INT_MEM_REF_H

INT_DDRCLK5_P_TP INT_DDRCLK5_N_TP

SYSCLK_DDRCLK_B1_L_UF

SYSCLK_DDRCLK_B1_UF

SYSCLK_DDRCLK_B0_L_UF

INT_DDRCLK2_N_TP

SYSCLK_DDRCLK_B0_UF

INT_DDRCLK2_P_TP

SYSCLK_DDRCLK_A1_UF SYSCLK_DDRCLK_A1_L_UF

SYSCLK_DDRCLK_A0_L_UF

SYSCLK_DDRCLK_A0_UF

MEM_CKE<3>

MEM_CKE<2>

MEM_CKE<1>

MEM_CKE<0>

MEM_WE_L

MEM_CAS_L

MEM_RAS_L

MEM_DQM<7>

MEM_DQM<6>

MEM_DQM<5>

MEM_DQM<4>

MEM_DQM<3>

MEM_DQM<1>

MEM_DQM<0>

MEM_DQM<2>

MEM_DQS<7>

MEM_DQS<6>

MEM_DQS<5>

MEM_DQS<4>

MEM_DQS<3>

MEM_DQS<1>

MEM_DQS<0>

MEM_CS_L<2>

MEM_CS_L<1>

MEM_CS_L<0>

MEM_CS_L<3>

MEM_BA<1>

MEM_BA<0>

MEM_DATA<54>

MEM_DATA<31>

MEM_DATA<29>

MEM_DATA<25>

MEM_DATA<24>

MEM_DATA<15>

MEM_DATA<63>

MEM_DATA<62>

MEM_DATA<61>

MEM_DATA<60>

MEM_DATA<59>

MEM_DATA<58>

MEM_DATA<57>

MEM_DATA<56>

MEM_DATA<55>

MEM_DATA<53>

MEM_DATA<52>

MEM_DATA<51>

MEM_DATA<50>

MEM_DATA<49>

MEM_DATA<48>

MEM_DATA<47>

MEM_DATA<46>

MEM_DATA<45>

MEM_DATA<44>

MEM_DATA<43>

MEM_DATA<42>

MEM_DATA<41>

MEM_DATA<40>

MEM_DATA<39>

MEM_DATA<38>

MEM_DATA<37>

MEM_DATA<36>

MEM_DATA<35>

MEM_DATA<34>

MEM_DATA<33>

MEM_DATA<32>

MEM_DATA<30>

MEM_DATA<28>

MEM_DATA<27>

MEM_DATA<26>

MEM_DATA<23>

MEM_DATA<22>

MEM_DATA<21>

MEM_DATA<20>

MEM_DATA<19>

MEM_DATA<18>

MEM_DATA<17>

MEM_DATA<16>

MEM_DATA<14>

MEM_DATA<13>

MEM_DATA<12>

MEM_DATA<11>

MEM_DATA<10>

MEM_DATA<9>

MEM_DATA<8>

MEM_DATA<7>

MEM_DATA<6>

MEM_DATA<5>

MEM_DATA<4>

MEM_DATA<3>

MEM_DATA<2>

MEM_DATA<1>

MEM_DATA<0>

MEM_MUXSEL_LSB_L_TP

MEM_MUXSEL_MSB

INT_MEM_VREF

SYSCLK_DDRCLK_A1_UF

SYSCLK_DDRCLK_A1

SYSCLK_DDRCLK_A0_UF

SYSCLK_DDRCLK_A0

SYSCLK_DDRCLK_A1_L_UF

SYSCLK_DDRCLK_A1_L

SYSCLK_DDRCLK_B1_UF

SYSCLK_DDRCLK_B1

SYSCLK_DDRCLK_B0_UF

SYSCLK_DDRCLK_B0

MEM_CS_L<0> RAM_CS_L<0>

SYSCLK_DDRCLK_A0_L_UF

SYSCLK_DDRCLK_A0_L

SYSCLK_DDRCLK_B1_L_UF

SYSCLK_DDRCLK_B1_L

SYSCLK_DDRCLK_B0_L_UF

SYSCLK_DDRCLK_B0_L

MEM_CS_L<1> RAM_CS_L<1>

MEM_CS_L<2> RAM_CS_L<2>

MEM_CKE<0> RAM_CKE<0>

MEM_CKE<2> RAM_CKE<2>

MEM_CS_L<3> RAM_CS_L<3>

MEM_CKE<1>

MEM_CKE<3> RAM_CKE<3>

MEM_ADDR<0> RAM_ADDR<0>

MEM_ADDR<2>

MEM_ADDR<4> RAM_ADDR<4>

MEM_ADDR<6> RAM_ADDR<6>

MEM_ADDR<1> RAM_ADDR<1>

MEM_ADDR<3>

MEM_ADDR<5> RAM_ADDR<5>

MEM_ADDR<7> RAM_ADDR<7>

MEM_ADDR<8> RAM_ADDR<8>

MEM_ADDR<10> RAM_ADDR<10>

MEM_ADDR<12> RAM_ADDR<12>

MEM_ADDR<9> RAM_ADDR<9>

MEM_ADDR<11> RAM_ADDR<11>

MEM_BA<0> RAM_BA<0>

MEM_BA<1>

RAM_CAS_LMEM_CAS_L

MEM_WE_L RAM_WE_L

RAM_RAS_LMEM_RAS_L

RAM_BA<1>

ROM_CS_L

MEM_DQS<2>

RAM_CKE<1>

RAM_CKE<2>

RAM_CKE<1>

RAM_CKE<0>

RAM_CKE<3>

+2_5V_INTREPID

RAM_ADDR<2>

RAM_ADDR<3>

PCI_AD<31>

PCI_AD<30>

PCI_AD<29>

PCI_AD<28>

PCI_AD<27>

PCI_AD<26>

PCI_AD<25>

PCI_AD<24>

PCI_AD<9>

PCI_AD<8>

PCI_AD<7>

PCI_AD<6>

PCI_AD<5>

PCI_AD<4>

PCI_AD<3>

PCI_AD<20>

PCI_AD<2>

PCI_AD<19>

PCI_AD<18>

PCI_AD<17>

PCI_AD<16>

PCI_AD<15>

PCI_AD<14>

PCI_AD<13>

PCI_AD<12>

PCI_AD<11>

PCI_AD<10>

PCI_AD<1>

PCI_AD<0>

ROM_ONBOARD_CS_L ROM_OE_L ROM_RW_L ROM_WP_L INT_RESET_L

39

37

38

24

35

39

35

16

18

39

38

35

38

35 35

35 11

35 35

35

35 11

35 35

35

35 35

35

35 35

35

35 35

35

24

35

11

15

35

17

39

24

29

9

10

38

9

10

9

10

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9 9

9

11

9

9 9

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

12

10

9

10

11

12

24

12

13

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

16BIT 2:1 DDR MUXES

BIT 48..63BIT 32..47

BIT 16..31

BIT 0..15

SEL = LOW; HOST = B PORT; A PORT = 100OHM TO GND SEL = HIGH; HOST = A PORT; B PORT = 100OHM TO GND

2

1

C727

20% 10V CERM 402

0.1uF

2

1

C745

402

CERM

10V

20%

0.1uF

2

1

C742

20% 10V CERM 402

0.1uF

2

1

C732

20% 10V CERM 402

0.1uF

2

1

C733

402

CERM

10V

20%

0.1uF

2

1

C741

20% 10V CERM 402

0.1uF

2

1

C764

402

CERM

10V

20%

0.1uF

2

1

C734

20% 10V CERM 402

0.1uF

2

1

C726

402

CERM

10V

20%

0.1uF

2

1

C730

20% 10V CERM 402

0.1uF

2

1

C758

20% 10V CERM 402

0.1uF

2

1

C757

20% 10V CERM 402

0.1uF

F8F3E8

E3

H6H5G9G2D9D2C6

C5

E2

C2

B2

B3

B5

B6

B8

B9

C9

E9

F9

H9

J9

J8

J6

J5

J3

J2

H2

F2

E1

C1

A1

A3

A4

A6

B7

A9

B10

D10

F10

H10

K10

K8

K7

K5

J4

K2

J1

G1

D1

B1

A2

B4

A5

A7

A8

A10

C10

E10

G10

J10

K9

J7

K6

K4

K3

K1

H1

F1

U28

CRITICAL

BGA

CBTV4020

F8F3E8

E3

H6H5G9G2D9D2C6

C5

E2

C2

B2

B3

B5

B6

B8

B9

C9

E9

F9

H9

J9

J8

J6

J5

J3

J2

H2

F2

E1

C1

A1

A3

A4

A6

B7

A9

B10

D10

F10

H10

K10

K8

K7

K5

J4

K2

J1

G1

D1

B1

A2

B4

A5

A7

A8

A10

C10

E10

G10

J10

K9

J7

K6

K4

K3

K1

H1

F1

U27

CRITICAL

BGA

CBTV4020

F8F3E8

E3

H6H5G9G2D9D2C6

C5

E2

C2

B2

B3

B5

B6

B8

B9

C9

E9

F9

H9

J9

J8

J6

J5

J3

J2

H2

F2

E1

C1

A1

A3

A4

A6

B7

A9

B10

D10

F10

H10

K10

K8

K7

K5

J4

K2

J1

G1

D1

B1

A2

B4

A5

A7

A8

A10

C10

E10

G10

J10

K9

J7

K6

K4

K3

K1

H1

F1

U18

CBTV4020

BGA

CRITICAL

F8F3E8

E3

H6H5G9G2D9D2C6

C5

E2

C2

B2

B3

B5

B6

B8

B9

C9

E9

F9

H9

J9

J8

J6

J5

J3

J2

H2

F2

E1

C1

A1

A3

A4

A6

B7

A9

B10

D10

F10

H10

K10

K8

K7

K5

J4

K2

J1

G1

D1

B1

A2

B4

A5

A7

A8

A10

C10

E10

G10

J10

K9

J7

K6

K4

K3

K1

H1

F1

U16

CBTV4020

BGA

CRITICAL

C

4010

051-6338

RAM_DATA_B<13>

MEM_DQS<3>

MEM_DATA<31>

RAM_DATA_B<25>

RAM_DATA_B<45>

RAM_DATA_B<47>

MEM_DATA<5>

MEM_DATA<7>

+2_5V_INTREPID +2_5V_INTREPID

+2_5V_INTREPID

RAM_DATA_A<57>

MEM_DQM<7>

RAM_DATA_A<56>

RAM_DATA_A<48>

RAM_DATA_A<50> RAM_DATA_A<51>

RAM_DATA_A<49>

RAM_DATA_A<53>

RAM_DATA_A<52>

RAM_DATA_A<54> RAM_DATA_A<55> RAM_DQS_A<6> RAM_DQM_A<6>

MEM_MUXSEL_MSB

MEM_DATA<63>

MEM_DQS<7>

MEM_DATA<62>

MEM_DATA<60> MEM_DATA<61>

MEM_DATA<57> MEM_DATA<58> MEM_DATA<59>

MEM_DATA<56>

MEM_DQM<6>

MEM_DATA<55>

MEM_DATA<54>

MEM_DQS<6>

MEM_DATA<52> MEM_DATA<53>

MEM_DATA<50>

MEM_DATA<49>

MEM_DATA<51>

RAM_DQM_A<7>

MEM_DATA<48>

RAM_DQS_A<7>

RAM_DATA_A<62> RAM_DATA_A<63>

RAM_DATA_A<60> RAM_DATA_A<61>

RAM_DATA_A<59>

RAM_DATA_A<58>

RAM_DATA_B<59> RAM_DATA_B<60> RAM_DATA_B<61> RAM_DATA_B<62> RAM_DATA_B<63> RAM_DQS_B<7> RAM_DQM_B<7>

RAM_DATA_B<53> RAM_DATA_B<54> RAM_DATA_B<55>

RAM_DATA_B<51> RAM_DATA_B<52>

RAM_DQS_B<6> RAM_DQM_B<6> RAM_DATA_B<56> RAM_DATA_B<57> RAM_DATA_B<58>

RAM_DATA_B<50>

RAM_DATA_B<49>

RAM_DATA_B<48>RAM_DATA_A<41>

MEM_DQM<5>

RAM_DATA_A<40>

RAM_DATA_A<32>

RAM_DATA_A<34> RAM_DATA_A<35>

RAM_DATA_A<33>

RAM_DATA_A<37>

RAM_DATA_A<36>

RAM_DATA_A<38> RAM_DATA_A<39> RAM_DQS_A<4> RAM_DQM_A<4>

MEM_MUXSEL_MSB

MEM_DATA<47>

MEM_DQS<5>

MEM_DATA<46>

MEM_DATA<44> MEM_DATA<45>

MEM_DATA<41> MEM_DATA<42> MEM_DATA<43>

MEM_DATA<40>

MEM_DQM<4>

MEM_DATA<39>

MEM_DATA<38>

MEM_DQS<4>

MEM_DATA<36> MEM_DATA<37>

MEM_DATA<34>

MEM_DATA<33>

MEM_DATA<35>

RAM_DQM_A<5>

MEM_DATA<32>

RAM_DQS_A<5>

RAM_DATA_A<46> RAM_DATA_A<47>

RAM_DATA_A<44> RAM_DATA_A<45>

RAM_DATA_A<43>

RAM_DATA_A<42>

RAM_DATA_B<43> RAM_DATA_B<44>

RAM_DATA_B<46>

RAM_DQS_B<5> RAM_DQM_B<5>

RAM_DATA_B<37> RAM_DATA_B<38> RAM_DATA_B<39>

RAM_DATA_B<35> RAM_DATA_B<36>

RAM_DQS_B<4> RAM_DQM_B<4> RAM_DATA_B<40> RAM_DATA_B<41> RAM_DATA_B<42>

RAM_DATA_B<34>

RAM_DATA_B<33>

RAM_DATA_B<32>

RAM_DATA_A<25>

MEM_DQM<3>

RAM_DATA_A<24>

RAM_DATA_A<16>

RAM_DATA_A<18> RAM_DATA_A<19>

RAM_DATA_A<17>

RAM_DATA_A<21>

RAM_DATA_A<20>

RAM_DATA_A<22> RAM_DATA_A<23> RAM_DQS_A<2> RAM_DQM_A<2>

MEM_MUXSEL_LSB

MEM_DATA<30>

MEM_DATA<28> MEM_DATA<29>

MEM_DATA<25> MEM_DATA<26> MEM_DATA<27>

MEM_DATA<24>

MEM_DQM<2>

MEM_DATA<23>

MEM_DATA<22>

MEM_DQS<2>

MEM_DATA<20> MEM_DATA<21>

MEM_DATA<18>

MEM_DATA<17>

MEM_DATA<19>

RAM_DQM_A<3>

MEM_DATA<16>

RAM_DQS_A<3>

RAM_DATA_A<30> RAM_DATA_A<31>

RAM_DATA_A<28> RAM_DATA_A<29>

RAM_DATA_A<27>

RAM_DATA_A<26>

RAM_DATA_B<27> RAM_DATA_B<28> RAM_DATA_B<29> RAM_DATA_B<30> RAM_DATA_B<31> RAM_DQS_B<3> RAM_DQM_B<3>

RAM_DATA_B<21> RAM_DATA_B<22> RAM_DATA_B<23>

RAM_DATA_B<19> RAM_DATA_B<20>

RAM_DQS_B<2> RAM_DQM_B<2> RAM_DATA_B<24>

RAM_DATA_B<26>

RAM_DATA_B<18>

RAM_DATA_B<17>

RAM_DATA_B<16>

RAM_DATA_A<9>

MEM_DQM<1>

RAM_DATA_A<8>

RAM_DATA_A<0>

RAM_DATA_A<2> RAM_DATA_A<3>

RAM_DATA_A<1>

RAM_DATA_A<5>

RAM_DATA_A<4>

RAM_DATA_A<6> RAM_DATA_A<7> RAM_DQS_A<0> RAM_DQM_A<0>

MEM_MUXSEL_LSB

MEM_DATA<15>

MEM_DQS<1>

MEM_DATA<14>

MEM_DATA<12> MEM_DATA<13>

MEM_DATA<9> MEM_DATA<10> MEM_DATA<11>

MEM_DATA<8>

MEM_DQM<0>

MEM_DATA<6>

MEM_DQS<0>

MEM_DATA<4>

MEM_DATA<2>

MEM_DATA<1>

MEM_DATA<3>

RAM_DQM_A<1>

MEM_DATA<0>

RAM_DQS_A<1>

RAM_DATA_A<14> RAM_DATA_A<15>

RAM_DATA_A<12> RAM_DATA_A<13>

RAM_DATA_A<11>

RAM_DATA_A<10>

RAM_DATA_B<11> RAM_DATA_B<12>

RAM_DATA_B<14> RAM_DATA_B<15> RAM_DQS_B<1> RAM_DQM_B<1>

RAM_DATA_B<5> RAM_DATA_B<6> RAM_DATA_B<7>

RAM_DATA_B<3> RAM_DATA_B<4>

RAM_DQS_B<0> RAM_DQM_B<0> RAM_DATA_B<8> RAM_DATA_B<9> RAM_DATA_B<10>

RAM_DATA_B<2>

RAM_DATA_B<1>

RAM_DATA_B<0>

38 38

38

16 16

16

15 15

15

35 35

35

10 10

10

35

10

35

35 35

35

10

35

10

35

10

35

11

9

11

9

9 9

9

11

9

11

9

11

9

11

11 11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

DQ58

RFU18

KEY

VDD6 VSS6 VSS8

VDD5

DQ15

DQ13

DQ14

VSS5

DM1

VDD3

VSS3

DQ7

DQ12

DQ6

DM0

DQ4 DQ5

VSS1

VREF1

VDD1

SA1 SA2

RFU19

SA0

VDD32

DQ63

DQ62

VSS32

DQ61

VDD30

DQ60

DQ55

DM7

VSS30

DQ54

DM6

VDD28

DQ53

DQ52

VDD25

CK1*

CK1

VSS28

DQ47

DQ46

VDD23

VSS25

DM5

DQ45

DQ44

DM4

DQ39

VSS23

DQ38

DQ37

RFU17

DQ36

VSS21

VDD21

VDD19

RAS*

BA1

CAS*

S1*

A6 A4 A2 A0

VSS19

A8

A11

VDD17

RFU15

CKE0

VDD15

VSS17

RFU11 VSS16

RFU9

VDD14

RFU3

VSS14

RFU5 RFU7

RFU1

VDD12

VSS12

DM3

DQ31

DQ30

DQ29

VSS10

VDD10

DQ28

DQ23

DM2

DQ20

VDD8

DQ21

DQ22

VDDSPD

SCL

SDA

VDD31

VSS31

DQ59

DQS7

DQ51

VDD29

DQ56

VSS29

DQ57

DQ48

DQS6

VDD27

DQ49

DQ50

DQ43

VSS26

VDD26

VDD24

VSS27

DQ41 DQS5 VSS24

VDD22

DQ42

DQ34 VSS22 DQ35

DQS4

DQ40

VDD20

RFU16

DQ32

VSS20

DQ33

S0*

VDD18

BA0

A10_AP

WE*

A1

A5 A3

A9

A7

VSS18

CKE1 RFU14

RFU13 VDD16

VDD13

VSS15

RFU10

RFU8

RFU12

RFU0

RFU4

VSS13

RFU2

RFU6

VSS11 DQ26 DQ27

DQS3

VDD11

DQ19 DQ24 VDD9

VSS9

DQ25

DQ18

DQ16

VDD7

DQ17

DQS2

DQ11 VDD4

VSS7

CK0*

CK0

DQS1 VSS4 DQ10

VDD2 DQ9

DQ2

DQS0

DQ8

DQ3

VSS2

VDD0

DQ0 DQ1

VSS0

VREF0

A12

(1 OF 2)(2 OF 2)

DQ58

RFU18

KEY

VDD6 VSS6 VSS8

VDD5

DQ15

DQ13

DQ14

VSS5

DM1

VDD3

VSS3

DQ7

DQ12

DQ6

DM0

DQ4 DQ5

VSS1

VREF1

VDD1

SA1 SA2

RFU19

SA0

VDD32

DQ63

DQ62

VSS32

DQ61

VDD30

DQ60

DQ55

DM7

VSS30

DQ54

DM6

VDD28

DQ53

DQ52

VDD25

CK1*

CK1

VSS28

DQ47

DQ46

VDD23

VSS25

DM5

DQ45

DQ44

DM4

DQ39

VSS23

DQ38

DQ37

RFU17

DQ36

VSS21

VDD21

VDD19

RAS*

BA1

CAS*

S1*

A6 A4 A2 A0

VSS19

A8

A11

VDD17

RFU15

CKE0

VDD15

VSS17

RFU11 VSS16

RFU9

VDD14

RFU3

VSS14

RFU5 RFU7

RFU1

VDD12

VSS12

DM3

DQ31

DQ30

DQ29

VSS10

VDD10

DQ28

DQ23

DM2

DQ20

VDD8

DQ21

DQ22

VDDSPD

SCL

SDA

VDD31

VSS31

DQ59

DQS7

DQ51

VDD29

DQ56

VSS29

DQ57

DQ48

DQS6

VDD27

DQ49

DQ50

DQ43

VSS26

VDD26

VDD24

VSS27

DQ41 DQS5 VSS24

VDD22

DQ42

DQ34 VSS22 DQ35

DQS4

DQ40

VDD20

RFU16

DQ32

VSS20

DQ33

S0*

VDD18

BA0

A10_AP

WE*

A1

A5 A3

A9

A7

VSS18

CKE1 RFU14

RFU13 VDD16

VDD13

VSS15

RFU10

RFU8

RFU12

RFU0

RFU4

VSS13

RFU2

RFU6

VSS11 DQ26 DQ27

DQS3

VDD11

DQ19 DQ24 VDD9

VSS9

DQ25

DQ18

DQ16

VDD7

DQ17

DQS2

DQ11 VDD4

VSS7

CK0*

CK0

DQS1 VSS4 DQ10

VDD2 DQ9

DQ2

DQS0

DQ8

DQ3

VSS2

VDD0

DQ0 DQ1

VSS0

VREF0

A12

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NCNC

NC

NCNC

on the PCB for additional mounting

NOTE: The SODIMM connector footprint has a through-hole slot

NC NC

NC

ADDR=0XA0(WR)/0XA1(RD)

NC

NC NC

NC

SLOT "A" LOWER SLOT

FACTORY SLOT

NC

ADDR=0XA2(WR)/0XA3(RD)

SLOT "B" UPPER SLOT

CUSTOMER SLOT

NC

NC NC

NC

NC NC

NC

DDR SODIMM CONNS

SLOT "B"

SLOT "A"

DDR BYPASS

DDR VREF

ONE 0.1UF PER SLOT

2

1

C140

0.1uF

20% 10V

402

CERM

2

1

C156

0.1uF

20% 10V

402

CERM

2

1

C132

0.1uF

10V 402

CERM

20%

119B

51B

40B39B

38B

28B27B

16B

186B185B

174B

15B

173B

162B161B

159B

150B149B

138B137B

126B125B

4B

104B103B

90B

88B87B

76B75B

64B63B

52B

3B

2B1B

197B

57B

46B45B

36B

34B33B

22B

192B191B

180B

21B

179B

168B167B

157B

156B155B

144B143B

132B131B

10B

114B113B

94B93B

92B

82B81B

70B69B

58B

9B

193B 195B

198B

196B

194B

122B121B

84B83B

80B79B

78B77B

74B73B

72B

200B199B

124B123B

98B97B

91B

89B

86B85B

71B

118B

402

401

183B

169B

147B

133B

61B

47B

25B

11B

23B

19B

18B

14B

190B

188B

182B

178B

8B

189B

187B

181B

177B

176B

172B

166B

164B

175B

171B

6B

165B

163B

154B

152B

146B

142B

153B

151B

145B

141B

17B

140B

136B

130B

128B

139B

135B

129B

127B

68B

66B

13B

60B

56B

67B

65B

59B

55B

54B

50B

44B

42B

7B

53B

49B

43B

41B

32B

30B

24B

20B

31B

29B

5B

184B

170B

148B

134B

62B

48B

26B

12B

95B 96B

158B 160B

37B

35B

120B

116B

117B

101B 102B

105B 106B 107B 108B 109B 110B 111B

99B

100B

115B

112B

J25

CRITICAL

F-RT-SM

DDR-SO-DIMM-DUAL

119A

51A

40A39A

38A

28A27A

16A

186A185A

174A

15A

173A

162A161A

159A

150A149A

138A137A

126A125A

4A

104A103A

90A

88A87A

76A75A

64A63A

52A

3A

2A1A

197A

57A

46A45A

36A

34A33A

22A

192A191A

180A

21A

179A

168A167A

157A

156A155A

144A143A

132A131A

10A

114A113A

94A93A

92A

82A81A

70A69A

58A

9A

193A 195A

198A

196A

194A

122A121A

84A83A

80A79A

78A77A

74A73A

72A

200A199A

124A123A

98A97A

91A

89A

86A85A

71A

118A

404

403

183A

169A

147A

133A

61A

47A

25A

11A

23A

19A

18A

14A

190A

188A

182A

178A

8A

189A

187A

181A

177A

176A

172A

166A

164A

175A

171A

6A

165A

163A

154A

152A

146A

142A

153A

151A

145A

141A

17A

140A

136A

130A

128A

139A

135A

129A

127A

68A

66A

13A

60A

56A

67A

65A

59A

55A

54A

50A

44A

42A

7A

53A

49A

43A

41A

32A

30A

24A

20A

31A

29A

5A

184A

170A

148A

134A

62A

48A

26A

12A

95A 96A

158A 160A

37A

35A

120A

116A

117A

101A 102A

105A 106A 107A 108A 109A 110A 111A

99A

100A

115A

112A

J25

CRITICAL

F-RT-SM

DDR-SO-DIMM-DUAL

2

1

C404

10uF

20%

6.3V CERM 805

2

1

C128

10uF

20%

6.3V CERM 805

2

1

R299

402

MF

1/16W

1%

1K

2

1

R303

1K

1% 1/16W MF 402

2

1

C397

0.1uF

402

CERM

10V

20%

2

1

C403

0.1uF

20% 10V CERM 402

+2_5V_MAIN+2_5V_MAIN

+2_5V_MAIN

+2_5V_MAIN+2_5V_MAIN

+3V_MAIN +3V_MAIN

+3V_MAIN

2

1

C169

CERM 402

10V

20%

0.1uF

2

1

C391

0.1uF

10V 402

CERM

20%

2

1

C356

20% CERM

402

10V

0.1uF

2

1

C211

0.1uF

20% 10V

402

CERM

2

1

C127

0.1uF

20% 10V

402

CERM

+2_5V_MAIN

2

1

C174

10uF

805

CERM

6.3V

20%

2

1

C150

20% CERM

402

10V

0.1uF

2

1

C157

10uF

805

CERM

6.3V

20%

2

1

C383

0.1uF

20% 10V

402

CERM

051-6338

11 40

C

RAM_DATA_B<37>

RAM_DATA_B<63>

RAM_DATA_B<62>

RAM_DQM_B<7>

RAM_DATA_B<61>

RAM_DATA_B<60>

RAM_DATA_B<55>

RAM_DATA_B<54>

RAM_DQM_B<6>

RAM_DATA_B<53>

RAM_DATA_B<52>

SYSCLK_DDRCLK_B1

SYSCLK_DDRCLK_B1_L

RAM_DATA_B<47>

RAM_DATA_B<46>

RAM_DQM_B<5>

RAM_DATA_B<45>

RAM_DATA_B<44>

RAM_DATA_B<39>

RAM_DATA_B<38>

RAM_DQM_B<4>

RAM_DATA_B<36>

RAM_CS_L<3>

RAM_CAS_L

RAM_RAS_L

RAM_BA<1>

RAM_ADDR<0>

RAM_ADDR<2>

RAM_ADDR<4>

RAM_ADDR<6>

RAM_ADDR<8>

RAM_ADDR<11>

RAM_CKE<2>

RAM_DATA_B<31>

RAM_DATA_B<30>

RAM_DQM_B<3>

RAM_DATA_B<29>

RAM_DATA_B<28>

RAM_DATA_B<22>

RAM_DQM_B<2>

RAM_DATA_B<21>

RAM_DATA_B<20>

RAM_DATA_B<15>

RAM_DATA_B<14>

RAM_DQM_B<1>

RAM_DATA_B<13>

RAM_DATA_B<12>

RAM_DATA_B<7>

RAM_DATA_B<6>

RAM_DQM_B<0>

RAM_DATA_B<5>

RAM_DATA_B<4>

DDR_VREF

INT_I2C_CLK0

INT_I2C_DATA0

RAM_DATA_B<59>

RAM_DATA_B<58>

RAM_DQS_B<7>

RAM_DATA_B<57>

RAM_DATA_B<56>

RAM_DATA_B<51>

RAM_DATA_B<50>

RAM_DQS_B<6>

RAM_DATA_B<49>

RAM_DATA_B<48>

RAM_DATA_B<43>

RAM_DATA_B<42>

RAM_DQS_B<5>

RAM_DATA_B<41>

RAM_DATA_B<40>

RAM_DATA_B<35>

RAM_DATA_B<34>

RAM_DQS_B<4>

RAM_DATA_B<33>

RAM_DATA_B<32>

RAM_CS_L<2>

RAM_WE_L

RAM_BA<0>

RAM_ADDR<10>

RAM_ADDR<1>

RAM_ADDR<3>

RAM_ADDR<5>

RAM_ADDR<7>

RAM_ADDR<9>

RAM_ADDR<12>

RAM_CKE<3>

RAM_DATA_B<27>

RAM_DATA_B<26>

RAM_DQS_B<3>

RAM_DATA_B<25>

RAM_DATA_B<24>

RAM_DATA_B<19>

RAM_DATA_B<18>

RAM_DQS_B<2>

RAM_DATA_B<17>

RAM_DATA_B<16>

SYSCLK_DDRCLK_B0_L

SYSCLK_DDRCLK_B0

RAM_DATA_B<11>

RAM_DATA_B<10>

RAM_DQS_B<1>

RAM_DATA_B<9>

RAM_DATA_B<8>

RAM_DATA_B<3>

RAM_DATA_B<2>

RAM_DQS_B<0>

RAM_DATA_B<1>

RAM_DATA_B<0>

DDR_VREF

RAM_DATA_B<23>

RAM_DATA_A<38>

RAM_DQM_A<4>

RAM_BA<1>

RAM_DATA_A<28>

RAM_DATA_A<15>

RAM_DATA_A<63>

RAM_DATA_A<62>

RAM_DQM_A<7>

RAM_DATA_A<61>

RAM_DATA_A<60>

RAM_DATA_A<55>

RAM_DATA_A<54>

RAM_DQM_A<6>

RAM_DATA_A<53>

RAM_DATA_A<52>

SYSCLK_DDRCLK_A1

SYSCLK_DDRCLK_A1_L

RAM_DATA_A<47>

RAM_DATA_A<46>

RAM_DQM_A<5>

RAM_DATA_A<45>

RAM_DATA_A<44>

RAM_DATA_A<39>

RAM_DATA_A<37>

RAM_DATA_A<36>

RAM_CS_L<1>

RAM_CAS_L

RAM_ADDR<0>

RAM_ADDR<2>

RAM_ADDR<4>

RAM_ADDR<6>

RAM_ADDR<8>

RAM_ADDR<11>

RAM_CKE<0>

RAM_DATA_A<31>

RAM_DATA_A<30>

RAM_DQM_A<3>

RAM_DATA_A<29>

RAM_DATA_A<23>

RAM_DQM_A<2>

RAM_DATA_A<21>

RAM_DATA_A<20>

RAM_DATA_A<14>

RAM_DQM_A<1>

RAM_DATA_A<13>

RAM_DATA_A<12>

RAM_DATA_A<7>

RAM_DATA_A<6>

RAM_DQM_A<0>

RAM_DATA_A<5>

RAM_DATA_A<4>

DDR_VREF

RAM_DATA_A<56>

RAM_DATA_A<50>

INT_I2C_CLK0

INT_I2C_DATA0

RAM_DATA_A<59>

RAM_DATA_A<58>

RAM_DQS_A<7>

RAM_DATA_A<57>

RAM_DATA_A<51>

RAM_DQS_A<6>

RAM_DATA_A<49>

RAM_DATA_A<48>

RAM_DATA_A<43>

RAM_DATA_A<42>

RAM_DQS_A<5>

RAM_DATA_A<41>

RAM_DATA_A<40>

RAM_DATA_A<35>

RAM_DATA_A<34>

RAM_DQS_A<4>

RAM_DATA_A<33>

RAM_DATA_A<32>

RAM_CS_L<0>

RAM_WE_L

RAM_BA<0>

RAM_ADDR<10>

RAM_ADDR<1>

RAM_ADDR<3>

RAM_ADDR<5>

RAM_ADDR<7>

RAM_ADDR<9>

RAM_ADDR<12>

RAM_CKE<1>

RAM_DATA_A<27>

RAM_DATA_A<26>

RAM_DQS_A<3>

RAM_DATA_A<25>

RAM_DATA_A<24>

RAM_DATA_A<19>

RAM_DATA_A<18>

RAM_DQS_A<2>

RAM_DATA_A<17>

RAM_DATA_A<16>

SYSCLK_DDRCLK_A0_L

SYSCLK_DDRCLK_A0

RAM_DATA_A<11>

RAM_DATA_A<10>

RAM_DQS_A<1>

RAM_DATA_A<9>

RAM_DATA_A<8>

RAM_DATA_A<3>

RAM_DATA_A<2>

RAM_DQS_A<0>

RAM_DATA_A<1>

RAM_DATA_A<0>

RAM_RAS_L

RAM_DATA_A<22>

DDR_VREF

39

23

35

13

35

13

35

11

35

38

11

35

11

35

38

35

11

35

11

35

38

35

11

35

11

35

11

35

38

10

9

10

9

10

11

6

10

9

10

9

10

11

10

9

10

9

10

9

10

11

10

6

10

9

10

9

10

9

10

11

(PLL4)

VDD15A_6

(PLL4) VSSA_6

ROM_WE

ROM_OE

PCI_STOP PCI_DEVSEL

PCI_CBE_3

PCI_CBE_2

PCI_CBE_1

PCI_CBE_0

ROM_CS

PCI_CLK_IN

PCI_CLK_OUT

PCI_CLK2

PCI_CLK1

PCI_CLK0

PCI_FRAME

PCI_PAR

PCI_TRDY PCI_IRDY

PCI_REQ_2

PCI_REQ_1

PCI_REQ_0

PCI_GNT_0 PCI_GNT_1 PCI_GNT_2

PCI/ROM

INTERFACE

PCIAD_31

PCIAD_30

PCIAD_28

PCIAD_27

PCIAD_26

PCIAD_25

PCIAD_29

PCIAD_19

PCIAD_18

PCIAD_17

PCIAD_16

PCIAD_15

PCIAD_23 PCIAD_24

PCIAD_20 PCIAD_21 PCIAD_22

PCIAD_14

(7 OF 9)

PCIAD_11

PCIAD_10

PCIAD_12 PCIAD_13

PCIAD_9

PCIAD_6

PCIAD_5

PCIAD_7 PCIAD_8

PCIAD_4

PCIAD_3

PCIAD_1 PCIAD_2

PCIAD_0

ROM_OVRLY_EN

VSSA_5 (PLL5)

(PLL5)

VDD15A_5

STP_AGP AGPPVT AGPVREF0 AGPVREF1

AGP_BUSY AGP_CLK AGP_FB_IN AGP_FB_OUT

AGPAD0

AGPREQ AGPGNT

AGP_SBA3

AGP_SBA2

AGP_SBA1

AGP_SBA0

AGPCBE_3

AGPFRAME

AGPTRDY AGPIRDY AGPSTOP

AGPDEVSEL

AGPPAR

AGPAD31

AGPAD30

AGPCBE_0 AGPCBE_1 AGPCBE_2

AGP_ST2

AGP_AD_STB0_P AGP_AD_STB0_N AGP_AD_STB1_P AGP_AD_STB1_N

AGPPIPE

AGPRBF

AGP_ST1

AGP_SBA7

AGP_SB_STB_P AGP_SB_STB_N

AGP_ST0

AGP_WBF

AGP

INTERFACES

AGP_SBA6

AGP_SBA5

AGP_SBA4

AGPAD29

AGPAD28

AGPAD27

AGPAD26

AGPAD25

AGPAD24

AGPAD23

AGPAD22

AGPAD21

AGPAD20

AGPAD19

AGPAD18

AGPAD17

AGPAD16

AGPAD15

AGPAD14

AGPAD13

AGPAD12

AGPAD11

AGPAD10

AGPAD9

AGPAD8

AGPAD7

AGPAD6

AGPAD5

AGPAD4

AGPAD3

AGPAD2

AGPAD1

(3 OF 9)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

VIN = 1.5V

VOUT = 3.3V

PCI PULL-UPS

NOTE: Designs using AGP slot should

SIMPLY PROVIDING REFERENCE TO CHIP BECAUSE SINGLE AGP PWR PLANE AND CLOSE PROXIMITY OF CHIPS

AGP I/O REFERENCE

(PLACE CLOSE TO INTREPID AGP BALLS)

Vin = Vcore (1.5V)

PLACE CLOSE TO INTREPID SIDE

SERIES RESISTORS FOR BOOTROM CONTROL SIGNALS

AGP PULL-UPS/PULL DOWNS

INTREPID AGP/PCI

Vout = AGPIO (1.5V)

AGP_FB_CLK IS ROUTED THE SAME LENGTH AS CLK66M_GPU_AGP

LONGEST PCI CLOCK ROUTE

INTREPID

PLACE NEAR

PCI FEEDBACK CLOCK MATCHES

use 52-ohm a resistor here.

BECAUSE THIS CHIP IS POWERED DURING SLEEP

NEC USB2 REQ REMAINS ON +3V_MAIN

402

4.7

5%

1/16W

MF

21

R197

402

5%

1/16W

MF

0

21

R246

60.4

402

MF

1/16W

1%

2

1

R245

SM1

1/16W

5%

10K

63

RP34

MF

1/16W

5%

4.7

402

21

R167

CERM

6.3V

20%

402

0.22uF

2

1

C190

INTREPID-REV2.1

BGA

CRITICAL

J10

J11

AN9

AK17

AR7

AM9

AT15

AR15

AT17

AR16

AR17

AT14

AH16

AN17

AN18

AT16

AN16

AM17

AM18 AJ19

AT18

AH18

AR18

AJ15

AM16

AK16

AR14

AR9

AK13

AH13

AN11

AT8

AN10

AM15

AN15

AJ8

AK14

AT13

AN14

AH15

AK15

AR13

AM11

AT12

AJ11

AR12

AK12

AM13

AN13

AT10

AT11

AK11

AN12

AM12

AR11

AT9

AR10

AR8

AM10

U51

33

402

MF

1/16W

5%

21

R272

33

5%

1/16W

MF

402

21

R230

402

5%

1/16W

MF

33

21

R264

47

5% 1/16W MF 402

2

1

R244

+3V_SLEEP

SM1

10K

5%

1/16W

72

RP33

SM1

10K

5%

1/16W

54

RP33

SM1

5%

10K

1/16W

54

RP36

SM1

1/16W

5%

10K

63

RP36

SM1

10K

5%

1/16W

81

RP36

SM1

1/16W

5%

10K

72

RP36

10K

5%

1/16W

SM1

63

RP33

SM1

1/16W

5%

10K

81

RP33

402

MF

1/16W

5%

22

21

R282

402

MF

1/16W

5%

22

21

R278

402

MF

1/16W

5%

22

21

R277

402

MF

1/16W

5%

33

21

R252

1/16W

5% MF

402

22

21

R273

NO STUFF

12PF

5%

50V

CERM

402

2

1

C311

NO STUFF

402

CERM

50V

5%

12PF

2

1

C362

NO STUFF

402

CERM

50V

5%

12PF

2

1

C372

10K

5%

1/16W

402

MF

21

R553

402

MF

1/16W

5%

10K

21

R318

10K

5%

1/16W

MF

402

21

R316

10K

5%

1/16W

MF

402

21

R314

10K

5%

1/16W

MF

402

21

R317

10K

5%

1/16W

MF

402

21

R552

10K

5%

1/16W

MF

402

21

R334

10K

5%

1/16W

MF

402

21

R308

+3V_MAIN

402

MF

1/16W

5%

10K

21

R255

402

MF

1/16W

10K

5%

21

R239

10K

5%

1/16W

MF

402

21

R254

402

MF

1/16W

5%

10K

21

R256

10K

5%

1/16W

MF

402

21

R253

402

MF

1/16W

10K

5%

21

R235

4.99K

1%

1/16W

MF

402

2

1

R225

4.99K

1%

1/16W

MF

402

2

1

R219

6.3V 402

CERM

20%

0.22uF

2

1

C291

SM1

1/16W

10K

5%

81

RP34

SM1

1/16W

5%

10K

54

RP34

SM1

1/16W

5%

10K

72

RP34

INTREPID-REV2.1

BGA

CRITICAL

V13

V14

AN19

AK30

AR30

AT30

AN29

AH25 AG25

AN30

AM30

AT31

AR31

AN31

AM31

AR32

AT32

AK25

AK27

AK28

AT19

AK21 AK22

AK20 AK19

AB21

AB20

AR29

AM28

AT33

AK24

AJ24

AJ29

AT29

AT28

AM29

AN28

AM27

AL25

AN24

AT23

AM20

AT22

AM21

AN21

AR21

AN20

AT21

AN27

AR28

AR20

AT27

AR27

AM26

AN26

AM25

AT26

AR26

AL24

AN25

AM24

AT20

AR25

AT25

AR24

AM23

AT24

AR23

AN23

AM22

AN22

AR22

AM19

AR19

U51

402

20%

6.3V CERM

0.22uF

2

1

C270

4012

051-6338

C

PCI_IRDY_L

CBUS_PCI_REQ_L

PCI_TRDY_L

NEC_PCI_REQ_L

AGP_AD<20>

AGP_GNT_L

AGP_AD<21>

AIRPORT_PCI_REQ_L

CLK33M_NEC_UF

CLK33M_CBUS

+1_5V_INTREPID_PLL

CLK33M_NEC

CLK33M_CBUS_UF

CLK33M_AIRPORT

CLK33M_AIRPORT_UF

+1_5V_INTREPID_PLL6

STOP_AGP_L

+3V_GPU

AGP_BUSY_L

AGP_RBF_L

+1_5V_AGP

AGP_DEVSEL_L

AGP_FRAME_L

AGP_AD<13>

AGP_AD<9>

AGP_AD<6>

AGP_AD<28>

PCI_AD<19>

AGP_PIPE_L

AGP_STOP_L

AGP_AD<17>

AGP_TRDY_L

AGP_AD<7> AGP_AD<8>

AGP_AD<5>

INT_PCI_FB_IN

CLK66M_GPU_AGP_UF

CLK66M_GPU_AGP

CLK66M_AGP_1_5V_TP

AGP_BUSY_L

INT_AGP_FB_IN INT_AGP_FB_OUT

AGP_SB_STB_L

AGP_AD_STB_L<1>

AGP_SB_STB

AGP_AD_STB<0>

AGP_WBF_L

AGP_IRDY_L

AGP_AD_STB_L<0>

AGP_AD_STB<1>

AGP_REQ_L

INT_ROM_RW_L

ROM_RW_L

INT_ROM_CS_L

ROM_CS_L

INT_ROM_OE_L

ROM_OE_L

+1_5V_INTREPID_PLL

AGP_WBF_L

AGP_RBF_L

AGP_PIPE_L

AGP_AD_STB_L<0>

AGP_AD_STB<0>

AGP_AD_STB_L<1>

AGP_AD_STB<1>

AGP_ST<1> AGP_ST<2>

AGP_ST<0>

AGP_SB_STB_L

AGP_SB_STB

AGP_SBA<7>

AGP_SBA<6>

AGP_SBA<5>

AGP_SBA<4>

AGP_SBA<3>

AGP_SBA<2>

AGP_SBA<0>

AGP_DEVSEL_L

AGP_STOP_L

AGP_IRDY_L

AGP_TRDY_L

AGP_FRAME_L

AGP_PAR

AGP_CBE<3>

AGP_CBE<2>

AGP_CBE<1>

AGP_CBE<0>

AGP_AD<31>

AGP_AD<30>

AGP_AD<29>

AGP_AD<27>

AGP_AD<26>

AGP_AD<25>

AGP_AD<24>

AGP_AD<23>

AGP_AD<22>

AGP_AD<19>

AGP_AD<18>

AGP_AD<16>

AGP_AD<15>

AGP_AD<14>

AGP_AD<12>

AGP_AD<11>

AGP_AD<10>

AGP_AD<4>

AGP_AD<3>

AGP_AD<2>

AGP_AD<1>

AGP_AD<0>

INT_AGP_VREF

STOP_AGP_L

AGP_GNT_L

AGP_REQ_L

AGP_SBA<1>

+1_5V_INTREPID_PLL5

+1_5V_AGP

INT_AGP_VREF

INT_AGPPVT

+1_5V_AGP

PCI_FRAME_L

PCI_DEVSEL_L

PCI_STOP_L

PCI_AD<0>

PCI_AD<3>

PCI_AD<1> PCI_AD<2>

PCI_AD<4> PCI_AD<5> PCI_AD<6>

PCI_AD<8>

PCI_AD<7>

PCI_AD<10> PCI_AD<11>

PCI_AD<9>

PCI_AD<13>

PCI_AD<12>

PCI_AD<16>

PCI_AD<14> PCI_AD<15>

PCI_AD<18>

PCI_AD<17>

PCI_AD<20> PCI_AD<21> PCI_AD<22> PCI_AD<23> PCI_AD<24> PCI_AD<25> PCI_AD<26> PCI_AD<27> PCI_AD<28> PCI_AD<29>

PCI_AD<31>

PCI_AD<30>

AIRPORT_PCI_REQ_L CBUS_PCI_REQ_L NEC_PCI_REQ_L

NEC_PCI_GNT_L

AIRPORT_PCI_GNT_L CBUS_PCI_GNT_L

PCI_PAR

PCI_IRDY_L

PCI_FRAME_L PCI_TRDY_L

PCI_STOP_L PCI_DEVSEL_L

PCI_CBE<0> PCI_CBE<1> PCI_CBE<2> PCI_CBE<3>

INT_ROM_OE_L

INT_ROM_CS_L

INT_ROM_RW_L

INT_PCI_FB_OUT

38

39

21

39

21

39

37

20

37

20

37

39

37

39

37

24

38

19

24

38

19

24

37

24

37

24

37

18

37

39

14

39

21

37

16

37

18

37

39

14

37

38

37

16

38

16

18

24

18

39

24

18

24

17

18

17

37

19

37

24

35

12

35

20

19

15

19

37

17

19

37

19

37

35

19

24

12

19

37

19

37

19

37

15

19

15

17

18

17

24

18

17

39

18

17

18

12

19

12

19

12

35

18

8

17

35

24

35

38

12

19

12

19

9

12

19

12

19

35

19

12

35

12

9

12

9

12

9

8

12

19

12

19

12

19

12

19

38

12

9

17

9

12

17

24

18

17

12

17

12

35