Apple iMAC G5 MLB IMG5 051-6482 RevC Schematic

ANGLES
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
DATE
APPD
ENG
DATE
APPD
CK
ECN
ZONE
REV
X.XXX
X.XX
XX
DIMENSIONS ARE IN MILLIMETERS
THIRD ANGLE PROJECTION
D
SIZE
APPLICABLE
NOTED AS
MATERIAL/FINISH
NONE
SCALE
DESIGNER
MFG APPD
DESIGN CK
RELEASE
QA APPD
ENG APPD
DRAFTER
METRIC
OF
SHT
DRAWING NUMBER
TITLE
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
Apple Computer Inc.
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
DESCRIPTION OF CHANGE
SMU CPU LOGIC ANALYZER CONNECTOR
TABLE ITEMS
REVISION HISTORY
4
2
TABLE OF CONTENTS
SIGNAL ALIAS
POWER CONNECTOR / POWER ALIAS
2.5V VREG
FUNC TEST
15
13
7
3.3V/5V PWRON SWITCHING
11
CIRCUIT
8
PAGE
1
BLOCK
9
12
14
18
4
11
37
36
21
TOP
35
2
16
26
23
19
24
22
25
20
27
31
28
30
29
32 33 34
17
6
1
* PAGES WHERE MASTER PAGE IS IN A DIFFERENT SCHEMATIC
PROCESSOR
7
6
8
17
16
14
21*
13*
22
26
25*
24
23
27
32
31
30
29
28
36
34
33
35
37
40
38
45 46
44
U3LITE CORE
NEO APPLE PI
U3LITE MISC
PULSAR CLOCKS U3LITE APPLE PI
CPU STRAPS
INDICATOR LED
NEO POWER & BYPASS
CPU VREG CPU VREG OUTPUT CAPS
PARALLEL TERMINATION
U3LITE MEMORY
CPU VREG
CPU BYPASS
CPU DIODE CONDITIONER
PARALLEL TERMINATION
SERIES TERMINATION DIMMS
VTT VREG
PULSAR POWER
SHASTA SERIAL
SHASTA CORE
55
38
GRAPHICS VREGS (GPU CORE & 1.5V)
GPU AGP
U3LITE AGP
48 49 50
40
39
41
MEMORY
GRAPHICS
BLOCK
HT
PCI
ETHERNET FIREWIRE
DISK
USB
MODEM
CIRCUIT
GPU STRAPS
GRAPHICS DDR SDRAM B
GRAPHICS DDR SDRAM A
EXTERNAL TMDS TRANSMITTER GPU FRAME BUFFER FRAME BUFFER TERMINATION
47
46
45
44
42 43
PDF
51
PAGE
54
52 53
55 56
U3LITE HYPERTRANSPORT
EXT VGA & TMDS
HYPERTRANSPORT LA CONNECTORS
SHASTA HYPERTRANSPORT
GPU DAC & CLOCKS GPU DVI & STRAPS
SHASTA DISK DISK CONNECTORS
BOOT ROM
SHASTA FIREWIRE
USB2 PCI
AIRPORT EXTREME
SHASTA PCI
PCI SERIES TERMINATION
SHASTA ETHERNET ETHERNET PHY & CONNECTORS
USB HOST INTERFACE USB DEVICE INTERFACE
FIREWIRE A PHY & CONNECTORS
MODEM CONNECTOR PCM3052 AUDIO CODEC
AUDIO CONNECTORS
SPEAKER AMP
LINE IN AMP LINE OUT AMP
56 57
52
50
54
53
51
48 49
55
60 62*
58
57
59
74*
64 73
76
75*
77*
58
66 67
65
62
59
63
61
64
60
80* 83 84* 87 88*
94
92
91*
90
95*
68
72
71
69 70
101*
100*
98*
96*
GRAPHICS
102*
73
AUDIO POWER SUPPLIES
AUDIO
103*
74
S/PDIF TRANSMITTER
1.2V VREG
18
FAN 3 AND HARD DRIVE TEMP SENSOR
10
I2C CONNECTIONS
FAN 1, 2 AND SYSTEM TEMP SENSOR
POWER BLOCK DIAGRAM
SYSTEM BLOCK DIAGRAM
PDF
3
9
10
3
08/03/04
103
1
SCH,MLB,IMG5
C
?
08/04/04
338723
PRODUCTION RELEASED
051-6482
C
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
AIRPORT EXTREME
BOOTROM
CONNECTOR
PAGE 24
J9401
CTL-LESS /
NCs
S/PDIF
U9000
U1300
SMU
PAGE 13
U1301
PAGE 13
RTC
1394 OHCI (3.3V/98MHz)
LINE OUT
AMP
AUDIO CODEC
CONNECTOR
TERM
PARALLEL
PAGES 44&45
CONNECTOR
MICRODASH MODEM
BLUETOOTH CONNECTOR
CONNECTORS
PAGE 92
PAGE 94
PAGE 92
USB
J9400
J9240
54
USB 2.0
PAGE 91
USB
321
uPD720101
U7700
AMP
J9800
LINE IN
PAGE 97
PAGE 98
CONNECTOR
LINE IN
PAGE 98
MIC
J9802
J9801
CONNECTOR
SPEAKER
PAGE 98
LINE OUT
OPTICAL OUT J9803
COMBO OUT CONNECTOR
PAGE 98
PAGE 97
SPEAKER
PAGE 97
AMP
PAGE 95
U9500
PCM3052
CONNECTOR
NV18B/NV34
GPU
U4900
PAGE 49
PAGE 94
SOFT MODEM
32-bit PCI (5V-3.3V/33MHz)
J7600
PAGE 76
SERIES
PCI
GOOD,BETTER,BEST: HARD DRIVE
EDUCATION: NOT USED
PAGE 54
FREQUENCIES LISTED ARE MAXIMUM DATA TRANSFER RATES SUPPORTED BY U3LITE
PAGE 25
PAGE 25
PAGE 80PAGE 80
CONNECTORS
ETHERNET
POWER
PAGE 26
U2600
PULSAR
CLOCKS
PAGE 27
PAGE 87
4 Diff pairs
J8700
PAGE 87
10/100 ETHERNET
BCM5221
CONNECTOR
8-bit TX & 8-bit RX
U8700
GMII (3.3V/125MHz)
0
FIREWIRE A
FIREWIRE A
1
802A
PAGE 90
J9000, J9001
PAGE 90
2 Diff pairs
8-bit TX/RX
SCCA
To Shasta
SCCBSCCA
I2S1
I2S
I2S0 I2S2
PAGE 88
FIREWIREETHERNET
PAGE 84
PAGE 23
CORE
GPIO/PCI64
PAGE 74
PCI
U7500
PAGE 75 PAGE 77
FOR DEVELOPMENT ONLY
EDUCATION: HARD DRIVE GOOD,BETTER,BEST: OPTICAL
PAGE 83
CONNECTOR
3.3V/133MHZ
UATA
J8302
PAGE 83
J8301
UATA
PAGE 83
JXXXX
SATA
SATA DEV
CONNECTOR
CONNECTOR
SATA/150
UATA/133
SATA/150
1.2V/1.5GHZ
1.2V/1.5GHZ
SATA2SATA1
U2300
SATA
AGP
U3
17",20" INVERTER
J5902, J5903
PAGE
MISC
DIMMS
J4001
J4000
PAGE 62
SHASTA
PAGE 91
FRAME
PAGE 55
8X AGP
J5900, J5901
2.6V/540MHZ
2.6V/540MHZ
TMDS
BUFFER A
FRAME
U5400, U5401
FRAME BUFFER
FRAME BUFFER
64-BIT
BUFFER B
MAIN MEMORY
64/128-BIT
2.6V/400MHZ
SYSTEM BLOCK DIAGRAM
APPLE PI
32-BIT
PAGE 29
APPLE PI
PAGE 28
MAIN MEMORY
PAGE 37
TERM
PAGE 40
PAGE 38
8-BIT HYPERTRANSPORT
CONTROL = 2.5V
PAGE 60
CORE
PAGE 22
J6400 J6401
32-BIT
I/O = 1.5V
4X = 1.5V
J6402
0.8V/533MHZ 48
HYPERTRANSPORT
HYPERTRANSPORT
U3LITE
PAGE 18
CPU
U2900
PAGE 64
HT
PAGE 59
EXT VGA
64-BIT
DEBUG
NEO 10S
1.2V/900MHZ
I2C
U5500, U5501
1.2V/400MHZ
051-6482
C
2
103
ALIAS
IN
IN IN
IN
LM339A
V+
GND
IN
LM339A
V+
GND
IN
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
1.2V
IRU3037ACS
SHASTA CORE
PP1V2_PWRON
20" PANEL POWER
POWER BLOCK DIAGRAM
AUDIO CODEC
PP3V3_RUN
PCI BUS
PP5V_ALL
NV18B/NV34
IRU3037CS
GPU CORE
PAGE 50
FW PHY SMU
ENET PHY
MODEM & BT
USB2 HOST
LINEAR
PP3V3_PWRON
FET SWITCH
PAGE 11
3.3V
PAGE 11
LINEAR
PP1V5_PWRON
1.5V
PAGE 50
UDASH MODEM
USB CONN
5V
CPU AVDD
RAM TERM GRAPHIC FB
PAGE 50
RAM VTT
PP2V5_RUN
HDD & OPTICAL
PAGE 31
LINEAR
PP5V_RUN
PP12V_RUN
PP24V_RUN
FW CONN
PAGE 7
J700
GPUL
PAGE 9
SWITCHER
SC2643VX*1 SC1211*4
PAGE 33
0.8~1.2V
HP/LINEOUT AMP
LINEAR
LINEAR
PAGE 46
1.25V
PP4V5_RUN_AUDIO
PP5V_RUN_AUDIO
PAGE 99
PAGE 99
5V
4.5V
AGP BUS
POWER SW
5V
PP1V2_SHASTA_CORE
PAGE 10
API BUS
HT BUS
FET SWITCH
PP1V2_RUN
PAGE 10
PWRON_SD
PAGE 10
PWRON_DISK_SB
FET SWITCH
FET SWITCH
PP5V_PWRON
1.6/1.4V
PULSAR CORE
PP3V3_ALL
SWITCHER
SMU
PP2V5_RUN_CPU_AVDD
PAGE 11
SWITCHER
SYS_POWERUP_L
(PWR_GOOD_PP2V5)
(TURN_ON_VTT)
LINEAR
PP1V25_RAM_VTT
PP1V5_RUN
FET SWITCH
3.3V
CPU CORE
(PWR_GOOD_SB_CORE)
SYS_POWERUP_L
POWER SEQUENCE PIN
POWER CONNECTOR
AUDIO CODEC
SHASTA HT DDR DIMM
IRU3037CS
SWITCHER
PP2V5_PWRON
PAGE 9
2.62V
IRU3037CS
U3LITE CORE
PAGE 22
U3LITE CORE
SWITCHER
1.53V
2.8V
0.01UF
20% 16V CERM 402
2
1
C340
10
10 10
PP2V5_PWRON
150K
5% 1/16W MF 402
2
1
R342
402
MF
1/16W
5%
100K
2
1
R343
402
10K
MF
1/16W
5%
2
1
R341
402
10K
MF
1/16W
5%
2
1
R331
PP5V_ALL
PP3V3_ALL
SOI
3
14
9
8
12
U1100
PP3V3_ALL
46
SOI
3
1
7
6
12
U1100
100K
5%
1/16W
MF
402
21
R330
402
CERM
16V
20%
0.01UF
2
1
C330
6
10
100K
5%
1/16W
MF
402
21
R340
051-6482
C
103
3
=PULSAR_POWER_DOWN
SMU_PWRSEQ_P1_4
SMU_PWRSEQ_P1_0
TURN_ON_SHASTA_CORE_L
PWR_GOOD_SB_CORE
CPU_AVDD_EN
=PP5V_RUN_CPU
PWR_GOOD_PP2V5
TURN_ON_VTT
SMU_PWRSEQ_P1_2
SMU_PWRSEQ_P9_6
SMU_PWRSEQ_P9_5
SMU_PWRSEQ_P1_1
COMPARE_SB_CORE
RAIL_CTL_NEG
PS_2V_REF
COMPARE_PP2V5
TURN_ON_PP1V2_L
PPVCORE_PWRON_SB
31
8 7
27
13
13
31
6
13
13
13
13
11
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
BOM RELEASE (REV B)
P/S TEMP SENSOR - NOSTUFF
07/15/04
INVERTER - ADDED RESISTORS R5860-1 AND CHANGED R5808-9 TO 47OHM
DIODE CAL - ADDED OPTION TO POWER FROM PP5V_ALL AND PP3V3_ALL RAILS
VOLTAGE SENSE FROM 12V - ADDED R3360, R3361
I/O ALIGNMENT FIXTURE - ADDED 815-8008 TO MLB BOM
02/27/04
EVT3 - BOM REV 21 RELEASE
DVT RELEASE (REV 24)
05/06/04
SCHEMATIC REUSE - NETS THAT NEED ALIASES START WITH = (DOES NOT EFFECT NETLIST)
CPU - CHANGED CPU SYMBOL TO NEO-10S-REV2-76C (OLD IS OBSOLETE)
QREQ_L HACK - ADDED U2850, C2850, R2850, R2851
CHECKIN 27004
CHECKIN 27003
NAMED SOME UNNAMED NETS
STUFFED P/S TEMP SENSOR
07/12/04
1.5V_RUN FET - ADDED (N/S) C5060 FOR POSSIBLE SOFT-START
AUDIO MUTE PULLDOWNS R9815 & RA012 - CHANGED FROM 47K TO 4.7K
CPU VREG DROOP - R3327 CHANGED TO 1.5K; R3326 CHANGED TO 301
CPU PART NUMBERS - UPDATED WITH ACTUAL PART NUMBERS
AUDIO DETECT PULLUPS - CHANGED BACK TO 47K FROM 4.7K
MIC BIAS - NOSTUFFED CA210 TO HELP NOISE FLOOR
POWER_FAIL_L R DIVIDE - ADJUSTED FOR 2K PULLUP THAT WILL BE IN PVT POWER SUPPLIES
PULSAR_POWER_DOWN - R2750 CHANGED TO 47 OHM FOR ICT
REPLACED MAXIM ANALOG SWITCH U2850 WITH TI ANALOG SWITCH
PERICOM ADDED AS AN ALTERNATE ALL I/O CONNECTORS CHANGED POWER CONNECTOR CHANGED
FIREWIRE CRYSTAL R - FIXED REF DES
INPUT VOLTAGE SENSE - CHANGED DIVIDER VALUES
HD TEMP SENSOR - STUFFED ON ALL CONFIGS
CHECKIN 27002
07/13/04
CHANGED AUDIO I2S_BITCLK SERIES RESISTER TO 0 OHM
NO STUFF POWER SUPPLY TEMP SENSOR
NOSTUFFED R2775/6 (UNUSED CLOCKS)
NEW 1.5V FET - LOWER RDS(ON) - Q5006
2.5V VREG SOFT START - CHANGED C915 TO 1UF FOR U3L POWER SEQUENCING
CHANGED U3LITE CORE TO 1.53V
UPDATED LINE AND NECK WIDTH CONSTRAINTS THROUGHOUT SCHEMATIC
MOVED MARTY SERIAL 0 OHM RESISTORS TO COMMON BOM
06/24/04
06/23/04
06/22/04
06/22/04
ADDED TABLES FOR:
NEW SATA CONNECTER SOURCES J8300, J8302
TMDS POWER - CHANGED D5914 TO SURFACE MOUNT PART FROM THROUGH HOLE MOVED R714 TO R1303 FOR SCHEMATIC REUSE
DATE
CHECKINS 24003-24005
USB PULL-DOWNS - R9403,R9404 MOVED TO COMMON BOM
SMU CRYSTAL CAPS - C1304,C1305 CHANGED TO 18PF FROM 12PF
SMU RESET - CHANGED R1322 TO 150K FROM 100K
AUDIO UPDATES
06/10/04
CHECKIN 24002
05/11/04
05/10/04
FRAME BUFFER CLOCKS - ADDED DIFF PAIR PROPERTIES PCI_RESET - UPDATES FOR SCHEMATIC REUSE
DVT RELEASE (REV 25)
CHECKIN 24001
TMDS - NEW PARALLEL TERMINATION RESISTORS R5869-R5872
05/07/04
SUSPENDREQ LEVEL SHIFTER - R2419, R2420 CHANGED TO 330 OHM
MASTER PAGE SYNC - ADDED S/PDIF XMITTER AND BITCLK DELAY
05/03/04
04/30/04
05/05/04
UPDATED PLATING FOR ZH702
ADDED 1.6GHZ CPU PART NUMBER
CHECKIN 23006
REMOVED OLD OVERTEMP CIRCUIT
SOFT MODEM - ADDED DECOUPLING CAPS TO POWER RAIL
CPU POWER SUPPLY - ON SEMI FETS ONLY
CHECKIN 23004
MASTER PAGE SYNC
ADDED DIAG LED
CPU AVDD - ADDED 2.7V BOM OPTION
CHECKIN 23005
POWER_FAIL - RESISTOR DIVIDED TO 3.3V
CHECKIN 23007
CPU PS AVP CHANGES
TMDS TERM - STUFFING CHANGES
CPU VREG AVP - C3304, C3305, C3306, C3307 CHANGED TO 8.2NF
ADDED BOMS OPTIONS FOR ON_SEMI AND VISHAY FETS FOR 3PHASE AND 4PHASE
CPU VREG - ADDED BOM OPTION ’EXTRA_C’ FOR CAPS WE WOULD LIKE TO NOSTUFF
I2C UPDATE
04/29/04
04/27/04
DIMMS - UPDATED TO 25/28 DEGREE CONNECTORS
CURRENT SENSE - CHANGED R3345 FROM 121K TO 73.2K CHECKIN 23002
QREQ CIRCUITS MOVED TO PWRON RAIL
MASTER PAGE SYNC
MASTER PAGE SYNC - AUDIO AND SMU CHANGES
I2C_CPU_A - ADDED Q1801 TO LEVEL SHIFTER
CHECKIN 23003
ADDED POWER SUPPLY TEMP SENSOR
CHECKIN 23001
MASTER PAGE SYNC
SW703 CHANGED TO 516S0221
PULSAR_POWER_DOWN CONNECTED TO SMU_PWRSEQ_P1_4
04/21/04
04/14/04
04/21/04
04/26/04
CHECKIN 22002 - FIXING DIMM SYMBOL AGAIN
NOSTUFFING FIREWIRE PORT POWER "CHOICE A" CIRCUIT
STROBE RESISTORS CHANGED TO 120 OHM EVT3A RELEASE (REV 22)
CHANGED R3304 TO 116S1000
MASTER PAGE SYNC - NOW IN SYNC ON ALL SHAREABLE PAGES
CHECKIN 22003
RAM PARALLEL TERM - DQ RPAKS CHANGED TO 68 OHM
CHECKIN 22001 - FIXING DIMM SYMBOL
MAIN MEMORY - DQ SERIES TERM CHANGED TO 22 OHM
EVT3A BOM RELEASE REV 23
CHANGED C3304-7 TO 132S4733
CPU POWER SUPPLY - NOSTUFFED R3305
SMU_SUSPENDREQ - STUFFED LEVEL SHIFTER
USB POWER CAPS - NOSTUFFED C9211, C9221, C9231
NB_SUSPENDACK_L NOW USED U700 TO LEVEL SHIFT - OLD CIRCUIT REMOVED
Q3000 ADDED TO LEVEL SHIFT / INVERT CPU_BYPASS AND CPU_HRESET
SUSPENDACK LEVEL SHIFTER - REPLACED Q2407 AND Q2408 WITH Q2420 SN7002DW
INPUT CURRENT SENSE - CHANGED R3343 TO 0.025 OHM 1% RESISTOR
03/24/04
04/13/04
04/12/04
04/12/04
03/05/04
CHECKIN 21002
CHECKIN 21001
EVT3 REWORKS
MASTER PAGE SYNC
CHECKIN 21003
FAN 3 - STUFFING ON ALL CONFIGS
SDF804 -> ZH804 CHECKIN 21004
TMDS POWER - ADDED R5960 AND D5914
EMI - REMOVED EMI700 & EMI9400
MAIN MEMORY DQS PARALLEL TERM - CHANGED TO 100 OHM (LIKE EVT3)
INVERTER CONTROL - ADDED AND GATES U5850 & U5851 TO CONTROL LCD_PWM AND FPD_PWR_ON
MASTER PAGE SYNC - IN SYNC ON ALL PAGES EXCEPT PAGE 13
DIMM CONNECTORS - UPDATED 30 DEGREE SYMBOL
3PHASE CPU POWER SUPPLY - ADDED TABLE FOR R3328
NOSTUFF R3691 & R828 - DIODE CAL RETURN PATH
GPU XTAL - C5700 AND C5719 -> 27PF FROM 22PF
HEATSINK ASSEMBLY - NEW PART NUMBERS
I2C A - U1800 MOVED BACK TO PWRON RAIL
DESCRIPTION
REVISION HISTORY
LAST MINUTE BOM CHANGES FOR DVT:
NEW TMDS CONNECTOR W/ BOSS J5902
06/11/04
FAN OPAMPS - REPLACED U1600 W/ SECOND OPAMP IN U1700
I2C A BUS PULLUPS - R1816,R1817 CHANGED TO 200 OHM
CHECKIN 25001
MASTER PAGE SYNC - NOSUFFED EXTERNAL S/PDIF TRANSMITTER
U1600,U1601,U1700 CHANGED TO 353S0890 FOR MORE SOURCES
REPLACED Q5006 (FET FOR 1.5V) WITH 376S0254
NEW BACKUP SMU_RESET CIRCUIT (SAME AS Q78)
REMOVED COIN CELL BATTERY AND I/O ALIGNMENT FIXTURE FROM MLB BOM (FATP ITEMS)
NOSTUFFED CPU VREG ELECTROLYTIC CAPS C3332, C3427, C3421
TIED INPUTS IN UNUSED OPAMP IN U1601
"PROPERLY" TERMINATED UNUSED OPAMP IN U1601
R5010 REMOVED TO DECREASE DROOP ON 1.5V RAIL
07/01/04
06/28/04
MAIN MEMORY - DQ PARALLEL TERM CHANGED TO 82 OHM
CHECKIN 26003
07/02/04
CHECKIN 26004
MASTER PAGE SYNC - AUDIO CHANGES
NOSTUFFED ON BOARD HD TEMP SENSOR
SUPPORT FOR 2GB DIMMS - SWAPPED PINS 103 & 167 ON DIMM CONNECTOR
06/28/04
06/21/04
FEEDBACK RESISTORS CHANGED TO 603
ADDED SECOND SOURCE VTT REGULATOR (PAGE 46)
CHECKIN 26002
MASTER PAGE SYNC - PICKED UP AUDIO CHANGES RELATED TO BITCLK
ADDED CONNECTOR J1701 TO SUPPORT REMOTE HD TEMP SENSOR
"PROPERLY" TERMINATED UNUSED OPAMP IN U2100
CHECKIN 26001
CHANGED HD TEMP SENSOR CONN J1701 TO 4 PIN
07/06/04
BOM RELEASE REV 26
FIREWIRE POWER - NEW CURRENT LIMITING RESISTOR
GPU - ADDED DECOUPLING TO GPU_VTT FOR NV36
SMU - ADDED QREQ
NOSTUFF R807 - SMU_BOOT_SCLK IS ALSO CPU_VID<5>
07/08/04
CHECKIN 26005
CHECKIN 26006
POWER SWITCH CHANGED
REMOVED ON BOARD HARD DRIVE TEMP SENSOR
MLB CARCODE - CHANGED TO 825-6447
SMU DOWNLOAD CONNECTOR - PRODUCTION P/N
U3LITE FEEDBACK RESISTORS CHANGED TO 0.5% TOLERANCE
AUDIO DETECT PULLUPS - CHANGED FROM 47K TO 4.7K
CHECKIN 27001
ORIGIN HOLE ZH702 - CHANGED TO 4.15MM
I/O CONNECTOR SYMBOL UPDATES
BOM RELEASE REV 27
CHECKIN 26007
07/14/04
FIREWIRE CRYSTAL - ADDED R9060 & R9061
FIREWIRE POWER DU JOUR
ANALOG SWITCH U2850 - ADDED PERICOM & AND MAXIM AS ALTERNATES TO TI
GREEN LED - ADDED KINGBRIGHT AS ALTERNATE VTT - NO LONGER POWER SEQUENCED - NO STUFFED R4610 AND R4603
SMU PULLUPS CHANGES - R1312 -> 2K; R1311 -> 10K
CHECKIN 25004
CHECKIN 25003
PATA CONN J8301 CHANGED TO 516S0235 (ADDED VENDOR)
MOVED CPU LOGIC ANALYZER RESISTORS TO DEVELOPMENT BOM
CPU HEATSINK ASSEMBLIES - NEW PART NUMBERS
EVT3 RELEASE (REV 20)
07/28/04
PVT / PRODUCTION RELEASE (REV A)
FIREWIRE CRYSTAL - CHANGED R9061 TO 470 OHM
NEW P/N FOR HEATSINK ASSEMBLIES NOSTUFFED OPTICAL TEMP SENSOR
I/O CONNECTOR SHIELD CHANGE P/N TO 805-5664
U3LITE PWR SEQ - CHANGED C915 TO 0.22UF
REMOTE HD TEMP SENSOR CONNECTOR - NOSTUFF
STUFFED TMDS CONNECTOR J5902 (ACCIDENTALLY OMITTED)
2.5V VREG - CHANGED SOFT START CAP TO 0.68UF
STUFFED REMOTE HD TEMP SENSOR CONNECTOR
2.5V VREG - CHANGED SOFT START CAP TO 0.47UF
NEW CPU P/N AND BINCODES FOR 1.10V VMIN
08/03/04
103
4
C
051-6482
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_11_HEAD
REFERENCE DESIGNATOR(S)
BOM OPTION
QTY
DESCRIPTION
VALUE VOLT. WATT.
TOL.PART #
PACKAGE
DEVICE
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_11_HEAD
TABLE_11_HEAD
TABLE_11_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_11_HEAD
REFERENCE DESIGNATOR(S)
BOM OPTION
QTY
DESCRIPTION
VALUE VOLT. WATT.
TOL.PART #
PACKAGE
DEVICE
TABLE_11_HEAD
TABLE_11_HEAD
TABLE ITEMS
MISC PARTS
ALTERNATES
ASICS
NOT QUALIFIED
1.25V
VOLTAGE
VOLTAGE
QUALIFIED
337S2957 337S2786 CPU_DD30_1_8GHZ U2900 IC,GPUL,DD3,1.8G,BNA 1.20V
PROCESSORS
343S0282
U3L,V1.1,200MM,PBGA
343S0284 U3
IC,U3LITE,V1.1,300MM,PBGA
343S0284 U3
1
343S0283
1
IC,ASIC,SHASTA,V1.1,PBGA
U2300
1
LBL1
BARCODE LABEL, MLB, Q45
825-6447
1
062-2082 VPP1
SPEC,VENDOR PACKAGING PROCEDURE
MLB1820-1540
1
PCB,FAB,MLB
U1300
341T1395
PURCH ASSY, SMU BIG
1
603-6015
1
HEAT SINK ASSEMBLY 17 IN
17_INCH_LCD
MECH17
CRITICAL
U7500
1
341T1366
IC,FLASH,1MX8,3.3V,90NS
CBGA-576-1MM
1 ?
U2900
45W
PROCESSOR
1.6GHZ
CPU_DD30_1_6GHZ
1.25V
337S2968
IC,GPUL,10S,DD3,1.6G,85C,ARA
CPU_DD30_1_8GHZ
1 ?
U2900
45W
PROCESSOR
1.8GHZ
CBGA-576-1MM
1.20V
337S2969
IC,GPUL,10S,DD3,1.8G,85C,BPA
103
5
C
051-6482
CPU_DD30_1_8GHZ
U2900
337S2970 337S2969
603-6016
1
CRITICAL
MECH20
20_INCH_LCD
HEAT SINK ASSEMBLY 20 IN
1
SCH1
PCB,SCHEM,MLB
051-6482
337S2787
1 ?
PROCESSOR
U2900
CPU_DD30_2_0GHZ
CBGA-576-1MM
45W
1.25V
2.0GHZ
IC,GPUL,10S,REV3,2.0G,85C,CJA
IC,GPUL,10S,DD2.11,2.0GHZ,85C
337S2866
1.45V
PROCESSOR
2.0GHZ
1 ?
U2900
CPU_DD211_2_0GHZ
CBGA-576-1MM
45W
1.8GHZ
CBGA-576-1MM
IC,GPUL,10S,DD2.11,1.8GHZ,85C
1.45V
337S2865
U2900
?1
PROCESSOR
CPU_DD211_1_8GHZ
45W
378S0119
LED700,LED702,LED5900
KINGBRIGHT LED
378S0114
IN
IN
IN
IN
IN
IN
IN
IN IN IN IN IN IN IN IN
IN
IN
IN
IN
IN
IN IN
IN
IN
IN
IN
IN
IN IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN IN
IN
IN
IN
IN IN IN
IN
IN
IN
IN
IN
IN IN
IN
IN
IN
IN
IN
IN IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN IN IN
IN
IN
IN
IN IN
IN
IN
IN
IN
IN
IN IN
IN
IN
IN
IN
IN IN
IN
IN
IN
IN
IN
IN IN IN IN
IN IN
IN
IN IN
IN
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
FUNC TEST
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
10 TEST POINTS
5 TEST POINTS
5 TEST POINTS
12 TEST POINTS
5 TEST POINTS
5 TEST POINTS
5 TEST POINTS
5 TEST POINTS
2 TEST POINTS
GENZ SHOULD USE J1400 FOR THE FOLLOWING NETS:
I10 I295 I296 I297 I298
I299
I3
I300
I302
I307 I311 I314 I315 I316 I317
I319
I320
I321
I322 I323
I336 I337 I338
I339
I340
I341
I342 I343
I344 I345 I346 I347 I348
I349
I350
I354 I355 I356 I357 I358
I359
I360
I361
I362 I363
I364 I365
I371
I372 I373
I374 I375 I376 I377 I378
I379
I380
I381
I382 I383
I384 I385 I386
I387
I388
I389
I390
I391
I392
I393
I394
I395
I396
I397
I398
I399
I4
I400
I401
I402
I403
I404 I405 I406
I407
I408
I426
I428
I429
I430
I431
I432
I433
I434
I435
I436
I437
I438
I439
I440 I441 I442
I443
I444
I445 I446
PP5V_ALL
I5
PP12V_RUN
PP5V_RUN
I6
PP3V3_PWRON
PP5V_PWRON
PP2V5_RUN
PP1V5_RUN
PP1V2_PWRON
PP3V3_RUN
7
11
11 18
11 18
7
83
7
83
11 18
11 18 27
3
10
7 8
13
3 7 8
31
7
33 34 35
7
22
33 34
33
33
7 8
7
13
7
7
8
13
8 9
10 11 46 50
7
10 11 13 33
8
13
22
9
57 59
57 59
57 59
80 83
80 83
80 83
80 83
83
80 83
80 83
6 80 83
6
80 83
80 83
83
83
83
83
8
33
36
36
36
33 36
36
33 36
59
59
59
59
59
59
59
59
59
58 59
59
59
59
59
59
59
56 57 59
56 57 59
59
I7
90
90
90
90
90
90
90
90
90
90
90
73 74 75 76 77
73 74 76 77
8
74 76
74 76
25 76
73 74 76 77
8
51 58 74
73 74 76 77
73 74 76 77
73 74 76 77
73 74 76 77
73 74 76 77
74 75 76
76
74 75 76
74 75 76
76
75 76
92
92
92
92
92
92
92
92
92
92
92
25 76 94
25 94
25 94
25 76 94
25 76 94
25 94
25 94
18 94
94
18 94
94
25 94
94
25 94
59
59
59
59
59
59
59
59
59
59
59
59
7
59
25
101
75
PP24V_RUN
76
76
31 36
I781
I782
I784 I785
I786
I787
I788
I789
I790
I791
I792
I793 I794
I795 I796
I797
I798 I799
I8
I800
I801 I802
I803
I804 I805
I806 I807
I808
I809 I810
I9
051-6482
103
6
C
PP5V_ALL
FUNC_TEST=YES
PP12V_RUN
FUNC_TEST=YES
PP5V_RUN
FUNC_TEST=YES
GND
FUNC_TEST=YES
PP3V3_PWRON
FUNC_TEST=YES
PP5V_PWRON
FUNC_TEST=YES
PP2V5_RUN
FUNC_TEST=YES FUNC_TEST=YES
PP1V5_RUN
PP1V2_PWRON
FUNC_TEST=YES
FUNC_TEST=YES
PP3V3_RUN PP24V_RUN
FUNC_TEST=YES
NO_TEST=YES
PLS_CLK_66M_1_R
NO_TEST=YES
PLS_CLK_66M_0_R
EI_CPU1_SYNC
NO_TEST=YES
TP_PROC_TRIGGER_OUT
NO_TEST=YES
SYNCENABLE
NO_TEST=YES
RI_L
NO_TEST=YES
MCP_L
NO_TEST=YES
I2C_SMU_A_SDA_OUT_L
NO_TEST=YES
I2C_SMU_A_SCL_OUT_L
NO_TEST=YES
EI_SE
NO_TEST=YES
EI_QREQ_L
NO_TEST=YES
EI_QACK_L
NO_TEST=YES
EI_CPU1_CLK_P
NO_TEST=YES
EI_CPU1_CLK_N
NO_TEST=YES
CPU1_HTBEN
NO_TEST=YES
CPU_INT_L
NO_TEST=YES
CPU_HRESET_L
NO_TEST=YES
CHKSTOP_L
NO_TEST=YES
NO_TEST=TRUE
EI_NB_TO_CPU_SR_N<0..1>
NO_TEST=TRUE
EI_NB_TO_CPU_SR_P<0..1>
NO_TEST=YES
EI_NB_TO_CPU_CLK_P
EI_NB_TO_CPU_AD<0..43>
NO_TEST=TRUE
EI_NB_TO_CPU_CLK_N
NO_TEST=YES
EI_CPU_TO_NB_SR_P<0..1>
NO_TEST=TRUE
NO_TEST=TRUE
EI_CPU_TO_NB_SR_N<0..1>
EI_CPU_TO_NB_CLK_P
NO_TEST=YES
EI_CPU_TO_NB_CLK_N
NO_TEST=YES
NO_TEST=TRUE
EI_CPU_TO_NB_AD<0..43>
TP_J4000_SJRESET_L
NO_TEST=YES
TP_J4001_SJRESET_L
NO_TEST=YES
TP_ENET_TXD<6>
NO_TEST=YES
U2100_UNUSED
NO_TEST=YES
TP_RAM_MUXEN4
NO_TEST=YES
TP_RAM_CKE_R<3>
NO_TEST=YES
SMU_MANUAL_RESET_L
FUNC_TEST=YES
PCI_RESET_L
FUNC_TEST=YES
TP_NB_PM_SLEEP0
NO_TEST=YES
FUNC_TEST=YES
=PP5V_RUN_CPU
FUNC_TEST=YES
PPVCORE_PWRON_SB =PP3V3_ALL_SMU
FUNC_TEST=TRUE
PPVCORE_CPU
FUNC_TEST=YES
FUNC_TEST=YES
SYS_POWER_BUTTON_L
FUNC_TEST=YES
=PP5V_DISK
FUNC_TEST=YES
=PP12V_DISK
I2C_UDASH_SDA
FUNC_TEST=YES
SYS_POWERFAIL_L
FUNC_TEST=YES
TP_ENET_CLK125M_GTX
NO_TEST=YES
TP_ENET_TXD<4>
NO_TEST=YES
TP_ENET_TXD<5>
NO_TEST=YES
TP_ENET_TXD<7>
NO_TEST=YES
NO_TEST=YES
FW_TPI1N
FUNC_TEST=YES
FW_TPI1P
FUNC_TEST=YES
FW_TPI2P
FUNC_TEST=YES
FW_TPO1P
FUNC_TEST=YES
FW_TPO2N
FUNC_TEST=YES
FW_TPO2P
FUNC_TEST=YES
I2S1_BITCLK
FUNC_TEST=YES
I2S1_DEV_TO_SB_DTI
FUNC_TEST=YES
I2S1_MCLK
FUNC_TEST=YES
I2S1_SB_TO_DEV_DTO
FUNC_TEST=YES
I2S1_SYNC
FUNC_TEST=YES
PCI_FRAME_L
FUNC_TEST=YES
PCI_IRDY_L
FUNC_TEST=YES
PCI_PAR
FUNC_TEST=YES
PCI_STOP_L
FUNC_TEST=YES
TP_RAM_CKE_R<2>
NO_TEST=YES
TP_RAM_CKE_R<6>
NO_TEST=YES
TP_RAM_CKE_R<7>
NO_TEST=YES
TP_RAM_CS_L_R<2>
NO_TEST=YES
TP_RAM_CS_L_R<3>
NO_TEST=YES
NO_TEST=YES
NO_TEST=YES
TP_AFN
NO_TEST=YES
TP_AGP_MB_AGP8X_DET_L
NO_TEST=YES
TP_ATTENTION
NO_TEST=YES
TP_BUF_RST
NO_TEST=YES
TP_CMP_SPARE
NO_TEST=YES
TP_DFPD0
NO_TEST=YES
TP_DFPD1
NO_TEST=YES
TP_DFPD2
NO_TEST=YES
TP_DFPD5
NO_TEST=YES
TP_DUMMY_A
NO_TEST=YES
TP_DUMMY_B
NO_TEST=YES
TP_ENET_TCK
NO_TEST=YES
TP_EXT_TMDS_CKP
NO_TEST=YES
TP_FBBCS1_L
NO_TEST=YES
TP_GPU_INTB_L
NO_TEST=YES
TP_GPU_THERMA
NO_TEST=YES
TP_GPU_THERMC
NO_TEST=YES
TP_IFP1VREF
NO_TEST=YES
TP_NEC_AMC
NO_TEST=YES
TP_NEC_NANDTEST
NO_TEST=YES
TP_NEC_NTEST1
NO_TEST=YES
TP_NEC_SMC
NO_TEST=YES
TP_NEC_SMI_L
NO_TEST=YES
TP_NEC_SRCLK
NO_TEST=YES
TP_NEC_SRDATA
NO_TEST=YES
TP_NEC_SRMOD
NO_TEST=YES
TP_NEC_TEB
NO_TEST=YES
TP_NEC_TEST
NO_TEST=YES
TP_NVAGP_TDO
NO_TEST=YES
TP_PLS_CLK_66M_0
NO_TEST=YES
TP_PLS_CLK_66M_1
NO_TEST=YES
TP_PLS_REF_CML
NO_TEST=YES
TP_PLS_TEST1
NO_TEST=YES
TP_PLS_TEST2
NO_TEST=YES
TP_PLS_TEST3
NO_TEST=YES
TP_PSRO1
NO_TEST=YES
TP_PSRO2
NO_TEST=YES
TP_PSYNCOUT
NO_TEST=YES
TP_RAM_MUXEN0
NO_TEST=YES
TP_SATA_CLK25M
NO_TEST=YES
TP_SB_FSTEST
NO_TEST=YES
TP_SB_NC_P7
NO_TEST=YES
TP_SB_NC_P8
NO_TEST=YES
TP_SB_NC_R3
NO_TEST=YES
TP_SB_NC_R4
NO_TEST=YES
TP_SB_NC_R5
NO_TEST=YES
TP_SB_NC_R6
NO_TEST=YES
TP_SB_NC_R7
NO_TEST=YES
TP_SB_NC_R8
NO_TEST=YES
TP_SB_NC_T1
NO_TEST=YES
TP_SB_NC_T2
NO_TEST=YES
TP_SB_NC_T3
NO_TEST=YES
TP_SB_NC_T4
NO_TEST=YES
TP_SB_NC_T5
NO_TEST=YES
TP_SB_NC_T6
NO_TEST=YES
TP_SB_NC_T7
NO_TEST=YES
TP_SB_NC_T8
NO_TEST=YES
TP_SB_NC_U1
NO_TEST=YES
TP_SB_NC_U2
NO_TEST=YES
TP_SB_NC_U3
NO_TEST=YES
TP_SB_NC_U4
NO_TEST=YES
TP_SB_NC_U5
NO_TEST=YES
TP_SB_NC_U6
NO_TEST=YES
TP_SB_NC_V1
NO_TEST=YES
TP_SB_NC_V2
NO_TEST=YES
TP_SB_NC_V3
NO_TEST=YES
TP_SB_NC_V4
NO_TEST=YES
TP_SB_NC_W1
NO_TEST=YES
TP_SB_NC_W3
NO_TEST=YES
TP_SB_NC_Y1
NO_TEST=YES
TP_SB_NC_Y3
NO_TEST=YES
TP_SB_PLLTEST
NO_TEST=YES
TP_TMDS_TXD7M
NO_TEST=YES
TP_USB2_PWREN<0>
NO_TEST=YES
TP_USB2_PWREN<1>
NO_TEST=YES
TP_USB2_PWREN<2>
NO_TEST=YES
TP_USB2_PWREN<3>
NO_TEST=YES
TP_USB2_PWREN<4>
NO_TEST=YES
TP_VIPHCLK
NO_TEST=YES
TP_VREF_CG
NO_TEST=YES
UATA_CS0_L
FUNC_TEST=YES
UATA_CS1_L
FUNC_TEST=YES
UATA_DMACK_L
FUNC_TEST=YES
UATA_RESET_L
FUNC_TEST=YES
UATA_STOPUATA_STOP
FUNC_TEST=YES
USB_UDASH_N
FUNC_TEST=YES
USB_UDASH_P
FUNC_TEST=YES
USB_BT_P
FUNC_TEST=YES
USB2_PORT1_N_F
FUNC_TEST=YES
USB2_PORT1_P_F
FUNC_TEST=YES
USB2_PORT2_P_F
FUNC_TEST=YES
USB2_PORT3_N_F
FUNC_TEST=YES
USB2_PORT3_P_F
FUNC_TEST=YES
PCI_CLK33M_AIRPORT
FUNC_TEST=YES
ANALOG_BLU
FUNC_TEST=YES
ANALOG_GRN
FUNC_TEST=YES
ANALOG_HSYNC_L
FUNC_TEST=YES
ANALOG_RED
FUNC_TEST=YES
ANALOG_VSYNC_L
FUNC_TEST=YES
AUDIO_LO_DET_L
FUNC_TEST=YES
CORE_ISNS_M
FUNC_TEST=YES
CORE_ISNS_P
FUNC_TEST=YES
DDC_VCC_5
FUNC_TEST=YES
FILT_ANALOG_BLU
FUNC_TEST=YES
FILT_ANALOG_GRN
FUNC_TEST=YES
FILT_ANALOG_RED
FUNC_TEST=YES
FW_VP_PORT1
FUNC_TEST=YES
FW_VP_PORT2
FUNC_TEST=YES
GND_17_INV
FUNC_TEST=YES
GND_20_INV
FUNC_TEST=YES
GND_CHASSIS_TMDS
FUNC_TEST=YES
I2S1_RESET_L
FUNC_TEST=YES
INV_17_CUR_HI_F
FUNC_TEST=YES
INV_17_LCD_PWM_F
FUNC_TEST=YES
INV_20_CUR_HI_F
FUNC_TEST=YES
INV_20_LCD_PWM_
FUNC_TEST=YES
LAMP_STS_F
FUNC_TEST=YES
MODEM_RING2SYS_L
FUNC_TEST=YES
MON_DETECT
FUNC_TEST=YES
PCI_SLOTA_GNT_L
FUNC_TEST=YES
PCI_SLOTA_IDSEL
FUNC_TEST=YES
POWER_BUTTON_L
FUNC_TEST=YES
PP12V_CPU
FUNC_TEST=YES
PP12V_INV
FUNC_TEST=YES
PP24V_INV
FUNC_TEST=YES
PP3V3_DDC
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
FUNC_TEST=YES
PPVCC_TMDS
FUNC_TEST=YES
PPVCORE_NB
FUNC_TEST=YES
RESET_BUTTON_L
FUNC_TEST=YES
ROM_CS_L
FUNC_TEST=YES
ROM_OE_L
FUNC_TEST=YES
SYS_POWERUP_L
FUNC_TEST=YES
SMU_RESET_L
FUNC_TEST=YES
TCKP
FUNC_TEST=YES
TD0M
FUNC_TEST=YES
TD0P
FUNC_TEST=YES
TD1M
FUNC_TEST=YES
TD1P
FUNC_TEST=YES
TD2M
FUNC_TEST=YES
TD2P
FUNC_TEST=YES
TDIODE_NEG_FMAX
FUNC_TEST=YES
TDIODE_POS_FMAX
FUNC_TEST=YES
TMDS_DDC_DAT
FUNC_TEST=YES
TP_AIRPORT_PME_L
FUNC_TEST=YES
U2200_FEEDBACK
FUNC_TEST=YES
U900_FEEDBACK
FUNC_TEST=YES
UATA_CSEL_PD
FUNC_TEST=YES
UATA_DMARQ_R
FUNC_TEST=YES
UATA_DSTROBE_R
FUNC_TEST=YES
UATA_INTRQ_R
FUNC_TEST=YES
UATA_IOCS16_PU
FUNC_TEST=YES
UDASH_I2C_A1_PU
FUNC_TEST=YES
UDASH_RESET_L
FUNC_TEST=YES
VCORE_SENSE_GND
FUNC_TEST=YES
VGA_IIC_DAT
FUNC_TEST=YES
FUNC_TEST=TRUE
EXT_POWER_BUTTON_L
FUNC_TEST=TRUE
UATA_DD<15..0>
NO_TEST=YES
TP_TMDS_TXD3P
FUNC_TEST=TRUE
PCI_AD<31..0>
FUNC_TEST=TRUE
PCI_CBE_L<3..0>
NO_TEST=YES
TP_TMDS_TXD7P
TP_DFPD6
NO_TEST=YES
NO_TEST=YES
TP_TMDS_TXD3M
FUNC_TEST=TRUE
CPU_VID_R<5..0>
FUNC_TEST=TRUE
UATA_DA<2..0>
FUNC_TEST=TRUE
NO_TEST=YES
TP_DFPCLK
TP_DFPD3
NO_TEST=YES
TP_EXT_TMDS_CKM
NO_TEST=YES
TP_EXT_TMDS_D0M
NO_TEST=YES
TP_EXT_TMDS_D1P
NO_TEST=YES
TP_EXT_TMDS_D2P
NO_TEST=YES
TP_EXT_TMDS_D1M
NO_TEST=YES
NO_TEST=YES
TP_DFPCLK_L
TP_FRWRLPS
NO_TEST=YES
TP_EXT_TMDS_D2M
NO_TEST=YES
TP_EXT_TMDS_D0P
NO_TEST=YES
FW_TPO1N
FUNC_TEST=YES
FW_TPI2N
FUNC_TEST=YES
FW_VGND
FUNC_TEST=YES
PCI_SLOTA_REQ_L
FUNC_TEST=YES
PCI_SLOTA_INT_L
FUNC_TEST=YES
PCI_TRDY_L
FUNC_TEST=YES
AIRPORT_CLKRUN_L_PD
FUNC_TEST=YES
USB2_PORT2_N_F
FUNC_TEST=YES
I2C_UDASH_SCL
FUNC_TEST=YES
UDASH_SDOWN
FUNC_TEST=YES
TCKM
FUNC_TEST=YES
TMDS_DDC_CLK
FUNC_TEST=YES
VGA_IIC_CLK
FUNC_TEST=YES
PP5V_AGP_RL
FUNC_TEST=YES
KPVDD2_FMAX
FUNC_TEST=YES
KPGND2_FMAX
FUNC_TEST=YES
TP_AIRPORT_RF_DISABLE
FUNC_TEST=YES
TDIODE_NEG
FUNC_TEST=YES
UATA_HSTROBE
FUNC_TEST=YES
ROM_WP_L
FUNC_TEST=YES
SYS_SLEEP
FUNC_TEST=YES
VCORE_SENSE_VOUT
FUNC_TEST=YES
USB_BT_N
FUNC_TEST=YES
ROM_ONBOARD_CS_L
FUNC_TEST=YES
ROM_WE_L
FUNC_TEST=YES
PCI_DEVSEL_L
FUNC_TEST=YES
30
30
30
30
30
18
18
29
29
29
29
30
29
29
29
29
29
29
29
29
29
29
29
27
29
29
29
29
14
14
28
28
28
27
27
25
29
14
28
28
28
28
28
28
28
28
28
28
27
27
14
14
14
14
14
13
13
14
14
14
14
14
14
14
14
8
14
14
14
14
14
14
14
14
14
14
40
40
87
21
8
8
24
87
87
87
87
90
8
8
8
8
8
8
8
29
48
29
57
58
58
58
58
24
24
87
58
52
49
58
58
58
77
77
77
77
77
77
77
77
77
77
49
27
27
27
27
27
27
29
29
29
8
27
25
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
25
58
92
92
92
92
92
57
48
58
58
58
58
58
58
58
58
58
58
58
58
58
58
58
ALIAS
ALIAS
ALIAS
ALIAS
125
ALIAS
ALIAS
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
SILKSCREEN:2
RUN RAILS
SMU RESET
SILKSCREEN:POWER
GND RAILS
SILKSCREEN:1
PIN 13,19,11,22 ARE DIFFERENCE FROM ATX .
RESET
CHASSIS GND
ALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE)
ALWAYS ON (TRICKLE)
ONLY ON IN RUN
POWER CONN / ALIAS
POWER
ALL RAILS
RTC BATTERY
EI OVDD POWER OPTIONS
PWRON RAILS
SILKSCREEN:RUN
ON IN RUN AND SLEEP
P/N 518-0159
805-5664
PP5V_RUN
PP3V3_PWRON
PP1V5_PWRON
PP2V5_PWRON
PP1V2_PWRON
PP24V_RUN
PP5V_ALL
PP5V_ALL
PP3V3_RUN
PP2V5_RUN
PP5V_PWRON
PP1V5_RUN
PP5V_RUN
PP3V3_RUN
PP5V_RUN
PP12V_RUN
SM
21
XW700
SM
21
XW701
315R138
1
ZH700
SM
21
XW702
SM
21
XW703
402
CERM
10V
20%
0.1UF
2
1
C704
0.1UF
20% 10V
402
CERM
2
1
C705
PP12V_RUN
SPST
SM
43
21
SW702
5%
1K
402
MF
1/16W
21
R713
SPST
DEVELOPMENT
SM
43
21
SW701
5%
402
1K
1/16W
MF
DEVELOPMENT
21
R712
SPST
SM
43
21
SW700
315R138
1
ZH701
7R4.15
1
ZH702
6.00MM-PTH
1
ZH703
1/16W
MF
402
5%
1K
21
R702
SHLD-IO-CONN
Q45-TH1
4
32
1
SH700
SM
MBR0530
2 1
DS700
805
FF
1/10W
5%
0
21
R703
805
FF
1/10W
5%
0
21
R704
NOSTUFF
0
5%
1/10W
FF
805
2
1
R705
NOSTUFF
805
FF
1/10W
5%
0
2
1
R706
805
FF
1/10W
5%
0
NOSTUFF
2
1
R708
0
5% 1/10W FF 805
NOSTUFF
2
1
R709
PP1V2_RUN
74LCX125
TSSOP
CRITICAL
3
14
17
2
U700
402
CERM
10V
20%
0.1UF
2
1
C700
FERR-EMI-100-OHM
SYS_PWR_BTN_FILT
SM
21
L700
SM
FERR-EMI-100-OHM
21
L701
DEVELOPMENT
GREEN
2.0X1.25A 2
1
LED701
GREEN
2.0X1.25A 2
1
LED702
PP3V3_PWRON
5% MF
330
603
1/16W
21
R700
GREEN
2.0X1.25A 2
1
LED700
F-RT-TH
HM96110-P2
CRITICAL
9
8
7
6
5
4
3
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
J700
SM
21
XW704
SM
21
XW705
SM
21
XW706
SM
21
XW707
TH
HSK-NUT-6.5MM
1
SDF700
0
5% 1/10W FF 805
2
1
R711
PP12V_RUN
805
FF
1/10W
5%
0
2
1
R715
805
0
5%
1/10W
FF
NOSTUFF
21
R716
NOSTUFF
FF
1/10W
5%
0
805
21
R717
PP1V5_RUN
805
FF
1/10W
5%
0
2
1
R718
0
5%
1/10W
FF
805
2
1
R719
PP24V_RUN
OMIT
CRITICAL
PWR-BUTT
ST-SM3
2
1
54
3
SW703
PP3V3_RUN
5%
2512
FF
1W
0
2 1
R707
MF
5%
1/16W
330
603
21
R710
CERM 402
10V
20%
0.1UF
2
1
C703
1/16W
5% MF
DEVELOPMENT
330
603
21
R701
PP5V_ALL
CRITICAL
BB10209-A5
TH
1 2
J702
1
SW703
POWER SWITCH - 20INCH
516S0249
20_INCH_LCD
516S0248
1
POWER SWITCH - 17INCH
SW703
17_INCH_LCD
051-6482
103
7
C
VOLTAGE=0
MIN_LINE_WIDTH=25MIL
GND_CHASSIS_TMDS MIN_NECK_WIDTH=15MIL
GND_CHASSIS_RJ45
VOLTAGE=0
MIN_NECK_WIDTH=15MIL MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=0V
MIN_LINE_WIDTH=25MIL
VOLTAGE=5V
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL MAKE_BASE=TRUE
VOLTAGE=3.3V
MIN_NECK_WIDTH=10MIL MIN_LINE_WIDTH=25MIL
MAKE_BASE=TRUE VOLTAGE=1.5V
MAKE_BASE=TRUE
MIN_NECK_WIDTH=10MIL
VOLTAGE=2.5V MIN_LINE_WIDTH=25MIL
VOLTAGE=1.2V
MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE MIN_LINE_WIDTH=25MIL
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE
VOLTAGE=2.5V
VOLTAGE=5V
MAKE_BASE=TRUE
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
MAKE_BASE=TRUE MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=1.5V
MAKE_BASE=TRUE
VOLTAGE=1.2V MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL MAKE_BASE=TRUE
MIN_NECK_WIDTH=10MIL
VOLTAGE=12V
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
MAKE_BASE=TRUE
VOLTAGE=24V
MIN_LINE_WIDTH=12MIL MIN_NECK_WIDTH=8MIL MAKE_BASE=TRUE
VOLTAGE=3.3V
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
VOLTAGE=5V
PP5V_ALL
MAKE_BASE=TRUE
GND_CHASSIS_VGA GND_CHASSIS_USB GND_CHASSIS_FIREWIRE
ITS_PLUGGED_IN
POWER_GOOD
=PP1V2_PWRON_SB
=PP3V3_ALL_RTC
MAKE_BASE=TRUE
PP3V3_ALL_RTC
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=3.3V
=PP1V2_PWRON_HT =PP1V2_PWRON_DISK_SB
=PP3V3_SB_PCI
PPVCORE_NB
=PPVCORE_PWRON_PULSAR
=PP1V5_PWRON_NB_AVDD
=PP2V5_PWRON_HT
=PP2V5_PWRON_RAM =PP2V5_HT
=PP2V5_PWRON_SB
=PP5V_PWRON_AIRPORT
_PP5V_PWRON_USB
ITS_RUNNING
=PP5V_ALL_CPU
=PP3V3_ALL_CPU
=PP3V3_ALL_SMU
=PP1V2_EI_CPU
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=1.2V
PP1V2_EI_CPU
MAKE_BASE=TRUE
=PP1V2_EI_NB
MAKE_BASE=TRUE
PP1V2_EI_NB
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=1.2V
=PP1V2_PULSAR
=PP1V2_HT
SMU_MANUAL_RESET_L
PP1V25_RAM_VTT
SYS_POWER_BUTTON_L
GND_CHASSIS_AUDIO_INTERNAL
MAKE_BASE=TRUE
GND_CHASSIS_17_INCH_INVERTER
VOLTAGE=0
MIN_NECK_WIDTH=10MIL MIN_LINE_WIDTH=25MIL
SYS_POWERUP_L
PP3V3_ALL_BATT
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=3.3V
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=3.3V
PP3V3_ALL_BATT_SAFETY
PP3V3_ALL
GND_CHASSIS_LED
GND_CHASSIS_20_INCH_INVERTER
VOLTAGE=0
MIN_NECK_WIDTH=10MIL MIN_LINE_WIDTH=25MIL
ITS_ALIVE
=PPVCORE_CPU
=PP24V_GRAPHICS
PP12V_AUDIO_CODEC
PP12V_AUDIO_SPKRAMP
=PP12V_AGP =PP12V_RUN_CPU =PP12V_DISK
=PP5V_PATA
=PP5V_AGP
=PP5V_RUN_CPU
PP5V_AUDIO
PP3V3_AUDIO
=PP3V3_PATA
=PPVIO_PCI_USB2
=PP3V3_PCI
=PP3V3_DISK
PP2V5_GPU
=PP2V5_RUN_CPU =PP2V5_RUN_RAM
=PP1V5_AGP =PPVCORE_PULSAR
=PPVCORE_CPU
MAKE_BASE=TRUE
PPVCORE_CPU
=PP3V3_PWRON_SB =PPPCI64_PWRON_SB =PPPCI32_PWRON_SB _PP3V3_PWRON_MODEM =PP3V3_PWRON_USB
PP3V3_PWRON_ENET _PP3V3_PWRON_BT _PP3V3_PWRON_UDASH =PP3V3_PWRON_CPU
GND_AUDIO
MIN_NECK_WIDTH=10MIL
PP3V3_ALL
MIN_LINE_WIDTH=25MIL
VOLTAGE=3.3V
MAKE_BASE=TRUE
=PP3V3_ALL_EI
=PP3V3_PWRON_EI
GND_SYS_PWR_BTN_FILT
SYS_POWER_BUTTON_L
SYS_RESET_BUTTON_L
RESET_BUTTON_L
POWER_BUTTON_L
=PP3V3_RUN_CPU
=PP3V3_AGP
=PP5V_DISK
=PP5V_RUN_RAM
MIN_NECK_WIDTH=15MIL
GND_CHASSIS_AUDIO_EXTERNAL
VOLTAGE=0 MIN_LINE_WIDTH=25MIL
MAKE_BASE=TRUE
59 58 57
35
56
31
33
36
103
77
36
52
60
88
30
13
90
32
31
102
76
55
32
35
90
51
48
40
74
13
29 28
46
13
11
59
31
59
8
101
75
54
46
31
34
74
59
13
50
59
11
22
37
37
64
25
8
18 18
60
8
45
7
10
11
102
29
59
83
50
6
100
74
52
45
49
29
33
25
11
7
49
83
102
6
87
6
59
92
90
8
25
13
94
36
62
80
74
6
26
28
62
26
60
23
76
92
36
36
6
14 14
26
24
6
44
6
101
59
6
7
100
21
59
7
59
102
100
50
33
6
83
49
3
101
95
83
77
25
83
50
31
44
48
26
7
6
23
23
23
94
91
87
92
94
36
102
7
28
6
13
6
6
33
48
6
46
101
ALIAS ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
125
125
125
ALIAS
S
D
G
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
MC33465N_30ATR
RESETDELAY
VCC
GND
VOLTAGE DETECTOR
ALIAS
ALIAS
ALIAS
ALIAS
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
CONNECTION
SIGNAL FROM POWER SUPPLY
PULL DOWN
(SMU_BOOT_EPM)
CONNECTOR
THESE PINS HAVE INTERNAL PULLUPS
SIGNAL ALIAS
518S0104
SHASTA JTAG
SMT NUTS
AIRPORT CARDGUIDE
PLL LOCK LED
SMU ANALOG VREF
CHKSTOP LED
CPU HEATSINK SMT NUTS
DIAG LED
2.2V FOR CPU VRM10.
CPU VID<0:5>
NOTE:PULL UP CPU_VID<5>TO
VID CONTROLLED BY SMU
SMU
PCI CLOCKS
NET_SPACING_TYPE
ELECTRICAL_CONSTRAINT_SET
PULSAR ERROR_L LEDBACKUP SMU RESET CIRCUIT
DOWNLOAD
518-0158
J802 & R826 CAN MOVE TO DEVELOPMENT BOM POST RAMP
POWER_GOOD IS A 5V DRIVEN
2K PULLUP INSIDE P/S
POWER_FAIL_L
1/16W
10K
MF 402
5%
2
1
R825
100
5%
1/16W
MF
402
2 1
R826
402
MF
1/16W
0
5%
21
R802
1/16W
5% MF
402
10K
2
1
R803
NOSTUFF
10K
5% 1/16W MF 402
2
1
R807
5%
402
1/16W
10K
MF
2
1
R806
MF
NOSTUFF
5%
0
1/16W
402
21
R828
74LCX125
TSSOP
6
14
47
5
U700
74LCX125
TSSOP
8
14
10
7
9
U700
TSSOP
74LCX125
11
14
13
7
12
U700
4.7K
5% 1/16W MF 402
2
1
R870
PP2V5_PWRON
10K
5% 1/16W MF 402
2
1
R814
402
MF
5%
10K
1/16W
2
1
R816
402
10K
MF
1/16W
5%
2
1
R817
5% 1/16W MF
10K
402
2
1
R808
MF
1/16W
5%
402
10K
2
1
R809
402
1K
MF
1/16W
5%
NOSTUFF
2
1
R827
402
MF
5%
1K
NOSTUFF
1/16W
2
1
R829
402
MF
5%
1K
NOSTUFF
1/16W
2
1
R830
402
MF
1/16W
5%
1K
NOSTUFF
2
1
R831
PP3V3_RUN
402
10K
5% 1/16W MF
2
1
R804
402
20K
5% 1/16W MF
2
1
R811
NOSTUFF
HSK-NUT-6.5MM
TH
1
SDF800
HSK-NUT-6.5MM
TH
NOSTUFF
1
SDF801
HSK-NUT-6.5MM
TH
NOSTUFF
1
SDF803
HSK-NUT-6.5MM
TH
NOSTUFF
1
SDF802
DEVELOPMENT
RED
SM
2
1
D810
OMIT
6P15R5P4
1
ZH804
CERM
16V
20%
0.01UF
402
2
1
C880
CERM
16V
20%
0.01UF
402
2
1
C881
CERM
16V
20%
0.01UF
402
2
1
C882
CERM
16V
20%
0.01UF
402
2
1
C883
402
0.01UF
20% 16V CERM
2
1
C884
DEVELOPMENT
5%
180
1/16W MF 402
2
1
R833
DEVELOPMENT
SM
RED
2
1
LED801
Q800_D
DEVELOPMENT
SM
2N7002
2
1
3
Q800
DEVELOPMENT
5%
402
MF
1/16W
180
2
1
R834
Q801_B
DEVELOPMENT
SM
2N3904
2
3
1
Q801
2N3906
DEVELOPMENT
SM
2
3
1
Q802
MF
1/16W
180
5%
DEVELOPMENT
402
2
1
R835
5%
DEVELOPMENT
402
MF
1/16W
180
21
R836
DEVELOPMENT
2.0X1.25A
GREEN
2
1
LED802
DEVELOPMENT
1/16W
5%
402
MF
180
2
1
R837
DEVELOPMENT
5%
1K
1/16W MF 402
2
1
R838
DEVELOPMENT
SM
2N3904
2
3
1
Q803
DEVELOPMENT
5%
402
MF
1/16W
180
21
R839
402
MF
1/16W
5%
NOSTUFF
1K
2
1
R832
I246
I247
STDOFF-6MMOD1MMH-TH
1
SDF890
STDOFF-6MMOD1MMH-TH
1
SDF891
SM
RED
2
1
LED850
SM
2N3904
2
3
1
Q850
5% MF
402
1/16W
1K
21
R851
PP5V_ALL
1/16W MF
180
5%
402
2
1
R850
MF
5%
430
1/16W 402
2
1
R813
1/16W MF
4.7K
5%
402
2
1
R860
1K
1/16W MF
5%
402
NOSTUFF
2
1
R890
NOSTUFF
CERM
1uF
10%
6.3V 402
2
1
C891
SM
NOSTUFF
2
1
3
5
U890
0.01UF
NOSTUFF
402
10% 16V
CERM
2
1
C890
402
MF
1/16W
5%
0
21
R810
NOSTUFF
402
CERM
20% 10V
0.1uF
2
1
C800
HC17051
M-ST-TH
9
87
65
43
2
10
1
J802
NOSTUFF
5% MF
402
1/16W
0
2
1
R805
PP3V3_ALL
U.FL-R_SMT
DEVELOPMENT
F-ST-SM
1
2
3
J800
PP3V3_ALL
NOSTUFF
5%
402
MF
10K
1/16W
2
1
R812
SSOT-23
NOSTUFF
2.5V
3
12
VR801
NOSTUFF
200
1/16W MF 402
1%
2
1
R818
NOSTUFF
2.2UF
20% 10V
CERM
805
2
1
C801
NOSTUFF
CERM
10V
20%
0.47UF
603
2
1
C802
BM12B-SRSS-TB
F-ST-SM
NOSTUFF
9876543
2
121110
11314
J803
1/16W
5%
0
MF
402
21
R819
MF
402
0
5%
1/16W
21
R820
1/16W
0
MF
5%
402
21
R821
402
MF
1/16W
5%
0
21
R822
0
1/16W
MF
5%
402
21
R823
0
1/16W
MF
5%
402
21
R824
DEVELOPMENT
5%
4.7K
402
MF
1/16W
2
1
R801
DEVELOPMENT
MF
330
402
1/16W
5%
2
1
R800
PP3V3_RUN
051-6482
103
8
C
SMU_BOOT_CE
SMU_BOOT_CNVSS
SMU_BOOT_SCLK
SMU_BOOT_TXD
SMU_MANUAL_RESET_L
J802_6
J802_2
SMU_BOOT_RXD
NB_SUSPEND_ACK_L
ALS1_OUT
SMU_MANUAL_RESET_L
=PP3V3_ALL_SMU
SMU_RESET_L
=PCI_ROM_RESET_L =PCI_USB2_RESET_L
CPU_VID_R<0>
SYS_WARM_RESET_L
SMU_RESET
10 MIL SPACING
10 MIL SPACING
SYS_COLD_RESET_L
SMU_RESET
CPU_VID_R<5>
FAN_PWM8
RAM_CKE_R<6>
MAKE_BASE=TRUE
TP_ALS1_OUT
MAKE_BASE=TRUE
TP_ALS0_OUT
MAKE_BASE=TRUE
PCI_RESET_L
SYS_SLOT_PWR
RAM_CKE_R<3>
NB_THMO
NB_THMI
TP_NB_THMI
MAKE_BASE=TRUE
TP_RAM_CKE_R<3>
MAKE_BASE=TRUE
TP_RAM_MUXEN4
MAKE_BASE=TRUE
RAM_MUXEN0
PCI_CLK_P4
RAM_CKE_R<7>
GPU_RESET_L
MAKE_BASE=TRUE
SMU_WARM_RESET_L
PCI_AIRPORT_RESET_L
PCI_CLK33M_AIRPORT MAKE_BASE=TRUE
MAKE_BASE=TRUE
RAM_CS_L_R<11>
MAKE_BASE=TRUE
RAM_CS_L_R<10>
TP_RAM_CS_L_R<3>
MAKE_BASE=TRUE
RAM_CS_L_R<3>
TP_RAM_CS_L_R<2>
MAKE_BASE=TRUE
RAM_CS_L_R<2>
MAKE_BASE=TRUE
TP_RAM_MUXEN0
RAM_MUXEN4
MAKE_BASE=TRUE
TP_RAM_CKE_R<7>
TP_RAM_CKE_R<6>
MAKE_BASE=TRUE
MAKE_BASE=TRUE
TP_RAM_CKE_R<2>
RAM_CKE_R<2>
TP_THMO
MAKE_BASE=TRUE
NB_WARM_RESET_L
TP_FAN_PWM8
MAKE_BASE=TRUE
MAKE_BASE=TRUE
TP_SYS_DRIVE_BAY_INT_L
SYS_DRIVE_BAY_INT_L
MAKE_BASE=TRUE
TP_SYS_DOOR_AJAR_L
SYS_DOOR_AJAR_L
TP_SYS_SLOT_PWR
MAKE_BASE=TRUE
TP_SMU_PWRSEQ_P1_3
MAKE_BASE=TRUE
SMU_PWRSEQ_P1_3
MAKE_BASE=TRUE
TP_SMU_ONEWIRE
SMU_ONEWIRE
MAKE_BASE=TRUE
ALS_GAIN_BOOST
ALS0_OUT
TP_PCI_CLK_P4 MAKE_BASE=TRUE
PCI_CLK_P1
TP_PCI_CLK_GP1 MAKE_BASE=TRUE
PCI_CLK_GP1
_PCI_CLK33M_AIRPORT
PCI_CLK_P3
=PCI_CLK33M_USB2
PCI_CLK_GP0
PCI_CLK33M_USB2 MAKE_BASE=TRUE
CPU_VID<4>
CPU_VID<2>
CPU_VID<0>
CPU_VID<5>
CPU_VID<3>
CPU_VID<1>
DIAG_LED MAKE_BASE=TRUE
DIAG_LED_R
CPU_VID_R<2>
CPU_VID_R<1>
CPU_VID_R<4>
CPU_VID_R<3>
LED850P2
LED850P1
=PP5V_RUN_CPU
NB_SUSPENDACK_L
SYS_SLEEP
SMU_WARM_RESET_L SYS_WARM_RESET_L
=PPVREF_SMU
MAKE_BASE=TRUE
PPVREF_SMU
PP3V3_ALL_SMU_AVCC
Q802_E
HS_SDF803
HS_SDF800 HS_SDF801 HS_SDF802
GND_SMU_AVSS
JTAG_SB_TRST_L
Q803_B
Q803_C
LED802_1
CHKSTOP_L
Q800_G
LED801_1
CLOCK_ERROR_L
ERROR_LED
NB_PMR_OBSV
GND_SMU_AVSS_DAGND
PPVREF_SMU_ADC_REF
SMU_SLEEP
SMU_BOOT_BUSY
Q802_B
JTAG_SB_TCK
MAKE_BASE=TRUE
TP_JTAG_SB_TCK
JTAG_SB_TMS
MAKE_BASE=TRUE
TP_JTAG_SB_TMS
JTAG_SB_TDO
MAKE_BASE=TRUE
TP_JTAG_SB_TDO
JTAG_SB_TDI
MAKE_BASE=TRUE
TP_JTAG_SB_TDI
PLLLOCK
HS_SDF804
=PP5V_RUN_CPU
POWER_GOOD
SYS_POWERFAIL_L
50
87
31
46
87
31
77
74
8
11
77
8
8
8
13
74
58
7
10
74
36
29
7
7
7
7
13
33
25
24
33
51
13
74
33
33
33
33
6
9
13 25
33
14
6
13
13
13
13
13
6
13
24
13
6
6
6
75
77
6
8
13
6
13
37
6
13
37
24
24
6
6
37
27 37
49
8
76
6
6
37
6
37
6
37
6
37
6
37
6
6
6
37
24
13
13
13
13
13
13
27 27
27
76
27
77
27
13
13
13
13
13
13
13
6
6
6
6
3
13
6
8 8
13
13
13
25
6
27
24
36
36
13
13
25
25
25
25
29
3
7
6
D
G
S
D
G
S
D
G
S
FB
LD
HD
GND
COMP
SS
VCC
VC
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
2.5V VOLTAGE REGULATOR
LOW TO ENABLE
PEAK CURRENT OF TOTAL RAILS
2.5V VREG
U900_FEEDBACK
NOTE:
12.68A WITH DIMM TERMINATION
SET OUTPUT=2.62V FOR FRAMEBUFFER.
9.24A WITHOUT DIMM TERMINATION
IRU3037CS VREF=1.25VDC VOUT=VREF*(R903+R905)/R905=2.62VDC
805
1/10W
5% FF
0
21
R902
1% MF
402
1/16W
10K
2
1
R905
NOSTUFF
FF 1206
5% 1/8W
1.1K
2
1
R904
8X11.5-TH
ELEC
20%
390UF
6.3V
2
1
C903
TH-KZJ
1800UF
ELEC
6.3V
20%
2
1
C908
10UF
20%
6.3V CERM 1206
2
1
C901
TH-KZJ
20% ELEC
6.3V
1800UF
2
1
C909
PP5V_PWRON
1UF
20% 25V CERM 805
2
1
C904
PP5V_PWRON
SO-8
IRF7410
3 2 1
4
8 7 6 5
Q903
SM
MBR0520L
2 1
D900
MBR0520L
SM
2 1
D901
SM
MBR0520L
2
1
D902
603
CERM
10V
20%
1UF
2
1
C917
603
CERM
NOSTUFF
0.022UF
10% 50V
2
1
C905
805
CERM
25V
20%
1UF
2
1
C916
PP2V5_PWRON
PP2V5_RUN
CASE369
NTD70N03R
3
1
4
Q901
CASE369
NTD70N03R
3
1
4
Q902
220PF
25V
5% CERM
402
2
1
C906
CRITICAL
1.6UH
TH
21
L901
IRU3037CS
SOI
2 6
8
3
5
4
1
7
U900
11K
1% 1/16W MF 402
2
1
R903
603
CERM
0.47UF
20% 10V
2
1
C915
MF
27.4K
1/16W
1%
402
2
1
R901
56PF
50V CERM 402
5%
2
1
C913
NOSTUFF
3300PF
603
10% CERM
50V
2
1
C907
603
3900PF
5% CERM
50V
2
1
C914
4.7
1/10W 805
FF
5%
2
1
R900
NOSTUFF
1UF
20% CERM
25V 1206
2
1
C912
CRITICAL
ELEC
6.3V
20%
390UF
8X11.5-TH
2
1
C902
103
9
C
051-6482
R901_P2
U900_GATE_L
U900_FEEDBACK
U900_VC_R
U900_VC
Q901_GATE
R904_P2
U900_GATE_H
U900_COMP
Q902_DRAIN
MIN_NECK_WIDTH=10MIL MIN_LINE_WIDTH=25MIL
U900_VC_D
SYS_SLEEP
U900_SS
MIN_NECK_WIDTH=10MIL
VOLTAGE=2.5V MIN_LINE_WIDTH=25MIL
50 46 11 10
8 6 6
D
G
S
FB
LD
HD
GND
COMP
SS
VCC
VC
S
D
G
G
D
S
G
D
S
S
D
G
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PEAK CURRENT OF TOTAL RAILS
VOUT=VREF*(R1003+R1005)/R1005=1.206VDC
NOTE: SET OUTPUT=1.2V IRU3037ACS VREF=0.8VDC
SHASTA CORE VOLTAGE REGULATOR
RDSON=0.06 OHM @ VGS=2.5 V
RDSON=0.016 OHM @ VGS=2.5 V
5.96A
1.2V VREG
PEAK CURRENT 0.6A
PP1V2_PWRON FET SWITCH
PEAK CURRENT 4.43A
PP1V2_RUN FET SWITCH
U1000_FEEDBACK
TH
1.6UH
21
L1001
NOSTUFF
50V
10%
3300PF
CERM 603
2
1
C1007
10K
1/16W 402
MF
1%
2
1
R1005
5% 1/8W
1.1K
FF
NOSTUFF
1206
2
1
R1004
NOSTUFF
1206
25V CERM
20%
1UF
2
1
C1012
MBR0520L
SM
2
1
D1002
PP5V_ALL
1UF
20%
603
10V CERM
2
1
C1017
NTD70N03R
CASE369
3
1
4
Q1002
50V
10%
NOSTUFF
CERM 603
0.022UF
2
1
C1005
MBR0520L
SM
2 1
D1000
SM
MBR0520L
2 1
D1001
FF
805
1/10W
5%
0
21
R1000
25V
1UF
20% CERM
805
2
1
C1000
220PF
402
CERM
5% 25V
2
1
C1006
1UF
CERM 805
25V
20%
2
1
C1004
SOI
IRU3037ACS
2 6
8
3
5
4
1
7
U1000
TH-KZJ
1800UF
6.3V ELEC
20%
2
1
C1009
5.11K
1/16W
1% MF
402
2
1
R1003
2N7002
SM
2
1
3
Q1000
PP3V3_ALL
1/16W
100K
5%
402
MF
2
1
R1007
PP1V2_RUN
20%
6.3V ELEC
1800UF
TH-KZJ
2
1
C1008
SOT-363
2N7002DW
4
5
3
Q1004
SOT-363
2N7002DW
1
2
6
Q1004
PP5V_ALL
5%
100K
402
1/16W
MF
2 1
R1008
PP5V_ALL
TSOP
SI3446DV
4
3 6
521
Q1006
PP1V2_PWRON
SM
2N7002
2
1
3
Q1005
100K
402
1/16W
MF
5%
2 1
R1009
PP5V_ALL
20%
390UF
6.3V ELEC 8X11.5-TH
2
1
C1003
SOI
SI9426DY
I70
321
4
8765
Q1003
3900PF
50V 603
CERM
5%
2
1
C1014
68PF
CERM
50V 603
5%
2
1
C1013
603
16V CERM
20%
0.1UF
2
1
C1015
1/16W MF 402
1%
27.4K
2
1
R1001
402
5%
0
MF
1/16W
21
R1010
1/16W 402-1
MF
NOSTUFF
0
5%
21
R1011
402
0
1/16W
MF
5%
21
R1012
NOSTUFF
MF
402-1
1/16W
5%
0
21
R1013
PP3V3_ALL
8X11.5-TH
390UF
20%
6.3V ELEC
2
1
C1002
100K
1/16W
5%
402
MF
2
1
R1014
4.7
5% 1/10W FF 805
2
1
R1002
NTD60N02R
CASE369
3
1
4
Q1001
1206
10UF
20%
6.3V CERM
2
1
C1001
051-6482
C
10
103
Q1001_GATE
Q1002_DRAIN
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
U1000_GATE_L
Q1005_G
SYS_SLEEP
U1000_GATE_H
Q1003_G
U1000_SS
R1004_P2
R1001_P2
Q1006_G
U1000_FEEDBACK
U1000_COMP
Q1000_G
SYS_POWERUP_L
SYS_POWERUP_L
TURN_ON_SHASTA_CORE_L
TURN_ON_PP1V2_L
U1000_VC_DU1000_VC_R
U1000_VC
PPVCORE_PWRON_SB PPVCORE_PWRON_SB
MIN_NECK_WIDTH=15MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=1.2V
MAKE_BASE=TRUE
PPVCORE_PWRON_SB
50
33
33
46
13
13
11
11
11
9
10
10
10 10
10
8
7
7
6 6
6
6
6
6
3
3
3 3
23
3
D
G
S
G
DS
LM339A
V+
GND
LM339A
V+
GND
TAB
VOUTVPWR
VCTRL
VOUT
ADJ
SENSE
D
G
S
G
DS
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
RUN -> FLOAT SLEEP -> LOW SHUTDOWN -> FLOAT
RUN -> LOW SLEEP -> FLOAT SHUTDOWN -> FLOAT
PROCESS SWING
Vout=Vref(1+R2/R1)+Iadj(R2) Vref=1.250V typ
3.30V - 3.45V
Iadj=50uA typ
R1
R2
P-CHANNEL Ron=11mOhm
Vctrl >= Vout+1.25V
Vpwr >= Vout+0.35V
PP5V_PWRON
FET ON IN RUN
5V & 3.3V VREGS
FET ON IN SLEEP
FET ON IN RUN
Ron=11mOhm
FET ON IN SLEEP
P-CHANNEL
20%
150UF
10V ELEC SM
2
1
C1100
SI4467DY
SM-1
CRITICAL
3 2 1
4
8 7 6 5
Q1100
402
MF
1/16W
5%
100K
21
R1100
CRITICAL
SI4467DY
SM-1
3
2
1
4
8
7
6
5
Q1101
SOI
CRITICAL
3
13
11
10
12
U1100
SOI
3
2
5
4
12
U1100
603
MF
1/16W
1%
47.0K
2
1
R1102
CS5253
SM
CRITICAL
5
6
3
4
1
2
VR1100
1/16W
100K
MF
5%
402
21
R1103
100K
5% MF
1/16W
402
21
R1104
603
MF
1/16W
1%
124
2
1
R1105
603
MF
1/16W
1%
210
2
1
R1106
603
CERM
16V
N20P80%
0.1UF
2
1
C1101
SM-1
SI4467DY
3 2 1
4
8 7 6 5
Q1102
SI4467DY
SM-1
3
2
1
4
8
7
6
5
Q1103
20%
6.3V ELEC
100UF
SM
2
1
C1102
MF
1/16W
1%
1K
402
2
1
R1107
402
1K
1% 1/16W MF
2
1
R1101
051-6482
C
11
103
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=5V
PP5V_PWRON
PP3V3_PWRON
VOLTAGE=3.3V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
RAIL_CTL_NEG
RAIL_CTL_POS
PP5V_ALL
PP3V3_ALL
PP3V3_RUN
MIN_NECK_WIDTH=10MIL
3_3V_ALL_ADJ MIN_LINE_WIDTH=20MIL
PP3V3_ALL
VOLTAGE=3.3V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
MIN_NECK_WIDTH=10MIL
RAIL_SLEEP_FET MIN_LINE_WIDTH=20MIL
PP5V_RUN
SYS_POWERUP_L
SYS_SLEEP
PP5V_ALL
RAIL_RUN_FET
MIN_NECK_WIDTH=10MIL
50
33
46
90
90
13
10
27
11
59
59
10
9
11
18
18
7
11
18
11
18
7
8
7
6
6
3
6
7
6
7
6
6
6
6
P9[7]
P9[6]
P9[5]
P8[7]
P8[6]
P8[5]
P3[7]
P3[6]
P3[5]
P3[4]
P2[6] P2[7]
P2[4] P2[5]
P1[4]
P1[3]
P1[2]
P1[1]
P1[0]
P0[4]
P0[0]
P0[2] P0[3]
P0[1]
P0[7]
P0[6]
P0[5]
P3[3]
P3[2]
P3[1]
P3[0]
P2[3]
P2[2]
P2[1]
P2[0]
P1[5] P1[6] P1[7]
PCNVSS RESET* XOUT
VREF
XIN
P7[7]
P7[6]
P7[5]
P7[4]
P7[3]
P7[2]
P7[1]
P7[0]
P6[7]
P6[6]
P6[5]
P6[4]
P6[3]
P6[2]
P6[1]
P6[0]
P10[0] P10[1]
P9[3]
P9[2]
P9[1]
P9[0]
P8[4]
P8[3]
P8[2]
P8[1]
P8[0]
P10[6] P10[7]
P10[2] P10[3] P10[4] P10[5]
VCC
AVSS
VSS
AVCC
SQW/ OUT
VBAT
SDA SCL
X1 X2
GND
VCC
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
3.6
2.7
100K/10uF RC filter at SMU pins.
SMU_VREF should be same signal or
circuit, but be aware that this will
7.6
1.5
1.6
1.7
0.6
0.5
Port
0.4
Portable
Alternate Functions
2.6
Port
2.5
Consumer
Port
6.1
6.2
6.0
7.2
7.4
Tower & Server
Y
Y
IOC2 IOC3
SS
Y
Y
Y
Y
Y
Y
Y
Y
IOC5
INT3*
AN22
YYY
YYY
Y
Y
Y
Y
YYY
YYY
Y
Y
N
N
N
(see aliases below)
SS
Y
Y
Y
Y
Y
SYYS
Y Y
Y
Y
Y Y
Y
Y
S
YYYS S
AN26
Y
Y
Y Y Y
Y
YY
Y
Y
Y
Y
Y
S
INT0*
S
Y
Y
Y Y
Y YYYY
Y
S
Y
Y
Y Y
YYNNSS
Y Y
Y
Y
Y
Y
Y
Y Y
Y
Y
Y
YYYY
Y
Y
Y Y
Y
Y
Entry Desktop
Entry Desktop
Desktop
S
Y
Y
Y
Y
Y
Y
Y
Y
S
Y
Y
Y Y
Y Y
Y Y
Y
Y Y
Y
Y
Y N Y
Y
Y Y
Y
Y
Y Y Y Y
Y
Y Y Y
Portable
Y
Y
Y
Y Y
Y
Y
Y
Y
Y
S
Y
Y
Y
S
Y
Y
Y
S
Y
Y
Y
Y
Y
S
Y
S
Y
Y S
Y
Y
Y
Y
Y
S
Y
Y
Y
Y
Y
Y
S
Y
Y Y
Y
Y Y
Y
Y
N
Y
Y
S
S
Y
Y Y
S S Y
Y
N
S S
N
N
N
Consumer
N
N
N
Server
S
Y Y Y Y
Y Y Y
Y
S
Y
Y
Y
Y
S
Y
Y
Y
Y
Y
Y
Y YYY
Y
Y Y
Y
Y
Y
Y
Y Y Y
Y
S
NSS
Y
Y
Y
Y
Y
Y
Y
Y YSY
Y
Y Y Y
Y
Y Y
S
N Y
Y
Y YYYY
S S
SS
S S
Consumer
Y S S
Y
S
Y Y
Y Y Y
N N
Y Y
Y
Y
Y
Y
Y
Y
Y
Y
S
Y
Y
N
N
Y
Y
Y
Y Y
Y
Portable
DesktopYServer
SMU Pull-ups / pull-down
NET_SPACING_TYPE
System Management Unit
TA1out
S
S
NOTE: Some primary and alternate functions
AC adapter ID.
affect other analog inputs such as
those capacitors are provided on
Caps should connect to GND_SMU_AVSS.
(CPU_SENSE_I/CPU_SENSE_V) requires
TA3out
TA4in
IOC6
Power aliases required by this page:
review the latest SMU specification to ensure missing pull-ups are
TB2in
this page.
SCL
Y
IOC4
Y Y
KI2*
KI0*
AN3
AN2
AN1
Sout3
Y Y
Y Y
Y Y
Y
Y
SCLmm
AN25
INT1*
NMI*
TB1in
AN24
TA1in
TA4out
SDA
AN05
AN07
RXD1
CLK0 RXD0
RTS1*
CLK1
TXD1
RTS0*/
reuire pull-ups that are not. provided on this page. Please.
NC
Real Time Clock
NOTE: CPU current/voltage monitoring
BOM options provided by this page:
ELECTRICAL_CONSTRAINT_SET
- _PP3V3_ALL_SMU
- _PP3V3_ALL_RTC
- _PP3V3_PWRON_SMU
(NONE)
(NONE)
reference used by monitoring
provided on another page.
System Management Unit
Master: Link
Sin3
TB0in
(BUSY)
AN0
TA3in
AN21
AN23
AN27
Y
CE*
INT2*
AN04
TA2in
IOC7
CTS0*
AN06
AN20
Y
INT4* INT5*
SDAmm
Y Y S S
Y1300’s load capacitance is 12pF
Keep crystal subcircuit close to SMU.
S
KI3*
TXD0
AN01
AN03
AN02
AN00
TA2out
CLK3
N = Alternate function
Y = Primary function
S = Spare
Page Notes
- _PPVREF_SMU (SMU AVCC or 2.5V reference) Signal aliases required by this page:
signal (GND_SMU_AVSS). None of
a 100pF capacitor to the SMU AVSS
NOTE: All analog inputs to SMU should have
NOTE: Pinout matches SMU pinout v1.51.
KI1*
Y
CRITICAL
10.0000M
8X4.5MM-SM
21
Y1300
OMIT
M30280F8
QFP-80
10 12
11
77
13
9
79
80
1
2
3
4
5
7
8
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
40
41
42
43
32
33
34
35
36
37
38
39
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
68
69
70
71
72
73
74
76
59
60
61
62
63
64
65
66
67
6
75
78
U1300
DS1338
MSOP
2
1
8
3
7
5
6
4
U1301
PP3V3_PWRON
PP3V3_RUN
PP2V5_PWRON
0
NO_SMU_I2C_D
402
MF
1/16W
5%
21
R1399
1N914
SOT23
3
1
D1310
402
10%
6.3V CERM
1uF
2
1
C1325
402
1/16W
MF
5%
10K
2
1
R1325
5% 1/16W MF 402
150K
2
1
R1322
CERM
6.3V 402
0.22uF
20%
2
1
C1310
50V
5%
402
CERM
18pF
2
1
C1304
50V
5%
402
CERM
18pF
2
1
C1305
0
5% MF
1/16W
402
2
1
R1317
NO STUFF
402
1/16W
MF
5%
10M
21
R1316
10K
5% MF
1/16W 402
2
1
R1327
402
MF
1/16W
5%
2K
21
R1312
5%
1/16W
MF
402
2K
NO STUFF
21
R1311
402
MF
1/16W
5%
100K
21
R1313
100K
5%
1/16W
MF
402
21
R1310
402
MF
1/16W
5%
10K
21
R1302
10K
402
MF
1/16W
5%
21
R1300
5%
1/16W
MF
10K
402
12
R1304
402
0.1uF
CERM
20% 10V
2
1
C1309
402
CERM
0.1uF
20% 10V
2
1
C1308
402
CERM
0.1uF
20% 10V
2
1
C1302
402
CERM
0.1uF
20% 10V
2
1
C1301
805
CERM
20%
10uF
6.3V 2
1
C1300
6.3V
10%
1uF
CERM 402
2
1
C1303
4.7
5%
1/16W
MF
402
21
R1315
SM
21
XW1300
CRITICAL
SM-1
32.768K
4
1
Y1301
402
MF
1/16W
5%
10K
21
R1303
C
13 103
051-6482
SYS_SLOT_PWR
TP_SMU_SPARE_P10_0
SYS_RESET_BUTTON_L
SB_SUSPENDACK_L
NB_SUSPENDACK_L
SMU_WARM_RESET_L
SMU_PWRSEQ_P9_6
SB_STOPXTALS_L
I2C_SMU_CPU_SDA_OUT_L
FAN_PWM8
I2C_SMU_B_SCL
CPU_VID<3>
SMU_PWRSEQ_P9_5
SYS_COLD_RESET_L
SYS_POWER_BUTTON_L
SMU_SUSPENDREQ_L
SB_TO_SMU_INT_L
CLOCK_RESET_L
SMU_SLEEP
SYS_SLEWING_L
I2C_SMU_CPU_SCL_OUT_L
CPU_HRESET
FAN_RPM1
SYS_LED
I2C_SMU_CPU_SDA_IN
FAN_RPM2
SYS_PME_L SMU_QREQ
I2C_SMU_CPU_SCL_IN
FAN_RPM0
I2C_SMU_B_SDA
SMU_BOOT_TXD
SMU_BOOT_RXD
MAKE_BASE=TRUE
SYS_POWERUP_L
CPU_VID<5>
CPU_VID<4>
CPU_VID<1>
CPU_VID<0>
CPU_VID<2>
RTC_CLK32K_X2
RTC_CLK32K_X1
=PP3V3_ALL_RTC =PP3V3_ALL_SMU
GND_SMU_AVSS
MIN_NECK_WIDTH=10 mil
MIN_LINE_WIDTH=15 mil
VOLTAGE=0V
PP3V3_ALL_SMU_AVCC
MIN_NECK_WIDTH=10 mil
MIN_LINE_WIDTH=15 mil
VOLTAGE=3.3V
=PP3V3_ALL_SMU
SMU_BOOT_BUSY SMU_BOOT_SCLK SMU_BOOT_CE
GND_SMU_AVSS
SYS_POWER_BUTTON_L
SMU_CLK10M_XIN
SMU_CLK10M_XOUT
SMU_RESET_L
=PP3V3_ALL_SMU
SMU_BOOT_CNVSS
=PPVREF_SMU
SYS_POWERFAIL_L
SYS_OVERTEMP_L
FAN_TACH1
15 MIL SPACING
SMU_CLK10M_XOUT
RTC_CLK32K_X1
RTC_CLK32K_XTAL
15 MIL SPACING
I2C_RTC_SCL
I2C_RTC_SDA
15 MIL SPACING
RTC_CLK32K_X2
SMU_CLK10M_XIN
SMU_CLK10M_XTAL
15 MIL SPACING
I2C_SMU_A_SCL_OUT_L
I2C_SMU_A_SCL_IN
I2C_SMU_D_SCL SMU_CHARGE_BATT
SMU_PWRSEQ_P1_2
FAN_RPM4
CPU_BYPASS
SMU_PWRSEQ_P1_1
SMU_PWRSEQ_P1_0
SYS_DRIVE_BAY_INT_L
CPU_SENSE_V
CPU_SENSE_I
I2C_SMU_D_SDA
FAN_RPM5 SMU_ONEWIRE
SMU_PWRSEQ_P1_4
SMU_PWRSEQ_P1_3
I2C_SMU_E_SDA I2C_SMU_E_SCL FAN_TACH0
SYS_DOOR_AJAR_L
FAN_TACH2 FAN_TACH3
FAN_TACH5
SMU_TO_SB_INT_L
CPU_TEMP
15 MIL SPACING
FAN_RPM3
FAN_TACH4
I2C_SMU_A_SDA_OUT_L
I2C_SMU_A_SDA_IN
FAN_TACH6
CPU_VID<0>
FAN_TACH8
CPU_VID<2>
FAN_TACH7
CPU_VID<1>
FAN_PWM7
I2C_SMU_CPU_SCL_IN
FAN_PWM6
I2C_SMU_CPU_SDA_IN
SYS_LED_RED
FAN_TACH3
SYS_LED_GREEN
FAN_TACH4
ALS0_OUTFAN_RPM3 ALS1_OUTFAN_RPM4 ALS_GAIN_BOOST
FAN_RPM5
SMU_ACIN
SYS_POWERFAIL_L
SMU_BATT_DET_L
SYS_DRIVE_BAY_INT_L
SYS_LID_OPEN
SYS_DOOR_AJAR_L
SYS_KBDLED
FAN_PWM8
FAN_TACH5
SYS_LED_BLUE DIAG_LED
SMU_CHARGE_BATT
SYS_PME_L
SYS_SLEWING_L
SMU_SUSPENDREQ_L
SYS_COLD_RESET_L
SMU_SLEEP
SYS_POWERUP_L
SYS_RESET_BUTTON_L
=PP3V3_ALL_SMU
33
33
13
13
28
33
11
13
36
13
36
13
33
28
11
13
24
13
25
27
77
10
8
33
8
33
13
8
13
27
18
18
13
77
27
25
24
10
8
13
13
13
7
24
13
25
18
25
18
7
13
13
13
7
13
7
13
7
8
7
8
25
14
13
13
14
13
13
13
18
18
8
13
13
13
25
25
24
13
13
7
13
7
8
7
25
8
8
3
25
18
8
18
8
3
8
6
13
25
27
8
13
18
30
16
21
13
17
13
28
13
16
18
8
8
6
8
8
8
8
8
13
13
7
6
8
8 6
8
8
8
8
6
13
13
13
6
6
8
8
6
16
16
13
13
18
18
13
13
6
18
18
13
3
13
30
3
3
8
33
33
18
13
8
3
8
18
18
16
8
17
13
13
25
36
13
13
13
6
18
8
8
8
13
13
21 13
21 13
8
13
8
13
8
13
6
8
8
8
13 21
8
13
13
13
13
8
8
6
7
6
A30B30
A29B29
A28B28
A27B27
A26B26
B25
B24
B23
B22
B21
A25
A24
A23
A22
A21
C30D30
C29D29
C28D28
C27D27
C26D26
C25D25
D22 D23 D24
D21
C24
C23
C22
C21
E30F30
E29F29
E28F28
E27F27
E26F26
E25F25
F24
F23
F22
F21
E24
E23
E22
E21
G30H30
G29H29
G28H28
G27H27
G26H26
H25 G25
G22 G23 G24
H21 H22 H23 H24
G21
H20
H19
H18
H17
H16
H15
H14
H13
H12
H11
H10
H9
H8
H7
H6
H5
H4
H3
H2
H1
G20
G19
G18
G17
G16
G15
G14
G13
G12
G11
G10
G9
G8
G7
G6
G5
G4
G3
G2
G1
F20
F19
F18
F17
F16
F15
F14
F13
F12
F11
F10
F9
F8
F7
F6
F5
F4
F3
F2
F1
E10
E20
E19
E18
E17
E16
E15
E14
E13
E12
E11
E9
E8
E7
E6
E5
E4
E3
E2
E1
D20
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
C20
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1 B1 A1
A2 A3 A4 A5 A6 A7 A8
A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20
B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
NC
NC
CPU LOGIC ANALYZER
NC
402
MF
1/16W
5%
0
DEVELOPMENT
21
R1400
402
MF
1/16W
5%
0
DEVELOPMENT
21
R1401
5% 402
0
DEVELOPMENT
21
R1402
0
4025%
DEVELOPMENT
21
R1403
NOSTUFF
YFS-30-03-H-08-SB
F-ST-BGA
H9
H8
H7
H6
H5
H4
H30
H3
H29
H28
H27
H26
H25
H24
H23
H22
H21
H20
H2
H19
H18
H17
H16
H15
H14
H13
H12
H11
H10
H1
G9
G8
G7
G6
G5
G4
G30
G3
G29
G28
G27
G26
G25
G24
G23
G22
G21
G20
G2
G19
G18
G17
G16
G15
G14
G13
G12
G11
G10
G1
F9
F8
F7
F6
F5
F4
F30
F3
F29
F28
F27
F26
F25
F24
F23
F22
F21
F20
F2
F19
F18
F17
F16
F15
F14
F13
F12
F11
F10
F1
E9
E8
E7
E6
E5
E4
E30
E3
E29
E28
E27
E26
E25
E24
E23
E22
E21
E20
E2
E19
E18
E17
E16
E15
E14
E13
E12
E11
E10
E1
D9
D8
D7
D6
D5
D4
D30
D3
D29
D28
D27
D26
D25
D24
D23
D22
D21
D20
D2
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D1
C9
C8
C7
C6
C5
C4
C30
C3
C29
C28
C27
C26
C25
C24
C23
C22
C21
C20
C2
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C1
B9
B8
B7
B6
B5
B4
B30
B3
B29
B28
B27
B26
B25
B24
B23
B22
B21
B20
B2
B19
B18
B17
B16
B15
B14
B13
B12
B11
B10
B1
A9
A8
A7
A6
A5
A4
A30
A3
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A2
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A1
J1400
103
14
C
051-6482
EI_CPU_TO_NB_SR_N<1>
EI_CPU1_CLK_P_R
EI_CPU1_CLK_N
EI_NB_TO_CPU_AD<16>
EI_NB_TO_CPU_AD<3>
EI_NB_TO_CPU_AD<4>
EI_CPU_TO_NB_AD<29>
EI_CPU_TO_NB_AD<41>
EI_CPU_TO_NB_AD<32>
EI_CPU_TO_NB_AD<33>
EI_CPU_TO_NB_AD<34>
EI_CPU_TO_NB_AD<30>
EI_CPU_TO_NB_AD<37>
EI_CPU_TO_NB_AD<31>
EI_CPU_TO_NB_AD<22>
EI_CPU_TO_NB_AD<10>
EI_CPU_TO_NB_AD<9>
EI_CPU_TO_NB_AD<1>
EI_CPU_TO_NB_AD<2>
EI_CPU_TO_NB_AD<0>
CPU1_HTBEN
CPU_HRESET_L
EI_CPU_TO_NB_AD<6> EI_CPU_TO_NB_AD<21> EI_CPU_TO_NB_AD<20> EI_CPU_TO_NB_AD<25> EI_CPU_TO_NB_AD<26> EI_CPU_TO_NB_SR_P<0> EI_CPU_TO_NB_SR_N<0> EI_CPU_TO_NB_AD<27>
EI_CPU_TO_NB_AD<39>
EI_CPU_TO_NB_AD<19>
CPU_INT_L
EI_CPU_TO_NB_AD<15>
=PP1V2_EI_CPU
EI_CPU_TO_NB_AD<8> EI_CPU_TO_NB_AD<13>
EI_CPU_TO_NB_AD<12> EI_CPU_TO_NB_AD<5> EI_CPU_TO_NB_AD<36> EI_CPU_TO_NB_AD<35> EI_CPU_TO_NB_AD<18> EI_CPU_TO_NB_AD<43> EI_CPU_TO_NB_AD<42> EI_CPU_TO_NB_AD<38> EI_CPU_TO_NB_AD<40> EI_NB_TO_CPU_AD<9> EI_NB_TO_CPU_AD<11> EI_NB_TO_CPU_AD<0>
EI_CPU1_CLK_N
EI_NB_TO_CPU_AD<5>
EI_CPU1_CLK_P
EI_CPU_TO_NB_AD<3> EI_CPU_TO_NB_AD<4>
EI_CPU_TO_NB_AD<7> EI_CPU_TO_NB_AD<11> EI_CPU_TO_NB_CLK_N EI_CPU_TO_NB_CLK_P
EI_CPU_TO_NB_SR_P<1>
EI_CPU_TO_NB_AD<17> EI_CPU_TO_NB_AD<14> EI_CPU_TO_NB_AD<24> EI_CPU_TO_NB_AD<28> EI_NB_TO_CPU_AD<14> EI_NB_TO_CPU_AD<12> EI_NB_TO_CPU_AD<18> EI_NB_TO_CPU_AD<19>
EI_CPU1_SYNC CHKSTOP_L
EI_NB_TO_CPU_AD<13> EI_NB_TO_CPU_AD<15> EI_NB_TO_CPU_AD<17> EI_NB_TO_CPU_AD<21>
EI_NB_TO_CPU_AD<27> EI_NB_TO_CPU_AD<26> EI_NB_TO_CPU_AD<30> EI_NB_TO_CPU_AD<42> EI_NB_TO_CPU_AD<41>
EI_NB_TO_CPU_AD<25>
EI_NB_TO_CPU_AD<20>
EI_NB_TO_CPU_AD<28>
EI_NB_TO_CPU_AD<29>
EI_NB_TO_CPU_AD<40> EI_NB_TO_CPU_AD<10> EI_NB_TO_CPU_AD<39> EI_NB_TO_CPU_AD<36>
EI_NB_TO_CPU_SR_N<0>
RI_L
EI_NB_TO_CPU_SR_P<0>
EI_QREQ_L
I2C_SMU_A_SCL_OUT_L
EI_NB_TO_CPU_AD<1>
EI_NB_TO_CPU_AD<22> EI_NB_TO_CPU_AD<33> EI_NB_TO_CPU_AD<43> EI_NB_TO_CPU_AD<2> EI_NB_TO_CPU_AD<38>
EI_NB_TO_CPU_AD<37>
SYNCENABLE
EI_NB_TO_CPU_SR_N<1>
TP_PROC_TRIGGER_OUT
EI_NB_TO_CPU_SR_P<1>
EI_NB_TO_CPU_AD<8> EI_NB_TO_CPU_AD<24> EI_NB_TO_CPU_AD<7> EI_NB_TO_CPU_AD<6>
EI_SE
EI_QACK_L
EI_NB_TO_CPU_AD<35>
=PP1V2_EI_NB
EI_NB_TO_CPU_AD<34>
EI_NB_TO_CPU_AD<32> EI_NB_TO_CPU_AD<23> EI_NB_TO_CPU_CLK_N EI_NB_TO_CPU_CLK_P MCP_L I2C_SMU_A_SDA_OUT_L
=PP1V2_EI_NB
EI_CPU_TO_NB_AD<23>
EI_CPU_TO_NB_AD<16>
EI_NB_TO_CPU_AD<31>
EI_CPU1_CLK_P
EI_CPU1_CLK_N_R
EI_CPU1_SYNC
EI_CPU1_SYNC_R
CPU1_HTBEN
CPU1_HTBEN_R
35 31
30
30
30
30
28
28
29
27
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
30
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
27
29
27
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
27
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
30
29
29 18
29
29
29
29
29
29
29 30
29
29
29
29
29
29 29
29
29
18
29
29
29
29
29
18
18
29
29
29
27
27
28
14
28
28
28 28
28
28
28
28
28
28
28
28
28
28
28
28
28
14
29
28
28
28
28
28
28
28
28
28
28
25
28
18
28
28
28
28
28
28
28
28
28
28
28
28
28
28
14
28
14
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
14
8
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28 28
29 28
28 13
28
28
28
28
28
28
28 29
28 29
28
28
28
28
28 28
28
28
14
28
28
28
28
28
29
13
14
28
28
28
14
14
14
6
27
6
6
6
6 6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
7
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6 6
6 6
6 6
6
6
6
6
6
6
6 6
6 6
6
6
6
6
6 6
6
6
7
6
6
6
6
6
6
6
7
6
6
6
6
27
6
27
6
27
GDS
GDS
S
D
G
SDA SCL
GND
OS
VS+
A2
A1
A0
SDA SCL
GND
OS
VS+
A2
A1
A0
S
D
G
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
GND
SYSTEM FAN 1
FAN 1, 2 & SYSTEM TEMP
MAX FAN CURRENT=0.5A
CPU FAN 2
MOTOR CONTROL TACH
12V DC
MOTOR CONTROL
TACH
GND
I2C ADDR:90(1001000)
OPTICAL TEMP SENSOR
I2C ADDR:94(1001010)
MAX FAN CURRENT=0.5A
17" SYSTEM FAN 603-5518
17" CPU FAN 603-5519 20" HD FAN 603-5487
FAN 2 - Q37 STYLE CPU FAN CONTROL CIRCUIT
POWER SUPPLY TEMP SENSOR
FAN 1 - Q37 STYLE CPU FAN CONTROL CIRCUIT
20" SYSTEM FAN 603-5521
10%
NOSTUFF
10UF
1210
16V CERM
2
1
C1600
CERM
0.47UF
16V
20% 805
2
1
C1601
1%
1/16W
MF
402
10K
2
1
R1601
PP12V_RUN
PP3V3_RUN
CRITICAL
M-ST-TH
HF28040-B
4
3
2
1
J1600
MF
1/16W 402
1%
10K
2
1
R1604
MF
0
5%
1/16W
402
21
R1605
0
5%
402
MF
1/16W
21
R1606
SM
IRF5505
3
1
4
Q1601
402
NOSTUFF
MF
0
5%
1/16W
21
R1600
MF
5% 1/16W
402
0
NOSTUFF
2
1
R1603
10UF
10% 16V CERM 1210
NOSTUFF
2
1
C1603
SM
20% 16V
ELEC
47UF
2
1
C1604
PP12V_RUN
MF
402
1/16W
4.7K
5%
2
1
R1610
SOT23
1N914
3 1
D1602
4.7
5%
402
1/16W
MF
21
R1611
CERM
20% 16V
0.47UF
805
2
1
C1609
100PF
402
CERM
50V
5%
21
C1605
CRITICAL
M-ST-TH
10-89-7062
6 5
4
1
J1601
CRITICAL
MBR0530
SM
2
1
D1601
SM
IRF5505
3
1
4
Q1603
10%
1210
CERM
10UF
16V
2
1
C1606
10UF
16V
CERM
10%
1210
2
1
C1607
10% 50V
603
4700PF
CERM
21
C1608
1%
10K
402
1/16W
MF
21
R1613
10UF
SM
20% 16V
ELEC
2
1
C1610
402
1%
1/16W
MF
100K
21
R1614
603
CERM
16V
20%
0.1UF
2
1
C1611
MF
402
1/16W
1%
100K
21
R1615
402
10K
1% 1/16W MF
2
1
R1616
MF
0
5%
1/16W
402
21
R1635
LM358-SOI1
CRITICAL
4
8
1
3
2
U1601
1% MF
402
10K
1/16W
2
1
R1617
1% 1/16W
402
10K
MF
2
1
R1620
SM
2N7002
2
1
3
Q1602
NOSTUFF
1/16W 402
MF
5%
0
2
1
R1618
NOSTUFF
402
1/16W
5%
0
MF
21
R1619
PP3V3_RUN
402
MF
1/16W
1%
10K
2
1
R1623
5%
402
MF
1/16W
0
21
R1636
NOSTUFF
SOP
LM75
CRITICAL
8
1
2
3
4
5
6
7
U1602
PP3V3_PWRON
NOSTUFF
402
MF
1/16W
5%
0
21
R1621
SM
FERR-EMI-100-OHM
21
L1600
SM
FERR-EMI-100-OHM
21
L1601
FERR-EMI-100-OHM
SM
21
L1602
SM
FERR-EMI-100-OHM
21
L1603
0.01UF
20% 16V
CERM
402
2
1
C1602
SM
FERR-EMI-100-OHM
21
L1604
NOSTUFF
402
MF
1/16W
5%
0
21
R1650
PP3V3_PWRON
NOSTUFF
SOP
LM75
CRITICAL
8
1
2
3
4
5
6
7
U1650
LM358-SOI1
4
8
7
5
6
U1601
PP3V3_RUN
SM
2N7002
2
1
3
Q1600
1/16W
1%
402
10K
MF
2
1
R1639
10K
1% 1/16W MF 402
2
1
R1640
100K
MF
402
1/16W
1%
21
R1641
1/16W
1% MF
402
100K
21
R1642
603
CERM
16V
20%
0.1UF
2
1
C1613
SM
10UF
20% 16V
ELEC
2
1
C1614
402
CERM
50V
5%
100PF
21
C1615
LM358-SOI1
CRITICAL
4
8
7
5
6
U1700
SOT23
1N914
3 1
D1604
10K
402
MF
1/16W
1%
21
R1643
603
CERM
10% 50V
4700PF
21
C1616
4.7K
5% MF
402
1/16W
2
1
R1644
10UF
10% 16V
1210
CERM
2
1
C1617
CERM
16V
10UF
10%
1210
2
1
C1618
CRITICAL
MBR0530
SM
2
1
D1605
4.7
1/16W
MF
402
5%
21
R1645
47UF
SM
20% 16V
ELEC
2
1
C1619
16
103
051-6482
C
FAN_0_TACH
PP12V_RUN_FAN_1_LC VOLTAGE=12V MIN_LINE_WIDTH=20MIL MIN_NECK_WIDTH=10MIL
FAN_1_DRV_F
MIN_NECK_WIDTH=10MIL
FAN_0_PWR
MIN_LINE_WIDTH=20MIL
U1601_UNUSED
FAN_0_GATE
I2C_PS_TEMP_SDA
I2C_PS_TEMP_SCL
PS_SENSOR_OS
SYS_OVERTEMP_L
SYS_OVERTEMP_LTEMP_SENSOR_OS
I2C_OPTICAL_SCL
I2C_OPTICAL_SDA
PP12V_RUN_FAN_1_LCL VOLTAGE=12V MIN_LINE_WIDTH=20MIL MIN_NECK_WIDTH=10MIL
FAN_0_DRV
FAN_1_GND_FILT VOLTAGE=0V MIN_LINE_WIDTH=20MIL MIN_NECK_WIDTH=10MIL
FAN_1_TACH_FILT
FAN_1_PWR_FILT
MIN_LINE_WIDTH=20MIL
FAN_1_PWR
MIN_NECK_WIDTH=10MIL
FAN_1_TACH
FAN_0_OPP
FAN_RPM0
FAN_1_OPM
FAN_1_GATE
FAN_1_OPP
FAN_1_GT
FAN_TACH0
FAN_0_DRV_F
FAN_1_CNTL
FAN_TACH1
FAN_RPM1
FAN_0_CNTL
FAN_1_DRV
FAN_0_OPM
PP12V_FAN_1_ANALOG
VOLTAGE=12V
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
FAN_0_GT
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=20MIL
PP12V_FAN_0_ANALOG
VOLTAGE=12V
27
27
25
25
16
16
18
18
13
13
18
18
13
13
13
13
GDS
S
D
G
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
I2C ADDR:92(1001001)
518S0084
REMOTE HARD DRIVE TEMP SENSOR
FAN 3 - Q37 STYLE SYSTEM FAN CONTROL CIRCUIT
FAN 3 & HD TEMP
GND
+12V DC
20" CPU FAN 603-5459
17" HD FAN 603-5520
TACH
MOTOR CONTROL
MAX FAN CURRENT=0.5A
REMOTE HD TEMP SENSOR
PP12V_RUN
CRITICAL
M-ST-TH
10-89-7062
6 5
4
1
J1700
SM
MBR0530
CRITICAL
2
1
D1705
IRF5505
SM
3
1
4
Q1701
16V CERM
10%
1210
10UF
2
1
C1718
10UF
10% 16V
1210
CERM
2
1
C1717
4700PF
50V 603
CERM
10%
21
C1716
10K
402
MF
1/16W
1%
21
R1743
SM
10UF
16V
ELEC
20%
2
1
C1714
1/16W
MF
402
100K
1%
21
R1742
0.1UF
20% 16V CERM 603
2
1
C1713
100K
MF
402
1/16W
1%
21
R1741
10K
1% 1/16W MF 402
2
1
R1740
0
MF
5%
1/16W
402
21
R1705
CRITICAL
LM358-SOI1
4
8
1
3
2
U1700
1%
1/16W
MF
402
10K
2
1
R1701
10%
NOSTUFF
10UF
1210
16V CERM
2
1
C1700
MF
10K
402
1/16W
1%
2
1
R1739
SM
2N7002
2
1
3
Q1700
1/16W 402
MF
5%
0
NOSTUFF
2
1
R1703
402
NOSTUFF
MF
0
5%
1/16W
21
R1700
PP3V3_RUN
402
MF
1/16W
1%
10K
2
1
R1704
0
5%
402
MF
1/16W
21
R1706
SM
20% 16V
ELEC
47UF
2
1
C1719
PP3V3_PWRON
CRITICAL
M-RT-SM
53261
4
3
2
1
6
5
J1701
4.7K
5% MF
402
1/16W
2
1
R1744
1N914
SOT23
3 1
D1704
4.7
1/16W
MF
402
5%
21
R1745
CERM
20% 16V
805
0.47UF
2
1
C1701
402
CERM
5%
100PF
50V
21
C1715
103
17
C
051-6482
FAN_TACH2
FAN_2_CNTL
FAN_2_TACH
FAN_RPM2
FAN_2_DRV
FAN_2_DRV_F
FAN_2_OPP
FAN_2_OPM
PP12V_FAN_2_ANALOG VOLTAGE=12V MIN_LINE_WIDTH=20MIL MIN_NECK_WIDTH=10MIL
FAN_2_GATE
FAN_2_GT
FAN_2_PWR MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=20MIL
I2C_HD_TEMP_SCL
I2C_HD_TEMP_SDA
13
13
18
18
ALIAS
ALIAS
ALIAS
ALIAS
LM339A
V+
GND
LM339A
V+
GND
G
D
S
G
D
S
G
D
S
G
D
S
ALIAS ALIAS
ALIAS ALIAS
LM339A
V+
GND
ALIAS ALIAS
ALIAS
ALIAS
ALIAS ALIAS
LM339A
V+
GND
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
U9500 / AU300
PINS 34, 35
STANDARD CONFIGURATION: SMU IS MASTER OF BUS E WITH RTC AS SLAVE; U3LITE ’B’ AND SMU ’D’ ARE NOT USED
AUDIO
PINS C21, E21
PINS 36-39
PS TEMP SENSOR
I2C ADDR:94
OPTICAL TEMP SENSOR
HD TEMP SENSOR
I2C ADDR:92
PINS 1, 2
U1702
U1650
PINS 1, 2
U1602
PINS 1, 2
I2C ADDR:90
PINS 18, 19
J9400
MICRODASH
PINS 21, 24
MASTER U2300
SHASTA
PINS Y9, AB7
I2C SB BUS
USE 576 OHM FOR R1811 IF 5V RAIL IS USED FOR REFERENCE
SMU
MASTER
CPU
U2900
PINS AA20, Y21
I2C_CPU_A_SCL
CPU JTAG
U3LITE
U3
PINS A20, B20
PINS C1, B1
U2600
PULSAR
PINS 26, 27
SMU
MASTER U1300
I2C B BUS
PINS 50, 51
SMU ’E’
U1300
MASTER
U3LITE ’B’
PINS C20, B21
U3
I2C D & E BUS
TO IMPROVE LATENCY WITH RGB LED - U3LITE ’B’ AND SMU ’E’ CAN MAKE AN I2C ’E’ BUS
SMU ’D’ AND RTC CAN MAKE AN I2C ’D’ BUS
U1300
SMU ’D’
MASTER
U1301
RTC
PINS 5, 6
I2C C BUS
U3LITE
PINS 91, 92
J4001 = A2
J4000 = A0
DIMMS
OF EACH DIMM
MASTER
U3
I2C A BUS
SMU
PINS 14,25,23,68
U1300
U1300
MASTER
I2C CONNECTIONS
402
MF
1/16W
5%
2K
2
1
R1812
402
MF
1/16W
5%
2K
2
1
R1813
PP2V5_PWRON
PP3V3_RUN
402
MF
1/16W
5%
1K
2
1
R1814
402
MF
1/16W
5%
1K
2
1
R1815
MF
1/16W
402
2K
5%
2
1
R1800
200
1/16W
5% MF
402
2
1
R1808
1/16W
5% MF
200
402
2
1
R1810
SOI
3
13
11
10
12
U1800
SOI
3
2
5
4
12
U1800
2K
1/16W
5%
402
MF
2
1
R1801
1/16W MF
2K
402
5%
2
1
R1818
1/16W
MF
402
2K
5%
2
1
R1819
SM1
0K
5%
1/16W
5
6
7
8
4
3
2
1
RP1800
NOSTUFF
1/16W
5%
0K
SM1
5
6
7
8
4
3
2
1
RP1801
0.1UF
402
CERM
10V
20%
2
1
C1800
0
5%
1/16W
MF
402
NOSTUFF
2
1
R1820
402
MF
1/16W
5%
0
NOSTUFF
2
1
R1821
NOSTUFF
402
MF
1/16W
5%
0
2
1
R1822
0
5% 1/16W MF 402
NOSTUFF
2
1
R1823
402
MF
1/16W
5%
0
2 1
R1824
0
5%
1/16W
MF
402
2 1
R1825
402
MF
1/16W
5%
0
NOSTUFF
2 1
R1826
402
1/16W
0
NOSTUFF
MF
5%
2 1
R1827
SOT-363
2N7002DW
1
2
6
Q1800
2N7002DW
SOT-363
4
5
3
Q1800
1/16W 402
4.7K
5% MF
2
1
R1828
20% 10V CERM 402
0.1UF
2
1
C1802
4.7K
1/16W
402
5% MF
2
1
R1811
NOSTUFF
5%
2K
402
1/16W
MF
2
1
R1830
NOSTUFF
MF 402
5% 1/16W
2K
2
1
R1831
0
603
21
R1832
NOSTUFF
603
0
21
R1833
2N7002DW
SOT-363
4
5
3
Q1801
5% 1/16W MF
200
402
2
1
R1817
5%
1/16W
MF
200
402
2
1
R1816
2N7002DW
SOT-363
1
2
6
Q1801
SOI
3
1
7
6
12
U1800
2K
5% 1/16W MF 402
2
1
R1802
402
MF
1/16W
5%
2K
2
1
R1803
1/16W
402
MF
5%
4.7K
NOSTUFF
2
1
R1809
2K
5% 1/16W MF 402
2
1
R1804
402
MF
1/16W
5%
2K
2
1
R1805
PP3V3_PWRON
PP2V5_PWRON
SOI
3
14
9
8
12
U1800
PP3V3_ALL
2K
5%
402
MF
1/16W
2
1
R1806
2K
5%
402
MF
1/16W
2
1
R1807
20%
CERM
402
10V
0.1UF
2
1
C1801
051-6482
103
18
C
I2C_CPU_SCL_LS
SMU_CPU_JTAG_OR_I2C
NET_SPACING_TYPE=I2C
I2C_CPU_A_SDA_TO_CPU
NET_SPACING_TYPE=I2C
PP3V3_PWRON
NET_SPACING_TYPE=I2C
I2C_SMU_A_SCL_IN MAKE_BASE=TRUE
PP5V_PWRON
PP5V_RUN
PP3V3_RUN
PP5V_U1800 MIN_LINE_WIDTH=12MIL
MIN_NECK_WIDTH=8MIL
I2C_NB_C_SDA MAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
NET_SPACING_TYPE=I2C
I2C_NB_C_SCL MAKE_BASE=TRUE
I2C_DIMM_SCL
I2C_DIMM_SDA
I2C_SMU_D_SDA
I2C
I2C
I2C_NB_B_SCL
I2C
I2C_RTC_SCL
I2C
I2C_RTC_SDA
I2C
I2C_SMU_D_SCL
=PP1V2_EI_NB
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_SMU_A_SDA_OUT_L
JTAG_CPU_TDO
JTAG_CPU_TDI
JTAG_CPU_TMS
JTAG_CPU_TCK
=PP1V2_EI_CPU
PP3V3_PWRON
I2C_SMU_A_SDA_IN MAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
I2C_0V6_REF
I2C_NB_A_SDA I2C_NB_A_SCL
I2C
I2C_NB_B_SDA
I2C_SB_SCL
MAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
I2C_SB_SDA
I2C_UDASH_SDA I2C_UDASH_SCL
I2C_AUDIO_SDA I2C_AUDIO_SCL
I2C_CLOCK_SCL
I2C_CLOCK_SDA
I2C_OPTICAL_SDA I2C_OPTICAL_SCL
I2C_PS_TEMP_SCL
I2C_PS_TEMP_SDA
NET_SPACING_TYPE=I2C
I2C_CPU_A_SCL
MAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
I2C_SMU_B_SDA
I2C_SMU_B_SCL
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_HD_TEMP_SDA I2C_HD_TEMP_SCL
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_SMU_A_SCL_OUT_L
I2C
I2C_SMU_CPU_SCL_IN MAKE_BASE=TRUE
MAKE_BASE=TRUE
I2C
I2C_SMU_CPU_SDA_OUT_L
I2C
MAKE_BASE=TRUE
I2C_SMU_CPU_SDA_IN
I2C
MAKE_BASE=TRUE
I2C_SMU_CPU_SCL_OUT_L
I2C_CPU_A_SDA
NET_SPACING_TYPE=I2C
I2C_CPU_A_SDA_TO_SMU
I2C
I2C_SMU_E_SCL
I2C
I2C_SMU_E_SDA
35 31
27
30
27
18
28
14
29
18
14
11
11
11
11
14
13
30
30
30
30
14
11
94
94
103
103
13
6
13
6
6
6
24
24
40
40
13
24 13
13
13
7
6
29
29
29
29
7
6
13
24
24
24
25
25
6
6
95
95
27
27
16
16
16
16
29
13
13
17
17
6
13
13
13
13
29
13
13
GRN
BLUE
AMB
+
-
+
-
+
-
+
-
D
S
G
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
INDICATOR LED
TOTAL CURRENT EXCLUDING LEDS CURRENT < 170 MICRO AMPS
PLACE THESE PARTS CLOSE TO SMU IC
CHANGE R2100 VALUE
PLACE THESE PARTS CLOSE TO SMU IC
PWM INPUT FROM SMU
5MV INPUT OFFSET
PWM INPUT FROM SMU
PWM INPUT FROM SMU
100% DUTY CYCLE OF 3V-PP PWM = 0.5V
TO SET LED CURRENT
PLACE THESE PARTS CLOSE TO SMU IC
PWM INPUT FROM SMU
(AND NO STUFF R2132, R2119 & Q2100)
(STUFF WHEN SYS_LED_L = ACTIVE HIGH)
PLACE THESE PARTS CLOSE TO SMU IC
MAX LED CURRENT = 0.5 / R
<-- 17 INCH
<-- 17 INCH
<-- 17 INCH
20 INCH -->
PP5V_PWRON
PP5V_PWRON
PLCC
RGB_LED
LATBG66B
AMB-GRN-BLUE
4
3
1
5
2
6
LED2100
RGB_LED
TSSOP
LP324
4
8
9
10
11
U2100
PP5V_PWRON
RGB_LED
1/16W
1% MF
402
953K
2
1
R2109
PP5V_PWRON
SM
2N3904
RGB_LED
2
3
1
Q2102
25.5
1% MF
402
1/16W
RGB_LED
2
1
R2100
LP324
TSSOP
RGB_LED
4
14
13
12
11
U2100
1%
1K
402
1/16W
MF
RGB_LED
2 1
R2112
MF
402
953K
RGB_LED
1/16W
1%
2
1
R2104
200K
RGB_LED
1/16W
MF
1%
402
2
1
R2105
20%
0.47UF
603
RGB_LED
CERM
10V
2
1
C2106
RGB_LED
1/16W
MF
402
0
5%
2 1
R2101
RGB_LED
1/16W
MF
1%
953K
402
2
1
R2102
PP5V_PWRON
SM
2N3904
RGB_LED
2
3
1
Q2108
MF 402
1/16W
1%
25.5
RGB_LED
2
1
R2113
RGB_LED
LP324
TSSOP
4
7
6
5
11
U2100
1%
RGB_LED
1/16W
MF
1K
402
2 1
R2114
RGB_LED
953K
1/16W
402
1% MF
2
1
R2110
200K
MF
402
1/16W
1%
RGB_LED
2
1
R2111
0.47UF
20% 10V
603
RGB_LED
CERM
2
1
C2112
RGB_LED
0
5% MF
1/16W
402
2 1
R2115
RGB_LED
1/16W
402
953K
1% MF
2
1
R2118
PP5V_PWRON
SM
RGB_LED
2N3904
2
3
1
Q2114
1/16W
1%
25.5
402
MF
RGB_LED
2
1
R2126
LP324
RGB_LED
TSSOP
4
1
2
3
11
U2100
1%
1K
MF
402
1/16W
RGB_LED
2 1
R2127
953K
1% MF
402
1/16W
RGB_LED
2
1
R2116
200K
MF
1%
402
1/16W
RGB_LED
2
1
R2117
CERM
10V
20%
0.47UF
603
RGB_LED
2
1
C2118
MF
5%
0
RGB_LED
1/16W
402
2 1
R2130
RGB_LED
0.022UF
402
CERM
16V
20%
2 1
C2101
16V
CERM
402
RGB_LED
20%
0.022UF
21
C2102
20%
0.022UF
402
CERM
16V
RGB_LED
2 1
C2104
402
CERM
0.1UF
10V
RGB_LED
20%
2
1
C2103
MF
5%
402
1K
NOSTUFF
1/16W
2 1
R2132
PP3V3_PWRON
NOSTUFF
SOT-23
FDV302P
2
1
3
Q2100
RGB_LED
400-OHM-EMI
SM-1
2
1
L2100
RGB_LED
400-OHM-EMI
SM-1
2
1
L2101
400-OHM-EMI
SM-1
RGB_LED
2
1
L2102
WHITE_LED
400-OHM-EMI
SM-1
2
1
L2103
220PF
402
CERM
5%
RGB_LED
25V
21
C2105
220PF
RGB_LED
402
5% 25V CERM
2
1
C2107
400-OHM-EMI
SM-1
RGB_LED
21
L2104
220PF
RGB_LED
5%
25V 402
CERM
2 1
C2108
220PF
CERM
402
25V
5%
RGB_LED
2 1
C2109
25V
220PF
5%
CERM
402
WHITE_LED
2 1
C2110
400-OHM-EMI
SM-1
WHITE_LED
21
L2105
402
WHITE_LED
CERM
5% 25V
220PF
2
1
C2111
WHITE_LED
0
MF
5%
402
1/16W
2 1
R2107
1/16W
1% MF
402
NOSTUFF
953K
2 1
R2119
WHITE_LED
FDV301N
SM
2
1
3
Q2101
SM6
WHITE
2
1
LED2101
PP3V3_PWRON
1% 1/16W MF 402
56.2
17_INCH_LCD
2
1
R2103
1/16W
5%
402
MF
1K
WHITE_LED
2 1
R2106
MF
1/16W
402
5%
4.7K
WHITE_LED
2
1
R2129
RES, 18.2 OHM, 1%, 402
114S1821
3
R2100,R2113,R2126
NOSTUFF
114S3921
20_INCH_LCD
1
R2103
RES, 39.2 OHM, 1%, 402
10321
051-6482 C
G_BASE_DRV
MIN_NECK_WIDTH=10MIL
G_DRV_K
MIN_LINE_WIDTH=25MIL
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
R_DRV_K
MIN_LINE_WIDTH=25MIL
B_DRV_K MIN_NECK_WIDTH=10MIL
SYS_LED
SYS_LED_H
SYS_GATE
B_BASE_DRV
R_PWM_DC
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
SYS_LED_DRV_C
G_PWM_DC
G_IN_OFFSET
SYS_LED_IN
GND_CHASSIS_LED
RGB_LED_A MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
SYS_DRV_A MIN_NECK_WIDTH=10MIL
GND_CHASSIS_LED
B_IN_OFFSET
G_PWM_IN_H
MAKE_BASE=TRUE
SYS_LED_BLUE
MIN_LINE_WIDTH=25MIL
B_DRV
MIN_NECK_WIDTH=10MIL
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
B_DRV_FB
R_DRV MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
R_DRV_FB
MIN_NECK_WIDTH=10MIL
R_BASE_DRV
MAKE_BASE=TRUE
SYS_LED_RED
R_PWM_IN_H
MAKE_BASE=TRUE
SYS_LED_GREEN
R_IN_OFFSET
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
SYS_LED_DRV_K
B_PWM_DC
B_PWM_IN_H
GND_CHASSIS_LED
MIN_LINE_WIDTH=25MIL
G_DRV
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
G_DRV_FB MIN_NECK_WIDTH=10MIL
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
SYS_DRV_K
U2100_UNUSED
21
21
21
13
7
7
13
13
13
7
6
G
D
S
GND
GND
VDD
(SYM 6 OF 7)
G
D
S
FB
LD
HD
GND
COMP
SS
VCC
VC
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
VOUT=VREF*(R2203+R2205)/R2205=1.53VDC
U3LITE CORE POWER
CHECK FETS
U2200_FEEDBACK
NOTE: IRU3037CS VREF=1.25VDC
SET OUTPUT=1.5VDC FOR U3LITE CORE
7.73A OF PEAK CURRENT DRAW ON PCORE_NB
390UF
6.3V ELEC 8X11.5-TH
20%
2
1
C2203
20%
6.3V ELEC 8X11.5-TH
390UF
2
1
C2202
1206
CERM
6.3V
20%
10UF
2
1
C2201
TH-KZJ
ELEC
6.3V
20%
1800UF
2
1
C2209
6.3V ELEC
1800UF
20%
TH-KZJ
2
1
C2208
1/16W
10K
0.5% MF-LF
603
2
1
R2205
1UF
10V CERM
20%
603
NOSTUFF
2
1
C2207
25V CERM 1206
1UF
20%
NOSTUFF
2
1
C2212
PP5V_PWRON
CASE369
NTD60N02R
Q2201
CERM
50V
10%
603
NOSTUFF
0.022UF
2
1
C2205
1/10W
5% FF
0
805
21
R2202
805
1UF
20% 25V CERM
2
1
C2204
402
CERM
25V
5%
220PF
2
1
C2206
PP5V_PWRON
603
20% 16V CERM
0.1UF
2
1
C2214
1UF
25V CERM 805
20%
2
1
C2216
20%
1UF
805
25V CERM
2
1
C2217
MBR0520L
SM
2 1
D2200
SM
MBR0520L
2 1
D2201
SM
MBR0520L
2
1
D2202
PBGA
V1.0-300MM
U3LITE
OMIT
R14
T16
T11
U18
U13
U10
V15
K15
V12
K12
L17
L14
M16
M11
N18
N13
P15
P12
R17
W17
W14
AC13
B22
B16
B13
B4
AC7
D25
D19
D10
D7
D2
F22
F16
F13
G27
G23
AE25
G4
H19
H10
J14
J9
K25
K21
K16
K11
K6
AE19
K2
L18
L13
L10
M20
M15
M12
N27
N23
N17
AE10
N14
N9
N8
N4
P19
P16
P11
R18
R13
R10
AE4
T27
T23
T20
T15
T12
T6
T2
U17
U14
U9
AG22
V19
V16
V11
W25
W21
W18
W13
W8
W4
Y20
AG16
Y15
Y12
AA19
AA10
AB27
AB23
AB6
AB2
AC22
AC16
AG13
AG7
U3
CASE369
NTD60N02R
3
1
4
Q2202
1.6UH
TH
21
L2201
1.1K
MF
1/16W
1%
402
NOSTUFF
2
1
R2204
IRU3037CS
SOI
2 6
8
3
5
4
1
7
U2200
2.21K
1/16W
0.5% MF-LF
603
2
1
R2203
402
27.4K
1% 1/16W MF
2
1
R2201
603
CERM
50V
5%
3900PF
2
1
C2215
603
68PF
5% 50V CERM
2
1
C2213
PP5V_PWRON
4.7
5% 1/10W FF 805
2
1
R2200
402
0.1UF
20% 10V CERM
2
1
C2222
CERM
10V
20%
0.1UF
402
2
1
C2223
10V 402
0.1UF
20% CERM
2
1
C2225
CERM
10V
20%
0.1UF
402
2
1
C2228
402
0.1UF
20% 10V CERM
2
1
C2227
CERM
10V
20%
0.1UF
402
2
1
C2230
402
0.1UF
20% 10V CERM
2
1
C2229
10V CERM
20%
0.1UF
402
2
1
C2232
20%
402
0.1UF
10V CERM
2
1
C2231
CERM
10V
20%
0.1UF
402
2
1
C2234
402
0.1UF
20% 10V CERM
2
1
C2233
CERM
10V
20%
0.1UF
402
2
1
C2236
402
0.1UF
20% 10V CERM
2
1
C2235
402
CERM
10V
20%
0.1UF
2
1
C2238
0.1UF
402
20% 10V CERM
2
1
C2237
CERM
10V
20%
0.1UF
402
2
1
C2240
CERM 402
0.1UF
20% 10V
2
1
C2239
CERM
10V
20%
0.1UF
402
2
1
C2242
402
0.1UF
20% 10V CERM
2
1
C2243
CERM
10V
20%
0.1UF
402
2
1
C2244
CERM
10V
20%
0.1UF
402
2
1
C2245
CERM
10V
20%
0.1UF
402
2
1
C2246
CERM
10V
20%
0.1UF
402
2
1
C2247
103
22
C
051-6482
=PPVCORE_NB
=PPVCORE_NB
U2200_VC_R U2200_VC_D
U2200_VC
MIN_NECK_WIDTH=10MIL
Q2202_DRAIN
MIN_LINE_WIDTH=25MIL
Q2201_GATE
U2200_GATE_H
R2204_P2
U2200_GATE_L
U2200_SS
R2201_P2
U2200_COMP
U2200_FEEDBACK
MAKE_BASE=TRUE
MIN_NECK_WIDTH=10MIL
PPVCORE_NB
VOLTAGE=1.2V MIN_LINE_WIDTH=25MIL
7
22
22
6
6
VIO1
POWER
VDDO33
VDDO25
VIO2
VDDP_KL
VDDC
GND
GND
GND
(1 OF 8)
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
DRAWING
Master: Link
other Shasta supplies.
- _PP2V5_PWRON_SB
- _PPPCI32_PWRON_SB (to 5V or 3.3V)
- _PPPCI64_PWRON_SB (to 5V or 3.3V)
- _PP3V3_PWRON_SB
different drive timing
PCI, otherwise 3.3V.
Connect _PPPCI32_PWRON_SB to
spec for 5V vs. 3.3V operation.
appropriate PCI bus voltage and
Signal aliases required by this page: (NONE)
(NONE)
BOM options provided by this page:
Power Sequencing:
- _PPVCORE_PWRON_SB (1.2V) NOTE: PCI pads use the VIO supply to meet
characteristics required by the PCI
_PPPCI64_PWRON_SB to same if 64-bit
Must power Shasta VCore rail before any
Page Notes
Power aliases required by this page:
Shasta Core Power
Shasta max (est 06/30/03) current:
VDDPs - 2.5V - 100 mA ( 250 mW) I/O 2.5 - 2.5V - 20 mA ( 60 mW)
Total: 3015 mW
I/O 3.3 - 3.3V - 220 mA ( 770 mW)
ANALOG12 - 1.2V - 600 mA ( 760 mW)
DIGITAL - 1.2V - 950 mA (1175 mW)
For PCI_AD<63..32>
20% 10V CERM 402
0.1uF
2
1
C2304
10V CERM 402
0.1uF
20%
2
1
C2305
0.1uF
402
CERM
10V
20%
2
1
C2306
20% 10V CERM 402
0.1uF
2
1
C2307
0.1uF
402
20% CERM
10V
2
1
C2308
20% 10V
402
CERM
0.1uF
2
1
C2309
0.1uF
402
CERM
10V
20%
2
1
C2302
0.1uF
402
CERM
10V
20%
2
1
C2301
20% 10V CERM 402
0.1uF
2
1
C2300
0.1uF
402
CERM
10V
20%
2
1
C2314
0.1uF
402
CERM
10V
20%
2
1
C2313
402
20% 10V CERM
0.1uF
2
1
C2312
20% 10V CERM 402
0.1uF
2
1
C2311
402
CERM
20% 10V
0.1uF
2
1
C2310
20% 10V CERM 402
0.1uF
2
1
C2334
0.1uF
402
CERM
10V
20%
2
1
C2333
0.1uF
402
CERM
10V
20%
2
1
C2339
20% 10V CERM 402
0.1uF
2
1
C2338
20% 10V CERM 402
0.1uF
2
1
C2332
0.1uF
402
CERM
10V
20%
2
1
C2331
0.1uF
402
CERM
10V
20%
2
1
C2337
20% 10V CERM 402
0.1uF
2
1
C2336
20% 10V CERM 402
0.1uF
2
1
C2330
0.1uF
402
CERM
10V
20%
2
1
C2335
0.1uF
402
CERM
10V
20%
2
1
C2324
0.1uF
402
CERM
10V
20%
2
1
C2323
20% 10V CERM 402
0.1uF
2
1
C2329
20% 10V CERM 402
0.1uF
2
1
C2328
20% 10V CERM 402
0.1uF
2
1
C2322
CERM
20% 10V
402
0.1uF
2
1
C2321
0.1uF
402
CERM
10V
20%
2
1
C2327
0.1uF
402
CERM
10V
20%
2
1
C2326
0.1uF
402
CERM
10V
20%
2
1
C2320
20% 10V CERM 402
0.1uF
2
1
C2325
20% 10V CERM
0.1uF
402
2
1
C2351
0.1uF
402
10V
20% CERM
2
1
C2350
0.1uF
402
20% 10V CERM
2
1
C2357
20% 10V CERM 402
0.1uF
2
1
C2356
0.1uF
402
CERM
10V
20%
2
1
C2355
CERM 402
0.1uF
10V
20%
2
1
C2362
20% CERM
402
0.1uF
10V
2
1
C2361
0.1uF
10V 402
CERM
20%
2
1
C2360
0.1uF
402
CERM
10V
20%
2
1
C2365
OMIT
BGA
V1.0
SHASTA
Y19
W22
L21
K21
H17
H18
V8
D1
B5
B2
B1
AB6
AB2
AB10
AA3
W4
V7
U9
U12
R2
M1
L7
H1
F8
F4
AA2
AA1
G15
D19
P15
N8
M15
L8
L15
K8
J15
J12
T15
T10
R9
R12
R10
H8
H15
D2
C19
AB22
AB1
W5 W19 U22 U13 U10 T12 R19 P9 P4
AA6
P14 P13 P12 P10 N9 N22 N13 N12 N11 N10
AA10
M2
M14
M13
M12
M11
M10
L9
L16
L14
L13A5L12
L11
L10
K9
K7
K13
K12
K11
K10
J22
A22
J16
J14
J13
J11
J10
H9
H2
F7
F3
E22
A2
A1
U2300
20% 10V CERM 402
0.1uF
2
1
C2303
23 103
051-6482
C
TITLE=FIZZY ABBREV=DRAWING
=PP2V5_PWRON_SB
=PP3V3_PWRON_SB
=PP2V5_PWRON_SB
LAST_MODIFIED=Wed Aug 4 17:57:46 2004
88
88
74
74
25
74
25
23
25
23
7
7
7
7
7
10
G
D
S
G
D
S
G
D
S
G
D
S
SYS_ISCL0 SYS_ISCA0
SYS_ISCA1
SYS_ISCL1
API_ISCA
API0_ISCL
THMO
DUMMY_A DUMMY_B
PMR_OBSV
IRQ0
THMI
(SYM 7 OF 7)
HRESET*
PURESET* SUSPENDACK* SUSPENDREQ*
CE1_B_TDO
CE1_A_TDI
CE1_LT_TCK
VSP_CLKN
VSP_CLKP
CE1_DI1_TMS CE1_DI2_TRST CE1_RI
CEO_TEST
PM_SLEEP0
CE0_RE
CE0_MC
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
LAST MODIFIED: JUNE 10, 04
MASTER: GILA
JTAG_NB_TRST_L
U3LITE MISC
HIGH FOR NORMAL OPERATION
JTAG_NB_TDO JTAG_NB_TMS
JTAG_NB_TDI
JTAG_NB_TCK
U3LITE REQUIRES ALL JTAG SIGNALS
PP3V3_PWRON
PP3V3_PWRON PP2V5_PWRON
PP2V5_PWRON
PP2V5_PWRON
MF
1/16W
5%
4.7K
402
2
1
R2435
20% 10V
402
0.1UF
CERM
2
1
C2400
402
330
MF
1/16W
5%
2
1
R2419
SOT-363
2N7002DW
4
5
3
Q2404
402
330
1/16W
5% MF
2
1
R2420
100
1% MF
402
1/16W
2
1
R2400
SOT-363
2N7002DW
1
2
6
Q2404
NOSTUFF
2N7002DW
SOT-363
4
5
3
Q2412
NOSTUFF
MF
10K
402
5% 1/16W
2
1
R2438
NOSTUFF
SOT-363
2N7002DW
1
2
6
Q2412
100
1% MF
402
1/16W
2
1
R2403
MF
1/16W
5%
10K
402
2
1
R2424
10K
5% 1/16W MF 402
2
1
R2426
MF
1/16W
5%
10K
402
2
1
R2429
402
10K
5% 1/16W MF
2
1
R2431
MF
1/16W
5%
10K
402
2
1
R2433
5%
10K
402
1/16W MF
2
1
R2436
402
5% 1/16W MF
10K
2
1
R2442
402
10K
5% 1/16W MF
2
1
R2443
MF
1/16W
5%
10K
402
2
1
R2444
NOSTUFF
5% 1/16W MF 402
4.7K
2
1
R2405
402
MF
1/16W
5%
0
21
R2406
NOSTUFF
402
MF
1/16W
5%
0
21
R2408
PBGA
OMIT
U3LITE
V1.0-300MM
P4 R4
J18
J17
C21
C20
E21
B21
D21
D20
E20
D15
Y9
E9
A21
AB28
AC28
AH3
AC2
R25
F20
M26
AA25
V25
AD3
AD5
B20
A20
U3
MF
1/16W
1%
121
402
2
1
R2402
402
121
1% 1/16W MF
2
1
R2401
603
25V
5% CERM
NOSTUFF
1000PF
2
1
C2401
C
24
103
051-6482
=PP1V2_HT
PMU_SUSPEND_REQ
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
NB_VSP_CLK_VREF VOLTAGE=0.6V
VSP_NB_CLK_P
NB_COLD_RESET_L
NB_PU_RESET
SYS_COLD_RESET_L
TP_NB_PM_SLEEP0
NB_MC_PD NB_RE_PD
NB_TEST_PD
NB_RI_PU
NB_SUSPEND_REQ_L
NB_SUSPEND_ACK_L
NB_COLD_RESET_L
NB_WARM_RESET_L
TP_DUMMY_B
TP_DUMMY_A
NB_INT_L
NB_PMR_OBSV
NB_THMI NB_THMO
I2C_NB_A_SCL I2C_NB_A_SDA
I2C_NB_C_SCL I2C_NB_C_SDA
I2C_NB_B_SDA
I2C_NB_B_SCL
NB_SUSPEND_REQ_L
SMU_SUSPENDREQ_L
VSP_NB_CLK_N
JTAG_NB_TCK JTAG_NB_TDI
JTAG_NB_TRST_L
JTAG_NB_TDO JTAG_NB_TMS
28
60
13
25
7
27
24
8
6
24
8
24
8
6
6
25
8
8
8
18
18
18
18
18
18
24
13
27
GND
PLL_49
GND
XTAL_18 PLL_45
GND
VIO PME
PLL_49
VDD
PLL_45
VDD
XGI
XTALS
TEST
PWR_MGT
PCI
GPIO
I2C
I2S2 I2S1 I2S0
(2 OF 8)
PCI1C_BE_4_L PCI1C_BE_5_L PCI1C_BE_6_L PCI1C_BE_7_L
PCI1PAR64_H
XGI_DTI_H
XGI_DTO1_H
XGI_CLK_H
XGI_DTO0_H
PCI1ACK64_L
PCI1REQ64_L
PCI1AD_60_H
PCI1AD_63_H
PCI1AD_62_H
PCI1AD_61_H
PCI1AD_50_H
PCI1AD_52_H PCI1AD_53_H
PCI1AD_51_H
PCI1AD_59_H
PCI1AD_58_H
PCI1AD_57_H
PCI1AD_56_H
PCI1AD_55_H
PCI1AD_54_H
PCI1AD_40_H PCI1AD_41_H PCI1AD_42_H PCI1AD_43_H PCI1AD_44_H
PCI1AD_49_H
PCI1AD_48_H
PCI1AD_47_H
PCI1AD_46_H
PCI1AD_45_H
PCI1AD_39_H
PCI1REQ_5_L
PCI1AD_32_H
PCI1AD_34_H
PCI1AD_38_H
PCI1AD_37_H
PCI1AD_36_H
PCI1AD_33_H
PCI1AD_35_H
PCI1GNT_5_L
PCI1GNT_4_L
PCI1REQ_4_L
PCI1GNT_3_L
PCI1REQ_3_L
XTAL_18XTAL
VDD VDD
FSTEST
XTAL_18_I XTAL_18_O
XTALI XTALO
PLLTEST
TEST_MODE_H
TDI
TCK TMS
TDO
INTRWD_H
I2CDATA_H
I2CCLK_H
PCI_SEL32BIT_H
GPIO_H_3
GPIO_H_2
GPIO_H_1
I2S2SYNC_H
I2S2BITCLK_H
I2S2MCLK_H
I2S2DTO_H
I2S2DTI_H
GPIO_H_0
I2S1DTO_H I2S1MCLK_H I2S1BITCLK_H I2S1SYNC_H
I2S1DTI_H
I2S0BITCLK_H I2S0SYNC_H
I2S0DTI_H I2S0DTO_H I2S0MCLK_H
RESET_L STOPXTALS_L SUSPENDREQ_L SUSPENDACK_L PCI1PME_L
TRST_L
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
Re-pin within each RPAK as necessary DO NOT swap between RPAKs
42
I2S2: S/P-DIF
PCI 32-bit select
0 = 64-bit PCI & XGC
(I2S1_DEV_TO_SB_DTI)
(I2S1_RESET_L)
1 = 32-bit PCI & GPIOs
(I2S2_DEV_TO_SB_DTI)
REDUNDANT - NEED TO ADDRESS THIS
REDUNDANT - NEED TO ADDRESS THIS
Master: Link
I2S0: Audio DAC
I2S1: Soft Modem
NET_SPACING_TYPE
ELECTRICAL_CONSTRAINT_SET
Page Notes
GPIO
NC
BOM options provided by this page:
Power aliases required by this page:
26
(I2S0_DEV_TO_SB_DTI)
10
7
11
8
17
13 14 15 16
9
12
22 23
27
19
18
20
24 25
(SCCA)(SCCB)
31
33
30
28
34
36 37 38
43
41
44 45
47
46
39 40
53 54
50
51 52
49
48
(I2S2_RESET_L)
29
- _PP3V3_PCI
- _PP2V5_PWRON_SB
(NONE)
NOTE: XGC required for Shasta GPIOs
6
"Slot E" - AD21
"Slot F" - AD22
21
32
35
Signal aliases required by this page:
- _PP1V2_PWRON_SB
- _PP3V3_PWRON_SB
Shasta Serial / Misc
AUDIO GPIO - see note on right
- PCI_64BIT Configures Shasta for 64-bit PCI
- MPIC_NB/MPIC_SB Selects whether NorthBridge or SouthBridge MPIC will be used for interrupt controller.
From SouthBridge <-
NorthBridge / SouthBridge MPIC Routing
-> From NorthBridge
<- To CPU
the audio circuit to provide the
necessary pull-ups & pull-downs.
AUDIO GPIOS
NOTE: It is the responsibility of
10uF
20%
6.3V 1206
CERM
2
1
C2500
402
CERM
1uF
10%
6.3V
2
1
C2501
402
10%
CERM
1uF
6.3V
2
1
C2511
20%
6.3V CERM 1206
10uF
2
1
C2510
20%
6.3V CERM 1206
10uF
2
1
C2520
402
10%
CERM
1uF
6.3V
2
1
C2521
10uF
CERM 1206
20%
6.3V
2
1
C2530
CERM
402
10%
1uF
6.3V
2
1
C2531
402
MF
1/16W
5%
10K
2
1
R2500
1/16W
MF
402
PCI_64BIT
5%
1K
2
1
R2501
8X4.5MM-SM
18.432M
CRITICAL
21
Y2590
1% 1/16W MF 402
200
2
1
R2590
402
CERM
50V
5%
22pF
2
1
C2591
22pF
402
CERM
50V
5%
2
1
C2590
MF
402
5%
1/16W
4.7K
2
1
R2580
V1.0
BGA
SHASTA
OMIT
Y13
V13
W13
AB12
W14
V15
U15
T9
U7
W2
Y4
W17
W12
Y11
A3
W11
AA11
AB11
U11 V11
W10
E9
Y12
AA12
AA13AB13
U14
W6
U16
AB21
U17
K17
W18
E18
Y20
AA20
AA19
K20
K22
H22
J20
H21
G22
F22
J19
H20
G21
F21
J17
H19
K18
D22
G20
D21
C22
G19
F20
C21
E20
D20
F19
E19
G18
G17
C20
B21
A21
F16
G16
F17
F18
A20
D18
L17
V12
W9
Y7
Y8
AA5
AB4
AA7
V9
AB5
V10
AA8
Y6
U8
Y5
W7
AA4
AB7
Y9
W8
AB3
Y2
V5
V14
U2300
0.1uF
402
CERM
10V
20%
2
1
C2540
SM1
10K
5%
1/16W
63
RP2551
SM1
5%
1/16W
10K
81
RP2550
1/16W
SM1
5%
10K
54
RP2550
SM1
10K
5%
1/16W
72
RP2550
SM1
1/16W
10K
5%
81
RP2551
SM1
1/16W
5%
10K
72
RP2551
SM1
10K
1/16W
5%
54
RP2551
10K
SM1
5%
1/16W
81
RP2552
SM1
1/16W
5%
10K
63
RP2550
5%
1/16W
SM1
10K
72
RP2552
SM1
1/16W
5%
10K
54
RP2552
5%
SM1
10K
1/16W
63
RP2552
SM1
5%
1/16W
10K
72
RP2553
10K
5%
SM1
1/16W
54
RP2553
5%
1/16W
SM1
10K
81
RP2553
SM1
10K
5%
1/16W
63
RP2553
10K
MF
1/16W
5%
402
21
R2550
10K
MF
1/16W
5%
402
21
R2551
402
1/16W
5%
10K
MF
21
R2552
5%
1/16W
MF
10K
402
21
R2553
5%
1/16W
MF
10K
402
21
R2556
5%
1/16W
MF
10K
402
21
R2557
10K
MF
1/16W
5%
402
21
R2558
10K
MF
1/16W
5%
402
21
R2559
10K
402
MF
1/16W
5%
21
R2564
10K
402
MF
1/16W
5%
21
R2563
402
MF
1/16W
5%
1K
21
R2560
5% MF
402
10K
1/16W
21
R2561
10K
402
5% MF
1/16W
21
R2566
NO STUFF
5%
1/16W
MF
402
10K
21
R2565
5%
1/16W
MF
402
10K
21
R2567
5% MF
402
10K
1/16W
21
R2568
NO STUFF
402
MF
1/16W
5%
1K
21
R2562
10K
MF
1/16W
5%
NO STUFF
402
21
R2555
1K
5%
1/16W
MF
402
21
R2554
PP3V3_RUN
402
1/16W
5%
10K
MF
2
1
R2576
SM
2N3904
MPIC_SB
2
3
1
Q2576
5%
1/16W
MF
402
10K
MPIC_SB
21
R2575
MPIC_NB
5%
1/16W
MF
402
0
2
1
R2579
5%
1/16W
MF
402
0
MPIC_SB
21
R2578
5%
33
SM1
1/16W
7
8
6
5
2
1
3
4
RP2510
SM1
33 5%
1/16W
8
7
6
5
1
2
3
4
RP2530
1/16W
5%
33
SM1
6
5
8
7
3
4
1
2
RP2520
3.3
805
FF
1/10W
5%
21
R2505
5%
1/10W
FF
805
3.3
21
R2510
3.3
805
FF
1/10W
5%
21
R2520
5%
1/10W
FF
805
3.3
21
R2530
MF
1/16W
5%
0
402
21
R2511
TITLE=FIZZY ABBREV=DRAWING
25 103
C
051-6482
I2S0_TO_DEV
I2S0_MCLK
AUDIO
I2S0_BITCLK_R
I2S0_MCLK_R
PCI_SLOTE_REQ_L PCI_SLOTE_GNT_L
SB_GPIO12
SB_TO_SMU_INT_L
SB_GPIO25
SB_GPIO24
SB_GPIO23
PCI_SLOTF_INT_L
PCI_SLOTE_INT_L
PCI_SLOTD_INT_L
PCI_SLOTC_INT_L
PCI_SLOTB_INT_L
PCI_SLOTA_INT_L
AGP_INT_L
UDASH_RESET_L
UDASH_SDOWN
PCI_SLOTF_GNT_L
CPU_SRESET_L
PCI_SLOTF_REQ_L
SYS_OVERTEMP_L
I2S0_RESET_L
ENET_ENERGYDET
SB_GPIO46
SB_GPIO45
SB_GPIO30
ENETFW_RESET
FW_LOWPWR
PCI_SLOTG_INT_L
AUDIO_GPIO_11
AUDIO_EXT_MCLK_SEL
AUDIO_HP_MUTE_L
AUDIO_HP_DET_L
AUDIO_LI_OPTICAL_PLUG_L
AUDIO_LI_DET_L
AUDIO_LO_DET_L AUDIO_LO_OPTICAL_PLUG_L
AUDIO_GPIO_12
AUDIO_LO_MUTE_L
AUDIO_SPKR_DET_L
SMU_TO_SB_INT_L
NB_TO_SB_INT
SB_GPIO52
SB_GPIO51
SB_GPIO49 SB_GPIO50
SYS_SLEWING_L
SB_GPIO47
I2S1_MCLK
I2S1_TO_DEV
10 MIL SPACING
I2S0_DEV_TO_SB_DTI
I2S0_TO_SB
SB_INT_L
NB_INT_L_R
CPU_INT_L
NB_INT_L
NB_TO_SB_INT
=PP1V2_PWRON_SB
MIN_NECK_WIDTH=15 mil
MIN_LINE_WIDTH=20 mil
VOLTAGE=1.2V
PP1V2_PWRON_SB_PLL45VDD
MIN_NECK_WIDTH=15 mil
MIN_LINE_WIDTH=20 mil
VOLTAGE=1.2V
PP1V2_PWRON_SB_PLL49VDD
=PP2V5_PWRON_SB
MIN_NECK_WIDTH=15 mil
VOLTAGE=2.5V
PP2V5_PWRON_SB_XTALVDD
MIN_LINE_WIDTH=20 mil
MIN_NECK_WIDTH=15 mil
MIN_LINE_WIDTH=20 mil
VOLTAGE=2.5V
PP2V5_PWRON_SB_XTAL18VDD
I2S2_MCLK_R
I2S2_DEV_TO_SB_DTI
15 MIL SPACING
SB_CLK25M_ATA
SB_CLK25M_ATA
SB_CLK18M_XTALO
I2S2_BITCLK
SYS_WARM_RESET_L
JTAG_SB_TDO
PCI_SLOTG_INT_L
PCI_SLOTD_INT_L
PCI_SLOTE_INT_L
PCI_SLOTA_INT_L
PCI_SLOTF_GNT_L
PCI_SLOTE_GNT_L
PCI_SLOTF_REQ_L
PCI_SLOTE_REQ_L
=PP3V3_PCI
=PP3V3_PWRON_SB
SB_CLK25M_ATA
TP_SB_PLLTEST
JTAG_SB_TDI
JTAG_SB_TCK
TP_SB_WATCHDOG
I2C_SB_SDA
MODEM_RING2SYS_L
SB_INT_L
SB_STOPXTALS_L SMU_SUSPENDREQ_L SB_SUSPENDACK_L
I2C_SB_SCL
SYS_PME_L
15 MIL SPACING
I2S2_MCLK
I2S2_TO_DEV
10 MIL SPACING
I2S0_SB_TO_DEV_DTO
I2S0_TO_DEV
I2S2_BITCLK
I2S2_BIDIR
I2S0_BIDIR
I2S0_SYNC
I2S2_TO_SB
I2S2_DEV_TO_SB_DTI
SB_CLK18M_XTALI
SB_CLK18M_XTAL 15 MIL SPACING
I2S1_SYNC
I2S1_BIDIR
I2S1_TO_SB
I2S1_DEV_TO_SB_DTI
I2S2_SB_TO_DEV_DTO
I2S2_TO_DEV
I2S0_SB_TO_DEV_DTO_R
I2S0_SYNC_R
I2S1_SB_TO_DEV_DTO_R I2S1_MCLK_R I2S1_BITCLK_R I2S1_SYNC_R
I2S2_SB_TO_DEV_DTO_R
I2S2_BITCLK_R I2S2_SYNC_R
I2S2_SB_TO_DEV_DTO
I2S1_SB_TO_DEV_DTO I2S1_MCLK I2S1_BITCLK I2S1_SYNC
I2S0_SB_TO_DEV_DTO
I2S0_DEV_TO_SB_DTI
I2S2_RESET_L
=PP3V3_PWRON_SB
15 MIL SPACING
SB_CLK18M_XTALO
SB_TEST_MODE_PD
I2S1_TO_DEV
I2S1_SB_TO_DEV_DTO
I2S0_BIDIR
I2S0_BITCLK
=PP3V3_PWRON_SB
CPU_SRESET_L
SYS_OVERTEMP_L
SB_TO_SMU_INT_L
UDASH_RESET_L
MODEM_RING2SYS_L
SYS_SLEWING_L
FW_LOWPWR
ENETFW_RESET
ENET_ENERGYDET
PCI_SLOTB_INT_L
PCI_SLOTF_INT_L
PCI_SLOTC_INT_L
SB_GPIO12
SB_GPIO24
SB_GPIO30
SB_GPIO23
SB_GPIO25
SB_GPIO46
SB_GPIO49
SB_GPIO45
SB_GPIO47
SB_GPIO51
SMU_TO_SB_INT_L
SB_GPIO50
SB_GPIO52
JTAG_SB_TMS
I2S1_BITCLK
I2S1_BIDIR
I2S2_BIDIR
I2S2_SYNC
JTAG_SB_TRST_L
SB_PCI_SEL32BIT
TP_SB_FSTEST
SB_CLK18M_XTALI
I2S2_SYNC
=PP3V3_PWRON_SB
I2S1_RESET_L
I2S0_MCLK I2S0_BITCLK I2S0_SYNC
I2S1_DEV_TO_SB_DTI
I2S2_MCLK
I2S1_RESET_L
LAST_MODIFIED=Wed Aug 4 17:57:47 2004
77
27
33
94
30
88
87
76
74
94
94
94
74
94
74
27
33
74
94
76
94
30
25
27
76
29
74
77
76
75
25
94
28
103
103
94
76
76
76
94
94
103
25
76
103
25
30
25
94
94
27
94
25
94
103
103
76
94
102
25
25
25
94
29
16
87
87
90
77
103
101
25
25
25
95
14
23
102
27
102
74
77
25
74
23
27
25
24
77
102
95
102
95
102
25
25
102
102
25
25
25
25
95
95
23
25
102
23
29
16
25
25
25
25
90
87
87
25
25
102
102
23
25
102
102
95
25
102
25
25
25
25
25
13
25
25
25
25
25
25
25
25
25
6
49
6
6
25
25
25
13
95
25
25
25
25
25
25
25
102
102
102
102
102
101
6
101
101
100
98
102
13
25
25
25
25
25
13
25
6
25
25
6
24
25
7
7
25
25
25
25
25
8
8
25
25
25
6
25
25
25
25
7
7
25
6
8
8
18
6
25
13
13
13
18
13
25
25
25
25
25
25
25
6
6
25
25
6
6
6
6
25
25
102
7
25
6
25
7
25
13
13
6
6
13
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
25
13
25
25
8
6
25
8
6
25
25
7
6
25
25
25
6
25
6
SYM 2 OF 2
VDD33
VDD25 VDD25
VDD_PLL3
VDD_PLL2
VDD_PLL1
C4_VDD
C3_VDD
C2_VDD
VDD_PLL4
VDD_I2C VDD_NBSYNC VDD_PCLK
VDD33_BC VDD33_BC1
VDD_HCLK0
VDD_HSYNC
VDD_HCLK2
VDD_HCLK0
VDD_HCLK1 VDD_HCLK2
VDD_HSYNC
VDD15_HSYNC VDD15_PCLK
VDD_XTAL
VDD_VCLK
VSS_XTAL
VSS_VCLK
VSS_HSYNC
VSS_HCLK2
VSS_HCLK0 VSS_HCLK1 VSS_HCLK2
VSS_HSYNC
VSS_HCLK0
VSS33_BC1
VSS33_BC
VSS33
VSS_PCLK
VSS_NBSYNC
VSS25
VSS25
VSS_I2C
VSS_CML
VSS_PLL4
VSS_PLL3
VSS_PLL2
C2_VSS C3_VSS C4_VSS
VSS_PLL1
C1_VSSC1_VDD
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PLACE NEAR PIN D10 D12
A8, C5, B4, K10, H12 J11, M11, A1
PINS G12, M12, H3, K1, L5, M9, A11, A9
CAN BE TURNED OFF IN SLEEP
PLACE NEAR PIN D2 D1
PLACE NEAR PIN M3 M2
PLACE NEAR PIN L8 K8
402 CAPS NOT NEEDED
IF 603 CAN BE PLACED CLOSE TO PULSAR
MASTER: GILA
LAST MODIFIED: APR 09, 04
PULSAR POWER
402
5%
1/16W
MF
4.7
21
R2601
PP3V3_RUN
PP3V3_PWRON
0.1UF
402
10V
20% CERM
2
1
C2601
MF
1/16W
5%
4.7
402
21
R2603
MF
1/16W
5%
4.7
402
21
R2605
CERM
20% 10V
402
0.1UF
2
1
C2605
180-OHM-1.5A
0603
21
L2601
20%
0.1UF
10V 402
CERM
2
1
C2609
0.1UF
CERM
20% 10V
402
2
1
C2611
180-OHM-1.5A
0603
21
L2603
402
10V
20% CERM
0.1UF
2
1
C2613
180-OHM-1.5A
0603
21
L2605
402
10V
20% CERM
0.1UF
2
1
C2615
180-OHM-1.5A
0603
21
L2607
0.1UF
10V
20% CERM
402
2
1
C2617
402
10V
20% CERM
0.1UF
2
1
C2619
CERM
20% 10V
402
0.1UF
2
1
C2622
402
4.7
5%
1/16W
MF
21
R2607
0603
180-OHM-1.5A
21
L2609
402
0.1UF
CERM
20% 10V
2
1
C2620
0.1UF
402
10V
20% CERM
2
1
C2627
CERM
20% 10V
402
0.1UF
2
1
C2628
0.1UF
402
10V
20% CERM
2
1
C2629
0.1UF
402
10V
20% CERM
2
1
C2630
0.1UF
402
10V
20% CERM
2
1
C2651
CERM
20% 10V
402
0.1UF
2
1
C2623
CERM
20% 10V
402
0.1UF
2
1
C2624
CERM
20% 10V
402
0.1UF
2
1
C2625
CERM
20% 10V
402
0.1UF
2
1
C2626
CERM
20% 10V
402
0.1UF
2
1
C2631
CERM
20% 10V
402
0.1UF
2
1
C2632
CERM
20% 10V
402
0.1UF
2
1
C2633
CERM
20% 10V
402
0.1UF
2
1
C2634
CERM
20% 10V
402
0.1UF
2
1
C2635
CERM
20% 10V
402
0.1UF
2
1
C2636
CERM
20% 10V
402
0.1UF
2
1
C2637
CERM
20% 10V
402
0.1UF
2
1
C2638
CERM
0.1UF
20%
402
10V
2
1
C2665
0.1UF
402
10V
20% CERM
2
1
C2667
0.1UF
402
10V
20% CERM
2
1
C2671
CERM
20% 10V
0.1UF
402
2
1
C2640
10V
20%
0.1UF
CERM 402
2
1
C2639
MF
1/16W
5%
4.7
402
21
R2609
2.2UF
6.3V CERM1
20%
603
2
1
C2645
CERM1
6.3V
2.2UF
20%
603
2
1
C2669
2.2UF
6.3V CERM1
20%
603
2
1
C2603
CERM1
6.3V
2.2UF
20%
603
2
1
C2607
2.2UF
6.3V CERM1
20%
603
2
1
C2621
FSBGA
OMIT
PULSAR
C12
A3
M2
K8
D1
D12
L12
F11
C2
K12
H10
A7
A4
B7
B11
C10
A6
M5
L7
E2
H2
L2
A12
A1
M3
L8
D2
D10
M12
G12
B2
H12
K10
B4
C5
A8
A9
A11
M9
L5
E1
K1
H3
M11
J11
C9B9
E10E12
M4L3
G1F1
U2600
PP3V3_PWRON
PP3V3_PWRON
PP3V3_PWRON
PP3V3_RUN
359S0076
1
U2600
PULSAR, PBGA
051-6482
C
26
103
MIN_LINE_WIDTH=25MIL
VOLTAGE=1.5V
PP1V5_PSL_PLL3
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=1.5V
PP1V5_PSL_PLL4
MIN_NECK_WIDTH=10MIL
=PP1V2_PULSAR
=PPVCORE_PULSAR
=PPVCORE_PULSAR
=PPVCORE_PWRON_PULSAR
=PPVCORE_PWRON_PULSAR
=PP1V2_PULSAR
=PPVCORE_PULSAR
MIN_LINE_WIDTH=25MIL
VOLTAGE=1.5V
PP1V5_PSL_PLL2
MIN_NECK_WIDTH=10MIL
=PP1V2_PULSAR
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM
MIN_LINE_WIDTH=25MIL
VOLTAGE=1.5V
PP1V5_PSL_PLL1
MIN_NECK_WIDTH=10MIL
VOLTAGE=3.3V MIN_LINE_WIDTH=25MIL
PP3V3_PSL_XTAL
MIN_NECK_WIDTH=10MIL
=PPVCORE_PWRON_PULSAR
40
40
37
37
26
26
26
26
26
26
26
26
26
26
26
7
7
7
7
7
7
7
7
7
7
7
REFCLK_1
SYM 1 OF 2
SCLK
SDATA
RESET*
XIN
XOUT
REF25
REF15
TEST3
TEST2
TEST1
ADDRSEL
REF33
REF_CML
PRES_CML
FORCESPO*
PD
VCLKN VCLKP
HCLKN_0 HCLKN_1 HCLKN_2
GPCLK33_1
GPCLK33_0
HCLKP_0
HCLKP_2
HCLKP_1
PCLK33_1
PCLK33_0
PCLK25_1
PCLK25_0
GPCLK25_0 GPCLK25_1
PCLK33_2 PCLK33_3 PCLK33_4
HTBEN_0 HTBEN_1
NBSYNC
HSYNC_0 HSYNC_1
REFCLK_0
ERROR*
SLEWING*
PCLK12 PCLK15
SCAN_MODE
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
LAST MODIFIED: JULY 12, 04
MASTER: GILA
1.2V
ELECTRICAL_CONSTRAINT_SET
NET_PHYSICAL_TYPE DIFFERENTIAL_PAIR
33MHZ
33MHZ
1=IIC ADDR D4/D5
66MHZ
66MHZ
33MHZ
66MHZ
66MHZ
66MHZ
3.3V
1.2V
1.2V
1.2V
1.5V
66MHZ
66MHZ
NET
TYPE
SPACING
66MHZ
NET_SPACING_TYPE
3.3V
3.3V
2.5V
2.5V
2.5V
25MHZ 25MHZ
EI_NB_SYNC IS PART OF EI_CPU_SYNC TOPOLOGY
DIFFERENTIAL SIGNALS SHOULD HAVE 5 MIL SPACING TO EACH OTHER ALL SPACING GROUPS SHOULD HAVE 15 MIL SPACING TO SIGNALS NOT IN THEIR GROUP
3.3V
3.3V
2.5V
2.5V
2.5V
3.3V
33MHZ
0=IIC ADDR D2/D3
33MHZ
PULSAR CLOCKS
0
5%
21
R2701
I100 I101
I102
I103
0
5%
402
21
R2704
249
402
1%
21
R2706
FSBGA
OMIT
PULSAR
B12
C11
B3
A2
D11
E11
K3
K9
B1
C1
M1
D3
H1
G2
A5
M6
J2
G11
B6
C3
M10
L9
M7
L6
K5
L1
K2
L10
L11
F12
J12
K11
H11
J10
B5
B8
A10
C4
C8
B10
K4
L4
J1
J3
F2
M8
E3
U2600
U.FL-R_SMT
NOSTUFF
F-ST-SM
1
2
3
J2700
CRITICAL
8X4.5MM-SM
25.0000M
21
Y2701
402
1K
5% 1/16W MF
2
1
R2722
402
NOSTUFF
0
5%
1/16W
MF
21
R2748
I116 I117
I118
I119
20
4025%
21
R2703
402
0
5%
21
R2705
0
4025%
21
R2707
20
4025%
21
R2709
40205%
21
R2711
5% 402
021R2715
0
4025%
21
R2717
40205%
21
R2719
5%0402
21
R2720
1K
402 5%
NOSTUFF
21
R2724
4025%
1K
NOSTUFF
21
R2738
402 1%
1K
21
R2740
1%
806
402
21
R2742
681
402
1%
21
R2744
402
1K
1%
21
R2746
5%47402
21
R2750
1/16W
0
MF
402
NO STUFF
5%
21
R2752
402
5%
0
1/16W
MF
21
R2754
402
0
5%
1/16W
MF
21
R2756
402
NO STUFF
330K
5%
1/16W
MF
21
R2758
5%0402
21
R2761
1/16W
NOSTUFF
402
5% MF
24
2
1
R2762
NOSTUFF
MF 402
1/16W
24
5%
2
1
R2764
5% 50V CERM
33PF
402
2
1
C2705
CERM
50V
5%
33PF
402
2
1
C2707
0
4025%
21
R2768
20
5% 402
21
R2770
0
4025%
21
R2772
10% 402
CERM
50V
0.001UF
21
C2708
0.001UF
50V
CERM
40210%
21
C2710
0.001UF
50V
CERM
40210%
21
C2713
10% 402
CERM
50V
0.001UF
21
C2715
0.001UF
50V
CERM
40210%
21
C2700
0.001UF
50V
CERM
10% 402
21
C2702
NOSTUFF
4025%
0
21
R2775
NOSTUFF
40205%
21
R2776
402
0
5%
21
R2702
5%0402
21
R2779
NOSTUFF
402225%
21
R2700
I86 I87
I90
I91
I94 I95
I96
I97 I98
I99
051-6482
C
27
103
EI_CPU_CLK EI_CPU_CLK
CLOCKS
EI_CPU_CLK_N
EI_CPU_CLK_N
EI_CPU_CLK_P
EI_CPU_CLK EI_CPU_CLK
CLOCKS
EI_CPU_CLK_P
EI_CPU_SYNC
CLOCKS
EI_SYNC
EI_CPU_SYNC
CLOCKS
EI_CPU_CLK_N_C
CLOCKS
EI_CPU_CLK_P_C
EI_NB_SYNC_R
CLOCKS
SB_CLK25M_ATA
CLOCKS
PCI_CLK66M_SB_INT_R
CLOCKS
PCI_CLK_P3_R
CLOCKS
SB_CLK25M_ATA_R
HT_CLK66M_SB
CLOCKS
AGP_CLK66M_GPU_R
PCI_CLK_P1_R
CLOCKS
PLS_X_OUT_B
PLS_X_IN_B
PLS_FORCE_P0_L_R
PLS_X_IN
CLOCKS
EI_NB_SYNC
CLOCKS
HT_CLK66M_SB
HT_SB_CLK
CLOCKS
HT_CLK66M_NB
HT_NB_CLK
AGP_CLK66M_GPU
TP_PLS_CLK_66M_0
EI_NB_CLK_N
PCI_CLK_P3
PCI_CLK_P1
TP_PLS_CLK_66M_1
PLS_CLK_66M_1_R
CLOCKS
EI_NB_CLK_P
PLS_EXTCLK
CLOCKS
PLS_XTAL
CLOCKS_PCI
CLOCKS
CLOCKS
CLOCKS_PCI
EI_NB_CLK
CLOCKS
EI_NB_CLK
EI_NB_CLK_N
CLOCKS
VSP_NB_CLK_N
VSP_NB_CLK VSP_NB_CLK
TP_SATA_CLK25M
RAM_CLK66M_NB
HT_CLK66M_NB_R
CLOCKS
CPU_HTBEN
PCI_CLK_GP0_R
CLOCKS
EI_CPU1_CLK_P_R
CLOCKS
EI_CPU1_CLK_N_R
CLOCKS
PCI_CLK_GP1_R
CLOCKS
EI_CPU1_SYNC_R
CLOCKS
HT_CLK66M_NB
CLOCKS
CPU1_HTBEN_R
VSP_NB_CLK_N
PCI_CLK_GP1
EI_NB_SYNC
PLS_RESET_L
I2C_CLOCK_SDA
PLS_X_ADDRSEL
I2C_CLOCK_SCL
SYS_SLEWING_L
PLS_PRES_CML
PLS_REF33
PLS_REF25
PLS_REF15
PLS_SCAN_MODE
SLEWING_L_R
CLOCKS
SATA_CLK25M_R
CLOCKS
CLOCK_ERROR_L
TP_PLS_REF_CML
TP_PLS_TEST1 TP_PLS_TEST2 TP_PLS_TEST3
AGP_CLK66M_NB
PLS_INTERM
CLOCK_RESET_L
PP3V3_PWRON
VSP_NB_CLK_P
PCI_CLK_GP0
CLOCKS
VSP_NB_CLK_N_C
CLOCKS
AGP_CLK66M_NB
AGP_NB_CLK
EI_NB_CLK
CLOCKS
EI_NB_CLK
EI_NB_CLK_P
VSP_NB_CLK_P
CLOCKS
VSP_NB_CLKVSP_NB_CLK
CLOCKS
AGP_GPU_CLK
AGP_CLK66M_GPU
EI_CPU_SYNC_R
CLOCKS
CPU_HTBEN_R
CLOCKS
CLOCKS
PCI_CLK_P4_R
RAM_CLK66M_NB_R
CLOCKS
CLOCKS
EI_NB_CLK_P_C
HT_CLK66M_SB_R
CLOCKS
PCI_CLK_P4
VSP_NB_CLK_P_C
CLOCKS
PLS_CLK_66M_0_R
CLOCKS
CLOCKS
EI_NB_CLK_N_C
PLS_X_OUT
SYS_OVERTEMP_L
PLS_EXTCLK
EI_CPU1_SYNC
EI_CPU1_SYNC
CLOCKS
EI_CPU1_CLKEI_CPU1_CLK
EI_CPU1_CLK_P
CLOCKS
EI_CPU1_CLKEI_CPU1_CLK
EI_CPU1_CLK_N
CLOCKS
=PULSAR_POWER_DOWN
AGP_CLK66M_NB_R
CLOCKS
PULSAR_POWER_DOWN_R
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60
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11
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27
49
16
14
14
14
27
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27
27
27
27
25
27
27
27
27
27
6
27
8
8
6
6
27
27
8
27
27
24
6
37
27
29
14
14
14
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14
24
8
27
18
18
13
8
6
6
6
6
27
13
6
24
8
27
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24
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