Apple iMac G5 GILLA EVT1 MLB 051-6482 Rev13 Schematic

ANGLES
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
DATE
APPD
ENG
DATE
APPD
CK
ECN
ZONE
REV
X.XXX
X.XX
XX
DIMENSIONS ARE IN MILLIMETERS
THIRD ANGLE PROJECTION
D
SIZE
APPLICABLE
NOTED AS
MATERIAL/FINISH
NONE
SCALE
DESIGNER
MFG APPD
DESIGN CK
RELEASE
QA APPD
ENG APPD
DRAFTER
METRIC
OF
SHT
DRAWING NUMBER
TITLE
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
Apple Computer Inc.
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
DESCRIPTION OF CHANGE
11/21/03
SYSTEM BLOCK DIAGRAM
REVISION HISTORY
7
4
POWER BLOCK DIAGRAM
49
3.3V/5V PWRON SWITCHING
14
11
3
SHASTA DISK
PDF
CPU FAN 1 CONTROL
41
CIRCUIT
EXTERNAL TMDS TRANSMITTER
BLOCK
18
17
DISK CONNECTORS
83 84* 87
FIREWIRE A PHY & CONNECTORS
76
59
HYPERTRANSPORT LA CONNECTORS SHASTA PCI BOOT ROM
56
55
14
34
33
32
29 30
28
31
27
20
25
22
24
19
23
26
16
13
15
11
2
10
8 9
DISK
AUDIO CONNECTORS
SPEAKER AMP
HEADPHONE / LINE OUT
AUDIO CODEC, LINE IN, MIC IN
AUDIO POWER SUPPLIES
MODEM CONNECTOR
USB HOST INTERFACE
SHASTA FIREWIRE
ETHERNET PHY & CONNECTORS
SHASTA ETHERNET
USB DEVICE INTERFACE
USB
MODEM
AUDIO
FIREWIRE
ETHERNET
90
88*
94
91*
96*
95*
98*
97*
99*
92
GRAPHICS
GPU FRAME BUFFER
74*
PAGE
77* 80*
75*
60* 62* 64
54
57 58
EXT VGA & TMDS U3LITE HYPERTRANSPORT SHASTA HYPERTRANSPORT
USB2 PCI
GRAPHICS DDR SDRAM A GRAPHICS DDR SDRAM B GPU STRAPS GPU DAC & CLOCKS
50 51 52 53
48
PAGE PDF
U3LITE AGP
GPU VREG
GPU AGP
FRAME BUFFER TERMINATION
CIRCUIT
PCI
HT
BLOCK
AIRPORT EXTREME
GPU DVI & STRAPS
7
35
TOP
21
3
2
38 39 40
42 43
52
50
44
49
46
48
47
45
51
53
63
61
56
58
57
60
54 55
62
59
68
66
65
64
67
69 70
FUNC TEST
I2C CONNECTIONS
SHASTA SERIAL PULSAR POWER
SHASTA CORE
VTT VREG
DIMMS
SERIES TERMINATION
PARALLEL TERMINATION
CPU DIODE CONDITIONER
CPU BYPASS CPU VREG
U3LITE MEMORY
PARALLEL TERMINATION
CPU VREG OUTPUT CAPS
CPU VREG
NEO POWER & BYPASS
U3LITE CORE
1.2V VREG
SMU
8
6
9
18
16
22
10
23 24 25* 26 27 28* 29 30 31 32 33 34 35
38
36 37*
40
45 46
44
* PAGES WHERE MASTER PAGE IS IN A DIFFERENT SCHEMATIC
MEMORY
PROCESSOR
4
36 37
2.5V VREG
CPU LOGIC ANALYZER CONNECTOR
6
INDICATOR LED
21*
17
13*
CPU STRAPS
U3LITE APPLE PI
PULSAR CLOCKS
U3LITE MISC
12
CPU FAN 2 AND SYSTEM FAN CONTROL
POWER CONNECTOR / POWER ALIAS
11
5
TABLE OF CONTENTS
NEO APPLE PI
SIGNAL ALIAS
GILA
EVT1
??
? ?
99
1
051-6482
13
SCH,MLB,GILA
?
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
AIRPORT EXTREME
BOOTROM
CONNECTOR
PAGE 24
J9401
CTL-LESS /
NCs
S/PDIF
U9000
U1300
SMU
PAGE 13
U1301
PAGE 13
RTC
1394 OHCI (3.3V/98MHz)
LINE OUT
AMP
AUDIO CODEC
CONNECTOR
TERM
PARALLEL
PAGES 44&45
CONNECTOR
MICRODASH MODEM
BLUETOOTH CONNECTOR
CONNECTORS
PAGE 92
PAGE 94
PAGE 92
USB
J9400
J9240
54
USB 2.0
PAGE 91
USB
321
uPD720101
U7700
AMP
J9800
LINE IN
PAGE 97
PAGE 98
CONNECTOR
LINE IN
PAGE 98
MIC
J9802
J9801
CONNECTOR
SPEAKER
PAGE 98
LINE OUT
OPTICAL OUT J9803
COMBO OUT CONNECTOR
PAGE 98
PAGE 97
SPEAKER
PAGE 97
AMP
PAGE 95
U9500
PCM3052
CONNECTOR
NV18B/NV34
GPU
U4900
PAGE 49
PAGE 94
SOFT MODEM
32-bit PCI (5V-3.3V/33MHz)
J7600
PAGE 76
SERIES
PCI
GOOD,BETTER,BEST: HARD DRIVE
EDUCATION: NOT USED
PAGE 54
FREQUENCIES LISTED ARE MAXIMUM DATA TRANSFER RATES SUPPORTED BY U3LITE
PAGE 25
PAGE 25
PAGE 80PAGE 80
CONNECTORS
ETHERNET
POWER
PAGE 26
U2600
PULSAR
CLOCKS
PAGE 27
PAGE 87
4 Diff pairs
J8700
PAGE 87
10/100 ETHERNET
BCM5221
CONNECTOR
8-bit TX & 8-bit RX
U8700
GMII (3.3V/125MHz)
0
FIREWIRE A
FIREWIRE A
1
802A
PAGE 90
J9000, J9001
PAGE 90
2 Diff pairs
8-bit TX/RX
SCCA
To Shasta
SCCBSCCA
I2S1
I2S
I2S0 I2S2
PAGE 88
FIREWIREETHERNET
PAGE 84
PAGE 23
CORE
GPIO/PCI64
PAGE 74
PCI
U7500
PAGE 75 PAGE 77
FOR DEVELOPMENT ONLY
EDUCATION: HARD DRIVE GOOD,BETTER,BEST: OPTICAL
PAGE 83
CONNECTOR
3.3V/133MHZ
UATA
J8302
PAGE 83
J8301
UATA
PAGE 83
JXXXX
SATA
SATA DEV
CONNECTOR
CONNECTOR
SATA/150
UATA/133
SATA/150
1.2V/1.5GHZ
1.2V/1.5GHZ
SATA2SATA1
U2300
SATA
AGP
U3
17",20" INVERTER
J5902, J5903
PAGE
MISC
DIMMS
J4001
J4000
PAGE 62
SHASTA
PAGE 91
FRAME
PAGE 55
8X AGP
J5900, J5901
2.6V/540MHZ
2.6V/540MHZ
TMDS
BUFFER A
FRAME
U5400, U5401
FRAME BUFFER
FRAME BUFFER
64-BIT
U5500, U5501
BUFFER B
333MHZ SUPPORTED
MAIN MEMORY
64/128-BIT
2.6V/400MHZ
SYSTEM BLOCK DIAGRAM
APPLE PI
32-BIT
PAGE 29
APPLE PI
PAGE 28
MAIN MEMORY
PAGE 37
TERM
PAGE 40
PAGE 38
8-BIT HYPERTRANSPORT
CONTROL = 2.5V
PAGE 60
CORE
PAGE 22
J6400 J6401
32-BIT
I/O = 1.5V
4X = 1.5V
1.2V/400MHZ
J6402
0.8V/533MHZ 48
HYPERTRANSPORT
HYPERTRANSPORT
U3LITE
PAGE 18
I2C
CPU
U2900
PAGE 64
HT
PAGE 59
EXT VGA
64-BIT
DEBUG
NEO 10S
1.2V/900MHZ
992
13
051-6482
ALIAS
IN
IN IN
IN
LM339A
V+
GND
IN
LM339A
V+
GND
IN
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
FET SWITCH
PP1V5_RUN
PP1V25_RAM_VTT
LINEAR
(TURN_ON_VTT)
(PWR_GOOD_PP2V5)
(PWR_GOOD_SB_CORE)
POWER SEQUENCE PIN
SYS_POWERUP_L
SWITCHER
PAGE 11
PP2V5_RUN_CPU_AVDD
SMU
SWITCHER
PP3V3_ALL
SWITCHER
2.62V
PULSAR CORE
1.6/1.4V
PP5V_PWRON FET SWITCH
SWITCHER
FET SWITCH
PP1V2_PWRON
PWRON_DISK_SB
SYS_POWERUP_L
PAGE 10
PWRON_SD
PAGE 10
PP1V2_RUN FET SWITCH
HT BUS API BUS
1.2V
PAGE 10
SHASTA CORE
IRU3037ACS
PP1V2_SHASTA_CORE
5V
POWER SW
AGP BUS
4.5V
5V
PAGE 99
PAGE 99
PP5V_RUN_AUDIO
PP4V5_RUN_AUDIO
1.25V
PAGE 46
LINEAR
AUDIO CODEC
LINEAR
HP/LINEOUT AMP
0.8~1.2V
PAGE 33
SC1211*4
SC2643VX*1
SWITCHER
CPU CORE
PAGE 9
GPUL
2.5V
J700 PAGE 7
FW CONN 20" LCD INVERTER
PP24V_RUN
PP12V_RUN
PP5V_RUN
LINEAR
PAGE 31
POWER CONNECTOR
HDD & OPTICAL
PP2V5_RUN
RAM VTT
PAGE 50
GRAPHIC FB
RAM TERM
PP2V5_PWRON
PAGE 9
IRU3037CS
DDR DIMM
SHASTA HT
CPU AVDD
5V
USB CONN UDASH MODEM
PAGE 50
1.5V
1.5V
PAGE 22
IRU3037CS
U3LITE CORE
U3LITE CORE
PP1V5_PWRON
LINEAR
PAGE 11
3.3V
PAGE 11
3.3V
FET SWITCH
PP3V3_PWRON
LINEAR
USB2 HOST MODEM & BT
ENET PHY
SMU
FW PHY
PAGE 50
GPU CORE
IRU3037CS
NV18B/NV34
PP5V_ALL
PCI BUS
PP3V3_RUN
AUDIO CODEC
POWER BLOCK DIAGRAM
20" PANEL POWER
402
CERM
16V
20%
0.01UF
PP2V5_PWRON
402
MF
1/16W
5%
150K
100K
5% 1/16W MF 402
5% 1/16W MF
10K
402
5% 1/16W MF
10K
402
PP5V_ALL
PP3V3_ALL
SOI
PP3V3_ALL
SOI
402
MF
1/16W
5%
100K
0.01UF
20% 16V CERM 402
402
MF
1/16W
5%
100K
3
99
13
051-6482
PWR_GOOD_PP2V5
TURN_ON_VTT
PWR_GOOD_SB_CORE
SMU_PWRSEQ_P1_2
SMU_PWRSEQ_P9_6
SMU_PWRSEQ_P9_5
SMU_PWRSEQ_P1_1
SMU_PWRSEQ_P1_0
TURN_ON_SHASTA_CORE_L
TURN_ON_PP1V2_L
COMPARE_SB_CORE
PP1V2_PWRON_SB_VCORE
RAIL_CTL_NEG
PS_2V_REF
COMPARE_PP2V5
CPU_AVDD_EN
PP5V_RUN_CPU
U1100
12
8
9
14
3
U1100
12
6
7
1
3
R330
1 2
C330
1
2
R340
1 2
C340
1
2
R342
1
2
R343
1
2
R341
1
2
R331
1
2
46
13
13
13
13
13 10
10 10
23 10
6
11
31
36 31 30
7 6
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
CHECKIN 12005
CHECKIN 12004
NO_TEST, FUNC_TEST UPDATES
11/17/03
CHANGED J8303 TO 5 PIN CONNECTOR CHANGED MICRODASH MODEM HEIGHT AND CHANGED TO DEVELOPMENT BOM OPTION
MIN_LINE_WIDTH AND MIN_NECK_WIDTH UPDATES THROUGHOUT
RELEASE REV 12
ADDED NET_SPACING_TYPE=PROC_DIFF TO DIFF PAIRS THAT DIDN’T HAVE IT
MOVED SERIES TERM FOR PULSAR CLOCKS TO LOGIC ANALYZER PAGE
ADDED 6 OUTPUT CAPS (124-0322) TO CPU VCORE VREG MASTER PAGE SYNC
CHECKIN 11001
RELEASE REV 11
NO_TEST UPDATES
UPDATED POWER SEQUENCING TO MATCH SMU PINOUT 1.4
ADDED SERIAL SIGNALS TO AIRPORT CARD FOR NEW MARTY CARD
CHANGED SHASTA P/N TO V1.1
11/11/03
11/10/03
NEW CONNECTORS FOR MODEM AND PATA
MASTER PAGE SYNC
CHANGED PULSAR SERIES TERM R2707, R2719, R2701, R2761, R2779 TO 0 OHM
ADDED EMI-SPRING AND TIED TO GND_CHASSIS_MODEM
CHECKIN 10001
REPLACED POWER CONNECTOR
NEW AIRPORT CONNECTOR
ADDED GAP FILLER
MASTER PAGE SYNC
MASTER PAGE SYNC
J8301 PATA CONNECTOR ROTATED 180 DEGREES
CHANGED PULSAR 2.2UF CAPS TO 10%
CHANGED Q1001 TO NTD60N02R
11/04/03
MAIN PROTO RELEASE (REV 10)
CHECKIN 09002
TERMINATION FOR CPU CLOCK NOW TRACKS PP1V2_EI_CPU RAIL
ADDED 5 PULLDOWNS FOR CPU VID SIGNALS UNCONNECTED THERMAL PAD FOR U9600 HEADPHONE AMP
ADDED 4 SMT NUTS
REPINNED J9240 BLUETOOTH CONNECTOR
BOM CHANGES FOR R2910, R5727, R9139, R9810
11/03/03
CHECKIN 09001
10/15/03
TERMINATION FOR NB CLOCK NOW TRACKS PP1V2_EI_NB RAIL
10/14/03
REVISION HISTORY
DATE
TERMINATION FOR VSP CLOCK NOW TRACKS PP1V2_HT RAIL
10/13/03
CHANGED ALL 4 NB AVDDS TO PP1V5_PWRON_NB_AVDD RAIL
DESCRIPTION
FIREWIRE NET NAME CHANGES TO MATCH NAMING CONVENTION
CHANGED PART NUMBER OF NV18B
MANY MIN_NECK_WIDTH UPDATES DC-DC UPDATES ON PAGES 9,10,22,33,34,50
UPDATED CRYSTAL CONSTRAINTS
U3600 PIN 6 TO PP5V_RUN
NO STUFFED R1303 BECAUSE WHITE LED IS ACTIVE HIGH
CHANGED ZH700 AND ZH701 TO HOL-315R138
LED3002, LED3600, AND LED800 CHANGED TO D3002, D3610, AND D810 P/N 378S0042
11/13/03
ADDED NET_SPACING_TYPE=PROC_DIFF TO TDIODE_POS, TDIODE_NEG, KPVDD2, AND KPGND2
ADDED LEDS FOR 5V ALL RAIL AND PANEL POWER
CHANGED U3LITE P/N TO V1.1
PULSAR SERIES TERM - CHANGED R2705,R2711,R2702 TO 0 OHM. R2770 -> 20 OHM
CHANGED CRYSTAL Y5700 TO 197S0026
CHANGED 20" INVERTER TO 518-0141
PLL-LOCK LED CHANGED TO GREEN
DC/DC NET NAME FIXES ON PAGES 9,10,22
CHECKIN 11002 - EVT DESIGN REVIEW
11/14/03
PIN SWAPPED L5908 FOR ROUTING
CHANGED 20" INVERTER DECOUPLING TO TWO 1UF 1210 CAPS
ADDED ECSET FOR PLS_EXTCLK NET. DROPPED PROP DELAY FROM OTHER CRYSTALS
R2742 CHANGED TO 806 OHM
11/15/03
CPU POWER SUPPLY FETS - VISHAY USED ON SAMSUNG BOMS AND ON SEMI ON HYNIX BOMS
INPUT AND OUTPUT CERM CAPS MARKED AS CRITICAL
CHANGED INPUT CAPS TO 124-0323
BOMOPTIONS AND SCHEMATIC CLEANUP TO AGP (BUSY, STOP, TYPEDET, GCDET)
ADDED MORE POWER AND GROUND SHORTS FOR AUDIO
MASTER PAGE SYNC
ALIASED PP5V_AUDIO TO PP5V_RUN RAIL
NEW LARGER CAP FOR VTT VREG. C4609 CHANGED TO 128S0022. C4608 NOSTUFFED
ADDED CIRCUIT SO 5V RAIL TO 17" INVERTER COMES UP AFTER 12V
CHANGED MODEM STANDOFFS TO 862-0035 AND ADDED ELECTRICAL CONNECTIONS ADDED TWO MORE SMT NUTS FOR CPU HEATSINK CHANGED LED700,701,702,5900,8301,8700,8701,8702 AND D3001 TO 378S0045
CHECKIN 12001
CHANGED DS870X TO LED870X TO FOLLOW CONVENTION
CHANGED PCI_CLK33M_SB_EXT NET NAME ON PAGE 27 FOR REUSE. ALIAS ADDED ON PAGE 8
MASTER PAGE SYNC
11/17/03
CHECKIN 12003
11/18/03
STUFFED TMDS INDUCTORS AND NOSTUFFED 0 OHM RESISTORS
CHANGED CRYSTAL FILTERING FOR PULSAR
ADDED CAPS TO GROUND FOR CPU HEATSINK SMT NUTS
CHASSIS MODEM NO LONGER TIES TO REST OF CHASSIS
MOVED RAM_CKE SIGNALS TO 62 OHM VTT PARALLEL TERM WITH 4.7K PULL-DOWN ADDED POWER SEQUENCING FOR VTT VREG
MASTER PAGE SYNC
MASTER PAGE SYNC
CHECKIN 12002
SWAPPED EI_CPU_TO_NB_AD17 WITH EI_CPU_TO_NB_AD24 ON J1400
10/08/03
POWER BUTTON CONNECTOR SYMBOL UPDATED
CHANGED XW3302 TO LAYER 6 SHORT
STUFFING CHANGES FOR ETHERNET RESET
UPDATED CRITICAL LIST CHANGE Y5700 TO 4 PIN CRYSTAL
11/20/03
CHANGED R2700 TO 22OHM AND NOSTUFFED CPU VID SET TO 1.475V J1400 CHANGED TO NOSTUFF
11/19/03
CHANGED HALF OF DIMM AND VTT DECOUPLING TO 1UF
PROTO RELEASE (REV 09)
EVT1 RELEASE (REV 13)
994
13
051-6482
IN
IN
IN
IN
IN
IN
IN
IN IN IN IN IN IN IN IN
IN
IN
IN
IN
IN
IN IN
IN
IN
IN
IN
IN
IN IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN IN
IN
IN
IN
IN IN IN
IN
IN
IN
IN
IN
IN IN
IN
IN
IN
IN
IN
IN IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN IN IN
IN
IN
IN
IN IN
IN
IN
IN
IN
IN
IN IN
IN
IN
IN
IN
IN IN
IN
IN
IN
IN
IN
IN IN IN IN
IN IN
IN
IN IN
IN
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
5 TEST POINTS
5 TEST POINTS
5 TEST POINTS
5 TEST POINTS
12 TEST POINTS
5 TEST POINTS
5 TEST POINTS
10 TEST POINTS
2 TEST POINTS 2 TEST POINTS
2 TEST POINTS
2 TEST POINTS 2 TEST POINTS
FUNC TEST
I10 I295 I296 I297 I298
I299
I3
I300
I302
I307 I311 I314 I315 I316 I317
I319
I320
I321
I322 I323
I336 I337 I338
I339
I340
I341
I342 I343
I344 I345 I346 I347 I348
I349
I350
I352 I354 I355 I356 I357 I358
I359
I360
I361
I362 I363
I364 I365
I371
I372 I373
I374 I375 I376 I377 I378
I379
I380
I381
I382 I383
I384 I385 I386
I387
I388
I389
I390
I391
I392
I393
I394
I395
I396
I397
I398
I399
I4
I400
I401
I402
I403
I404 I405 I406
I407
I408
I426
I428
I429
I430
I431
I432
I433
I434
I435
I436
I437
I438
I439
I440 I441 I442
I443
I444
I445 I446
PP5V_ALL
I5
PP12V_RUN
PP5V_RUN
I6
PP3V3_PWRON
PP5V_PWRON
PP2V5_RUN
PP1V5_RUN
PP1V2_PWRON
PP3V3_RUN
I7
PP24V_RUN
I781
I8 I9
051-6482
99
6
13
FUNC_TEST=TRUE
PP5V_ALL
FUNC_TEST=TRUE
PP12V_RUN
FUNC_TEST=TRUE
PP5V_RUN
GND
FUNC_TEST=TRUE
FUNC_TEST=TRUE
PP3V3_PWRON
FUNC_TEST=TRUE
PP5V_PWRON
FUNC_TEST=TRUE
PP2V5_RUN
FUNC_TEST=TRUE
PP1V5_RUN
FUNC_TEST=TRUE
PP1V2_PWRON
FUNC_TEST=TRUE
PP3V3_RUN
FUNC_TEST=TRUE
PP24V_RUN
FUNC_TEST=TRUE
GND_CHASSIS_TMDS
FUNC_TEST=TRUE
TD0M
FUNC_TEST=TRUE
ANALOG_HSYNC_L
FUNC_TEST=TRUE
ANALOG_VSYNC_L
FUNC_TEST=TRUE
FILT_ANALOG_BLU
FUNC_TEST=TRUE
FILT_ANALOG_RED
FUNC_TEST=TRUE
FILT_ANALOG_GRN
FUNC_TEST=TRUE
INV_20_LCD_PWM_
FUNC_TEST=TRUE
PP24V_INV
FUNC_TEST=TRUE
GND_20_INV
FUNC_TEST=TRUE
MON_DETECT
FUNC_TEST=TRUE
DDC_VCC_5
FUNC_TEST=TRUE
VGA_IIC_DAT
FUNC_TEST=TRUE
INV_17_LCD_PWM_F
FUNC_TEST=TRUE
LAMP_STS_F
FUNC_TEST=TRUE
PP5V_AGP_RL
FUNC_TEST=TRUE
PP12V_INV
FUNC_TEST=TRUE
GND_17_INV
FUNC_TEST=TRUE
INV_20_CUR_HI_F
FUNC_TEST=TRUE
CORE_ISNS_P
FUNC_TEST=TRUE
TDIODE_NEG_FMAX
FUNC_TEST=TRUE
CORE_ISNS_M
FUNC_TEST=TRUE
TDIODE_POS_FMAX
FUNC_TEST=TRUE
KPVDD2_FMAX
FUNC_TEST=TRUE
KPGND2_FMAX
TP_BUF_RST
NO_TEST=TRUE
TP_FRWRLPS
NO_TEST=YES
NO_TEST=YES
TP_DFPCLK_L
NO_TEST=TRUE
TP_DFPD0
NO_TEST=TRUE
TP_PSYNCOUT
TP_USB2_PWREN<4>
NO_TEST=TRUE
TP_PSRO1
NO_TEST=TRUE NO_TEST=TRUE
TP_PSRO2
TP_EXT_TMDS_D1M
NO_TEST=YES
TP_EXT_TMDS_D2P
NO_TEST=YES
TP_EXT_TMDS_D1P
NO_TEST=YES
TP_EXT_TMDS_D0P
NO_TEST=YES
TP_EXT_TMDS_D0M
NO_TEST=YES
TP_EXT_TMDS_CKP
NO_TEST=TRUE
TP_EXT_TMDS_CKM
NO_TEST=YES
TP_DFPD3
NO_TEST=YES
TP_DFPD2
NO_TEST=TRUE
TP_VIPHCLK
NO_TEST=TRUE
TP_PROC_TRIGGER_OUT
NO_TEST=TRUE
NO_TEST=TRUE
TP_DFPD1
NO_TEST=YES
TP_DFPCLK
NO_TEST=TRUE
TP_USB2_PWREN<3>
NO_TEST=TRUE
TP_USB2_PWREN<2>
FUNC_TEST=TRUE
I2C_UDASH_SCL
FUNC_TEST=TRUE
I2S1_RESET_L
FUNC_TEST=TRUE
I2S1_SB_TO_DEV_DTO
FUNC_TEST=TRUE
I2S1_DEV_TO_SB_DTI
FUNC_TEST=TRUE
PCI_SLOTA_INT_L
FUNC_TEST=TRUE
FUNC_TEST=TRUE
UDASH_RESET_L
FUNC_TEST=TRUE
TD1M
FUNC_TEST=TRUE
TD0P
FUNC_TEST=TRUE
PPVCC_TMDS
FUNC_TEST=TRUE
PP3V3_ALL_SMU
FUNC_TEST=TRUE
PPVCORE_NB
FUNC_TEST=TRUE
ANALOG_GRN
FUNC_TEST=TRUE
FUNC_TEST=TRUE
UATA_DA<2..0>
FUNC_TEST=TRUE
UATA_CS0_L
FUNC_TEST=TRUE
UATA_RESET_L
FUNC_TEST=TRUE
UATA_CS1_L
FUNC_TEST=TRUE
UATA_DSTROBE_R
FUNC_TEST=TRUE
UATA_STOPUATA_STOP
FUNC_TEST=TRUE
UATA_HSTROBE
FUNC_TEST=TRUE
UATA_DMACK_L
FUNC_TEST=TRUE
UATA_DMARQ_R
FUNC_TEST=TRUE
UATA_IOCS16_PU
FUNC_TEST=TRUE
PP5V_DISK
FUNC_TEST=TRUE
PP12V_DISK
FUNC_TEST=TRUE
CPU_VID_R<5..0>
FUNC_TEST=TRUE
INV_17_CUR_HI_F
FUNC_TEST=TRUE
UATA_INTRQ_R
FUNC_TEST=TRUE
TCKP
FUNC_TEST=TRUE
UATA_CSEL_PD
FUNC_TEST=TRUE
TD1P
FUNC_TEST=TRUE
SYS_POWERFAIL_L
FUNC_TEST=TRUE
PCI_TRDY_L
FUNC_TEST=TRUE
PCI_SLOTA_IDSEL
FUNC_TEST=TRUE
PCI_IRDY_L
FUNC_TEST=TRUE
PCI_STOP_L
FUNC_TEST=TRUE
PCI_DEVSEL_L
FUNC_TEST=TRUE
PCI_PAR
NO_TEST=YES
TP_TMDS_TXD3M
TP_AGP_MB_AGP8X_DET_L
NO_TEST=TRUE
FUNC_TEST=TRUE
USB_BT_P
TP_ATTENTION
NO_TEST=TRUE
NO_TEST=TRUE
TP_GPU_INTB_L
TP_EXT_TMDS_D2M
NO_TEST=YES
TP_DFPD6
NO_TEST=YES
TP_DFPD5
NO_TEST=TRUE
NO_TEST=TRUE
TP_IFP1VREF
NO_TEST=TRUE
TP_NVAGP_TDO
NO_TEST=YES
TP_TMDS_TXD7P
TP_ENET_CLK125M_GTX
NO_TEST=TRUE NO_TEST=TRUE
TP_ENET_TXD<7>
NO_TEST=TRUE
TP_AFN
NO_TEST=TRUE
NO_TEST=TRUE
TP_ENET_TXD<5>
NO_TEST=TRUE
TP_ENET_TXD<4>
TP_NEC_NANDTEST
NO_TEST=TRUE
NO_TEST=TRUE
TP_NEC_AMC
NO_TEST=TRUE
TP_NEC_NTEST1
TP_NEC_SMI_L
NO_TEST=TRUE
NO_TEST=TRUE
TP_NEC_SMC
NO_TEST=TRUE
TP_NEC_SRDATA
NO_TEST=TRUE
TP_NEC_SRCLK
NO_TEST=TRUE
TP_NEC_SRMOD
NO_TEST=TRUE
TP_NEC_TEST
NO_TEST=TRUE
TP_NEC_TEB
NO_TEST=TRUE
TP_PLS_CLK_66M_0
NO_TEST=TRUE
TP_PLS_CLK_66M_1
FUNC_TEST=TRUE
FUNC_TEST=TRUE
ROM_CS_L
FUNC_TEST=TRUE
PCI_RESET_L
FUNC_TEST=TRUE
AIRPORT_CLKRUN_L_PD
FUNC_TEST=TRUE
ROM_WE_L
FUNC_TEST=TRUE
ROM_OE_L
FUNC_TEST=TRUE
PCI_FRAME_L
FUNC_TEST=TRUE
PCI_SLOTA_GNT_L
FUNC_TEST=TRUE
PCI_SLOTA_REQ_L
FUNC_TEST=TRUE
PCI_CLK33M_AIRPORT
FUNC_TEST=TRUE
FW_VGND
FUNC_TEST=TRUE
FW_TPI2N
FUNC_TEST=TRUE
FW_TPI2P
FUNC_TEST=TRUE
FW_TPO2P
FUNC_TEST=TRUE
FW_VP_PORT2
FUNC_TEST=TRUE
FW_TPI1N
FUNC_TEST=TRUE
FW_TPI1P
FUNC_TEST=TRUE
FW_TPO1P
FUNC_TEST=TRUE
UDASH_SDOWN
FUNC_TEST=TRUE
USB_BT_N
FUNC_TEST=TRUE
I2S1_SYNC
FUNC_TEST=TRUE
VGA_IIC_CLK
FUNC_TEST=TRUE
TMDS_DDC_CLK
FUNC_TEST=TRUE
TMDS_DDC_DAT
FUNC_TEST=TRUE
TCKM
FUNC_TEST=TRUE
TD2M
FUNC_TEST=TRUE
USB_UDASH_N
FUNC_TEST=TRUE
FUNC_TEST=TRUE
USB2_PORT2_N_F
FUNC_TEST=TRUE
PP3V3_DDC
FUNC_TEST=TRUE
UDASH_I2C_A1_PU
TP_PLS_REF_CML
NO_TEST=TRUE
TP_PLS_TEST1
NO_TEST=TRUE
TP_PLS_TEST2
NO_TEST=TRUE
TP_PLS_TEST3
NO_TEST=TRUE
TP_SB_FSTEST
NO_TEST=TRUE
TP_SB_PLLTEST
NO_TEST=TRUE
TP_VREF_CG
NO_TEST=TRUE
TP_SB_NC_P7
NO_TEST=TRUE
TP_SB_NC_P8
NO_TEST=TRUE
TP_SB_NC_R3
NO_TEST=TRUE
TP_SB_NC_R4
NO_TEST=TRUE NO_TEST=TRUE
TP_SB_NC_R5
NO_TEST=TRUE
TP_SB_NC_R6 TP_SB_NC_R7
NO_TEST=TRUE NO_TEST=TRUE
TP_SB_NC_R8 TP_SB_NC_T1
NO_TEST=TRUE
TP_SB_NC_T2
NO_TEST=TRUE NO_TEST=TRUE
TP_SB_NC_T3
NO_TEST=TRUE
TP_SB_NC_T5
NO_TEST=TRUE
TP_SB_NC_T4
TP_SB_NC_T6
NO_TEST=TRUE NO_TEST=TRUE
TP_SB_NC_T7 TP_SB_NC_T8
NO_TEST=TRUE
TP_SB_NC_U2
NO_TEST=TRUE
TP_SB_NC_U1
NO_TEST=TRUE
TP_SB_NC_U3
NO_TEST=TRUE
TP_SB_NC_U4
NO_TEST=TRUE NO_TEST=TRUE
TP_SB_NC_U5
NO_TEST=TRUE
TP_SB_NC_U6
NO_TEST=TRUE
TP_SB_NC_V1 TP_SB_NC_V2
NO_TEST=TRUE
TP_SB_NC_V4
NO_TEST=TRUE
TP_SB_NC_V3
NO_TEST=TRUE
TP_SB_NC_W1
NO_TEST=TRUE
TP_SB_NC_W3
NO_TEST=TRUE
TP_SB_NC_Y1
NO_TEST=TRUE
FUNC_TEST=TRUE
TDIODE_NEG
FUNC_TEST=TRUE
TP_AIRPORT_RF_DISABLE
FUNC_TEST=TRUE
TP_AIRPORT_PME_L
NO_TEST=TRUE
TP_SB_NC_Y3
NO_TEST=TRUE
TP_SATA_CLK25M TP_ENET_TCK
NO_TEST=TRUE
TP_USB2_PWREN<1>
NO_TEST=TRUE
TP_USB2_PWREN<0>
NO_TEST=TRUE
TP_DUMMY_A
NO_TEST=TRUE NO_TEST=TRUE
TP_DUMMY_B
NO_TEST=TRUE
TP_RAM_CKE_R<2>
NO_TEST=TRUE
TP_RAM_CKE_R<7>
TP_RAM_CKE_R<3>
NO_TEST=TRUE NO_TEST=TRUE
TP_RAM_CKE_R<6>
NO_TEST=TRUE
TP_RAM_MUXEN0
NO_TEST=TRUE
TP_RAM_CS_L_R<3>
NO_TEST=TRUE
TP_RAM_CS_L_R<2>
NO_TEST=TRUE
NO_TEST=TRUE
TP_RAM_MUXEN4
NO_TEST=TRUE
TP_NB_PM_SLEEP0
NO_TEST=TRUE
TP_J4000_SJRESET_L
NO_TEST=TRUE
FUNC_TEST=TRUE
FW_TPO1N
FUNC_TEST=TRUE
AUDIO_LO_DET_L
FUNC_TEST=TRUE
I2C_UDASH_SDA
FUNC_TEST=TRUE
USB2_PORT2_P_F
FUNC_TEST=TRUE
USB2_PORT1_P_F
FUNC_TEST=TRUE
USB2_PORT1_N_F
FUNC_TEST=TRUE
FW_TPO2N
FUNC_TEST=TRUE
FW_VP_PORT1
FUNC_TEST=TRUE
PCI_CBE_L<3..0>
FUNC_TEST=TRUE
PCI_AD<31..0>
FUNC_TEST=TRUE
VCORE_SENSE_GND
FUNC_TEST=TRUE
PP5V_RUN_CPU
FUNC_TEST=TRUE
PPVCORE_CPU
FUNC_TEST=TRUE
SMU_MANUAL_RESET_L
FUNC_TEST=TRUE
RESET_BUTTON_L
FUNC_TEST=TRUE
SMU_RESET_L
FUNC_TEST=TRUE
PP1V2_PWRON_SB_VCORE
FUNC_TEST=TRUE
ANALOG_BLU
FUNC_TEST=TRUE
POWER_BUTTON_L
FUNC_TEST=TRUE
PP12V_CPU
FUNC_TEST=TRUE
USB2_PORT3_P_F
FUNC_TEST=TRUE
USB2_PORT3_N_F
NO_TEST=TRUE
TP_TMDS_TXD7M
NO_TEST=YES
TP_TMDS_TXD3P
NO_TEST=TRUE
TP_GPU_THERMC
NO_TEST=TRUE
TP_GPU_THERMA
NO_TEST=TRUE
TP_FBBCS1_L
FUNC_TEST=TRUE
TD2P
FUNC_TEST=TRUE
USB_UDASH_P
FUNC_TEST=TRUE
MODEM_RING2SYS_L
FUNC_TEST=TRUE
I2S1_MCLK
TP_J4001_SJRESET_L
NO_TEST=TRUE
TP_CMP_SPARE
NO_TEST=TRUE NO_TEST=TRUE
TP_ENET_TXD<6> U2100_UNUSED
NO_TEST=TRUE
FUNC_TEST=TRUE
ROM_ONBOARD_CS_L
FUNC_TEST=TRUE
UATA_DD<15..0>
FUNC_TEST=TRUE
ROM_WP_L
FUNC_TEST=TRUE
SYS_POWERUP_L
FUNC_TEST=TRUE
SYS_POWER_BUTTON_L
FUNC_TEST=TRUE
VCORE_SENSE_VOUT
FUNC_TEST=TRUE
SYS_SLEEP
FUNC_TEST=TRUE
EXT_POWER_BUTTON_L
FUNC_TEST=TRUE
U900_FEEDBACK
FUNC_TEST=TRUE
U2200_FEEDBACK
FUNC_TEST=TRUE
ANALOG_RED
FUNC_TEST=TRUE
I2S1_BITCLK
11
7
11
27 18 11
18 11
11
59
7
59
59 57 56
59 57 56
59
59
59
59
59
59
59 58
59
59
59
59
59
59
59
59
36 33
36
36 33
36
36
36
57
58
58
58
29
92
29
29
58
58
58
58
58
58
58
58
58
57
29 14
58
58
92
92
94 18
94 25
94 76 25
94 76 25
76 25
92
94 25
59
59
59
22
7
59 57
83 80
83 80
83 80
83 80
83
83 80
6
83 80
6
83 80
83 80
83
83
83
7
83
7
33
8
59
83
59
83
59
13
8
77 76 74
76
77 76 74
77 76 74
77 76 74
77 76 74
58
48
92
29
49
58
58
58
58
49
58
87
87
29
90
87
87
77
77
77
77
77
77
77
77
77
77
27
27
92
76 75 74
77 76 75 74 51 49
76
76 75 74
76 75 74
77 76 74
76 74
76 74
8
90
90
90
90
90
90
90
90
94 25
92
94 25
59
59
59
59
59
94
92
92
59
94 27
27
27
27
25
25
48
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
91
36 31
76
76
91
27
87
92
92
24
24
37
37
37
37
37
37
37
37
37
37
24
40
90
98 25
94 18
92
92
92
90
90
77 76 74
77 76 75 74
33
36 31 30
7 3
36 35 34 33 32 31 29
7
13
8 7
7
13
8
23 10
3
59 57
7
34 33
92
92
58
58
58
58
52
59
94
94 25
94 25
40
36
87
21
76 75
83 80
75
33 13 11 10
7
13
7
33
50 46 27 11 10
9 8
13
9
22
59 57
94 25
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
125
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
IN
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
SILKSCREEN:2
GND RAILS
SILKSCREEN:1
PIN 13,19,11,22 ARE DIFFERENCE FROM ATX .
RESET
SMU RESET
CHASSIS GND
ALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE)
ALWAYS ON (TRICKLE)
ONLY ON IN RUN
RUN RAILS
POWER CONN / ALIAS
ON IN RUN AND SLEEP
POWER
P/N 518-0137
SILKSCREEN:POWER
ALL RAILS
PWRON RAILS
SILKSCREEN:RUN
RTC BATTERY
PP3V3_RUN
PP5V_RUN
PP3V3_PWRON
PP1V5_PWRON
PP2V5_PWRON
PP3V3_RUN
PP1V2_PWRON
PP24V_RUN
PP5V_ALL
PP5V_ALL
PP3V3_RUN
PP2V5_PWRON
PP2V5_RUN
PP5V_PWRON
PP1V5_RUN
PP1V5_PWRON
PP5V_RUN
PP3V3_RUN
PP5V_RUN
PP12V_RUN
SM
SM
PP12V_RUN
315R138
SM
SM
0.1UF
20% 10V CERM 402
0.1UF
20% 10V CERM 402
PP12V_RUN
PP3V3_ALL
5% 1/16W
402
10K
MF
SPST
DEVELOPMENT
SM
1/16W
MF
402
1K
5%
SPST
DEVELOPMENT
SM
5%
402
1K
1/16W
MF
SPST
SM
PP24V_RUN
EMI-SPRING
SC57
315R138
160R138
6.00MM-PTH
225R125
1/16W
MF
402
5%
1K
SHLD-IO-CONN
Q45-TH
MBR0530
SM
805
FF
1/10W
5%
0
805
FF
1/10W
5%
0
805
FF
1/10W
5%
0 0
5% 1/10W FF 805
NOSTUFF
0
5%
1/10W
FF
805
NOSTUFF
805
FF
1/10W
5%
0
PP1V2_RUN
TSSOP
74LCX125
CRITICAL
402
CERM
10V
20%
0.1UF
SYS_PWR_BTN_FILT
FERR-EMI-100-OHM
SM
SM
FERR-EMI-100-OHM
DEVELOPMENT
GREEN
2.0X1.25
GREEN
2.0X1.25
PP3V3_PWRON
1/16W
5% MF
330
603
GREEN
2.0X1.25
43215-0012
F-RT-TH
CRITICAL
SM
SM
SM
SM
PWR-BUTT
ST-SM
PP12V_RUN
PP5V_RUN
PP3V3_RUN
MF
5%
1/16W
330
603
CERM 402
10V
20%
0.1UF
1/16W
5% MF
DEVELOPMENT
330
603
PP5V_ALL
NOSTUFF
2512
FF
1W
5%
0
CRITICAL
BB10209-A5
TH
051-6482
997
13
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=10MIL
VOLTAGE=0V
MIN_NECK_WIDTH=8MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=3.3V
VOLTAGE=5V MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
MAKE_BASE=TRUE
MIN_LINE_WIDTH=25MIL
VOLTAGE=3.3V MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE
MIN_NECK_WIDTH=10MIL MAKE_BASE=TRUE
VOLTAGE=1.5V MIN_LINE_WIDTH=25MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=3.3V
MAKE_BASE=TRUE
MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE
VOLTAGE=1.2V
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
MAKE_BASE=TRUE
MAKE_BASE=TRUE
VOLTAGE=2.5V MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
MAKE_BASE=TRUE VOLTAGE=2.5V
MAKE_BASE=TRUE
MIN_NECK_WIDTH=10MIL
VOLTAGE=5V MIN_LINE_WIDTH=25MIL
VOLTAGE=1.5V MAKE_BASE=TRUE MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
VOLTAGE=12V
MAKE_BASE=TRUE
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
VOLTAGE=24V
MAKE_BASE=TRUE
VOLTAGE=1.2V MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL MAKE_BASE=TRUE
MIN_NECK_WIDTH=10MIL
VOLTAGE=12V
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL MAKE_BASE=TRUE
VOLTAGE=5V
MIN_NECK_WIDTH=8MIL MAKE_BASE=TRUE
MIN_LINE_WIDTH=25MIL
VOLTAGE=3.3V
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=5V
PP5V_ALL
PP24V_GRAPHICS
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=15MIL
GND_CHASSIS_AUDIO_EXTERNAL
VOLTAGE=0
MAKE_BASE=TRUE
GND_CHASSIS_VGA
PP12V_AUDIO_CODEC
PP12V_AUDIO_SPKRAMP
PP5V_AUDIO
PP5V_RUN_CPU
PP5V_AGP
GND_AUDIO
PP12V_DISK
PP12V_AGP
ITS_PLUGGED_IN
ITS_RUNNING
PP3V3_ALL
_PP2V5_PWRON_SB
_PP3V3_PWRON_SB
GND_CHASSIS_LED
PPVCORE_PWRON_PULSAR
PP1V5_PWRON_NB_AVDD
GND_CHASSIS_TMDS
VOLTAGE=0
MIN_NECK_WIDTH=15MIL MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=3.3V
_PP3V3_ALL_RTC PP3V3_ALL_BATT_SAFETY
VOLTAGE=3.3V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
PP3V3_ALL_BATT VOLTAGE=3.3V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
PPVCORE_CPU
PPVCORE_NB
PP1V2_HT PP1V2_PULSAR
PPVCORE_PULSAR
PP1V5_AGP
_PP3V3_PCI
_PPVIO_PCI_USB2
_PP3V3_SB_PCI
PP3V3_AUDIO
PP3V3_RUN_CPU
PP3V3_AGP
PP3V3_PWRON_CPU
PP5V_PWRON_CPU
_PP3V3_PWRON_MODEM
_PP5V_PWRON_USB
_PP3V3_PWRON_BT
_PP3V3_PWRON_UDASH
PP3V3_PWRON_ENET
_PP3V3_PWRON_USB
_PP1V2_PWRON_SB
_PP1V2_PWRON_DISK_SB
_PP1V2_PWRON_HT
_PP2V5_PWRON_HT
PP2V5_HT
PP2V5_PWRON_RAM
_PP3V3_ALL_SMU
PP3V3_FW
PP24V_FW
PP5V_PATA
PP5V_DISK
PP2V5_GPU
PP2V5_RUN_CPU
PP2V5_RUN_RAM
PP2V5_RAM
VOLTAGE=1.2V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
PP1V2_EI_NB
PP1V2_EI_CPU
VOLTAGE=1.2V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
SMU_MANUAL_RESET_L
POWER_BUTTON_L
SYS_POWER_BUTTON_L
SYS_RESET_BUTTON_L
SYS_POWERUP_L
GND_CHASSIS_17_INCH_INVERTER
VOLTAGE=0
MIN_NECK_WIDTH=20MIL MIN_LINE_WIDTH=20MIL
GND_CHASSIS_20_INCH_INVERTER
VOLTAGE=0
MIN_NECK_WIDTH=20MIL MIN_LINE_WIDTH=20MIL
GND_CHASSIS_AUDIO_INTERNAL
MAKE_BASE=TRUE
SYS_POWER_BUTTON_L
VOLTAGE=3.3V MIN_LINE_WIDTH=25MIL
MAKE_BASE=TRUE
PP3V3_ALL
MIN_NECK_WIDTH=10MIL
GND_CHASSIS_USB GND_CHASSIS_FIREWIRE
PP12V_RUN_CPU
PP3V3_PATA
PP3V3_DISK
RESET_BUTTON_L
ITS_ALIVE
GND_SYS_PWR_BTN_FILT
POWER_GOOD
GND_CHASSIS_RJ45
VOLTAGE=0
MIN_NECK_WIDTH=15MIL MIN_LINE_WIDTH=25MIL
R710
1 2
C703
1
2
R701
1 2
R707
1 2
J702
21
XW700
1 2
XW701
1 2
ZH700
1
XW702
1 2
XW703
1 2
C704
1
2
C705
1
2
R714
1
2
SW702
1 2
3 4
R713
1 2
SW701
1 2
3 4
R712
1 2
SW700
1 2
3 4
EMI700
1
ZH701
1
ZH702
1
ZH703
1
ZH704
1
R702
1 2
SH700
1
2 3
4
DS700
12
R703
1 2
R704
1 2
R705
1
2
R706
1
2
R708
1
2
R709
1
2
U700
2
7 1
14
3
C700
1
2
L700
1 2
L701
1 2
LED701
1
2
LED702
1
2
R700
1 2
LED700
1
2
J700
1
10 11
12 13 14 15 16 17 18 19
2
20 21 22
3 4 5 6 7 8 9
XW704
1 2
XW705
1 2
XW706
1 2
XW707
1 2
SW703
3
1
2
11
6
59
98
59
99
97
98
36 31 30
6 3
59 50 49
99 97
99
83
6
59 50
11
7
88 74 25 23
25 23
21
26
60 48 37 28
59
6
13
36 35 34 33 32 31 29
6
22
6
60 24
26
26
49 48
77 76 75 74 25
77
74
99 98 97 95
33
59 58 57 56 52 51 50 49 48
36
36
94
92
94
92
94
87
91
25
80
62
62
64 60
40
13
8
90
90
23
23
83
83
6
55 54 52
31
46 45 44
37 26
28 18 35 31 30 29 18
13
8 6
6
13
7 6
13
33 13 11 10
6
59
59
98
13
7 6
11
7
92
90
33
83
83
6
8
87
ALIAS ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
125
125
125
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_11_HEAD
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_11_HEAD
REFERENCE DESIGNATOR(S)
BOM OPTION
QTY
DESCRIPTION
VALUE VOLT. WATT.
TOL.PART #
PACKAGE
DEVICE
TABLE_11_HEAD
TABLE_11_HEAD
TABLE_5_ITEM
TABLE_11_HEAD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_5_ITEM
CPU VID<0:5>
VID SET TO 1.475V TO ACHIEVE 1.45V AT PROCESSOR
SMU
NOTE:PULL UP CPU_VID<5>TO
2.2V FOR CPU VRM10.
998-0269
CONNECTOR
DOWNLOAD
(SMU_BOOT_EPM)
THESE PINS HAVE INTERNAL PULLUPS
PULSAR ERROR_L LED
SHASTA JTAG
PULL DOWN
SIGNAL ALIAS
PCI CLOCKS
CHEAPER SMU RESET
518S0104
CPU HEATSINK SMT NUTS
CONNECTION
POWER_FAIL_L
SMU ANALOG VREF
MISC PARTS
ALTERNATE FOR SERIAL NUMBER LABEL
NEED TO ADD THERMAL GREASE TO MLB BOM
5%
402
MF
10K
1/16W
402
100
MF
1/16W
5%
DEVELOPMENT
ST-HDR-HI-TEMP
TH
DEVELOPMENT
402
1/16W
10K
MF
5%
MF
5%
402
1/16W
10K
DEVELOPMENT
5% MF
10K
1/16W
402
402
MF
1/16W
5%
0
NOSTUFF
1K
402
MF
1/16W
5%
NOSTUFF
402
CERM
6.3V
10%
1UF
NOSTUFF
SOT23
1N914
NOSTUFF
TSSOP
74LCX125
TSSOP
74LCX125
TSSOP
402
MF
1/16W
5%
4.7K
PP2V5_PWRON
10K
5% 1/16W MF 402
MF
1/16W
5%
10K
402
MF
1/16W
5%
10K
402
MF
1/16W
5%
10K
402
MF
1/16W
5%
10K
402
NOSTUFF
402
10K
5% 1/16W MF
402
10K
5% 1/16W MF
NOSTUFF
402
10K
5% 1/16W MF
NOSTUFF
402
10K
5% 1/16W MF
NOSTUFF
402
MF
1/16W
5%
10K
NOSTUFF
PP3V3_RUN
402
10K
5% 1/16W MF
402
20K
5% 1/16W MF
HSK-NUT-6.5MMTHHSK-NUT-6.5MM
TH
HSK-NUT-6.5MM
TH
HSK-NUT-6.5MM
TH
DEVELOPMENT
RED
SM
HSK-NUT-6.5MM
THTH
HSK-NUT-6.5MM
CERM
16V
20%
0.01UF
402
CERM
16V
20%
0.01UF
402
CERM
16V
20%
0.01UF
402
CERM
16V
20%
0.01UF
402 402
0.01UF
20% 16V CERM CERM
16V
20%
0.01UF
402
NOSTUFF
1/16W
402
MF
5%
0
PP3V3_ALL
U.FL-R_SMT
DEVELOPMENT
F-ST-SM
BM12B-SRSS-TB
F-ST-SM
NOSTUFF
1/16W
5%
0
MF
402
NOSTUFF
MF
402
0
5%
1/16W
NOSTUFF
1/16W
0
MF
5%
402
NOSTUFF
402
MF
1/16W
5%
0
NOSTUFF
0
1/16W
MF
5%
402
NOSTUFF
0
1/16W
MF
5%
402
NOSTUFF
DEVELOPMENT
5%
4.7K
402
MF
1/16W
DEVELOPMENT
MF
330
402
1/16W
5%
PP3V3_RUN
337S2787 2.0GHZ
NEO_REV3_2_0GHZ
65W
1 ?
PROCESSOR
1.15V U2900
13
8 99
051-6482
IC,MPU,NEO,10S,REV2,2.0GHZ,70C
2.0GHZ
NEO_REV2_2_0GHZ
65W
CBGA-576-1MM
PROCESSOR
1 ?
1.15V U2900
337S2785
45W
337S2784
U29001.15V
?1
PROCESSOR
CBGA-576-1MM
NEO_REV2_1_8GHZ
1.8GHZ
IC,MPU,NEO,10S,REV2,1.8GHZ,70C
1.8GHZ
PROCESSOR
NEO_REV3_1_8GHZ
45W
U29001.15V
?1
CBGA-576-1MM
337S2786
IC,MPU,NEO,10S,REV3,1.8GHZ,70C
HS_SDF802HS_SDF801HS_SDF800
HS_SDF804 HS_SDF805HS_SDF803
NB_PMR_OBSV
CPU_VID_R<4>
ERROR_LED
CLOCK_ERROR_L
SMU_SLEEP
SMU_BOOT_CE
SMU_BOOT_CNVSS
MAKE_BASE=TRUE
PCI_CLK33M_AIRPORT
_PCI_CLK33M_AIRPORT
MAKE_BASE=TRUE
TP_PCI_CLK_GP1
MAKE_BASE=TRUE
TP_PCI_CLK_P4
PCI_CLK_P4
_PCI_CLK33M_USB2
PCI_CLK_GP0
MAKE_BASE=TRUE
PCI_CLK33M_USB2
JTAG_SB_TRST_L_PP3V3_ALL_SMU
SMU_RESET_L
SMU_MANUAL_RESET_L
JTAG_SB_TDI
JTAG_SB_TCK
TP_JTAG_SB_TDI
MAKE_BASE=TRUE
TP_JTAG_SB_TCK
MAKE_BASE=TRUE
JTAG_SB_TMS
JTAG_SB_TDO
TP_JTAG_SB_TMS
MAKE_BASE=TRUE
TP_JTAG_SB_TDO
MAKE_BASE=TRUE
NB_THMOTP_THMO
MAKE_BASE=TRUE
NB_THMI
TP_NB_THMI
MAKE_BASE=TRUE
PCI_CLK_P3
PCI_CLK_GP1
SMU_WARM_RESET_L SYS_WARM_RESET_L
SYS_SLEEP
SMU_BOOT_RXD
SMU_BOOT_SCLK
SMU_BOOT_BUSY
J802_6
SMU_MANUAL_RESET_L
J802_2
SMU_BOOT_TXD
CPU_VID<3>
CPU_VID<2>
CPU_VID<0>
CPU_VID<5>
CPU_VID<4>
CPU_VID_R<1>
PCI_CLK_P1
MAKE_BASE=TRUE
SMU_CHARGE_BATT
NO_TEST=TRUE
MAKE_BASE=TRUE
TP_SMU_CHARGE_BATT
ALS1_OUT
MAKE_BASE=TRUE
TP_ALS1_OUT
ALS0_OUT
TP_ALS0_OUT
MAKE_BASE=TRUE
SMU_PWRSEQ_P1_3
MAKE_BASE=TRUE
TP_SMU_PWRSEQ_P1_3
SMU_PWRSEQ_P1_4
MAKE_BASE=TRUE
TP_SMU_PWRSEQ_P1_4
SMU_ADAPTER_ID
MAKE_BASE=TRUE
ALS_GAIN_BOOST
MAKE_BASE=TRUE
MAKE_BASE=TRUE
ACCEL_LOWPWR_L
SMU_SPARE_P10_0
MAKE_BASE=TRUE
TP_SMU_SPARE_P10_0
ACCEL_INT_L
MAKE_BASE=TRUE
TP_ACCEL_INT_L
CPU_VID_R<5>
CPU_VID_R<3>
CPU_VID_R<0>
CPU_VID_R<2>
CPU_VID<1>
CBGA-576-1MM
74LCX125
IC,MPU,NEO,10S,REV3,2.0GHZ,70C
5%
1/16W
MF
47
402
PP3V3_ALL
5%
402
MF
10K
1/16W
5%
0
1/16W
MF
402
603
0.47UF
20% 10V CERM
NOSTUFF
402
MF
1/16W
0
5%
1%
402
MF
1/16W
200
NOSTUFF
SSOT-23
2.5V
NOSTUFF
805
CERM
10V
20%
2.2UF
NOSTUFF
PP3V3_ALL_SMU_AVCC
SYS_POWERFAIL_L
_PPVREF_SMU
GND_SMU_AVSS
POWER_GOOD
PPVREF_SMU_ADC_REF
GND_SMU_AVSS_DAGND
1
062-2082
SPEC,VENDOR PACKAGING PROCEDURE
VPP1
MLB1
PCB,FAB,MLB
820-1540
1
1
LBL1825-2029
1
SCH1
PCB,SCHEM,MLB
051-6482
U7500
1
IC,FLASH,1MX8,3.3V,90NS
341T1366
1
742-0048
BT700
BAT,COIN,3V,220MAH,CR2032
1
GAP FILLER
GAP2900
875-1614
PURCH ASSY, SMU BIG
341T1395
1
U1300
1
875-1752
GPU GAP PAD
PAD4900
452-0678
CPU HEATSINK SCREW
SRW800,SRW801,SRW802,SRW803,SRW804,SRW805
6
870-1177
CPU HEATSINK SPRING
6
SPR800,SPR801,SPR802,SPR803,SPR804,SPR805
730-0291
1
CPU HEATSINK
HS2900
COMMON
BAR CODE LABEL
LBL1825-2029825-2808
CRITICAL
CRITICAL
CRITICAL
CRITICAL
CRITICAL
J800
3
2
1
R805
1
2
R812
1
2
R813
1 2
VR801
2 1
3
R818
1
2
C801
1
2
C802
1
2
J803
14131
101112
2345678
9
R819
1 2
R820
1 2
R821
1 2
R822
1 2
R823
1 2
R824
1 2
R801
1
2
R800
1
2
R825
1
2
R826
12
R802
1 2
J802
1
10
2 3 4 5 6 7 8 9
R803
1
2
R807
1
2
R806
1
2
R810
1 2
R815
1
2
C800
1
2
D800
1
3
R828
1 2
U700
5
7 4
14
6
U700
9
7
10
14
8
U700
12
7
13
14
11
R870
1
2
R814
1
2
R816
1
2
R817
1
2
R808
1
2
R809
1
2
R827
1
2
R829
1
2
R830
1
2
R831
1
2
R832
1
2
R804
1
2
R811
1
2
SDF800
1
SDF801
1
SDF803
1
SDF802
1
D810
1
2
SDF805
1
SDF804
1
C880
1
2
C881
1
2
C882
1
2
C883
1
2
C884
1
2
C885
1
2
24
33
6
27
13
13
13
6
76
27
77
27
25 13
7
13
6
13
8 7 6
25
25
25
25
24
24
27
27
24 13 87 77 74 25 24
50 46 27 11 10
9 6
13 13
13
13
8 7 6
13
13
13
13
13
13
33
6
27 74 27
13
13
13
13
13
13
13
13
13
13
33
6
33
6
33
6
33
6
13
13
13
6
13
36 33 13
7
36
36
D
G
S
D
G
S
D
G
S
FB
LD
HD
GND
COMP
SS
VCC
VC
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
VOUT=VREF*(R903+R905)/R905=2.62VDC
IRU3037CS VREF=1.25VDC
9.24A WITHOUT DIMM TERMINATION
SET OUTPUT=2.62V FOR FRAMEBUFFER.
12.68A WITH DIMM TERMINATION
NOTE:
U900_FEEDBACK
2.5V VREG
2.5V VOLTAGE REGULATOR
PEAK CURRENT OF TOTAL RAILS
LOW TO ENABLE
0
FF
5%
1/10W
805
10K
1/16W 402
MF
1%
1.1K
1/8W
5%
1206
FF
NOSTUFF
6.3V
390UF
20% ELEC
8X11.5-TH
20%
6.3V ELEC
1800UF
TH-KZJ
1206
CERM
6.3V
20%
10UF
1800UF
6.3V ELEC
20%
TH-KZJ
OMIT
PP5V_PWRON
805
CERM
25V
20%
1UF
PP5V_PWRON
IRF7410
SO-8
MBR0520L
SM
SM
MBR0520L
MBR0520L
SM
1UF
20% 10V CERM 603
50V
10%
0.022UF
NOSTUFF
CERM 603
1UF
20% 25V CERM 805
PP2V5_PWRON
PP2V5_RUN
CASE369
NTD70N03R
NTD70N03R
CASE369
402
CERM
5% 25V
220PF
TH
1.6UH
CRITICAL
SOI
IRU3037CS
402
MF
1/16W
1%
11K
CERM
16V
20%
603
0.1UF
402
MF
1% 1/16W
27.4K
5%
402
CERM
50V
56PF
50V CERM
10%
603
3300PF
NOSTUFF
CERM
50V
5%
3900PF
603
5% FF
805
1/10W
4.7
1206
25V CERM
20%
1UF
NOSTUFF
390UF
20%
6.3V ELEC 8X11.5-TH
CRITICAL
051-6482
13
9 99
C909
1
20_INCH_LCD
124-0322
CAP,AL ELEC,1800UF,6.3V
124-0324
1
C909
17_INCH_LCD
CAP,AL ELEC,1500UF,6.3V
MIN_LINE_WIDTH=25MIL
VOLTAGE=2.5V MIN_NECK_WIDTH=10MIL
U900_VC
U900_VC_R
Q901_GATE
R901_P2
SYS_SLEEP
R904_P2
U900_GATE_H
U900_COMP
U900_SS
Q902_DRAIN
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
U900_GATE_L
U900_FEEDBACK
U900_VC_D
C901
1
2
C904
1
2
C905
1
2
C906
1
2
C907
1
2
C912
1
2
C902
1
2
R902
1 2
R905
1
2
R904
1
2
C903
1
2
C908
1
2
C909
1
2
Q903
5
6
7
8
4
1
2
3
D900
12
D901
12
D902
1
2
C917
1
2
C916
1
2
Q901
4
1
3
Q902
4
1
3
L901
1 2
U900
7
1
4
5
3
8
62
R903
1
2
C915
1
2
R901
1
2
C913
1
2
C914
1
2
R900
1
2
50 46 27 11 10
8 6
6
D
G
S
FB
LD
HD
GND
COMP
SS
VCC
VC
S
D
G
G
D
S
G
D
S
S
D
G
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
U1000_FEEDBACK
PP1V2_RUN FET SWITCH
PEAK CURRENT 4.43A
PP1V2_PWRON FET SWITCH
PEAK CURRENT 0.6A
1.2V VREG
VOUT=VREF*(R1003+R1005)/R1005=1.206VDC
SET OUTPUT=1.2V
NOTE:
5.96A
IRU3037ACS VREF=0.8VDC
PEAK CURRENT OF TOTAL RAILS
@ VGS=2.5 V
RDSON=0.016 OHM
@ VGS=2.5 V
RDSON=0.06 OHM
SHASTA CORE VOLTAGE REGULATOR
1.6UH
TH
603
CERM
3300PF
NOSTUFF
10% 50V
1% MF
402
1/16W
10K
1206
NOSTUFF
FF
1.1K
1/8W
5%
1UF
20% CERM
25V 1206
NOSTUFF
SM
MBR0520L
PP5V_ALL
CERM
10V 603
20%
1UF
CASE369
NTD70N03R
0.022UF
603
CERM
NOSTUFF
10% 50V
SM
MBR0520L
MBR0520L
SM
0
5%
1/10W
805
FF
805
CERM
20%
1UF
25V
25V
5% CERM
402
220PF
20% 25V
805
CERM
1UF
IRU3037ACS
SOI
20% ELEC
6.3V
1800UF
TH-KZJ
402
MF
1% 1/16W
5.11K
SM
2N7002
PP3V3_ALL
MF
402
5%
100K
1/16W
PP1V2_RUN
TH-KZJ
1800UF
ELEC
6.3V
20%
2N7002DW
SOT-363
2N7002DW
SOT-363
PP5V_ALL
MF
1/16W
402
100K
5%
PP5V_ALL
SI3446DV
TSOP
PP1V2_PWRON
2N7002
SM
5% MF
1/16W
402
100K
PP5V_ALL
8X11.5-TH
ELEC
6.3V
390UF
20%
I70
SI9426DY
SOI
5% CERM
603
50V
3900PF
5%
603
50V CERM
68PF
0.1UF
20% CERM
16V 603
27.4K
1%
402
MF
1/16W
1/16W
MF
0
5%
402
5%
0
NOSTUFF
MF
402-1
1/16W
5% MF
1/16W
0
402
0
5%
1/16W 402-1
MF
NOSTUFF
PP3V3_ALL
ELEC
6.3V
20%
390UF
8X11.5-TH
MF
402
5%
1/16W
100K
805
FF
1/10W
5%
4.7
CASE369
NTD60N02R
CERM
6.3V
20%
10UF
1206
9910
13
051-6482
Q1001_GATE
Q1002_DRAIN
MIN_NECK_WIDTH=10MIL MIN_LINE_WIDTH=25MIL
U1000_GATE_L
Q1005_G
SYS_SLEEP
PP1V2_PWRON_SB_VCORE
U1000_GATE_H
VOLTAGE=1.2V MIN_NECK_WIDTH=15MIL
MIN_LINE_WIDTH=100
PP1V2_PWRON_SB_VCORE
Q1003_G
PP1V2_PWRON_SB_VCORE
U1000_SS
R1004_P2
R1001_P2
Q1006_G
U1000_FEEDBACK
U1000_COMP
Q1000_G
SYS_POWERUP_L
SYS_POWERUP_L
TURN_ON_SHASTA_CORE_L
TURN_ON_PP1V2_L
U1000_VC_DU1000_VC_R
U1000_VC
C1009
1
2
C1008
1
2
C1003
1
2
C1002
1
2
C1001
1
2
L1001
1 2
C1007
1
2
R1005
1
2
R1004
1
2
C1012
1
2
D1002
1
2
C1017
1
2
Q1002
4
1
3
C1005
1
2
D1000
12
D1001
12
R1000
1 2
C1000
1
2
C1006
1
2
C1004
1
2
U1000
7
1
4
5
3
8
62
R1003
1
2
Q1000
3
1
2
R1007
1
2
Q1004
3
5
4
Q1004
6
2
1
R1008
12
Q1006
125
63
4
Q1005
3
1
2
R1009
12
Q1003
5 6 7 8
4
1 2 3
C1014
1
2
C1013
1
2
C1015
1
2
R1001
1
2
R1010
1 2
R1011
1 2
R1012
1 2
R1013
1 2
R1014
1
2
R1002
1
2
Q1001
4
1
3
50 46 27 11
9 8 6
23 10
6 3
23 10
6 3
23 10
6 3
33 13 11 10
7 6
33 13 11 10
7 6
3
3
D
G
S
G
DS
LM339A
V+
GND
LM339A
V+
GND
TAB
VOUTVPWR
VCTRL
VOUT
ADJ
SENSE
D
G
S
G
DS
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
P-CHANNEL
FET ON IN SLEEP
Ron=11mOhm
FET ON IN RUN
FET ON IN SLEEP
5V & 3.3V VREGS
FET ON IN RUN
PP5V_PWRON
Vpwr >= Vout+0.35V
Vctrl >= Vout+1.25V
Ron=11mOhm
P-CHANNEL
R2
R1
Iadj=50uA typ
3.30V - 3.45V
Vref=1.250V typ
Vout=Vref(1+R2/R1)+Iadj(R2)
PROCESS SWING
SHUTDOWN -> FLOAT
SLEEP -> FLOAT
RUN -> LOW
SHUTDOWN -> FLOAT
SLEEP -> LOW
RUN -> FLOAT
SM
ELEC
10V
150UF
20%
CRITICAL
SM-1
SI4467DY
100K
5%
1/16W
MF
402
SM-1
SI4467DY
CRITICAL
CRITICAL
SOI
SOI
47.0K
1%
1/16W
MF
603
CRITICAL
SM
CS5253
402
5% MF
100K
1/16W
402
1/16W
MF
5%
100K
124
1% 1/16W MF 603
210
1% 1/16W MF 603
0.1UF
N20P80% 16V CERM 603
SI4467DY
SM-1
SM-1
SI4467DY
SM
100UF
ELEC
6.3V
20%
402
1K
1% 1/16W MF MF
1/16W
1%
1K
402
9911
13
051-6482
RAIL_CTL_NEG
RAIL_CTL_POS
PP5V_ALL
PP3V3_ALL
PP3V3_RUN
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=3.3V
PP3V3_PWRON
3_3V_ALL_ADJ
MIN_NECK_WIDTH=10MIL
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
VOLTAGE=3.3V
PP3V3_ALL
PP5V_PWRON
VOLTAGE=5V MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
RAIL_SLEEP_FET
MIN_NECK_WIDTH=10MIL
PP5V_RUN
SYS_POWERUP_L
SYS_SLEEP
PP5V_ALL
MIN_NECK_WIDTH=10MIL
RAIL_RUN_FET MIN_LINE_WIDTH=20MIL
C1100
1
2
VR1100
2
1
4
3
6
5
R1105
1
2
R1106
1
2
C1101
1
2
C1102
1
2
Q1100
5
6
7
8
4
1
2
3
R1100
1 2
Q1101
5 6 7 8
4
1 2 3
U1100
12
10
11
13
3
U1100
12
4
5
2
3
R1102
1
2
R1103
1 2
R1104
1 2
Q1102
5
6
7
8
4
1
2
3
Q1103
5 6 7 8
4
1 2 3
R1107
1
2
R1101
1
2
3
11
7 6
11
7
6
27 18
6
11
7
18
6
6
33 13 10
7 6
50 46 27 10
9 8 6
11
7 6
RSET*
MR*
GND
VCC
P9[7]
P9[6]
P9[5]
P8[7]
P8[6]
P8[5]
P3[7]
P3[6]
P3[5]
P3[4]
P2[6] P2[7]
P2[4] P2[5]
P1[4]
P1[3]
P1[2]
P1[1]
P1[0]
P0[4]
P0[0]
P0[2] P0[3]
P0[1]
P0[7]
P0[6]
P0[5]
P3[3]
P3[2]
P3[1]
P3[0]
P2[3]
P2[2]
P2[1]
P2[0]
P1[5] P1[6] P1[7]
PCNVSS RESET* XOUT
VREF
XIN
P7[7]
P7[6]
P7[5]
P7[4]
P7[3]
P7[2]
P7[1]
P7[0]
P6[7]
P6[6]
P6[5]
P6[4]
P6[3]
P6[2]
P6[1]
P6[0]
P10[0] P10[1]
P9[3]
P9[2]
P9[1]
P9[0]
P8[4]
P8[3]
P8[2]
P8[1]
P8[0]
P10[6] P10[7]
P10[2] P10[3] P10[4] P10[5]
VCC
AVSS
VSS
AVCC
SQW/ OUT
VBAT
SDA SCL
X1 X2
GND
VCC
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS
ALIAS ALIAS
ALIAS ALIAS ALIAS ALIAS ALIAS ALIAS
ALIAS ALIAS ALIAS
ALIAS
ALIAS ALIAS
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
AN25 AN26
Y
AN27
S Y
Alternate Functions
Y1300’s load capacitance is 12pF
(CPU_SENSE_I/CPU_SENSE_V) requires
IOC5
Y
Y
Undervoltage Reset Circuit
2.7
2.6
2.5
Port
7.6
1.6
1.7
Port
1.5
10.7
7.4
7.2
0.0
0.2
6.0
0.3
6.2
6.1
Port
Tower & Server
Consumer
NNY
SSS
YY
YYY
S Y S
S
NNYY
NNYY
SSS
SSS
YYY
YY Y
Y
SDAmm
INT5*
INT4*
S Y S
S Y S S
S Y S
SYS
(see aliases below)
N = Alternate function
S = Spare
S
YNS
Y Y Y Y
Y Y Y Y
Y Y Y Y
Y Y Y Y
YYYY
Y
AN22
AN20
AN06
Y
Y
CTS0*
Keep crystal subcircuit close to SMU.
IOC7
TA2in
TA2out
Y
N
AN04
INT2*
YYYY
CE*
AN00
Y
Portable
Consumer
Server
Y
Y
AN23
AN21
Y
Y
Consumer
Y
TA3in
Y
Y
Y
N
AN0
SSS
Y
AN03
(BUSY)
TB0in
Y
Y
Y
Y
Y Y Y Y
Sin3
Master: Link
System Management Unit
signal (GND_SMU_AVSS). None of
NOTE: All analog inputs to SMU should have
provided on another page.
reference used by monitoring
(NONE)
(NONE)
- _PP3V3_PWRON_SMU
- _PP3V3_ALL_RTC
- _PP3V3_ALL_SMU
ELECTRICAL_CONSTRAINT_SET
BOM options provided by this page:
Signal aliases required by this page:
NOTE: CPU current/voltage monitoring
SMU_VREF should be same signal or
Real Time Clock
NC
provided on this page. Please.
reuire pull-ups that are not.
Tower
NYY
NNNY
Y Y
Y
SSY
Y
S
SSYY
Y
YY
YY
RTS0*/
TXD1
CLK1
RTS1*
TXD0
RXD0
CLK0
RXD1
AN07
AN05
AN01 AN02
Server
N
N
SNY
Y
Y Y
Y
Y Y
Y YYY
YY Y
Y Y Y
YYYY
Y Y
N
Y
Y
Y
Y
Y
Y SYS
YYY
Y
YY
Y
SY
YY
YY
S
Y
YYY
Y YY Y
Y
Y Y Y
Y Y YYYYY
Y Y
Y Y
SDA
TA4out
TA1in
AN24
TB1in
NMI*
INT1*
IOC2
SCLmm
Y
YY S YYYN
Y
NY
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y Y
Y
Y
Y Y
Y
YYYY
N
Y
Y
YYYY
N
S S
Sout3
AN1 AN2
AN3 KI0* KI1* KI2* KI3*
YYYY
Y Y
Y
Y
Y
Y
INT0*
IOC4
IOC3
YY
Y
Y
SCL
this page.
CLK3
TB2in
Y
to ensure missing pull-ups are
review the latest SMU specification
Y
INT3*
- _PPVREF_SMU (SMU AVCC or 2.5V reference)
Power aliases required by this page:
Page Notes
IOC6
TA4in
TA3out
100K/10uF RC filter at SMU pins. Caps should connect to GND_SMU_AVSS.
those capacitors are provided on
a 100pF capacitor to the SMU AVSS
circuit, but be aware that this will affect other analog inputs such as AC adapter ID.
NOTE: Some primary and alternate functions
NOTE: Pinout matches SMU pinout v1.4.
S S N N S S
TA1out
S
YY
YN
S
Tower
Portable
Portable
System Management Unit
NET_SPACING_TYPE
Y = Primary function
S
Y
SMU Pull-ups / pull-down
Y
Y
Y
S
Y
0.1uF
20% 10V
402
CERM
20%
6.3V
10uF
CERM
805
MF
5%
402
1/16W
100K
402
1/16W
5%
10K
MF
1K
MF
5%
402
1/16W
MAX6804
SOT143
CERM
12pF
50V
5%
402
10M
402
MF
1/16W
5%
NO STUFF
0
5% MF
1/16W
402
8X4.5MM-SM
10.0000M
CRITICAL
12pF
5%
402
CERM
50V
0.1uF
10V
20% 402
CERM
1/16W
MF
100K
402
5%
1/16W
5%
402
MF
10K
OMIT
QFP-80
M30280F8
DS1338
MSOP
SM
5% MF
4.7
1/16W
402
20% 10V
402
0.1uF
CERM
402
CERM
20% 10V
0.1uF
1/16W
10K
MF
402
5%
CERM
0.1uF
402
10V
20%
SM-1
32.768K
10K
MF
5%
402
1/16W
MF
402
5%
1/16W
10K
100K
1/16W
MF
402
5%
PP3V3_PWRON
PP3V3_RUN
PP2V5_PWRON
100K
MF
402
1/16W
5%
1uF
402
6.3V
10% CERM
0
NO_SMU_I2C_D
402
MF
1/16W
5%
051-6482
9913
13
ACCEL_LOWPWR_L
TP_SMU_SPARE_P10_0
MIN_LINE_WIDTH=10 mil
PP3V3_ALL_SMU_RESET
VOLTAGE=3.3V MIN_NECK_WIDTH=10 mil
I2C_SMU_D_SDA
FAN_TACH3
SYS_COLD_RESET_L
SMU_CLK10M_XOUT
15 MIL SPACING
15 MIL SPACING
RTC_CLK32K_XTAL
RTC_CLK32K_X1
SMU_TO_SB_INT_L
FAN_TACH5
SYS_LED_BLUE
FAN_TACH4
SYS_LED_GREEN
FAN_TACH3
SYS_LED_RED
SMU_ACIN
EXT_LED_L
SYS_KBDLED
SYS_DOOR_AJAR
SYS_LID_OPEN
SYS_DRIVE_BAY_INT_L
SMU_BATT_DET_L
SYS_POWERFAIL_L
CPU_SENSE_I
SYS_SLOT_PWR
CPU_TEMP
FAN_TACH6
CPU_BYPASS_L
FAN_TACH7
CPU_VID<0>
FAN_RPM3 FAN_RPM4 FAN_RPM5 FAN_PWM6
I2C_SMU_CPU_SCL_IN
FAN_PWM7 EXT_POWER_BUTTON_L
SMU_SLEEP
SYS_COLD_RESET_L
SMU_SUSPENDREQ_L
SYS_SLEWING_L
I2C_SMU_A_SCL_IN
SMU_ADAPTER_ID
SMU_PWRSEQ_P1_2
SMU_PWRSEQ_P1_4
ALS_GAIN_BOOST
ALS1_OUT
CPU_SENSE_V
CPU_SENSE_I
CPU_TEMP CPU_BYPASS_L
SMU_RESET_L
VOLTAGE=3.3V MIN_LINE_WIDTH=15 mil MIN_NECK_WIDTH=10 mil
PP3V3_ALL_SMU_AVCC
SMU_PWRSEQ_P9_5
SYS_POWER_BUTTON_L
SMU_SUSPENDREQ_L
SMU_PWRSEQ_P9_6
SB_TO_SMU_INT_L
CLOCK_RESET_L
SMU_WARM_RESET_L
SMU_SLEEP
SYS_RESET_BUTTON_L
NB_SUSPENDACK_L
SYS_DOOR_AJAR
SMU_PWRSEQ_P1_3
SMU_PWRSEQ_P1_1
SMU_PWRSEQ_P1_0
ALS0_OUT
_PP3V3_ALL_SMU
SYS_POWER_BUTTON_L
SYS_POWERUP_L
I2C_SMU_D_SCL
FAN_TACH4
VOLTAGE=0V
GND_SMU_AVSS
MIN_NECK_WIDTH=10 mil
MIN_LINE_WIDTH=15 mil
SMU_CLK10M_XIN
RTC_CLK32K_X2
_PP3V3_ALL_SMU
I2C_RTC_SCL
I2C_RTC_SDA
_PPVREF_SMU
SMU_BOOT_CNVSS
SMU_CLK10M_XOUT
SMU_BOOT_SCLK
SMU_BOOT_BUSY
SMU_BOOT_CE
SYS_DRIVE_BAY_INT_L
SYS_POWERFAIL_L
I2C_SMU_E_SCL FAN_TACH0
I2C_SMU_E_SDA
FAN_TACH2
SMU_CHARGE_BATT
SB_SUSPENDACK_L
I2C_SMU_A_SDA_IN
SYS_OVERTEMP_L
FAN_TACH5
GND_SMU_AVSS
_PP3V3_ALL_SMU
SMU_MANUAL_RESET_L
_PP3V3_ALL_RTC
RTC_CLK32K_X1
SYS_SLEWING_L
FAN_TACH1
_PP3V3_ALL_SMU
I2C_SMU_CPU_SCL_OUT
I2C_SMU_CPU_SDA_IN
CPU_VID<2>
CPU_VID<1>
RTC_CLK32K_X2
15 MIL SPACING
15 MIL SPACING
15 MIL SPACING
SMU_CLK10M_XTAL
SMU_CLK10M_XIN
I2C_SMU_CPU_SCL_OUT
SYS_PME_L
SB_STOPXTALS_L
CPU_HRESET_L
I2C_SMU_CPU_SDA_OUT
FAN_RPM1
SMU_BOOT_RXD
CPU_VID<5>
SYS_LED
I2C_SMU_CPU_SDA_IN
FAN_RPM2
SYS_PME_L ACCEL_INT_L
SYS_POWERUP_L
MAKE_BASE=TRUE
EXT_LED_L
I2C_SMU_CPU_SCL_IN
FAN_RPM0
I2C_SMU_B_SCL
I2C_SMU_B_SDA
SMU_BOOT_TXD
CPU_VID<0> CPU_VID<1> CPU_VID<2> CPU_VID<3> CPU_VID<4>
R1304
2 1
R1315
1 2
C1302
1
2
C1301
1
2
C1300
1
2
R1310
1 2
R1300
1 2
R1322
1
2
U1302
1
3 2
4
C1305
1
2
R1316
1 2
R1317
1
2
Y1300
1 2
C1304
1
2
C1310
1
2
R1311
1 2
U1300
78
75
6
67 66 65 64 63 62 61 60
59
76 74 73 72 71 70 69 68
58 57 56 55 54 53 52
51 50 49 48 47 46 45 44
39 38 37 36 35 34 33 32
43 42 41 40 31 30 29 28
27 26 25 24 23 22 21 20
19 18 17 16 15 14 8 7
5 4 3 2 1 80 79
9
13
77
11
12
10
U1301
4
6
5
7
3
8
1 2
XW1300
1 2
C1308
1
2
R1302
1 2
C1309
1
2
Y1301
1
4
R1327
1
2
R1325
1
2
R1312
1 2
R1313
1 2
C1303
1
2
R1399
1 2
13
8
8
18
13
24 13
13
13
25
13 21
13 21
13 21
13
13
13
13
8 6
33 13
36 13
30 29 13
13
8
18 13
6
13
8
24 13
25 24 13
33 27 25 13
18 14
18
8
3
8
8
8
33
33 13
36 13
30 29 13
8 6
8
3
13
7 6
25 24 13
3
25
27
24
8
13
8
7
24
13
8
3
3
8
13
8 7
13
7 6
33 13 11 10
7 6
18
13
36 33 13
8
13
13
13
8 7
18
18
8
8
13
8
8
8
13
13
8 6
18
16
18
17
8
25
18 14
18
36 27 25 16
13
36 33 13
8
13
8 7
8 7 6
7
13
33 27 25 13
16
13
8 7
18 13
18 13
13
8
13
8
13
13
13
18 13
77 25 13
25
30 29 14
18
16
8
8
21
18 13
17
77 25 13
8
33 13 11 10
7 6
13
18 13
16
18
18
8
13
8
13
8
13
8
8
8
A30B30
A29B29
A28B28
A27B27
A26B26
B25
B24
B23
B22
B21
A25
A24
A23
A22
A21
C30D30
C29D29
C28D28
C27D27
C26D26
C25D25
D22 D23 D24
D21
C24
C23
C22
C21
E30F30
E29F29
E28F28
E27F27
E26F26
E25F25
F24
F23
F22
F21
E24
E23
E22
E21
G30H30
G29H29
G28H28
G27H27
G26H26
H25 G25
G22 G23 G24
H21 H22 H23 H24
G21
H20
H19
H18
H17
H16
H15
H14
H13
H12
H11
H10
H9
H8
H7
H6
H5
H4
H3
H2
H1
G20
G19
G18
G17
G16
G15
G14
G13
G12
G11
G10
G9
G8
G7
G6
G5
G4
G3
G2
G1
F20
F19
F18
F17
F16
F15
F14
F13
F12
F11
F10
F9
F8
F7
F6
F5
F4
F3
F2
F1
E10
E20
E19
E18
E17
E16
E15
E14
E13
E12
E11
E9
E8
E7
E6
E5
E4
E3
E2
E1
D20
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
C20
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1 B1 A1
A2 A3 A4 A5 A6 A7 A8
A9 A10 A11 A12 A13 A14 A15 A16 A17 A18 A19 A20
B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 B16 B17 B18 B19 B20
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
NC
NC
NC
CPU LOGIC ANALYZER
NC
NC
NC NC
NCNC
NC
NC
NC
NC NC
NC
0
5%
1/16W
MF
402
0
5%
1/16W
MF
402
5% 402
0
0
4025%
F-ST-BGA
YFS-30-03-H-08-SB
NOSTUFF
051-6482
13
14 99
EI_CPU1_CLK_P
EI_CPU1_CLK_P_R
EI_CPU1_CLK_N
EI_CPU1_CLK_N_R
CPU1_HTBEN
CPU1_HTBEN_R
EI_CPU1_SYNC
EI_CPU1_SYNC_R
EI_NB_TO_CPU_AD<37>
EI_NB_TO_CPU_AD<5>
EI_CPU_TO_NB_AD<28>
EI_CPU_TO_NB_AD<3>
EI_CPU_TO_NB_AD<17> EI_CPU_TO_NB_AD<14>
EI_NB_TO_CPU_AD<12>
EI_NB_TO_CPU_AD<3>
EI_NB_TO_CPU_AD<4>
EI_CPU_TO_NB_AD<29>
EI_CPU_TO_NB_AD<41>
EI_CPU_TO_NB_AD<32>
EI_CPU_TO_NB_AD<33>
EI_CPU_TO_NB_AD<34>
EI_CPU_TO_NB_AD<30>
EI_CPU_TO_NB_AD<37>
EI_CPU_TO_NB_AD<31>
EI_CPU_TO_NB_AD<10>
EI_CPU_TO_NB_AD<9>
EI_CPU_TO_NB_AD<1>
EI_CPU_TO_NB_AD<2>
EI_CPU_TO_NB_AD<0>
CPU1_HTBEN
CPU_HRESET_L
EI_CPU_TO_NB_AD<25> EI_CPU_TO_NB_AD<26> EI_CPU_TO_NB_SR_P<0> EI_CPU_TO_NB_SR_N<0>
EI_CPU_TO_NB_AD<23> EI_CPU_TO_NB_AD<39> EI_CPU_TO_NB_AD<16> EI_CPU_TO_NB_AD<19>
EI_CPU1_CLK_N
EI_CPU_TO_NB_AD<4>
EI_CPU_TO_NB_AD<7> EI_CPU_TO_NB_AD<11> EI_CPU_TO_NB_CLK_N EI_CPU_TO_NB_CLK_P
EI_CPU_TO_NB_SR_N<1> EI_CPU_TO_NB_SR_P<1>
EI_CPU_TO_NB_AD<24>
EI_NB_TO_CPU_AD<14>
EI_NB_TO_CPU_AD<18> EI_NB_TO_CPU_AD<19>
EI_CPU1_SYNC
EI_NB_TO_CPU_AD<13> EI_NB_TO_CPU_AD<15> EI_NB_TO_CPU_AD<17>
EI_NB_TO_CPU_AD<27> EI_NB_TO_CPU_AD<26>
EI_NB_TO_CPU_AD<42> EI_NB_TO_CPU_AD<41>
EI_NB_TO_CPU_AD<25>
EI_NB_TO_CPU_AD<20>
EI_NB_TO_CPU_AD<39> EI_NB_TO_CPU_AD<36>
EI_NB_TO_CPU_SR_N<0> RI_L EI_QREQ_L
EI_NB_TO_CPU_SR_N<1>
TP_PROC_TRIGGER_OUT
EI_NB_TO_CPU_SR_P<1>
EI_NB_TO_CPU_AD<7> EI_NB_TO_CPU_AD<6>
EI_SE
EI_QACK_L
EI_NB_TO_CPU_AD<35>
EI_NB_TO_CPU_AD<34> EI_NB_TO_CPU_AD<31> EI_NB_TO_CPU_AD<32> EI_NB_TO_CPU_AD<23> EI_NB_TO_CPU_CLK_N EI_NB_TO_CPU_CLK_P MCP_L I2C_SMU_A_SDA_OUT
CHKSTOP_L
CPU_INT_L
EI_CPU1_CLK_P
EI_NB_TO_CPU_SR_P<0>
EI_NB_TO_CPU_AD<10>
EI_NB_TO_CPU_AD<28>
EI_NB_TO_CPU_AD<29>
EI_NB_TO_CPU_AD<40>
EI_NB_TO_CPU_AD<30>
EI_CPU_TO_NB_AD<5>
EI_CPU_TO_NB_AD<8> EI_CPU_TO_NB_AD<13>
EI_CPU_TO_NB_AD<12>
EI_CPU_TO_NB_AD<36> EI_CPU_TO_NB_AD<35> EI_CPU_TO_NB_AD<18> EI_CPU_TO_NB_AD<43> EI_CPU_TO_NB_AD<42> EI_CPU_TO_NB_AD<38> EI_CPU_TO_NB_AD<40> EI_NB_TO_CPU_AD<9> EI_NB_TO_CPU_AD<11> EI_NB_TO_CPU_AD<0> EI_NB_TO_CPU_AD<1>
EI_NB_TO_CPU_AD<22> EI_NB_TO_CPU_AD<33>
SYNCENABLE
EI_NB_TO_CPU_AD<38>
EI_NB_TO_CPU_AD<2>
EI_NB_TO_CPU_AD<43>
EI_CPU_TO_NB_AD<15>
EI_CPU_TO_NB_AD<6> EI_CPU_TO_NB_AD<21> EI_CPU_TO_NB_AD<20>
EI_NB_TO_CPU_AD<24>
EI_NB_TO_CPU_AD<8>
EI_NB_TO_CPU_AD<16>
EI_CPU_TO_NB_AD<27>
EI_CPU_TO_NB_AD<22>
EI_NB_TO_CPU_AD<21>
J1400
A1
A10 A11 A12 A13 A14 A15 A16 A17 A18 A19
A2
A20 A21 A22 A23 A24 A25 A26 A27 A28 A29
A3
A30
A4 A5 A6 A7 A8 A9
B1
B10 B11 B12 B13 B14 B15 B16 B17 B18 B19
B2
B20 B21 B22 B23 B24 B25 B26 B27 B28 B29
B3
B30
B4 B5 B6 B7 B8 B9
C1
C10 C11 C12 C13 C14 C15 C16 C17 C18 C19
C2
C20 C21 C22 C23 C24 C25 C26 C27 C28 C29
C3
C30
C4 C5 C6 C7 C8 C9
D1
D10 D11 D12 D13 D14 D15 D16 D17 D18 D19
D2
D20 D21 D22 D23 D24 D25 D26 D27 D28 D29
D3
D30
D4 D5 D6 D7 D8 D9
E1
E10 E11 E12 E13 E14 E15 E16 E17 E18 E19
E2
E20 E21 E22 E23 E24 E25 E26 E27 E28 E29
E3
E30
E4 E5 E6 E7 E8 E9
F1
F10 F11 F12 F13 F14 F15 F16 F17 F18 F19
F2
F20 F21 F22 F23 F24 F25 F26 F27 F28 F29
F3
F30
F4 F5 F6 F7 F8 F9
G1
G10 G11 G12 G13 G14 G15 G16 G17 G18 G19
G2
G20 G21 G22 G23 G24 G25 G26 G27 G28 G29
G3
G30
G4 G5 G6 G7 G8 G9
H1
H10 H11 H12 H13 H14 H15 H16 H17 H18 H19
H2
H20 H21 H22 H23 H24 H25 H26 H27 H28 H29
H3
H30
H4 H5 H6 H7 H8 H9
R1400
1 2
R1401
1 2
R1402
1 2
R1403
1 2
27 14 27
27 14 27
14 27
27 14 27
29 28
29 28
29 28
29 28
29 28
29 28
29 28 29 28
29 28 29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
14
30 29 13
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
27 14
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
27 14
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28 29 28
30 29
30 29 28
29 28 29
6
29 28
29 28
29 28 30 29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29
18 13
30 29
30 29 25 27 14
18 13
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
30 29
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
29 28
GDS
GDS
S
D
G
SDA SCL
GND
OS
VS+
A2
A1
A0
S
D
G
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
FAN 0 - Q37 STYLE CPU FAN CONTROL CIRCUIT
SYSTEM TEMP SENSOR
SYSTEM FAN 1
CPU FAN 2
MAX FAN CURRENT=0.5A
FAN 1 - Q37 STYLE CPU FAN CONTROL CIRCUIT
Q37/Q16 FAN CONTROL
MAX FAN CURRENT=0.5A
IIC ADDR:90(1001000)
CERM
16V 1210
10UF
NOSTUFF
10%
20% 16V
805
0.47UF
CERM
10K
402
MF
1/16W
1%
PP12V_RUN
PP3V3_PWRON
HF28040-B
M-ST-TH
CRITICAL
10K
1% 1/16W MF 402
402
1/16W
5%
0
MF
1/16W
MF
402
5%
0
SM
IRF5505
1/16W
5%
0
MF
NOSTUFF
402
NOSTUFF
0
5% MF
402
1/16W
1210
CERM
16V
10%
NOSTUFF
10UF
47UF
ELEC
16V
20%
SM
PP12V_RUN
5%
4.7K
1/16W
402
MF
1N914
SOT23
MF
1/16W
402
5%
4.7
805
0.47UF
16V
20% CERM
5%
50V
CERM
402
100PF
10-89-7062
M-ST-TH
CRITICAL
SM
MBR0530
CRITICAL
IRF5505
SM
16V
10UF
CERM 1210
10%
1210
10%
CERM
16V
10UF
CERM
4700PF
603
50V
10%
MF
1/16W
402
10K
1%
ELEC
16V
20%
SM
10UF
100K
MF
1/16W
1%
402
0.1UF
20% 16V CERM 603
100K
1%
1/16W
402
MF
MF
1/16W
1%
10K
402
402
1/16W
5%
0
MF
LM358-SOI
CRITICAL
1/16W
10K
402
MF
1%
MF
10K
402
1/16W
1%
2N7002
SM
0
5% MF
402
1/16W
NOSTUFF
MF
0
5%
1/16W
402
NOSTUFF
PP3V3_PWRON
10K
1% 1/16W MF 402
0
1/16W
MF
402
5%
CRITICAL
LM75
SOP
PP3V3_PWRON
402
MF
1/16W
5%
0
FERR-EMI-100-OHM
SM
FERR-EMI-100-OHM
SM
SM
FERR-EMI-100-OHM FERR-EMI-100-OHM
SM
402
CERM
16V
20%
0.01UF
FERR-EMI-100-OHM
SM
2N7002
SM
MF
10K
402
1/16W
1%
402
MF
1/16W
1%
10K
1%
1/16W
402
MF
100K 100K
402
MF
1%
1/16W
20%
0.1UF
16V CERM 603
ELEC
16V
20%
10UF
SM
100PF
5%
CERM
402
50V
LM358-SOI
CRITICAL
1N914
SOT23
1%
1/16W
MF
402
10K
4700PF
50V
10%
CERM
603
1/16W
402
MF
5%
4.7K
CERM 1210
16V
10%
10UF
1210
10%
10UF
16V CERM
SM
MBR0530
CRITICAL
5%
402
MF
1/16W
4.7
ELEC
16V
20%
SM
47UF
13051-6482
9916
FAN_0_TACH
MIN_LINE_WIDTH=20MIL
FAN_0_PWR
MIN_NECK_WIDTH=10MIL
FAN_0_DRV
FAN_1_GND_FILT
PP12V_RUN_FAN_1_LC
PP12V_RUN_FAN_1_LCL
FAN_1_TACH_FILT
FAN_1_PWR_FILT
MIN_NECK_WIDTH=10MIL
FAN_1_PWR
MIN_LINE_WIDTH=20MIL
FAN_1_TACH
FAN_0_OPP
FAN_RPM0
FAN_1_OPM
FAN_1_DRV_F
FAN_1_GATE
FAN_1_OPP
FAN_1_GT
FAN_TACH0
FAN_0_DRV_F
FAN_1_CNTL
FAN_TACH1
FAN_RPM1
FAN_0_CNTL
MIN_NECK_WIDTH=10MIL
PP12V_FAN_0_ANALOG MIN_LINE_WIDTH=20MIL
VOLTAGE=12V
FAN_1_DRV
FAN_0_GT
FAN_0_OPM
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=20MIL
PP12V_FAN_1_ANALOG VOLTAGE=12V
TEMP_SENSOR_OS
SYS_OVERTEMP_LI2C_TEMP_B_SDA
FAN_0_GATE
I2C_TEMP_B_SCL
Q1600
3
1
2
R1639
1
2
R1640
1
2
R1641
1 2
R1642
1 2
C1613
1
2
C1614
1
2
C1615
1 2
U1600
2
3
1
8
4
D1604
13
R1643
1 2
C1616
1 2
R1644
1
2
C1617
1
2
C1618
1
2
D1605
1
2
R1645
1 2
C1619
1
2
C1600
1
2
C1601
1
2
R1601
1
2
J1600
1 2 3 4
R1604
1
2
R1605
1 2
R1606
1 2
Q1601
4
1
3
R1600
1 2
R1603
1
2
C1603
1
2
C1604
1
2
R1610
1
2
D1602
13
R1611
1 2
C1609
1
2
C1605
1 2
J1601
1
4
56
D1601
1
2
Q1603
4
1
3
C1606
1
2
C1607
1
2
C1608
1 2
R1613
1 2
C1610
1
2
R1614
1 2
C1611
1
2
R1615
1 2
R1616
1
2
R1635
1 2
U1601
2
3
1
8
4
R1617
1
2
R1620
1
2
Q1602
3
1
2
R1618
1
2
R1619
1 2
R1623
1
2
R1636
1 2
U1602
7 6 5
4
3
2
1
8
R1621
1 2
L1600
1 2
L1601
1 2
L1602
1 2
L1603
1 2
C1602
1
2
L1604
1 2
13
13
13
13
36 27
25 13 18
18
GDS
S
D
G
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
FAN 2 - Q37 STYLE SYSTEM FAN CONTROL CIRCUIT
MAX FAN CURRENT=0.5A
CPU FAN CONNECTOR
PP12V_RUN
10-89-7062
M-ST-TH
CRITICAL
MBR0530
CRITICAL
SM
SM
IRF5505
1210
10%
10UF
CERM
16V CERM 1210
16V
10%
10UF
CERM
603
50V
4700PF
10%
1%
1/16W
MF
402
10K
ELEC
16V
20%
10UF
SM
1%
100K
402
MF
1/16W
0.1UF
20% 16V CERM 603
1%
1/16W
402
MF
100K
402
MF
1/16W
1%
10K
0
402
1/16W
5% MF
LM358-SOI
CRITICAL
10K
402
MF
1/16W
1%
CERM
16V 1210
10UF
NOSTUFF
10%
MF
10K
402
1/16W
1%
2N7002
SM
NOSTUFF
0
5% MF
402
1/16W
1/16W
5%
0
MF
NOSTUFF
402
PP3V3_PWRON
10K
1% 1/16W MF 402
1/16W
MF
402
5%
0
ELEC
16V
20%
SM
47UF
1/16W
402
MF
5%
4.7K
1N914
SOT23
5%
402
MF
1/16W
4.7
CERM
20% 16V
805
0.47UF
50V
100PF
5%
CERM
402
9917
13
051-6482
FAN_2_TACH
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=20MIL
VOLTAGE=12V
PP12V_FAN_2_ANALOG
FAN_2_DRV
FAN_2_OPP
FAN_2_GATE
FAN_2_OPM
FAN_2_CNTL
FAN_RPM2 FAN_2_GT
FAN_2_DRV_F
MIN_LINE_WIDTH=20MIL
MIN_NECK_WIDTH=10MIL
FAN_2_PWR
FAN_TACH2
C1700
1
2
C1719
1
2
R1744
1
2
D1704
13
R1745
1 2
C1701
1
2
C1715
1 2
J1700
1
4
56
D1705
1
2
Q1701
4
1
3
C1718
1
2
C1717
1
2
C1716
1 2
R1743
1 2
C1714
1
2
R1742
1 2
C1713
1
2
R1741
1 2
R1740
1
2
R1705
1 2
U1700
2
3
1
8
4
R1701
1
2
R1739
1
2
Q1700
3
1
2
R1703
1
2
R1700
1 2
R1704
1
2
R1706
1 2
13
13
ALIAS
ALIAS
ALIAS
ALIAS
LM339A
V+
GND
LM339A
V+
GND
G
D
S
G
D
S
LM339A
V+
GND
ALIAS ALIAS
ALIAS
ALIAS
ALIAS ALIAS
LM339A
V+
GND
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
CPU JTAG
PINS 34, 35
PINS 18, 19
PINS 21, 24
U9500
AUDIO
MICRODASH
J9400
PINS Y9, AB7
MASTER U2300
SHASTA
I2C SB BUS
MASTER U1300
SMU ’E’
PINS 50, 51
U3
PINS C20, B21
U3LITE ’B’
I2C D & E BUS
U1300
MASTER
SMU ’D’
U1301
RTC
PINS 5, 6
I2C C BUS
OF EACH DIMM
PINS C21, E21
DIMMS
J4000 = A0 J4001 = A2
PINS 91, 92
MASTER
U3LITE
U3
PINS C1, B1
PINS 1, 2
U1602
SYSTEM TEMP SENSOR
U1300
PINS 26, 27
SMU
MASTER
U2600
PULSAR
I2C B BUS
PINS A20, B20
U3
U3LITE
I2C CONNECTIONS
U1300
U1300
SMU
PINS 36-39
I2C_CPU_A_SCL
I2C A BUS
CPU
U2900
MASTER
SMU
MASTER
PINS 14,25,23,68
PINS AA20, Y21
2K
5%
1/16W
MF
402
2K
5% 1/16W MF 402
PP2V5_PWRON
PP3V3_RUN
1K
5% 1/16W MF 402
1K
5%
1/16W
MF
402
MF
1/16W
402
2K
5%
402
MF
5%
1/16W
200
1/16W
5% MF
200
402
SOI
SOI
402
5%
1.2K
1/16W
MF
402
5%
1.2K
1/16W MF
2K
1/16W
5%
402
MF
MF
2K
402
5% 1/16W
MF
1/16W
402
2K
5%
SM1
0K
5%
1/16W
NOSTUFF
1/16W
5%
0K
SM1
0.1UF
402
CERM
10V
20%
NOSTUFF
402
MF
1/16W
5%
0
NOSTUFF
0
5% 1/16W MF 402
0
5%
1/16W
MF
402
NOSTUFF NOSTUFF
402
MF
1/16W
5%
0
0
5%
1/16W
MF
402
402
MF
1/16W
5%
0
NOSTUFF
0
5%
1/16W
MF
402
5% MF
NOSTUFF
0
1/16W
402
SOT-363
2N7002DW
2N7002DW
SOT-363
SOI
2K
5% 1/16W MF 402402
MF
1/16W
5%
2K
1/16W
5%
402
MF
4.7K
2K
5% 1/16W MF 402402
MF
1/16W
5%
2K
PP3V3_PWRON
PP2V5_PWRON
SOI
PP3V3_ALL
1/16W MF 402
5%
2K
1/16W
MF
402
5%
2K
576
1% 1/16W MF 402
0.1UF
10V 402
CERM
20%
13
18 99
051-6482
PP3V3_PWRON
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_NB_A_SCL
I2C_NB_A_SDA
PP1V2_EI_NB
MAKE_BASE=TRUE
I2C_SMU_A_SCL_IN
NET_SPACING_TYPE=I2C
NET_SPACING_TYPE=I2C
I2C_SMU_A_SDA_IN MAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
I2C
I2C_SMU_CPU_SCL_OUT MAKE_BASE=TRUE
JTAG_CPU_TCK
JTAG_CPU_TMS
JTAG_CPU_TDI
JTAG_CPU_TDO
I2C
I2C_SMU_CPU_SDA_OUT MAKE_BASE=TRUE
I2C_SMU_CPU_SDA_IN MAKE_BASE=TRUE
I2C
I2C_CPU_A_SDA_TO_SMU
I2C_0V546_REF
I2C_RTC_SCL
I2C
I2C_RTC_SDA
I2C
PP5V_PWRON
I2C_AUDIO_SDA I2C_AUDIO_SCL
I2C_UDASH_SCL
I2C_UDASH_SDA
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_SB_SCL
I2C_SB_SDA
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_SMU_D_SCL
I2C
I2C_SMU_E_SCL
I2C
I2C_SMU_E_SDA
I2C
I2C_NB_B_SDA
I2C
I2C_NB_B_SCL
I2C
I2C_SMU_D_SDA
I2C
I2C_DIMM_SDA I2C_DIMM_SCL
I2C_NB_C_SCL MAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
NET_SPACING_TYPE=I2C
I2C_NB_C_SDA MAKE_BASE=TRUE
I2C_TEMP_B_SCL
I2C_TEMP_B_SDA
I2C_CLOCK_SCL
I2C_CLOCK_SDA
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_SMU_B_SCL
I2C_SMU_B_SDA
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
PP3V3_PWRON
SMU_CPU_JTAG_OR_I2C
MAKE_BASE=TRUE
I2C_SMU_CPU_SCL_IN
I2C
I2C_CPU_A_SDA
NET_SPACING_TYPE=I2C
I2C_CPU_A_SCL
NET_SPACING_TYPE=I2C
PP1V2_EI_CPU
R1809
1
2
U1800
12
8
9
14
3
R1800
1
2
R1801
1
2
U1800
12
6
7
1
3
R1802
1
2
R1803
1
2
R1804
1
2
R1805
1
2
R1806
1
2
R1807
1
2
R1811
1
2
C1801
1
2
R1812
1
2
R1813
1
2
R1814
1
2
R1815
1
2
R1808
1
2
R1810
1
2
U1800
12
10
11
13
3
U1800
12
4
5
2
3
R1816
1
2
R1817
1
2
R1818
1
2
R1819
1
2
RP1800
1 2 3 4
8 7 6 5
RP1801
1 2 3 4
8 7 6 5
C1800
1
2
R1820
1
2
R1821
1
2
R1822
1
2
R1823
1
2
R1824
12
R1825
12
R1826
12
R1827
12
Q1800
6
2
1
Q1800
3
5
4
27 18 11
6
14 13
24
24
28
7
13
13
14 13
13
30 29
30 29
30 29
30 29
13
13
13
13
11
6
95
95
94
6
94
6
25
25
13 13
13
24
24
13
40
40
24
24
16
16
27
27
13
13
27 18 11
6
13
29
29
35 31 30 29
7
GRN
BLUE
AMB
+
-
+
-
+
-
+
-
D
S
G
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PLACE THESE PARTS CLOSE TO SMU IC
(STUFF WHEN SYS_LED_L = ACTIVE HIGH)
(AND NO STUFF R2132, R2119 & Q2100)
CHANGE R2100 VALUE
PLACE THESE PARTS CLOSE TO SMU IC
PWM INPUT FROM SMU
5MV INPUT OFFSET
PWM INPUT FROM SMU
PWM INPUT FROM SMU
TOTAL CURRENT EXCLUDING LEDS CURRENT < 170 MICRO AMPS
INDICATOR LED
100% DUTY CYCLE OF 3V-PP PWM = 0.5V
MAX LED CURRENT = 0.5 / R
TO SET LED CURRENT
PLACE THESE PARTS CLOSE TO SMU IC
PWM INPUT FROM SMU
PLACE THESE PARTS CLOSE TO SMU IC
PP5V_PWRON
PP5V_PWRON
AMB-GRN-BLUE
LATBG66B
RGB_LED
PLCC
RGB_LED
TSSOP
LP324
PP5V_PWRON
RGB_LED
1/16W
1% MF
402
953K
PP5V_PWRON
2N3904
RGB_LED
SM
25.5
1/16W 402
RGB_LED
MF
1%
LP324
TSSOP
RGB_LED
1%
1K
402
1/16W
MF
RGB_LED
RGB_LED
953K
1/16W
402
MF
1%
RGB_LED
200K
1/16W
MF
1%
402
603
RGB_LED
CERM
0.47UF
20% 10V
RGB_LED
1/16W
MF
402
0
5%
RGB_LED
1/16W
MF
1%
953K
402
PP5V_PWRON
RGB_LED
SM
2N3904
MF
RGB_LED
402
1/16W
1%
25.5
RGB_LED
LP324
TSSOP
1%
RGB_LED
1/16W
MF
1K
402
953K
1/16W
402
1% MF
RGB_LED
200K
MF
402
1/16W
1%
RGB_LED
0.47UF
20% 10V
603
RGB_LED
CERM
RGB_LED
0
5% MF
1/16W
402
RGB_LED
1/16W
402
953K
1% MF
PP5V_PWRON
SM
RGB_LED
2N3904
25.5
1% 1/16W MF 402
RGB_LED
RGB_LED
LP324
TSSOP
1%
1K
MF
402
1/16W
RGB_LED
953K
1% MF
402
1/16W
RGB_LED
200K
MF
1%
402
1/16W
RGB_LED
CERM
10V
20%
0.47UF
603
RGB_LED
MF
5%
0
RGB_LED
1/16W
402
RGB_LED
0.022UF
402
CERM
16V
20%
16V
CERM
402
RGB_LED
20%
0.022UF
20%
0.022UF
RGB_LED
402
CERM
16V
RGB_LED
0.1UF
402
CERM
10V
20%
MF
1/16W
5%
1K
402
NOSTUFF
PP3V3_PWRON
SOT-23
FDV302P
NOSTUFF
400-OHM-EMI
RGB_LED
SM-1
RGB_LED
400-OHM-EMI
SM-1
400-OHM-EMI
SM-1
RGB_LED
WHITE_LED
400-OHM-EMI
SM-1
RGB_LED
25V
220PF
402
CERM
5%
220PF
RGB_LED
402
5% 25V CERM
SM-1
400-OHM-EMI
RGB_LED
RGB_LED
220PF
5%
25V
CERM
402
CERM
402
RGB_LED
25V
5%
220PF
25V
220PF
5%
CERM
402
WHITE_LED
400-OHM-EMI
SM-1
WHITE_LED
402
WHITE_LED
CERM
5% 25V
220PF
1/16W
MF
5%
0
402
WHITE_LED
953K
1/16W
402
MF
1%
NOSTUFF
FDV301N
SM
WHITE_LED
WHITE
SM6
1%
402
WHITE_LED
MF
1/16W
100
1K
WHITE_LED
1/16W
402
MF
5%
402
MF
1/16W
5%
4.7K
WHITE_LED
9921
051-6482 13
B_PWM_IN_H
B_PWM_DC
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
SYS_LED_DRV_K
SYS_LED_DRV_C
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
R_IN_OFFSET
GND_CHASSIS_LED
G_DRV MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE
SYS_LED_GREEN
R_PWM_IN_H
MAKE_BASE=TRUE
SYS_LED_RED
R_BASE_DRV
MIN_LINE_WIDTH=25MIL
R_DRV_FB
MIN_NECK_WIDTH=10MIL
R_DRV
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
B_DRV_FB MIN_LINE_WIDTH=25MIL
MIN_LINE_WIDTH=25MIL
B_DRV
MIN_NECK_WIDTH=10MIL
MAKE_BASE=TRUE
SYS_LED_BLUE
MIN_LINE_WIDTH=25MIL
G_DRV_FB MIN_NECK_WIDTH=10MIL
B_BASE_DRV
G_BASE_DRV
G_PWM_IN_H
B_IN_OFFSET
GND_CHASSIS_LED
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
SYS_DRV_K
R_PWM_DC
G_DRV_K MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
SYS_DRV_A MIN_NECK_WIDTH=10MIL
RGB_LED_A MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
GND_CHASSIS_LED
SYS_LED_IN
MIN_NECK_WIDTH=10MIL
R_DRV_K MIN_LINE_WIDTH=25MIL
B_DRV_K MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
SYS_GATE
SYS_LED_H
G_IN_OFFSET
G_PWM_DC
SYS_LED
U2100_UNUSED
R2103
1
2
R2106
12
R2129
1
2
LED2100
6
2
5
1
3
4
U2100
11
10
9
8
4
R2109
1
2
Q2102
1
3
2
R2100
1
2
U2100
11
12 13
14
4
R2112
12
R2104
1
2
R2105
1
2
C2106
1
2
R2101
12
R2102
1
2
Q2108
1
3
2
R2113
1
2
U2100
11
5 6
7
4
R2114
12
R2110
1
2
R2111
1
2
C2112
1
2
R2115
12
R2118
1
2
Q2114
1
3
2
R2126
1
2
U2100
11
3 2
1
4
R2127
12
R2116
1
2
R2117
1
2
C2118
1
2
R2130
12
C2101
12
C2102
1 2
C2104
12
C2103
1
2
R2132
12
Q2100
3
1
2
L2100
1
2
L2101
1
2
L2102
1
2
L2103
1
2
C2105
1 2
C2107
1
2
L2104
1 2
C2108
12
C2109
12
C2110
12
L2105
1 2
C2111
1
2
R2107
12
R2119
12
Q2101
3
1
2
LED2101
1
2
21
7
13
13
13
21
7
21
7
13
6
G
D
S
GND
GND
VDD
(SYM 6 OF 7)
G
D
S
FB
LD
HD
GND
COMP
SS
VCC
VC
TABLE_ALT_ITEM
TABLE_5_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
VOUT=VREF*(R2203+R2205)/R2205=1.5VDC
SET OUTPUT=1.5VDC FOR U3LITE CORE
7.73A OF PEAK CURRENT DRAW ON PCORE_NB
U3LITE CORE POWER
CHECK FETS
IRU3037CS VREF=1.25VDC
U2200_FEEDBACK
NOTE:
20%
8X11.5-TH
ELEC
6.3V
390UF
8X11.5-TH
ELEC
6.3V
20%
390UF
10UF
20%
6.3V CERM 1206
1800UF
20%
6.3V ELEC TH-KZJ
1800UF
TH-KZJ
ELEC
20%
6.3V
10K
1% 1/16W MF 402
603
20% CERM
10V
NOSTUFF
1UF
NOSTUFF
20%
1UF
1206
CERM
25V
PP5V_PWRON
NTD60N02R
CASE369
0.022UF
NOSTUFF
603
10%
50V CERM
0
FF
5%
1/10W
805
CERM
25V
20%
1UF
805
220PF
5% 25V CERM 402
PP5V_PWRON
0.1UF
CERM
16V
20%
603
20%
805
CERM
25V
1UF
CERM
25V 805
1UF
20%
SM
MBR0520L
MBR0520L
SM
MBR0520L
SM
OMIT
U3LITE
V1.0-300MM
PBGA
NTD60N02R
CASE369
TH
1.6UH
NOSTUFF
402
1% 1/16W MF
1.1K
SOI
IRU3037CS
MF
1/16W
1%
402
2K
MF
1/16W
1%
27.4K
402
3900PF
5% 50V CERM 603
CERM
50V
5%
68PF
603
PP5V_PWRON
805
FF
1/10W
5%
4.7
CERM
10V
20%
0.1UF
402 402
0.1UF
20% 10V CERM CERM
20%
0.1UF
402
10V
402
0.1UF
20% 10V CERMCERM
10V
20%
0.1UF
402 402
0.1UF
20% 10V CERMCERM
10V
20%
0.1UF
402 402
0.1UF
20% CERM
10V
CERM
10V
0.1UF
402
20%
402
0.1UF
20% 10V CERMCERM
10V
20%
0.1UF
402 402
0.1UF
20% 10V CERMCERM
10V
20%
0.1UF
402
0.1UF
20% 10V CERM 402
CERM
10V
20%
402
0.1UF
402
0.1UF
20% 10V CERM
10V
20%
0.1UF
402
CERM
402
0.1UF
20% 10V CERM CERM
10V
20%
0.1UF
402 402
0.1UF
20% 10V CERM
402
0.1UF
20% 10V CERM
402
0.1UF
20% 10V CERM
402
0.1UF
20% 10V CERM
U3343S0284343S0282
U3L,V1.1,200MM,PBGA
1
U3343S0284
IC,U3LITE,V1.1,300MM,PBGA
051-6482
13
22 99
U2200_FEEDBACK
MIN_LINE_WIDTH=25MIL
MIN_NECK_WIDTH=10MIL
VOLTAGE=1.2V
PPVCORE_NB
U2200_COMP
R2201_P2
U2200_SS
U2200_GATE_L
PPVCORE_NB
R2204_P2
U2200_GATE_H
Q2201_GATE
MIN_LINE_WIDTH=25MIL
Q2202_DRAIN
MIN_NECK_WIDTH=10MIL
U2200_VC
U2200_VC_DU2200_VC_R
C2222
1
2
C2223
1
2
C2225
1
2
C2228
1
2
C2227
1
2
C2230
1
2
C2229
1
2
C2232
1
2
C2231
1
2
C2234
1
2
C2233
1
2
C2236
1
2
C2235
1
2
C2238
1
2
C2237
1
2
C2240
1
2
C2239
1
2
C2242
1
2
C2243
1
2
C2244
1
2
C2245
1
2
C2246
1
2
C2247
1
2
C2203
1
2
C2202
1
2
C2201
1
2
C2209
1
2
C2208
1
2
R2205
1
2
C2207
1
2
C2212
1
2
Q2201
C2205
1
2
R2202
1 2
C2204
1
2
C2206
1
2
C2214
1
2
C2216
1
2
C2217
1
2
D2200
12
D2201
12
D2202
1
2
U3
AG7
AG13
AC16 AC22
AB2
AB6 AB23 AB27 AA10 AA19
Y12
Y15
AG16
Y20
W4
W8 W13 W18 W21 W25 V11 V16 V19
AG22
U9 U14 U17
T2
T6 T12 T15 T20 T23 T27
AE4
R10 R13
R18 P11 P16 P19 N4 N8 N9 N14
AE10
N17 N23 N27 M12 M15 M20 L10 L13 L18 K2
AE19
K6 K11 K16 K21 K25 J9 J14 H10 H19 G4
AE25
G23 G27 F13 F16 F22 D2 D7 D10 D19 D25
AC7
B4 B13 B16 B22
AC13
W14
W17
R17
P12
P15
N13
N18
M11
M16
L14
L17
K12
V12
K15
V15
U10
U13
U18
T11
T16
R14
Q2202
4
1
3
L2201
1 2
R2204
1
2
U2200
7
1
4
5
3
8
62
R2203
1
2
R2201
1
2
C2215
1
2
C2213
1
2
R2200
1
2
6
22
7 6
22
7 6
VIO1
POWER
VDDO33
VDDO25
VIO2
VDDP_KL
VDDC
GND
GND
GND
(1 OF 8)
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
Shasta Core
MIN_LINE_WIDTH MIN_NECK_WIDTHVOLTAGE
NOTE: PCI pads use the VIO supply to meet
characteristics required by the PCI
Page Notes
Power aliases required by this page:
- _PP2V5_PWRON_SB
- _PP3V3_PWRON_SB
- _PPPCI32_PWRON_SB (to 5V or 3.3V)
- _PPPCI64_PWRON_SB (to 5V or 3.3V)
different drive timing
spec for 5V vs. 3.3V operation.
neoBorg Implementation
Must power Shasta VCore rail before any
(SBVCORE_PGOOD) when ready, which acts as the power enable signal for the rest of
_PPPCI64_PWRON_SB to same if 64-bit
Signal aliases required by this page:
connects directly to SBVCORE supply
the neoBorg components.
(SBVCORE_RUN). Supply asserts PGOOD
appropriate PCI bus voltage and
Connect _PPPCI32_PWRON_SB to
Power Sequencing:
- (NONE)
other Shasta supplies.
Master power enable signal (from PMU)
PCI, otherwise 3.3V.
For PCI_AD<63..32>
Shasta max (est 06/30/03) current:
VDDPs - 2.5V - 100 mA ( 250 mW)
I/O 3.3 - 3.3V - 220 mA ( 770 mW)
ANALOG12 - 1.2V - 600 mA ( 760 mW)
Total: 3015 mW
I/O 2.5 - 2.5V - 20 mA ( 60 mW)
DIGITAL - 1.2V - 950 mA (1175 mW)
20% 10V CERM 402
0.1uF
10V CERM 402
0.1uF
20%
0.1uF
402
CERM
10V
20% 20%
10V CERM 402
0.1uF 0.1uF
402
20% CERM
10V
20% 10V
402
CERM
0.1uF
0.1uF
402
CERM
10V
20%
402
CERM
10V
20%
0.1uF
20% 10V CERM 402
0.1uF
0.1uF
402
CERM
10V
20%
0.1uF
402
CERM
10V
20%
402
20% 10V CERM
0.1uF
20% 10V CERM 402
0.1uF
402
CERM
20% 10V
0.1uF
20% 10V CERM 402
0.1uF0.1uF
402
CERM
10V
20%
0.1uF
402
CERM
10V
20%20% 10V CERM 402
0.1uF
20% 10V CERM 402
0.1uF0.1uF
402
CERM
10V
20%
0.1uF
402
CERM
10V
20%20% 10V CERM 402
0.1uF
20% 10V CERM 402
0.1uF
0.1uF
402
CERM
10V
20%
0.1uF
402
CERM
10V
20%
0.1uF
402
CERM
10V
20%
20% 10V CERM 402
0.1uF
20% 10V CERM 402
0.1uF
20%
10V
CERM
402
0.1uF
CERM
20% 10V
402
0.1uF
0.1uF
402
CERM
10V
20%
0.1uF
402
CERM
10V
20%
0.1uF
402
CERM
10V
20%
20% 10V CERM 402
0.1uF
20% 10V CERM
0.1uF
402
0.1uF
402
10V
20% CERM
20% 10V CERM 402
0.1uF
20% 10V CERM 402
0.1uF0.1uF
402
CERM
10V
20%
CERM 402
0.1uF
10V
20%20%
CERM 402
0.1uF
10V
0.1uF
10V 402
CERM
20%
0.1uF
402
CERM
10V
20%
BGA
V1.0
SHASTA
OMIT
20% 10V CERM 402
0.1uF
ABBREV=DRAWING
TITLE=FIZZY
23 99
051-6482
13
1
U2300
343S0283
IC,ASIC,SHASTA,V1.1,PBGA
3.3V
25MIL 10MIL
3.3V
25MIL 10MIL
3.3V
25MIL 10MIL
_PP3V3_PWRON_SB _PP2V5_PWRON_SB
2.5V
10MIL25MIL
_PP2V5_PWRON_SB
_PP2V5_PWRON_SB
_PP3V3_PWRON_SB
PP1V2_PWRON_SB_VCORE
1.2V
15MIL
100
PP1V2_PWRON_SB_VCORE
C2303
1
2
C2304
1
2
C2305
1
2
C2306
1
2
C2307
1
2
C2308
1
2
C2309
1
2
C2302
1
2
C2301
1
2
C2300
1
2
C2314
1
2
C2313
1
2
C2312
1
2
C2311
1
2
C2310
1
2
C2334
1
2
C2333
1
2
C2339
1
2
C2338
1
2
C2332
1
2
C2331
1
2
C2337
1
2
C2336
1
2
C2330
1
2
C2335
1
2
C2324
1
2
C2323
1
2
C2329
1
2
C2328
1
2
C2322
1
2
C2321
1
2
C2327
1
2
C2326
1
2
C2320
1
2
C2325
1
2
C2351
1
2
C2350
1
2
C2357
1
2
C2356
1
2
C2355
1
2
C2362
1
2
C2361
1
2
C2360
1
2
C2365
1
2
U2300
A1 A2
E22
F3 F7 H2
H9 J10 J11 J13 J14 J16
A22
J22
K10
K11
K12
K13
K7
K9
L10
L11
L12A5L13
L14
L16L9M10
M11
M12
M13
M14
M2
AA10
N10
N11
N12
N13
N22
N9
P10
P12
P13
P14
AA6
P4
P9
R19
T12
U10
U13
U22
W19
W5
AB1
AB22
C19
D2
H15
H8
R10
R12R9T10
T15
J12
J15K8L15L8M15N8P15
D19 G15
AA1 AA2
F4
F8
H1
L7
M1
R2 U12
U9
V7
W4
AA3
AB10
AB2 AB6
B1
B2
B5
D1
V8
H18 H17 K21
L21 W22 Y19
LAST_MODIFIED=Fri Nov 21 11:24:04 2003
23
7
23
7
25 23
7
88 74 25 23
7
88 74 25 23
7
88 74 25 23
7
23
7
23
7
25 23
7
23 10
6 3
23 10
6 3
G
D
S
G
D
S
S
D
G
G
D
S
G
D
S
G
D
S
G
D
S
SYS_ISCL0 SYS_ISCA0
SYS_ISCA1
SYS_ISCL1
API_ISCA
API0_ISCL
THMO
DUMMY_A DUMMY_B
PMR_OBSV
IRQ0
THMI
(SYM 7 OF 7)
HRESET*
PURESET* SUSPENDACK* SUSPENDREQ*
CE1_B_TDO
CE1_A_TDI
CE1_LT_TCK
VSP_CLKN
VSP_CLKP
CE1_DI1_TMS CE1_DI2_TRST CE1_RI
CEO_TEST
PM_SLEEP0
CE0_RE
CE0_MC
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
ELECTRICAL_CONSTRAINT_SET
NET_SPACING_TYPE
MASTER: GILA
JTAG_NB_TRST_L
JTAG_NB_TDO JTAG_NB_TMS
U3LITE MISC
JTAG_NB_TDI
JTAG_NB_TCK
U3LITE REQUIRES ALL JTAG SIGNALS HIGH FOR NORMAL OPERATION
PP3V3_PWRON
PP3V3_PWRON PP3V3_PWRON
PP3V3_PWRON PP2V5_PWRON
PP2V5_PWRONPP2V5_PWRON
PP2V5_PWRON
I109
I110
402
4.7K
5% 1/16W MF
20% 10V CERM 402
0.1UF
402
5% 1/16W MF
100
NOSTUFF
100
5% 1/16W MF 402
NOSTUFF
2N7002DW
SOT-363
NOSTUFF
MF
5%
10K
402
1/16W
100
1% MF
402
1/16W
NOSTUFF
SOT-363
2N7002DW
SM
2N7002
402
10K
5% 1/16W MF
MF
1/16W
5%
4.7K
402
NOSTUFF
SM
SI2302DS
2N7002DW
SOT-363
NOSTUFF
402
5% MF
1/16W
10K
NOSTUFF
SOT-363
2N7002DW
NOSTUFF
SOT-363
2N7002DW
NOSTUFF
1/16W
5%
402
10K
MF
NOSTUFF
2N7002DW
SOT-363
NOSTUFF
100
1% 1/16W MF 402
MF
1/16W
5%
10K
402
10K
5% 1/16W MF 402
MF
1/16W
5%
10K
402 402
10K
5% 1/16W MF MF
1/16W
5%
10K
402
5%
10K
402
1/16W MF
402
5% 1/16W MF
10K
402
10K
5% 1/16W MFMF
1/16W
5%
10K
402
4.7K
402
MF
1/16W
5%
NOSTUFF
0
5%
1/16W
MF
402
402
MF
1/16W
5%
0
0
5%
1/16W
MF
402
PBGA
OMIT
U3LITE
V1.0-300MM
MF
1/16W
1%
121
402 402
121
1% 1/16W MF
402
MF
1/16W
5%
0
NOSTUFF
603
25V
5%
1000PF
NOSTUFF
CERM
13
24 99
051-6482
PP1V2_HT
SYS_WARM_RESET_L
SMU_RESET
10 MIL SPACING
10 MIL SPACING
SYS_COLD_RESET_L
SMU_RESET
SMU_WARM_RESET_L
NB_SUSPEND_ACK_L
NB_SUSPEND_ACK
NB_SUSPENDACK_L
NB_PU_RESET
NB_THMO
NB_THMI
NB_PMR_OBSV
NB_INT_L
TP_DUMMY_B
TP_DUMMY_A
I2C_NB_C_SCL I2C_NB_C_SDA
NB_RST_L NB_PU_RST_L
NB_SUSPEND_REQ_L
I2C_NB_A_SCL
I2C_NB_B_SDA
I2C_NB_A_SDA
NB_SUSPEND_ACK_L
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
NB_VSP_CLK_VREF VOLTAGE=0.6V
NB_SUSPEND_REQ_L
SMU_SUSPENDREQ_L
PMU_SUSPEND_REQ
NB_RE_PD
TP_NB_PM_SLEEP0
JTAG_NB_TDO
I2C_NB_B_SCL
VSP_NB_CLK_N
VSP_NB_CLK_P
NB_RI_PU
JTAG_NB_TMS JTAG_NB_TRST_L
JTAG_NB_TDI
JTAG_NB_TCK
NB_TEST_PD NB_MC_PD
NB_PU_RST_L
NB_RST_LNB_RESET
SYS_COLD_RESET_L
C2400
1
2
R2400
1
2
R2403
1
2
R2418
1
2
R2419
1
2
Q2404
3
5
4
R2420
1
2
Q2404
6
2
1
Q2407
3
1
2
R2421
1
2
R2422
1
2
Q2408
3
1
2
Q2409
3
5
4
R2423
1
2
Q2409
6
2
1
Q2412
3
5
4
R2438
1
2
Q2412
6
2
1
R2424
1
2
R2426
1
2
R2429
1
2
R2431
1
2
R2433
1
2
R2436
1
2
R2442
1
2
R2443
1
2
R2444
1
2
R2405
1
2
R2406
1 2
R2407
1 2
R2408
1 2
U3
A20 B20
AD5 AD3
V25
AA25
M26 F20
R25
AC2
AH3
AC28 AB28
A21
E9
Y9
D15
E20 D20 D21
B21
E21
C20
C21
J17 J18
R4
P4
R2402
1
2
R2401
1
2
R2409
1 2
C2401
1
2
R2435
1
2
60
7
87 77 74 25
8
24 13
13
8
24
13
8
8
8
25
6
6
18
18
24
24
24
18
18
18
24
24
25 13
6
18
27
27
24 24
24 13
GND
PLL_49
GND
XTAL_18 PLL_45
GND
VIO PME
PLL_49
VDD
PLL_45
VDD
XGI
XTALS
TEST
PWR_MGT
PCI
GPIO
I2C
I2S2 I2S1 I2S0
(2 OF 8)
PCI1C_BE_4_L PCI1C_BE_5_L PCI1C_BE_6_L PCI1C_BE_7_L
PCI1PAR64_H
XGI_DTI_H
XGI_DTO1_H
XGI_CLK_H
XGI_DTO0_H
PCI1ACK64_L
PCI1REQ64_L
PCI1AD_60_H
PCI1AD_63_H
PCI1AD_62_H
PCI1AD_61_H
PCI1AD_50_H
PCI1AD_52_H PCI1AD_53_H
PCI1AD_51_H
PCI1AD_59_H
PCI1AD_58_H
PCI1AD_57_H
PCI1AD_56_H
PCI1AD_55_H
PCI1AD_54_H
PCI1AD_40_H PCI1AD_41_H PCI1AD_42_H PCI1AD_43_H PCI1AD_44_H
PCI1AD_49_H
PCI1AD_48_H
PCI1AD_47_H
PCI1AD_46_H
PCI1AD_45_H
PCI1AD_39_H
PCI1REQ_5_L
PCI1AD_32_H
PCI1AD_34_H
PCI1AD_38_H
PCI1AD_37_H
PCI1AD_36_H
PCI1AD_33_H
PCI1AD_35_H
PCI1GNT_5_L
PCI1GNT_4_L
PCI1REQ_4_L
PCI1GNT_3_L
PCI1REQ_3_L
XTAL_18XTAL
VDD VDD
FSTEST
XTAL_18_I XTAL_18_O
XTALI XTALO
PLLTEST
TEST_MODE_H
TDI
TCK TMS
TDO
INTRWD_H
I2CDATA_H
I2CCLK_H
PCI_SEL32BIT_H
GPIO_H_3
GPIO_H_2
GPIO_H_1
I2S2SYNC_H
I2S2BITCLK_H
I2S2MCLK_H
I2S2DTO_H
I2S2DTI_H
GPIO_H_0
I2S1DTO_H I2S1MCLK_H I2S1BITCLK_H I2S1SYNC_H
I2S1DTI_H
I2S0BITCLK_H I2S0SYNC_H
I2S0DTI_H I2S0DTO_H I2S0MCLK_H
RESET_L STOPXTALS_L SUSPENDREQ_L SUSPENDACK_L PCI1PME_L
TRST_L
DRAWING
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PCI 32-bit select
0 = 64-bit PCI & XGC
(I2S1_DEV_TO_SB_DTI)
(I2S1_RESET_L)
Re-pin within each RPAK as necessary
1 = 32-bit PCI & GPIOs
I2S2: S/P-DIF
(I2S2_DEV_TO_SB_DTI)
necessary pull-ups & pull-downs.
the audio circuit to provide the
NOTE: It is the responsibility of
AUDIO GPIOS
REDUNDANT - NEED TO ADDRESS THIS
REDUNDANT - NEED TO ADDRESS THIS
Master: Link
(Internal pull-up)
I2S0: Audio DAC
I2S1: Soft Modem
NET_SPACING_TYPE
ELECTRICAL_CONSTRAINT_SET
Page Notes
NorthBridge / SouthBridge MPIC Routing
Configures Shasta for 64-bit PCI
-> From NorthBridge
<- To CPU
From SouthBridge <-
GPIO
NC
BOM options provided by this page:
Power aliases required by this page:
26
(I2S0_DEV_TO_SB_DTI)
10
7
11
8
17
13 14 15 16
9
12
22 23
27
19
18
20
24 25
(SCCA)(SCCB)
31
33
30
28
34
36 37 38
43
42
41
44 45
47
46
39 40
53 54
50
51 52
49
48
(I2S2_RESET_L)
29
- _PP3V3_PCI
- _PP2V5_PWRON_SB
- PCI_64BIT
(NONE)
NOTE: XGC required for Shasta GPIOs
6
"Slot E" - AD21
"Slot F" - AD22
DO NOT swap between RPAKs
21
32
35
Signal aliases required by this page:
- _PP1V2_PWRON_SB
- _PP3V3_PWRON_SB
Shasta Serial / Misc
AUDIO GPIO - see note on right
FERR-EMI-600-OHM
SM
CERM 1206
6.3V
20%
10uF
10%
402
0.001uF
50V CERM
402
10%
0.001uF
50V CERM
10uF
1206
CERM
6.3V
20%
FERR-EMI-600-OHM
SM
FERR-EMI-600-OHM
SM
SM
FERR-EMI-600-OHM
10uF
1206
CERM
6.3V
20%
402
10%
0.001uF
50V
CERM
6.3V
20%
1206
CERM
10uF
CERM
402
10%
0.001uF
50V
NO STUFF
5%
1/16W
MF
402
4.7K
5%
PCI_64BIT
402
MF
1/16W
4.7K
CRITICAL
18.432M
8X4.5MM-SM
200
402
MF
1/16W
1%
5% 50V CERM 402
22pF
5%
50V
CERM
402
22pF
4.7K
1/16W
5%
402
MF
OMIT
SHASTA
BGA
V1.0
20% 10V CERM 402
0.1uF
1/16W
5%
10K
SM1
10K
1/16W
5%
SM1
10K
5%
SM1
1/16W
1/16W
5%
10K
SM1
5%
10K
1/16W
SM1
10K
5%
1/16W
SM1
5%
1/16W
10K
SM1
1/16W
5%
SM1
10K
10K
5%
1/16W
SM1
10K
SM1
1/16W
5%
10K
5%
1/16W
SM1
1/16W
10K
SM1
5%
10K
1/16W
5%
SM1
1/16W
SM1
5%
10K
10K
SM1
1/16W
5%
1/16W
5%
10K
SM1
402
5%
1/16W
MF
10K
402
5%
1/16W
MF
10K
MF
10K
5%
1/16W
402
402
10K
MF
1/16W
5%
402
10K
MF
1/16W
5%
402
10K
MF
1/16W
5%
402
5%
1/16W
MF
10K
402
5%
1/16W
MF
10K
10K
402
MF
1/16W
5%
5%
1/16W
MF
402
10K
1K
5%
1/16W
MF
402
1/16W
10K
402
MF
5%
1/16W
MF
5%
402
10K
10K
402
MF
1/16W
5%
NO STUFF
10K
402
MF
1/16W
5%
1/16W
10K
402
MF
5%
1K
5%
1/16W
MF
402
NO STUFF
402
NO STUFF
5%
1/16W
MF
10K
402
MF
1/16W
5%
1K
PP3V3_RUN
402
1/16W
5%
10K
MF
SM
2N3904
MPIC_SB
5%
1/16W
MF
402
10K
MPIC_SB
MPIC_NB
5%
1/16W
MF
402
0
5%
1/16W
MF
402
0
MPIC_SB
1/16W
SM1
33 5%
1/16W
5%
33
SM1
SM1
33 5%
1/16W
ABBREV=DRAWING
TITLE=FIZZY
051-6482
13
9925
JTAG_SB_TRST_L
I2S2_SYNC
I2S2_BIDIR
I2S1_TO_DEV
I2S1_MCLK I2S1_BITCLK
I2S1_BIDIR
I2S0_BITCLK
VOLTAGE=1.2V MIN_LINE_WIDTH=20 mil MIN_NECK_WIDTH=15 mil
PP1V2_PWRON_SB_PLL45VDD
VOLTAGE=1.2V MIN_LINE_WIDTH=20 mil MIN_NECK_WIDTH=15 mil
PP1V2_PWRON_SB_PLL49VDD
JTAG_SB_TMS
PP2V5_PWRON_SB_XTAL18VDD
VOLTAGE=2.5V MIN_LINE_WIDTH=20 mil MIN_NECK_WIDTH=15 mil
_PP2V5_PWRON_SB
I2S2_MCLK
AUDIO_SPKR_DET_L AUDIO_LO_MUTE_L
SB_GPIO52
SB_GPIO50
SMU_TO_SB_INT_L
SB_GPIO51
SB_GPIO47
SB_GPIO45
SB_GPIO49
SB_GPIO46
SB_GPIO25
SB_GPIO23
SB_GPIO30
SB_GPIO24
SB_GPIO12
PCI_SLOTC_INT_L
PCI_SLOTF_INT_L
PCI_SLOTB_INT_L
ENET_ENERGYDET
ENETFW_RESET
FW_LOWPWR
I2S1_RESET_L
SYS_SLEWING_L
MODEM_RING2SYS_L
UDASH_RESET_L
SB_TO_SMU_INT_L
SYS_OVERTEMP_L
CPU_SRESET_L
_PP3V3_PWRON_SB
_PP3V3_PWRON_SB
I2S0_MCLK
I2S0_TO_DEV
I2S0_BITCLK
I2S0_BIDIR
I2S1_SB_TO_DEV_DTO
I2S1_TO_DEV
SB_TEST_MODE_PD
SB_CLK18M_XTALO
15 MIL SPACING
SB_PCI_SEL32BIT_PP3V3_PWRON_SB
I2S1_RESET_L
I2S2_DEV_TO_SB_DTI
I2S1_DEV_TO_SB_DTI
I2S2_RESET_L
I2S0_DEV_TO_SB_DTI
I2S0_SYNC
I2S0_MCLK
I2S0_SB_TO_DEV_DTO
I2S1_SYNC
I2S1_BITCLK
I2S1_MCLK
I2S1_SB_TO_DEV_DTO
I2S2_SYNC
I2S2_SB_TO_DEV_DTO
I2S2_SYNC_R
I2S2_BITCLK_R
I2S2_MCLK_R
I2S2_SB_TO_DEV_DTO_R
I2S1_SYNC_R
I2S1_BITCLK_R
I2S1_MCLK_R
I2S1_SB_TO_DEV_DTO_R
I2S0_SYNC_R
I2S0_BITCLK_R
I2S0_MCLK_R
I2S0_SB_TO_DEV_DTO_R
I2S2_TO_DEV
I2S2_SB_TO_DEV_DTO
MIN_LINE_WIDTH=20 mil
PP2V5_PWRON_SB_XTALVDD
VOLTAGE=2.5V MIN_NECK_WIDTH=15 mil
I2S1_DEV_TO_SB_DTI
I2S1_TO_SB
I2S1_BIDIR
I2S1_SYNC
SB_CLK18M_XTAL
SB_CLK18M_XTALI
15 MIL SPACING
I2S2_DEV_TO_SB_DTI
I2S2_TO_SB
I2S0_SYNC
I2S0_BIDIR
I2S2_BIDIR
I2S2_BITCLK
I2S0_TO_DEV
I2S0_SB_TO_DEV_DTO
I2S2_TO_DEV
I2S2_MCLK
15 MIL SPACING
I2S0_TO_SB
I2S0_DEV_TO_SB_DTI
SB_INT_L
NB_INT_L
NB_INT_L_R
CPU_INT_L
NB_TO_SB_INT
SYS_PME_L
I2C_SB_SCL
SB_SUSPENDACK_L
SMU_SUSPENDREQ_L
SB_STOPXTALS_L
SB_INT_L MODEM_RING2SYS_L
I2C_SB_SDA
TP_SB_WATCHDOG
JTAG_SB_TCK
JTAG_SB_TDI
TP_SB_PLLTEST
SB_CLK25M_ATA
TP_SB_FSTEST
_PP3V3_PWRON_SB
_PP3V3_PCI
PCI_SLOTE_REQ_L
PCI_SLOTF_REQ_L
PCI_SLOTE_GNT_L
PCI_SLOTF_GNT_L
PCI_SLOTA_INT_L
PCI_SLOTE_INT_L
PCI_SLOTD_INT_L
PCI_SLOTG_INT_L
_PP1V2_PWRON_SB
JTAG_SB_TDO
SYS_WARM_RESET_L
SB_CLK18M_XTALI SB_CLK18M_XTALO_R
I2S2_BITCLK
SB_CLK18M_XTALO
AUDIO_GPIO_12
AUDIO_LO_METAL_PLUG_L
AUDIO_LO_DET_L
AUDIO_LI_DET_L AUDIO_LI_METAL_PLUG_L AUDIO_HP_DET_L
AUDIO_HP_MUTE_L
AUDIO_EXT_MCLK_SEL AUDIO_GPIO_11
SB_CLK25M_ATA
SB_CLK25M_ATA
15 MIL SPACING
PCI_SLOTE_GNT_L
PCI_SLOTE_REQ_L
PCI_SLOTF_REQ_L
SYS_OVERTEMP_L
CPU_SRESET_L
PCI_SLOTF_GNT_L
UDASH_SDOWN UDASH_RESET_L AGP_INT_L PCI_SLOTA_INT_L PCI_SLOTB_INT_L PCI_SLOTC_INT_L PCI_SLOTD_INT_L PCI_SLOTE_INT_L PCI_SLOTF_INT_L SB_GPIO23 SB_GPIO24 SB_GPIO25 SB_SATABR_RESET_L
SB_TO_SMU_INT_L
SB_GPIO12
PCI_SLOTG_INT_L FW_LOWPWR ENETFW_RESET SB_GPIO30
SB_GPIO45 SB_GPIO46 SB_GPIO47
SYS_SLEWING_L
SB_GPIO50
SB_GPIO49
SB_GPIO51 SB_GPIO52 NB_TO_SB_INT SMU_TO_SB_INT_L
ENET_ENERGYDET
I2S0_RESET_L
L2500
1 2
C2500
1
2
C2501
1
2
C2511
1
2
C2510
1
2
L2510
1 2
L2520
1 2
L2530
1 2
C2520
1
2
C2521
1
2
C2530
1
2
C2531
1
2
R2500
1
2
R2501
1
2
Y2590
1 2
R2590
1
2
C2591
1
2
C2590
1
2
R2580
1
2
U2300
V14
V5
Y2
AB3
W8
Y9
AB7
AA4
W7 Y5 U8
Y6
AA8
V10 AB5
V9
AA7
AB4
AA5
Y8 Y7
W9
V12
L17
D18 A20 F18 F17 G16 F16 A21 B21 C20 G17 G18 E19 F19 D20 E20 C21 F20 G19 C22 D21 G20 D22 K18 H19 J17 F21 G21 H20 J19 F22 G22 H21
J20 H22 K22 K20
AA19
AA20
Y20
E18
W18
K17
U17
AB21
U16
W6
U14
AB13 AA13
AA12
Y12
E9
W10
V11
U11
AB11
AA11
W11
A3
Y11
W12
W17
Y4
W2
U7 T9
U15 V15
W14
AB12
W13 V13
Y13
C2540
1
2
RP2551
3 6
RP2550
1 8
RP2550
4 5
RP2550
2 7
RP2551
1 8
RP2551
2 7
RP2551
4 5
RP2552
1 8
RP2550
3 6
RP2552
2 7
RP2552
4 5
RP2552
3 6
RP2553
2 7
RP2553
4 5
RP2553
1 8
RP2553
3 6
R2550
1 2
R2551
1 2
R2552
1 2
R2553
1 2
R2556
1 2
R2557
1 2
R2558
1 2
R2559
1 2
R2564
1 2
R2563
1 2
R2560
1 2
R2561
1 2
R2566
1 2
R2565
1 2
R2567
1 2
R2568
1 2
R2562
1 2
R2555
1 2
R2554
1 2
R2576
1
2
Q2576
1
3
2
R2575
1 2
R2579
1
2
R2578
1 2
RP2510
4 3 1 2
5 6 8 7
RP2530
4 3 2 1
5 6 7 8
RP2520
2 1 4 3
7 8 5 6
LAST_MODIFIED=Fri Nov 21 11:24:05 2003
8
99 25
94 25
6
94 25
6
95 25
8
88 74 23
7
99 25
99
96
97
25
25
25 13
25
25
25
25
25
25
25
25
25
25
25
25
25
87 25
87 25
90 25
94 25
6
25
33 27 25 13
94 25
6
94 25
6
25 13
36 27 25 16 13
30 29 25
25 23
7
25 23
7
95 25
95 25
94 76 25
6
25
25 23
7
94 25
6
99 25
94 76 25
6
99
95 25
95 25
95 25
95 25
94 25
6
94 25
6
94 25
6
94 76 25
6
99 25
99 25
99 25
94 76 25
6
94 25
6
25
99 25
95 25
99 25
95 25
99 25
25
95 25
25
24
30
29 14
25
77 13
18
13
24 13
13
25
94 25
6
18
8
8
6
27 25
6
25 23
7
77 76 75 74
7
25
25
25
25
76 25
6
25
25
77 25
7
8
87 77 74 24
8
25
25
99 25
25
98
98
98
6
98
99
99
99
99
99
27 25
25
25
25
36 27 25 16 13
30 29 25
25
94
6
94 25
6
49
76 25
6
25
25
25
25
25
25
25
25
25
25 13
25
77 25
90 25
87 25
25
25
25
25
33 27 25 13
25
25
25
25
25
25 13
87 25
95
SYM 2 OF 2
VDD33
VDD25 VDD25
VDD_PLL3
VDD_PLL2
VDD_PLL1
C4_VDD
C3_VDD
C2_VDD
VDD_PLL4
VDD_I2C VDD_NBSYNC VDD_PCLK
VDD33_BC VDD33_BC1
VDD_HCLK0
VDD_HSYNC
VDD_HCLK2
VDD_HCLK0
VDD_HCLK1 VDD_HCLK2
VDD_HSYNC
VDD15_HSYNC VDD15_PCLK
VDD_XTAL
VDD_VCLK
VSS_XTAL
VSS_VCLK
VSS_HSYNC
VSS_HCLK2
VSS_HCLK0 VSS_HCLK1 VSS_HCLK2
VSS_HSYNC
VSS_HCLK0
VSS33_BC1
VSS33_BC
VSS33
VSS_PCLK
VSS_NBSYNC
VSS25
VSS25
VSS_I2C
VSS_CML
VSS_PLL4
VSS_PLL3
VSS_PLL2
C2_VSS C3_VSS C4_VSS
VSS_PLL1
C1_VSSC1_VDD
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_5_ITEM
MASTER: GILA
IF 603 CAN BE PLACED CLOSE TO PULSAR
402 CAPS NOT NEEDED
PLACE NEAR PIN L8 K8
PLACE NEAR PIN M3 M2
PLACE NEAR PIN D2 D1
PULSAR POWER
CAN BE TURNED OFF IN SLEEP
PINS G12, M12, H3, K1, L5, M9, A11, A9 A8, C5, B4, K10, H12 J11, M11, A1
PLACE NEAR PIN D10 D12
4.7
MF
1/16W
5%
402
PP3V3_RUN
PP3V3_PWRON
CERM
20% 10V
402
0.1UF
402
4.7
5%
1/16W
MF
402
4.7
5%
1/16W
MF
0.1UF
402
10V
20% CERM
SM
FERR-250-OHM
CERM 402
10V
0.1UF
20%
0.1UF
CERM
20% 10V
402
FERR-250-OHM
SM
402
10V
20% CERM
0.1UF
SM
FERR-250-OHM
402
10V
20% CERM
0.1UF
FERR-250-OHM
SM
402
CERM
20% 10V
0.1UF
402
10V
20% CERM
0.1UF
0.1UF
402
10V
20% CERM
MF
1/16W
5%
4.7
402
SM
FERR-250-OHM
402
0.1UF
CERM
20% 10V
CERM
20% 10V
402
0.1UF 0.1UF
402
10V
20% CERM CERM
20% 10V
402
0.1UF
CERM
20% 10V
402
0.1UF
CERM
20% 10V
402
0.1UF
0.1UF
402
10V
20% CERM
0.1UF
402
10V
20% CERM
0.1UF
402
10V
20% CERM
0.1UF
402
10V
20% CERM
0.1UF
402
10V
20% CERM
0.1UF
402
10V
20% CERM
0.1UF
402
10V
20% CERM
0.1UF
402
10V
20% CERM
0.1UF
402
10V
20% CERM
0.1UF
402
10V
20% CERM
0.1UF
402
10V
20% CERM
0.1UF
402
10V
20% CERM
10V 402
20%
0.1UF
CERM CERM
20% 10V
402
0.1UF
CERM
20% 10V
402
0.1UF
402
0.1UF
10V
20% CERM
402
CERM
0.1UF
20% 10V
402
4.7
5%
1/16W
MF
603
10% CERM1
6.3V
2.2UF
603
10%
2.2UF
6.3V CERM1
603
10% CERM1
6.3V
2.2UF
603
10%
2.2UF
6.3V CERM1
603
10% CERM1
6.3V
2.2UF
PULSAR
OMIT
FSBGA
PP3V3_PWRON
PP3V3_PWRON
PP3V3_PWRON
PP3V3_RUN
9926
13
051-6482
PULSAR, PBGA
U2600
1
359S0076
PP1V2_PULSAR
PPVCORE_PULSAR
PP2V5_RAM
MIN_NECK_WIDTH=10MIL
PP1V5_PSL_PLL4
VOLTAGE=1.5V MIN_LINE_WIDTH=25MIL
PPVCORE_PULSAR
PPVCORE_PWRON_PULSAR
PPVCORE_PWRON_PULSAR
PP1V2_PULSAR
MIN_NECK_WIDTH=10MIL
PP1V5_PSL_PLL3
VOLTAGE=1.5V MIN_LINE_WIDTH=25MIL
PPVCORE_PWRON_PULSAR
PP1V2_PULSAR
MIN_NECK_WIDTH=10MIL
PP3V3_PSL_XTAL
MIN_LINE_WIDTH=25MIL
VOLTAGE=3.3V
PPVCORE_PULSAR
MIN_NECK_WIDTH=10MIL
PP1V5_PSL_PLL2
VOLTAGE=1.5V MIN_LINE_WIDTH=25MIL
PP2V5_RAM
MIN_NECK_WIDTH=10MIL
PP1V5_PSL_PLL1
VOLTAGE=1.5V MIN_LINE_WIDTH=25MIL
R2601
1 2
C2609
1
2
C2617
1
2
R2609
1 2
C2601
1
2
R2603
1 2
R2605
1 2
C2605
1
2
L2601
1 2
C2611
1
2
L2603
1 2
C2613
1
2
L2605
1 2
C2615
1
2
L2607
1 2
C2619
1
2
C2622
1
2
R2607
1 2
L2609
1 2
C2620
1
2
C2627
1
2
C2628
1
2
C2629
1
2
C2630
1
2
C2651
1
2
C2623
1
2
C2624
1
2
C2625
1
2
C2626
1
2
C2631
1
2
C2632
1
2
C2633
1
2
C2634
1
2
C2635
1
2
C2636
1
2
C2637
1
2
C2638
1
2
C2665
1
2
C2667
1
2
C2671
1
2
C2640
1
2
C2639
1
2
C2645
1
2
C2669
1
2
C2603
1
2
C2607
1
2
C2621
1
2
U2600
F1 G1 L3 M4
E12 E10
B9 C9
J11 M11
H3 K1
E1 L5 M9
A11
A9 A8 C5
B4 K10 H12
B2 G12 M12
D10
D2
L8
M3
A1 A12
L2 H2
E2 L7 M5
A6
C10 B11 B7 A4 A7 H10 K12
C2 F11 L12
D12 D1 K8 M2
A3 C12
26
7
26
7
37 26
7
26
7
26
7
26
7
26
7
26
7
26
7
26
7
37 26
7
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