Apple iMAC G5 A1058 SEEDY MLB 051-6772 Rev11 Schematic
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
78
6
5
4
3
ECN
ZONE
REV
DESCRIPTION OF CHANGE
SEEDY
11
365610
ENGINEERING RELEASED
12
CK
APPD
DATE
02/17/05
ENG
APPD
?
DATE
02/17/05
D
CSA
10
11
12
C
13
14
16
17
18 17
21
22
23
24
25
26
27
28
B
29
30
31
32
33
34
35
36
37
38
40
44
45
A
46
48
49
50
PDF
1
2
3
4
5
6
7 7
8
9
10
11
12
13
14
15
16
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
CIRCUIT
1
TABLE OF CONTENTS
2
SYSTEM BLOCK DIAGRAM
POWER BLOCK DIAGRAM
3
REVISION HISTORY
4
TABLE ITEMS
5
FUNC TEST
6
POWER CONNECTOR / POWER ALIAS
SIGNAL ALIAS
8
2.5V VREG
9
1.2V VREG
3.3V/5V PWRON SWITCHING
VESTA POWER
SMU
CPU LOGIC ANALYZER CONNECTOR
FAN 0, 1 AND SYSTEM TEMP SENSOR
FAN 2 AND HARD DRIVE TEMP SENSOR
I2C CONNECTIONS
INDICATOR LED / AMBIENT LIGHT SENSOR
1.5V VREG / U3LITE CORE
SHASTA CORE
U3LITE MISC
SHASTA SERIAL
PULSAR POWER
PULSAR CLOCKS
U3LITE APPLE PI
NEO APPLE PI
CPU STRAPS
NEO POWER & BYPASS
CPU BYPASS
CPU VREG
CPU VREG
CPU VREG OUTPUT CAPS
CPU DIODE CONDITIONER
U3LITE MEMORY
SERIES TERMINATION
DIMMS
PARALLEL TERMINATION
PARALLEL TERMINATION
VTT VREG
U3LITE AGP
GPU AGP
GRAPHICS VREGS
* PAGES WHERE MASTER PAGE IS IN A DIFFERENT SCHEMATIC
8
67
BLOCK
TOP
PROCESSOR
MEMORY
GRAPHICS
5
CSA
51
52
53
54
55
56
59
60
62
64
73
74
75
76
77
83
84
86
87
88
89
90
91
92
94
95*
96*
98*
100*
101*
102*
4
PDF
43
44
45
46
47
48
4958
50
51
52
53
54
55
56
57
58
5980
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
GPU CORE POWER
GPU FRAME BUFFER
FRAME BUFFER TERMINATION
GRAPHICS DDR SDRAM A
GRAPHICS DDR SDRAM B
GPU STRAPS
GPU DVI & DACS
EXT VGA & TMDS
U3LITE HYPERTRANSPORT
SHASTA HYPERTRANSPORT
HYPERTRANSPORT LA CONNECTORS
PCI SERIES TERMINATION
SHASTA PCI
BOOT ROM
AIRPORT EXTREME & BLUETOOTH
USB2 PCI
SHASTA DISK
DISK CONNECTORS
SHASTA ETHERNET
VESTA ETHERNET PHY
ETHERNET CONNECTOR
SHASTA FIREWIRE
VESTA FIREWIRE PHY
FIREWIRE CONNECTORS
USB HOST INTERFACE
USB DEVICE INTERFACE
MODEM CONNECTOR
PCM3052A AUDIO CODEC
LINE IN AMP
LINE OUT AMP
SPEAKER AMP
AUDIO CONNECTORS
AUDIO POWER SUPPLIES
DIMENSIONS ARE IN MILLIMETERS
X.XX
X.XXX
ANGLES
THIRD ANGLE PROJECTION
CIRCUIT
XX
DO NOT SCALE DRAWING
3
DRAFTER
ENG APPD
QA APPD
RELEASE
METRIC
MATERIAL/FINISH
NOTED AS
APPLICABLE
DESIGN CK
MFG APPD
DESIGNER
SCALE
NONE
SIZE
2
Apple Computer Inc.
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
TITLE
SCH,MLB,SEEDY
DRAWING NUMBER
D
051-6772
BLOCK
GRAPHICS
HT
PCI
DISK
ETHERNET
FIREWIRE
USB
MODEM
AUDIO
1
SHT
REV.
11
OF
1 102
D
C
B
A
FREQUENCIES LISTED ARE MAXIMUM DATA TRANSFER RATES SUPPORTED BY U3LITE
D
U5400, U5401
FRAME
BUFFER A
PAGE 54
U2600
PULSAR
POWER
C
PAGE 26
B
CLOCKS
PAGE 27
HARD DRIVE
FOR DEVELOPMENT ONLY
OPTICAL
78
64-BIT
FRAME BUFFER
2.6V/400MHZ
JXXXX
SATA
CONNECTOR
PAGE 83
J8302
SATA DEV
CONNECTOR
PAGE 83
J8301
UATA
CONNECTOR
PAGE 83
J5900, J5901
J5902, J5903
17",20" INVERTER
TMDS
EXT VGA
PAGE 59
U4900
GPU
RV351LE
PAGE 49
U5500, U5501
FRAME
BUFFER B
PAGE 55
SATA/150
1.2V/1.5GHZ
SATA/150
1.2V/1.5GHZ
UATA/133
3.3V/133MHZ
64-BIT
FRAME BUFFER
2.6V/400MHZ
6
32-BIT
8X AGP
0.8V/533MHZ
4X = 1.5V
I/O = 1.5V
U2900
CPU
NEO 10S
PAGE 29
APPLE PI
PAGE 28
U3
AGP
U3LITE
PAGE
48
HYPERTRANSPORT
MISC
PAGE 24
I2C
PAGE 18
SATA1 SATA2
PAGE 80 PAGE 80
ETHERNET FIREWIRE
PAGE 84
8-bit TX & 8-bit RX
GMII (3.3V/125MHz)
HYPERTRANSPORT
SATA
U2300
UATA
CORE
PAGE 23
PAGE 88
32-BIT
APPLE PI
ELASTIC INTERFACE
1.2V/900MHZ
CORE
PAGE 22
PAGE 60
J6400
J6401
J6402
HT
DEBUG
PAGE 64
PAGE 62
SHASTA
NCs
PAGE 91
1394 OHCI (3.3V/98MHz)
8-bit TX/RX
5
64/128-BIT
MAIN MEMORY
2.6V/400MHZ
PAGE 37
MAIN MEMORY
8-BIT
HYPERTRANSPORT
1.2V/800MHZ
CONTROL = 2.5V
I2S
PAGE 25
SCCA SCCB
I2S1
PAGE 74
PCI
PAGE 25
GPIO/PCI64
I2S2I2S0
SERIES
TERM
PAGE 38
U7500
BOOTROM
32-bit PCI (5V-3.3V/33MHz)
4
J4000
J4001
DIMMS
PAGE 40
J7600
AIRPORT
EXTREME
CONNECTOR
PAGE 76
J9401
CTL-LESS /
SOFT MODEM
CONNECTOR
PAGE 94
PAGES 44&45
1 2 3
U7700
USB 2.0
uPD720101
PARALLEL
TERM
USB
PAGE 91
PCI
PAGE 77PAGE 75
4 5
3
U1300
SMU
PAGE 13
U1301
RTC
PAGE 13
12
D
J9210/J9220/J9230
USB
CONNECTORS
PAGE 92
J9240
BLUETOOTH
CONNECTOR
PAGE 92
C
B
U9500
S/PDIF
AUDIO CODEC
U8600
VESTA
GIG ETHERNET
A
4 Diff pairs
J8700
ETHERNET
CONNECTOR
PAGE 87
8
67
FIREWIRE A
PAGE 89PAGE 86
1
0
2 Diff pairs
J9000, J9001
FIREWIRE A
CONNECTORS
PAGE 90
5
PCM3052A
LINE IN
AMP
PAGE 97
J9800
LINE IN
CONNECTOR
PAGE 98
PAGE 95
J9802
MIC
CONNECTOR
PAGE 98
LINE OUT
AMP
PAGE 97
SPEAKER
AMP
PAGE 97
4
OPTICAL OUT
J9803
COMBO OUT
CONNECTOR
PAGE 98
LINE OUT
J9801
SPEAKER
CONNECTOR
PAGE 98
SYSTEM BLOCK DIAGRAM
SYNC_MASTER=N/A
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6772
APPLE COMPUTER INC.
3
2
D
SCALE
NONE
SHT
2
1
SYNC_DATE=N/A
OF
102
A
REV.
11
78
6
5
4
3
12
D
C
B
J700
PAGE 7
PP24V_RUN
PP5V_RUN_AUDIO
PAGE 99
5V
PP4V5_RUN_AUDIO
PAGE 99
4.5V
FW CONN
20" LCD INVERTER
LINEAR
LINEAR
HP/LINEOUT AMP
AUDIO CODEC
PP12V_RUN
CPU CORE
SWITCHER
PAGE 33
0.8~1.2V
20" PANEL POWER
20" LCD INVERTER
SC2643VX*1
SC1211*4
GPUL
=PP5V_RUN_CPU
ALIAS
PP2V5_RUN
FET SWITCH
PAGE 9
PP1V8_GPU
LINEAR
PAGE 50
POWER CONNECTOR
PP5V_RUN
HDD & OPTICAL
31
8 7
6
CPU_AVDD_EN
RAM TERM
GRAPHIC FB
PP2V5_RUN_CPU_AVDD
31
LINEAR
PAGE 31
2.8V
1.53V
GPU
CPU AVDD
U3LITE CORE
SWITCHER
PAGE 22
PP1V25_RAM_VTT
PAGE 46
1.3V
PP5V_PWRON
FET SWITCH
PAGE 11
5V
IRU3037CS
U3LITE CORE
LINEAR
2.59V
RAM VTT
PP5V_ALL
3.3V
USB CONN
3.3V
PP2V5_PWRON
SWITCHER
PAGE 9
IRU3037CS
SHASTA HT
DDR DIMM
IN
1.5V
PP3V3_ALL
LINEAR
PAGE 11
FW PHY
SMU
PP3V3_PWRON
FET SWITCH
PAGE 11
ENET PHY
USB2 HOST
MODEM & BT
PP2V5_PWRON
IN
PP1V5_PWRON
LINEAR
PAGE 50
PULSAR CORE
PP1V5_RUN
POWER SW
PAGE 50
AGP BUS
GPU CORE
SWITCHER
PAGE 50
1.20V
IRU3037ACS
RV351
PP1V8_TPVDD
PAGE 50
LINEAR
SYS_POWERUP_L
PP3V3_RUN
PCI BUS
AUDIO CODEC
PP2V5_GPU_A2VDD
PAGE 50
PP1V5_VDDC_CT
LINEAR
PAGE 50
PAGE 10
1.2V
LINEAR
GPU
GPUGPU
PP1V2_PWRON
FET SWITCH
PAGE 10
SHASTA CORE
PWRON_SD
PWRON_DISK_SB
=PPVCORE_PWRON_SB
6 7
23
R340
100K
1/16W
MF-LF
402
PULSAR_POWER_DOWN
MAKE_BASE=TRUE
TP_SMU_PWRSEQ_P1_0
MAKE_BASE=TRUE
TURN_ON_PP1V2_PWRON_L
10 10
=PULSAR_POWER_DOWN
27
5V
PP1V2_ALL
SWITCHER
IRU3037ACS
VESTA CORE
IN IN
IN
21
5%
1
C340
0.01UF
20%
16V
2
CERM
402
IN
PP1V2_RUN
FET SWITCH
PAGE 10
COMPARE_PP2V5
PP5V_ALL
HT BUS
1
R342
150K
5%
1/16W
MF-LF
402
2
PS_2V_REF
1
R343
100K
5%
1/16W
MF-LF
402
2
SYS_POWERUP_L
POWER SEQUENCE PIN
SMU_PWRSEQ_P1_4
SMU_PWRSEQ_P1_0
SMU_PWRSEQ_P1_1
SMU_PWRSEQ_P9_5
SMU_PWRSEQ_P9_6
SMU_PWRSEQ_P1_2
R330
100K
5%
1/16W
MF-LF
402
3
V+
U1100
GND
12
LM339A
SOI
6
7
RAIL_CTL_NEG
11
21
COMPARE_SB_CORE
1
C330
0.01UF
20%
16V
2
CERM
402
PP3V3_ALL
1
13
13
13
13
13
13
SMU
PP3V3_ALL
8
9
1
R341
10K
5%
1/16W
MF-LF
402
2
PWR_GOOD_PP2V5
(PWR_GOOD_SB_CORE)
(PWR_GOOD_PP2V5)
(TURN_ON_VTT)
1
R331
10K
5%
1/16W
MF-LF
402
2
PWR_GOOD_SB_CORE
3
LM339A
SOI
V+
U1100
GND
12
D
C
14
B
TURN_ON_VTT
46
POWER BLOCK DIAGRAM
A
APPLE COMPUTER INC.
8
67
5
4
3
SYNC_MASTER=N/A
2
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
D
SCALE
DRAWING NUMBER
NONE
051-6772
SHT
3
1
SYNC_DATE=N/A
OF
102
A
REV.
11
78
6
5
4
3
12
DATE
10/20/04
10/21/04
D
10/22/04
10/26/04
10/28/04
11/01/04
C
11/03/04
11/04/04
11/06/04
B
11/07/04
11/08/04
11/09/04
A
11/10/04
DESCRIPTION
CLONED DESIGN FROM GILA (Q45 A/B) REV G
CHECKIN 00002
ADDED VESTA
ADDED 1.2V REGULATOR FOR VESTA CORE
ADDED 2.5V LDO FOR VESTA
ADDED FW LATE VG PROTECTION
REMOVED BCM5231 ETHERNET PHY
REMOVED FW802A FW PHY
REMOVED FW PORT POWER CIRCUITRY
REMOVED MICRODASH CONNECTOR
CHECKIN 00003
REMOVED NV18/34 GPU
REMOVED AGP VREG (VR5001)
REMOVED GPU VTT VREG
ADDED 2.5V VREG FOR A2VDD
REMOVED EXTERNAL TMDS TRANSMITTER
ADDED RV351LE GPU
CHECKIN 00004
GPU CORE POWER UPDATES
ADDED VESTA ETHERNET LOWPWR CIRCUIT
ADDED DEVELOPMENT LEDS FOR VESTA ENET
CHECKIN 00005
CONNECTED FRAME BUFFER
ADDED 1.8V GPU VREG
CONNECTED GPU TMDS AND VGA
CONNECTED GPU POWER AND POWER FILTERS
CHECKIN 00006
ADDED VOLTAGE, LINE WIDTH, AND NECK WIDTH PROPERTIES FOR GRAPHICS (IN MM)
TIED PPVCORE_NB DIRECTLY TO PP1V5_PWRON (REMOVED R707)
REPLACED EMC FERRITES WITH 0 OHM RESISTORS FOR GRAPHICS AND FANS
REMOVED VESTA CORE REGULATOR
REPURPOSED 1.2V REGULATOR FOR VESTA AND SHASTA
CHANGED FW LATE VG CIRCUITRY TO MATCH Q78 & Q86
CHECKIN 00007
<RADAR 3848831> MOVED SMU RESET BUTTON TO DEVELOPMENT BOM
<RADAR 3849762> MOVED SMU DOWNLOAD CONNECTOR TO DEVELOPMENT BOM
<RADAR 3849798> REDUCED CAPACITANCE OF C1100 & C1102
MASTER PAGE SYNC:
FRAME BUFFER SWAPS FOR CLEANER ROUTING
REMOVED VESTA ROM
AUDIO COST REDUCTIONS <RADAR 3849747 & 3849751>
AUDIO 3052A CODEC
ADDED 1.55V VREG FOR GPU VDDC_CT
MOVED VTT VREG TO 2.5V PWRON TO REDUCE CURRENT THROUGH Q903
CHANGED FETS IN GPU CORE FOR COST REDUCTION
ADDED SPACING & PHYSICAL CONSTRAINTS TO FRAME BUFFER
CHECKIN 00008
REMOVED 1.6GHZ PROCESSORS
CHANGED VOLTAGE SETTING OF 2.5V VREG TO 2.588V FROM 2.62V
1.2V VREG COST REDUCTIONS - Q1002 TO NTD60N02R; C1002/3 TO 10UF CERM
U2850 - REMOVED MAXIM AS AN ALTERNATE
MOVED GPU ZENER DIODES TO VREG PAGE SINCE THEY SHOULD BE PLACED NEAR THE VREGS
ADDED 8MX32 GRAPHICS MEMORY
ADDED GIGABIT ETHERNET CONNECTOR
CHECKIN 00009
ADDED GPU STRAPS
CONNECTED GPU GPIOS
REMOVED ON BOARD POWER SUPPLY TEMP SENSOR
ADDED AMBIENT LIGHT SENSOR CONNECTOR
CONNECTED GPU TEMP SENSOR
REMOVED CPU VREG 4TH PHASE
ADDED DEVELOPMENT LEDS TO REGULATORS
CHECKIN 00010
ADDED MORE GPU CONSTRAINTS
<RADAR 3616348, 3621390> CHANGED FL5900-2 TO 220 OHM
<RADAR 3848846> 2.5V RUN FET COST REDUCTION
<RADAR 3848859> 1.2V, 1.5V RUN FET COST REDUCTIONS
<RADAR 3848887> 5V & 3.3V PWRON FET COST REDUCTIONS
<RADAR 3849622> STUFFED AROUND TMDS FILTERS
<RADAR 3849656> STUFFED AROUND RGB FILTERS
<RADAR 3849806> CHEAPER SMU CRYSTAL
<RADAR 3849857> CHEAPER USB2 CRYSTAL
BOM RELEASE REV 01
FRAME BUFFER PIN SWAPS
<RADAR 3848846> UPDATE OF 2.5V RUN FET COST REDUCTION
<RADAR 3849743> ADDED RESISTORS TO STUFF AROUND USB FILTERS
CHECKIN 01001
<RADAR 3848850> REGULATOR COST REDUCTIONS
<RADAR 3849767> 2.5V VREG COST REDUCTIONS
<RADAR 3849772> REMOVED OUTPUT CAP ON 1.2V_ALL VREG
<RADAR 3849820> SHASTA FILTER COST REDUCTION
<RADAR 3849854> GPU CORE VREG COST REDUCTION
<RADAR 3865344> SET GPU VDDC_CT VREG TO 1.55V
CHECKIN 01002
CHANGED SOURCE OF Q1003 TO PP1V2_ALL
RGB TERMINATION NOW CONNECTED TO DIGITAL GROUND
WHITE LED - CHANGED INDUCTORS TO 0 OHM RESISTORS
UPDATED POWER BLOCK DIAGRAM
CHECKIN 01003
<RADAR 3848850> 2.5V VREG COST REDUCTION
CHECKIN 01004
P
11/15/04
11/16/04
11/18/04
11/20/04
11/22/04
11/23/04
12/02/04
12/07/04
re
12/09/04
12/13/04
12/14/04
12/15/04
ADDED REGULATOR FOR GPU TPVDD
ADDED POWER SEQUENCING FOR GRAPHICS REGULATORS
ADDED TEST POINTS TO GRAPHICS FOR EXOR TESTING
REMOVED EXTERNAL S/PDIF TRANSMITTER
CHECKIN 01005
REMOVED P50 AIRPORT AND Q23 BLUETOOTH CONNECTORS, HOLES, & STANDOFFS
ADDED Q85 AIRPORT & BLUETOOTH CONNECTOR
CHECKIN 01006
(PP 16,17) REPLACED FAN CONTROL WITH NEW CIRCUIT
(P 76) FINISHED CONNECTING Q85 CONNECTOR
(P 7) ADDED PLATED HOLE ZH710 FOR TMDS GROUNDING
(P 7) TIED BOTH EI RAILS TO 1.5V
(P 5) NEW BOOTROM P/N
(P 9) ADDED EXTRA 10UF INPUT CAP
(P 12) VESTA_ENET_LOWPWR UPDATE
(P 18) <RADAR 3878118> MOVED SMU I2C E BUS
(P 22) CHANGED Q2250 TO 376S0143
(P 46) SLEEP SIGNAL TURNS OFF VTT VREG
(P 58) REPLACED THERMAL SENSOR WITH LM63
(P 59) TIED UNUSED BUFFER ENABLE PINS HIGH
(P 90) FIXED FW PORT NAMING
(P 90) CHANGED R9090 TO 665 OHM
(P 91) CHANGED USB2 CHIP GROUNDING
(P 8) ALIASED VESTA JTAG TO TEST POINT NETS
(P 9) <RADAR 3848846> ADDED PAD FOR 1NF CAP TO GATE OF Q903
CHECKIN 01007 / BOM RELEASE REV 02
ADDED PHYSICAL CONSTRAINTS
AUDIO STUFFING CHANGES
CHECKIN 02001
(P 36) CONNECTED NEW CPU DIODE REFERENCE
(P 77) USB2 IDESEL - NOW FROM USB2 SIDE
(P 56) ADDED BOMOPTIONS FOR MEMORY STRAPS
(PP 56, 58) CONNECTED PWM FROM RV351LEP & PUT IN PROTO WORKAROUND
(P 25) <RADAR 3849835> NEW SHASTA XTAL
(P 62) <RADAR 3849855> SHASTA HT_PLL FILTER COST REDUCTION
(P 91) <RADAR 3849858> USB CAP COST REDUCTION
(P 76) ADDED STANDOFFS FOR Q85 CARD
(PP 16,17) NEW FAN CIRCUIT CAPS (C1603, C1653, C1703)
(P 50) <RADAR 3865344> VDDC_CT SET TO 1.50V
(P 50) <RADAR 3877855> TP_VDD SET TO 1.80V
(P 12) VESTA_ENET_LOWPWR UPDATE
(PP 10, 22, 34, 50) USED COMPARATOR FOR LOW VOLTAGE RAIL LEDS
CHECKIN 02002
(P 49) CONNECTED AGPTEST RESISTOR TO VDDP
(P 56) ADDED PADS FOR STRAPPING RESISTORS TO GPU_GPIO<14>
(P 58) ADDED CONSTRAINT SETS
(P 59) STUFFED AROUND Q5900 PANEL PWR SEQUENCING
(P 59) LED 3 NOW DRIVEN FROM FPD_PWR_ON
(P 3) CONNECTED SHASTA CORE POWER FOR POWER SEQUENCING
(P 76) FIXED PCI_CBE_L<1> CONNECTION
MORE PHYSICAL & SPACING UPDATES
(P 83) <RADAR 3890225> OPTICAL DRIVE CONNECTOR CHANGED TO 516S0235
CHECKIN 02003
(P 56) ADDED OPTION OF USING PWM FROM SHASTA
<RADAR 3849718, 3849767, 3849854> MADE ON & VISHAY FETS TRUE ALTERNATES
(P5) ADDED U3L W/ NEW LAMINATE AS ALTERNATE
(P 16) C1653 - REPLACED WITH LOWER HEIGHT CAP
CHECKIN 02004
(P 76) TABLED IN NEW STANDOFFS FOR Q85 CARD
PROTO RELEASE (REV 3)
(P 90) FIXED ALIAS PROBLEM WITH FW_TPB2_PD
(P 90) FIXED FW_CPS SHORT
l
(P 35) REMOVED DS3500 & DS3501
(P 83) REMOVED SECOND SATA CONNECTOR
CHECKIN 03001
CONVERTED DISCRETES TO LEAD FREE
CHECKIN 03002
CHANGED U7700 BACK TO LEADED PART
(P 5) REMOVED ORIGINAL U3LITE (NEW LAMINATE ONLY FOR C/D)
(P 49) CHANGED GPU TO RV351LEP (338S0231)
(P 76) NOW HAVE CORRECT SYMBOL FOR STANDOFFS
(P 76) J7650 - NEW TO ALLOW 5MM CONNECTED HEIGHT
BOM RELEASE REV 04
CHANGED ALIASES TO SYNONYMS
CHANGED LINE AND NECK WIDTHS TO METRTIC
CHECKIN 04001
ADDED 2.0 GHZ AND ADDITIONAL 1.8 GHZ ALTERNATE PROCESSORS TO PG. 5 TABLE
VESTA XTAL: R5815=249, R8609=332, R8921=332
VESTA ENET: R1262=10K, C1260=10U, R1251=NO STUFF, C1250=2.2U
FANS: NO STUFF DZ1601, DZ1651, DZ1701
STUFFED R1604, R1654, R1704
CHECKIN 04002
2.5 V REGULATOR - NEW NARROWER OUTPUT CAPS (C908, C909)
(P 46) REMOVED SEMTECH REGULATOR, ADDED RICHTEK AS ALTERNATE VTT
(P 16) CHANGED FAN1 OUTPUT CAP BACK TO THROUGH-HOLE
(P 59) SWAPPED INVERTER CONNECTOR GENDER
CHECKIN 04003
(P 46) RICHTEK VTT UPDATES
BOM RELEASE REV 5
(P 6) ADDED NO_TESET PROPERTIES
(P 12) VESTA ENET LOW POWER FIX
CHECKIN 05001
i
i
m
12/16/04
12/17/04
12/20/04
01/11/05
01/18/05
01/25/05
01/27/05
a
02/01/05
n
02/03/05
02/04/05
02/08/05
02/09/05
02/10/05
02/15/05
02/16/05
02/17/05
FIXED I2C_TMDS_SDA/SCL ON P 6
(P 46) NOSTUFF RICHTEK VTT VREG
(P 59) STUFFED TMDS CHOKES
(P 56) USING PWM FROM ATI GPU
(P 38) FIXED MIN_NECK_WIDTH ON TD1 AND TD2
(P 92) ADDED NET_PHYSICAL_TYPE = USB2 TO TABLE
(P 7) ADDED BATTERY SAFETY BYPASS OPTION (NOSTUFF)
CHECKIN 05002
(P 50) ADDED Q5000 TO INPUT OF GPU VCORE VREG
(P 6) REMOVED SOME FUNC_TEST PROPERTIES
(P 50) GPU_VDCC_CT POWER SEQUENCING
CHECKIN 05003
(P 6) ADDED/REMOVED MORE FUNC_TEST PROPERTIES
CHECKIN 05004
(P 50) GPU POWER SEQUENCING
CHECKIN 05005
MINOR TEXT/COMMENT CHANGES
EVT RELEASE (REV 6)
(P 5) REMOVED BRA FROM ALTERNATE PROCESSOR TABLE, REPLACED BPA WITH BNA
(P 5) NEW SMU PART NUMBER
CHANGED SDF7601 TO PART 860-0567
BOM RELEASE REV 7
(P 5) CORRECTED 1.8GHZ CPU APPLE P/N FROM 337S2969 TO 337S2998 ON ALTERNATE PROCESSOR TABLE
(P 12) NOSTUFF Q1250 TO DISCONNECT ENETFW_RESET FROM SHASTA GPIO
(P 5) CORRECTED SMU PART NUMBER TO 341T1703
(P 16, 17) HAROLD’S FAN CIRCUIT CHANGES
CHECKIN 07002
(P 25) REPLACED R2566 WITH 0 OHM TO ELIMINATE FW_LOWPWR GLITCH
ADDED 0 OHM (R2570, NOSTUFF) TO BREAK FW_LOWPWR FROM SHASTA
(P 56) STUFF R5610 TO PULL DOWN ATI_PWM SIGNAL TO ELIMINATE GLITCH
(P 27,28,29) CONNECTED CPU_APSYNC FROM U3LITE AND DISCONNECTED FROM PULSAR
(P 11) CHANGED C1102 TO 16V FOR SUPPLY AND COST ISSUES
(P 5) ADDED KQA (337S3093) TO ALTERNATE PROCESSOR TABLE
CHECKIN 07003
(P 5) MODIFIED PROCESSOR TABLE TO MATCH IBM’S TABLE, AGAIN.
BOM RELEASE REV 8
(P 75) BOOTROM REFLASHING ISSUE FIX: CHANGED R7502 TO 470 OHM
(P 12) ENET_LOWPWR GLITCH FIX:ADDED A CLAMP CIRCUIT FOR ENET_LOWPWR GLITCH
(P 10,22) SHASTA & U3LITE VCORE POWER IMPROVEMENT: STUFF C1005 AND C2205 WITH 2200PF CAPS
(P 13) CHANGED U1301 TO LEADED PART (353S0653) DUE TO SUPPLY
(P 5) ADDED 34S0284 AND 34S0282 AS U3LITE ALTERNATES (OLD LAM)
BOM RELEASE REV 9
(P 28) CHANGED APSYNC SERIES TERMINATION R2806 TO 10 OHM
(P 5) ADDED LEAD FREE PARTS AS ALTERNATE FOR U1301 & VRA201 DUE TO SUPPLY
(P 8) REMOVED SMU DOWNLOAD CONNECTOR FROM DEVELOPMENT BOM
(P 92) STUFFED USB COMMON MODE CHOKES FOR EMC
CHECKIN 09002
(P 50) <RADAR 3919121> NOSTUFF U5090 AND RELATED COMPONENTS, STUFFED R5092 FOR 1.5V GPU VDCC_CT
(P 7) REMOVED ZH701
(P 12) STUFF R1251, CHANGE C1250 TO 10UF, R1262=100K TO LENGTHEN VESTA RESET AND LOWPWR DELAY
(P 59) <RADAR 3849662> STUFFED PANEL POWER SEQUENCING FOR BOTH 17 AND 20 INCH
CHECKIN 09003
(P 92) <RADAR 3742725> CHANGED USB COMMON MODE CHOKES TO 120-OHM 155S0232
(P 59) NOSTUFF R5950, STUFF R5923 FOR 17 INCH PANEL POWER FROM PP3V3_RUN INSTEAD OF PP3V3_ALL
CHECKIN 09004
(P 59) <RADAR 3919083> CHANGED R5971 AND R5972 TO 33 OHMS
(P 56) <RADAR 3960901, 4000359> GPU GPIO GLITCH STUFFED: U5600, U5601, NOSTUFF: R5609, R5621
DVT RELEASE (REV 10)
(P 56) <RADAR 3960901, 4000359> GPU GPIO GLITCH STUFFED: C5600, C5601
(P 12) CHANGED C1250 TO 6.3V PART, TO MATCH A PART ALREADY ON THE BOM
(P 5) ADDED 353S0687 (LEADED) AS ALTERNATE FOR 353S0959 (LEAD FREE) U9800
ADDED PAGE TITLE PROPERTIES FOR SCHEMATIC REUSE WITH M23/M33
(P 12) YET ANOTHER VESTA RESET/LOWPWR STUFFING CHANGE
(P 16,17,36) ADDED SIGNAL ALIASES FOR SCHEMATIC REUSE WITH M23
(P 50) RE-STUFFED GPU 1.5V VDCC_CT BECAUSE OF LEAKAGE WORRIES
BOM RELEASE REV 11
ry
NO STUFF: R2768,R2772,R2805,R2910
STUFF: R2806,R2911
11
SYNC_MASTER=N/A
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6772
APPLE COMPUTER INC.
D
SCALE
NONE
SHT
4
SYNC_DATE=N/A
OF
102
D
C
B
A
REV.
11
8
67
5
4
3
2
1
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_11_HEAD
TABLE_11_HEAD
REFERENCE DESIGNATOR(S)
BOM OPTION
QTY
DESCRIPTION
VALUE VOLT. WATT.
TOL.PART #
PACKAGE
DEVICE
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_ALT_ITEM
TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_11_HEAD
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
ALTERNATES
ASICS
MISC PARTS
QUALIFIED
VOLTAGE
1.20V
1.25V
1.20V
1.25V
1.25V
1.25V
PROCESSORS
1.15V
337S3056 337S3055
IC,DD3.1,2.0G,KRA
CPU_2_0GHZ
U2900
DS1338, L-F PART
353S0653
U1301
353S0958
353S0959 MAX9722 LEAD
U9800
353S0687
378S0119
KINGBRIGHT LED
LED700,LED702,LED5900
378S0114
VPP1
1
062-2082
SPEC,VENDOR PACKAGING PROCEDURE
IC,DD3.0,1.8G,BPA
CPU_1_8GHZ
U2900
337S3060337S2969
337S3055337S3059
IC,DD3.0,2.0G,CRA
CPU_2_0GHZ
U2900
U2900
CPU_2_0GHZ
337S3058
IC,DD3.0,2.0G,CPA
337S3055
U2900
CPU_2_0GHZ
IC,DD3.1,2.0G,KQA
337S3093 337S3055
U3L,OLD LAM,300MM
343S0284 343S0320
U3
CBGA-576-1MM
IC,GPUL,DD3.1,2.0G,85C,KPA
337S3055
PROCESSOR
42W ?
U29001.20V
2.0GHZ
CPU_2_0GHZ
1
1
343S0324
U8600
IC,ASIC,VESTA,V1.3
U31
343S0320
IC,U3LITE,NEW LAM,300MM,PBGA
MECH17
CRITICAL
17_INCH_LCD
1
603-6015
HEAT SINK ASSEMBLY 17 IN
U3L,OLD LAM,200MM
343S0282U3343S0320
102
5
11
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
TABLE ITEMS
IC,GPUL,DD3.1,1.8G,85C,JPA
CBGA-576-1MM
PROCESSOR
1.8GHZ
1.20V
337S3060
CPU_1_8GHZ
U2900
?1 42W
IC,DD3.1,1.8G,JRA
337S3061
U2900
CPU_1_8GHZ
337S3060
U2900
CPU_1_8GHZ
337S3060337S2970
IC,DD3.0,1.8G,BRA
353S0733
VRA201
MAX8510,L-F PART
353S0960
MOSFET,N-CH,VISHAY
376S0207
Q3311,Q3321,Q3411
376S0146
820-1747
1
MLB1
PCB,FAB,MLB
LBL1
1
825-6447
BARCODE LABEL, MLB, Q45
051-6772 SCH1
1
PCB,SCHEM,MLB
1
U7500
341T1667
IC,FLASH,1MX8,3.3V,90NS
U1300
IC,SMU,Q45C/D
1
341T1703
376S0204
MOSFET,N-CH,VISHAY
Q3310,Q3320,Q3410
376S0130
MECH20
CRITICAL
1
20_INCH_LCD
603-6016
HEAT SINK ASSEMBLY 20 IN
U3
U3L,NEW LAM,200MM
343S0321 343S0320
343S0283
1
U2300
IC,ASIC,SHASTA,V1.1,PBGA
Preliminary
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
2 TEST POINTS
2 TEST POINTS
5 TEST POINTS
GENZ SHOULD USE J1400 FOR THE FOLLOWING NETS:
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
10 TEST POINTS
5 TEST POINTS
5 TEST POINTS
12 TEST POINTS
5 TEST POINTS
5 TEST POINTS
2 TEST POINTS
5 TEST POINTS
I307
I337
I338
I344
I345
I346
I347
I348
I349
I350
I354
I355
I356
I357
I358
I359
I360
I361
I362
I363
I364
I365
I371
I372
I373
I374
I375
I376
I377
I378
I379
I380
I381
I382
I383
I384
I385
I386
I387
I388
I389
I390
I391
I392
I393
I394
I395
I396
I397
I398
I399
I400
I401
I402
I403
I404
I405
I406
I407
I408
I428
I429
I430
I431
I432
I433
I434
I435
I436
I437
I438
I439
I440
I441
I442
I443
I444
PP5V_ALL
PP12V_RUN
PP5V_RUN
PP3V3_PWRON
PP5V_PWRON
PP2V5_RUN
PP1V5_RUN
PP1V2_PWRON
PP3V3_RUN
12 11
7
18 11 10
7
50 34 22 18 11 10
7
83
7
83
7
18 11
58 27 18 11
23
7 3
13
8 7
31
8 7 3
35 34 33
7
22
34 33
33
33
8 7
13
7
7
7
13
8
50 46 22 11 10
9 8
33 13 11 10
7
13
8
22
9
59 58
59 58
59 58
83 80
83 80
83 80
83 80
83
83 80
83 80
83 80
6
83 80
6
83 80
83
83
83
83
33
8
36
36
36
36 33
36
36 33
59
59
59
59
59 58
59
59
59
59
59
59
77 76 75 74 73
77 76 74 73
8
76 74
76 74
76 25
77 76 74 73
74 56
8
77 76 74 73
77 76 74 73
77 76 74 73
77 76 74 73
77 76 74 73
76 75 74
76
76 75 74
76 75 74
76
76 75
76
76
92
92
92
92
92
92
92
92
92
94 25
94 25
94 25
94 25
94 25
94 25
94 25
59
59
59
59
59
59
59
6
59
6
59
7
101
25
75
PP24V_RUN
36 31
I781
I782
I784
I785
I786
I787
I788
I789
I790
I791
I792
I793
I794
I795
I796
I797
I798
I799
I800
I801
I802
I803
I804
I805
I806
I807
I808
I809
I810
101
90
101
101
18 17
18 17
25 18
25 18
36 33 31
36 33 31
59
6
59
6
83
I824
I825
I826
I827
I828
I829
I830
I831
I832
I833
I834
I835
I836
I837
I838
I839
I840
I841
I842
I843
I844
I845
I846
I847
I848
I849
I850
I851
I852
I853
I854
I855
I856
I857
I858
I860
I861
I866
I867
I868
I869
I870
I871
I872
I873
I874
I875
I876
I878
I879
I880
I881
I882
I883
I884
I885
I886
I887
I888
I889
I890
I891
I892
I893
I894
I895
I896
I897
I898
I899
I900
I901
I902
I903
I904
I905
I906
I907
I908
I909
I910
I911
I912
I913
I914
I915
I916
I917
I918
I919
I920
I921
I922
I923
I924
I925
I926
I927
I928
I929
I930
I931
I932
I933
I934
I935
I936
I937
I938
I939
59
59
59
59
59
59 58
59 58
051-6772
102
6
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
FUNC TEST
PP5V_ALL
FUNC_TEST=YES
PP12V_RUN
FUNC_TEST=YES
PP5V_RUN
FUNC_TEST=YES
GND
FUNC_TEST=YES
PP3V3_PWRON
FUNC_TEST=YES
PP5V_PWRON
FUNC_TEST=YES
PP2V5_RUN
FUNC_TEST=YES
PP1V5_RUN
FUNC_TEST=YES
PP1V2_PWRON
FUNC_TEST=YES
FUNC_TEST=YES
PP3V3_RUN
PP24V_RUN
FUNC_TEST=YES
TP_NEC_NANDTEST
NO_TEST=YES
FUNC_TEST=YES
VGA_HSYNC_R
NO_TEST=YES
TP_SB_NC_U6
TP_SB_NC_V3
NO_TEST=YES
NO_TEST=YES
TP_SB_NC_V2
TP_SB_NC_V4
NO_TEST=YES
NO_TEST=YES
TP_SB_NC_Y1
TP_SATA_CLK25M
NO_TEST=YES
NO_TEST=YES
Q2202_DRAIN
NO_TEST=YES
R904_P2
NO_TEST=YES
U5000_SS
NO_TEST=YES
U5000_GATE_L
U5000_GATE_H
NO_TEST=YES
LED802_1
NO_TEST=YES
NO_TEST=YES
PCI_CLK66M_SB_INT_R
NO_TEST=YES
PN1
PCI_CLK_P4_R
NO_TEST=YES
PCI_CLK_P3_R
NO_TEST=YES
HT_CLK66M_SB_R
NO_TEST=YES
TP_USB2_PWREN<4>
NO_TEST=YES
NO_TEST=YES
TP_NEC_NTEST1
TP_PLS_TEST2
NO_TEST=YES
NO_TEST=YES
TP_SB_NC_P7
NO_TEST=YES
TP_SB_NC_T3
FUNC_TEST=YES
=PP12V_DISK
NO_TEST=YES
EI_CPU_SYNC_R
EI_NB_SYNC_R
NO_TEST=YES
NO_TEST=YES
RFBD<16>
FUNC_TEST=YES
U2200_FEEDBACK
NO_TEST=YES
U900_VC
NO_TEST=YES
U900_VC_D
UATA_DASP_L_DS
NO_TEST=YES
NO_TEST=YES
U900_VC_R
TP_PCI_CLK_P4
NO_TEST=YES
U900_COMP
NO_TEST=YES
NO_TEST=YES
U2200_VC
U2200_VC_D
NO_TEST=YES
U2200_VC_R
NO_TEST=YES
TP_USB2_PWREN<0>
NO_TEST=YES
TP_USB2_PWREN<1>
NO_TEST=YES
TP_SB_NC_T8
NO_TEST=YES
TP_SB_NC_T7
NO_TEST=YES
NO_TEST=YES
TP_SB_NC_T6
NO_TEST=YES
TP_NEC_SRDATA
NO_TEST=YES
TP_NEC_SMI_L
TP_USB2_PWREN<3>
NO_TEST=YES
NO_TEST=YES
TP_USB2_PWREN<2>
TP_PSYNCOUT
NO_TEST=YES
NO_TEST=YES
TP_PSRO2
NO_TEST=YES
TP_AFN
TP_ATTENTION
NO_TEST=YES
TP_AGP_MB_AGP8X_DET_L
NO_TEST=YES
Q803_B
NO_TEST=YES
LED801_1
NO_TEST=YES
PN3
NO_TEST=YES
NO_TEST=YES
Q801_B
NO_TEST=YES
Q802_E
Q1002_DRAIN
NO_TEST=YES
NO_TEST=YES
Q800_D
NO_TEST=YES
RFBD<33>
NO_TEST=YES
RFBD<32>
FUNC_TEST=YES
USB_BT_P
USB2_PORT2_P_F
FUNC_TEST=YES
SYS_POWER_BUTTON_L
FUNC_TEST=YES
FUNC_TEST=YES
VCORE_SENSE_GND
USB2_PORT1_N_F
FUNC_TEST=YES
USB2_PORT1_P_F
FUNC_TEST=YES
NO_TEST=YES
Q5001_GATE
NO_TEST=YES
U3410_DRN
NO_TEST=YES
U5000_VC
U5000_FEEDBACK
NO_TEST=YES
NO_TEST=YES
U5000_COMP
RFBD<48>
NO_TEST=YES
RFBD<49>
NO_TEST=YES
U2200_COMP
NO_TEST=YES
U2200_GATE_H
NO_TEST=YES
Q5002_DRAIN
NO_TEST=YES
U3310_DRN
NO_TEST=YES
U3320_DRN
NO_TEST=YES
U2200_SS
NO_TEST=YES
U2200_GATE_L
NO_TEST=YES
NO_TEST=YES
RFBD<38>
RFBD<46>
NO_TEST=YES
RFBD<30>
NO_TEST=YES
NO_TEST=YES
RFBD<47>
RFBD<45>
NO_TEST=YES
NO_TEST=YES
RFBD<42>
RFBD<43>
NO_TEST=YES
RFBD<37>
NO_TEST=YES
NO_TEST=YES
RFBD<35>
RFBD<28>
NO_TEST=YES
RFBD<29>
NO_TEST=YES
NO_TEST=YES
RFBD<26>
RFBD<25>
NO_TEST=YES
RFBD<24>
NO_TEST=YES
RFBD<22>
NO_TEST=YES
RFBD<23>
NO_TEST=YES
RFBD<21>
NO_TEST=YES
RFBD<18>
NO_TEST=YES
NO_TEST=YES
RFBD<19>
RFBD<13>
NO_TEST=YES
RFBD<14>
NO_TEST=YES
RFBD<11>
NO_TEST=YES
RFBD<12>
NO_TEST=YES
NO_TEST=YES
RFBD<9>
RFBD<7>
NO_TEST=YES
RFBD<8>
NO_TEST=YES
RFBD<4>
NO_TEST=YES
NO_TEST=YES
RFBD<6>
RFBD<3>
NO_TEST=YES
RFBD<2>
NO_TEST=YES
RFBD<1>
NO_TEST=YES
TP_SB_NC_Y3
NO_TEST=YES
NO_TEST=YES
TP_SB_FSTEST
NO_TEST=YES
TP_SB_NC_P8
FUNC_TEST=YES
INV_17_CUR_HI_F
FUNC_TEST=YES
TDIODE_NEG_FMAX
TP_NEC_TEB
NO_TEST=YES
NO_TEST=YES
TP_FBBCS1_L
TP_J4000_SJRESET_L
NO_TEST=YES
PLS_CLK_66M_0_R
NO_TEST=YES
AUD_4V5_FB
NO_TEST=YES
NO_TEST=YES
AGP_CLK66M_NB_R
NO_TEST=YES
ERROR_LED
HT_CLK66M_NB_R
NO_TEST=YES
TP_PSRO1
NO_TEST=YES
NO_TEST=YES
TP_SB_NC_R5
NO_TEST=YES
TP_VREF_CG
NO_TEST=YES
EI_CPU1_SYNC
NO_TEST=YES
TP_PROC_TRIGGER_OUT
NO_TEST=YES
SYNCENABLE
NO_TEST=YES
RI_L
NO_TEST=YES
MCP_L
NO_TEST=YES
I2C_SMU_A_SCL_OUT_L
NO_TEST=YES
I2C_SMU_A_SDA_OUT_L
NO_TEST=YES
EI_SE
NO_TEST=YES
EI_QREQ_L
NO_TEST=YES
EI_QACK_L
NO_TEST=YES
EI_CPU1_CLK_P
NO_TEST=YES
CPU_HRESET_L
NO_TEST=YES
CPU_INT_L
NO_TEST=YES
EI_CPU1_CLK_N
NO_TEST=YES
CPU1_HTBEN
NO_TEST=YES
CHKSTOP_L
NO_TEST=YES
EI_NB_TO_CPU_CLK_N
EI_NB_TO_CPU_SR_N<0..1>
NO_TEST=TRUE
EI_NB_TO_CPU_SR_P<0..1>
NO_TEST=TRUE
NO_TEST=YES
EI_CPU_TO_NB_CLK_N
NO_TEST=TRUE
EI_CPU_TO_NB_SR_N<0..1>
NO_TEST=TRUE
EI_CPU_TO_NB_AD<0..43>
FUNC_TEST=YES
SYS_POWERUP_L
=PP5V_RUN_CPU
FUNC_TEST=YES
PPVCORE_NB
FUNC_TEST=YES
PPVCORE_CPU
FUNC_TEST=YES
PP12V_CPU
FUNC_TEST=YES
VCORE_SENSE_VOUT
FUNC_TEST=YES
SMU_MANUAL_RESET_L
FUNC_TEST=YES
POWER_BUTTON_L
FUNC_TEST=YES
RESET_BUTTON_L
FUNC_TEST=YES
SMU_RESET_L
FUNC_TEST=YES
ANALOG_RED
FUNC_TEST=YES
ANALOG_GRN
FUNC_TEST=YES
ANALOG_BLU
FUNC_TEST=YES
AUDIO_LO_DET_L
FUNC_TEST=YES
FUNC_TEST=YES
ROM_WP_L
FUNC_TEST=TRUE
UATA_DD<15..0>
FUNC_TEST=TRUE
UATA_DA<2..0>
TP_RAM_CKE_R<3>
NO_TEST=YES
TP_RAM_CS_L_R<11>
NO_TEST=YES
FUNC_TEST=YES
AIRPORT_CLKRUN_L_PD
PCI_STOP_L
FUNC_TEST=YES
FUNC_TEST=YES
I2S1_RESET_L
USB2_PORT3_P_F
FUNC_TEST=YES
USB2_PORT3_N_F
FUNC_TEST=YES
USB2_PORT2_N_F
FUNC_TEST=YES
USB_BT_N
FUNC_TEST=YES
FUNC_TEST=YES
ROM_ONBOARD_CS_L
PCI_PAR
FUNC_TEST=YES
FUNC_TEST=YES
PCI_SLOTA_IDSEL
PCI_DEVSEL_L
FUNC_TEST=YES
AUD_MIC_IN_P_CONN
FUNC_TEST=TRUE
NO_TEST=YES
TP_RAM_CS_L_R<10>
NO_TEST=YES
TEK_HT_B12
NO_TEST=YES
TEK_HT_A12
TP_NB_PM_SLEEP0
NO_TEST=YES
TP_RAM_MUXEN4
NO_TEST=YES
TP_RAM_CS_L_R<3>
NO_TEST=YES
TP_RAM_CS_L_R<2>
NO_TEST=YES
NO_TEST=YES
TP_RAM_CKE_R<7>
TP_RAM_CKE_R<6>
NO_TEST=YES
NO_TEST=YES
TP_NEC_SRCLK
NO_TEST=YES
TP_NEC_TEST
NO_TEST=YES
TP_PLS_CLK_66M_0
NO_TEST=YES
TP_PLS_TEST3
TP_SB_PLLTEST
NO_TEST=YES
TP_NEC_AMC
NO_TEST=YES
RAM_CLK66M_NB_R
NO_TEST=YES
NO_TEST=YES
R2204_P2
NO_TEST=YES
TP_DUMMY_B
NO_TEST=YES
Q2201_GATE
TP_RAM_CKE_R<2>
NO_TEST=YES
NO_TEST=YES
TP_SB_NC_V1
NO_TEST=YES
TP_SB_NC_U5
TP_SB_NC_U4
NO_TEST=YES
TP_SB_NC_U3
NO_TEST=YES
TP_SB_NC_U2
NO_TEST=YES
TP_SB_NC_U1
NO_TEST=YES
NO_TEST=YES
TP_SB_NC_T5
NO_TEST=YES
TP_SB_NC_T1
NO_TEST=YES
TP_SB_NC_R8
NO_TEST=YES
TP_SB_NC_R7
TP_PLS_CLK_66M_1
NO_TEST=YES
Q902_DRAIN
NO_TEST=YES
Q901_GATE
NO_TEST=YES
Q802_B
NO_TEST=YES
TP_PLS_REF_CML
NO_TEST=YES
NO_TEST=YES
TP_SB_NC_R4
NO_TEST=YES
TP_SB_NC_T4
TP_DUMMY_A
NO_TEST=YES
TP_SB_NC_W3
NO_TEST=YES
TP_SB_NC_W1
NO_TEST=YES
TP_SB_NC_R3
NO_TEST=YES
NO_TEST=YES
TP_SB_NC_R6
NO_TEST=YES
TP_SB_NC_T2
TP_NEC_SRMOD
NO_TEST=YES
TP_PLS_TEST1
NO_TEST=YES
TP_NEC_SMC
NO_TEST=YES
Q800_G
NO_TEST=YES
PN2
NO_TEST=YES
NO_TEST=YES
HT_VREF_DEBUG
NO_TEST=YES
CPU_HTBEN_R
NO_TEST=YES
ITS_RUNNING
NO_TEST=YES
AGP_CLK66M_GPU_R
AGP_CLK66M_NB_R
NO_TEST=YES
RFBD<36>
NO_TEST=YES
NO_TEST=YES
RFBD<40>
TEK_HT_B10
NO_TEST=YES
TP_J4001_SJRESET_L
NO_TEST=YES
NO_TEST=YES
U900_GATE_L
NO_TEST=YES
U900_GATE_H
TEK_HT_A10
NO_TEST=YES
TEK_HT_A9
NO_TEST=YES
U2100_UNUSED
NO_TEST=YES
TP_RAM_MUXEN0
NO_TEST=YES
PP5V_USB2_PORT1_F
FUNC_TEST=YES
PP5V_USB2_PORT2_F
FUNC_TEST=YES
FUNC_TEST=YES
PP5V_USB2_PORT3_F
NO_TEST=YES
U1000_FEEDBACK
NO_TEST=YES
U900_SS
PLS_CLK_66M_1_R
NO_TEST=YES
NO_TEST=YES
TEK_HT_A7
NO_TEST=YES
EI_CPU_TO_NB_CLK_P
NO_TEST=TRUE
EI_CPU_TO_NB_SR_P<0..1>
EI_NB_TO_CPU_CLK_P
NO_TEST=YES
NO_TEST=TRUE
EI_NB_TO_CPU_AD<0..43>
NO_TEST=YES
SB_CLK25M_ATA_R
AUD_MIC_IN_N_CONN
FUNC_TEST=TRUE
FW_VP
FUNC_TEST=TRUE
GND_AUDIO_MIC_CONN
FUNC_TEST=TRUE
I2C_HD_TEMP_SCL
FUNC_TEST=TRUE
FUNC_TEST=TRUE
I2C_HD_TEMP_SDA
FUNC_TEST=TRUE
I2C_SB_SCL
FUNC_TEST=TRUE
I2C_SB_SDA
FUNC_TEST=TRUE
KPGND2
I2C_TMDS_SDA
FUNC_TEST=YES
FUNC_TEST=YES
CORE_ISNS_P
PP5V_AGP_RL
FUNC_TEST=YES
FUNC_TEST=YES
I2S1_DEV_TO_SB_DTI
ROM_WE_L
FUNC_TEST=YES
ROM_OE_L
FUNC_TEST=YES
ROM_CS_L
FUNC_TEST=YES
PCI_IRDY_L
FUNC_TEST=YES
FUNC_TEST=YES
PCI_TRDY_L
FUNC_TEST=YES
PCI_FRAME_L
FUNC_TEST=YES
PCI_RESET_L
FUNC_TEST=YES
PCI_SLOTA_INT_L
FUNC_TEST=YES
PCI_SLOTA_GNT_L
FUNC_TEST=YES
PCI_SLOTA_REQ_L
FUNC_TEST=YES
PCI_CLK33M_AIRPORT
FUNC_TEST=TRUE
PCI_CBE_L<3..0>
FUNC_TEST=TRUE
PCI_AD<31..0>
I2C_TMDS_SCL
FUNC_TEST=YES
KPVDD2
FUNC_TEST=TRUE
FUNC_TEST=YES
=PP5V_DISK
FUNC_TEST=YES
=PPVCORE_PWRON_SB
=PP3V3_ALL_SMU
FUNC_TEST=TRUE
FUNC_TEST=YES
SYS_SLEEP
FUNC_TEST=YES
SYS_POWERFAIL_L
FUNC_TEST=YES
U900_FEEDBACK
UATA_CS0_L
FUNC_TEST=YES
UATA_CS1_L
FUNC_TEST=YES
UATA_RESET_L
FUNC_TEST=YES
FUNC_TEST=YES
UATA_DSTROBE_R
UATA_STOPUATA_STOP
FUNC_TEST=YES
UATA_DMARQ_R
FUNC_TEST=YES
UATA_DMACK_L
FUNC_TEST=YES
FUNC_TEST=YES
UATA_INTRQ_R
UATA_IOCS16_PU
FUNC_TEST=YES
UATA_CSEL_PD
FUNC_TEST=YES
FUNC_TEST=TRUE
UATA_DASP_L
TDIODE_NEG
FUNC_TEST=YES
GND_17_INV
FUNC_TEST=YES
FUNC_TEST=YES
KPVDD2_FMAX
FUNC_TEST=YES
CORE_ISNS_M
FUNC_TEST=YES
TDIODE_POS_FMAX
FUNC_TEST=YES
KPGND2_FMAX
FUNC_TEST=TRUE
CPU_VID_R<5..0>
FUNC_TEST=YES
INV_17_LCD_PWM_F
TD2P
FUNC_TEST=YES
TCKP
FUNC_TEST=YES
GND_20_INV
FUNC_TEST=YES
FUNC_TEST=YES
INV_20_LCD_PWM_
PP24V_INV
FUNC_TEST=YES
FUNC_TEST=YES
I2S1_SB_TO_DEV_DTO
TD2M
FUNC_TEST=YES
TD1P
FUNC_TEST=YES
FUNC_TEST=YES
MODEM_RING2SYS_L
FUNC_TEST=YES
I2S1_MCLK
FUNC_TEST=YES
I2S1_BITCLK
I2S1_SYNC
FUNC_TEST=YES
SATA_CLK25M_R
NO_TEST=YES
UATA_HSTROBE
FUNC_TEST=YES
FUNC_TEST=YES
INV_20_CUR_HI_F
FUNC_TEST=YES
VGA_VSYNC_R
MON_DETECT
FUNC_TEST=YES
FILT_ANALOG_GRN
FUNC_TEST=YES
FUNC_TEST=YES
FILT_ANALOG_RED
I2C_TMDS_SCL
FUNC_TEST=YES
FUNC_TEST=YES
I2C_TMDS_SDA
FUNC_TEST=YES
TD0P
NO_TEST=YES
EI_CPU1_SYNC_R
NO_TEST=YES
CPU1_HTBEN_R
FUNC_TEST=YES
GND_CHASSIS_TMDS
FUNC_TEST=YES
FILT_ANALOG_BLU
FUNC_TEST=YES
TD0M
PPVCC_TMDS
FUNC_TEST=YES
FUNC_TEST=YES
PP3V3_DDC
TMDS_D1M
FUNC_TEST=YES
TMDS_CKM
FUNC_TEST=YES
30
30
30
30
30
18
18
29
29
29
30
29
29
29
29
29
29
29
29
29
29
29
29
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
27
27
29
29
29
29
14
14
28
28
28
27
29
25
27
14
28
28
28
28
28
28
27
54
54
28
28
28
28
27
27
77
91
91
91
91
91
27
22
9
50
50
50
8
27
33
27
27
27
92
77
27
91
91
27
27
53
9
9
83
9
8
9
22
22
22
92
92
91
91
91
77
77
92
92
29
29
29
29
48
8
8
34
8
8
10
8
53
53
50
34
50
50
50
53
53
22
22
50
33
33
22
22
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
91
25
91
77
52
40
27
102
6
8
27
29
91
48 14
14
14
14
14
13
13
14
14
14
14
14
14
14
14
8
14
14
14
14
14
14
8
8
8
64
64
24
8
8
8
8
8
77
77
27
27
25
77
27
22
24
22
8
91
91
91
91
91
91
91
91
91
91
27
9
9
8
27
91
91
24
91
91
91
91
91
77
27
77
8
33
64
27
7
27
6
53
53
64
40
9
9
64
64
21
8
10
9
27
64
14
14
14
14
27
27
14
14
Preliminary
125
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
SDF700 IS USED FOR CPU HEATSINK MOUNTING
RTC BATTERY
ALWAYS ON (TRICKLE)
805-5664
SILKSCREEN:POWER
ALL RAILS
ALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE)
SILKSCREEN:RUN
POWER
GND RAILS
PWRON RAILS
CHASSIS GND
SILKSCREEN:2
RUN RAILS
SMU RESET
SILKSCREEN:1
PIN 13,19,11,22 ARE DIFFERENCE FROM ATX .
RESET
ONLY ON IN RUN
516S0248
FOXCONN
P/N 518-0159
ON IN RUN AND SLEEP
PP5V_RUN
PP3V3_PWRON
PP1V5_PWRON
PP2V5_PWRON
PP1V2_PWRON
PP24V_RUN
PP5V_ALL
PP5V_ALL
PP3V3_RUN
PP2V5_RUN
PP5V_PWRON
PP1V5_RUN
PP5V_RUN
PP3V3_RUN
PP5V_RUN
PP12V_RUN
SM
21
XW700
SM
21
XW701
315R138
1
ZH700
SM
21
XW702
SM
21
XW703
0.1UF
20%
10V
CERM
402
2
1
C704
0.1UF
402
10V
20%
CERM
2
1
C705
PP12V_RUN
SM
SPST
43
21
SW702
1/16W
MF-LF
402
1K
5%
21
R713
SM
DEVELOPMENT
SPST
43
21
SW701
MF-LF
1/16W
1K
402
5%
DEVELOPMENT
21
R712
SM
SPST
DEVELOPMENT
43
21
SW700
7R4.15
1
ZH702
6.00MM-PTH
1
ZH703
1K
402
1/16W
5%
MF-LF
21
R702
SHLD-IO-CONN
Q45-TH1
4
32
1
SH700
B0530WXF
SOD-123
2 1
DS700
PP1V2_RUN
TSSOP
74LCX125
CRITICAL
3
14
17
2
U700
0.1UF
10V
CERM
20%
402
2
1
C700
SM
FERR-EMI-100-OHM
SYS_PWR_BTN_FILT
21
L700
SM
FERR-EMI-100-OHM
21
L701
GREEN
2.0X1.25A
DEVELOPMENT
2
1
LED701
GREEN
2.0X1.25A
2
1
LED702
PP3V3_PWRON
1/10W
603
330
MF-LF
5%
21
R700
2.0X1.25A
GREEN
2
1
LED700
CRITICAL
HM96110-P2
F-RT-TH
9
8
7
6
5
4
3
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
J700
SM
21
XW704
SM
21
XW705
SM
21
XW706
SM
21
XW707
NOSTUFF
TH
HSK-NUT-6.5MM
1
SDF700
PP12V_RUN
PP24V_RUN
PWR-BUTT
ST-SM3
CRITICAL
2
1
54
3
SW703
PP3V3_RUN
5%
0
NOSTUFF
MF-LF
1/8W
805
21
R720
315R138
1
ZH710
NOSTUFF
402
MF-LF
1/16W
5%
0
21
R703
603
330
1/10W
5%
MF-LF
21
R710
402
0.1UF
20%
CERM
10V
2
1
C703
603
MF-LF
5%
330
1/10W
DEVELOPMENT
21
R701
PP5V_ALL
TH
CRITICAL
BB10209-A5
1 2
J702
11
7
102
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
POWER CONN / ALIAS
VOLTAGE=0V
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
MAKE_BASE=TRUE
VOLTAGE=5V
PP5V_RUN
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=3.3V
VOLTAGE=1.5V
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
MAKE_BASE=TRUE
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.6MM
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.25MM
MAKE_BASE=TRUE
VOLTAGE=1.2V
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
MIN_LINE_WIDTH=0.6MM
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.25MM
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.6MM
VOLTAGE=5V
MIN_NECK_WIDTH=0.2MM
MAKE_BASE=TRUE
VOLTAGE=1.5V
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
MAKE_BASE=TRUE
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=12V
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=24V
MAKE_BASE=TRUE
VOLTAGE=3.3V
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.3MM
PP3V3_RUN
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
PP5V_ALL
MAKE_BASE=TRUE
VOLTAGE=0
GND_CHASSIS_20_INCH_INVERTER
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
MIN_NECK_WIDTH=0.2MM
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
PP3V3_ALL_RTC
VOLTAGE=3.3V
=PP5V_PWRON_VESTA
_PP5V_PWRON_USB
=PP5V_PWRON_CPU
=PPPCI64_PWRON_SB
=PPPCI32_PWRON_SB
=PP3V3_PWRON_USB
PP5V_AUDIO
=PP5V_PATA
=PP3V3_PWRON_RAM
=PP3V3_PWRON_VESTA
=PP3V3_PWRON_EI
=PP2V5_PWRON_SB
=PP2V5_PWRON_RAM
=PP2V5_PWRON_HT
=PP1V5_PWRON_NB_AVDD
=PP2V5_ENET
=PP3V3_PWRON_CPU
=PPVCORE_NB
ITS_RUNNING
=PP1V2_PWRON_SB
=PP1V2_PWRON_DISK_SB
SMU_MANUAL_RESET_L
RESET_BUTTON_L
SYS_POWER_BUTTON_L
ITS_PLUGGED_IN
=PP3V3_ALL_RTC
=PP1V2_PWRON_HT
PP3V3_ALL
GND_AUDIO_SPKRAMP
ITS_ALIVE
=PP24V_GRAPHICS
PP12V_AUDIO_SPKRAMP
=PPVCORE_CPU
MAKE_BASE=TRUE
PPVCORE_CPU
GND_AUDIO
SYS_POWER_BUTTON_L
SYS_RESET_BUTTON_L
VOLTAGE=0
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
GND_CHASSIS_17_INCH_INVERTER
=PP5V_ALL_CPU
=PPVCORE_PWRON_SB
PPVCORE_GPU
POWER_GOOD
PP12V_AUDIO_CODEC
=PP12V_RUN_CPU
=PP12V_AGP
SYS_POWERUP_L_BUF
=PP2V5_RUN_CPU
POWER_BUTTON_L
=PP5V_DISK
GND_SYS_PWR_BTN_FILT
=PP5V_AGP
=PP1V2_EI_NB
=PP1V2_EI_CPU
=PPVCORE_PULSAR
=PP2V5_RUN_RAM
=PP5V_RUN_CPU
=PP1V2_HT
=PP1V2_PULSAR
PP2V5_GPU
PP3V3_VESTA
=PP3V3_ENETFW
=PP3V3_FW
=PP3V3_ENET
=PP3V3_ALL_CPU
MAKE_BASE=TRUE
PP3V3_ALL
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
PP1V2_VESTA
GND_CHASSIS_AUDIO_EXTERNAL
VOLTAGE=0
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
=PP3V3_ALL_SMU
VOLTAGE=1.2V
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
PP1V2_ALL
=PP1V2_ENETFW
MAKE_BASE=TRUE
GND_CHASSIS_AUDIO_INTERNAL
PP3V3_AUDIO
=PPVIO_PCI_USB2
=PP3V3_SB_PCI
=PP3V3_RUN_CPU
=PP3V3_PCI
=PP3V3_PATA
=PP3V3_DISK
=PP3V3_AGP
_PP3V3_PWRON_MODEM
_PP3V3_PWRON_BT
=PP3V3_PWRON_SB
=PPVCORE_PWRON_PULSAR
VOLTAGE=3.3V
PP3V3_ALL_BATT_SAFETY
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
PP3V3_ALL_BATT
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=3.3V
=PP12V_DISK
=PP2V5_HT
GND_CHASSIS_LED
GND_CHASSIS_VGA
MIN_LINE_WIDTH=0.6MM
VOLTAGE=0
GND_CHASSIS_RJ45
MIN_NECK_WIDTH=0.25MM
VOLTAGE=0
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
GND_CHASSIS_TMDS
GND_CHASSIS_FIREWIRE
GND_CHASSIS_USB
=PP1V5_AGP
SYS_POWERUP_L
50 34 59 22
31
77
58
33
18
18
88
46
60
36
35
30
31
102
76
56
13
11
11
12
74
40
48
13
59
32
34
13
23
51
28
29
8
55
59 13
101
75
50
74
50
11
10
10
11
25
37
37
8
7
11
102
31
33
7
6
50
59
83
59
18
18
45
6
60
54
90
87
11
102
8
89
100
74
49
25
83
64
59
49
10
6
6
6
59
12
92
36
23
23
91
101
83
46
12
28
23
26
62
28
87
36
22
6
25
80
6
6
6
13
62
7
100
59
100
29
6
102
6
13
59
36
3
22
8
102
33
50
31
6
6
50
14
14
26
44
3
24
26
52
12
89
89
86
36
7
12
101
6
10
86
101
95
77
74
33
25
83
83
48
94
76
23
26
6
60
21
59
87
6
90
92
48
6
Preliminary
125
125
125
G
D
S
MC33465N_30ATR
RESETDELAY
VCC
GND
VOLTAGE DETECTOR
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
CPU VID<0:5>
CHKSTOP LED
THESE PINS HAVE INTERNAL PULLUPS
NET_SPACING_TYPE
ELECTRICAL_CONSTRAINT_SET
DIAG LED
SMU
PCI CLOCKS
PULL DOWN
SHASTA JTAG
CONNECTION
SIGNAL FROM POWER SUPPLY
518S0104
PLL LOCK LED
SMU ANALOG VREF
2.2V FOR CPU VRM10.
NOTE:PULL UP CPU_VID<5>TO
VID CONTROLLED BY SMU
DIFFERENTIAL_PAIR
PULSAR ERROR_L LEDBACKUP SMU RESET CIRCUIT
518-0158
J802 & R826 CAN MOVE TO DEVELOPMENT BOM POST RAMP
POWER_GOOD IS A 5V DRIVEN
2K PULLUP INSIDE P/S
POWER_FAIL_L
SDF700 IS ALSO
USED FOR HEATSINK
MOUNTING
CPU HEATSINK SMT NUTS
(SMU_BOOT_EPM)
VESTA JTAG
CONNECTOR
DOWNLOAD
5%
402
MF-LF
10K
1/16W
2
1
R825
100
5%
1/16W
MF-LF
402
2 1
R826
402
MF-LF
1/16W
0
5%
21
R802
5%
10K
402
MF-LF
1/16W
2
1
R803
402
MF-LF
1/16W
5%
10K
NOSTUFF
2
1
R807
MF-LF
10K
1/16W
402
5%
2
1
R806
NOSTUFF
0
402
5%
1/16W
MF-LF
21
R828
74LCX125
TSSOP
6
14
47
5
U700
74LCX125
TSSOP
8
14
10
7
9
U700
TSSOP
74LCX125
11
14
13
7
12
U700
4.7K
5%
1/16W
MF-LF
402
2
1
R870
PP2V5_PWRON
10K
5%
1/16W
MF-LF
402
2
1
R814
402
MF-LF
5%
10K
1/16W
2
1
R816
402
MF-LF
1/16W
5%
10K
2
1
R817
5%
1/16W
MF-LF
402
10K
2
1
R808
5%
402
10K
MF-LF
1/16W
2
1
R809
402
1K
MF-LF
1/16W
5%
NOSTUFF
2
1
R827
402
MF-LF
5%
1K
NOSTUFF
1/16W
2
1
R829
402
MF-LF
5%
1K
NOSTUFF
1/16W
2
1
R830
402
MF-LF
1/16W
5%
1K
NOSTUFF
2
1
R831
PP3V3_RUN
402
10K
5%
1/16W
MF-LF
2
1
R804
402
20K
5%
1/16W
MF-LF
2
1
R811
NOSTUFF
HSK-NUT-6.5MM
TH
1
SDF800
TH
NOSTUFF
HSK-NUT-6.5MM
1
SDF801
HSK-NUT-6.5MM
TH
NOSTUFF
1
SDF803
TH
NOSTUFF
HSK-NUT-6.5MM
1
SDF802
RED
SM
DEVELOPMENT
2
1
D810
OMIT
6P15R5P4
1
ZH804
CERM
16V
20%
0.01UF
402
2
1
C880
CERM
16V
20%
0.01UF
402
2
1
C881
16V
CERM
20%
0.01UF
402
2
1
C882
CERM
16V
20%
0.01UF
402
2
1
C883
402
0.01UF
20%
16V
CERM
2
1
C884
DEVELOPMENT
5%
1/16W
MF-LF
402
180
2
1
R833
DEVELOPMENT
SM
RED
2
1
LED801
Q800_D
DEVELOPMENT
SOT23-LF
2N7002
2
1
3
Q800
DEVELOPMENT
5%
402
MF-LF
1/16W
180
2
1
R834
Q801_B
DEVELOPMENT
SOT23
2N3904LF
2
3
1
Q801
2N3906
DEVELOPMENT
SM
2
3
1
Q802
MF-LF
1/16W
180
5%
DEVELOPMENT
402
2
1
R835
5%
DEVELOPMENT
402
MF-LF
1/16W
180
21
R836
DEVELOPMENT
2.0X1.25A
GREEN
2
1
LED802
DEVELOPMENT
1/16W
5%
402
MF-LF
180
2
1
R837
5%
1/16W
MF-LF
402
DEVELOPMENT
1K
2
1
R838
DEVELOPMENT
SOT23
2N3904LF
2
3
1
Q803
DEVELOPMENT
5%
402
MF-LF
1/16W
180
21
R839
402
MF-LF
1/16W
5%
NOSTUFF
1K
2
1
R832
I246
I247
SM
RED
2
1
LED850
SOT23
2N3904LF
2
3
1
Q850
5%
MF-LF
402
1/16W
1K
21
R851
PP5V_ALL
1/16W
MF-LF
5%
402
180
2
1
R850
MF-LF
5%
430
1/16W
402
2
1
R813
1/16W
4.7K
5%
402
MF-LF
2
1
R860
1/16W
NOSTUFF
1K
MF-LF
5%
402
2
1
R890
NOSTUFF
CERM
1uF
10%
6.3V
402
2
1
C891
SM
NOSTUFF
2
1
3
5
U890
0.01UF
NOSTUFF
402
10%
16V
CERM
2
1
C890
402
MF-LF
5%
0
1/16W
21
R810
NOSTUFF
402
CERM
20%
10V
0.1uF
2
1
C800
M-ST-TH
HC17051
9
87
65
43
2
10
1
J802
5%
1/16W
10K
MF-LF
402
2
1
R840
5%
MF-LF
1/16W
402
0
NOSTUFF
2
1
R805
PP3V3_ALL
U.FL-R_SMT
DEVELOPMENT
F-ST-SM
1
2
3
J800
PP3V3_ALL
NOSTUFF
5%
402
MF-LF
10K
1/16W
2
1
R812
2.5V
SSOT-23
NOSTUFF
3
12
VR801
NOSTUFF
200
1/16W
MF-LF
402
1%
2
1
R818
NOSTUFF
2.2UF
20%
10V
CERM
805
2
1
C801
NOSTUFF
CERM
10V
20%
0.47UF
603
2
1
C802
BM12B-SRSS-TB
NOSTUFF
F-ST-SM
9876543
2
121110
11314
J803
1/16W
5%
0
MF-LF
402
21
R819
MF-LF
402
0
5%
1/16W
21
R820
1/16W
0
MF-LF
5%
402
21
R821
402
MF-LF
1/16W
5%
0
21
R822
0
1/16W
MF-LF
5%
402
21
R823
0
1/16W
MF-LF
5%
402
21
R824
4.7K
DEVELOPMENT
5%
402
MF-LF
1/16W
2
1
R801
DEVELOPMENT
MF-LF
330
402
1/16W
5%
2
1
R800
PP3V3_RUN
051-6772
102
8
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
SIGNAL ALIAS
J802_6
SMU_MANUAL_RESET_L
SMU_BOOT_TXD
SMU_MANUAL_RESET_L
CPU_VID_R<4>
CPU_VID_R<1>
MAKE_BASE=TRUE
TP_NB_THMI
MAKE_BASE=TRUE
TP_RAM_CKE_R<2>
MAKE_BASE=TRUE
TP_RAM_CKE_R<6>
MAKE_BASE=TRUE
TP_RAM_MUXEN0
MAKE_BASE=TRUE
TP_RAM_MUXEN4
RAM_CS_L_R<2>
RAM_CS_L_R<3>
SMU_BOOT_RXD
SMU_BOOT_BUSY
MAKE_BASE=TRUE
PPVREF_SMU
SMU_BOOT_CNVSS
CPU_VID_R<3>
CPU_VID_R<2>
J802_2
NB_SUSPEND_ACK_L
=PP3V3_ALL_SMU
=PCI_USB2_RESET_L
CPU_VID_R<0>
CPU_VID_R<5>
MAKE_BASE=TRUE
PCI_RESET_L
PCI_CLK_GP0
CPU_VID<4>
CPU_VID<2>
CPU_VID<0>
CPU_VID<5>
CPU_VID<3>
CPU_VID<1>
DIAG_LED
MAKE_BASE=TRUE
DIAG_LED_R
LED850P2
LED850P1
=PP5V_RUN_CPU
NB_SUSPENDACK_L
SYS_SLEEP
SMU_WARM_RESET_L SYS_WARM_RESET_L
=PPVREF_SMU
PP3V3_ALL_SMU_AVCC
Q802_E
HS_SDF803
HS_SDF800 HS_SDF801 HS_SDF802
GND_SMU_AVSS
Q803_C
LED802_1
Q800_G
LED801_1
NB_PMR_OBSV
GND_SMU_AVSS_DAGND
PPVREF_SMU_ADC_REF
SMU_SLEEP
Q802_B
PLLLOCK
HS_SDF804
=PP5V_RUN_CPU
POWER_GOOD
SYS_POWERFAIL_L
CHKSTOP_L
JTAG_SB_TRST_L
SMU_RESET_L
ERROR_LED
CLOCK_ERROR_L
PCI_CLK_P3
_PCI_CLK33M_AIRPORT
NB_THMI
MAKE_BASE=TRUE
TP_THMO NB_THMO
RAM_CKE_R<2>
MAKE_BASE=TRUE
TP_RAM_CKE_R<3>
RAM_CKE_R<3>
RAM_CKE_R<6>
TP_RAM_CKE_R<7>
MAKE_BASE=TRUE
RAM_CKE_R<7>
RAM_MUXEN0
RAM_CS_L_R<11>
MAKE_BASE=TRUE
PCI_CLK33M_AIRPORT
=PCI_CLK33M_USB2
MAKE_BASE=TRUE
PCI_CLK33M_USB2
RAM_MUXEN4
MAKE_BASE=TRUE
TP_PCI_CLK_GP1
PCI_CLK_GP1
PCI_CLK_P4
MAKE_BASE=TRUE
TP_PCI_CLK_P4
MAKE_BASE=TRUE
PCI_CLK33M_SB_EXT
PCI_CLK_P1
RAM_CS_L_R<10>
MAKE_BASE=TRUE
TP_RAM_CS_L_R<3>
MAKE_BASE=TRUE
TP_RAM_CS_L_R<2>
MAKE_BASE=TRUE
TP_RAM_CS_L_R<10>
TP_ALS0_OUT
MAKE_BASE=TRUE
ALS0_OUT
ALS1_OUT
TP_ALS1_OUT
MAKE_BASE=TRUE
MAKE_BASE=TRUE
TP_ALS_GAIN_BOOST
ALS_GAIN_BOOST
SMU_ONEWIRE
TP_SMU_ONEWIRE
MAKE_BASE=TRUE
SYS_SLOT_PWR
TP_SYS_SLOT_PWR
MAKE_BASE=TRUE
MAKE_BASE=TRUE
TP_RAM_CS_L_R<11>
TP_SMU_PWRSEQ_P1_3
MAKE_BASE=TRUE
SMU_PWRSEQ_P1_3
SYS_DOOR_AJAR_L
TP_SYS_DOOR_AJAR_L
MAKE_BASE=TRUE
MAKE_BASE=TRUE
TP_FAN_PWM8
FAN_PWM8
TP_SYS_DRIVE_BAY_INT_L
MAKE_BASE=TRUE
SMU_WARM_RESET_L
MAKE_BASE=TRUE
SYS_DRIVE_BAY_INT_L
NB_WARM_RESET_L
PCI_AIRPORT_RESET_L
GPU_RESET_L
=PCI_ROM_RESET_L
SYS_WARM_RESET_L
SMU_RESET
P25MM
SYS_COLD_RESET_L
SMU_RESET
P25MM
Q803_B
MAKE_BASE=TRUE
JTAG_VESTA_TRST_L
=JTAG_VESTA_TRST_L
=JTAG_VESTA_TCK
MAKE_BASE=TRUE
TP_JTAG_VESTA_TCK
MAKE_BASE=TRUE
TP_JTAG_VESTA_TDI
=JTAG_VESTA_TDI
=JTAG_VESTA_TDO
MAKE_BASE=TRUE
TP_JTAG_VESTA_TDO
MAKE_BASE=TRUE
TP_JTAG_VESTA_TMS
=JTAG_VESTA_TMS
JTAG_SB_TCK
JTAG_SB_TDI
MAKE_BASE=TRUE
TP_JTAG_SB_TDI
MAKE_BASE=TRUE
TP_JTAG_SB_TDO
JTAG_SB_TDO
JTAG_SB_TMS
MAKE_BASE=TRUE
TP_JTAG_SB_TMS
MAKE_BASE=TRUE
TP_JTAG_SB_TCK
SMU_BOOT_SCLK
SMU_BOOT_CE
50 46
31
22
31
8
11
77
8
77
8
8
13
74
7
10
74
36
7
29
74
7
7
33
33
33
33
7
33
33
56
6
9
13 25
33
6
13
14
13
74
13
25
24
6
6
6
13
6
6
6
6
6
6
6
37
37
13
13
13
6
6
24
6
77
6
6
6
27
13
13
13
13
13
13
13
3
13
6
8 8
13
13
6
13
6 6
6
24
36
36
13
6
29
3
7
6
6
25
6
6
27
27
76
24
24
37
6
37
37
6
37
37
37
6
77
37
27
27
6
27 27
37
6
6
6
13
13
13
13
13
6
13
13
13
8
13
24
76
49
75
8
13
12
12
12
12
12
25
25
25
25
13
13
Preliminary
FB
LD
HD
GND
COMP
SS
VCC
VC
G
D
S
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
U900_FEEDBACK
12.68A WITH DIMM TERMINATION
9.24A WITHOUT DIMM TERMINATION
PEAK CURRENT OF TOTAL RAILS
NOTE:
SET OUTPUT=2.588V FOR FRAMEBUFFER.
VOUT=VREF*(R903+R905)/R905=2.588VDC
IRU3037CS VREF=1.25VDC
2.5V VOLTAGE REGULATOR
HIGH TO ENABLE
MF-LF
5%
1/8W
805
0
21
R902
402
1%
10K
1/16W
MF-LF
2
1
R905
1/4W
1206
MF-LF
5%
1.1K
NOSTUFF
2
1
R904
1206
20%
6.3V
10UF
CERM
2
1
C901
PP5V_PWRON
25V
20%
1UF
CERM
805
2
1
C904
PP5V_PWRON
SOD-123
MBR0520LXXG
2 1
D900
MBR0520LXXG
SOD-123
2 1
D901
SOD-123
MBR0520LXXG
2
1
D902
1UF
20%
10V
CERM
603
2
1
C917
CERM
50V
5%
603
2200PF
2
1
C905
1UF
20%
25V
CERM
805
2
1
C916
PP2V5_PWRON
PP2V5_RUN
402
CERM
5%
25V
220PF
2
1
C906
TH
1.6UH
CRITICAL
21
L901
SOI
IRU3037CS
2 6
8
3
5
4
1
7
U900
402
1%
1/16W
MF-LF
10.7K
2
1
R903
10V
20%
0.47UF
CERM
603
2
1
C915
402
1%
1/16W
27.4K
MF-LF
2
1
R901
5%
402
CERM
50V
56PF
2
1
C913
NOSTUFF
50V
CERM
10%
3300PF
603
2
1
C907
50V
CERM
5%
3900PF
603
2
1
C914
5%
MF-LF
1/8W
805
4.7
2
1
R900
5%
1/16W
MF-LF
240
402
DEVELOPMENT
2
1
R950
2.0X1.25A
DEVELOPMENT
GREEN
2
1
LED900
IRF7413
SO-8
321
4
8765
Q903
PP12V_RUN
SOT23-LF
2N7002
2
1
3
Q940
470K
5%
402
MF-LF
1/16W
2
1
R940
1206
25V
20%
1UF
NOSTUFF
CERM
2
1
C912
CASE369
NTD60N02R
3
1
4
Q901
NTD60N02R
CASE369
3
1
4
Q902
1800UF
TH-KZJ
ELEC
6.3V
20%
2
1
C902
20%
6.3V
ELEC
TH-KZJ
1800UF
2
1
C903
20%
6.3V
ELEC
TH-KZJ
1800UF
2
1
C910
CERM
10UF
6.3V
20%
1206
2
1
C911
NOSTUFF
402
CERM
50V
20%
0.001UF
2
1
C940
20%
4V
ELEC
1500UF
TH-KZV
2
1
C908
TH-KZV
20%
4V
ELEC
1500UF
2
1
C909
102
9
11
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
2.5V VREG
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
Q901_GATE
Q902_DRAIN
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
U900_GATE_L
U900_FEEDBACK
U900_VC_D
U900_GATE_H
Q903_GATE
U900_COMP
R904_P2
R901_P2
LED_PP2V5_RUN
U900_SS
SYS_SLEEP
U900_VC_R
U900_VC
50 46 22 11 10
8
6
6
6
6
6
6
6
6
6
6
6
6
Preliminary
FB
LD
HD
GND
COMP
SS
VCC
VC
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
LM339A
V+
GND
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PEAK CURRENT OF TOTAL RAILS
VOUT=VREF*(R1003+R1005)/R1005=1.206VDC
~3A
NOTE:
<-- NEED TO VERIFY
IRU3037ACS VREF=0.8VDC
SET OUTPUT=1.2V
@ VGS=2.5 V
RDSON=0.06 OHM
PEAK CURRENT ??A
@ VGS=?? V
RDSON=?? OHM
PEAK CURRENT ??A
PP1V2_RUN FET SWITCH
PLACE LED1000 NEAR VREG
U1000_FEEDBACK
PP1V2_ALL VOLTAGE REGULATOR
PP1V2_PWRON FET SWITCH
50V
5%
2200PF
CERM
603
2
1
C1005
1.6UH
TH
21
L1001
NOSTUFF
10%
3300PF
CERM
50V
603
2
1
C1007
10K
402
MF-LF
1%
1/16W
2
1
R1005
5%
1/4W
1.1K
MF-LF
1206
NOSTUFF
2
1
R1004
NOSTUFF
1206
25V
CERM
20%
1UF
2
1
C1012
SOD-123
MBR0520LXXG
2
1
D1002
PP5V_ALL
1UF
20%
603
10V
CERM
2
1
C1017
MBR0520LXXG
SOD-123
2 1
D1000
MBR0520LXXG
SOD-123
2 1
D1001
MF-LF
805
1/8W
5%
0
21
R1000
20%
805
CERM
25V
1UF
2
1
C1000
220PF
402
CERM
5%
25V
2
1
C1006
1UF
CERM
805
25V
20%
2
1
C1004
SOI
IRU3037ACS
2 6
8
3
5
4
1
7
U1000
20%
1800UF
TH-KZJ
ELEC
6.3V
2
1
C1009
1/16W
1%
MF-LF
402
5.11K
2
1
R1003
PP1V2_RUN
SOT-363
2N7002DW
4
5
3
Q1004
2N7002DW
SOT-363
1
2
6
Q1004
PP5V_ALL
5%
100K
402
1/16W
MF-LF
2 1
R1008
PP5V_ALL
TSOP
SI3446DV
4
3 6
521
Q1006
PP1V2_PWRON
SOT23-LF
2N7002
2
1
3
Q1005
100K
402
1/16W
MF-LF
5%
2 1
R1009
PP5V_ALL
3900PF
50V
603
CERM
5%
2
1
C1014
68PF
CERM
50V
603
5%
2
1
C1013
603
16V
CERM
20%
0.1UF
2
1
C1015
1/16W
MF-LF
402
1%
27.4K
2
1
R1001
402
0
1/16W
MF-LF
5%
21
R1012
NOSTUFF
MF
402-1
1/16W
5%
0
21
R1013
PP3V3_ALL
100K
1/16W
5%
402
MF-LF
2
1
R1014
805
4.7
5%
1/8W
MF-LF
2
1
R1002
NTD60N02R
CASE369
3
1
4
Q1001
NTD60N02R
CASE369
3
1
4
Q1002
CERM
10UF
20%
6.3V
1206
2
1
C1002
CERM
10UF
20%
6.3V
1206
2
1
C1003
TSOP
SI3446DV
4
3 6
5
2
1
Q1003
10UF
1206
20%
6.3V
CERM
2
1
C1001
SOI
DEVELOPMENT
3
2
5
4
12
U1001
402
330
DEVELOPMENT
MF-LF
1/16W
5%
2
1
R1050
DEVELOPMENT
2.0X1.25A
GREEN
2
1
LED1000
DEVELOPMENT
MF-LF
1/16W
5%
100K
402
2
1
R1051
MF-LF
1/16W
5%
47K
402
DEVELOPMENT
2
1
R1052
DEVELOPMENT
402
0
5%
1/16W
MF-LF
21
R1053
DEVELOPMENT
402
0.1UF
20%
10V
CERM
2
1
C1050
102
10
11051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
1.2V VREG
U1000_GATE_L
U1000_FEEDBACK
Q1002_DRAIN
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=1.2V
PP1V2_ALL
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
PP3V3_RUN
LED_PP1V2_RUN_P
LED_PP1V2_RUN_N
PP5V_RUN
PP3V3_RUN
1V1_REF
PP1V2_RUN_FOR_LED
Q1003_G
SYS_SLEEP
PP1V2_ALL
SYS_POWERUP_L
Q1006_G
R1001_P2
U1000_SS
U1000_VC
Q1001_GATE
R1004_P2
U1000_VC_D
TURN_ON_PP1V2_PWRON_L
U1000_COMP
PP1V2_ALL
U1000_GATE_H
Q1005_G
U1000_VC_R
50
50
34
34
50
22
22
46
18
18
22
33
11
18
11
11
13
10
11
10
50
9
11
10
7
7
7
34
8
10
7
10
6
6
7
6
6
6
22
6
7
6
3
7
Preliminary
D
G
S
LM339A
V+
GND
LM339A
V+
GND
TAB
VOUTVPWR
VCTRL
VOUT
ADJ
SENSE
D
G
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
Vpwr >= Vout+0.35V
PROCESS SWING
FET ON IN RUN
FET ON IN RUN
PP5V_PWRON
Vctrl >= Vout+1.25V
R2
R1
Iadj=50uA typ
3.30V - 3.45V
Vref=1.250V typ
Vout=Vref(1+R2/R1)+Iadj(R2)
SHUTDOWN -> FLOAT
SLEEP -> FLOAT
RUN -> LOW
FET ON IN SLEEP
FET ON IN SLEEP
SHUTDOWN -> FLOAT
SLEEP -> LOW
RUN -> FLOAT
20%
10V
ELEC
100UF
SM
2
1
C1100
SI4467DY
SM-1
CRITICAL
3
2
1
4
8
7
6
5
Q1100
402
MF-LF
1/16W
5%
100K
21
R1100
SOI
CRITICAL
3
13
11
10
12
U1100
SOI
3
2
5
4
12
U1100
603
MF-LF
1/10W
1%
47.0K
2
1
R1102
CS5253
SM
CRITICAL
5
6
3
4
1
2
VR1100
1/16W
100K
MF-LF
5%
402
21
R1103
100K
5%
MF-LF
1/16W
402
21
R1104
603
MF-LF
1/10W
1%
124
2
1
R1105
603
MF-LF
1/10W
1%
210
2
1
R1106
N20P80%
CERM
0.1UF
603
16V
2
1
C1101
SM-1
SI4467DY
3
2
1
4
8
7
6
5
Q1102
SM
47UF
ELEC
20%
16V
2
1
C1102
MF-LF
1/16W
1%
1K
402
2
1
R1107
402
1K
1%
1/16W
MF-LF
2
1
R1101
SI3443DV
TSOP
CRITICAL
4
3 6
5
2
1
Q1103
CRITICAL
TSOP
SI3443DV
4
3 6
5
2
1
Q1101
051-6772
11
11
102
SYNC_MASTER=N/A
SYNC_DATE=N/A
5V & 3.3V VREGS
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.5MM
RAIL_SLEEP_FET
PP5V_ALL
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
PP3V3_ALL
VOLTAGE=3.3V
PP5V_ALL
SYS_SLEEP
SYS_POWERUP_L
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.5MM
3_3V_ALL_ADJ
PP3V3_ALL
RAIL_CTL_POS
RAIL_CTL_NEG
PP5V_RUN
MIN_LINE_WIDTH=0.5MM
RAIL_RUN_FET
MIN_NECK_WIDTH=0.2MM
PP3V3_RUN
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
PP3V3_PWRON
VOLTAGE=3.3V
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
PP5V_PWRON
VOLTAGE=5V
50
50
46
34
22
33
22
12
12
10
13
18
18
58
11
59
11
9
10
59
10
10
27
7
11
7
8
7
11
7
7
18
18
6
7
6
6
6
7
3
6
6
6
6
Preliminary
VESTA MISC
1 OF 3
PVDDDVDD
AVDDL
AVDD
GND
AGND
OVDD
REGSUP1
REGSEN1
REGCTL1
REGSUP2
REGSEN2
REGCTL2
2.5V_EN
NC
DNC
DNC
DNC
NC
TDO
TCK
TMS
TRST*
TDI
RESET*
GND
VOUT
VIN
NOISE
CONT
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
Page Notes
L9/M9
Schmitt trigger
N5/N6
NC
- VESTA1V2_BURST / VESTA1V2_PULSE
N9/N10
BOM options provided by this page:
NC
Power aliases required by this page:
Vout = 2.5V @ 150 mA
2.5V LDO
ETHERNET PORTION IN LOW POWER MODE
Controls operating mode of Vesta 1.2V
(NONE)
Signal aliases required by this page:
regulator will be in continuous mode.
regulator. If both options are off the
WHEN NOT IN RUN MODE.
Ethernet LowPwr
NOTE: Reset GPIO is active HIGH
in reset when system is off
To keep Vesta from being held
R1252 to enable wirespeed feature
L6/M6
0.1uF
20%
10V
CERM
402
2
1
C1210
0.1uF
402
CERM
10V
20%
2
1
C1211
402
CERM
10V
20%
0.1uF
2
1
C1212
20%
10V
CERM
402
0.1uF
2
1
C1213
20%
0.1uF
CERM
402
10V
2
1
C1203
10V
CERM
0.1uF
402
20%
2
1
C1202
CERM
402
0.1uF
20%
10V
2
1
C1201
0.1uF
402
CERM
10V
20%
2
1
C1200
20%
CERM
402
0.1uF
10V
2
1
C1222
10V
20%
CERM
402
0.1uF
2
1
C1225
402
20%
10V
CERM
0.1uF
2
1
C1221
0.1uF
20%
10V
CERM
402
2
1
C1224
0.1uF
402
CERM
10V
20%
2
1
C1231
20%
10V
CERM
402
0.1uF
2
1
C1230
0.1uF
20%
10V
CERM
402
2
1
C1220
0.1uF
20%
10V
CERM
402
2
1
C1223
0.1uF
402
CERM
10V
20%
2
1
C1243
20%
10V
CERM
402
0.1uF
2
1
C1242
10V
0.1uF
402
CERM
20%
2
1
C1241
0.1uF
402
CERM
10V
20%
2
1
C1240
NO STUFF
6.3V
805
20%
10UF
CERM
2
1
C1250
OMIT
BCM5462
FBGA-200
D8
E8
E10
D7
E7
H4
E2
E1
F2
F1
G4
G5
N4
A15
K1
F15
A7
A1
M13
C3
K2
J2
F14
C14
B7
B2
A2
J1
C15
B15
B1
E9
C9
B9
N10
N9
N6
N5
M9
M6
L9
L6
R12
R3
P11
P10
P5
P4
N8
N7
M8
M7
L8
L7
J12
J11
P9
P8
P7
P6
H12
H11
M3
U8600
MF-LF
82K
NO STUFF
5%
402
1/16W
2
1
R1251
10%
10UF
X5R
6.3V
805
2
1
C1208
FERR-EMI-600-OHM
SM
21
L1200
16V
CERM
402
0.01uF
20%
2
1
C1281
402
6.3V
10%
1uF
CERM
2
1
C1280
6.3V
X5R
805
10UF
10%
2
1
C1282
CRITICAL
MM1572FN
SOT-25A
5
1
4
2
3
U1280
402
4.7K
5%
1/16W
MF-LF
2
1
R1252
402
10K
1/16W
5%
MF-LF
2
1
R1262
5%
402
MF-LF
2.0K
1/16W
NOSTUFF
2
1
R1260
805
6.3V
CERM
20%
10UF
2
1
C1260
2N3904LF
SOT23
2
3
1
Q1260
MF-LF
402
1/16W
5%
1K
2
1
R1261
0.1UF
10V
CERM
402
NOSTUFF
20%
2
1
C1261
5%
1/16W
402
MF-LF
4.7K
2
1
R1263
2N7002
SOT23-LF
2
1
3
Q1270
2N3904LF
SOT23
2
3
1
Q1271
MF-LF
100K
5%
1/16W
402
2
1
R1264
6.3V
1UF
CERM
10%
402
2
1
C1270
330
1/10W
MF-LF
5%
603
2
1
R1265
2N3904LF
SOT23
2
3
1
Q1250
10212
11
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
Vesta Core / Misc
MIN_LINE_WIDTH=0.5 mm
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=1.2V
PP1V2_VESTA_AVDDL
VESTA_RESET_L
ENETFW_RESET
PP1V2_VESTA
VESTA_ENET_LOWPWR
PP2V5_VESTA
Q1270_G
Q1271_B
VESTA_ENET_HIGHPWR
PP3V3_VESTA
=PP5V_PWRON_VESTA
PP5V_ALL
=PP3V3_PWRON_VESTA
PP3V3_VESTA
PP3V3_VESTA
=PP2V5_ENETFW
MIN_LINE_WIDTH=0.5 mm
VOLTAGE=2.5V
PP2V5_VESTA
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.2 mm
MIN_NECK_WIDTH=0.2 mm
VESTA2V5_NOISE
PP3V3_VESTA
TP_VESTA_DNC_C9
=JTAG_VESTA_TDI
TP_VESTA_REGCTL2
=JTAG_VESTA_TDO
=JTAG_VESTA_TCK
=JTAG_VESTA_TMS
TP_VESTA_DNC_E9
TP_VESTA_2_5V_EN
TP_VESTA_REGCTL1
TP_VESTA_REGSUP1
TP_VESTA_REGSEN1
TP_VESTA_REGSUP2
TP_VESTA_REGSEN2
PP3V3_VESTA
TP_VESTA_DNC_B9
=JTAG_VESTA_TRST_L
PP3V3_VESTA
11
12
7
12
12
89 12
12
12
25
86
12
7
7
6
7
7
7
86
12
7
8
8
8
8
7
8
7
Preliminary
P9[7]
P9[6]
P9[5]
P8[7]
P8[6]
P8[5]
P3[7]
P3[6]
P3[5]
P3[4]
P2[6]
P2[7]
P2[4]
P2[5]
P1[4]
P1[3]
P1[2]
P1[1]
P1[0]
P0[4]
P0[0]
P0[2]
P0[3]
P0[1]
P0[7]
P0[6]
P0[5]
P3[3]
P3[2]
P3[1]
P3[0]
P2[3]
P2[2]
P2[1]
P2[0]
P1[5]
P1[6]
P1[7]
PCNVSS
RESET*
XOUT
VREF
XIN
P7[7]
P7[6]
P7[5]
P7[4]
P7[3]
P7[2]
P7[1]
P7[0]
P6[7]
P6[6]
P6[5]
P6[4]
P6[3]
P6[2]
P6[1]
P6[0]
P10[0]
P10[1]
P9[3]
P9[2]
P9[1]
P9[0]
P8[4]
P8[3]
P8[2]
P8[1]
P8[0]
P10[6]
P10[7]
P10[2]
P10[3]
P10[4]
P10[5]
VCC
AVSS
VSS
AVCC
SQW/
OUT
VBAT
SDA
SCL
X1
X2
GND
VCC
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
AN26
SMU_VREF should be same signal or
Signal aliases required by this page:
- _PP3V3_PWRON_SMU
- _PP3V3_ALL_SMU
NC
System Management Unit
Y
3.6
2.7
100K/10uF RC filter at SMU pins.
circuit, but be aware that this will
7.6
1.5
1.6
1.7
0.6
0.5
Port
0.4
Portable
Alternate Functions
2.6
Port
2.5
Consumer
Port
6.1
6.2
6.0
7.2
7.4
Tower & Server
Y
Y
IOC2
IOC3
SS
Y
Y
Y
Y
Y
Y
Y
Y
IOC5
INT3*
AN22
YYY
YYY
Y
Y
Y
Y
YYY
YYY
Y
Y
N
N
N
(see aliases below)
SS
Y
Y
Y
Y
Y
SYYS
Y
Y
Y
Y
Y
Y
Y
Y
S
YYYS S
Y
Y
Y
Y
Y
Y
YY
Y
Y
Y
Y
Y
S
INT0*
S
Y
Y
Y
Y
Y
YYYY
Y
S
Y
Y
Y
Y
YYNNSS
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
YYYY
Y
Y
Y
Y
Y
Y
Entry Desktop
Entry Desktop
Desktop
S
Y
Y
Y
Y
Y
Y
Y
Y
S
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Portable
Y
Y
Y
Y Y
Y
Y
Y
Y
Y
S
Y
Y
Y
S
Y
Y
Y
S
Y
Y
Y
Y
Y
S
Y
S
Y
Y
S
Y
Y
Y
Y
Y
S
Y
Y
Y
Y
Y
Y
S
Y
Y
Y
Y
Y Y
Y
Y
N
Y
Y
S
S
Y
Y
Y
S
S
Y
Y
N
S S
N
N
N
Consumer
N
N
N
Server
S
Y
Y
Y
Y
Y
Y Y
Y
S
Y
Y
Y
Y
S
Y
Y
Y
Y
Y
Y
YYY
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
S
NSS
Y
Y
Y
Y
Y
Y
Y
Y
YSY
Y
Y
Y
Y
Y
Y Y
S
N Y
Y
Y YYYY
S S
SS
S
S
Consumer
Y
S
S
Y
S
Y
Y
Y
Y
Y
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
N
N
Y
Y
Y
Y
Y
Y
Portable
Desktop
Server
SMU Pull-ups / pull-down
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
TA1out
S
S
NOTE: Some primary and alternate functions
AC adapter ID.
affect other analog inputs such as
those capacitors are provided on
(CPU_SENSE_I/CPU_SENSE_V) requires
TA3out
TA4in
IOC6
Power aliases required by this page:
review the latest SMU specification
to ensure missing pull-ups are
TB2in
this page.
SCL
Y
IOC4
Y
Y
KI2*
KI0*
AN3
AN2
AN1
Sout3
Y
Y
Y
Y
Y
Y
Y
Y
SCLmm
AN25
INT1*
NMI*
TB1in
AN24
TA1in
TA4out
SDA
AN05
AN07
RXD1
CLK0
RXD0
RTS1*
CLK1
TXD1
RTS0*/
reuire pull-ups that are not.
Real Time Clock
(NONE)
(NONE)
provided on another page.
Sin3
TB0in
(BUSY)
AN0
TA3in
AN21
AN23
AN27
Y
CE*
INT2*
AN04
TA2in
IOC7
CTS0*
AN06
AN20
Y
INT4*
INT5*
SDAmm
Y
Y
S
S
Keep crystal subcircuit close to SMU.
S
KI3*
TXD0
AN01
AN03
AN02
AN00
TA2out
CLK3
N = Alternate function
Y = Primary function
S = Spare
- _PPVREF_SMU (SMU AVCC or 2.5V reference)
signal (GND_SMU_AVSS). None of
NOTE: All analog inputs to SMU should have
NOTE: Pinout matches SMU pinout v1.51.
KI1*
Y
provided on this page. Please.
a 100pF capacitor to the SMU AVSS
NYS
reference used by monitoring
Caps should connect to GND_SMU_AVSS.
NOTE: CPU current/voltage monitoring
BOM options provided by this page:
- _PP3V3_ALL_RTC
ELECTRICAL_CONSTRAINT_SET
Page Notes
11.4X4.7X4.2-SM
10.000M
CRITICAL
21
Y1300
QFP-80
M30280F8
OMIT
10
12
11
77
13
9
79
80
1
2
3
4
5
7
8
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
40
41
42
43
32
33
34
35
36
37
38
39
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
68
69
70
71
72
73
74
76
59
60
61
62
63
64
65
66
67
6
75
78
U1300
MSOP
DS1338
2
1
8
3
7
5
6
4
U1301
PP3V3_PWRON
PP3V3_RUN
PP2V5_PWRON
5%
1/16W
MF-LF
402
NO_SMU_I2C_D
0
21
R1399
SOT23
MMBD914XXG
3
1
D1310
1uF
CERM
10%
6.3V
402
2
1
C1325
10K
5%
MF-LF
1/16W
402
2
1
R1325
150K
402
MF-LF
1/16W
5%
2
1
R1322
20%
0.22uF
402
6.3V
CERM
2
1
C1310
18pF
CERM
402
5%
50V
2
1
C1304
402
18pF
CERM
5%
50V
2
1
C1305
402
1/16W
MF-LF
5%
0
2
1
R1317
10M
5%
MF-LF
1/16W
402
NO STUFF
21
R1316
402
1/16W
MF-LF
5%
10K
2
1
R1327
2.0K
5%
1/16W
MF-LF
402
21
R1312
NO STUFF
2.0K
402
MF-LF
1/16W
5%
21
R1311
100K
5%
1/16W
MF-LF
402
21
R1313
402
MF-LF
1/16W
5%
100K
21
R1310
10K
5%
1/16W
MF-LF
402
21
R1302
5%
1/16W
MF-LF
402
10K
21
R1300
402
10K
MF-LF
1/16W
5%
12
R1304
10V
20%
CERM
0.1uF
402
2
1
C1309
10V
20%
0.1uF
CERM
402
2
1
C1308
402
10V
20%
0.1uF
CERM
2
1
C1302
10V
0.1uF
CERM
402
20%
2
1
C1301
6.3V
10uF
20%
CERM
805
2
1
C1300
402
CERM
1uF
10%
6.3V
2
1
C1303
402
MF-LF
1/16W
5%
4.7
21
R1315
SM
21
XW1300
32.768K
SM-1
CRITICAL
4
1
Y1301
10K
5%
1/16W
MF-LF
402
21
R1303
051-6772
10213
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
System Management Unit
SYS_COLD_RESET_L
SMU_PWRSEQ_P9_6
SMU_CLK10M_XIN
SMU_CLK10M_XTAL
P25MM
SMU_CLK10M_XOUT
P25MM
RTC_CLK32K_XTAL
RTC_CLK32K_X1
P25MM
FAN_TACH4
FAN_TACH3
SYS_SLOT_PWR
TP_SMU_SPARE_P10_0
SYS_RESET_BUTTON_L
NB_SUSPENDACK_L
SB_STOPXTALS_L
I2C_SMU_CPU_SDA_OUT_L
FAN_PWM8
I2C_SMU_B_SCL
SMU_PWRSEQ_P9_5
SYS_POWER_BUTTON_L
SMU_SUSPENDREQ_L
SB_TO_SMU_INT_L
CLOCK_RESET_L
SMU_SLEEP
SYS_SLEWING_L
I2C_SMU_CPU_SCL_OUT_L
CPU_HRESET
FAN_RPM1
SYS_LED
FAN_RPM2
SYS_PME_L
SMU_QREQ
I2C_SMU_CPU_SCL_IN
FAN_RPM0
I2C_SMU_B_SDA
SMU_BOOT_TXD
SMU_BOOT_RXD
SYS_POWERUP_L
MAKE_BASE=TRUE
CPU_VID<5>
=PP3V3_ALL_SMU
GND_SMU_AVSS
SYS_POWER_BUTTON_L
SMU_RESET_L
=PP3V3_ALL_SMU
SMU_BOOT_CNVSS
FAN_TACH1
I2C_RTC_SCL
I2C_RTC_SDA
RTC_CLK32K_X2
P25MM
I2C_SMU_A_SCL_OUT_L
I2C_SMU_A_SCL_IN
SMU_PWRSEQ_P1_2
FAN_RPM4
CPU_BYPASS
SMU_PWRSEQ_P1_1
SMU_PWRSEQ_P1_0
SYS_DRIVE_BAY_INT_L
CPU_SENSE_V
CPU_SENSE_I
I2C_SMU_D_SDA
FAN_RPM5
SMU_ONEWIRE
SMU_PWRSEQ_P1_4
SMU_PWRSEQ_P1_3
I2C_SMU_E_SDA
I2C_SMU_E_SCL
FAN_TACH0
SYS_DOOR_AJAR_L
FAN_TACH2
FAN_TACH5
SMU_TO_SB_INT_L
CPU_TEMP
SMU_CLK10M_XOUT_R
P25MM
FAN_RPM3
I2C_SMU_A_SDA_OUT_L
I2C_SMU_A_SDA_IN
FAN_TACH6
CPU_VID<0>
FAN_TACH8
CPU_VID<2>
FAN_TACH7
CPU_VID<1>
FAN_PWM7
I2C_SMU_CPU_SCL_IN
FAN_PWM6
I2C_SMU_CPU_SDA_IN
SYS_LED_RED
FAN_TACH3
SYS_LED_GREEN
FAN_TACH4
ALS0_OUTFAN_RPM3
ALS1_OUTFAN_RPM4
ALS_GAIN_BOOST
FAN_RPM5
SMU_ACIN
SYS_POWERFAIL_L
SMU_BATT_DET_L
SYS_DRIVE_BAY_INT_L
SYS_LID_OPEN
SYS_DOOR_AJAR_L
SYS_KBDLED
FAN_PWM8
FAN_TACH5
SYS_LED_BLUE
DIAG_LED
SMU_CHARGE_BATT
SYS_PME_L
SYS_SLEWING_L
SMU_SUSPENDREQ_L
SYS_COLD_RESET_L
SMU_SLEEP
SYS_POWERUP_L
SYS_RESET_BUTTON_L
=PP3V3_ALL_SMU
CPU_VID<4>
CPU_VID<3>
CPU_VID<2>
CPU_VID<1>
SMU_BOOT_CE
SMU_BOOT_SCLK
SMU_BOOT_BUSY
CPU_VID<0>
I2C_SMU_CPU_SDA_IN
SMU_CLK10M_XIN
SMU_CLK10M_XOUT_R
=PPVREF_SMU
SYS_OVERTEMP_L
SMU_CHARGE_BATT
=PP3V3_ALL_SMU
SB_SUSPENDACK_L
SMU_WARM_RESET_L
VOLTAGE=0V
GND_SMU_AVSS
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.25MM
I2C_SMU_D_SCL
SYS_POWERFAIL_L
PP3V3_ALL_SMU_AVCC
VOLTAGE=3.3V
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.25MM
=PP3V3_ALL_RTC
RTC_CLK32K_X1
RTC_CLK32K_X2
SMU_CLK10M_XOUT
33
33
13
13
28
33
11
13
36
13
33
28
11
13
13
36
24
13
25
27
77
10
8
33
13
8
18
18
13
77
27
25
24
10
8
27
8
33
13
13
13
13
7
24
13
25
25
18
7
7
13
7
8
7
14
13
13
14
13
13
13
18
18
8
13
13
13
25
25
24
13
13
7
13
7
13
13
13
18
25
7
13
8
8
3
13
13
13
13
13
8
7
8
25
18
8
18
3
6
13
25
27
8
13
18
30
16
21
17
13
28
13
16
18
8
8
6
8
6
8
6
6
6
8
16
18
18
13
6
18
3
13
30
3
3
8
33
33
18
13
8
3
8
18
18
16
8
17
13
25
36
13
13
6
18
8
8
8
13
13
21 13
21 13
8
13
8
13
8
13
6
8
8
8
13 21
8
13
13
13
13
8
8
6
7
6
8
8
8
8
8
8
8
8
13
13
13
8
16
13
6
25
8
8
18
6
8
7
13
13
13
Preliminary
A30B30
A29B29
A28B28
A27B27
A26B26
B25
B24
B23
B22
B21
A25
A24
A23
A22
A21
C30D30
C29D29
C28D28
C27D27
C26D26
C25D25
D22
D23
D24
D21
C24
C23
C22
C21
E30F30
E29F29
E28F28
E27F27
E26F26
E25F25
F24
F23
F22
F21
E24
E23
E22
E21
G30H30
G29H29
G28H28
G27H27
G26H26
H25 G25
G22
G23
G24
H21
H22
H23
H24
G21
H20
H19
H18
H17
H16
H15
H14
H13
H12
H11
H10
H9
H8
H7
H6
H5
H4
H3
H2
H1
G20
G19
G18
G17
G16
G15
G14
G13
G12
G11
G10
G9
G8
G7
G6
G5
G4
G3
G2
G1
F20
F19
F18
F17
F16
F15
F14
F13
F12
F11
F10
F9
F8
F7
F6
F5
F4
F3
F2
F1
E10
E20
E19
E18
E17
E16
E15
E14
E13
E12
E11
E9
E8
E7
E6
E5
E4
E3
E2
E1
D20
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
C20
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1 B1 A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
NC
NC
NC
DEVELOPMENT
0
5%
1/16W
MF-LF
402
21
R1400
DEVELOPMENT
0
5%
1/16W
MF-LF
402
21
R1401
DEVELOPMENT
0
4025%
21
R1402
DEVELOPMENT
5% 402
021R1403
F-ST-BGA
YFS-30-03-H-08-SB
NOSTUFF
H9
H8
H7
H6
H5
H4
H30
H3
H29
H28
H27
H26
H25
H24
H23
H22
H21
H20
H2
H19
H18
H17
H16
H15
H14
H13
H12
H11
H10
H1
G9
G8
G7
G6
G5
G4
G30
G3
G29
G28
G27
G26
G25
G24
G23
G22
G21
G20
G2
G19
G18
G17
G16
G15
G14
G13
G12
G11
G10
G1
F9
F8
F7
F6
F5
F4
F30
F3
F29
F28
F27
F26
F25
F24
F23
F22
F21
F20
F2
F19
F18
F17
F16
F15
F14
F13
F12
F11
F10
F1
E9
E8
E7
E6
E5
E4
E30
E3
E29
E28
E27
E26
E25
E24
E23
E22
E21
E20
E2
E19
E18
E17
E16
E15
E14
E13
E12
E11
E10
E1
D9
D8
D7
D6
D5
D4
D30
D3
D29
D28
D27
D26
D25
D24
D23
D22
D21
D20
D2
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D1
C9
C8
C7
C6
C5
C4
C30
C3
C29
C28
C27
C26
C25
C24
C23
C22
C21
C20
C2
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C1
B9
B8
B7
B6
B5
B4
B30
B3
B29
B28
B27
B26
B25
B24
B23
B22
B21
B20
B2
B19
B18
B17
B16
B15
B14
B13
B12
B11
B10
B1
A9
A8
A7
A6
A5
A4
A30
A3
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A2
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A1
J1400
051-6772
11
14
102
SYNC_MASTER=N/A
SYNC_DATE=N/A
CPU LOGIC ANALYZER
EI_CPU_TO_NB_SR_N<1>
EI_CPU1_CLK_P_R
EI_CPU1_CLK_N
EI_NB_TO_CPU_AD<16>
EI_NB_TO_CPU_AD<3>
EI_NB_TO_CPU_AD<4>
EI_CPU_TO_NB_AD<29>
EI_CPU_TO_NB_AD<41>
EI_CPU_TO_NB_AD<32>
EI_CPU_TO_NB_AD<33>
EI_CPU_TO_NB_AD<34>
EI_CPU_TO_NB_AD<30>
EI_CPU_TO_NB_AD<37>
EI_CPU_TO_NB_AD<31>
EI_CPU_TO_NB_AD<22>
EI_CPU_TO_NB_AD<10>
EI_CPU_TO_NB_AD<9>
EI_CPU_TO_NB_AD<1>
EI_CPU_TO_NB_AD<2>
EI_CPU_TO_NB_AD<0>
CPU1_HTBEN
CPU_HRESET_L
EI_CPU_TO_NB_AD<6>
EI_CPU_TO_NB_AD<21>
EI_CPU_TO_NB_AD<20>
EI_CPU_TO_NB_AD<25>
EI_CPU_TO_NB_AD<26>
EI_CPU_TO_NB_SR_P<0>
EI_CPU_TO_NB_SR_N<0>
EI_CPU_TO_NB_AD<27>
EI_CPU_TO_NB_AD<39>
EI_CPU_TO_NB_AD<19>
CPU_INT_L
EI_CPU_TO_NB_AD<15>
=PP1V2_EI_CPU
EI_CPU_TO_NB_AD<8>
EI_CPU_TO_NB_AD<13>
EI_CPU_TO_NB_AD<12>
EI_CPU_TO_NB_AD<5>
EI_CPU_TO_NB_AD<36>
EI_CPU_TO_NB_AD<35>
EI_CPU_TO_NB_AD<18>
EI_CPU_TO_NB_AD<43>
EI_CPU_TO_NB_AD<42>
EI_CPU_TO_NB_AD<38>
EI_CPU_TO_NB_AD<40>
EI_NB_TO_CPU_AD<9>
EI_NB_TO_CPU_AD<11>
EI_NB_TO_CPU_AD<0>
EI_CPU1_CLK_N
EI_NB_TO_CPU_AD<5>
EI_CPU1_CLK_P
EI_CPU_TO_NB_AD<3>
EI_CPU_TO_NB_AD<4>
EI_CPU_TO_NB_AD<7>
EI_CPU_TO_NB_AD<11>
EI_CPU_TO_NB_CLK_N
EI_CPU_TO_NB_CLK_P
EI_CPU_TO_NB_SR_P<1>
EI_CPU_TO_NB_AD<17>
EI_CPU_TO_NB_AD<14>
EI_CPU_TO_NB_AD<24>
EI_CPU_TO_NB_AD<28>
EI_NB_TO_CPU_AD<14>
EI_NB_TO_CPU_AD<12>
EI_NB_TO_CPU_AD<18>
EI_NB_TO_CPU_AD<19>
EI_CPU1_SYNC
CHKSTOP_L
EI_NB_TO_CPU_AD<13>
EI_NB_TO_CPU_AD<15>
EI_NB_TO_CPU_AD<17>
EI_NB_TO_CPU_AD<21>
EI_NB_TO_CPU_AD<27>
EI_NB_TO_CPU_AD<26>
EI_NB_TO_CPU_AD<30>
EI_NB_TO_CPU_AD<42>
EI_NB_TO_CPU_AD<41>
EI_NB_TO_CPU_AD<25>
EI_NB_TO_CPU_AD<20>
EI_NB_TO_CPU_AD<28>
EI_NB_TO_CPU_AD<29>
EI_NB_TO_CPU_AD<40>
EI_NB_TO_CPU_AD<10>
EI_NB_TO_CPU_AD<39>
EI_NB_TO_CPU_AD<36>
EI_NB_TO_CPU_SR_N<0>
RI_L
EI_NB_TO_CPU_SR_P<0>
EI_QREQ_L
I2C_SMU_A_SCL_OUT_L
EI_NB_TO_CPU_AD<1>
EI_NB_TO_CPU_AD<22>
EI_NB_TO_CPU_AD<33>
EI_NB_TO_CPU_AD<43>
EI_NB_TO_CPU_AD<2>
EI_NB_TO_CPU_AD<38>
EI_NB_TO_CPU_AD<37>
SYNCENABLE
EI_NB_TO_CPU_SR_N<1>
TP_PROC_TRIGGER_OUT
EI_NB_TO_CPU_SR_P<1>
EI_NB_TO_CPU_AD<8>
EI_NB_TO_CPU_AD<24>
EI_NB_TO_CPU_AD<7>
EI_NB_TO_CPU_AD<6>
EI_SE
EI_QACK_L
EI_NB_TO_CPU_AD<35>
=PP1V2_EI_NB
EI_NB_TO_CPU_AD<34>
EI_NB_TO_CPU_AD<32>
EI_NB_TO_CPU_AD<23>
EI_NB_TO_CPU_CLK_N
EI_NB_TO_CPU_CLK_P
MCP_L
I2C_SMU_A_SDA_OUT_L
=PP1V2_EI_NB
EI_CPU_TO_NB_AD<23>
EI_CPU_TO_NB_AD<16>
EI_NB_TO_CPU_AD<31>
EI_CPU1_CLK_P
EI_CPU1_CLK_N_R
EI_CPU1_SYNC
EI_CPU1_SYNC_R
CPU1_HTBEN
CPU1_HTBEN_R
31
30
30
30
30
28
28
29
27
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
30
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
27
29
27
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
27
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
30
29
29 18
29
29
29
29
29
29
29 30
29
29
29
29
29
29 29
29
29
18
29
29
29
29
29
18
18
29
29
29
27
27
28
14
28
28
28 28
28
28
28
28
28
28
28
28
28
28
28
28
28
14
29
28
28
28
28
28
28
28
28
28
28
25
28
18
28
28
28
28
28
28
28
28
28
28
28
28
28
28
14
28
14
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
14
8
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28 28
29 28
28 13
28
28
28
28
28
28
28 29
28 29
28
28
28
28
28 28
28
28
14
28
28
28
28
28
29
13
14
28
28
28
14
14 27
14 27
6
27
6
6
6
6 6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
7
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6 6
6 6
6 6
6
6
6
6
6
6
6 6
6 6
6
6
6
6
6 6
6
6
7
6
6
6
6
6
6
6
7
6
6
6
6
27
6 6
6 6
Preliminary
SDA
SCL
GND
OS
VS+
A2
A1
A0
G
D
S
G
D
S
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
FAN 1
MOTOR CONTROL
TACH
12V DC
GND
17" SYSTEM FAN 603-5518
20" SYSTEM FAN 603-5521
OPTICAL TEMP SENSOR
I2C ADDR:90(1001000)
GND
TACH
MOTOR CONTROL
17" CPU FAN 603-5519
20" HD FAN 603-5487
FAN 0
PP3V3_RUN
HF28040-B
M-ST-TH
CRITICAL
4
3
2
1
J1600
10K
1%
402
1/16W
MF-LF
2
1
R1610
1/16W
MF-LF
402
5%
0
21
R1609
10-89-7062
M-ST-TH
CRITICAL
6 5
4
1
J1601
PP3V3_RUN
10K
1/16W
MF-LF
402
1%
2
1
R1659
0
1/16W
MF-LF
402
5%
21
R1650
NOSTUFF
SOP
LM75
CRITICAL
8
1
2
3
4
5
6
7
U1602
PP3V3_PWRON
NOSTUFF
402
MF-LF
1/16W
5%
0
21
R1621
402
CERM
16V
20%
0.01UF
2
1
C1660
603
MF-LF
1/10W
5%
0
21
R1660
603
0
5%
1/10W
MF-LF
21
R1661
603
0
5%
1/10W
MF-LF
21
R1662
MF-LF
1/10W
5%
0
603
21
R1663
MF-LF
1/10W
5%
0
603
21
R1664
CERM
25V
20%
0.1UF
603
NOSTUFF
2
1
C1602
1.5K
5%
1/4W
MF-LF
1206
2
1
R1605
NTHS5443T1
1206A-03
5
4
87632
1
Q1603
1/8W
1.5K
5%
MF-LF
805
2
1
R1607
SOT23
MMBD914XXG
3
1
D1602
MF-LF
1/8W
5%
0
805
21
R1608
10%
0.47UF
805
X7R
16V
2
1
C1604
3.9K
5%
1/8W
MF-LF
805
R1606
PP12V_RUN
SOT23-LF
2N7002
2
1
3
Q1602
NOSTUFF
0
5%
1/8W
MF-LF
805
21
R1603
805
1.0K
5%
1/8W
MF-LF
2
1
R1602
2N7002
SOT23-LF
2
1
3
Q1601
0
805
MF-LF
1/8W
5%
21
R1601
1206A-03
NTHS5443T1
5
4
87632
1
Q1653
25V
NOSTUFF
603
0.1UF
20%
CERM
2
1
C1652
1/8W
1.5K
5%
MF-LF
805
2
1
R1657
MF-LF
1/8W
0
805
5%
21
R1658
10%
805
0.47UF
X7R
16V
2
1
C1654
3.9K
5%
1/8W
805
MF-LF
R1656
SOT23
MMBD914XXG
3
1
D1652
MF-LF
1/4W
5%
1.5K
1206
2
1
R1655
SOT23-LF
2N7002
2
1
3
Q1652
PP12V_RUN
NOSTUFF
5%
1/8W
MF-LF
805
0
21
R1653
805
1.0K
5%
1/8W
MF-LF
2
1
R1652
SOT23-LF
2N7002
2
1
3
Q1651
805
MF-LF
1/8W
0
5%
21
R1651
6.3X11-TH
120UF
20%
16V
ELEC
2
1
C1603
120UF
16V
20%
ELEC
6.3X11-TH
2
1
C1653
NOSTUFF
FF
1/10W
5%
1K
805
2
1
R1615
NOSTUFF
1K
5%
1/10W
FF
805
2
1
R1665
MF-LF
1/8W
5%
0
805
21
R1666
MF-LF
805
1/8W
0
5%
21
R1616
MBRS130LT3
SM
NOSTUFF
21
D1603
SM
MBRS130LT3
NOSTUFF
21
D1653
16
102
051-6772
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
FAN 0, 1 & SYSTEM TEMP
SMU_FAN_RPM0
SMU_FAN_TACH0
FAN_TACH1
SMU_FAN_RPM1
SMU_FAN_TACH1
FAN_RPM1
FAN_RPM0
FAN_TACH0
MIN_LINE_WIDTH=0.5MM
FAN_0_PWR
MIN_NECK_WIDTH=0.25MM
FAN_0_OUT
FAN_1_OUT FAN_1_PWR
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
F1_GATESLOWDN
F0_GATESLOWDNF0_VOLTAGE8R5
F0_DRV
F0_RCFEEDBK
FAN_1_TACH
F1_RCFEEDBK
FAN_1_PWR_FILT
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
FAN_1_TACH_FILT
FAN_1_GND_FILT
VOLTAGE=0V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
PP12V_RUN_FAN_1_LCL
VOLTAGE=12V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
PP12V_RUN_FAN_1_LC
VOLTAGE=12V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
I2C_OPTICAL_SDA
TEMP_SENSOR_OS SYS_OVERTEMP_L
I2C_OPTICAL_SCL
FAN_0_CNTL
FAN_0_TACH
FAN_1_CNTL
F1_DRV
F1_VOLTAGE8R5
27 25
13
13
13
13
18 13
18
Preliminary
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
+12V DC
I2C ADDR:92(1001001)
518S0193
FAN 2
MOTOR CONTROL
TACH
GND
20" CPU FAN 603-5459
17" HD FAN 603-5520
REMOTE HARD DRIVE TEMP SENSOR
10-89-7062
M-ST-TH
CRITICAL
6 5
4
1
J1700
PP3V3_RUN
402
MF-LF
1/16W
1%
10K
2
1
R1709
0
5%
402
MF-LF
1/16W
21
R1700
PP3V3_PWRON
M-RT-SM
53261-0498
CRITICAL
4
3
2
1
6
5
J1701
NTHS5443T1
1206A-03
5
4
87632
1
Q1703
MMBD914XXG
SOT23
3
1
D1702
NOSTUFF
CERM
20%
0.1UF
603
25V
2
1
C1702
5%
1/8W
1.5K
MF-LF
805
2
1
R1707
0
1/8W
805
MF-LF
5%
21
R1708
0.47UF
10%
805
X7R
16V
2
1
C1704
3.9K
5%
1/8W
MF-LF
805
R1706
1206
1.5K
5%
1/4W
MF-LF
2
1
R1705
2N7002
SOT23-LF
2
1
3
Q1702
NOSTUFF
805
MF-LF
5%
0
1/8W
21
R1703
PP12V_RUN
MF-LF
1/8W
5%
1.0K
805
2
1
R1702
MF-LF
805
1/8W
5%
0
21
R1701
SOT23-LF
2N7002
2
1
3
Q1701
120UF
6.3X11-TH
20%
16V
ELEC
2
1
C1703
1/10W
NOSTUFF
805
1K
5%
FF
2
1
R1715
805
0
5%
1/8W
MF-LF
21
R1716
NOSTUFF
SM
MBRS130LT3
21
D1703
051-6772
11
17
102
SYNC_MASTER=N/A
SYNC_DATE=N/A
FAN 2 & HD TEMP
FAN_TACH2
SMU_FAN_TACH2
SMU_FAN_RPM2
FAN_RPM2
FAN_2_TACH
F2_RCFEEDBK
F2_DRV
FAN_2_CNTL
I2C_HD_TEMP_SDA
I2C_HD_TEMP_SCL
F2_GATESLOWDN
FAN_2_PWR
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
F2_VOLTAGE8R5
FAN_2_OUT
18
18
13
13
6
6
Preliminary
LM339A
V+
GND
LM339A
V+
GND
G
D
S
G
D
S
G
D
S
G
D
S
LM339A
V+
GND
LM339A
V+
GND
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
SMU OLD ’E’
I2C ADDR:98
HD TEMP SENSOR
U1702
PINS 34, 35
PINS C21, E21
PINS 36-39
MASTER
U2300
SHASTA
PINS Y9, AB7
USE 576 OHM FOR R1811 IF 5V RAIL IS USED FOR REFERENCE
SMU
MASTER
U2900
CPU JTAG
U3LITE
U3
PINS 50, 51
U1300
MASTER
U3LITE ’B’
PINS C20, B21
U3
U1300
MASTER
U1301
RTC
PINS 5, 6
I2C C BUS
U3LITE
PINS 91, 92
J4001 = A2
J4000 = A0
DIMMS
OF EACH DIMM
MASTER
U3
I2C A BUS
SMU
PINS 14,25,23,68
U1300
U1300
MASTER
PINS AA20, Y21
PINS A20, B20
U2600
U1300
MASTER
SMU
I2C B BUS
U1602
J2100
PINS 1, 2
I2C ADDR:90
PINS C1, B1
I2C ADDR:92
GPU TEMP SENSOR
U5890
PINS 7, 8
PINS 2, 3
I2C D & E BUS
I2C_CPU_A_SCL
I2C SB BUS
SMU NEW ’E’
PINS 18, 19
AUDIO
U9500 / AU300
PULSAR
PINS 26, 27
PINS 2, 3
I2C ADDR:94??
J2100 CAN BE USED AS A SECOND TEMP SENSOR
CPU
AMBIENT LIGHT SENSOR
OPTICAL TEMP SENSOR
402
MF-LF
1/16W
5%
2.0K
2
1
R1812
MF-LF
1/16W
5%
2.0K
402
2
1
R1813
PP2V5_PWRON
PP3V3_RUN
402
MF-LF
1/16W
5%
1K
2
1
R1814
402
1/16W
5%
1K
MF-LF
2
1
R1815
MF-LF
1/16W
402
2.0K
5%
2
1
R1800
200
1/16W
5%
MF-LF
402
2
1
R1808
1/16W
5%
MF-LF
200
402
2
1
R1810
SOI
3
13
11
10
12
U1800
SOI
3
2
5
4
12
U1800
2.0K
1/16W
5%
402
MF-LF
2
1
R1801
1/16W
MF-LF
2.0K
402
5%
2
1
R1818
1/16W
MF-LF
2.0K
5%
402
2
1
R1819
SM-LF
0
5%
1/16W
5
6
7
8
4
3
2
1
RP1800
NOSTUFF
1/16W
5%
0
SM-LF
5
6
7
8
4
3
2
1
RP1801
0.1UF
402
CERM
10V
20%
2
1
C1800
0
5%
1/16W
MF-LF
402
NOSTUFF
2
1
R1820
402
MF-LF
1/16W
5%
0
NOSTUFF
2
1
R1821
NOSTUFF
402
MF-LF
1/16W
5%
0
2
1
R1822
0
5%
1/16W
MF-LF
402
NOSTUFF
2
1
R1823
402
1/16W
5%
0
NOSTUFF
MF-LF
2 1
R1824
0
5%
1/16W
MF-LF
402
NOSTUFF
2 1
R1825
402
MF-LF
1/16W
5%
0
2 1
R1826
402
1/16W
0
MF-LF
5%
2 1
R1827
2N7002DW
SOT-363
1
2
6
Q1800
2N7002DW
SOT-363
4
5
3
Q1800
1/16W
402
4.7K
5%
MF-LF
2
1
R1828
20%
10V
CERM
402
0.1UF
2
1
C1802
4.7K
402
5%
MF-LF
1/16W
2
1
R1811
NOSTUFF
5%
2.0K
402
1/16W
MF-LF
2
1
R1830
NOSTUFF
MF-LF
402
5%
1/16W
2.0K
2
1
R1831
603
0
21
R1832
NOSTUFF
603
0
21
R1833
2N7002DW
SOT-363
4
5
3
Q1801
5%
1/16W
MF-LF
200
402
2
1
R1817
5%
1/16W
MF-LF
200
402
2
1
R1816
2N7002DW
SOT-363
1
2
6
Q1801
SOI
3
1
7
6
12
U1800
402
MF-LF
1/16W
5%
2.0K
2
1
R1802
2.0K
5%
1/16W
MF-LF
402
2
1
R1803
1/16W
402
MF-LF
5%
4.7K
NOSTUFF
2
1
R1809
2.0K
5%
1/16W
MF-LF
402
2
1
R1804
402
MF-LF
1/16W
5%
2.0K
2
1
R1805
PP3V3_PWRON
PP2V5_PWRON
SOI
3
14
9
8
12
U1800
PP3V3_ALL
2.0K
5%
402
MF-LF
1/16W
2
1
R1806
2.0K
5%
402
MF-LF
1/16W
2
1
R1807
20%
CERM
402
10V
0.1UF
2
1
C1801
051-6772
102
18
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
I2C CONNECTIONS
PP3V3_PWRON
PP3V3_PWRON
PP3V3_RUN
I2C
I2C_RTC_SCL
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_SMU_B_SDA
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_SMU_B_SCL
I2C_GPU_DIODE_SCL
I2C_GPU_DIODE_SDA
I2C_HD_TEMP_SCL
I2C_HD_TEMP_SDA
I2C_ALS_SCL
I2C_ALS_SDA
I2C_OPTICAL_SCL
I2C_OPTICAL_SDA
I2C_CLOCK_SCL
I2C_CLOCK_SDA
I2C_AUDIO_SCL
MAKE_BASE=TRUE
I2C_SB_SCL
NET_SPACING_TYPE=I2C
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_SB_SDA
I2C_AUDIO_SDA
I2C
I2C_SMU_D_SDA
I2C_NB_C_SCL
MAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
I2C_DIMM_SCL
I2C_DIMM_SDA
I2C_NB_C_SDA
MAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
I2C
I2C_SMU_E_SCL
PP5V_U1800
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.25MM
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_SMU_A_SDA_OUT_L
I2C_CPU_A_SDA_TO_SMU
NET_SPACING_TYPE=I2C
I2C_CPU_A_SCL
I2C_NB_A_SDA
I2C_NB_A_SCL
=PP1V2_EI_NB
I2C_CPU_SCL_LS
NET_SPACING_TYPE=I2C
I2C_CPU_A_SDA_TO_CPU
NET_SPACING_TYPE=I2C
I2C_SMU_A_SCL_IN
MAKE_BASE=TRUE
PP5V_PWRON
PP5V_RUN
I2C
I2C_NB_B_SCL
I2C
I2C_SMU_D_SCL
JTAG_CPU_TDO
JTAG_CPU_TDI
JTAG_CPU_TMS
JTAG_CPU_TCK
=PP1V2_EI_CPU
I2C_SMU_A_SDA_IN
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_0V6_REF
I2C
I2C_NB_B_SDA
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_SMU_A_SCL_OUT_L
I2C
I2C_SMU_CPU_SCL_IN
MAKE_BASE=TRUE
MAKE_BASE=TRUE
I2C
I2C_SMU_CPU_SDA_OUT_L
I2C
MAKE_BASE=TRUE
I2C_SMU_CPU_SDA_IN
I2C
MAKE_BASE=TRUE
I2C_SMU_CPU_SCL_OUT_L
NET_SPACING_TYPE=I2C
I2C_CPU_A_SDA
I2C
I2C_SMU_E_SDA
NET_SPACING_TYPE=I2C
SMU_CPU_JTAG_OR_I2C
I2C
I2C_RTC_SDA
50 34
58
58 22
31
27
27 11
11
30
18
18 10
14
28 10
29
14
11
11
7
17
17
25
25
13
14
11
7
30
30
30
30
14
13
6
6 6
13
13
13
58
58
6
6
21
21
16
16
27
27
95
6
6
95
13
24
40
40
24
13
6
29
24
24
7
13
6
6
24
13
29
29
29
29
7
13
24
6
13
13
13
13
29
13
13
Preliminary
GRN
BLUE
AMB
+
-
+
-
+
-
+
-
D
S
G
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
J2100 CAN BE USED AS A SECOND TEMP SENSOR
AMBIENT LIGHT SENSOR
518S0193
<-- 17 INCH
<-- 17 INCH
<-- 17 INCH
MAX LED CURRENT = 0.5 / R
PLACE THESE PARTS CLOSE TO SMU IC
(STUFF WHEN SYS_LED_L = ACTIVE HIGH)
(AND NO STUFF R2132, R2119 & Q2100)
PLACE THESE PARTS CLOSE TO SMU IC
TO SET LED CURRENT
100% DUTY CYCLE OF 3V-PP PWM = 0.5V
PWM INPUT FROM SMU
PWM INPUT FROM SMU
5MV INPUT OFFSET
PWM INPUT FROM SMU
PLACE THESE PARTS CLOSE TO SMU IC
CHANGE R2100 VALUE
PLACE THESE PARTS CLOSE TO SMU IC
TOTAL CURRENT EXCLUDING LEDS CURRENT < 170 MICRO AMPS
20 INCH -->
PWM INPUT FROM SMU
PP5V_PWRON
PP5V_PWRON
AMB-GRN-BLUE
LATBG66B
RGB_LED
PLCC
4
3
1
5
2
6
LED2100
RGB_LED
TSSOP
LP324
4
8
9
10
11
U2100
PP5V_PWRON
953K
402
MF-LF
1%
1/16W
RGB_LED
2
1
R2109
PP5V_PWRON
RGB_LED
2N3904LF
SOT23
2
3
1
Q2102
RGB_LED
1/16W
402
MF-LF
1%
25.5
2
1
R2100
RGB_LED
TSSOP
LP324
4
14
13
12
11
U2100
RGB_LED
MF-LF
1/16W
402
1K
1%
2 1
R2112
RGB_LED
1%
1/16W
953K
402
MF-LF
2
1
R2104
402
1%
MF-LF
1/16W
RGB_LED
200K
2
1
R2105
10V
CERM
RGB_LED
603
0.47UF
20%
2
1
C2106
5%
0
402
MF-LF
1/16W
RGB_LED
2 1
R2101
402
953K
1%
MF-LF
1/16W
RGB_LED
2
1
R2102
PP5V_PWRON
RGB_LED
2N3904LF
SOT23
2
3
1
Q2108
RGB_LED
25.5
1%
1/16W
402
MF-LF
2
1
R2113
TSSOP
LP324
RGB_LED
4
7
6
5
11
U2100
402
1K
MF-LF
1/16W
RGB_LED
1%
2 1
R2114
MF-LF
1%
402
1/16W
953K
RGB_LED
2
1
R2110
RGB_LED
1%
1/16W
402
MF-LF
200K
2
1
R2111
CERM
RGB_LED
603
10V
20%
0.47UF
2
1
C2112
402
1/16W
MF-LF
5%
0
RGB_LED
2 1
R2115
MF-LF
1%
953K
402
1/16W
RGB_LED
2
1
R2118
PP5V_PWRON
RGB_LED
SOT23
2N3904LF
2
3
1
Q2114
RGB_LED
MF-LF
402
25.5
1%
1/16W
2
1
R2126
TSSOP
RGB_LED
LP324
4
1
2
3
11
U2100
RGB_LED
1/16W
402
MF-LF
1K
1%
2 1
R2127
RGB_LED
1/16W
402
MF-LF
1%
953K
2
1
R2116
RGB_LED
1/16W
402
1%
MF-LF
200K
2
1
R2117
RGB_LED
603
0.47UF
20%
10V
CERM
2
1
C2118
402
1/16W
RGB_LED
0
5%
MF-LF
2 1
R2130
20%
16V
CERM
402
0.022UF
RGB_LED
2 1
C2101
0.022UF
20%
RGB_LED
402
CERM
16V
21
C2102
RGB_LED
16V
CERM
402
0.022UF
20%
2 1
C2104
402
CERM
10V
RGB_LED
20%
0.1UF
2
1
C2103
1/16W
NOSTUFF
1K
402
5%
MF-LF
2 1
R2132
PP3V3_PWRON
FDV302P
SOT-23
NOSTUFF
2
1
3
Q2100
SM-1
RGB_LED
400-OHM-EMI
2
1
L2100
SM-1
400-OHM-EMI
RGB_LED
2
1
L2101
RGB_LED
SM-1
400-OHM-EMI
2
1
L2102
5%
25V
RGB_LED
CERM
402
220PF
21
C2105
CERM
25V
5%
RGB_LED
220PF
402
2
1
C2107
RGB_LED
SM-1
400-OHM-EMI
21
L2104
CERM
402
25V
5%
220PF
RGB_LED
2 1
C2108
RGB_LED
5%
25V
402
CERM
220PF
2 1
C2109
WHITE_LED
402
CERM
5%
220PF
25V
2 1
C2110
220PF
25V
5%
CERM
WHITE_LED
402
2
1
C2111
1/16W
402
5%
MF-LF
0
WHITE_LED
2 1
R2107
953K
402
MF-LF
1%
1/16W
NOSTUFF
2 1
R2119
SM
WHITE_LED
FDV301N
2
1
3
Q2101
WHITE
SM6
2
1
LED2101
PP3V3_PWRON
M-RT-SM
53261-0498
CRITICAL
4
3
2
1
6
5
J2100
PP3V3_PWRON
1/10W
5%
0
MF-LF
603
WHITE_LED
21
R2120
MF-LF
1/10W
5%
0
603
WHITE_LED
2
1
R2121
17_INCH_LCD
56.2
1/16W
402
MF-LF
1%
2
1
R2103
WHITE_LED
1K
1/16W
MF-LF
402
5%
2 1
R2106
WHITE_LED
4.7K
5%
402
1/16W
MF-LF
2
1
R2129
NOSTUFF
R2100,R2113,R2126
3
114S1821
RES, 18.2 OHM, 1%, 402
RES, 39.2 OHM, 1%, 402
R2103
1
20_INCH_LCD
114S3921
11051-6772
21 102
SYNC_MASTER=N/A
SYNC_DATE=N/A
INDICATOR LED
SYS_GATE
B_DRV
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
SYS_DRV_A
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
SYS_LED_DRV_K
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
MIN_LINE_WIDTH=0.6MM
B_DRV_K
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
R_DRV_K
MIN_NECK_WIDTH=0.2MM
G_DRV
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
G_DRV_K
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
GND_CHASSIS_LED
G_DRV_FB
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
GND_CHASSIS_LED
B_PWM_IN_H
B_PWM_DC
R_IN_OFFSET
SYS_LED_GREEN
MAKE_BASE=TRUE
R_PWM_IN_H
SYS_LED_RED
MAKE_BASE=TRUE
R_BASE_DRV
R_DRV_FB
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
R_DRV
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
B_DRV_FB
SYS_LED_BLUE
MAKE_BASE=TRUE
G_PWM_IN_H
B_IN_OFFSET
GND_CHASSIS_LED
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
RGB_LED_A
SYS_LED_IN
G_IN_OFFSET
G_PWM_DC
SYS_LED_DRV_C
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
R_PWM_DC
B_BASE_DRV
SYS_LED
G_BASE_DRV
U2100_UNUSED
I2C_ALS_SDA
I2C_ALS_SCL
SYS_LED_H
SYS_DRV_K
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
21
21
21
7
7
13
13
13
7
13
6
18
18
Preliminary
G
D
S
GND
GND
VDD
(SYM 6 OF 7)
G
D
S
FB
LD
HD
GND
COMP
SS
VCC
VC
G
D
S
LM339A
V+
GND
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
1.5V RUN FET
CHECK FETS
IS D2250 NEEDED?
7.73A OF PEAK CURRENT DRAW ON PCORE_NB
SET OUTPUT=1.5VDC FOR U3LITE CORE
IRU3037CS VREF=1.25VDC
VOUT=VREF*(R2203+R2205)/R2205=1.53VDC
NOTE:
U2200_FEEDBACK
@ VGS=3.5 V
RDSON=0.012 OHM
PLACE LED2200 NEAR VREG
20%
6.3V
CERM
1206
10UF
2
1
C2201
TH-KZJ
ELEC
6.3V
20%
1800UF
2
1
C2209
TH-KZJ
20%
1800UF
ELEC
6.3V
2
1
C2208
1/16W
10K
0.5%
MF-LF
603
2
1
R2205
1UF
10V
CERM
20%
603
NOSTUFF
2
1
C2207
25V
CERM
1206
1UF
20%
NOSTUFF
2
1
C2212
PP5V_PWRON
CASE369
NTD60N02R
Q2201
5%
MF-LF
0
805
1/8W
21
R2202
805
1UF
20%
25V
CERM
2
1
C2204
402
CERM
25V
5%
220PF
2
1
C2206
PP5V_PWRON
603
20%
16V
CERM
0.1UF
2
1
C2214
1UF
25V
CERM
805
20%
2
1
C2216
1UF
805
25V
CERM
20%
2
1
C2217
MBR0520LXXG
SOD-123
2 1
D2200
SOD-123
MBR0520LXXG
2 1
D2201
SOD-123
MBR0520LXXG
2
1
D2202
PBGA
V1.0-300MM
U3LITE
OMIT
R14
T16
T11
U18
U13
U10
V15
K15
V12
K12
L17
L14
M16
M11
N18
N13
P15
P12
R17
W17
W14
AC13
B22
B16
B13
B4
AC7
D25
D19
D10
D7
D2
F22
F16
F13
G27
G23
AE25
G4
H19
H10
J14
J9
K25
K21
K16
K11
K6
AE19
K2
L18
L13
L10
M20
M15
M12
N27
N23
N17
AE10
N14
N9
N8
N4
P19
P16
P11
R18
R13
R10
AE4
T27
T23
T20
T15
T12
T6
T2
U17
U14
U9
AG22
V19
V16
V11
W25
W21
W18
W13
W8
W4
Y20
AG16
Y15
Y12
AA19
AA10
AB27
AB23
AB6
AB2
AC22
AC16
AG13
AG7
U3
NTD60N02R
CASE369
3
1
4
Q2202
1.6UH
TH
21
L2201
1.1K
MF-LF
1/16W
1%
402
NOSTUFF
2
1
R2204
IRU3037CS
SOI
2 6
8
3
5
4
1
7
U2200
2.21K
1/16W
0.5%
MF-LF
603
2
1
R2203
402
27.4K
1%
1/16W
MF-LF
2
1
R2201
603
CERM
50V
5%
3900PF
2
1
C2215
603
68PF
5%
50V
CERM
2
1
C2213
PP5V_PWRON
4.7
5%
1/8W
MF-LF
805
2
1
R2200
PP1V5_RUN
10BQ040PBF
SMB
NOSTUFF
21
D2250
402
10V
0.1UF
CERM
20%
NOSTUFF
21
C2250
SOT23-LF
2N7002
2
1
3
Q2251
PP5V_PWRON
1/16W
5%
MF-LF
402
100K
2 1
R2250
TH-KZJ
20%
ELEC
6.3V
1800UF
2
1
C2202
6.3V
ELEC
1800UF
20%
TH-KZJ
2
1
C2203
10UF
6.3V
CERM
20%
1206
2
1
C2210
SO-8
IRF7413
321
4
8765
Q2250
402
330
DEVELOPMENT
MF-LF
1/16W
5%
2
1
R2260
2.0X1.25A
DEVELOPMENT
GREEN
2
1
LED2200
DEVELOPMENT
SOI
3
1
7
6
12
U1001
MF-LF
1/16W
5%
0
402
DEVELOPMENT
21
R2261
603
50V
5%
2200PF
CERM
2
1
C2205
CERM
10V
20%
0.1UF
402
2
1
C2222
402
20%
10V
CERM
0.1UF
2
1
C2223
CERM
20%
0.1UF
10V
402
2
1
C2225
402
0.1UF
20%
10V
CERM
2
1
C2228
CERM
10V
20%
0.1UF
402
2
1
C2227
402
20%
10V
CERM
0.1UF
2
1
C2230
10V
20%
402
CERM
0.1UF
2
1
C2229
402
0.1UF
20%
CERM
10V
2
1
C2232
CERM
10V
0.1UF
402
20%
2
1
C2231
402
0.1UF
20%
10V
CERM
2
1
C2234
CERM
10V
20%
0.1UF
402
2
1
C2233
402
0.1UF
20%
10V
CERM
2
1
C2236
CERM
10V
20%
0.1UF
402
2
1
C2235
0.1UF
20%
10V
CERM
402
2
1
C2238
CERM
10V
20%
402
0.1UF
2
1
C2237
402
0.1UF
20%
10V
CERM
2
1
C2240
10V
20%
0.1UF
402
CERM
2
1
C2239
402
0.1UF
20%
10V
CERM
2
1
C2242
CERM
10V
20%
0.1UF
402
2
1
C2243
0.1UF
20%
10V
CERM
402
2
1
C2244
402
0.1UF
20%
10V
CERM
2
1
C2245
402
0.1UF
20%
10V
CERM
2
1
C2246
402
0.1UF
20%
10V
CERM
2
1
C2247
051-6772 11
22
102
SYNC_MASTER=N/A
SYNC_DATE=N/A
U3LITE CORE POWER
=PPVCORE_NB
=PPVCORE_NB
=PPVCORE_NB
U2200_COMP
LED_PP1V5_RUN_N
PP1V5_RUN_FOR_LED
1V1_REF
LED_PP1V5_RUN_P
PP3V3_RUN
U2200_SS
SYS_SLEEP
PPVCORE_GPU
R2201_P2
U2200_VC
R2204_P2
U2200_VC_R U2200_VC_D
U2200_GATE_H
Q2201_GATE
Q5006G
PPVCORE_NB
VOLTAGE=1.5V
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
Q2202_DRAIN
U2200_FEEDBACK
U2200_GATE_L
50
50
34
46
18
11
11
10
50
10
9
51
22
22
34
7
8
50
7
7
6
10
6
6
6
7
6
6
6 6
6
6
6
6
6
6
Preliminary
VIO1
POWER
VDDO33
VDDO25
VIO2
VDDP_KL
VDDC
GND
GND
GND
(1 OF 8)
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
For PCI_AD<63..32>
For PCI_AD<31..0>
DIGITAL - 1.2V - 950 mA (1175 mW)
ANALOG12 - 1.2V - 600 mA ( 760 mW)
I/O 3.3 - 3.3V - 220 mA ( 770 mW)
Total: 3015 mW
I/O 2.5 - 2.5V - 20 mA ( 60 mW)
VDDPs - 2.5V - 100 mA ( 250 mW)
Shasta max (est 06/30/03) current:
Power aliases required by this page:
Page Notes
Must power Shasta VCore rail before any
_PPPCI64_PWRON_SB to same if 64-bit
characteristics required by the PCI
NOTE: PCI pads use the VIO supply to meet
- _PPVCORE_PWRON_SB (1.2V)
Power Sequencing:
BOM options provided by this page:
(NONE)
(NONE)
Signal aliases required by this page:
appropriate PCI bus voltage and
spec for 5V vs. 3.3V operation.
Connect _PPPCI32_PWRON_SB to
PCI, otherwise 3.3V.
different drive timing
- _PP3V3_PWRON_SB
- _PPPCI64_PWRON_SB (to 5V or 3.3V)
- _PPPCI32_PWRON_SB (to 5V or 3.3V)
- _PP2V5_PWRON_SB
other Shasta supplies.
0.1uF
402
CERM
10V
20%
2
1
C2304
20%
0.1uF
402
CERM
10V
2
1
C2305
20%
10V
CERM
402
0.1uF
2
1
C2306
0.1uF
402
CERM
10V
20%
2
1
C2307
10V
CERM
20%
402
0.1uF
2
1
C2308
0.1uF
CERM
402
10V
20%
2
1
C2309
20%
10V
CERM
402
0.1uF
2
1
C2302
20%
10V
CERM
402
0.1uF
2
1
C2301
0.1uF
402
CERM
10V
20%
2
1
C2300
20%
10V
CERM
402
0.1uF
2
1
C2314
20%
10V
CERM
402
0.1uF
2
1
C2313
0.1uF
CERM
10V
20%
402
2
1
C2312
0.1uF
402
CERM
10V
20%
2
1
C2311
0.1uF
10V
20%
CERM
402
2
1
C2310
0.1uF
402
CERM
10V
20%
2
1
C2334
20%
10V
CERM
402
0.1uF
2
1
C2333
20%
10V
CERM
402
0.1uF
2
1
C2339
0.1uF
402
CERM
10V
20%
2
1
C2338
0.1uF
402
CERM
10V
20%
2
1
C2332
20%
10V
CERM
402
0.1uF
2
1
C2331
20%
10V
CERM
402
0.1uF
2
1
C2337
0.1uF
402
CERM
10V
20%
2
1
C2336
0.1uF
402
CERM
10V
20%
2
1
C2330
20%
10V
CERM
402
0.1uF
2
1
C2335
20%
10V
CERM
402
0.1uF
2
1
C2324
20%
10V
CERM
402
0.1uF
2
1
C2323
0.1uF
402
CERM
10V
20%
2
1
C2329
0.1uF
402
CERM
10V
20%
2
1
C2328
0.1uF
402
CERM
10V
20%
2
1
C2322
0.1uF
402
10V
20%
CERM
2
1
C2321
20%
10V
CERM
402
0.1uF
2
1
C2327
20%
10V
CERM
402
0.1uF
2
1
C2326
20%
10V
CERM
402
0.1uF
2
1
C2320
0.1uF
402
CERM
10V
20%
2
1
C2325
402
0.1uF
CERM
10V
20%
2
1
C2351
CERM
20%
10V
402
0.1uF
2
1
C2350
CERM
10V
20%
402
0.1uF
2
1
C2357
0.1uF
402
CERM
10V
20%
2
1
C2356
20%
10V
CERM
402
0.1uF
2
1
C2355
20%
10V
0.1uF
402
CERM
2
1
C2362
10V
0.1uF
402
CERM
20%
2
1
C2361
20%
CERM
402
10V
0.1uF
2
1
C2360
20%
10V
CERM
402
0.1uF
2
1
C2365
SHASTA
V1.0
BGA
OMIT
Y19
W22
L21
K21
H17
H18
V8
D1
B5
B2
B1
AB6
AB2
AB10
AA3
W4
V7
U9
U12
R2
M1
L7
H1
F8
F4
AA2
AA1
G15
D19
P15
N8
M15
L8
L15
K8
J15
J12
T15
T10
R9
R12
R10
H8
H15
D2
C19
AB22
AB1
W5
W19
U22
U13
U10
T12
R19
P9
P4
AA6
P14
P13
P12
P10
N9
N22
N13
N12
N11
N10
AA10
M2
M14
M13
M12
M11
M10
L9
L16
L14
L13A5L12
L11
L10
K9
K7
K13
K12
K11
K10
J22
A22
J16
J14
J13
J11
J10
H9
H2
F7
F3
E22
A2
A1
U2300
0.1uF
402
CERM
10V
20%
2
1
C2303
11
051-6772
10223
SYNC_MASTER=N/A
SYNC_DATE=N/A
Shasta Core Power
=PPVCORE_PWRON_SB
=PP2V5_PWRON_SB
=PP3V3_PWRON_SB
=PPPCI32_PWRON_SB
=PPPCI64_PWRON_SB
=PP2V5_PWRON_SB
88
88
74
74
7
25
74
25
6
23
25
23
3
7
7
7
7
7
Preliminary
G
D
S
G
D
S
G
D
S
G
D
S
SYS_ISCL0
SYS_ISCA0
SYS_ISCA1
SYS_ISCL1
API_ISCA
API0_ISCL
THMO
DUMMY_A
DUMMY_B
PMR_OBSV
IRQ0
THMI
(SYM 7 OF 7)
HRESET*
PURESET*
SUSPENDACK*
SUSPENDREQ*
CE1_B_TDO
CE1_A_TDI
CE1_LT_TCK
VSP_CLKN
VSP_CLKP
CE1_DI1_TMS
CE1_DI2_TRST
CE1_RI
CEO_TEST
PM_SLEEP0
CE0_RE
CE0_MC
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
U3LITE REQUIRES ALL JTAG SIGNALS
JTAG_NB_TCK
JTAG_NB_TDI
JTAG_NB_TMS
JTAG_NB_TDO
HIGH FOR NORMAL OPERATION
JTAG_NB_TRST_L
PP3V3_PWRON
PP3V3_PWRON PP2V5_PWRON
PP2V5_PWRON
PP2V5_PWRON
402
4.7K
5%
1/16W
MF-LF
2
1
R2435
CERM
0.1UF
402
10V
20%
2
1
C2400
5%
1/16W
MF-LF
330
402
2
1
R2419
2N7002DW
SOT-363
4
5
3
Q2404
MF-LF
5%
1/16W
330
402
2
1
R2420
1/16W
402
MF-LF
1%
100
2
1
R2400
2N7002DW
SOT-363
1
2
6
Q2404
SOT-363
2N7002DW
NOSTUFF
4
5
3
Q2412
1/16W
5%
402
10K
MF-LF
NOSTUFF
2
1
R2438
2N7002DW
SOT-363
NOSTUFF
1
2
6
Q2412
1/16W
402
MF-LF
1%
100
2
1
R2403
402
5%
1/16W
MF-LF
10K
2
1
R2424
402
MF-LF
1/16W
5%
10K
2
1
R2426
402
10K
5%
1/16W
MF-LF
2
1
R2429
MF-LF
1/16W
5%
10K
402
2
1
R2431
402
10K
5%
1/16W
MF-LF
2
1
R2433
MF-LF
1/16W
402
10K
5%
2
1
R2436
10K
MF-LF
1/16W
5%
402
2
1
R2442
MF-LF
1/16W
5%
10K
402
2
1
R2443
402
10K
5%
1/16W
MF-LF
2
1
R2444
4.7K
402
MF-LF
1/16W
5%
NOSTUFF
2
1
R2405
0
5%
1/16W
MF-LF
402
21
R2406
0
5%
1/16W
MF-LF
402
NOSTUFF
21
R2408
V1.0-300MM
U3LITE
OMIT
PBGA
P4
R4
J18
J17
C21
C20
E21
B21
D21
D20
E20
D15
Y9
E9
A21
AB28
AC28
AH3
AC2
R25
F20
M26
AA25
V25
AD3
AD5
B20
A20
U3
402
121
1%
1/16W
MF-LF
2
1
R2402
MF-LF
1/16W
1%
121
402
2
1
R2401
1000PF
NOSTUFF
CERM
5%
25V
603
2
1
C2401
051-6772
102
24
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
U3LITE MISC
JTAG_NB_TMS
JTAG_NB_TDO
JTAG_NB_TRST_L
JTAG_NB_TDI
JTAG_NB_TCK
VSP_NB_CLK_N
SMU_SUSPENDREQ_L
I2C_NB_B_SCL
I2C_NB_B_SDA
I2C_NB_C_SDA
I2C_NB_C_SCL
I2C_NB_A_SDA
I2C_NB_A_SCL
NB_THMO
NB_THMI
NB_PMR_OBSV
NB_INT_L
TP_DUMMY_A
TP_DUMMY_B
NB_WARM_RESET_L
NB_COLD_RESET_L
NB_SUSPEND_ACK_L
NB_SUSPEND_REQ_L
NB_RI_PU
NB_TEST_PD
NB_RE_PD
NB_MC_PD
TP_NB_PM_SLEEP0
SYS_COLD_RESET_L
NB_PU_RESET
NB_COLD_RESET_L
VSP_NB_CLK_P
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=0.6V
NB_VSP_CLK_VREF
PMU_SUSPEND_REQ
=PP1V2_HT
NB_SUSPEND_REQ_L
28 25
13
60
27
13
18
18
18
18
18
18
8
8
8
25
6
6
8
24
8
24
6
8
24
27
7
24
Preliminary
GND
PLL_49
GND
XTAL_18 PLL_45
GND
VIO
PME
PLL_49
VDD
PLL_45
VDD
XGI
XTALS
TEST
PWR_MGT
PCI
GPIO
I2C
I2S2 I2S1 I2S0
(2 OF 8)
PCI1C_BE_4_L
PCI1C_BE_5_L
PCI1C_BE_6_L
PCI1C_BE_7_L
PCI1PAR64_H
XGI_DTI_H
XGI_DTO1_H
XGI_CLK_H
XGI_DTO0_H
PCI1ACK64_L
PCI1REQ64_L
PCI1AD_60_H
PCI1AD_63_H
PCI1AD_62_H
PCI1AD_61_H
PCI1AD_50_H
PCI1AD_52_H
PCI1AD_53_H
PCI1AD_51_H
PCI1AD_59_H
PCI1AD_58_H
PCI1AD_57_H
PCI1AD_56_H
PCI1AD_55_H
PCI1AD_54_H
PCI1AD_40_H
PCI1AD_41_H
PCI1AD_42_H
PCI1AD_43_H
PCI1AD_44_H
PCI1AD_49_H
PCI1AD_48_H
PCI1AD_47_H
PCI1AD_46_H
PCI1AD_45_H
PCI1AD_39_H
PCI1REQ_5_L
PCI1AD_32_H
PCI1AD_34_H
PCI1AD_38_H
PCI1AD_37_H
PCI1AD_36_H
PCI1AD_33_H
PCI1AD_35_H
PCI1GNT_5_L
PCI1GNT_4_L
PCI1REQ_4_L
PCI1GNT_3_L
PCI1REQ_3_L
XTAL_18XTAL
VDD VDD
FSTEST
XTAL_18_I
XTAL_18_O
XTALI
XTALO
PLLTEST
TEST_MODE_H
TDI
TCK
TMS
TDO
INTRWD_H
I2CDATA_H
I2CCLK_H
PCI_SEL32BIT_H
GPIO_H_3
GPIO_H_2
GPIO_H_1
I2S2SYNC_H
I2S2BITCLK_H
I2S2MCLK_H
I2S2DTO_H
I2S2DTI_H
GPIO_H_0
I2S1DTO_H
I2S1MCLK_H
I2S1BITCLK_H
I2S1SYNC_H
I2S1DTI_H
I2S0BITCLK_H
I2S0SYNC_H
I2S0DTI_H
I2S0DTO_H
I2S0MCLK_H
RESET_L
STOPXTALS_L
SUSPENDREQ_L
SUSPENDACK_L
PCI1PME_L
TRST_L
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
- PCI_64BIT
Configures Shasta for 64-bit PCI
NOTE: XGC required for Shasta GPIOs
Selects whether NorthBridge or
- MPIC_NB/MPIC_SB
the audio circuit to provide the
necessary pull-ups & pull-downs.
NOTE: It is the responsibility of
AUDIO GPIOS
REDUNDANT - NEED TO ADDRESS THIS
"Slot F" - AD22
23
To SouthBridge ->
REDUNDANT - NEED TO ADDRESS THIS
NET_SPACING_TYPE
Re-pin within each RPAK as necessary
(I2S0_DEV_TO_SB_DTI)
1 = 32-bit PCI & GPIOs
0 = 64-bit PCI & XGC
PCI 32-bit select
SouthBridge MPIC will be used for
interrupt controller.
NorthBridge / SouthBridge MPIC Routing
Page Notes
<- To CPU
-> From NorthBridge
From SouthBridge <-
AUDIO GPIO - see note on right
- _PP3V3_PWRON_SB
- _PP1V2_PWRON_SB
Signal aliases required by this page:
35
32
21
"Slot E" - AD21
6
(NONE)
- _PP2V5_PWRON_SB
- _PP3V3_PCI
29
(I2S2_RESET_L)
48
49
52
51
50
54
53
40
39
46
47
45
44
41
43
38
37
36
34
28
30
33
31
(SCCB) (SCCA)
25
24
20
18
19
27
22
12
9
16
15
14
13
17
8
11
7
10
26
Power aliases required by this page:
BOM options provided by this page:
NC
GPIO
ELECTRICAL_CONSTRAINT_SET
DIFFERENTIAL_PAIR
I2S1: Soft Modem
I2S0: Audio DAC
(I2S1_DEV_TO_SB_DTI)
I2S2: S/P-DIF
42
DO NOT swap between RPAKs
(I2S1_RESET_L)
(I2S2_DEV_TO_SB_DTI)
20%
NOSTUFF
CERM
1206
6.3V
10uF
2
1
C2500
6.3V
10%
1uF
CERM
402
2
1
C2501
402
6.3V
1uF
CERM
10%
2
1
C2511
1206
10uF
CERM
6.3V
20%
NOSTUFF
2
1
C2510
10uF
1206
CERM
6.3V
20%
NOSTUFF
2
1
C2520
1uF
10%
6.3V
CERM
402
2
1
C2521
6.3V
20%
CERM
10uF
NOSTUFF
1206
2
1
C2530
1uF
10%
402
CERM
6.3V
2
1
C2531
10K
5%
1/16W
MF-LF
402
2
1
R2500
1K
5%
PCI_64BIT
402
MF-LF
1/16W
2
1
R2501
200
402
MF-LF
1/16W
1%
2
1
R2590
CERM
402
22pF
5%
50V
2
1
C2591
22pF
5%
50V
CERM
402
2
1
C2590
4.7K
402
1/16W
5%
MF-LF
2
1
R2580
OMIT
SHASTA
BGA
V1.0
Y13
V13
W13
AB12
W14
V15
U15
T9
U7
W2
Y4
W17
W12
Y11
A3
W11
AA11
AB11
U11
V11
W10
E9
Y12
AA12
AA13AB13
U14
W6
U16
AB21
U17
K17
W18
E18
Y20
AA20
AA19
K20
K22
H22
J20
H21
G22
F22
J19
H20
G21
F21
J17
H19
K18
D22
G20
D21
C22
G19
F20
C21
E20
D20
F19
E19
G18
G17
C20
B21
A21
F16
G16
F17
F18
A20
D18
L17
V12
W9
Y7
Y8
AA5
AB4
AA7
V9
AB5
V10
AA8
Y6
U8
Y5
W7
AA4
AB7
Y9
W8
AB3
Y2
V5
V14
U2300
20%
10V
CERM
402
0.1uF
2
1
C2540
1/16W
5%
10K
SM-LF
63
RP2551
10K
1/16W
5%
SM-LF
81
RP2550
10K
5%
SM-LF
1/16W
54
RP2550
1/16W
5%
10K
SM-LF
72
RP2550
5%
10K
1/16W
SM-LF
81
RP2551
10K
5%
1/16W
SM-LF
72
RP2551
5%
1/16W
10K
SM-LF
54
RP2551
1/16W
5%
SM-LF
10K
81
RP2552
10K
5%
1/16W
SM-LF
63
RP2550
10K
SM-LF
1/16W
5%
72
RP2552
10K
5%
1/16W
SM-LF
54
RP2552
1/16W
10K
SM-LF
5%
63
RP2552
10K
1/16W
5%
SM-LF
72
RP2553
1/16W
SM-LF
5%
10K
54
RP2553
10K
SM-LF
1/16W
5%
81
RP2553
10K
1/16W
5%
SM-LF
63
RP2553
402
5%
1/16W
MF-LF
10K
21
R2550
402
5%
1/16W
MF-LF
10K
21
R2551
MF-LF
10K
5%
1/16W
402
21
R2552
402
10K
MF-LF
1/16W
5%
21
R2553
402
10K
MF-LF
1/16W
5%
21
R2556
402
10K
MF-LF
1/16W
5%
21
R2557
402
5%
1/16W
MF-LF
10K
21
R2558
402
5%
1/16W
MF-LF
10K
21
R2559
10K
5%
1/16W
MF-LF
402
21
R2564
5%
1/16W
MF-LF
402
10K
21
R2563
1K
5%
1/16W
MF-LF
402
21
R2560
1/16W
10K
402
MF-LF
5%
21
R2561
10K
402
MF-LF
1/16W
5%
21
R2565
10K
402
MF-LF
1/16W
5%
21
R2567
1/16W
10K
402
MF-LF
5%
21
R2568
1K
5%
1/16W
MF-LF
402
NO STUFF
21
R2562
402
NO STUFF
5%
1/16W
MF-LF
10K
21
R2555
1/16W
402
MF-LF
5%
1K
21
R2554
PP3V3_RUN
MF-LF
10K
5%
1/16W
402
2
1
R2576
MPIC_SB
2N3904LF
SOT23
2
3
1
Q2576
MPIC_SB
10K
402
MF-LF
1/16W
5%
21
R2575
0
402
MF-LF
1/16W
5%
MPIC_NB
2
1
R2579
402
47
MPIC_SB
MF-LF
1/16W
5%
21
R2578
1/16W
SM-LF
33
5%
7
8
6
5
2
1
3
4
RP2510
1/16W
5%
33
SM-LF
8
7
6
5
1
2
3
4
RP2530
SM-LF
33
5%
1/16W
6
5
8
7
3
4
1
2
RP2520
3.3
5%
1/8W
MF-LF
805
21
R2505
3.3
805
MF-LF
1/8W
5%
21
R2510
5%
1/8W
MF-LF
805
3.3
21
R2520
805
3.3
MF-LF
5%
1/8W
21
R2530
1/16W
402
0
5%
MF-LF
21
R2511
11.4X4.7X4.2-SM
18.432M
21
Y2590
0
5%
1/16W
MF-LF
402
21
R2566
402
NOSTUFF
0
MF-LF
5%
1/16W
21
R2570
051-6772
11
10225
SYNC_MASTER=N/A
SYNC_DATE=N/A
Shasta Serial / Misc
AUDIO
I2S0_MCLK
I2S0_TO_DEV
I2S0_BITCLK
I2S0_BIDIR
I2S0_TO_DEV
I2S0_SB_TO_DEV_DTO
I2S0_SYNC
I2S0_BIDIR
AUDIO_LO_OPTICAL_PLUG_L
ENET_ENERGYDET
=PP3V3_PWRON_SB
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
PP1V2_PWRON_SB_PLL45VDD
I2S1_BITCLK
I2S1_MCLK
I2S1_RESET_L
I2S2_MCLK
I2S1_DEV_TO_SB_DTI
I2S0_SYNC
I2S2_SYNC
TP_SB_FSTEST
SB_PCI_SEL32BIT
JTAG_SB_TRST_L
JTAG_SB_TMS
SB_GPIO52
SB_GPIO50
SMU_TO_SB_INT_L
SB_GPIO47
SB_GPIO45
SB_GPIO25
SB_GPIO23
SB_GPIO30
SB_GPIO24
SB_GPIO12
PCI_SLOTC_INT_L
PCI_SLOTF_INT_L
PCI_SLOTB_INT_L
SB_TO_SMU_INT_L
SB_TEST_MODE_PD
=PP3V3_PWRON_SB
I2S2_RESET_L
I2S0_SB_TO_DEV_DTO
I2S1_SYNC
I2S1_SB_TO_DEV_DTO
I2S2_SB_TO_DEV_DTO
I2S2_SYNC_R
I2S2_BITCLK_R
I2S2_SB_TO_DEV_DTO_R
I2S1_SYNC_R
I2S1_BITCLK_R
I2S1_MCLK_R
I2S1_SB_TO_DEV_DTO_R
I2S0_SYNC_R
I2S0_SB_TO_DEV_DTO_R
SYS_PME_L
I2C_SB_SCL
SB_SUSPENDACK_L
SMU_SUSPENDREQ_L
SB_STOPXTALS_L
SB_INT_L
MODEM_RING2SYS_L
I2C_SB_SDA
TP_SB_WATCHDOG
JTAG_SB_TCK
JTAG_SB_TDI
TP_SB_PLLTEST
SB_CLK25M_ATA
=PP3V3_PCI
PCI_SLOTE_REQ_L
PCI_SLOTF_REQ_L
PCI_SLOTE_GNT_L
PCI_SLOTF_GNT_L
PCI_SLOTA_INT_L
PCI_SLOTE_INT_L
PCI_SLOTD_INT_L
PCI_SLOTG_INT_L
JTAG_SB_TDO
SYS_WARM_RESET_L
SB_CLK18M_XTALO_R
I2S2_BITCLK
CLOCKS
SB_CLK25M_ATA
SB_CLK25M_ATA
I2S2_DEV_TO_SB_DTI
I2S2_MCLK_R
PP2V5_PWRON_SB_XTALVDD
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
=PP2V5_PWRON_SB
NB_TO_SB_INT
NB_INT_L
CPU_INT_L
NB_INT_L_R
SB_INT_L
I2S1_TO_DEV
I2S1_MCLK
P25MM
SB_GPIO47
SYS_SLEWING_L
SB_GPIO50
SB_GPIO49
SB_GPIO51
SB_GPIO52
NB_TO_SB_INT
SMU_TO_SB_INT_L
AUDIO_SPKR_DET_L
AUDIO_LO_MUTE_L
AUDIO_SPKR_MUTE_L
AUDIO_GPIO_12
AUDIO_LI_DET_L
AUDIO_LI_OPTICAL_PLUG_L
AUDIO_HP_DET_L
AUDIO_HP_MUTE_L
AUDIO_EXT_MCLK_SEL
AUDIO_GPIO_11
PCI_SLOTF_INT_L
SB_TO_SMU_INT_L
I2S0_MCLK_R
I2S0_BITCLK_R
SYS_SLEWING_L
CPU_SRESET_L
I2S1_RESET_L
=PP3V3_PWRON_SB
SB_GPIO51
SB_GPIO49
SB_GPIO46
SB_CLK18M_XTALI
SB_CLK18M_XTALO
SB_CLK18M_XTAL
SB_CLK18M_XTALI
CLOCKS
I2S2_BITCLK
I2S2_BIDIR
I2S2_TO_DEV
I2S2_MCLK
P25MM
VOLTAGE=2.5V
PP2V5_PWRON_SB_XTAL18VDD
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
I2S1_BIDIR
I2S1_BITCLK
I2S0_TO_SB
I2S0_DEV_TO_SB_DTI
MIN_NECK_WIDTH=0.25MM
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.5MM
PP1V2_PWRON_SB_PLL49VDD
=PP1V2_PWRON_SB
I2S2_TO_DEV
I2S2_SB_TO_DEV_DTO
I2S2_DEV_TO_SB_DTI
I2S2_TO_SB
I2S1_BIDIR
I2S1_SYNC
I2S1_SB_TO_DEV_DTO
I2S1_TO_DEV
SB_GPIO46
SB_GPIO45
I2S0_RESET_L
=PP3V3_PWRON_SB
SYS_OVERTEMP_L
UDASH_RESET_L
MODEM_RING2SYS_L
SB_SATABR_RESET_L
PCI_SLOTE_GNT_L
ENETFW_RESET
ENET_ENERGYDET
SB_GPIO25
ENETFW_RESET
PCI_SLOTG_INT_L
CPU_SRESET_L
PCI_SLOTE_REQ_L
PCI_SLOTF_REQ_L
SB_GPIO12
SYS_OVERTEMP_L
PCI_SLOTF_GNT_L
FW_LOWPWR
SB_CLK18M_XTALO_R
CLOCKS
SB_SATABR_RESET_L
PCI_SLOTD_INT_L
AUDIO_LO_DET_L
SB_GPIO30
PCI_SLOTC_INT_L
PCI_SLOTB_INT_L
AGP_INT_L
UDASH_RESET_L
UDASH_SDOWN
I2S1_TO_SB
I2S1_DEV_TO_SB_DTI
PCI_SLOTA_INT_L
FW_LOWPWR
FW_LOWPWR_SHASTA
SB_GPIO24
SB_GPIO23
PCI_SLOTE_INT_L
I2S2_SYNC
I2S2_BIDIR
SB_CLK18M_XTALO
CLOCKS
I2S0_DEV_TO_SB_DTI
I2S0_MCLK
I2S0_BITCLK
77
74
74
76
88
30
33
33
74
74
27
27
25
94
94
94
94
25
94
94
28
94
75
76
77
74
29
94
27
27
30
94
25
94
94
94
25
25
94
30
25
94
76
102
102
95
95
86
23
25
25
25
102
25
95
102
25
25
23
95
25
25
102
77
18
24
25
18
27
74
56
25
77
74
102
27
102
23
14
25
25
25
25
25
29
25
23
102
102
25
95
102
102
25
25
23
16
25
25
86
25
77
29
16
56
89
101
25
25
89
102
95
102
102
25
25
25
25
101
25
7
6
6
6
25
6
25
25
6
8
8
25
25
13
25
25
25
25
25
25
25
25
25
25
13
7
102
25
6
6
25
13
6
13
13
13
25
6
6
8
8
6
25
7
25
25
25
25
6
25
25
25
8
8
25
25
25
25
7
25
24
6
25
6
25
13
25
25
25
25
25
13
102
98
100
101
101
102
102
102
102
102
25
13
13
25
6
7
25
25
25
25
25
25
25
25
6
25
7
25
25
6
6
25
25
95
7
13
25
6
25
25
12
25
25
12
25
25
25
25
25
13
25
25
25
25
25
6
25
25
25
49
25
94
6
6
25
25
25
25
25
25
25
25
25
Preliminary
SYM 2 OF 2
VDD33
VDD25
VDD25
VDD_PLL3
VDD_PLL2
VDD_PLL1
C4_VDD
C3_VDD
C2_VDD
VDD_PLL4
VDD_I2C
VDD_NBSYNC
VDD_PCLK
VDD33_BC
VDD33_BC1
VDD_HCLK0
VDD_HSYNC
VDD_HCLK2
VDD_HCLK0
VDD_HCLK1
VDD_HCLK2
VDD_HSYNC
VDD15_HSYNC
VDD15_PCLK
VDD_XTAL
VDD_VCLK
VSS_XTAL
VSS_VCLK
VSS_HSYNC
VSS_HCLK2
VSS_HCLK0
VSS_HCLK1
VSS_HCLK2
VSS_HSYNC
VSS_HCLK0
VSS33_BC1
VSS33_BC
VSS33
VSS_PCLK
VSS_NBSYNC
VSS25
VSS25
VSS_I2C
VSS_CML
VSS_PLL4
VSS_PLL3
VSS_PLL2
C2_VSS
C3_VSS
C4_VSS
VSS_PLL1
C1_VSSC1_VDD
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PLACE NEAR PIN D10 D12
A8, C5, B4, K10, H12 J11, M11, A1
PINS G12, M12, H3, K1, L5, M9, A11, A9
CAN BE TURNED OFF IN SLEEP
PLACE NEAR PIN D2 D1
PLACE NEAR PIN M3 M2
PLACE NEAR PIN L8 K8
402 CAPS NOT NEEDED
IF 603 CAN BE PLACED CLOSE TO PULSAR
MF-LF
1/16W
5%
402
4.7
21
R2601
PP3V3_RUN
PP3V3_PWRON
CERM
20%
10V
402
0.1UF
2
1
C2601
402
4.7
5%
1/16W
MF-LF
21
R2603
402
4.7
5%
1/16W
MF-LF
21
R2605
0.1UF
402
10V
20%
CERM
2
1
C2605
180-OHM-1.5A
0603
21
L2601
CERM
402
10V
0.1UF
20%
2
1
C2609
402
10V
20%
CERM
0.1UF
2
1
C2611
0603
180-OHM-1.5A
21
L2603
0.1UF
CERM
20%
10V
402
2
1
C2613
0603
180-OHM-1.5A
21
L2605
0.1UF
CERM
20%
10V
402
2
1
C2615
0603
180-OHM-1.5A
21
L2607
402
CERM
20%
10V
0.1UF
2
1
C2617
0.1UF
20%
10V
402
CERM
2
1
C2619
0.1UF
402
10V
20%
CERM
2
1
C2622
MF-LF
1/16W
5%
4.7
402
21
R2607
0603
180-OHM-1.5A
21
L2609
10V
20%
CERM
0.1UF
402
2
1
C2620
CERM
20%
10V
402
0.1UF
2
1
C2627
0.1UF
402
10V
20%
CERM
2
1
C2628
CERM
20%
402
0.1UF
10V
2
1
C2629
CERM
20%
10V
402
0.1UF
2
1
C2630
CERM
20%
10V
402
0.1UF
2
1
C2651
0.1UF
402
10V
20%
CERM
2
1
C2623
0.1UF
402
10V
20%
CERM
2
1
C2624
0.1UF
402
10V
20%
CERM
2
1
C2625
0.1UF
402
10V
20%
CERM
2
1
C2626
0.1UF
402
10V
20%
CERM
2
1
C2631
0.1UF
402
10V
20%
CERM
2
1
C2632
0.1UF
402
10V
20%
CERM
2
1
C2633
0.1UF
402
10V
20%
CERM
2
1
C2634
0.1UF
402
10V
20%
CERM
2
1
C2635
0.1UF
402
10V
20%
CERM
2
1
C2636
0.1UF
402
10V
20%
CERM
2
1
C2637
0.1UF
402
10V
20%
CERM
2
1
C2638
10V
402
20%
0.1UF
CERM
2
1
C2665
CERM
20%
10V
402
0.1UF
2
1
C2667
CERM
20%
10V
402
0.1UF
2
1
C2671
402
0.1UF
10V
20%
CERM
2
1
C2640
402
CERM
0.1UF
20%
10V
2
1
C2639
402
4.7
5%
1/16W
MF-LF
21
R2609
20%
6.3V
2.2UF
603
CERM1
2
1
C2645
603
20%
2.2UF
6.3V
CERM1
2
1
C2669
603
20%
CERM1
6.3V
2.2UF
2
1
C2603
603
20%
6.3V
CERM1
2.2UF
2
1
C2607
603
20%
CERM1
6.3V
2.2UF
2
1
C2621
PULSAR
OMIT
FSBGA
C12
A3
M2
K8
D1
D12
L12
F11
C2
K12
H10
A7
A4
B7
B11
C10
A6
M5
L7
E2
H2
L2
A12
A1
M3
L8
D2
D10
M12
G12
B2
H12
K10
B4
C5
A8
A9
A11
M9
L5
E1
K1
H3
M11
J11
C9B9
E10E12
M4L3
G1F1
U2600
PP3V3_PWRON
PP3V3_PWRON
PP3V3_PWRON
PP3V3_RUN
PULSAR, PBGA
U2600
1
359S0076
102
26
051-6772
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
PULSAR POWER
=PP1V2_PULSAR
=PPVCORE_PULSAR
=PPVCORE_PULSAR
=PPVCORE_PWRON_PULSAR
=PPVCORE_PWRON_PULSAR
=PP1V2_PULSAR
=PPVCORE_PULSAR
=PP1V2_PULSAR
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM
VOLTAGE=1.5V
PP1V5_PSL_PLL1
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
PP3V3_PSL_XTAL
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
=PPVCORE_PWRON_PULSAR
PP1V5_PSL_PLL3
VOLTAGE=1.5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=1.5V
PP1V5_PSL_PLL2
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
PP1V5_PSL_PLL4
VOLTAGE=1.5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
46
46
40
40
37
37
26
26
26
26
26
26
26
26
26
26
26
7
7
7
7
7
7
7
7
7
7
7
Preliminary
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