Page 1
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
78
6
5
4
3
ECN
ZONE
REV
DESCRIPTION OF CHANGE
SEEDY
11
365610
ENGINEERING RELEASED
12
CK
APPD
DATE
02/17/05
ENG
APPD
?
DATE
02/17/05
D
CSA
10
11
12
C
13
14
16
17
18 17
21
22
23
24
25
26
27
28
B
29
30
31
32
33
34
35
36
37
38
40
44
45
A
46
48
49
50
PDF
1
2
3
4
5
6
7 7
8
9
10
11
12
13
14
15
16
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
CIRCUIT
1
TABLE OF CONTENTS
2
SYSTEM BLOCK DIAGRAM
POWER BLOCK DIAGRAM
3
REVISION HISTORY
4
TABLE ITEMS
5
FUNC TEST
6
POWER CONNECTOR / POWER ALIAS
SIGNAL ALIAS
8
2.5V VREG
9
1.2V VREG
3.3V/5V PWRON SWITCHING
VESTA POWER
SMU
CPU LOGIC ANALYZER CONNECTOR
FAN 0, 1 AND SYSTEM TEMP SENSOR
FAN 2 AND HARD DRIVE TEMP SENSOR
I2C CONNECTIONS
INDICATOR LED / AMBIENT LIGHT SENSOR
1.5V VREG / U3LITE CORE
SHASTA CORE
U3LITE MISC
SHASTA SERIAL
PULSAR POWER
PULSAR CLOCKS
U3LITE APPLE PI
NEO APPLE PI
CPU STRAPS
NEO POWER & BYPASS
CPU BYPASS
CPU VREG
CPU VREG
CPU VREG OUTPUT CAPS
CPU DIODE CONDITIONER
U3LITE MEMORY
SERIES TERMINATION
DIMMS
PARALLEL TERMINATION
PARALLEL TERMINATION
VTT VREG
U3LITE AGP
GPU AGP
GRAPHICS VREGS
* PAGES WHERE MASTER PAGE IS IN A DIFFERENT SCHEMATIC
8
67
BLOCK
TOP
PROCESSOR
MEMORY
GRAPHICS
5
CSA
51
52
53
54
55
56
59
60
62
64
73
74
75
76
77
83
84
86
87
88
89
90
91
92
94
95*
96*
98*
100*
101*
102*
4
PDF
43
44
45
46
47
48
4958
50
51
52
53
54
55
56
57
58
5980
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
GPU CORE POWER
GPU FRAME BUFFER
FRAME BUFFER TERMINATION
GRAPHICS DDR SDRAM A
GRAPHICS DDR SDRAM B
GPU STRAPS
GPU DVI & DACS
EXT VGA & TMDS
U3LITE HYPERTRANSPORT
SHASTA HYPERTRANSPORT
HYPERTRANSPORT LA CONNECTORS
PCI SERIES TERMINATION
SHASTA PCI
BOOT ROM
AIRPORT EXTREME & BLUETOOTH
USB2 PCI
SHASTA DISK
DISK CONNECTORS
SHASTA ETHERNET
VESTA ETHERNET PHY
ETHERNET CONNECTOR
SHASTA FIREWIRE
VESTA FIREWIRE PHY
FIREWIRE CONNECTORS
USB HOST INTERFACE
USB DEVICE INTERFACE
MODEM CONNECTOR
PCM3052A AUDIO CODEC
LINE IN AMP
LINE OUT AMP
SPEAKER AMP
AUDIO CONNECTORS
AUDIO POWER SUPPLIES
DIMENSIONS ARE IN MILLIMETERS
X.XX
X.XXX
ANGLES
THIRD ANGLE PROJECTION
CIRCUIT
XX
DO NOT SCALE DRAWING
3
DRAFTER
ENG APPD
QA APPD
RELEASE
METRIC
MATERIAL/FINISH
NOTED AS
APPLICABLE
DESIGN CK
MFG APPD
DESIGNER
SCALE
NONE
SIZE
2
Apple Computer Inc.
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
TITLE
SCH,MLB,SEEDY
DRAWING NUMBER
D
051-6772
BLOCK
GRAPHICS
HT
PCI
DISK
ETHERNET
FIREWIRE
USB
MODEM
AUDIO
1
SHT
REV.
11
OF
1 102
D
C
B
A
Page 2
FREQUENCIES LISTED ARE MAXIMUM DATA TRANSFER RATES SUPPORTED BY U3LITE
D
U5400, U5401
FRAME
BUFFER A
PAGE 54
U2600
PULSAR
POWER
C
PAGE 26
B
CLOCKS
PAGE 27
HARD DRIVE
FOR DEVELOPMENT ONLY
OPTICAL
78
64-BIT
FRAME BUFFER
2.6V/400MHZ
JXXXX
SATA
CONNECTOR
PAGE 83
J8302
SATA DEV
CONNECTOR
PAGE 83
J8301
UATA
CONNECTOR
PAGE 83
J5900, J5901
J5902, J5903
17",20" INVERTER
TMDS
EXT VGA
PAGE 59
U4900
GPU
RV351LE
PAGE 49
U5500, U5501
FRAME
BUFFER B
PAGE 55
SATA/150
1.2V/1.5GHZ
SATA/150
1.2V/1.5GHZ
UATA/133
3.3V/133MHZ
64-BIT
FRAME BUFFER
2.6V/400MHZ
6
32-BIT
8X AGP
0.8V/533MHZ
4X = 1.5V
I/O = 1.5V
U2900
CPU
NEO 10S
PAGE 29
APPLE PI
PAGE 28
U3
AGP
U3LITE
PAGE
48
HYPERTRANSPORT
MISC
PAGE 24
I2C
PAGE 18
SATA1 SATA2
PAGE 80 PAGE 80
ETHERNET FIREWIRE
PAGE 84
8-bit TX & 8-bit RX
GMII (3.3V/125MHz)
HYPERTRANSPORT
SATA
U2300
UATA
CORE
PAGE 23
PAGE 88
32-BIT
APPLE PI
ELASTIC INTERFACE
1.2V/900MHZ
CORE
PAGE 22
PAGE 60
J6400
J6401
J6402
HT
DEBUG
PAGE 64
PAGE 62
SHASTA
NCs
PAGE 91
1394 OHCI (3.3V/98MHz)
8-bit TX/RX
5
64/128-BIT
MAIN MEMORY
2.6V/400MHZ
PAGE 37
MAIN MEMORY
8-BIT
HYPERTRANSPORT
1.2V/800MHZ
CONTROL = 2.5V
I2S
PAGE 25
SCCA SCCB
I2S1
PAGE 74
PCI
PAGE 25
GPIO/PCI64
I2S2I2S0
SERIES
TERM
PAGE 38
U7500
BOOTROM
32-bit PCI (5V-3.3V/33MHz)
4
J4000
J4001
DIMMS
PAGE 40
J7600
AIRPORT
EXTREME
CONNECTOR
PAGE 76
J9401
CTL-LESS /
SOFT MODEM
CONNECTOR
PAGE 94
PAGES 44&45
1 2 3
U7700
USB 2.0
uPD720101
PARALLEL
TERM
USB
PAGE 91
PCI
PAGE 77PAGE 75
4 5
3
U1300
SMU
PAGE 13
U1301
RTC
PAGE 13
12
D
J9210/J9220/J9230
USB
CONNECTORS
PAGE 92
J9240
BLUETOOTH
CONNECTOR
PAGE 92
C
B
U9500
S/PDIF
AUDIO CODEC
U8600
VESTA
GIG ETHERNET
A
4 Diff pairs
J8700
ETHERNET
CONNECTOR
PAGE 87
8
67
FIREWIRE A
PAGE 89PAGE 86
1
0
2 Diff pairs
J9000, J9001
FIREWIRE A
CONNECTORS
PAGE 90
5
PCM3052A
LINE IN
AMP
PAGE 97
J9800
LINE IN
CONNECTOR
PAGE 98
PAGE 95
J9802
MIC
CONNECTOR
PAGE 98
LINE OUT
AMP
PAGE 97
SPEAKER
AMP
PAGE 97
4
OPTICAL OUT
J9803
COMBO OUT
CONNECTOR
PAGE 98
LINE OUT
J9801
SPEAKER
CONNECTOR
PAGE 98
SYSTEM BLOCK DIAGRAM
SYNC_MASTER=N/A
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6772
APPLE COMPUTER INC.
3
2
D
SCALE
NONE
SHT
2
1
SYNC_DATE=N/A
OF
102
A
REV.
11
Page 3
78
6
5
4
3
12
D
C
B
J700
PAGE 7
PP24V_RUN
PP5V_RUN_AUDIO
PAGE 99
5V
PP4V5_RUN_AUDIO
PAGE 99
4.5V
FW CONN
20" LCD INVERTER
LINEAR
LINEAR
HP/LINEOUT AMP
AUDIO CODEC
PP12V_RUN
CPU CORE
SWITCHER
PAGE 33
0.8~1.2V
20" PANEL POWER
20" LCD INVERTER
SC2643VX*1
SC1211*4
GPUL
=PP5V_RUN_CPU
ALIAS
PP2V5_RUN
FET SWITCH
PAGE 9
PP1V8_GPU
LINEAR
PAGE 50
POWER CONNECTOR
PP5V_RUN
HDD & OPTICAL
31
8 7
6
CPU_AVDD_EN
RAM TERM
GRAPHIC FB
PP2V5_RUN_CPU_AVDD
31
LINEAR
PAGE 31
2.8V
1.53V
GPU
CPU AVDD
U3LITE CORE
SWITCHER
PAGE 22
PP1V25_RAM_VTT
PAGE 46
1.3V
PP5V_PWRON
FET SWITCH
PAGE 11
5V
IRU3037CS
U3LITE CORE
LINEAR
2.59V
RAM VTT
PP5V_ALL
3.3V
USB CONN
3.3V
PP2V5_PWRON
SWITCHER
PAGE 9
IRU3037CS
SHASTA HT
DDR DIMM
IN
1.5V
PP3V3_ALL
LINEAR
PAGE 11
FW PHY
SMU
PP3V3_PWRON
FET SWITCH
PAGE 11
ENET PHY
USB2 HOST
MODEM & BT
PP2V5_PWRON
IN
PP1V5_PWRON
LINEAR
PAGE 50
PULSAR CORE
PP1V5_RUN
POWER SW
PAGE 50
AGP BUS
GPU CORE
SWITCHER
PAGE 50
1.20V
IRU3037ACS
RV351
PP1V8_TPVDD
PAGE 50
LINEAR
SYS_POWERUP_L
PP3V3_RUN
PCI BUS
AUDIO CODEC
PP2V5_GPU_A2VDD
PAGE 50
PP1V5_VDDC_CT
LINEAR
PAGE 50
PAGE 10
1.2V
LINEAR
GPU
GPUGPU
PP1V2_PWRON
FET SWITCH
PAGE 10
SHASTA CORE
PWRON_SD
PWRON_DISK_SB
=PPVCORE_PWRON_SB
6 7
23
R340
100K
1/16W
MF-LF
402
PULSAR_POWER_DOWN
MAKE_BASE=TRUE
TP_SMU_PWRSEQ_P1_0
MAKE_BASE=TRUE
TURN_ON_PP1V2_PWRON_L
10 10
=PULSAR_POWER_DOWN
27
5V
PP1V2_ALL
SWITCHER
IRU3037ACS
VESTA CORE
IN IN
IN
21
5%
1
C340
0.01UF
20%
16V
2
CERM
402
IN
PP1V2_RUN
FET SWITCH
PAGE 10
COMPARE_PP2V5
PP5V_ALL
HT BUS
1
R342
150K
5%
1/16W
MF-LF
402
2
PS_2V_REF
1
R343
100K
5%
1/16W
MF-LF
402
2
SYS_POWERUP_L
POWER SEQUENCE PIN
SMU_PWRSEQ_P1_4
SMU_PWRSEQ_P1_0
SMU_PWRSEQ_P1_1
SMU_PWRSEQ_P9_5
SMU_PWRSEQ_P9_6
SMU_PWRSEQ_P1_2
R330
100K
5%
1/16W
MF-LF
402
3
V+
U1100
GND
12
LM339A
SOI
6
7
RAIL_CTL_NEG
11
21
COMPARE_SB_CORE
1
C330
0.01UF
20%
16V
2
CERM
402
PP3V3_ALL
1
13
13
13
13
13
13
SMU
PP3V3_ALL
8
9
1
R341
10K
5%
1/16W
MF-LF
402
2
PWR_GOOD_PP2V5
(PWR_GOOD_SB_CORE)
(PWR_GOOD_PP2V5)
(TURN_ON_VTT)
1
R331
10K
5%
1/16W
MF-LF
402
2
PWR_GOOD_SB_CORE
3
LM339A
SOI
V+
U1100
GND
12
D
C
14
B
TURN_ON_VTT
46
POWER BLOCK DIAGRAM
A
APPLE COMPUTER INC.
8
67
5
4
3
SYNC_MASTER=N/A
2
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
D
SCALE
DRAWING NUMBER
NONE
051-6772
SHT
3
1
SYNC_DATE=N/A
OF
102
A
REV.
11
Page 4
78
6
5
4
3
12
DATE
10/20/04
10/21/04
D
10/22/04
10/26/04
10/28/04
11/01/04
C
11/03/04
11/04/04
11/06/04
B
11/07/04
11/08/04
11/09/04
A
11/10/04
DESCRIPTION
CLONED DESIGN FROM GILA (Q45 A/B) REV G
CHECKIN 00002
ADDED VESTA
ADDED 1.2V REGULATOR FOR VESTA CORE
ADDED 2.5V LDO FOR VESTA
ADDED FW LATE VG PROTECTION
REMOVED BCM5231 ETHERNET PHY
REMOVED FW802A FW PHY
REMOVED FW PORT POWER CIRCUITRY
REMOVED MICRODASH CONNECTOR
CHECKIN 00003
REMOVED NV18/34 GPU
REMOVED AGP VREG (VR5001)
REMOVED GPU VTT VREG
ADDED 2.5V VREG FOR A2VDD
REMOVED EXTERNAL TMDS TRANSMITTER
ADDED RV351LE GPU
CHECKIN 00004
GPU CORE POWER UPDATES
ADDED VESTA ETHERNET LOWPWR CIRCUIT
ADDED DEVELOPMENT LEDS FOR VESTA ENET
CHECKIN 00005
CONNECTED FRAME BUFFER
ADDED 1.8V GPU VREG
CONNECTED GPU TMDS AND VGA
CONNECTED GPU POWER AND POWER FILTERS
CHECKIN 00006
ADDED VOLTAGE, LINE WIDTH, AND NECK WIDTH PROPERTIES FOR GRAPHICS (IN MM)
TIED PPVCORE_NB DIRECTLY TO PP1V5_PWRON (REMOVED R707)
REPLACED EMC FERRITES WITH 0 OHM RESISTORS FOR GRAPHICS AND FANS
REMOVED VESTA CORE REGULATOR
REPURPOSED 1.2V REGULATOR FOR VESTA AND SHASTA
CHANGED FW LATE VG CIRCUITRY TO MATCH Q78 & Q86
CHECKIN 00007
<RADAR 3848831> MOVED SMU RESET BUTTON TO DEVELOPMENT BOM
<RADAR 3849762> MOVED SMU DOWNLOAD CONNECTOR TO DEVELOPMENT BOM
<RADAR 3849798> REDUCED CAPACITANCE OF C1100 & C1102
MASTER PAGE SYNC:
FRAME BUFFER SWAPS FOR CLEANER ROUTING
REMOVED VESTA ROM
AUDIO COST REDUCTIONS <RADAR 3849747 & 3849751>
AUDIO 3052A CODEC
ADDED 1.55V VREG FOR GPU VDDC_CT
MOVED VTT VREG TO 2.5V PWRON TO REDUCE CURRENT THROUGH Q903
CHANGED FETS IN GPU CORE FOR COST REDUCTION
ADDED SPACING & PHYSICAL CONSTRAINTS TO FRAME BUFFER
CHECKIN 00008
REMOVED 1.6GHZ PROCESSORS
CHANGED VOLTAGE SETTING OF 2.5V VREG TO 2.588V FROM 2.62V
1.2V VREG COST REDUCTIONS - Q1002 TO NTD60N02R; C1002/3 TO 10UF CERM
U2850 - REMOVED MAXIM AS AN ALTERNATE
MOVED GPU ZENER DIODES TO VREG PAGE SINCE THEY SHOULD BE PLACED NEAR THE VREGS
ADDED 8MX32 GRAPHICS MEMORY
ADDED GIGABIT ETHERNET CONNECTOR
CHECKIN 00009
ADDED GPU STRAPS
CONNECTED GPU GPIOS
REMOVED ON BOARD POWER SUPPLY TEMP SENSOR
ADDED AMBIENT LIGHT SENSOR CONNECTOR
CONNECTED GPU TEMP SENSOR
REMOVED CPU VREG 4TH PHASE
ADDED DEVELOPMENT LEDS TO REGULATORS
CHECKIN 00010
ADDED MORE GPU CONSTRAINTS
<RADAR 3616348, 3621390> CHANGED FL5900-2 TO 220 OHM
<RADAR 3848846> 2.5V RUN FET COST REDUCTION
<RADAR 3848859> 1.2V, 1.5V RUN FET COST REDUCTIONS
<RADAR 3848887> 5V & 3.3V PWRON FET COST REDUCTIONS
<RADAR 3849622> STUFFED AROUND TMDS FILTERS
<RADAR 3849656> STUFFED AROUND RGB FILTERS
<RADAR 3849806> CHEAPER SMU CRYSTAL
<RADAR 3849857> CHEAPER USB2 CRYSTAL
BOM RELEASE REV 01
FRAME BUFFER PIN SWAPS
<RADAR 3848846> UPDATE OF 2.5V RUN FET COST REDUCTION
<RADAR 3849743> ADDED RESISTORS TO STUFF AROUND USB FILTERS
CHECKIN 01001
<RADAR 3848850> REGULATOR COST REDUCTIONS
<RADAR 3849767> 2.5V VREG COST REDUCTIONS
<RADAR 3849772> REMOVED OUTPUT CAP ON 1.2V_ALL VREG
<RADAR 3849820> SHASTA FILTER COST REDUCTION
<RADAR 3849854> GPU CORE VREG COST REDUCTION
<RADAR 3865344> SET GPU VDDC_CT VREG TO 1.55V
CHECKIN 01002
CHANGED SOURCE OF Q1003 TO PP1V2_ALL
RGB TERMINATION NOW CONNECTED TO DIGITAL GROUND
WHITE LED - CHANGED INDUCTORS TO 0 OHM RESISTORS
UPDATED POWER BLOCK DIAGRAM
CHECKIN 01003
<RADAR 3848850> 2.5V VREG COST REDUCTION
CHECKIN 01004
P
11/15/04
11/16/04
11/18/04
11/20/04
11/22/04
11/23/04
12/02/04
12/07/04
re
12/09/04
12/13/04
12/14/04
12/15/04
ADDED REGULATOR FOR GPU TPVDD
ADDED POWER SEQUENCING FOR GRAPHICS REGULATORS
ADDED TEST POINTS TO GRAPHICS FOR EXOR TESTING
REMOVED EXTERNAL S/PDIF TRANSMITTER
CHECKIN 01005
REMOVED P50 AIRPORT AND Q23 BLUETOOTH CONNECTORS, HOLES, & STANDOFFS
ADDED Q85 AIRPORT & BLUETOOTH CONNECTOR
CHECKIN 01006
(PP 16,17) REPLACED FAN CONTROL WITH NEW CIRCUIT
(P 76) FINISHED CONNECTING Q85 CONNECTOR
(P 7) ADDED PLATED HOLE ZH710 FOR TMDS GROUNDING
(P 7) TIED BOTH EI RAILS TO 1.5V
(P 5) NEW BOOTROM P/N
(P 9) ADDED EXTRA 10UF INPUT CAP
(P 12) VESTA_ENET_LOWPWR UPDATE
(P 18) <RADAR 3878118> MOVED SMU I2C E BUS
(P 22) CHANGED Q2250 TO 376S0143
(P 46) SLEEP SIGNAL TURNS OFF VTT VREG
(P 58) REPLACED THERMAL SENSOR WITH LM63
(P 59) TIED UNUSED BUFFER ENABLE PINS HIGH
(P 90) FIXED FW PORT NAMING
(P 90) CHANGED R9090 TO 665 OHM
(P 91) CHANGED USB2 CHIP GROUNDING
(P 8) ALIASED VESTA JTAG TO TEST POINT NETS
(P 9) <RADAR 3848846> ADDED PAD FOR 1NF CAP TO GATE OF Q903
CHECKIN 01007 / BOM RELEASE REV 02
ADDED PHYSICAL CONSTRAINTS
AUDIO STUFFING CHANGES
CHECKIN 02001
(P 36) CONNECTED NEW CPU DIODE REFERENCE
(P 77) USB2 IDESEL - NOW FROM USB2 SIDE
(P 56) ADDED BOMOPTIONS FOR MEMORY STRAPS
(PP 56, 58) CONNECTED PWM FROM RV351LEP & PUT IN PROTO WORKAROUND
(P 25) <RADAR 3849835> NEW SHASTA XTAL
(P 62) <RADAR 3849855> SHASTA HT_PLL FILTER COST REDUCTION
(P 91) <RADAR 3849858> USB CAP COST REDUCTION
(P 76) ADDED STANDOFFS FOR Q85 CARD
(PP 16,17) NEW FAN CIRCUIT CAPS (C1603, C1653, C1703)
(P 50) <RADAR 3865344> VDDC_CT SET TO 1.50V
(P 50) <RADAR 3877855> TP_VDD SET TO 1.80V
(P 12) VESTA_ENET_LOWPWR UPDATE
(PP 10, 22, 34, 50) USED COMPARATOR FOR LOW VOLTAGE RAIL LEDS
CHECKIN 02002
(P 49) CONNECTED AGPTEST RESISTOR TO VDDP
(P 56) ADDED PADS FOR STRAPPING RESISTORS TO GPU_GPIO<14>
(P 58) ADDED CONSTRAINT SETS
(P 59) STUFFED AROUND Q5900 PANEL PWR SEQUENCING
(P 59) LED 3 NOW DRIVEN FROM FPD_PWR_ON
(P 3) CONNECTED SHASTA CORE POWER FOR POWER SEQUENCING
(P 76) FIXED PCI_CBE_L<1> CONNECTION
MORE PHYSICAL & SPACING UPDATES
(P 83) <RADAR 3890225> OPTICAL DRIVE CONNECTOR CHANGED TO 516S0235
CHECKIN 02003
(P 56) ADDED OPTION OF USING PWM FROM SHASTA
<RADAR 3849718, 3849767, 3849854> MADE ON & VISHAY FETS TRUE ALTERNATES
(P5) ADDED U3L W/ NEW LAMINATE AS ALTERNATE
(P 16) C1653 - REPLACED WITH LOWER HEIGHT CAP
CHECKIN 02004
(P 76) TABLED IN NEW STANDOFFS FOR Q85 CARD
PROTO RELEASE (REV 3)
(P 90) FIXED ALIAS PROBLEM WITH FW_TPB2_PD
(P 90) FIXED FW_CPS SHORT
l
(P 35) REMOVED DS3500 & DS3501
(P 83) REMOVED SECOND SATA CONNECTOR
CHECKIN 03001
CONVERTED DISCRETES TO LEAD FREE
CHECKIN 03002
CHANGED U7700 BACK TO LEADED PART
(P 5) REMOVED ORIGINAL U3LITE (NEW LAMINATE ONLY FOR C/D)
(P 49) CHANGED GPU TO RV351LEP (338S0231)
(P 76) NOW HAVE CORRECT SYMBOL FOR STANDOFFS
(P 76) J7650 - NEW TO ALLOW 5MM CONNECTED HEIGHT
BOM RELEASE REV 04
CHANGED ALIASES TO SYNONYMS
CHANGED LINE AND NECK WIDTHS TO METRTIC
CHECKIN 04001
ADDED 2.0 GHZ AND ADDITIONAL 1.8 GHZ ALTERNATE PROCESSORS TO PG. 5 TABLE
VESTA XTAL: R5815=249, R8609=332, R8921=332
VESTA ENET: R1262=10K, C1260=10U, R1251=NO STUFF, C1250=2.2U
FANS: NO STUFF DZ1601, DZ1651, DZ1701
STUFFED R1604, R1654, R1704
CHECKIN 04002
2.5 V REGULATOR - NEW NARROWER OUTPUT CAPS (C908, C909)
(P 46) REMOVED SEMTECH REGULATOR, ADDED RICHTEK AS ALTERNATE VTT
(P 16) CHANGED FAN1 OUTPUT CAP BACK TO THROUGH-HOLE
(P 59) SWAPPED INVERTER CONNECTOR GENDER
CHECKIN 04003
(P 46) RICHTEK VTT UPDATES
BOM RELEASE REV 5
(P 6) ADDED NO_TESET PROPERTIES
(P 12) VESTA ENET LOW POWER FIX
CHECKIN 05001
i
i
m
12/16/04
12/17/04
12/20/04
01/11/05
01/18/05
01/25/05
01/27/05
a
02/01/05
n
02/03/05
02/04/05
02/08/05
02/09/05
02/10/05
02/15/05
02/16/05
02/17/05
FIXED I2C_TMDS_SDA/SCL ON P 6
(P 46) NOSTUFF RICHTEK VTT VREG
(P 59) STUFFED TMDS CHOKES
(P 56) USING PWM FROM ATI GPU
(P 38) FIXED MIN_NECK_WIDTH ON TD1 AND TD2
(P 92) ADDED NET_PHYSICAL_TYPE = USB2 TO TABLE
(P 7) ADDED BATTERY SAFETY BYPASS OPTION (NOSTUFF)
CHECKIN 05002
(P 50) ADDED Q5000 TO INPUT OF GPU VCORE VREG
(P 6) REMOVED SOME FUNC_TEST PROPERTIES
(P 50) GPU_VDCC_CT POWER SEQUENCING
CHECKIN 05003
(P 6) ADDED/REMOVED MORE FUNC_TEST PROPERTIES
CHECKIN 05004
(P 50) GPU POWER SEQUENCING
CHECKIN 05005
MINOR TEXT/COMMENT CHANGES
EVT RELEASE (REV 6)
(P 5) REMOVED BRA FROM ALTERNATE PROCESSOR TABLE, REPLACED BPA WITH BNA
(P 5) NEW SMU PART NUMBER
CHANGED SDF7601 TO PART 860-0567
BOM RELEASE REV 7
(P 5) CORRECTED 1.8GHZ CPU APPLE P/N FROM 337S2969 TO 337S2998 ON ALTERNATE PROCESSOR TABLE
(P 12) NOSTUFF Q1250 TO DISCONNECT ENETFW_RESET FROM SHASTA GPIO
(P 5) CORRECTED SMU PART NUMBER TO 341T1703
(P 16, 17) HAROLD’S FAN CIRCUIT CHANGES
CHECKIN 07002
(P 25) REPLACED R2566 WITH 0 OHM TO ELIMINATE FW_LOWPWR GLITCH
ADDED 0 OHM (R2570, NOSTUFF) TO BREAK FW_LOWPWR FROM SHASTA
(P 56) STUFF R5610 TO PULL DOWN ATI_PWM SIGNAL TO ELIMINATE GLITCH
(P 27,28,29) CONNECTED CPU_APSYNC FROM U3LITE AND DISCONNECTED FROM PULSAR
(P 11) CHANGED C1102 TO 16V FOR SUPPLY AND COST ISSUES
(P 5) ADDED KQA (337S3093) TO ALTERNATE PROCESSOR TABLE
CHECKIN 07003
(P 5) MODIFIED PROCESSOR TABLE TO MATCH IBM’S TABLE, AGAIN.
BOM RELEASE REV 8
(P 75) BOOTROM REFLASHING ISSUE FIX: CHANGED R7502 TO 470 OHM
(P 12) ENET_LOWPWR GLITCH FIX:ADDED A CLAMP CIRCUIT FOR ENET_LOWPWR GLITCH
(P 10,22) SHASTA & U3LITE VCORE POWER IMPROVEMENT: STUFF C1005 AND C2205 WITH 2200PF CAPS
(P 13) CHANGED U1301 TO LEADED PART (353S0653) DUE TO SUPPLY
(P 5) ADDED 34S0284 AND 34S0282 AS U3LITE ALTERNATES (OLD LAM)
BOM RELEASE REV 9
(P 28) CHANGED APSYNC SERIES TERMINATION R2806 TO 10 OHM
(P 5) ADDED LEAD FREE PARTS AS ALTERNATE FOR U1301 & VRA201 DUE TO SUPPLY
(P 8) REMOVED SMU DOWNLOAD CONNECTOR FROM DEVELOPMENT BOM
(P 92) STUFFED USB COMMON MODE CHOKES FOR EMC
CHECKIN 09002
(P 50) <RADAR 3919121> NOSTUFF U5090 AND RELATED COMPONENTS, STUFFED R5092 FOR 1.5V GPU VDCC_CT
(P 7) REMOVED ZH701
(P 12) STUFF R1251, CHANGE C1250 TO 10UF, R1262=100K TO LENGTHEN VESTA RESET AND LOWPWR DELAY
(P 59) <RADAR 3849662> STUFFED PANEL POWER SEQUENCING FOR BOTH 17 AND 20 INCH
CHECKIN 09003
(P 92) <RADAR 3742725> CHANGED USB COMMON MODE CHOKES TO 120-OHM 155S0232
(P 59) NOSTUFF R5950, STUFF R5923 FOR 17 INCH PANEL POWER FROM PP3V3_RUN INSTEAD OF PP3V3_ALL
CHECKIN 09004
(P 59) <RADAR 3919083> CHANGED R5971 AND R5972 TO 33 OHMS
(P 56) <RADAR 3960901, 4000359> GPU GPIO GLITCH STUFFED: U5600, U5601, NOSTUFF: R5609, R5621
DVT RELEASE (REV 10)
(P 56) <RADAR 3960901, 4000359> GPU GPIO GLITCH STUFFED: C5600, C5601
(P 12) CHANGED C1250 TO 6.3V PART, TO MATCH A PART ALREADY ON THE BOM
(P 5) ADDED 353S0687 (LEADED) AS ALTERNATE FOR 353S0959 (LEAD FREE) U9800
ADDED PAGE TITLE PROPERTIES FOR SCHEMATIC REUSE WITH M23/M33
(P 12) YET ANOTHER VESTA RESET/LOWPWR STUFFING CHANGE
(P 16,17,36) ADDED SIGNAL ALIASES FOR SCHEMATIC REUSE WITH M23
(P 50) RE-STUFFED GPU 1.5V VDCC_CT BECAUSE OF LEAKAGE WORRIES
BOM RELEASE REV 11
ry
NO STUFF: R2768,R2772,R2805,R2910
STUFF: R2806,R2911
11
SYNC_MASTER=N/A
NOTICE OF PROPRIETARY PROPERTY
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
II NOT TO REPRODUCE OR COPY IT
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
SIZE
DRAWING NUMBER
051-6772
APPLE COMPUTER INC.
D
SCALE
NONE
SHT
4
SYNC_DATE=N/A
OF
102
D
C
B
A
REV.
11
8
67
5
4
3
2
1
Page 5
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_11_HEAD
TABLE_11_HEAD
REFERENCE DESIGNATOR(S)
BOM OPTION
QTY
DESCRIPTION
VALUE VOLT. WATT.
TOL.PART #
PACKAGE
DEVICE
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_ALT_ITEM
TABLE_5_ITEM
TABLE_ALT_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
TABLE_ALT_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_11_HEAD
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
ALTERNATES
ASICS
MISC PARTS
QUALIFIED
VOLTAGE
1.20V
1.25V
1.20V
1.25V
1.25V
1.25V
PROCESSORS
1.15V
337S3056 337S3055
IC,DD3.1,2.0G,KRA
CPU_2_0GHZ
U2900
DS1338, L-F PART
353S0653
U1301
353S0958
353S0959 MAX9722 LEAD
U9800
353S0687
378S0119
KINGBRIGHT LED
LED700,LED702,LED5900
378S0114
VPP1
1
062-2082
SPEC,VENDOR PACKAGING PROCEDURE
IC,DD3.0,1.8G,BPA
CPU_1_8GHZ
U2900
337S3060337S2969
337S3055337S3059
IC,DD3.0,2.0G,CRA
CPU_2_0GHZ
U2900
U2900
CPU_2_0GHZ
337S3058
IC,DD3.0,2.0G,CPA
337S3055
U2900
CPU_2_0GHZ
IC,DD3.1,2.0G,KQA
337S3093 337S3055
U3L,OLD LAM,300MM
343S0284 343S0320
U3
CBGA-576-1MM
IC,GPUL,DD3.1,2.0G,85C,KPA
337S3055
PROCESSOR
42W ?
U29001.20V
2.0GHZ
CPU_2_0GHZ
1
1
343S0324
U8600
IC,ASIC,VESTA,V1.3
U31
343S0320
IC,U3LITE,NEW LAM,300MM,PBGA
MECH17
CRITICAL
17_INCH_LCD
1
603-6015
HEAT SINK ASSEMBLY 17 IN
U3L,OLD LAM,200MM
343S0282U3343S0320
102
5
11
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
TABLE ITEMS
IC,GPUL,DD3.1,1.8G,85C,JPA
CBGA-576-1MM
PROCESSOR
1.8GHZ
1.20V
337S3060
CPU_1_8GHZ
U2900
?1 42W
IC,DD3.1,1.8G,JRA
337S3061
U2900
CPU_1_8GHZ
337S3060
U2900
CPU_1_8GHZ
337S3060337S2970
IC,DD3.0,1.8G,BRA
353S0733
VRA201
MAX8510,L-F PART
353S0960
MOSFET,N-CH,VISHAY
376S0207
Q3311,Q3321,Q3411
376S0146
820-1747
1
MLB1
PCB,FAB,MLB
LBL1
1
825-6447
BARCODE LABEL, MLB, Q45
051-6772 SCH1
1
PCB,SCHEM,MLB
1
U7500
341T1667
IC,FLASH,1MX8,3.3V,90NS
U1300
IC,SMU,Q45C/D
1
341T1703
376S0204
MOSFET,N-CH,VISHAY
Q3310,Q3320,Q3410
376S0130
MECH20
CRITICAL
1
20_INCH_LCD
603-6016
HEAT SINK ASSEMBLY 20 IN
U3
U3L,NEW LAM,200MM
343S0321 343S0320
343S0283
1
U2300
IC,ASIC,SHASTA,V1.1,PBGA
Preliminary
Page 6
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
2 TEST POINTS
2 TEST POINTS
5 TEST POINTS
GENZ SHOULD USE J1400 FOR THE FOLLOWING NETS:
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
2 TEST POINTS
10 TEST POINTS
5 TEST POINTS
5 TEST POINTS
12 TEST POINTS
5 TEST POINTS
5 TEST POINTS
2 TEST POINTS
5 TEST POINTS
I307
I337
I338
I344
I345
I346
I347
I348
I349
I350
I354
I355
I356
I357
I358
I359
I360
I361
I362
I363
I364
I365
I371
I372
I373
I374
I375
I376
I377
I378
I379
I380
I381
I382
I383
I384
I385
I386
I387
I388
I389
I390
I391
I392
I393
I394
I395
I396
I397
I398
I399
I400
I401
I402
I403
I404
I405
I406
I407
I408
I428
I429
I430
I431
I432
I433
I434
I435
I436
I437
I438
I439
I440
I441
I442
I443
I444
PP5V_ALL
PP12V_RUN
PP5V_RUN
PP3V3_PWRON
PP5V_PWRON
PP2V5_RUN
PP1V5_RUN
PP1V2_PWRON
PP3V3_RUN
12 11
7
18 11 10
7
50 34 22 18 11 10
7
83
7
83
7
18 11
58 27 18 11
23
7 3
13
8 7
31
8 7 3
35 34 33
7
22
34 33
33
33
8 7
13
7
7
7
13
8
50 46 22 11 10
9 8
33 13 11 10
7
13
8
22
9
59 58
59 58
59 58
83 80
83 80
83 80
83 80
83
83 80
83 80
83 80
6
83 80
6
83 80
83
83
83
83
33
8
36
36
36
36 33
36
36 33
59
59
59
59
59 58
59
59
59
59
59
59
77 76 75 74 73
77 76 74 73
8
76 74
76 74
76 25
77 76 74 73
74 56
8
77 76 74 73
77 76 74 73
77 76 74 73
77 76 74 73
77 76 74 73
76 75 74
76
76 75 74
76 75 74
76
76 75
76
76
92
92
92
92
92
92
92
92
92
94 25
94 25
94 25
94 25
94 25
94 25
94 25
59
59
59
59
59
59
59
6
59
6
59
7
101
25
75
PP24V_RUN
36 31
I781
I782
I784
I785
I786
I787
I788
I789
I790
I791
I792
I793
I794
I795
I796
I797
I798
I799
I800
I801
I802
I803
I804
I805
I806
I807
I808
I809
I810
101
90
101
101
18 17
18 17
25 18
25 18
36 33 31
36 33 31
59
6
59
6
83
I824
I825
I826
I827
I828
I829
I830
I831
I832
I833
I834
I835
I836
I837
I838
I839
I840
I841
I842
I843
I844
I845
I846
I847
I848
I849
I850
I851
I852
I853
I854
I855
I856
I857
I858
I860
I861
I866
I867
I868
I869
I870
I871
I872
I873
I874
I875
I876
I878
I879
I880
I881
I882
I883
I884
I885
I886
I887
I888
I889
I890
I891
I892
I893
I894
I895
I896
I897
I898
I899
I900
I901
I902
I903
I904
I905
I906
I907
I908
I909
I910
I911
I912
I913
I914
I915
I916
I917
I918
I919
I920
I921
I922
I923
I924
I925
I926
I927
I928
I929
I930
I931
I932
I933
I934
I935
I936
I937
I938
I939
59
59
59
59
59
59 58
59 58
051-6772
102
6
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
FUNC TEST
PP5V_ALL
FUNC_TEST=YES
PP12V_RUN
FUNC_TEST=YES
PP5V_RUN
FUNC_TEST=YES
GND
FUNC_TEST=YES
PP3V3_PWRON
FUNC_TEST=YES
PP5V_PWRON
FUNC_TEST=YES
PP2V5_RUN
FUNC_TEST=YES
PP1V5_RUN
FUNC_TEST=YES
PP1V2_PWRON
FUNC_TEST=YES
FUNC_TEST=YES
PP3V3_RUN
PP24V_RUN
FUNC_TEST=YES
TP_NEC_NANDTEST
NO_TEST=YES
FUNC_TEST=YES
VGA_HSYNC_R
NO_TEST=YES
TP_SB_NC_U6
TP_SB_NC_V3
NO_TEST=YES
NO_TEST=YES
TP_SB_NC_V2
TP_SB_NC_V4
NO_TEST=YES
NO_TEST=YES
TP_SB_NC_Y1
TP_SATA_CLK25M
NO_TEST=YES
NO_TEST=YES
Q2202_DRAIN
NO_TEST=YES
R904_P2
NO_TEST=YES
U5000_SS
NO_TEST=YES
U5000_GATE_L
U5000_GATE_H
NO_TEST=YES
LED802_1
NO_TEST=YES
NO_TEST=YES
PCI_CLK66M_SB_INT_R
NO_TEST=YES
PN1
PCI_CLK_P4_R
NO_TEST=YES
PCI_CLK_P3_R
NO_TEST=YES
HT_CLK66M_SB_R
NO_TEST=YES
TP_USB2_PWREN<4>
NO_TEST=YES
NO_TEST=YES
TP_NEC_NTEST1
TP_PLS_TEST2
NO_TEST=YES
NO_TEST=YES
TP_SB_NC_P7
NO_TEST=YES
TP_SB_NC_T3
FUNC_TEST=YES
=PP12V_DISK
NO_TEST=YES
EI_CPU_SYNC_R
EI_NB_SYNC_R
NO_TEST=YES
NO_TEST=YES
RFBD<16>
FUNC_TEST=YES
U2200_FEEDBACK
NO_TEST=YES
U900_VC
NO_TEST=YES
U900_VC_D
UATA_DASP_L_DS
NO_TEST=YES
NO_TEST=YES
U900_VC_R
TP_PCI_CLK_P4
NO_TEST=YES
U900_COMP
NO_TEST=YES
NO_TEST=YES
U2200_VC
U2200_VC_D
NO_TEST=YES
U2200_VC_R
NO_TEST=YES
TP_USB2_PWREN<0>
NO_TEST=YES
TP_USB2_PWREN<1>
NO_TEST=YES
TP_SB_NC_T8
NO_TEST=YES
TP_SB_NC_T7
NO_TEST=YES
NO_TEST=YES
TP_SB_NC_T6
NO_TEST=YES
TP_NEC_SRDATA
NO_TEST=YES
TP_NEC_SMI_L
TP_USB2_PWREN<3>
NO_TEST=YES
NO_TEST=YES
TP_USB2_PWREN<2>
TP_PSYNCOUT
NO_TEST=YES
NO_TEST=YES
TP_PSRO2
NO_TEST=YES
TP_AFN
TP_ATTENTION
NO_TEST=YES
TP_AGP_MB_AGP8X_DET_L
NO_TEST=YES
Q803_B
NO_TEST=YES
LED801_1
NO_TEST=YES
PN3
NO_TEST=YES
NO_TEST=YES
Q801_B
NO_TEST=YES
Q802_E
Q1002_DRAIN
NO_TEST=YES
NO_TEST=YES
Q800_D
NO_TEST=YES
RFBD<33>
NO_TEST=YES
RFBD<32>
FUNC_TEST=YES
USB_BT_P
USB2_PORT2_P_F
FUNC_TEST=YES
SYS_POWER_BUTTON_L
FUNC_TEST=YES
FUNC_TEST=YES
VCORE_SENSE_GND
USB2_PORT1_N_F
FUNC_TEST=YES
USB2_PORT1_P_F
FUNC_TEST=YES
NO_TEST=YES
Q5001_GATE
NO_TEST=YES
U3410_DRN
NO_TEST=YES
U5000_VC
U5000_FEEDBACK
NO_TEST=YES
NO_TEST=YES
U5000_COMP
RFBD<48>
NO_TEST=YES
RFBD<49>
NO_TEST=YES
U2200_COMP
NO_TEST=YES
U2200_GATE_H
NO_TEST=YES
Q5002_DRAIN
NO_TEST=YES
U3310_DRN
NO_TEST=YES
U3320_DRN
NO_TEST=YES
U2200_SS
NO_TEST=YES
U2200_GATE_L
NO_TEST=YES
NO_TEST=YES
RFBD<38>
RFBD<46>
NO_TEST=YES
RFBD<30>
NO_TEST=YES
NO_TEST=YES
RFBD<47>
RFBD<45>
NO_TEST=YES
NO_TEST=YES
RFBD<42>
RFBD<43>
NO_TEST=YES
RFBD<37>
NO_TEST=YES
NO_TEST=YES
RFBD<35>
RFBD<28>
NO_TEST=YES
RFBD<29>
NO_TEST=YES
NO_TEST=YES
RFBD<26>
RFBD<25>
NO_TEST=YES
RFBD<24>
NO_TEST=YES
RFBD<22>
NO_TEST=YES
RFBD<23>
NO_TEST=YES
RFBD<21>
NO_TEST=YES
RFBD<18>
NO_TEST=YES
NO_TEST=YES
RFBD<19>
RFBD<13>
NO_TEST=YES
RFBD<14>
NO_TEST=YES
RFBD<11>
NO_TEST=YES
RFBD<12>
NO_TEST=YES
NO_TEST=YES
RFBD<9>
RFBD<7>
NO_TEST=YES
RFBD<8>
NO_TEST=YES
RFBD<4>
NO_TEST=YES
NO_TEST=YES
RFBD<6>
RFBD<3>
NO_TEST=YES
RFBD<2>
NO_TEST=YES
RFBD<1>
NO_TEST=YES
TP_SB_NC_Y3
NO_TEST=YES
NO_TEST=YES
TP_SB_FSTEST
NO_TEST=YES
TP_SB_NC_P8
FUNC_TEST=YES
INV_17_CUR_HI_F
FUNC_TEST=YES
TDIODE_NEG_FMAX
TP_NEC_TEB
NO_TEST=YES
NO_TEST=YES
TP_FBBCS1_L
TP_J4000_SJRESET_L
NO_TEST=YES
PLS_CLK_66M_0_R
NO_TEST=YES
AUD_4V5_FB
NO_TEST=YES
NO_TEST=YES
AGP_CLK66M_NB_R
NO_TEST=YES
ERROR_LED
HT_CLK66M_NB_R
NO_TEST=YES
TP_PSRO1
NO_TEST=YES
NO_TEST=YES
TP_SB_NC_R5
NO_TEST=YES
TP_VREF_CG
NO_TEST=YES
EI_CPU1_SYNC
NO_TEST=YES
TP_PROC_TRIGGER_OUT
NO_TEST=YES
SYNCENABLE
NO_TEST=YES
RI_L
NO_TEST=YES
MCP_L
NO_TEST=YES
I2C_SMU_A_SCL_OUT_L
NO_TEST=YES
I2C_SMU_A_SDA_OUT_L
NO_TEST=YES
EI_SE
NO_TEST=YES
EI_QREQ_L
NO_TEST=YES
EI_QACK_L
NO_TEST=YES
EI_CPU1_CLK_P
NO_TEST=YES
CPU_HRESET_L
NO_TEST=YES
CPU_INT_L
NO_TEST=YES
EI_CPU1_CLK_N
NO_TEST=YES
CPU1_HTBEN
NO_TEST=YES
CHKSTOP_L
NO_TEST=YES
EI_NB_TO_CPU_CLK_N
EI_NB_TO_CPU_SR_N<0..1>
NO_TEST=TRUE
EI_NB_TO_CPU_SR_P<0..1>
NO_TEST=TRUE
NO_TEST=YES
EI_CPU_TO_NB_CLK_N
NO_TEST=TRUE
EI_CPU_TO_NB_SR_N<0..1>
NO_TEST=TRUE
EI_CPU_TO_NB_AD<0..43>
FUNC_TEST=YES
SYS_POWERUP_L
=PP5V_RUN_CPU
FUNC_TEST=YES
PPVCORE_NB
FUNC_TEST=YES
PPVCORE_CPU
FUNC_TEST=YES
PP12V_CPU
FUNC_TEST=YES
VCORE_SENSE_VOUT
FUNC_TEST=YES
SMU_MANUAL_RESET_L
FUNC_TEST=YES
POWER_BUTTON_L
FUNC_TEST=YES
RESET_BUTTON_L
FUNC_TEST=YES
SMU_RESET_L
FUNC_TEST=YES
ANALOG_RED
FUNC_TEST=YES
ANALOG_GRN
FUNC_TEST=YES
ANALOG_BLU
FUNC_TEST=YES
AUDIO_LO_DET_L
FUNC_TEST=YES
FUNC_TEST=YES
ROM_WP_L
FUNC_TEST=TRUE
UATA_DD<15..0>
FUNC_TEST=TRUE
UATA_DA<2..0>
TP_RAM_CKE_R<3>
NO_TEST=YES
TP_RAM_CS_L_R<11>
NO_TEST=YES
FUNC_TEST=YES
AIRPORT_CLKRUN_L_PD
PCI_STOP_L
FUNC_TEST=YES
FUNC_TEST=YES
I2S1_RESET_L
USB2_PORT3_P_F
FUNC_TEST=YES
USB2_PORT3_N_F
FUNC_TEST=YES
USB2_PORT2_N_F
FUNC_TEST=YES
USB_BT_N
FUNC_TEST=YES
FUNC_TEST=YES
ROM_ONBOARD_CS_L
PCI_PAR
FUNC_TEST=YES
FUNC_TEST=YES
PCI_SLOTA_IDSEL
PCI_DEVSEL_L
FUNC_TEST=YES
AUD_MIC_IN_P_CONN
FUNC_TEST=TRUE
NO_TEST=YES
TP_RAM_CS_L_R<10>
NO_TEST=YES
TEK_HT_B12
NO_TEST=YES
TEK_HT_A12
TP_NB_PM_SLEEP0
NO_TEST=YES
TP_RAM_MUXEN4
NO_TEST=YES
TP_RAM_CS_L_R<3>
NO_TEST=YES
TP_RAM_CS_L_R<2>
NO_TEST=YES
NO_TEST=YES
TP_RAM_CKE_R<7>
TP_RAM_CKE_R<6>
NO_TEST=YES
NO_TEST=YES
TP_NEC_SRCLK
NO_TEST=YES
TP_NEC_TEST
NO_TEST=YES
TP_PLS_CLK_66M_0
NO_TEST=YES
TP_PLS_TEST3
TP_SB_PLLTEST
NO_TEST=YES
TP_NEC_AMC
NO_TEST=YES
RAM_CLK66M_NB_R
NO_TEST=YES
NO_TEST=YES
R2204_P2
NO_TEST=YES
TP_DUMMY_B
NO_TEST=YES
Q2201_GATE
TP_RAM_CKE_R<2>
NO_TEST=YES
NO_TEST=YES
TP_SB_NC_V1
NO_TEST=YES
TP_SB_NC_U5
TP_SB_NC_U4
NO_TEST=YES
TP_SB_NC_U3
NO_TEST=YES
TP_SB_NC_U2
NO_TEST=YES
TP_SB_NC_U1
NO_TEST=YES
NO_TEST=YES
TP_SB_NC_T5
NO_TEST=YES
TP_SB_NC_T1
NO_TEST=YES
TP_SB_NC_R8
NO_TEST=YES
TP_SB_NC_R7
TP_PLS_CLK_66M_1
NO_TEST=YES
Q902_DRAIN
NO_TEST=YES
Q901_GATE
NO_TEST=YES
Q802_B
NO_TEST=YES
TP_PLS_REF_CML
NO_TEST=YES
NO_TEST=YES
TP_SB_NC_R4
NO_TEST=YES
TP_SB_NC_T4
TP_DUMMY_A
NO_TEST=YES
TP_SB_NC_W3
NO_TEST=YES
TP_SB_NC_W1
NO_TEST=YES
TP_SB_NC_R3
NO_TEST=YES
NO_TEST=YES
TP_SB_NC_R6
NO_TEST=YES
TP_SB_NC_T2
TP_NEC_SRMOD
NO_TEST=YES
TP_PLS_TEST1
NO_TEST=YES
TP_NEC_SMC
NO_TEST=YES
Q800_G
NO_TEST=YES
PN2
NO_TEST=YES
NO_TEST=YES
HT_VREF_DEBUG
NO_TEST=YES
CPU_HTBEN_R
NO_TEST=YES
ITS_RUNNING
NO_TEST=YES
AGP_CLK66M_GPU_R
AGP_CLK66M_NB_R
NO_TEST=YES
RFBD<36>
NO_TEST=YES
NO_TEST=YES
RFBD<40>
TEK_HT_B10
NO_TEST=YES
TP_J4001_SJRESET_L
NO_TEST=YES
NO_TEST=YES
U900_GATE_L
NO_TEST=YES
U900_GATE_H
TEK_HT_A10
NO_TEST=YES
TEK_HT_A9
NO_TEST=YES
U2100_UNUSED
NO_TEST=YES
TP_RAM_MUXEN0
NO_TEST=YES
PP5V_USB2_PORT1_F
FUNC_TEST=YES
PP5V_USB2_PORT2_F
FUNC_TEST=YES
FUNC_TEST=YES
PP5V_USB2_PORT3_F
NO_TEST=YES
U1000_FEEDBACK
NO_TEST=YES
U900_SS
PLS_CLK_66M_1_R
NO_TEST=YES
NO_TEST=YES
TEK_HT_A7
NO_TEST=YES
EI_CPU_TO_NB_CLK_P
NO_TEST=TRUE
EI_CPU_TO_NB_SR_P<0..1>
EI_NB_TO_CPU_CLK_P
NO_TEST=YES
NO_TEST=TRUE
EI_NB_TO_CPU_AD<0..43>
NO_TEST=YES
SB_CLK25M_ATA_R
AUD_MIC_IN_N_CONN
FUNC_TEST=TRUE
FW_VP
FUNC_TEST=TRUE
GND_AUDIO_MIC_CONN
FUNC_TEST=TRUE
I2C_HD_TEMP_SCL
FUNC_TEST=TRUE
FUNC_TEST=TRUE
I2C_HD_TEMP_SDA
FUNC_TEST=TRUE
I2C_SB_SCL
FUNC_TEST=TRUE
I2C_SB_SDA
FUNC_TEST=TRUE
KPGND2
I2C_TMDS_SDA
FUNC_TEST=YES
FUNC_TEST=YES
CORE_ISNS_P
PP5V_AGP_RL
FUNC_TEST=YES
FUNC_TEST=YES
I2S1_DEV_TO_SB_DTI
ROM_WE_L
FUNC_TEST=YES
ROM_OE_L
FUNC_TEST=YES
ROM_CS_L
FUNC_TEST=YES
PCI_IRDY_L
FUNC_TEST=YES
FUNC_TEST=YES
PCI_TRDY_L
FUNC_TEST=YES
PCI_FRAME_L
FUNC_TEST=YES
PCI_RESET_L
FUNC_TEST=YES
PCI_SLOTA_INT_L
FUNC_TEST=YES
PCI_SLOTA_GNT_L
FUNC_TEST=YES
PCI_SLOTA_REQ_L
FUNC_TEST=YES
PCI_CLK33M_AIRPORT
FUNC_TEST=TRUE
PCI_CBE_L<3..0>
FUNC_TEST=TRUE
PCI_AD<31..0>
I2C_TMDS_SCL
FUNC_TEST=YES
KPVDD2
FUNC_TEST=TRUE
FUNC_TEST=YES
=PP5V_DISK
FUNC_TEST=YES
=PPVCORE_PWRON_SB
=PP3V3_ALL_SMU
FUNC_TEST=TRUE
FUNC_TEST=YES
SYS_SLEEP
FUNC_TEST=YES
SYS_POWERFAIL_L
FUNC_TEST=YES
U900_FEEDBACK
UATA_CS0_L
FUNC_TEST=YES
UATA_CS1_L
FUNC_TEST=YES
UATA_RESET_L
FUNC_TEST=YES
FUNC_TEST=YES
UATA_DSTROBE_R
UATA_STOPUATA_STOP
FUNC_TEST=YES
UATA_DMARQ_R
FUNC_TEST=YES
UATA_DMACK_L
FUNC_TEST=YES
FUNC_TEST=YES
UATA_INTRQ_R
UATA_IOCS16_PU
FUNC_TEST=YES
UATA_CSEL_PD
FUNC_TEST=YES
FUNC_TEST=TRUE
UATA_DASP_L
TDIODE_NEG
FUNC_TEST=YES
GND_17_INV
FUNC_TEST=YES
FUNC_TEST=YES
KPVDD2_FMAX
FUNC_TEST=YES
CORE_ISNS_M
FUNC_TEST=YES
TDIODE_POS_FMAX
FUNC_TEST=YES
KPGND2_FMAX
FUNC_TEST=TRUE
CPU_VID_R<5..0>
FUNC_TEST=YES
INV_17_LCD_PWM_F
TD2P
FUNC_TEST=YES
TCKP
FUNC_TEST=YES
GND_20_INV
FUNC_TEST=YES
FUNC_TEST=YES
INV_20_LCD_PWM_
PP24V_INV
FUNC_TEST=YES
FUNC_TEST=YES
I2S1_SB_TO_DEV_DTO
TD2M
FUNC_TEST=YES
TD1P
FUNC_TEST=YES
FUNC_TEST=YES
MODEM_RING2SYS_L
FUNC_TEST=YES
I2S1_MCLK
FUNC_TEST=YES
I2S1_BITCLK
I2S1_SYNC
FUNC_TEST=YES
SATA_CLK25M_R
NO_TEST=YES
UATA_HSTROBE
FUNC_TEST=YES
FUNC_TEST=YES
INV_20_CUR_HI_F
FUNC_TEST=YES
VGA_VSYNC_R
MON_DETECT
FUNC_TEST=YES
FILT_ANALOG_GRN
FUNC_TEST=YES
FUNC_TEST=YES
FILT_ANALOG_RED
I2C_TMDS_SCL
FUNC_TEST=YES
FUNC_TEST=YES
I2C_TMDS_SDA
FUNC_TEST=YES
TD0P
NO_TEST=YES
EI_CPU1_SYNC_R
NO_TEST=YES
CPU1_HTBEN_R
FUNC_TEST=YES
GND_CHASSIS_TMDS
FUNC_TEST=YES
FILT_ANALOG_BLU
FUNC_TEST=YES
TD0M
PPVCC_TMDS
FUNC_TEST=YES
FUNC_TEST=YES
PP3V3_DDC
TMDS_D1M
FUNC_TEST=YES
TMDS_CKM
FUNC_TEST=YES
30
30
30
30
30
18
18
29
29
29
30
29
29
29
29
29
29
29
29
29
29
29
29
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
27
27
29
29
29
29
14
14
28
28
28
27
29
25
27
14
28
28
28
28
28
28
27
54
54
28
28
28
28
27
27
77
91
91
91
91
91
27
22
9
50
50
50
8
27
33
27
27
27
92
77
27
91
91
27
27
53
9
9
83
9
8
9
22
22
22
92
92
91
91
91
77
77
92
92
29
29
29
29
48
8
8
34
8
8
10
8
53
53
50
34
50
50
50
53
53
22
22
50
33
33
22
22
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
91
25
91
77
52
40
27
102
6
8
27
29
91
48 14
14
14
14
14
13
13
14
14
14
14
14
14
14
14
8
14
14
14
14
14
14
8
8
8
64
64
24
8
8
8
8
8
77
77
27
27
25
77
27
22
24
22
8
91
91
91
91
91
91
91
91
91
91
27
9
9
8
27
91
91
24
91
91
91
91
91
77
27
77
8
33
64
27
7
27
6
53
53
64
40
9
9
64
64
21
8
10
9
27
64
14
14
14
14
27
27
14
14
Preliminary
Page 7
125
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
SDF700 IS USED FOR CPU HEATSINK MOUNTING
RTC BATTERY
ALWAYS ON (TRICKLE)
805-5664
SILKSCREEN:POWER
ALL RAILS
ALWAYS ON WHEN UNIT HAS AC POWER (TRICKLE)
SILKSCREEN:RUN
POWER
GND RAILS
PWRON RAILS
CHASSIS GND
SILKSCREEN:2
RUN RAILS
SMU RESET
SILKSCREEN:1
PIN 13,19,11,22 ARE DIFFERENCE FROM ATX .
RESET
ONLY ON IN RUN
516S0248
FOXCONN
P/N 518-0159
ON IN RUN AND SLEEP
PP5V_RUN
PP3V3_PWRON
PP1V5_PWRON
PP2V5_PWRON
PP1V2_PWRON
PP24V_RUN
PP5V_ALL
PP5V_ALL
PP3V3_RUN
PP2V5_RUN
PP5V_PWRON
PP1V5_RUN
PP5V_RUN
PP3V3_RUN
PP5V_RUN
PP12V_RUN
SM
21
XW700
SM
21
XW701
315R138
1
ZH700
SM
21
XW702
SM
21
XW703
0.1UF
20%
10V
CERM
402
2
1
C704
0.1UF
402
10V
20%
CERM
2
1
C705
PP12V_RUN
SM
SPST
43
21
SW702
1/16W
MF-LF
402
1K
5%
21
R713
SM
DEVELOPMENT
SPST
43
21
SW701
MF-LF
1/16W
1K
402
5%
DEVELOPMENT
21
R712
SM
SPST
DEVELOPMENT
43
21
SW700
7R4.15
1
ZH702
6.00MM-PTH
1
ZH703
1K
402
1/16W
5%
MF-LF
21
R702
SHLD-IO-CONN
Q45-TH1
4
32
1
SH700
B0530WXF
SOD-123
2 1
DS700
PP1V2_RUN
TSSOP
74LCX125
CRITICAL
3
14
17
2
U700
0.1UF
10V
CERM
20%
402
2
1
C700
SM
FERR-EMI-100-OHM
SYS_PWR_BTN_FILT
21
L700
SM
FERR-EMI-100-OHM
21
L701
GREEN
2.0X1.25A
DEVELOPMENT
2
1
LED701
GREEN
2.0X1.25A
2
1
LED702
PP3V3_PWRON
1/10W
603
330
MF-LF
5%
21
R700
2.0X1.25A
GREEN
2
1
LED700
CRITICAL
HM96110-P2
F-RT-TH
9
8
7
6
5
4
3
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
J700
SM
21
XW704
SM
21
XW705
SM
21
XW706
SM
21
XW707
NOSTUFF
TH
HSK-NUT-6.5MM
1
SDF700
PP12V_RUN
PP24V_RUN
PWR-BUTT
ST-SM3
CRITICAL
2
1
54
3
SW703
PP3V3_RUN
5%
0
NOSTUFF
MF-LF
1/8W
805
21
R720
315R138
1
ZH710
NOSTUFF
402
MF-LF
1/16W
5%
0
21
R703
603
330
1/10W
5%
MF-LF
21
R710
402
0.1UF
20%
CERM
10V
2
1
C703
603
MF-LF
5%
330
1/10W
DEVELOPMENT
21
R701
PP5V_ALL
TH
CRITICAL
BB10209-A5
1 2
J702
11
7
102
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
POWER CONN / ALIAS
VOLTAGE=0V
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
MAKE_BASE=TRUE
VOLTAGE=5V
PP5V_RUN
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=3.3V
VOLTAGE=1.5V
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
MAKE_BASE=TRUE
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.6MM
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.25MM
MAKE_BASE=TRUE
VOLTAGE=1.2V
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
MIN_LINE_WIDTH=0.6MM
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.25MM
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.6MM
VOLTAGE=5V
MIN_NECK_WIDTH=0.2MM
MAKE_BASE=TRUE
VOLTAGE=1.5V
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
MAKE_BASE=TRUE
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=12V
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=24V
MAKE_BASE=TRUE
VOLTAGE=3.3V
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.3MM
PP3V3_RUN
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
PP5V_ALL
MAKE_BASE=TRUE
VOLTAGE=0
GND_CHASSIS_20_INCH_INVERTER
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
MIN_NECK_WIDTH=0.2MM
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
PP3V3_ALL_RTC
VOLTAGE=3.3V
=PP5V_PWRON_VESTA
_PP5V_PWRON_USB
=PP5V_PWRON_CPU
=PPPCI64_PWRON_SB
=PPPCI32_PWRON_SB
=PP3V3_PWRON_USB
PP5V_AUDIO
=PP5V_PATA
=PP3V3_PWRON_RAM
=PP3V3_PWRON_VESTA
=PP3V3_PWRON_EI
=PP2V5_PWRON_SB
=PP2V5_PWRON_RAM
=PP2V5_PWRON_HT
=PP1V5_PWRON_NB_AVDD
=PP2V5_ENET
=PP3V3_PWRON_CPU
=PPVCORE_NB
ITS_RUNNING
=PP1V2_PWRON_SB
=PP1V2_PWRON_DISK_SB
SMU_MANUAL_RESET_L
RESET_BUTTON_L
SYS_POWER_BUTTON_L
ITS_PLUGGED_IN
=PP3V3_ALL_RTC
=PP1V2_PWRON_HT
PP3V3_ALL
GND_AUDIO_SPKRAMP
ITS_ALIVE
=PP24V_GRAPHICS
PP12V_AUDIO_SPKRAMP
=PPVCORE_CPU
MAKE_BASE=TRUE
PPVCORE_CPU
GND_AUDIO
SYS_POWER_BUTTON_L
SYS_RESET_BUTTON_L
VOLTAGE=0
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
GND_CHASSIS_17_INCH_INVERTER
=PP5V_ALL_CPU
=PPVCORE_PWRON_SB
PPVCORE_GPU
POWER_GOOD
PP12V_AUDIO_CODEC
=PP12V_RUN_CPU
=PP12V_AGP
SYS_POWERUP_L_BUF
=PP2V5_RUN_CPU
POWER_BUTTON_L
=PP5V_DISK
GND_SYS_PWR_BTN_FILT
=PP5V_AGP
=PP1V2_EI_NB
=PP1V2_EI_CPU
=PPVCORE_PULSAR
=PP2V5_RUN_RAM
=PP5V_RUN_CPU
=PP1V2_HT
=PP1V2_PULSAR
PP2V5_GPU
PP3V3_VESTA
=PP3V3_ENETFW
=PP3V3_FW
=PP3V3_ENET
=PP3V3_ALL_CPU
MAKE_BASE=TRUE
PP3V3_ALL
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
PP1V2_VESTA
GND_CHASSIS_AUDIO_EXTERNAL
VOLTAGE=0
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
=PP3V3_ALL_SMU
VOLTAGE=1.2V
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
PP1V2_ALL
=PP1V2_ENETFW
MAKE_BASE=TRUE
GND_CHASSIS_AUDIO_INTERNAL
PP3V3_AUDIO
=PPVIO_PCI_USB2
=PP3V3_SB_PCI
=PP3V3_RUN_CPU
=PP3V3_PCI
=PP3V3_PATA
=PP3V3_DISK
=PP3V3_AGP
_PP3V3_PWRON_MODEM
_PP3V3_PWRON_BT
=PP3V3_PWRON_SB
=PPVCORE_PWRON_PULSAR
VOLTAGE=3.3V
PP3V3_ALL_BATT_SAFETY
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
PP3V3_ALL_BATT
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=3.3V
=PP12V_DISK
=PP2V5_HT
GND_CHASSIS_LED
GND_CHASSIS_VGA
MIN_LINE_WIDTH=0.6MM
VOLTAGE=0
GND_CHASSIS_RJ45
MIN_NECK_WIDTH=0.25MM
VOLTAGE=0
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
GND_CHASSIS_TMDS
GND_CHASSIS_FIREWIRE
GND_CHASSIS_USB
=PP1V5_AGP
SYS_POWERUP_L
50 34 59 22
31
77
58
33
18
18
88
46
60
36
35
30
31
102
76
56
13
11
11
12
74
40
48
13
59
32
34
13
23
51
28
29
8
55
59 13
101
75
50
74
50
11
10
10
11
25
37
37
8
7
11
102
31
33
7
6
50
59
83
59
18
18
45
6
60
54
90
87
11
102
8
89
100
74
49
25
83
64
59
49
10
6
6
6
59
12
92
36
23
23
91
101
83
46
12
28
23
26
62
28
87
36
22
6
25
80
6
6
6
13
62
7
100
59
100
29
6
102
6
13
59
36
3
22
8
102
33
50
31
6
6
50
14
14
26
44
3
24
26
52
12
89
89
86
36
7
12
101
6
10
86
101
95
77
74
33
25
83
83
48
94
76
23
26
6
60
21
59
87
6
90
92
48
6
Preliminary
Page 8
125
125
125
G
D
S
MC33465N_30ATR
RESETDELAY
VCC
GND
VOLTAGE DETECTOR
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
CPU VID<0:5>
CHKSTOP LED
THESE PINS HAVE INTERNAL PULLUPS
NET_SPACING_TYPE
ELECTRICAL_CONSTRAINT_SET
DIAG LED
SMU
PCI CLOCKS
PULL DOWN
SHASTA JTAG
CONNECTION
SIGNAL FROM POWER SUPPLY
518S0104
PLL LOCK LED
SMU ANALOG VREF
2.2V FOR CPU VRM10.
NOTE:PULL UP CPU_VID<5>TO
VID CONTROLLED BY SMU
DIFFERENTIAL_PAIR
PULSAR ERROR_L LEDBACKUP SMU RESET CIRCUIT
518-0158
J802 & R826 CAN MOVE TO DEVELOPMENT BOM POST RAMP
POWER_GOOD IS A 5V DRIVEN
2K PULLUP INSIDE P/S
POWER_FAIL_L
SDF700 IS ALSO
USED FOR HEATSINK
MOUNTING
CPU HEATSINK SMT NUTS
(SMU_BOOT_EPM)
VESTA JTAG
CONNECTOR
DOWNLOAD
5%
402
MF-LF
10K
1/16W
2
1
R825
100
5%
1/16W
MF-LF
402
2 1
R826
402
MF-LF
1/16W
0
5%
21
R802
5%
10K
402
MF-LF
1/16W
2
1
R803
402
MF-LF
1/16W
5%
10K
NOSTUFF
2
1
R807
MF-LF
10K
1/16W
402
5%
2
1
R806
NOSTUFF
0
402
5%
1/16W
MF-LF
21
R828
74LCX125
TSSOP
6
14
47
5
U700
74LCX125
TSSOP
8
14
10
7
9
U700
TSSOP
74LCX125
11
14
13
7
12
U700
4.7K
5%
1/16W
MF-LF
402
2
1
R870
PP2V5_PWRON
10K
5%
1/16W
MF-LF
402
2
1
R814
402
MF-LF
5%
10K
1/16W
2
1
R816
402
MF-LF
1/16W
5%
10K
2
1
R817
5%
1/16W
MF-LF
402
10K
2
1
R808
5%
402
10K
MF-LF
1/16W
2
1
R809
402
1K
MF-LF
1/16W
5%
NOSTUFF
2
1
R827
402
MF-LF
5%
1K
NOSTUFF
1/16W
2
1
R829
402
MF-LF
5%
1K
NOSTUFF
1/16W
2
1
R830
402
MF-LF
1/16W
5%
1K
NOSTUFF
2
1
R831
PP3V3_RUN
402
10K
5%
1/16W
MF-LF
2
1
R804
402
20K
5%
1/16W
MF-LF
2
1
R811
NOSTUFF
HSK-NUT-6.5MM
TH
1
SDF800
TH
NOSTUFF
HSK-NUT-6.5MM
1
SDF801
HSK-NUT-6.5MM
TH
NOSTUFF
1
SDF803
TH
NOSTUFF
HSK-NUT-6.5MM
1
SDF802
RED
SM
DEVELOPMENT
2
1
D810
OMIT
6P15R5P4
1
ZH804
CERM
16V
20%
0.01UF
402
2
1
C880
CERM
16V
20%
0.01UF
402
2
1
C881
16V
CERM
20%
0.01UF
402
2
1
C882
CERM
16V
20%
0.01UF
402
2
1
C883
402
0.01UF
20%
16V
CERM
2
1
C884
DEVELOPMENT
5%
1/16W
MF-LF
402
180
2
1
R833
DEVELOPMENT
SM
RED
2
1
LED801
Q800_D
DEVELOPMENT
SOT23-LF
2N7002
2
1
3
Q800
DEVELOPMENT
5%
402
MF-LF
1/16W
180
2
1
R834
Q801_B
DEVELOPMENT
SOT23
2N3904LF
2
3
1
Q801
2N3906
DEVELOPMENT
SM
2
3
1
Q802
MF-LF
1/16W
180
5%
DEVELOPMENT
402
2
1
R835
5%
DEVELOPMENT
402
MF-LF
1/16W
180
21
R836
DEVELOPMENT
2.0X1.25A
GREEN
2
1
LED802
DEVELOPMENT
1/16W
5%
402
MF-LF
180
2
1
R837
5%
1/16W
MF-LF
402
DEVELOPMENT
1K
2
1
R838
DEVELOPMENT
SOT23
2N3904LF
2
3
1
Q803
DEVELOPMENT
5%
402
MF-LF
1/16W
180
21
R839
402
MF-LF
1/16W
5%
NOSTUFF
1K
2
1
R832
I246
I247
SM
RED
2
1
LED850
SOT23
2N3904LF
2
3
1
Q850
5%
MF-LF
402
1/16W
1K
21
R851
PP5V_ALL
1/16W
MF-LF
5%
402
180
2
1
R850
MF-LF
5%
430
1/16W
402
2
1
R813
1/16W
4.7K
5%
402
MF-LF
2
1
R860
1/16W
NOSTUFF
1K
MF-LF
5%
402
2
1
R890
NOSTUFF
CERM
1uF
10%
6.3V
402
2
1
C891
SM
NOSTUFF
2
1
3
5
U890
0.01UF
NOSTUFF
402
10%
16V
CERM
2
1
C890
402
MF-LF
5%
0
1/16W
21
R810
NOSTUFF
402
CERM
20%
10V
0.1uF
2
1
C800
M-ST-TH
HC17051
9
87
65
43
2
10
1
J802
5%
1/16W
10K
MF-LF
402
2
1
R840
5%
MF-LF
1/16W
402
0
NOSTUFF
2
1
R805
PP3V3_ALL
U.FL-R_SMT
DEVELOPMENT
F-ST-SM
1
2
3
J800
PP3V3_ALL
NOSTUFF
5%
402
MF-LF
10K
1/16W
2
1
R812
2.5V
SSOT-23
NOSTUFF
3
12
VR801
NOSTUFF
200
1/16W
MF-LF
402
1%
2
1
R818
NOSTUFF
2.2UF
20%
10V
CERM
805
2
1
C801
NOSTUFF
CERM
10V
20%
0.47UF
603
2
1
C802
BM12B-SRSS-TB
NOSTUFF
F-ST-SM
9876543
2
121110
11314
J803
1/16W
5%
0
MF-LF
402
21
R819
MF-LF
402
0
5%
1/16W
21
R820
1/16W
0
MF-LF
5%
402
21
R821
402
MF-LF
1/16W
5%
0
21
R822
0
1/16W
MF-LF
5%
402
21
R823
0
1/16W
MF-LF
5%
402
21
R824
4.7K
DEVELOPMENT
5%
402
MF-LF
1/16W
2
1
R801
DEVELOPMENT
MF-LF
330
402
1/16W
5%
2
1
R800
PP3V3_RUN
051-6772
102
8
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
SIGNAL ALIAS
J802_6
SMU_MANUAL_RESET_L
SMU_BOOT_TXD
SMU_MANUAL_RESET_L
CPU_VID_R<4>
CPU_VID_R<1>
MAKE_BASE=TRUE
TP_NB_THMI
MAKE_BASE=TRUE
TP_RAM_CKE_R<2>
MAKE_BASE=TRUE
TP_RAM_CKE_R<6>
MAKE_BASE=TRUE
TP_RAM_MUXEN0
MAKE_BASE=TRUE
TP_RAM_MUXEN4
RAM_CS_L_R<2>
RAM_CS_L_R<3>
SMU_BOOT_RXD
SMU_BOOT_BUSY
MAKE_BASE=TRUE
PPVREF_SMU
SMU_BOOT_CNVSS
CPU_VID_R<3>
CPU_VID_R<2>
J802_2
NB_SUSPEND_ACK_L
=PP3V3_ALL_SMU
=PCI_USB2_RESET_L
CPU_VID_R<0>
CPU_VID_R<5>
MAKE_BASE=TRUE
PCI_RESET_L
PCI_CLK_GP0
CPU_VID<4>
CPU_VID<2>
CPU_VID<0>
CPU_VID<5>
CPU_VID<3>
CPU_VID<1>
DIAG_LED
MAKE_BASE=TRUE
DIAG_LED_R
LED850P2
LED850P1
=PP5V_RUN_CPU
NB_SUSPENDACK_L
SYS_SLEEP
SMU_WARM_RESET_L SYS_WARM_RESET_L
=PPVREF_SMU
PP3V3_ALL_SMU_AVCC
Q802_E
HS_SDF803
HS_SDF800 HS_SDF801 HS_SDF802
GND_SMU_AVSS
Q803_C
LED802_1
Q800_G
LED801_1
NB_PMR_OBSV
GND_SMU_AVSS_DAGND
PPVREF_SMU_ADC_REF
SMU_SLEEP
Q802_B
PLLLOCK
HS_SDF804
=PP5V_RUN_CPU
POWER_GOOD
SYS_POWERFAIL_L
CHKSTOP_L
JTAG_SB_TRST_L
SMU_RESET_L
ERROR_LED
CLOCK_ERROR_L
PCI_CLK_P3
_PCI_CLK33M_AIRPORT
NB_THMI
MAKE_BASE=TRUE
TP_THMO NB_THMO
RAM_CKE_R<2>
MAKE_BASE=TRUE
TP_RAM_CKE_R<3>
RAM_CKE_R<3>
RAM_CKE_R<6>
TP_RAM_CKE_R<7>
MAKE_BASE=TRUE
RAM_CKE_R<7>
RAM_MUXEN0
RAM_CS_L_R<11>
MAKE_BASE=TRUE
PCI_CLK33M_AIRPORT
=PCI_CLK33M_USB2
MAKE_BASE=TRUE
PCI_CLK33M_USB2
RAM_MUXEN4
MAKE_BASE=TRUE
TP_PCI_CLK_GP1
PCI_CLK_GP1
PCI_CLK_P4
MAKE_BASE=TRUE
TP_PCI_CLK_P4
MAKE_BASE=TRUE
PCI_CLK33M_SB_EXT
PCI_CLK_P1
RAM_CS_L_R<10>
MAKE_BASE=TRUE
TP_RAM_CS_L_R<3>
MAKE_BASE=TRUE
TP_RAM_CS_L_R<2>
MAKE_BASE=TRUE
TP_RAM_CS_L_R<10>
TP_ALS0_OUT
MAKE_BASE=TRUE
ALS0_OUT
ALS1_OUT
TP_ALS1_OUT
MAKE_BASE=TRUE
MAKE_BASE=TRUE
TP_ALS_GAIN_BOOST
ALS_GAIN_BOOST
SMU_ONEWIRE
TP_SMU_ONEWIRE
MAKE_BASE=TRUE
SYS_SLOT_PWR
TP_SYS_SLOT_PWR
MAKE_BASE=TRUE
MAKE_BASE=TRUE
TP_RAM_CS_L_R<11>
TP_SMU_PWRSEQ_P1_3
MAKE_BASE=TRUE
SMU_PWRSEQ_P1_3
SYS_DOOR_AJAR_L
TP_SYS_DOOR_AJAR_L
MAKE_BASE=TRUE
MAKE_BASE=TRUE
TP_FAN_PWM8
FAN_PWM8
TP_SYS_DRIVE_BAY_INT_L
MAKE_BASE=TRUE
SMU_WARM_RESET_L
MAKE_BASE=TRUE
SYS_DRIVE_BAY_INT_L
NB_WARM_RESET_L
PCI_AIRPORT_RESET_L
GPU_RESET_L
=PCI_ROM_RESET_L
SYS_WARM_RESET_L
SMU_RESET
P25MM
SYS_COLD_RESET_L
SMU_RESET
P25MM
Q803_B
MAKE_BASE=TRUE
JTAG_VESTA_TRST_L
=JTAG_VESTA_TRST_L
=JTAG_VESTA_TCK
MAKE_BASE=TRUE
TP_JTAG_VESTA_TCK
MAKE_BASE=TRUE
TP_JTAG_VESTA_TDI
=JTAG_VESTA_TDI
=JTAG_VESTA_TDO
MAKE_BASE=TRUE
TP_JTAG_VESTA_TDO
MAKE_BASE=TRUE
TP_JTAG_VESTA_TMS
=JTAG_VESTA_TMS
JTAG_SB_TCK
JTAG_SB_TDI
MAKE_BASE=TRUE
TP_JTAG_SB_TDI
MAKE_BASE=TRUE
TP_JTAG_SB_TDO
JTAG_SB_TDO
JTAG_SB_TMS
MAKE_BASE=TRUE
TP_JTAG_SB_TMS
MAKE_BASE=TRUE
TP_JTAG_SB_TCK
SMU_BOOT_SCLK
SMU_BOOT_CE
50 46
31
22
31
8
11
77
8
77
8
8
13
74
7
10
74
36
7
29
74
7
7
33
33
33
33
7
33
33
56
6
9
13 25
33
6
13
14
13
74
13
25
24
6
6
6
13
6
6
6
6
6
6
6
37
37
13
13
13
6
6
24
6
77
6
6
6
27
13
13
13
13
13
13
13
3
13
6
8 8
13
13
6
13
6 6
6
24
36
36
13
6
29
3
7
6
6
25
6
6
27
27
76
24
24
37
6
37
37
6
37
37
37
6
77
37
27
27
6
27 27
37
6
6
6
13
13
13
13
13
6
13
13
13
8
13
24
76
49
75
8
13
12
12
12
12
12
25
25
25
25
13
13
Preliminary
Page 9
FB
LD
HD
GND
COMP
SS
VCC
VC
G
D
S
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
U900_FEEDBACK
12.68A WITH DIMM TERMINATION
9.24A WITHOUT DIMM TERMINATION
PEAK CURRENT OF TOTAL RAILS
NOTE:
SET OUTPUT=2.588V FOR FRAMEBUFFER.
VOUT=VREF*(R903+R905)/R905=2.588VDC
IRU3037CS VREF=1.25VDC
2.5V VOLTAGE REGULATOR
HIGH TO ENABLE
MF-LF
5%
1/8W
805
0
21
R902
402
1%
10K
1/16W
MF-LF
2
1
R905
1/4W
1206
MF-LF
5%
1.1K
NOSTUFF
2
1
R904
1206
20%
6.3V
10UF
CERM
2
1
C901
PP5V_PWRON
25V
20%
1UF
CERM
805
2
1
C904
PP5V_PWRON
SOD-123
MBR0520LXXG
2 1
D900
MBR0520LXXG
SOD-123
2 1
D901
SOD-123
MBR0520LXXG
2
1
D902
1UF
20%
10V
CERM
603
2
1
C917
CERM
50V
5%
603
2200PF
2
1
C905
1UF
20%
25V
CERM
805
2
1
C916
PP2V5_PWRON
PP2V5_RUN
402
CERM
5%
25V
220PF
2
1
C906
TH
1.6UH
CRITICAL
21
L901
SOI
IRU3037CS
2 6
8
3
5
4
1
7
U900
402
1%
1/16W
MF-LF
10.7K
2
1
R903
10V
20%
0.47UF
CERM
603
2
1
C915
402
1%
1/16W
27.4K
MF-LF
2
1
R901
5%
402
CERM
50V
56PF
2
1
C913
NOSTUFF
50V
CERM
10%
3300PF
603
2
1
C907
50V
CERM
5%
3900PF
603
2
1
C914
5%
MF-LF
1/8W
805
4.7
2
1
R900
5%
1/16W
MF-LF
240
402
DEVELOPMENT
2
1
R950
2.0X1.25A
DEVELOPMENT
GREEN
2
1
LED900
IRF7413
SO-8
321
4
8765
Q903
PP12V_RUN
SOT23-LF
2N7002
2
1
3
Q940
470K
5%
402
MF-LF
1/16W
2
1
R940
1206
25V
20%
1UF
NOSTUFF
CERM
2
1
C912
CASE369
NTD60N02R
3
1
4
Q901
NTD60N02R
CASE369
3
1
4
Q902
1800UF
TH-KZJ
ELEC
6.3V
20%
2
1
C902
20%
6.3V
ELEC
TH-KZJ
1800UF
2
1
C903
20%
6.3V
ELEC
TH-KZJ
1800UF
2
1
C910
CERM
10UF
6.3V
20%
1206
2
1
C911
NOSTUFF
402
CERM
50V
20%
0.001UF
2
1
C940
20%
4V
ELEC
1500UF
TH-KZV
2
1
C908
TH-KZV
20%
4V
ELEC
1500UF
2
1
C909
102
9
11
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
2.5V VREG
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
Q901_GATE
Q902_DRAIN
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
U900_GATE_L
U900_FEEDBACK
U900_VC_D
U900_GATE_H
Q903_GATE
U900_COMP
R904_P2
R901_P2
LED_PP2V5_RUN
U900_SS
SYS_SLEEP
U900_VC_R
U900_VC
50 46 22 11 10
8
6
6
6
6
6
6
6
6
6
6
6
6
Preliminary
Page 10
FB
LD
HD
GND
COMP
SS
VCC
VC
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
LM339A
V+
GND
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PEAK CURRENT OF TOTAL RAILS
VOUT=VREF*(R1003+R1005)/R1005=1.206VDC
~3A
NOTE:
<-- NEED TO VERIFY
IRU3037ACS VREF=0.8VDC
SET OUTPUT=1.2V
@ VGS=2.5 V
RDSON=0.06 OHM
PEAK CURRENT ??A
@ VGS=?? V
RDSON=?? OHM
PEAK CURRENT ??A
PP1V2_RUN FET SWITCH
PLACE LED1000 NEAR VREG
U1000_FEEDBACK
PP1V2_ALL VOLTAGE REGULATOR
PP1V2_PWRON FET SWITCH
50V
5%
2200PF
CERM
603
2
1
C1005
1.6UH
TH
21
L1001
NOSTUFF
10%
3300PF
CERM
50V
603
2
1
C1007
10K
402
MF-LF
1%
1/16W
2
1
R1005
5%
1/4W
1.1K
MF-LF
1206
NOSTUFF
2
1
R1004
NOSTUFF
1206
25V
CERM
20%
1UF
2
1
C1012
SOD-123
MBR0520LXXG
2
1
D1002
PP5V_ALL
1UF
20%
603
10V
CERM
2
1
C1017
MBR0520LXXG
SOD-123
2 1
D1000
MBR0520LXXG
SOD-123
2 1
D1001
MF-LF
805
1/8W
5%
0
21
R1000
20%
805
CERM
25V
1UF
2
1
C1000
220PF
402
CERM
5%
25V
2
1
C1006
1UF
CERM
805
25V
20%
2
1
C1004
SOI
IRU3037ACS
2 6
8
3
5
4
1
7
U1000
20%
1800UF
TH-KZJ
ELEC
6.3V
2
1
C1009
1/16W
1%
MF-LF
402
5.11K
2
1
R1003
PP1V2_RUN
SOT-363
2N7002DW
4
5
3
Q1004
2N7002DW
SOT-363
1
2
6
Q1004
PP5V_ALL
5%
100K
402
1/16W
MF-LF
2 1
R1008
PP5V_ALL
TSOP
SI3446DV
4
3 6
521
Q1006
PP1V2_PWRON
SOT23-LF
2N7002
2
1
3
Q1005
100K
402
1/16W
MF-LF
5%
2 1
R1009
PP5V_ALL
3900PF
50V
603
CERM
5%
2
1
C1014
68PF
CERM
50V
603
5%
2
1
C1013
603
16V
CERM
20%
0.1UF
2
1
C1015
1/16W
MF-LF
402
1%
27.4K
2
1
R1001
402
0
1/16W
MF-LF
5%
21
R1012
NOSTUFF
MF
402-1
1/16W
5%
0
21
R1013
PP3V3_ALL
100K
1/16W
5%
402
MF-LF
2
1
R1014
805
4.7
5%
1/8W
MF-LF
2
1
R1002
NTD60N02R
CASE369
3
1
4
Q1001
NTD60N02R
CASE369
3
1
4
Q1002
CERM
10UF
20%
6.3V
1206
2
1
C1002
CERM
10UF
20%
6.3V
1206
2
1
C1003
TSOP
SI3446DV
4
3 6
5
2
1
Q1003
10UF
1206
20%
6.3V
CERM
2
1
C1001
SOI
DEVELOPMENT
3
2
5
4
12
U1001
402
330
DEVELOPMENT
MF-LF
1/16W
5%
2
1
R1050
DEVELOPMENT
2.0X1.25A
GREEN
2
1
LED1000
DEVELOPMENT
MF-LF
1/16W
5%
100K
402
2
1
R1051
MF-LF
1/16W
5%
47K
402
DEVELOPMENT
2
1
R1052
DEVELOPMENT
402
0
5%
1/16W
MF-LF
21
R1053
DEVELOPMENT
402
0.1UF
20%
10V
CERM
2
1
C1050
102
10
11051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
1.2V VREG
U1000_GATE_L
U1000_FEEDBACK
Q1002_DRAIN
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=1.2V
PP1V2_ALL
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
PP3V3_RUN
LED_PP1V2_RUN_P
LED_PP1V2_RUN_N
PP5V_RUN
PP3V3_RUN
1V1_REF
PP1V2_RUN_FOR_LED
Q1003_G
SYS_SLEEP
PP1V2_ALL
SYS_POWERUP_L
Q1006_G
R1001_P2
U1000_SS
U1000_VC
Q1001_GATE
R1004_P2
U1000_VC_D
TURN_ON_PP1V2_PWRON_L
U1000_COMP
PP1V2_ALL
U1000_GATE_H
Q1005_G
U1000_VC_R
50
50
34
34
50
22
22
46
18
18
22
33
11
18
11
11
13
10
11
10
50
9
11
10
7
7
7
34
8
10
7
10
6
6
7
6
6
6
22
6
7
6
3
7
Preliminary
Page 11
D
G
S
LM339A
V+
GND
LM339A
V+
GND
TAB
VOUTVPWR
VCTRL
VOUT
ADJ
SENSE
D
G
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
Vpwr >= Vout+0.35V
PROCESS SWING
FET ON IN RUN
FET ON IN RUN
PP5V_PWRON
Vctrl >= Vout+1.25V
R2
R1
Iadj=50uA typ
3.30V - 3.45V
Vref=1.250V typ
Vout=Vref(1+R2/R1)+Iadj(R2)
SHUTDOWN -> FLOAT
SLEEP -> FLOAT
RUN -> LOW
FET ON IN SLEEP
FET ON IN SLEEP
SHUTDOWN -> FLOAT
SLEEP -> LOW
RUN -> FLOAT
20%
10V
ELEC
100UF
SM
2
1
C1100
SI4467DY
SM-1
CRITICAL
3
2
1
4
8
7
6
5
Q1100
402
MF-LF
1/16W
5%
100K
21
R1100
SOI
CRITICAL
3
13
11
10
12
U1100
SOI
3
2
5
4
12
U1100
603
MF-LF
1/10W
1%
47.0K
2
1
R1102
CS5253
SM
CRITICAL
5
6
3
4
1
2
VR1100
1/16W
100K
MF-LF
5%
402
21
R1103
100K
5%
MF-LF
1/16W
402
21
R1104
603
MF-LF
1/10W
1%
124
2
1
R1105
603
MF-LF
1/10W
1%
210
2
1
R1106
N20P80%
CERM
0.1UF
603
16V
2
1
C1101
SM-1
SI4467DY
3
2
1
4
8
7
6
5
Q1102
SM
47UF
ELEC
20%
16V
2
1
C1102
MF-LF
1/16W
1%
1K
402
2
1
R1107
402
1K
1%
1/16W
MF-LF
2
1
R1101
SI3443DV
TSOP
CRITICAL
4
3 6
5
2
1
Q1103
CRITICAL
TSOP
SI3443DV
4
3 6
5
2
1
Q1101
051-6772
11
11
102
SYNC_MASTER=N/A
SYNC_DATE=N/A
5V & 3.3V VREGS
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.5MM
RAIL_SLEEP_FET
PP5V_ALL
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
PP3V3_ALL
VOLTAGE=3.3V
PP5V_ALL
SYS_SLEEP
SYS_POWERUP_L
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.5MM
3_3V_ALL_ADJ
PP3V3_ALL
RAIL_CTL_POS
RAIL_CTL_NEG
PP5V_RUN
MIN_LINE_WIDTH=0.5MM
RAIL_RUN_FET
MIN_NECK_WIDTH=0.2MM
PP3V3_RUN
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
PP3V3_PWRON
VOLTAGE=3.3V
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
PP5V_PWRON
VOLTAGE=5V
50
50
46
34
22
33
22
12
12
10
13
18
18
58
11
59
11
9
10
59
10
10
27
7
11
7
8
7
11
7
7
18
18
6
7
6
6
6
7
3
6
6
6
6
Preliminary
Page 12
VESTA MISC
1 OF 3
PVDDDVDD
AVDDL
AVDD
GND
AGND
OVDD
REGSUP1
REGSEN1
REGCTL1
REGSUP2
REGSEN2
REGCTL2
2.5V_EN
NC
DNC
DNC
DNC
NC
TDO
TCK
TMS
TRST*
TDI
RESET*
GND
VOUT
VIN
NOISE
CONT
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
Page Notes
L9/M9
Schmitt trigger
N5/N6
NC
- VESTA1V2_BURST / VESTA1V2_PULSE
N9/N10
BOM options provided by this page:
NC
Power aliases required by this page:
Vout = 2.5V @ 150 mA
2.5V LDO
ETHERNET PORTION IN LOW POWER MODE
Controls operating mode of Vesta 1.2V
(NONE)
Signal aliases required by this page:
regulator will be in continuous mode.
regulator. If both options are off the
WHEN NOT IN RUN MODE.
Ethernet LowPwr
NOTE: Reset GPIO is active HIGH
in reset when system is off
To keep Vesta from being held
R1252 to enable wirespeed feature
L6/M6
0.1uF
20%
10V
CERM
402
2
1
C1210
0.1uF
402
CERM
10V
20%
2
1
C1211
402
CERM
10V
20%
0.1uF
2
1
C1212
20%
10V
CERM
402
0.1uF
2
1
C1213
20%
0.1uF
CERM
402
10V
2
1
C1203
10V
CERM
0.1uF
402
20%
2
1
C1202
CERM
402
0.1uF
20%
10V
2
1
C1201
0.1uF
402
CERM
10V
20%
2
1
C1200
20%
CERM
402
0.1uF
10V
2
1
C1222
10V
20%
CERM
402
0.1uF
2
1
C1225
402
20%
10V
CERM
0.1uF
2
1
C1221
0.1uF
20%
10V
CERM
402
2
1
C1224
0.1uF
402
CERM
10V
20%
2
1
C1231
20%
10V
CERM
402
0.1uF
2
1
C1230
0.1uF
20%
10V
CERM
402
2
1
C1220
0.1uF
20%
10V
CERM
402
2
1
C1223
0.1uF
402
CERM
10V
20%
2
1
C1243
20%
10V
CERM
402
0.1uF
2
1
C1242
10V
0.1uF
402
CERM
20%
2
1
C1241
0.1uF
402
CERM
10V
20%
2
1
C1240
NO STUFF
6.3V
805
20%
10UF
CERM
2
1
C1250
OMIT
BCM5462
FBGA-200
D8
E8
E10
D7
E7
H4
E2
E1
F2
F1
G4
G5
N4
A15
K1
F15
A7
A1
M13
C3
K2
J2
F14
C14
B7
B2
A2
J1
C15
B15
B1
E9
C9
B9
N10
N9
N6
N5
M9
M6
L9
L6
R12
R3
P11
P10
P5
P4
N8
N7
M8
M7
L8
L7
J12
J11
P9
P8
P7
P6
H12
H11
M3
U8600
MF-LF
82K
NO STUFF
5%
402
1/16W
2
1
R1251
10%
10UF
X5R
6.3V
805
2
1
C1208
FERR-EMI-600-OHM
SM
21
L1200
16V
CERM
402
0.01uF
20%
2
1
C1281
402
6.3V
10%
1uF
CERM
2
1
C1280
6.3V
X5R
805
10UF
10%
2
1
C1282
CRITICAL
MM1572FN
SOT-25A
5
1
4
2
3
U1280
402
4.7K
5%
1/16W
MF-LF
2
1
R1252
402
10K
1/16W
5%
MF-LF
2
1
R1262
5%
402
MF-LF
2.0K
1/16W
NOSTUFF
2
1
R1260
805
6.3V
CERM
20%
10UF
2
1
C1260
2N3904LF
SOT23
2
3
1
Q1260
MF-LF
402
1/16W
5%
1K
2
1
R1261
0.1UF
10V
CERM
402
NOSTUFF
20%
2
1
C1261
5%
1/16W
402
MF-LF
4.7K
2
1
R1263
2N7002
SOT23-LF
2
1
3
Q1270
2N3904LF
SOT23
2
3
1
Q1271
MF-LF
100K
5%
1/16W
402
2
1
R1264
6.3V
1UF
CERM
10%
402
2
1
C1270
330
1/10W
MF-LF
5%
603
2
1
R1265
2N3904LF
SOT23
2
3
1
Q1250
10212
11
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
Vesta Core / Misc
MIN_LINE_WIDTH=0.5 mm
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=1.2V
PP1V2_VESTA_AVDDL
VESTA_RESET_L
ENETFW_RESET
PP1V2_VESTA
VESTA_ENET_LOWPWR
PP2V5_VESTA
Q1270_G
Q1271_B
VESTA_ENET_HIGHPWR
PP3V3_VESTA
=PP5V_PWRON_VESTA
PP5V_ALL
=PP3V3_PWRON_VESTA
PP3V3_VESTA
PP3V3_VESTA
=PP2V5_ENETFW
MIN_LINE_WIDTH=0.5 mm
VOLTAGE=2.5V
PP2V5_VESTA
MAKE_BASE=TRUE
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.2 mm
MIN_NECK_WIDTH=0.2 mm
VESTA2V5_NOISE
PP3V3_VESTA
TP_VESTA_DNC_C9
=JTAG_VESTA_TDI
TP_VESTA_REGCTL2
=JTAG_VESTA_TDO
=JTAG_VESTA_TCK
=JTAG_VESTA_TMS
TP_VESTA_DNC_E9
TP_VESTA_2_5V_EN
TP_VESTA_REGCTL1
TP_VESTA_REGSUP1
TP_VESTA_REGSEN1
TP_VESTA_REGSUP2
TP_VESTA_REGSEN2
PP3V3_VESTA
TP_VESTA_DNC_B9
=JTAG_VESTA_TRST_L
PP3V3_VESTA
11
12
7
12
12
89 12
12
12
25
86
12
7
7
6
7
7
7
86
12
7
8
8
8
8
7
8
7
Preliminary
Page 13
P9[7]
P9[6]
P9[5]
P8[7]
P8[6]
P8[5]
P3[7]
P3[6]
P3[5]
P3[4]
P2[6]
P2[7]
P2[4]
P2[5]
P1[4]
P1[3]
P1[2]
P1[1]
P1[0]
P0[4]
P0[0]
P0[2]
P0[3]
P0[1]
P0[7]
P0[6]
P0[5]
P3[3]
P3[2]
P3[1]
P3[0]
P2[3]
P2[2]
P2[1]
P2[0]
P1[5]
P1[6]
P1[7]
PCNVSS
RESET*
XOUT
VREF
XIN
P7[7]
P7[6]
P7[5]
P7[4]
P7[3]
P7[2]
P7[1]
P7[0]
P6[7]
P6[6]
P6[5]
P6[4]
P6[3]
P6[2]
P6[1]
P6[0]
P10[0]
P10[1]
P9[3]
P9[2]
P9[1]
P9[0]
P8[4]
P8[3]
P8[2]
P8[1]
P8[0]
P10[6]
P10[7]
P10[2]
P10[3]
P10[4]
P10[5]
VCC
AVSS
VSS
AVCC
SQW/
OUT
VBAT
SDA
SCL
X1
X2
GND
VCC
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
AN26
SMU_VREF should be same signal or
Signal aliases required by this page:
- _PP3V3_PWRON_SMU
- _PP3V3_ALL_SMU
NC
System Management Unit
Y
3.6
2.7
100K/10uF RC filter at SMU pins.
circuit, but be aware that this will
7.6
1.5
1.6
1.7
0.6
0.5
Port
0.4
Portable
Alternate Functions
2.6
Port
2.5
Consumer
Port
6.1
6.2
6.0
7.2
7.4
Tower & Server
Y
Y
IOC2
IOC3
SS
Y
Y
Y
Y
Y
Y
Y
Y
IOC5
INT3*
AN22
YYY
YYY
Y
Y
Y
Y
YYY
YYY
Y
Y
N
N
N
(see aliases below)
SS
Y
Y
Y
Y
Y
SYYS
Y
Y
Y
Y
Y
Y
Y
Y
S
YYYS S
Y
Y
Y
Y
Y
Y
YY
Y
Y
Y
Y
Y
S
INT0*
S
Y
Y
Y
Y
Y
YYYY
Y
S
Y
Y
Y
Y
YYNNSS
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
YYYY
Y
Y
Y
Y
Y
Y
Entry Desktop
Entry Desktop
Desktop
S
Y
Y
Y
Y
Y
Y
Y
Y
S
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Portable
Y
Y
Y
Y Y
Y
Y
Y
Y
Y
S
Y
Y
Y
S
Y
Y
Y
S
Y
Y
Y
Y
Y
S
Y
S
Y
Y
S
Y
Y
Y
Y
Y
S
Y
Y
Y
Y
Y
Y
S
Y
Y
Y
Y
Y Y
Y
Y
N
Y
Y
S
S
Y
Y
Y
S
S
Y
Y
N
S S
N
N
N
Consumer
N
N
N
Server
S
Y
Y
Y
Y
Y
Y Y
Y
S
Y
Y
Y
Y
S
Y
Y
Y
Y
Y
Y
YYY
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
S
NSS
Y
Y
Y
Y
Y
Y
Y
Y
YSY
Y
Y
Y
Y
Y
Y Y
S
N Y
Y
Y YYYY
S S
SS
S
S
Consumer
Y
S
S
Y
S
Y
Y
Y
Y
Y
N
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
Y
N
N
Y
Y
Y
Y
Y
Y
Portable
Desktop
Server
SMU Pull-ups / pull-down
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
TA1out
S
S
NOTE: Some primary and alternate functions
AC adapter ID.
affect other analog inputs such as
those capacitors are provided on
(CPU_SENSE_I/CPU_SENSE_V) requires
TA3out
TA4in
IOC6
Power aliases required by this page:
review the latest SMU specification
to ensure missing pull-ups are
TB2in
this page.
SCL
Y
IOC4
Y
Y
KI2*
KI0*
AN3
AN2
AN1
Sout3
Y
Y
Y
Y
Y
Y
Y
Y
SCLmm
AN25
INT1*
NMI*
TB1in
AN24
TA1in
TA4out
SDA
AN05
AN07
RXD1
CLK0
RXD0
RTS1*
CLK1
TXD1
RTS0*/
reuire pull-ups that are not.
Real Time Clock
(NONE)
(NONE)
provided on another page.
Sin3
TB0in
(BUSY)
AN0
TA3in
AN21
AN23
AN27
Y
CE*
INT2*
AN04
TA2in
IOC7
CTS0*
AN06
AN20
Y
INT4*
INT5*
SDAmm
Y
Y
S
S
Keep crystal subcircuit close to SMU.
S
KI3*
TXD0
AN01
AN03
AN02
AN00
TA2out
CLK3
N = Alternate function
Y = Primary function
S = Spare
- _PPVREF_SMU (SMU AVCC or 2.5V reference)
signal (GND_SMU_AVSS). None of
NOTE: All analog inputs to SMU should have
NOTE: Pinout matches SMU pinout v1.51.
KI1*
Y
provided on this page. Please.
a 100pF capacitor to the SMU AVSS
NYS
reference used by monitoring
Caps should connect to GND_SMU_AVSS.
NOTE: CPU current/voltage monitoring
BOM options provided by this page:
- _PP3V3_ALL_RTC
ELECTRICAL_CONSTRAINT_SET
Page Notes
11.4X4.7X4.2-SM
10.000M
CRITICAL
21
Y1300
QFP-80
M30280F8
OMIT
10
12
11
77
13
9
79
80
1
2
3
4
5
7
8
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
40
41
42
43
32
33
34
35
36
37
38
39
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
68
69
70
71
72
73
74
76
59
60
61
62
63
64
65
66
67
6
75
78
U1300
MSOP
DS1338
2
1
8
3
7
5
6
4
U1301
PP3V3_PWRON
PP3V3_RUN
PP2V5_PWRON
5%
1/16W
MF-LF
402
NO_SMU_I2C_D
0
21
R1399
SOT23
MMBD914XXG
3
1
D1310
1uF
CERM
10%
6.3V
402
2
1
C1325
10K
5%
MF-LF
1/16W
402
2
1
R1325
150K
402
MF-LF
1/16W
5%
2
1
R1322
20%
0.22uF
402
6.3V
CERM
2
1
C1310
18pF
CERM
402
5%
50V
2
1
C1304
402
18pF
CERM
5%
50V
2
1
C1305
402
1/16W
MF-LF
5%
0
2
1
R1317
10M
5%
MF-LF
1/16W
402
NO STUFF
21
R1316
402
1/16W
MF-LF
5%
10K
2
1
R1327
2.0K
5%
1/16W
MF-LF
402
21
R1312
NO STUFF
2.0K
402
MF-LF
1/16W
5%
21
R1311
100K
5%
1/16W
MF-LF
402
21
R1313
402
MF-LF
1/16W
5%
100K
21
R1310
10K
5%
1/16W
MF-LF
402
21
R1302
5%
1/16W
MF-LF
402
10K
21
R1300
402
10K
MF-LF
1/16W
5%
12
R1304
10V
20%
CERM
0.1uF
402
2
1
C1309
10V
20%
0.1uF
CERM
402
2
1
C1308
402
10V
20%
0.1uF
CERM
2
1
C1302
10V
0.1uF
CERM
402
20%
2
1
C1301
6.3V
10uF
20%
CERM
805
2
1
C1300
402
CERM
1uF
10%
6.3V
2
1
C1303
402
MF-LF
1/16W
5%
4.7
21
R1315
SM
21
XW1300
32.768K
SM-1
CRITICAL
4
1
Y1301
10K
5%
1/16W
MF-LF
402
21
R1303
051-6772
10213
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
System Management Unit
SYS_COLD_RESET_L
SMU_PWRSEQ_P9_6
SMU_CLK10M_XIN
SMU_CLK10M_XTAL
P25MM
SMU_CLK10M_XOUT
P25MM
RTC_CLK32K_XTAL
RTC_CLK32K_X1
P25MM
FAN_TACH4
FAN_TACH3
SYS_SLOT_PWR
TP_SMU_SPARE_P10_0
SYS_RESET_BUTTON_L
NB_SUSPENDACK_L
SB_STOPXTALS_L
I2C_SMU_CPU_SDA_OUT_L
FAN_PWM8
I2C_SMU_B_SCL
SMU_PWRSEQ_P9_5
SYS_POWER_BUTTON_L
SMU_SUSPENDREQ_L
SB_TO_SMU_INT_L
CLOCK_RESET_L
SMU_SLEEP
SYS_SLEWING_L
I2C_SMU_CPU_SCL_OUT_L
CPU_HRESET
FAN_RPM1
SYS_LED
FAN_RPM2
SYS_PME_L
SMU_QREQ
I2C_SMU_CPU_SCL_IN
FAN_RPM0
I2C_SMU_B_SDA
SMU_BOOT_TXD
SMU_BOOT_RXD
SYS_POWERUP_L
MAKE_BASE=TRUE
CPU_VID<5>
=PP3V3_ALL_SMU
GND_SMU_AVSS
SYS_POWER_BUTTON_L
SMU_RESET_L
=PP3V3_ALL_SMU
SMU_BOOT_CNVSS
FAN_TACH1
I2C_RTC_SCL
I2C_RTC_SDA
RTC_CLK32K_X2
P25MM
I2C_SMU_A_SCL_OUT_L
I2C_SMU_A_SCL_IN
SMU_PWRSEQ_P1_2
FAN_RPM4
CPU_BYPASS
SMU_PWRSEQ_P1_1
SMU_PWRSEQ_P1_0
SYS_DRIVE_BAY_INT_L
CPU_SENSE_V
CPU_SENSE_I
I2C_SMU_D_SDA
FAN_RPM5
SMU_ONEWIRE
SMU_PWRSEQ_P1_4
SMU_PWRSEQ_P1_3
I2C_SMU_E_SDA
I2C_SMU_E_SCL
FAN_TACH0
SYS_DOOR_AJAR_L
FAN_TACH2
FAN_TACH5
SMU_TO_SB_INT_L
CPU_TEMP
SMU_CLK10M_XOUT_R
P25MM
FAN_RPM3
I2C_SMU_A_SDA_OUT_L
I2C_SMU_A_SDA_IN
FAN_TACH6
CPU_VID<0>
FAN_TACH8
CPU_VID<2>
FAN_TACH7
CPU_VID<1>
FAN_PWM7
I2C_SMU_CPU_SCL_IN
FAN_PWM6
I2C_SMU_CPU_SDA_IN
SYS_LED_RED
FAN_TACH3
SYS_LED_GREEN
FAN_TACH4
ALS0_OUTFAN_RPM3
ALS1_OUTFAN_RPM4
ALS_GAIN_BOOST
FAN_RPM5
SMU_ACIN
SYS_POWERFAIL_L
SMU_BATT_DET_L
SYS_DRIVE_BAY_INT_L
SYS_LID_OPEN
SYS_DOOR_AJAR_L
SYS_KBDLED
FAN_PWM8
FAN_TACH5
SYS_LED_BLUE
DIAG_LED
SMU_CHARGE_BATT
SYS_PME_L
SYS_SLEWING_L
SMU_SUSPENDREQ_L
SYS_COLD_RESET_L
SMU_SLEEP
SYS_POWERUP_L
SYS_RESET_BUTTON_L
=PP3V3_ALL_SMU
CPU_VID<4>
CPU_VID<3>
CPU_VID<2>
CPU_VID<1>
SMU_BOOT_CE
SMU_BOOT_SCLK
SMU_BOOT_BUSY
CPU_VID<0>
I2C_SMU_CPU_SDA_IN
SMU_CLK10M_XIN
SMU_CLK10M_XOUT_R
=PPVREF_SMU
SYS_OVERTEMP_L
SMU_CHARGE_BATT
=PP3V3_ALL_SMU
SB_SUSPENDACK_L
SMU_WARM_RESET_L
VOLTAGE=0V
GND_SMU_AVSS
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.25MM
I2C_SMU_D_SCL
SYS_POWERFAIL_L
PP3V3_ALL_SMU_AVCC
VOLTAGE=3.3V
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.25MM
=PP3V3_ALL_RTC
RTC_CLK32K_X1
RTC_CLK32K_X2
SMU_CLK10M_XOUT
33
33
13
13
28
33
11
13
36
13
33
28
11
13
13
36
24
13
25
27
77
10
8
33
13
8
18
18
13
77
27
25
24
10
8
27
8
33
13
13
13
13
7
24
13
25
25
18
7
7
13
7
8
7
14
13
13
14
13
13
13
18
18
8
13
13
13
25
25
24
13
13
7
13
7
13
13
13
18
25
7
13
8
8
3
13
13
13
13
13
8
7
8
25
18
8
18
3
6
13
25
27
8
13
18
30
16
21
17
13
28
13
16
18
8
8
6
8
6
8
6
6
6
8
16
18
18
13
6
18
3
13
30
3
3
8
33
33
18
13
8
3
8
18
18
16
8
17
13
25
36
13
13
6
18
8
8
8
13
13
21 13
21 13
8
13
8
13
8
13
6
8
8
8
13 21
8
13
13
13
13
8
8
6
7
6
8
8
8
8
8
8
8
8
13
13
13
8
16
13
6
25
8
8
18
6
8
7
13
13
13
Preliminary
Page 14
A30B30
A29B29
A28B28
A27B27
A26B26
B25
B24
B23
B22
B21
A25
A24
A23
A22
A21
C30D30
C29D29
C28D28
C27D27
C26D26
C25D25
D22
D23
D24
D21
C24
C23
C22
C21
E30F30
E29F29
E28F28
E27F27
E26F26
E25F25
F24
F23
F22
F21
E24
E23
E22
E21
G30H30
G29H29
G28H28
G27H27
G26H26
H25 G25
G22
G23
G24
H21
H22
H23
H24
G21
H20
H19
H18
H17
H16
H15
H14
H13
H12
H11
H10
H9
H8
H7
H6
H5
H4
H3
H2
H1
G20
G19
G18
G17
G16
G15
G14
G13
G12
G11
G10
G9
G8
G7
G6
G5
G4
G3
G2
G1
F20
F19
F18
F17
F16
F15
F14
F13
F12
F11
F10
F9
F8
F7
F6
F5
F4
F3
F2
F1
E10
E20
E19
E18
E17
E16
E15
E14
E13
E12
E11
E9
E8
E7
E6
E5
E4
E3
E2
E1
D20
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
C20
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C9
C8
C7
C6
C5
C4
C3
C2
C1 B1 A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
B2
B3
B4
B5
B6
B7
B8
B9
B10
B11
B12
B13
B14
B15
B16
B17
B18
B19
B20
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
NC
NC
NC
DEVELOPMENT
0
5%
1/16W
MF-LF
402
21
R1400
DEVELOPMENT
0
5%
1/16W
MF-LF
402
21
R1401
DEVELOPMENT
0
4025%
21
R1402
DEVELOPMENT
5% 402
021R1403
F-ST-BGA
YFS-30-03-H-08-SB
NOSTUFF
H9
H8
H7
H6
H5
H4
H30
H3
H29
H28
H27
H26
H25
H24
H23
H22
H21
H20
H2
H19
H18
H17
H16
H15
H14
H13
H12
H11
H10
H1
G9
G8
G7
G6
G5
G4
G30
G3
G29
G28
G27
G26
G25
G24
G23
G22
G21
G20
G2
G19
G18
G17
G16
G15
G14
G13
G12
G11
G10
G1
F9
F8
F7
F6
F5
F4
F30
F3
F29
F28
F27
F26
F25
F24
F23
F22
F21
F20
F2
F19
F18
F17
F16
F15
F14
F13
F12
F11
F10
F1
E9
E8
E7
E6
E5
E4
E30
E3
E29
E28
E27
E26
E25
E24
E23
E22
E21
E20
E2
E19
E18
E17
E16
E15
E14
E13
E12
E11
E10
E1
D9
D8
D7
D6
D5
D4
D30
D3
D29
D28
D27
D26
D25
D24
D23
D22
D21
D20
D2
D19
D18
D17
D16
D15
D14
D13
D12
D11
D10
D1
C9
C8
C7
C6
C5
C4
C30
C3
C29
C28
C27
C26
C25
C24
C23
C22
C21
C20
C2
C19
C18
C17
C16
C15
C14
C13
C12
C11
C10
C1
B9
B8
B7
B6
B5
B4
B30
B3
B29
B28
B27
B26
B25
B24
B23
B22
B21
B20
B2
B19
B18
B17
B16
B15
B14
B13
B12
B11
B10
B1
A9
A8
A7
A6
A5
A4
A30
A3
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A2
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A1
J1400
051-6772
11
14
102
SYNC_MASTER=N/A
SYNC_DATE=N/A
CPU LOGIC ANALYZER
EI_CPU_TO_NB_SR_N<1>
EI_CPU1_CLK_P_R
EI_CPU1_CLK_N
EI_NB_TO_CPU_AD<16>
EI_NB_TO_CPU_AD<3>
EI_NB_TO_CPU_AD<4>
EI_CPU_TO_NB_AD<29>
EI_CPU_TO_NB_AD<41>
EI_CPU_TO_NB_AD<32>
EI_CPU_TO_NB_AD<33>
EI_CPU_TO_NB_AD<34>
EI_CPU_TO_NB_AD<30>
EI_CPU_TO_NB_AD<37>
EI_CPU_TO_NB_AD<31>
EI_CPU_TO_NB_AD<22>
EI_CPU_TO_NB_AD<10>
EI_CPU_TO_NB_AD<9>
EI_CPU_TO_NB_AD<1>
EI_CPU_TO_NB_AD<2>
EI_CPU_TO_NB_AD<0>
CPU1_HTBEN
CPU_HRESET_L
EI_CPU_TO_NB_AD<6>
EI_CPU_TO_NB_AD<21>
EI_CPU_TO_NB_AD<20>
EI_CPU_TO_NB_AD<25>
EI_CPU_TO_NB_AD<26>
EI_CPU_TO_NB_SR_P<0>
EI_CPU_TO_NB_SR_N<0>
EI_CPU_TO_NB_AD<27>
EI_CPU_TO_NB_AD<39>
EI_CPU_TO_NB_AD<19>
CPU_INT_L
EI_CPU_TO_NB_AD<15>
=PP1V2_EI_CPU
EI_CPU_TO_NB_AD<8>
EI_CPU_TO_NB_AD<13>
EI_CPU_TO_NB_AD<12>
EI_CPU_TO_NB_AD<5>
EI_CPU_TO_NB_AD<36>
EI_CPU_TO_NB_AD<35>
EI_CPU_TO_NB_AD<18>
EI_CPU_TO_NB_AD<43>
EI_CPU_TO_NB_AD<42>
EI_CPU_TO_NB_AD<38>
EI_CPU_TO_NB_AD<40>
EI_NB_TO_CPU_AD<9>
EI_NB_TO_CPU_AD<11>
EI_NB_TO_CPU_AD<0>
EI_CPU1_CLK_N
EI_NB_TO_CPU_AD<5>
EI_CPU1_CLK_P
EI_CPU_TO_NB_AD<3>
EI_CPU_TO_NB_AD<4>
EI_CPU_TO_NB_AD<7>
EI_CPU_TO_NB_AD<11>
EI_CPU_TO_NB_CLK_N
EI_CPU_TO_NB_CLK_P
EI_CPU_TO_NB_SR_P<1>
EI_CPU_TO_NB_AD<17>
EI_CPU_TO_NB_AD<14>
EI_CPU_TO_NB_AD<24>
EI_CPU_TO_NB_AD<28>
EI_NB_TO_CPU_AD<14>
EI_NB_TO_CPU_AD<12>
EI_NB_TO_CPU_AD<18>
EI_NB_TO_CPU_AD<19>
EI_CPU1_SYNC
CHKSTOP_L
EI_NB_TO_CPU_AD<13>
EI_NB_TO_CPU_AD<15>
EI_NB_TO_CPU_AD<17>
EI_NB_TO_CPU_AD<21>
EI_NB_TO_CPU_AD<27>
EI_NB_TO_CPU_AD<26>
EI_NB_TO_CPU_AD<30>
EI_NB_TO_CPU_AD<42>
EI_NB_TO_CPU_AD<41>
EI_NB_TO_CPU_AD<25>
EI_NB_TO_CPU_AD<20>
EI_NB_TO_CPU_AD<28>
EI_NB_TO_CPU_AD<29>
EI_NB_TO_CPU_AD<40>
EI_NB_TO_CPU_AD<10>
EI_NB_TO_CPU_AD<39>
EI_NB_TO_CPU_AD<36>
EI_NB_TO_CPU_SR_N<0>
RI_L
EI_NB_TO_CPU_SR_P<0>
EI_QREQ_L
I2C_SMU_A_SCL_OUT_L
EI_NB_TO_CPU_AD<1>
EI_NB_TO_CPU_AD<22>
EI_NB_TO_CPU_AD<33>
EI_NB_TO_CPU_AD<43>
EI_NB_TO_CPU_AD<2>
EI_NB_TO_CPU_AD<38>
EI_NB_TO_CPU_AD<37>
SYNCENABLE
EI_NB_TO_CPU_SR_N<1>
TP_PROC_TRIGGER_OUT
EI_NB_TO_CPU_SR_P<1>
EI_NB_TO_CPU_AD<8>
EI_NB_TO_CPU_AD<24>
EI_NB_TO_CPU_AD<7>
EI_NB_TO_CPU_AD<6>
EI_SE
EI_QACK_L
EI_NB_TO_CPU_AD<35>
=PP1V2_EI_NB
EI_NB_TO_CPU_AD<34>
EI_NB_TO_CPU_AD<32>
EI_NB_TO_CPU_AD<23>
EI_NB_TO_CPU_CLK_N
EI_NB_TO_CPU_CLK_P
MCP_L
I2C_SMU_A_SDA_OUT_L
=PP1V2_EI_NB
EI_CPU_TO_NB_AD<23>
EI_CPU_TO_NB_AD<16>
EI_NB_TO_CPU_AD<31>
EI_CPU1_CLK_P
EI_CPU1_CLK_N_R
EI_CPU1_SYNC
EI_CPU1_SYNC_R
CPU1_HTBEN
CPU1_HTBEN_R
31
30
30
30
30
28
28
29
27
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
30
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
27
29
27
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
27
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
30
29
29 18
29
29
29
29
29
29
29 30
29
29
29
29
29
29 29
29
29
18
29
29
29
29
29
18
18
29
29
29
27
27
28
14
28
28
28 28
28
28
28
28
28
28
28
28
28
28
28
28
28
14
29
28
28
28
28
28
28
28
28
28
28
25
28
18
28
28
28
28
28
28
28
28
28
28
28
28
28
28
14
28
14
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
14
8
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28 28
29 28
28 13
28
28
28
28
28
28
28 29
28 29
28
28
28
28
28 28
28
28
14
28
28
28
28
28
29
13
14
28
28
28
14
14 27
14 27
6
27
6
6
6
6 6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
7
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6 6
6 6
6 6
6
6
6
6
6
6
6 6
6 6
6
6
6
6
6 6
6
6
7
6
6
6
6
6
6
6
7
6
6
6
6
27
6 6
6 6
Preliminary
Page 15
SDA
SCL
GND
OS
VS+
A2
A1
A0
G
D
S
G
D
S
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
FAN 1
MOTOR CONTROL
TACH
12V DC
GND
17" SYSTEM FAN 603-5518
20" SYSTEM FAN 603-5521
OPTICAL TEMP SENSOR
I2C ADDR:90(1001000)
GND
TACH
MOTOR CONTROL
17" CPU FAN 603-5519
20" HD FAN 603-5487
FAN 0
PP3V3_RUN
HF28040-B
M-ST-TH
CRITICAL
4
3
2
1
J1600
10K
1%
402
1/16W
MF-LF
2
1
R1610
1/16W
MF-LF
402
5%
0
21
R1609
10-89-7062
M-ST-TH
CRITICAL
6 5
4
1
J1601
PP3V3_RUN
10K
1/16W
MF-LF
402
1%
2
1
R1659
0
1/16W
MF-LF
402
5%
21
R1650
NOSTUFF
SOP
LM75
CRITICAL
8
1
2
3
4
5
6
7
U1602
PP3V3_PWRON
NOSTUFF
402
MF-LF
1/16W
5%
0
21
R1621
402
CERM
16V
20%
0.01UF
2
1
C1660
603
MF-LF
1/10W
5%
0
21
R1660
603
0
5%
1/10W
MF-LF
21
R1661
603
0
5%
1/10W
MF-LF
21
R1662
MF-LF
1/10W
5%
0
603
21
R1663
MF-LF
1/10W
5%
0
603
21
R1664
CERM
25V
20%
0.1UF
603
NOSTUFF
2
1
C1602
1.5K
5%
1/4W
MF-LF
1206
2
1
R1605
NTHS5443T1
1206A-03
5
4
87632
1
Q1603
1/8W
1.5K
5%
MF-LF
805
2
1
R1607
SOT23
MMBD914XXG
3
1
D1602
MF-LF
1/8W
5%
0
805
21
R1608
10%
0.47UF
805
X7R
16V
2
1
C1604
3.9K
5%
1/8W
MF-LF
805
R1606
PP12V_RUN
SOT23-LF
2N7002
2
1
3
Q1602
NOSTUFF
0
5%
1/8W
MF-LF
805
21
R1603
805
1.0K
5%
1/8W
MF-LF
2
1
R1602
2N7002
SOT23-LF
2
1
3
Q1601
0
805
MF-LF
1/8W
5%
21
R1601
1206A-03
NTHS5443T1
5
4
87632
1
Q1653
25V
NOSTUFF
603
0.1UF
20%
CERM
2
1
C1652
1/8W
1.5K
5%
MF-LF
805
2
1
R1657
MF-LF
1/8W
0
805
5%
21
R1658
10%
805
0.47UF
X7R
16V
2
1
C1654
3.9K
5%
1/8W
805
MF-LF
R1656
SOT23
MMBD914XXG
3
1
D1652
MF-LF
1/4W
5%
1.5K
1206
2
1
R1655
SOT23-LF
2N7002
2
1
3
Q1652
PP12V_RUN
NOSTUFF
5%
1/8W
MF-LF
805
0
21
R1653
805
1.0K
5%
1/8W
MF-LF
2
1
R1652
SOT23-LF
2N7002
2
1
3
Q1651
805
MF-LF
1/8W
0
5%
21
R1651
6.3X11-TH
120UF
20%
16V
ELEC
2
1
C1603
120UF
16V
20%
ELEC
6.3X11-TH
2
1
C1653
NOSTUFF
FF
1/10W
5%
1K
805
2
1
R1615
NOSTUFF
1K
5%
1/10W
FF
805
2
1
R1665
MF-LF
1/8W
5%
0
805
21
R1666
MF-LF
805
1/8W
0
5%
21
R1616
MBRS130LT3
SM
NOSTUFF
21
D1603
SM
MBRS130LT3
NOSTUFF
21
D1653
16
102
051-6772
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
FAN 0, 1 & SYSTEM TEMP
SMU_FAN_RPM0
SMU_FAN_TACH0
FAN_TACH1
SMU_FAN_RPM1
SMU_FAN_TACH1
FAN_RPM1
FAN_RPM0
FAN_TACH0
MIN_LINE_WIDTH=0.5MM
FAN_0_PWR
MIN_NECK_WIDTH=0.25MM
FAN_0_OUT
FAN_1_OUT FAN_1_PWR
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
F1_GATESLOWDN
F0_GATESLOWDNF0_VOLTAGE8R5
F0_DRV
F0_RCFEEDBK
FAN_1_TACH
F1_RCFEEDBK
FAN_1_PWR_FILT
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
FAN_1_TACH_FILT
FAN_1_GND_FILT
VOLTAGE=0V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
PP12V_RUN_FAN_1_LCL
VOLTAGE=12V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
PP12V_RUN_FAN_1_LC
VOLTAGE=12V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
I2C_OPTICAL_SDA
TEMP_SENSOR_OS SYS_OVERTEMP_L
I2C_OPTICAL_SCL
FAN_0_CNTL
FAN_0_TACH
FAN_1_CNTL
F1_DRV
F1_VOLTAGE8R5
27 25
13
13
13
13
18 13
18
Preliminary
Page 16
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
+12V DC
I2C ADDR:92(1001001)
518S0193
FAN 2
MOTOR CONTROL
TACH
GND
20" CPU FAN 603-5459
17" HD FAN 603-5520
REMOTE HARD DRIVE TEMP SENSOR
10-89-7062
M-ST-TH
CRITICAL
6 5
4
1
J1700
PP3V3_RUN
402
MF-LF
1/16W
1%
10K
2
1
R1709
0
5%
402
MF-LF
1/16W
21
R1700
PP3V3_PWRON
M-RT-SM
53261-0498
CRITICAL
4
3
2
1
6
5
J1701
NTHS5443T1
1206A-03
5
4
87632
1
Q1703
MMBD914XXG
SOT23
3
1
D1702
NOSTUFF
CERM
20%
0.1UF
603
25V
2
1
C1702
5%
1/8W
1.5K
MF-LF
805
2
1
R1707
0
1/8W
805
MF-LF
5%
21
R1708
0.47UF
10%
805
X7R
16V
2
1
C1704
3.9K
5%
1/8W
MF-LF
805
R1706
1206
1.5K
5%
1/4W
MF-LF
2
1
R1705
2N7002
SOT23-LF
2
1
3
Q1702
NOSTUFF
805
MF-LF
5%
0
1/8W
21
R1703
PP12V_RUN
MF-LF
1/8W
5%
1.0K
805
2
1
R1702
MF-LF
805
1/8W
5%
0
21
R1701
SOT23-LF
2N7002
2
1
3
Q1701
120UF
6.3X11-TH
20%
16V
ELEC
2
1
C1703
1/10W
NOSTUFF
805
1K
5%
FF
2
1
R1715
805
0
5%
1/8W
MF-LF
21
R1716
NOSTUFF
SM
MBRS130LT3
21
D1703
051-6772
11
17
102
SYNC_MASTER=N/A
SYNC_DATE=N/A
FAN 2 & HD TEMP
FAN_TACH2
SMU_FAN_TACH2
SMU_FAN_RPM2
FAN_RPM2
FAN_2_TACH
F2_RCFEEDBK
F2_DRV
FAN_2_CNTL
I2C_HD_TEMP_SDA
I2C_HD_TEMP_SCL
F2_GATESLOWDN
FAN_2_PWR
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
F2_VOLTAGE8R5
FAN_2_OUT
18
18
13
13
6
6
Preliminary
Page 17
LM339A
V+
GND
LM339A
V+
GND
G
D
S
G
D
S
G
D
S
G
D
S
LM339A
V+
GND
LM339A
V+
GND
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
SMU OLD ’E’
I2C ADDR:98
HD TEMP SENSOR
U1702
PINS 34, 35
PINS C21, E21
PINS 36-39
MASTER
U2300
SHASTA
PINS Y9, AB7
USE 576 OHM FOR R1811 IF 5V RAIL IS USED FOR REFERENCE
SMU
MASTER
U2900
CPU JTAG
U3LITE
U3
PINS 50, 51
U1300
MASTER
U3LITE ’B’
PINS C20, B21
U3
U1300
MASTER
U1301
RTC
PINS 5, 6
I2C C BUS
U3LITE
PINS 91, 92
J4001 = A2
J4000 = A0
DIMMS
OF EACH DIMM
MASTER
U3
I2C A BUS
SMU
PINS 14,25,23,68
U1300
U1300
MASTER
PINS AA20, Y21
PINS A20, B20
U2600
U1300
MASTER
SMU
I2C B BUS
U1602
J2100
PINS 1, 2
I2C ADDR:90
PINS C1, B1
I2C ADDR:92
GPU TEMP SENSOR
U5890
PINS 7, 8
PINS 2, 3
I2C D & E BUS
I2C_CPU_A_SCL
I2C SB BUS
SMU NEW ’E’
PINS 18, 19
AUDIO
U9500 / AU300
PULSAR
PINS 26, 27
PINS 2, 3
I2C ADDR:94??
J2100 CAN BE USED AS A SECOND TEMP SENSOR
CPU
AMBIENT LIGHT SENSOR
OPTICAL TEMP SENSOR
402
MF-LF
1/16W
5%
2.0K
2
1
R1812
MF-LF
1/16W
5%
2.0K
402
2
1
R1813
PP2V5_PWRON
PP3V3_RUN
402
MF-LF
1/16W
5%
1K
2
1
R1814
402
1/16W
5%
1K
MF-LF
2
1
R1815
MF-LF
1/16W
402
2.0K
5%
2
1
R1800
200
1/16W
5%
MF-LF
402
2
1
R1808
1/16W
5%
MF-LF
200
402
2
1
R1810
SOI
3
13
11
10
12
U1800
SOI
3
2
5
4
12
U1800
2.0K
1/16W
5%
402
MF-LF
2
1
R1801
1/16W
MF-LF
2.0K
402
5%
2
1
R1818
1/16W
MF-LF
2.0K
5%
402
2
1
R1819
SM-LF
0
5%
1/16W
5
6
7
8
4
3
2
1
RP1800
NOSTUFF
1/16W
5%
0
SM-LF
5
6
7
8
4
3
2
1
RP1801
0.1UF
402
CERM
10V
20%
2
1
C1800
0
5%
1/16W
MF-LF
402
NOSTUFF
2
1
R1820
402
MF-LF
1/16W
5%
0
NOSTUFF
2
1
R1821
NOSTUFF
402
MF-LF
1/16W
5%
0
2
1
R1822
0
5%
1/16W
MF-LF
402
NOSTUFF
2
1
R1823
402
1/16W
5%
0
NOSTUFF
MF-LF
2 1
R1824
0
5%
1/16W
MF-LF
402
NOSTUFF
2 1
R1825
402
MF-LF
1/16W
5%
0
2 1
R1826
402
1/16W
0
MF-LF
5%
2 1
R1827
2N7002DW
SOT-363
1
2
6
Q1800
2N7002DW
SOT-363
4
5
3
Q1800
1/16W
402
4.7K
5%
MF-LF
2
1
R1828
20%
10V
CERM
402
0.1UF
2
1
C1802
4.7K
402
5%
MF-LF
1/16W
2
1
R1811
NOSTUFF
5%
2.0K
402
1/16W
MF-LF
2
1
R1830
NOSTUFF
MF-LF
402
5%
1/16W
2.0K
2
1
R1831
603
0
21
R1832
NOSTUFF
603
0
21
R1833
2N7002DW
SOT-363
4
5
3
Q1801
5%
1/16W
MF-LF
200
402
2
1
R1817
5%
1/16W
MF-LF
200
402
2
1
R1816
2N7002DW
SOT-363
1
2
6
Q1801
SOI
3
1
7
6
12
U1800
402
MF-LF
1/16W
5%
2.0K
2
1
R1802
2.0K
5%
1/16W
MF-LF
402
2
1
R1803
1/16W
402
MF-LF
5%
4.7K
NOSTUFF
2
1
R1809
2.0K
5%
1/16W
MF-LF
402
2
1
R1804
402
MF-LF
1/16W
5%
2.0K
2
1
R1805
PP3V3_PWRON
PP2V5_PWRON
SOI
3
14
9
8
12
U1800
PP3V3_ALL
2.0K
5%
402
MF-LF
1/16W
2
1
R1806
2.0K
5%
402
MF-LF
1/16W
2
1
R1807
20%
CERM
402
10V
0.1UF
2
1
C1801
051-6772
102
18
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
I2C CONNECTIONS
PP3V3_PWRON
PP3V3_PWRON
PP3V3_RUN
I2C
I2C_RTC_SCL
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_SMU_B_SDA
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_SMU_B_SCL
I2C_GPU_DIODE_SCL
I2C_GPU_DIODE_SDA
I2C_HD_TEMP_SCL
I2C_HD_TEMP_SDA
I2C_ALS_SCL
I2C_ALS_SDA
I2C_OPTICAL_SCL
I2C_OPTICAL_SDA
I2C_CLOCK_SCL
I2C_CLOCK_SDA
I2C_AUDIO_SCL
MAKE_BASE=TRUE
I2C_SB_SCL
NET_SPACING_TYPE=I2C
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_SB_SDA
I2C_AUDIO_SDA
I2C
I2C_SMU_D_SDA
I2C_NB_C_SCL
MAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
I2C_DIMM_SCL
I2C_DIMM_SDA
I2C_NB_C_SDA
MAKE_BASE=TRUE
NET_SPACING_TYPE=I2C
I2C
I2C_SMU_E_SCL
PP5V_U1800
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.25MM
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_SMU_A_SDA_OUT_L
I2C_CPU_A_SDA_TO_SMU
NET_SPACING_TYPE=I2C
I2C_CPU_A_SCL
I2C_NB_A_SDA
I2C_NB_A_SCL
=PP1V2_EI_NB
I2C_CPU_SCL_LS
NET_SPACING_TYPE=I2C
I2C_CPU_A_SDA_TO_CPU
NET_SPACING_TYPE=I2C
I2C_SMU_A_SCL_IN
MAKE_BASE=TRUE
PP5V_PWRON
PP5V_RUN
I2C
I2C_NB_B_SCL
I2C
I2C_SMU_D_SCL
JTAG_CPU_TDO
JTAG_CPU_TDI
JTAG_CPU_TMS
JTAG_CPU_TCK
=PP1V2_EI_CPU
I2C_SMU_A_SDA_IN
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_0V6_REF
I2C
I2C_NB_B_SDA
NET_SPACING_TYPE=I2C
MAKE_BASE=TRUE
I2C_SMU_A_SCL_OUT_L
I2C
I2C_SMU_CPU_SCL_IN
MAKE_BASE=TRUE
MAKE_BASE=TRUE
I2C
I2C_SMU_CPU_SDA_OUT_L
I2C
MAKE_BASE=TRUE
I2C_SMU_CPU_SDA_IN
I2C
MAKE_BASE=TRUE
I2C_SMU_CPU_SCL_OUT_L
NET_SPACING_TYPE=I2C
I2C_CPU_A_SDA
I2C
I2C_SMU_E_SDA
NET_SPACING_TYPE=I2C
SMU_CPU_JTAG_OR_I2C
I2C
I2C_RTC_SDA
50 34
58
58 22
31
27
27 11
11
30
18
18 10
14
28 10
29
14
11
11
7
17
17
25
25
13
14
11
7
30
30
30
30
14
13
6
6 6
13
13
13
58
58
6
6
21
21
16
16
27
27
95
6
6
95
13
24
40
40
24
13
6
29
24
24
7
13
6
6
24
13
29
29
29
29
7
13
24
6
13
13
13
13
29
13
13
Preliminary
Page 18
GRN
BLUE
AMB
+
-
+
-
+
-
+
-
D
S
G
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
J2100 CAN BE USED AS A SECOND TEMP SENSOR
AMBIENT LIGHT SENSOR
518S0193
<-- 17 INCH
<-- 17 INCH
<-- 17 INCH
MAX LED CURRENT = 0.5 / R
PLACE THESE PARTS CLOSE TO SMU IC
(STUFF WHEN SYS_LED_L = ACTIVE HIGH)
(AND NO STUFF R2132, R2119 & Q2100)
PLACE THESE PARTS CLOSE TO SMU IC
TO SET LED CURRENT
100% DUTY CYCLE OF 3V-PP PWM = 0.5V
PWM INPUT FROM SMU
PWM INPUT FROM SMU
5MV INPUT OFFSET
PWM INPUT FROM SMU
PLACE THESE PARTS CLOSE TO SMU IC
CHANGE R2100 VALUE
PLACE THESE PARTS CLOSE TO SMU IC
TOTAL CURRENT EXCLUDING LEDS CURRENT < 170 MICRO AMPS
20 INCH -->
PWM INPUT FROM SMU
PP5V_PWRON
PP5V_PWRON
AMB-GRN-BLUE
LATBG66B
RGB_LED
PLCC
4
3
1
5
2
6
LED2100
RGB_LED
TSSOP
LP324
4
8
9
10
11
U2100
PP5V_PWRON
953K
402
MF-LF
1%
1/16W
RGB_LED
2
1
R2109
PP5V_PWRON
RGB_LED
2N3904LF
SOT23
2
3
1
Q2102
RGB_LED
1/16W
402
MF-LF
1%
25.5
2
1
R2100
RGB_LED
TSSOP
LP324
4
14
13
12
11
U2100
RGB_LED
MF-LF
1/16W
402
1K
1%
2 1
R2112
RGB_LED
1%
1/16W
953K
402
MF-LF
2
1
R2104
402
1%
MF-LF
1/16W
RGB_LED
200K
2
1
R2105
10V
CERM
RGB_LED
603
0.47UF
20%
2
1
C2106
5%
0
402
MF-LF
1/16W
RGB_LED
2 1
R2101
402
953K
1%
MF-LF
1/16W
RGB_LED
2
1
R2102
PP5V_PWRON
RGB_LED
2N3904LF
SOT23
2
3
1
Q2108
RGB_LED
25.5
1%
1/16W
402
MF-LF
2
1
R2113
TSSOP
LP324
RGB_LED
4
7
6
5
11
U2100
402
1K
MF-LF
1/16W
RGB_LED
1%
2 1
R2114
MF-LF
1%
402
1/16W
953K
RGB_LED
2
1
R2110
RGB_LED
1%
1/16W
402
MF-LF
200K
2
1
R2111
CERM
RGB_LED
603
10V
20%
0.47UF
2
1
C2112
402
1/16W
MF-LF
5%
0
RGB_LED
2 1
R2115
MF-LF
1%
953K
402
1/16W
RGB_LED
2
1
R2118
PP5V_PWRON
RGB_LED
SOT23
2N3904LF
2
3
1
Q2114
RGB_LED
MF-LF
402
25.5
1%
1/16W
2
1
R2126
TSSOP
RGB_LED
LP324
4
1
2
3
11
U2100
RGB_LED
1/16W
402
MF-LF
1K
1%
2 1
R2127
RGB_LED
1/16W
402
MF-LF
1%
953K
2
1
R2116
RGB_LED
1/16W
402
1%
MF-LF
200K
2
1
R2117
RGB_LED
603
0.47UF
20%
10V
CERM
2
1
C2118
402
1/16W
RGB_LED
0
5%
MF-LF
2 1
R2130
20%
16V
CERM
402
0.022UF
RGB_LED
2 1
C2101
0.022UF
20%
RGB_LED
402
CERM
16V
21
C2102
RGB_LED
16V
CERM
402
0.022UF
20%
2 1
C2104
402
CERM
10V
RGB_LED
20%
0.1UF
2
1
C2103
1/16W
NOSTUFF
1K
402
5%
MF-LF
2 1
R2132
PP3V3_PWRON
FDV302P
SOT-23
NOSTUFF
2
1
3
Q2100
SM-1
RGB_LED
400-OHM-EMI
2
1
L2100
SM-1
400-OHM-EMI
RGB_LED
2
1
L2101
RGB_LED
SM-1
400-OHM-EMI
2
1
L2102
5%
25V
RGB_LED
CERM
402
220PF
21
C2105
CERM
25V
5%
RGB_LED
220PF
402
2
1
C2107
RGB_LED
SM-1
400-OHM-EMI
21
L2104
CERM
402
25V
5%
220PF
RGB_LED
2 1
C2108
RGB_LED
5%
25V
402
CERM
220PF
2 1
C2109
WHITE_LED
402
CERM
5%
220PF
25V
2 1
C2110
220PF
25V
5%
CERM
WHITE_LED
402
2
1
C2111
1/16W
402
5%
MF-LF
0
WHITE_LED
2 1
R2107
953K
402
MF-LF
1%
1/16W
NOSTUFF
2 1
R2119
SM
WHITE_LED
FDV301N
2
1
3
Q2101
WHITE
SM6
2
1
LED2101
PP3V3_PWRON
M-RT-SM
53261-0498
CRITICAL
4
3
2
1
6
5
J2100
PP3V3_PWRON
1/10W
5%
0
MF-LF
603
WHITE_LED
21
R2120
MF-LF
1/10W
5%
0
603
WHITE_LED
2
1
R2121
17_INCH_LCD
56.2
1/16W
402
MF-LF
1%
2
1
R2103
WHITE_LED
1K
1/16W
MF-LF
402
5%
2 1
R2106
WHITE_LED
4.7K
5%
402
1/16W
MF-LF
2
1
R2129
NOSTUFF
R2100,R2113,R2126
3
114S1821
RES, 18.2 OHM, 1%, 402
RES, 39.2 OHM, 1%, 402
R2103
1
20_INCH_LCD
114S3921
11051-6772
21 102
SYNC_MASTER=N/A
SYNC_DATE=N/A
INDICATOR LED
SYS_GATE
B_DRV
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
SYS_DRV_A
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
SYS_LED_DRV_K
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
MIN_LINE_WIDTH=0.6MM
B_DRV_K
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
R_DRV_K
MIN_NECK_WIDTH=0.2MM
G_DRV
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
G_DRV_K
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
GND_CHASSIS_LED
G_DRV_FB
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
GND_CHASSIS_LED
B_PWM_IN_H
B_PWM_DC
R_IN_OFFSET
SYS_LED_GREEN
MAKE_BASE=TRUE
R_PWM_IN_H
SYS_LED_RED
MAKE_BASE=TRUE
R_BASE_DRV
R_DRV_FB
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
R_DRV
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
B_DRV_FB
SYS_LED_BLUE
MAKE_BASE=TRUE
G_PWM_IN_H
B_IN_OFFSET
GND_CHASSIS_LED
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
RGB_LED_A
SYS_LED_IN
G_IN_OFFSET
G_PWM_DC
SYS_LED_DRV_C
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
R_PWM_DC
B_BASE_DRV
SYS_LED
G_BASE_DRV
U2100_UNUSED
I2C_ALS_SDA
I2C_ALS_SCL
SYS_LED_H
SYS_DRV_K
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
21
21
21
7
7
13
13
13
7
13
6
18
18
Preliminary
Page 19
G
D
S
GND
GND
VDD
(SYM 6 OF 7)
G
D
S
FB
LD
HD
GND
COMP
SS
VCC
VC
G
D
S
LM339A
V+
GND
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
1.5V RUN FET
CHECK FETS
IS D2250 NEEDED?
7.73A OF PEAK CURRENT DRAW ON PCORE_NB
SET OUTPUT=1.5VDC FOR U3LITE CORE
IRU3037CS VREF=1.25VDC
VOUT=VREF*(R2203+R2205)/R2205=1.53VDC
NOTE:
U2200_FEEDBACK
@ VGS=3.5 V
RDSON=0.012 OHM
PLACE LED2200 NEAR VREG
20%
6.3V
CERM
1206
10UF
2
1
C2201
TH-KZJ
ELEC
6.3V
20%
1800UF
2
1
C2209
TH-KZJ
20%
1800UF
ELEC
6.3V
2
1
C2208
1/16W
10K
0.5%
MF-LF
603
2
1
R2205
1UF
10V
CERM
20%
603
NOSTUFF
2
1
C2207
25V
CERM
1206
1UF
20%
NOSTUFF
2
1
C2212
PP5V_PWRON
CASE369
NTD60N02R
Q2201
5%
MF-LF
0
805
1/8W
21
R2202
805
1UF
20%
25V
CERM
2
1
C2204
402
CERM
25V
5%
220PF
2
1
C2206
PP5V_PWRON
603
20%
16V
CERM
0.1UF
2
1
C2214
1UF
25V
CERM
805
20%
2
1
C2216
1UF
805
25V
CERM
20%
2
1
C2217
MBR0520LXXG
SOD-123
2 1
D2200
SOD-123
MBR0520LXXG
2 1
D2201
SOD-123
MBR0520LXXG
2
1
D2202
PBGA
V1.0-300MM
U3LITE
OMIT
R14
T16
T11
U18
U13
U10
V15
K15
V12
K12
L17
L14
M16
M11
N18
N13
P15
P12
R17
W17
W14
AC13
B22
B16
B13
B4
AC7
D25
D19
D10
D7
D2
F22
F16
F13
G27
G23
AE25
G4
H19
H10
J14
J9
K25
K21
K16
K11
K6
AE19
K2
L18
L13
L10
M20
M15
M12
N27
N23
N17
AE10
N14
N9
N8
N4
P19
P16
P11
R18
R13
R10
AE4
T27
T23
T20
T15
T12
T6
T2
U17
U14
U9
AG22
V19
V16
V11
W25
W21
W18
W13
W8
W4
Y20
AG16
Y15
Y12
AA19
AA10
AB27
AB23
AB6
AB2
AC22
AC16
AG13
AG7
U3
NTD60N02R
CASE369
3
1
4
Q2202
1.6UH
TH
21
L2201
1.1K
MF-LF
1/16W
1%
402
NOSTUFF
2
1
R2204
IRU3037CS
SOI
2 6
8
3
5
4
1
7
U2200
2.21K
1/16W
0.5%
MF-LF
603
2
1
R2203
402
27.4K
1%
1/16W
MF-LF
2
1
R2201
603
CERM
50V
5%
3900PF
2
1
C2215
603
68PF
5%
50V
CERM
2
1
C2213
PP5V_PWRON
4.7
5%
1/8W
MF-LF
805
2
1
R2200
PP1V5_RUN
10BQ040PBF
SMB
NOSTUFF
21
D2250
402
10V
0.1UF
CERM
20%
NOSTUFF
21
C2250
SOT23-LF
2N7002
2
1
3
Q2251
PP5V_PWRON
1/16W
5%
MF-LF
402
100K
2 1
R2250
TH-KZJ
20%
ELEC
6.3V
1800UF
2
1
C2202
6.3V
ELEC
1800UF
20%
TH-KZJ
2
1
C2203
10UF
6.3V
CERM
20%
1206
2
1
C2210
SO-8
IRF7413
321
4
8765
Q2250
402
330
DEVELOPMENT
MF-LF
1/16W
5%
2
1
R2260
2.0X1.25A
DEVELOPMENT
GREEN
2
1
LED2200
DEVELOPMENT
SOI
3
1
7
6
12
U1001
MF-LF
1/16W
5%
0
402
DEVELOPMENT
21
R2261
603
50V
5%
2200PF
CERM
2
1
C2205
CERM
10V
20%
0.1UF
402
2
1
C2222
402
20%
10V
CERM
0.1UF
2
1
C2223
CERM
20%
0.1UF
10V
402
2
1
C2225
402
0.1UF
20%
10V
CERM
2
1
C2228
CERM
10V
20%
0.1UF
402
2
1
C2227
402
20%
10V
CERM
0.1UF
2
1
C2230
10V
20%
402
CERM
0.1UF
2
1
C2229
402
0.1UF
20%
CERM
10V
2
1
C2232
CERM
10V
0.1UF
402
20%
2
1
C2231
402
0.1UF
20%
10V
CERM
2
1
C2234
CERM
10V
20%
0.1UF
402
2
1
C2233
402
0.1UF
20%
10V
CERM
2
1
C2236
CERM
10V
20%
0.1UF
402
2
1
C2235
0.1UF
20%
10V
CERM
402
2
1
C2238
CERM
10V
20%
402
0.1UF
2
1
C2237
402
0.1UF
20%
10V
CERM
2
1
C2240
10V
20%
0.1UF
402
CERM
2
1
C2239
402
0.1UF
20%
10V
CERM
2
1
C2242
CERM
10V
20%
0.1UF
402
2
1
C2243
0.1UF
20%
10V
CERM
402
2
1
C2244
402
0.1UF
20%
10V
CERM
2
1
C2245
402
0.1UF
20%
10V
CERM
2
1
C2246
402
0.1UF
20%
10V
CERM
2
1
C2247
051-6772 11
22
102
SYNC_MASTER=N/A
SYNC_DATE=N/A
U3LITE CORE POWER
=PPVCORE_NB
=PPVCORE_NB
=PPVCORE_NB
U2200_COMP
LED_PP1V5_RUN_N
PP1V5_RUN_FOR_LED
1V1_REF
LED_PP1V5_RUN_P
PP3V3_RUN
U2200_SS
SYS_SLEEP
PPVCORE_GPU
R2201_P2
U2200_VC
R2204_P2
U2200_VC_R U2200_VC_D
U2200_GATE_H
Q2201_GATE
Q5006G
PPVCORE_NB
VOLTAGE=1.5V
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
Q2202_DRAIN
U2200_FEEDBACK
U2200_GATE_L
50
50
34
46
18
11
11
10
50
10
9
51
22
22
34
7
8
50
7
7
6
10
6
6
6
7
6
6
6 6
6
6
6
6
6
6
Preliminary
Page 20
VIO1
POWER
VDDO33
VDDO25
VIO2
VDDP_KL
VDDC
GND
GND
GND
(1 OF 8)
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
For PCI_AD<63..32>
For PCI_AD<31..0>
DIGITAL - 1.2V - 950 mA (1175 mW)
ANALOG12 - 1.2V - 600 mA ( 760 mW)
I/O 3.3 - 3.3V - 220 mA ( 770 mW)
Total: 3015 mW
I/O 2.5 - 2.5V - 20 mA ( 60 mW)
VDDPs - 2.5V - 100 mA ( 250 mW)
Shasta max (est 06/30/03) current:
Power aliases required by this page:
Page Notes
Must power Shasta VCore rail before any
_PPPCI64_PWRON_SB to same if 64-bit
characteristics required by the PCI
NOTE: PCI pads use the VIO supply to meet
- _PPVCORE_PWRON_SB (1.2V)
Power Sequencing:
BOM options provided by this page:
(NONE)
(NONE)
Signal aliases required by this page:
appropriate PCI bus voltage and
spec for 5V vs. 3.3V operation.
Connect _PPPCI32_PWRON_SB to
PCI, otherwise 3.3V.
different drive timing
- _PP3V3_PWRON_SB
- _PPPCI64_PWRON_SB (to 5V or 3.3V)
- _PPPCI32_PWRON_SB (to 5V or 3.3V)
- _PP2V5_PWRON_SB
other Shasta supplies.
0.1uF
402
CERM
10V
20%
2
1
C2304
20%
0.1uF
402
CERM
10V
2
1
C2305
20%
10V
CERM
402
0.1uF
2
1
C2306
0.1uF
402
CERM
10V
20%
2
1
C2307
10V
CERM
20%
402
0.1uF
2
1
C2308
0.1uF
CERM
402
10V
20%
2
1
C2309
20%
10V
CERM
402
0.1uF
2
1
C2302
20%
10V
CERM
402
0.1uF
2
1
C2301
0.1uF
402
CERM
10V
20%
2
1
C2300
20%
10V
CERM
402
0.1uF
2
1
C2314
20%
10V
CERM
402
0.1uF
2
1
C2313
0.1uF
CERM
10V
20%
402
2
1
C2312
0.1uF
402
CERM
10V
20%
2
1
C2311
0.1uF
10V
20%
CERM
402
2
1
C2310
0.1uF
402
CERM
10V
20%
2
1
C2334
20%
10V
CERM
402
0.1uF
2
1
C2333
20%
10V
CERM
402
0.1uF
2
1
C2339
0.1uF
402
CERM
10V
20%
2
1
C2338
0.1uF
402
CERM
10V
20%
2
1
C2332
20%
10V
CERM
402
0.1uF
2
1
C2331
20%
10V
CERM
402
0.1uF
2
1
C2337
0.1uF
402
CERM
10V
20%
2
1
C2336
0.1uF
402
CERM
10V
20%
2
1
C2330
20%
10V
CERM
402
0.1uF
2
1
C2335
20%
10V
CERM
402
0.1uF
2
1
C2324
20%
10V
CERM
402
0.1uF
2
1
C2323
0.1uF
402
CERM
10V
20%
2
1
C2329
0.1uF
402
CERM
10V
20%
2
1
C2328
0.1uF
402
CERM
10V
20%
2
1
C2322
0.1uF
402
10V
20%
CERM
2
1
C2321
20%
10V
CERM
402
0.1uF
2
1
C2327
20%
10V
CERM
402
0.1uF
2
1
C2326
20%
10V
CERM
402
0.1uF
2
1
C2320
0.1uF
402
CERM
10V
20%
2
1
C2325
402
0.1uF
CERM
10V
20%
2
1
C2351
CERM
20%
10V
402
0.1uF
2
1
C2350
CERM
10V
20%
402
0.1uF
2
1
C2357
0.1uF
402
CERM
10V
20%
2
1
C2356
20%
10V
CERM
402
0.1uF
2
1
C2355
20%
10V
0.1uF
402
CERM
2
1
C2362
10V
0.1uF
402
CERM
20%
2
1
C2361
20%
CERM
402
10V
0.1uF
2
1
C2360
20%
10V
CERM
402
0.1uF
2
1
C2365
SHASTA
V1.0
BGA
OMIT
Y19
W22
L21
K21
H17
H18
V8
D1
B5
B2
B1
AB6
AB2
AB10
AA3
W4
V7
U9
U12
R2
M1
L7
H1
F8
F4
AA2
AA1
G15
D19
P15
N8
M15
L8
L15
K8
J15
J12
T15
T10
R9
R12
R10
H8
H15
D2
C19
AB22
AB1
W5
W19
U22
U13
U10
T12
R19
P9
P4
AA6
P14
P13
P12
P10
N9
N22
N13
N12
N11
N10
AA10
M2
M14
M13
M12
M11
M10
L9
L16
L14
L13A5L12
L11
L10
K9
K7
K13
K12
K11
K10
J22
A22
J16
J14
J13
J11
J10
H9
H2
F7
F3
E22
A2
A1
U2300
0.1uF
402
CERM
10V
20%
2
1
C2303
11
051-6772
10223
SYNC_MASTER=N/A
SYNC_DATE=N/A
Shasta Core Power
=PPVCORE_PWRON_SB
=PP2V5_PWRON_SB
=PP3V3_PWRON_SB
=PPPCI32_PWRON_SB
=PPPCI64_PWRON_SB
=PP2V5_PWRON_SB
88
88
74
74
7
25
74
25
6
23
25
23
3
7
7
7
7
7
Preliminary
Page 21
G
D
S
G
D
S
G
D
S
G
D
S
SYS_ISCL0
SYS_ISCA0
SYS_ISCA1
SYS_ISCL1
API_ISCA
API0_ISCL
THMO
DUMMY_A
DUMMY_B
PMR_OBSV
IRQ0
THMI
(SYM 7 OF 7)
HRESET*
PURESET*
SUSPENDACK*
SUSPENDREQ*
CE1_B_TDO
CE1_A_TDI
CE1_LT_TCK
VSP_CLKN
VSP_CLKP
CE1_DI1_TMS
CE1_DI2_TRST
CE1_RI
CEO_TEST
PM_SLEEP0
CE0_RE
CE0_MC
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
U3LITE REQUIRES ALL JTAG SIGNALS
JTAG_NB_TCK
JTAG_NB_TDI
JTAG_NB_TMS
JTAG_NB_TDO
HIGH FOR NORMAL OPERATION
JTAG_NB_TRST_L
PP3V3_PWRON
PP3V3_PWRON PP2V5_PWRON
PP2V5_PWRON
PP2V5_PWRON
402
4.7K
5%
1/16W
MF-LF
2
1
R2435
CERM
0.1UF
402
10V
20%
2
1
C2400
5%
1/16W
MF-LF
330
402
2
1
R2419
2N7002DW
SOT-363
4
5
3
Q2404
MF-LF
5%
1/16W
330
402
2
1
R2420
1/16W
402
MF-LF
1%
100
2
1
R2400
2N7002DW
SOT-363
1
2
6
Q2404
SOT-363
2N7002DW
NOSTUFF
4
5
3
Q2412
1/16W
5%
402
10K
MF-LF
NOSTUFF
2
1
R2438
2N7002DW
SOT-363
NOSTUFF
1
2
6
Q2412
1/16W
402
MF-LF
1%
100
2
1
R2403
402
5%
1/16W
MF-LF
10K
2
1
R2424
402
MF-LF
1/16W
5%
10K
2
1
R2426
402
10K
5%
1/16W
MF-LF
2
1
R2429
MF-LF
1/16W
5%
10K
402
2
1
R2431
402
10K
5%
1/16W
MF-LF
2
1
R2433
MF-LF
1/16W
402
10K
5%
2
1
R2436
10K
MF-LF
1/16W
5%
402
2
1
R2442
MF-LF
1/16W
5%
10K
402
2
1
R2443
402
10K
5%
1/16W
MF-LF
2
1
R2444
4.7K
402
MF-LF
1/16W
5%
NOSTUFF
2
1
R2405
0
5%
1/16W
MF-LF
402
21
R2406
0
5%
1/16W
MF-LF
402
NOSTUFF
21
R2408
V1.0-300MM
U3LITE
OMIT
PBGA
P4
R4
J18
J17
C21
C20
E21
B21
D21
D20
E20
D15
Y9
E9
A21
AB28
AC28
AH3
AC2
R25
F20
M26
AA25
V25
AD3
AD5
B20
A20
U3
402
121
1%
1/16W
MF-LF
2
1
R2402
MF-LF
1/16W
1%
121
402
2
1
R2401
1000PF
NOSTUFF
CERM
5%
25V
603
2
1
C2401
051-6772
102
24
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
U3LITE MISC
JTAG_NB_TMS
JTAG_NB_TDO
JTAG_NB_TRST_L
JTAG_NB_TDI
JTAG_NB_TCK
VSP_NB_CLK_N
SMU_SUSPENDREQ_L
I2C_NB_B_SCL
I2C_NB_B_SDA
I2C_NB_C_SDA
I2C_NB_C_SCL
I2C_NB_A_SDA
I2C_NB_A_SCL
NB_THMO
NB_THMI
NB_PMR_OBSV
NB_INT_L
TP_DUMMY_A
TP_DUMMY_B
NB_WARM_RESET_L
NB_COLD_RESET_L
NB_SUSPEND_ACK_L
NB_SUSPEND_REQ_L
NB_RI_PU
NB_TEST_PD
NB_RE_PD
NB_MC_PD
TP_NB_PM_SLEEP0
SYS_COLD_RESET_L
NB_PU_RESET
NB_COLD_RESET_L
VSP_NB_CLK_P
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=0.6V
NB_VSP_CLK_VREF
PMU_SUSPEND_REQ
=PP1V2_HT
NB_SUSPEND_REQ_L
28 25
13
60
27
13
18
18
18
18
18
18
8
8
8
25
6
6
8
24
8
24
6
8
24
27
7
24
Preliminary
Page 22
GND
PLL_49
GND
XTAL_18 PLL_45
GND
VIO
PME
PLL_49
VDD
PLL_45
VDD
XGI
XTALS
TEST
PWR_MGT
PCI
GPIO
I2C
I2S2 I2S1 I2S0
(2 OF 8)
PCI1C_BE_4_L
PCI1C_BE_5_L
PCI1C_BE_6_L
PCI1C_BE_7_L
PCI1PAR64_H
XGI_DTI_H
XGI_DTO1_H
XGI_CLK_H
XGI_DTO0_H
PCI1ACK64_L
PCI1REQ64_L
PCI1AD_60_H
PCI1AD_63_H
PCI1AD_62_H
PCI1AD_61_H
PCI1AD_50_H
PCI1AD_52_H
PCI1AD_53_H
PCI1AD_51_H
PCI1AD_59_H
PCI1AD_58_H
PCI1AD_57_H
PCI1AD_56_H
PCI1AD_55_H
PCI1AD_54_H
PCI1AD_40_H
PCI1AD_41_H
PCI1AD_42_H
PCI1AD_43_H
PCI1AD_44_H
PCI1AD_49_H
PCI1AD_48_H
PCI1AD_47_H
PCI1AD_46_H
PCI1AD_45_H
PCI1AD_39_H
PCI1REQ_5_L
PCI1AD_32_H
PCI1AD_34_H
PCI1AD_38_H
PCI1AD_37_H
PCI1AD_36_H
PCI1AD_33_H
PCI1AD_35_H
PCI1GNT_5_L
PCI1GNT_4_L
PCI1REQ_4_L
PCI1GNT_3_L
PCI1REQ_3_L
XTAL_18XTAL
VDD VDD
FSTEST
XTAL_18_I
XTAL_18_O
XTALI
XTALO
PLLTEST
TEST_MODE_H
TDI
TCK
TMS
TDO
INTRWD_H
I2CDATA_H
I2CCLK_H
PCI_SEL32BIT_H
GPIO_H_3
GPIO_H_2
GPIO_H_1
I2S2SYNC_H
I2S2BITCLK_H
I2S2MCLK_H
I2S2DTO_H
I2S2DTI_H
GPIO_H_0
I2S1DTO_H
I2S1MCLK_H
I2S1BITCLK_H
I2S1SYNC_H
I2S1DTI_H
I2S0BITCLK_H
I2S0SYNC_H
I2S0DTI_H
I2S0DTO_H
I2S0MCLK_H
RESET_L
STOPXTALS_L
SUSPENDREQ_L
SUSPENDACK_L
PCI1PME_L
TRST_L
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
- PCI_64BIT
Configures Shasta for 64-bit PCI
NOTE: XGC required for Shasta GPIOs
Selects whether NorthBridge or
- MPIC_NB/MPIC_SB
the audio circuit to provide the
necessary pull-ups & pull-downs.
NOTE: It is the responsibility of
AUDIO GPIOS
REDUNDANT - NEED TO ADDRESS THIS
"Slot F" - AD22
23
To SouthBridge ->
REDUNDANT - NEED TO ADDRESS THIS
NET_SPACING_TYPE
Re-pin within each RPAK as necessary
(I2S0_DEV_TO_SB_DTI)
1 = 32-bit PCI & GPIOs
0 = 64-bit PCI & XGC
PCI 32-bit select
SouthBridge MPIC will be used for
interrupt controller.
NorthBridge / SouthBridge MPIC Routing
Page Notes
<- To CPU
-> From NorthBridge
From SouthBridge <-
AUDIO GPIO - see note on right
- _PP3V3_PWRON_SB
- _PP1V2_PWRON_SB
Signal aliases required by this page:
35
32
21
"Slot E" - AD21
6
(NONE)
- _PP2V5_PWRON_SB
- _PP3V3_PCI
29
(I2S2_RESET_L)
48
49
52
51
50
54
53
40
39
46
47
45
44
41
43
38
37
36
34
28
30
33
31
(SCCB) (SCCA)
25
24
20
18
19
27
22
12
9
16
15
14
13
17
8
11
7
10
26
Power aliases required by this page:
BOM options provided by this page:
NC
GPIO
ELECTRICAL_CONSTRAINT_SET
DIFFERENTIAL_PAIR
I2S1: Soft Modem
I2S0: Audio DAC
(I2S1_DEV_TO_SB_DTI)
I2S2: S/P-DIF
42
DO NOT swap between RPAKs
(I2S1_RESET_L)
(I2S2_DEV_TO_SB_DTI)
20%
NOSTUFF
CERM
1206
6.3V
10uF
2
1
C2500
6.3V
10%
1uF
CERM
402
2
1
C2501
402
6.3V
1uF
CERM
10%
2
1
C2511
1206
10uF
CERM
6.3V
20%
NOSTUFF
2
1
C2510
10uF
1206
CERM
6.3V
20%
NOSTUFF
2
1
C2520
1uF
10%
6.3V
CERM
402
2
1
C2521
6.3V
20%
CERM
10uF
NOSTUFF
1206
2
1
C2530
1uF
10%
402
CERM
6.3V
2
1
C2531
10K
5%
1/16W
MF-LF
402
2
1
R2500
1K
5%
PCI_64BIT
402
MF-LF
1/16W
2
1
R2501
200
402
MF-LF
1/16W
1%
2
1
R2590
CERM
402
22pF
5%
50V
2
1
C2591
22pF
5%
50V
CERM
402
2
1
C2590
4.7K
402
1/16W
5%
MF-LF
2
1
R2580
OMIT
SHASTA
BGA
V1.0
Y13
V13
W13
AB12
W14
V15
U15
T9
U7
W2
Y4
W17
W12
Y11
A3
W11
AA11
AB11
U11
V11
W10
E9
Y12
AA12
AA13AB13
U14
W6
U16
AB21
U17
K17
W18
E18
Y20
AA20
AA19
K20
K22
H22
J20
H21
G22
F22
J19
H20
G21
F21
J17
H19
K18
D22
G20
D21
C22
G19
F20
C21
E20
D20
F19
E19
G18
G17
C20
B21
A21
F16
G16
F17
F18
A20
D18
L17
V12
W9
Y7
Y8
AA5
AB4
AA7
V9
AB5
V10
AA8
Y6
U8
Y5
W7
AA4
AB7
Y9
W8
AB3
Y2
V5
V14
U2300
20%
10V
CERM
402
0.1uF
2
1
C2540
1/16W
5%
10K
SM-LF
63
RP2551
10K
1/16W
5%
SM-LF
81
RP2550
10K
5%
SM-LF
1/16W
54
RP2550
1/16W
5%
10K
SM-LF
72
RP2550
5%
10K
1/16W
SM-LF
81
RP2551
10K
5%
1/16W
SM-LF
72
RP2551
5%
1/16W
10K
SM-LF
54
RP2551
1/16W
5%
SM-LF
10K
81
RP2552
10K
5%
1/16W
SM-LF
63
RP2550
10K
SM-LF
1/16W
5%
72
RP2552
10K
5%
1/16W
SM-LF
54
RP2552
1/16W
10K
SM-LF
5%
63
RP2552
10K
1/16W
5%
SM-LF
72
RP2553
1/16W
SM-LF
5%
10K
54
RP2553
10K
SM-LF
1/16W
5%
81
RP2553
10K
1/16W
5%
SM-LF
63
RP2553
402
5%
1/16W
MF-LF
10K
21
R2550
402
5%
1/16W
MF-LF
10K
21
R2551
MF-LF
10K
5%
1/16W
402
21
R2552
402
10K
MF-LF
1/16W
5%
21
R2553
402
10K
MF-LF
1/16W
5%
21
R2556
402
10K
MF-LF
1/16W
5%
21
R2557
402
5%
1/16W
MF-LF
10K
21
R2558
402
5%
1/16W
MF-LF
10K
21
R2559
10K
5%
1/16W
MF-LF
402
21
R2564
5%
1/16W
MF-LF
402
10K
21
R2563
1K
5%
1/16W
MF-LF
402
21
R2560
1/16W
10K
402
MF-LF
5%
21
R2561
10K
402
MF-LF
1/16W
5%
21
R2565
10K
402
MF-LF
1/16W
5%
21
R2567
1/16W
10K
402
MF-LF
5%
21
R2568
1K
5%
1/16W
MF-LF
402
NO STUFF
21
R2562
402
NO STUFF
5%
1/16W
MF-LF
10K
21
R2555
1/16W
402
MF-LF
5%
1K
21
R2554
PP3V3_RUN
MF-LF
10K
5%
1/16W
402
2
1
R2576
MPIC_SB
2N3904LF
SOT23
2
3
1
Q2576
MPIC_SB
10K
402
MF-LF
1/16W
5%
21
R2575
0
402
MF-LF
1/16W
5%
MPIC_NB
2
1
R2579
402
47
MPIC_SB
MF-LF
1/16W
5%
21
R2578
1/16W
SM-LF
33
5%
7
8
6
5
2
1
3
4
RP2510
1/16W
5%
33
SM-LF
8
7
6
5
1
2
3
4
RP2530
SM-LF
33
5%
1/16W
6
5
8
7
3
4
1
2
RP2520
3.3
5%
1/8W
MF-LF
805
21
R2505
3.3
805
MF-LF
1/8W
5%
21
R2510
5%
1/8W
MF-LF
805
3.3
21
R2520
805
3.3
MF-LF
5%
1/8W
21
R2530
1/16W
402
0
5%
MF-LF
21
R2511
11.4X4.7X4.2-SM
18.432M
21
Y2590
0
5%
1/16W
MF-LF
402
21
R2566
402
NOSTUFF
0
MF-LF
5%
1/16W
21
R2570
051-6772
11
10225
SYNC_MASTER=N/A
SYNC_DATE=N/A
Shasta Serial / Misc
AUDIO
I2S0_MCLK
I2S0_TO_DEV
I2S0_BITCLK
I2S0_BIDIR
I2S0_TO_DEV
I2S0_SB_TO_DEV_DTO
I2S0_SYNC
I2S0_BIDIR
AUDIO_LO_OPTICAL_PLUG_L
ENET_ENERGYDET
=PP3V3_PWRON_SB
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
PP1V2_PWRON_SB_PLL45VDD
I2S1_BITCLK
I2S1_MCLK
I2S1_RESET_L
I2S2_MCLK
I2S1_DEV_TO_SB_DTI
I2S0_SYNC
I2S2_SYNC
TP_SB_FSTEST
SB_PCI_SEL32BIT
JTAG_SB_TRST_L
JTAG_SB_TMS
SB_GPIO52
SB_GPIO50
SMU_TO_SB_INT_L
SB_GPIO47
SB_GPIO45
SB_GPIO25
SB_GPIO23
SB_GPIO30
SB_GPIO24
SB_GPIO12
PCI_SLOTC_INT_L
PCI_SLOTF_INT_L
PCI_SLOTB_INT_L
SB_TO_SMU_INT_L
SB_TEST_MODE_PD
=PP3V3_PWRON_SB
I2S2_RESET_L
I2S0_SB_TO_DEV_DTO
I2S1_SYNC
I2S1_SB_TO_DEV_DTO
I2S2_SB_TO_DEV_DTO
I2S2_SYNC_R
I2S2_BITCLK_R
I2S2_SB_TO_DEV_DTO_R
I2S1_SYNC_R
I2S1_BITCLK_R
I2S1_MCLK_R
I2S1_SB_TO_DEV_DTO_R
I2S0_SYNC_R
I2S0_SB_TO_DEV_DTO_R
SYS_PME_L
I2C_SB_SCL
SB_SUSPENDACK_L
SMU_SUSPENDREQ_L
SB_STOPXTALS_L
SB_INT_L
MODEM_RING2SYS_L
I2C_SB_SDA
TP_SB_WATCHDOG
JTAG_SB_TCK
JTAG_SB_TDI
TP_SB_PLLTEST
SB_CLK25M_ATA
=PP3V3_PCI
PCI_SLOTE_REQ_L
PCI_SLOTF_REQ_L
PCI_SLOTE_GNT_L
PCI_SLOTF_GNT_L
PCI_SLOTA_INT_L
PCI_SLOTE_INT_L
PCI_SLOTD_INT_L
PCI_SLOTG_INT_L
JTAG_SB_TDO
SYS_WARM_RESET_L
SB_CLK18M_XTALO_R
I2S2_BITCLK
CLOCKS
SB_CLK25M_ATA
SB_CLK25M_ATA
I2S2_DEV_TO_SB_DTI
I2S2_MCLK_R
PP2V5_PWRON_SB_XTALVDD
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
=PP2V5_PWRON_SB
NB_TO_SB_INT
NB_INT_L
CPU_INT_L
NB_INT_L_R
SB_INT_L
I2S1_TO_DEV
I2S1_MCLK
P25MM
SB_GPIO47
SYS_SLEWING_L
SB_GPIO50
SB_GPIO49
SB_GPIO51
SB_GPIO52
NB_TO_SB_INT
SMU_TO_SB_INT_L
AUDIO_SPKR_DET_L
AUDIO_LO_MUTE_L
AUDIO_SPKR_MUTE_L
AUDIO_GPIO_12
AUDIO_LI_DET_L
AUDIO_LI_OPTICAL_PLUG_L
AUDIO_HP_DET_L
AUDIO_HP_MUTE_L
AUDIO_EXT_MCLK_SEL
AUDIO_GPIO_11
PCI_SLOTF_INT_L
SB_TO_SMU_INT_L
I2S0_MCLK_R
I2S0_BITCLK_R
SYS_SLEWING_L
CPU_SRESET_L
I2S1_RESET_L
=PP3V3_PWRON_SB
SB_GPIO51
SB_GPIO49
SB_GPIO46
SB_CLK18M_XTALI
SB_CLK18M_XTALO
SB_CLK18M_XTAL
SB_CLK18M_XTALI
CLOCKS
I2S2_BITCLK
I2S2_BIDIR
I2S2_TO_DEV
I2S2_MCLK
P25MM
VOLTAGE=2.5V
PP2V5_PWRON_SB_XTAL18VDD
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
I2S1_BIDIR
I2S1_BITCLK
I2S0_TO_SB
I2S0_DEV_TO_SB_DTI
MIN_NECK_WIDTH=0.25MM
VOLTAGE=1.2V
MIN_LINE_WIDTH=0.5MM
PP1V2_PWRON_SB_PLL49VDD
=PP1V2_PWRON_SB
I2S2_TO_DEV
I2S2_SB_TO_DEV_DTO
I2S2_DEV_TO_SB_DTI
I2S2_TO_SB
I2S1_BIDIR
I2S1_SYNC
I2S1_SB_TO_DEV_DTO
I2S1_TO_DEV
SB_GPIO46
SB_GPIO45
I2S0_RESET_L
=PP3V3_PWRON_SB
SYS_OVERTEMP_L
UDASH_RESET_L
MODEM_RING2SYS_L
SB_SATABR_RESET_L
PCI_SLOTE_GNT_L
ENETFW_RESET
ENET_ENERGYDET
SB_GPIO25
ENETFW_RESET
PCI_SLOTG_INT_L
CPU_SRESET_L
PCI_SLOTE_REQ_L
PCI_SLOTF_REQ_L
SB_GPIO12
SYS_OVERTEMP_L
PCI_SLOTF_GNT_L
FW_LOWPWR
SB_CLK18M_XTALO_R
CLOCKS
SB_SATABR_RESET_L
PCI_SLOTD_INT_L
AUDIO_LO_DET_L
SB_GPIO30
PCI_SLOTC_INT_L
PCI_SLOTB_INT_L
AGP_INT_L
UDASH_RESET_L
UDASH_SDOWN
I2S1_TO_SB
I2S1_DEV_TO_SB_DTI
PCI_SLOTA_INT_L
FW_LOWPWR
FW_LOWPWR_SHASTA
SB_GPIO24
SB_GPIO23
PCI_SLOTE_INT_L
I2S2_SYNC
I2S2_BIDIR
SB_CLK18M_XTALO
CLOCKS
I2S0_DEV_TO_SB_DTI
I2S0_MCLK
I2S0_BITCLK
77
74
74
76
88
30
33
33
74
74
27
27
25
94
94
94
94
25
94
94
28
94
75
76
77
74
29
94
27
27
30
94
25
94
94
94
25
25
94
30
25
94
76
102
102
95
95
86
23
25
25
25
102
25
95
102
25
25
23
95
25
25
102
77
18
24
25
18
27
74
56
25
77
74
102
27
102
23
14
25
25
25
25
25
29
25
23
102
102
25
95
102
102
25
25
23
16
25
25
86
25
77
29
16
56
89
101
25
25
89
102
95
102
102
25
25
25
25
101
25
7
6
6
6
25
6
25
25
6
8
8
25
25
13
25
25
25
25
25
25
25
25
25
25
13
7
102
25
6
6
25
13
6
13
13
13
25
6
6
8
8
6
25
7
25
25
25
25
6
25
25
25
8
8
25
25
25
25
7
25
24
6
25
6
25
13
25
25
25
25
25
13
102
98
100
101
101
102
102
102
102
102
25
13
13
25
6
7
25
25
25
25
25
25
25
25
6
25
7
25
25
6
6
25
25
95
7
13
25
6
25
25
12
25
25
12
25
25
25
25
25
13
25
25
25
25
25
6
25
25
25
49
25
94
6
6
25
25
25
25
25
25
25
25
25
Preliminary
Page 23
SYM 2 OF 2
VDD33
VDD25
VDD25
VDD_PLL3
VDD_PLL2
VDD_PLL1
C4_VDD
C3_VDD
C2_VDD
VDD_PLL4
VDD_I2C
VDD_NBSYNC
VDD_PCLK
VDD33_BC
VDD33_BC1
VDD_HCLK0
VDD_HSYNC
VDD_HCLK2
VDD_HCLK0
VDD_HCLK1
VDD_HCLK2
VDD_HSYNC
VDD15_HSYNC
VDD15_PCLK
VDD_XTAL
VDD_VCLK
VSS_XTAL
VSS_VCLK
VSS_HSYNC
VSS_HCLK2
VSS_HCLK0
VSS_HCLK1
VSS_HCLK2
VSS_HSYNC
VSS_HCLK0
VSS33_BC1
VSS33_BC
VSS33
VSS_PCLK
VSS_NBSYNC
VSS25
VSS25
VSS_I2C
VSS_CML
VSS_PLL4
VSS_PLL3
VSS_PLL2
C2_VSS
C3_VSS
C4_VSS
VSS_PLL1
C1_VSSC1_VDD
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PLACE NEAR PIN D10 D12
A8, C5, B4, K10, H12 J11, M11, A1
PINS G12, M12, H3, K1, L5, M9, A11, A9
CAN BE TURNED OFF IN SLEEP
PLACE NEAR PIN D2 D1
PLACE NEAR PIN M3 M2
PLACE NEAR PIN L8 K8
402 CAPS NOT NEEDED
IF 603 CAN BE PLACED CLOSE TO PULSAR
MF-LF
1/16W
5%
402
4.7
21
R2601
PP3V3_RUN
PP3V3_PWRON
CERM
20%
10V
402
0.1UF
2
1
C2601
402
4.7
5%
1/16W
MF-LF
21
R2603
402
4.7
5%
1/16W
MF-LF
21
R2605
0.1UF
402
10V
20%
CERM
2
1
C2605
180-OHM-1.5A
0603
21
L2601
CERM
402
10V
0.1UF
20%
2
1
C2609
402
10V
20%
CERM
0.1UF
2
1
C2611
0603
180-OHM-1.5A
21
L2603
0.1UF
CERM
20%
10V
402
2
1
C2613
0603
180-OHM-1.5A
21
L2605
0.1UF
CERM
20%
10V
402
2
1
C2615
0603
180-OHM-1.5A
21
L2607
402
CERM
20%
10V
0.1UF
2
1
C2617
0.1UF
20%
10V
402
CERM
2
1
C2619
0.1UF
402
10V
20%
CERM
2
1
C2622
MF-LF
1/16W
5%
4.7
402
21
R2607
0603
180-OHM-1.5A
21
L2609
10V
20%
CERM
0.1UF
402
2
1
C2620
CERM
20%
10V
402
0.1UF
2
1
C2627
0.1UF
402
10V
20%
CERM
2
1
C2628
CERM
20%
402
0.1UF
10V
2
1
C2629
CERM
20%
10V
402
0.1UF
2
1
C2630
CERM
20%
10V
402
0.1UF
2
1
C2651
0.1UF
402
10V
20%
CERM
2
1
C2623
0.1UF
402
10V
20%
CERM
2
1
C2624
0.1UF
402
10V
20%
CERM
2
1
C2625
0.1UF
402
10V
20%
CERM
2
1
C2626
0.1UF
402
10V
20%
CERM
2
1
C2631
0.1UF
402
10V
20%
CERM
2
1
C2632
0.1UF
402
10V
20%
CERM
2
1
C2633
0.1UF
402
10V
20%
CERM
2
1
C2634
0.1UF
402
10V
20%
CERM
2
1
C2635
0.1UF
402
10V
20%
CERM
2
1
C2636
0.1UF
402
10V
20%
CERM
2
1
C2637
0.1UF
402
10V
20%
CERM
2
1
C2638
10V
402
20%
0.1UF
CERM
2
1
C2665
CERM
20%
10V
402
0.1UF
2
1
C2667
CERM
20%
10V
402
0.1UF
2
1
C2671
402
0.1UF
10V
20%
CERM
2
1
C2640
402
CERM
0.1UF
20%
10V
2
1
C2639
402
4.7
5%
1/16W
MF-LF
21
R2609
20%
6.3V
2.2UF
603
CERM1
2
1
C2645
603
20%
2.2UF
6.3V
CERM1
2
1
C2669
603
20%
CERM1
6.3V
2.2UF
2
1
C2603
603
20%
6.3V
CERM1
2.2UF
2
1
C2607
603
20%
CERM1
6.3V
2.2UF
2
1
C2621
PULSAR
OMIT
FSBGA
C12
A3
M2
K8
D1
D12
L12
F11
C2
K12
H10
A7
A4
B7
B11
C10
A6
M5
L7
E2
H2
L2
A12
A1
M3
L8
D2
D10
M12
G12
B2
H12
K10
B4
C5
A8
A9
A11
M9
L5
E1
K1
H3
M11
J11
C9B9
E10E12
M4L3
G1F1
U2600
PP3V3_PWRON
PP3V3_PWRON
PP3V3_PWRON
PP3V3_RUN
PULSAR, PBGA
U2600
1
359S0076
102
26
051-6772
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
PULSAR POWER
=PP1V2_PULSAR
=PPVCORE_PULSAR
=PPVCORE_PULSAR
=PPVCORE_PWRON_PULSAR
=PPVCORE_PWRON_PULSAR
=PP1V2_PULSAR
=PPVCORE_PULSAR
=PP1V2_PULSAR
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM
VOLTAGE=1.5V
PP1V5_PSL_PLL1
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
PP3V3_PSL_XTAL
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
=PPVCORE_PWRON_PULSAR
PP1V5_PSL_PLL3
VOLTAGE=1.5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=1.5V
PP1V5_PSL_PLL2
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
PP1V5_PSL_PLL4
VOLTAGE=1.5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
46
46
40
40
37
37
26
26
26
26
26
26
26
26
26
26
26
7
7
7
7
7
7
7
7
7
7
7
Preliminary
Page 24
REFCLK_1
SYM 1 OF 2
SCLK
SDATA
RESET*
XIN
XOUT
REF25
REF15
TEST3
TEST2
TEST1
ADDRSEL
REF33
REF_CML
PRES_CML
FORCESPO*
PD
VCLKN
VCLKP
HCLKN_0
HCLKN_1
HCLKN_2
GPCLK33_1
GPCLK33_0
HCLKP_0
HCLKP_2
HCLKP_1
PCLK33_1
PCLK33_0
PCLK25_1
PCLK25_0
GPCLK25_0
GPCLK25_1
PCLK33_2
PCLK33_3
PCLK33_4
HTBEN_0
HTBEN_1
NBSYNC
HSYNC_0
HSYNC_1
REFCLK_0
ERROR*
SLEWING*
PCLK12
PCLK15
SCAN_MODE
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
1=IIC ADDR D4/D5
1.2V
DIFFERENTIAL_PAIR
33MHZ
33MHZ
66MHZ
66MHZ
33MHZ
66MHZ
66MHZ
66MHZ
3.3V
1.2V
1.2V
1.2V
1.5V
66MHZ
66MHZ
NET
TYPE
SPACING
66MHZ
NET_SPACING_TYPE
3.3V
3.3V
2.5V
2.5V
2.5V
25MHZ
25MHZ
3.3V
3.3V
2.5V
2.5V
2.5V
3.3V
33MHZ
0=IIC ADDR D2/D3
33MHZ
ELECTRICAL_CONSTRAINT_SET
DIFFERENTIAL SIGNALS SHOULD HAVE 5 MIL SPACING TO EACH OTHER
EI_NB_SYNC IS PART OF EI_CPU_SYNC TOPOLOGY
ALL SPACING GROUPS SHOULD HAVE 15 MIL SPACING TO SIGNALS NOT IN THEIR GROUP
NET_PHYSICAL_TYPE
5%
0
21
R2701
I100
I101
I102
I103
4025%
0
21
R2704
1%402
249
21
R2706
PULSAR
OMIT
FSBGA
B12
C11
B3
A2
D11
E11
K3
K9
B1
C1
M1
D3
H1
G2
A5
M6
J2
G11
B6
C3
M10
L9
M7
L6
K5
L1
K2
L10
L11
F12
J12
K11
H11
J10
B5
B8
A10
C4
C8
B10
K4
L4
J1
J3
F2
M8
E3
U2600
F-ST-SM
NOSTUFF
U.FL-R_SMT
1
2
3
J2700
25.0000M
8X4.5MM-SM
CRITICAL
21
Y2701
MF-LF
1/16W
5%
1K
402
2
1
R2722
MF-LF
1/16W
5%
0
NOSTUFF
402
21
R2748
I116
I117
I118
I119
I120
5% 402
2021R2703
5%0402
21
R2705
5% 402
021R2707
5% 402
2021R2709
5%0402
21
R2711
0
4025%
21
R2715
5% 402
021R2717
5%0402
21
R2719
40205%
21
R2720
NOSTUFF
5%402
1K 21
R2724
NOSTUFF
1K
5% 402
21
R2738
1K
1%
402
21
R2740
402
806
1%
21
R2742
1%402
681
21
R2744
1%1K402
21
R2746
402
47
5%
21
R2750
5%
NO STUFF
402
MF-LF
0
1/16W
21
R2752
MF-LF
1/16W
0
5%
402
21
R2754
MF-LF
1/16W
5%
0
402
21
R2756
MF-LF
1/16W
5%
330K
NO STUFF
402
21
R2758
40205%
21
R2761
24
MF-LF
5%
402
NOSTUFF
1/16W
2
1
R2762
5%
24
1/16W
402
MF-LF
NOSTUFF
2
1
R2764
402
33PF
CERM
50V
5%
2
1
C2705
402
33PF
5%
50V
CERM
2
1
C2707
NOSTUFF
5% 402
021R2768
4025%
2021R2770
NOSTUFF
5% 402
021R2772
0.001UF
50V
CERM
40210%
21
C2708
10% 402
CERM
50V
0.001UF
21
C2710
10% 402
CERM
50V
0.001UF
21
C2713
0.001UF
50V
CERM
40210%
21
C2715
10% 402
CERM
50V
0.001UF
21
C2700
40210%
CERM
50V
0.001UF
21
C2702
0
5%
402
NOSTUFF
21
R2775
5%0402
NOSTUFF
21
R2776
5%0402
21
R2702
40205%
21
R2779
5%22402
NOSTUFF
21
R2700
I86
I87
I90
I91
I94
I95
I96
I97
I98
I99
102
27
11051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
PULSAR CLOCKS
VSP_NB_CLK_P
EI_CPU_CLK_P
EI_CPU_CLK_N_C
CLOCKS
PCI_CLK_P4_R
CLOCKS
CPU_HTBEN
EI_CPU_SYNC
TP_SATA_CLK25M
PCI_CLK_P3_R
CLOCKS
CLOCKS
PLS_CLK_66M_1_R
PCI_CLK66M_SB_INT_R
CLOCKS
CLOCKS
PCI_CLK_P1_R
CLOCKS
EI_NB_SYNC_R
CLOCKS
HT_CLK66M_NB_R
TP_PLS_CLK_66M_0
EI_NB_CLK_N_C
CLOCKS
CLOCKS
VSP_NB_CLK_P_C
CLOCKS
HT_NB_CLK
HT_CLK66M_NB
CLOCKS
SB_CLK25M_ATA_R
CLOCKS
EI_NB_SYNC
HT_CLK66M_SB
AGP_CLK66M_NB
CLOCKS
CPU_HTBEN_R
CLOCKS
EI_CPU_SYNC_R
CLOCKS
SATA_CLK25M_R
CLOCKS
SLEWING_L_R
CLOCKS
HT_CLK66M_SB_R
CLOCKS
AGP_CLK66M_NB_R
CPU_HTBEN
CLOCKS CLOCKS
CLOCKS
PLS_EXTCLK
CLOCKS
PLS_XTAL
VSP_NB_CLK VSP_NB_CLK
CLOCKS
VSP_NB_CLK_P
CLOCKS
CLOCKS
AGP_CLK66M_GPU
AGP_GPU_CLK
CLOCKS
EI_CPU_CLK_P
CLOCKS
EI_CPU_CLKEI_CPU_CLK
CLOCKS
EI_CPU_CLK_N
CLOCKS
EI_CPU_CLKEI_CPU_CLK
CLOCKS
CLOCKS
EI_CPU1_CLK_P
EI_CPU1_CLK EI_CPU1_CLK
CLOCKS
EI_NB_CLK_N
EI_NB_CLK
CLOCKS
EI_NB_CLK
CLOCKS
EI_CPU_SYNC
EI_SYNC
CLOCKSCLOCKS
EI_NB_SYNC
CLOCKSCLOCKS
CLOCKS
EI_CPU1_SYNC
EI_CPU1_SYNC
CLOCKS
EI_CPU_CLK_N
EI_CPU_CLK_P_C
CLOCKS
SB_CLK25M_ATA
AGP_CLK66M_GPU_R
CLOCKS
PLS_X_OUT_B
PLS_X_IN_B
PLS_FORCE_P0_L_R
PLS_X_IN
CLOCKS
HT_SB_CLK
HT_CLK66M_SB
CLOCKS
AGP_CLK66M_GPU
EI_NB_CLK_N
PCI_CLK_P3
PCI_CLK_P1
TP_PLS_CLK_66M_1
EI_NB_CLK_P
PCI_CLK33M_SB_EXT
CLOCKS
CLOCKS_PCI
CLOCKS
CLOCKS_PCI
CLOCKS
PCI_CLK66M_SB_INT
CLOCKS
CLOCKS
VSP_NB_CLK_N
VSP_NB_CLKVSP_NB_CLK
CLOCKS
RAM_CLK66M_NB
PCI_CLK66M_SB_INT
CLOCKS
PCI_CLK_GP0_R
CLOCKS
EI_CPU1_CLK_P_R
CLOCKS
EI_CPU1_CLK_N_R
CLOCKS
PCI_CLK_GP1_R
CLOCKS
EI_CPU1_SYNC_R
HT_CLK66M_NB
CPU1_HTBEN_R
CLOCKS
VSP_NB_CLK_N
PCI_CLK_GP1
PLS_RESET_L
I2C_CLOCK_SDA
PLS_X_ADDRSEL
I2C_CLOCK_SCL
SYS_SLEWING_L
PLS_PRES_CML
PLS_REF33
PLS_REF15
PLS_SCAN_MODE
CLOCK_ERROR_L
TP_PLS_REF_CML
TP_PLS_TEST1
TP_PLS_TEST2
PLS_INTERM
CLOCK_RESET_L
PP3V3_PWRON
PCI_CLK_GP0
VSP_NB_CLK_N_C
CLOCKS
CLOCKS
AGP_CLK66M_NB
AGP_NB_CLK
CLOCKS
EI_NB_CLK_P
EI_NB_CLK
CLOCKS
EI_NB_CLK
CLOCKS
CLOCKS
RAM_CLK66M_NB_R
EI_NB_CLK_P_C
CLOCKS
PCI_CLK_P4
CLOCKS
PLS_CLK_66M_0_R
SYS_OVERTEMP_L
PLS_EXTCLK
CLOCKS
EI_CPU1_CLK_N
EI_CPU1_CLK EI_CPU1_CLK
CLOCKS
=PULSAR_POWER_DOWN
PULSAR_POWER_DOWN_R
PLS_X_OUT
TP_PLS_TEST3
PLS_REF25
58
30
30
33
18
25
27
29
29
29
60
28
62
48
29
27
49
29
29
14
28
29
28
14
29
62
49
28
28
74
74
27
74
14
60
14
27
25
11
48
28
16
14
24
27
6
27
27
6
6
6
6
6
6
6
27
6
27
27
27
6
6
6
6
6
27
27
24
27
27
27
6
27
27
27
6
27
25
6
27
27
27
8
8
6
27
8
27
24
37
27
14
14
6
27
6
24
8
18
18
13
8
6
6
6
13
6
8
27
27
6
8
6
13
27
6
3
6
Preliminary
Page 25
API_APCLKP
API_APCLKN
API0_SRIP1
API0_SRIN0
API0_SROP1
API0_SRON0
API0_BCLKIN
API0_BCLKIP
INTERFACE
APPLE PI
API_APCLK_AVSS
(SYM 1 OF 7)
API0_ADO35
API0_ADO36
API0_ADO37
API0_ADO38
API0_ADO39
API0_ADO40
API0_ADO41
API0_ADO43
API0_ADO42
API0_SROP0
API0_SRON1
API_QREQ0
API_CSTP
API0_ADO34
API0_ADO0
API0_ADO1
API0_ADO2
API0_ADO3
API0_ADO4
API0_ADO5
API0_ADO8
API0_ADO7
API0_ADO6
API0_ADO10
API0_ADO9
API0_ADO12
API0_ADO11
API0_ADO13
API0_BCLKON
API0_BCLKOP
API0_ADO14
API0_ADO15
API0_ADO18
API0_ADO17
API0_ADO16
API0_ADO19
API0_ADO20
API0_ADO21
API0_ADO22
API0_ADO23
API0_ADO24
API0_ADO25
API0_ADO26
API0_ADO28
API0_ADO27
API0_ADO29
API0_ADO30
API0_ADO31
API0_ADO33
API0_ADO32
VDD_API
APCLK_AVDD
API
API0_ADI3
API0_ADI2
API0_ADI1
API0_ADI0
API0_ADI5
API0_ADI4
API0_ADI13
API0_ADI12
API0_ADI11
API0_ADI10
API0_ADI9
API0_ADI8
API0_ADI7
API0_ADI6
API0_ADI15
API0_ADI14
API0_ADI17
API0_ADI18
API0_ADI19
API0_ADI20
API0_ADI21
API0_ADI22
API0_ADI23
API0_ADI16
API0_ADI24
API0_ADI33
API0_ADI32
API0_ADI31
API0_ADI25
API0_ADI26
API0_ADI30
API0_ADI29
API0_ADI28
API0_ADI27
API0_ADI34
API0_SE
API0_APSYNC
API0_ADI42
API0_ADI43
API0_ADI37
API0_ADI38
API0_ADI39
API0_ADI40
API0_ADI41
API0_SRIP0
API0_SRIN1
API_QACK0
API0_ADI36
API0_ADI35
VCC
GND
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
QREQ_L HACK
QREQ TO SMU
ELECTRICAL_CONSTRAINT_SET
NET_PHYSICAL_TYPE
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
EI_NB_CLK_P
EI_NB_CLK_N
TI
PLACE QREQ CIRCUITS BETWEEN CPU AND U3LITE
NEAR U3LITE
PLACE R2805 AND R2806
OMIT
HOLE-VIA-20R10
1
ZT2800
OMIT
HOLE-VIA-20R10
1
ZT2801
OMIT
HOLE-VIA-20R10
1
ZT2802
HOLE-VIA-20R10
OMIT
1
ZT2803
OMIT
HOLE-VIA-20R10
1
ZT2804
402
0.1UF
20%
10V
CERM
2
1
C2813
OMIT
HOLE-VIA-20R10
1
ZT2805
OMIT
HOLE-VIA-20R10
1
ZT2806
OMIT
HOLE-VIA-20R10
1
ZT2807
HOLE-VIA-20R10
OMIT
1
ZT2808
OMIT
HOLE-VIA-20R10
1
ZT2809
CERM
10V
20%
0.1UF
402
2
1
C2812
OMIT
HOLE-VIA-20R10
1
ZT2810
OMIT
HOLE-VIA-20R10
1
ZT2811
OMIT
HOLE-VIA-20R10
1
ZT2812
OMIT
HOLE-VIA-20R10
1
ZT2813
OMIT
HOLE-VIA-20R10
1
ZT2814
402
0.1UF
20%
10V
CERM
2
1
C2811
OMIT
HOLE-VIA-20R10
1
ZT2815
OMIT
HOLE-VIA-20R10
1
ZT2816
OMIT
HOLE-VIA-20R10
1
ZT2817
HOLE-VIA-20R10
OMIT
1
ZT2818
OMIT
HOLE-VIA-20R10
1
ZT2819
CERM
10V
20%
0.1UF
402
2
1
C2810
OMIT
HOLE-VIA-20R10
1
ZT2820
OMIT
HOLE-VIA-20R10
1
ZT2821
OMIT
HOLE-VIA-20R10
1
ZT2822
HOLE-VIA-20R10
OMIT
1
ZT2823
OMIT
HOLE-VIA-20R10
1
ZT2824
402
0.1UF
20%
10V
CERM
2
1
C2809
OMIT
HOLE-VIA-20R10
1
ZT2825
HOLE-VIA-20R10
OMIT
1
ZT2826
HOLE-VIA-20R10
OMIT
1
ZT2827
HOLE-VIA-20R10
OMIT
1
ZT2828
HOLE-VIA-20R10
OMIT
1
ZT2829
10V
20%
402
0.1UF
CERM
2
1
C2808
HOLE-VIA-20R10
OMIT
1
ZT2830
HOLE-VIA-20R10
OMIT
1
ZT2831
HOLE-VIA-20R10
OMIT
1
ZT2832
HOLE-VIA-20R10
OMIT
1
ZT2833
HOLE-VIA-20R10
OMIT
1
ZT2834
402
0.1UF
20%
10V
CERM
2
1
C2807
HOLE-VIA-20R10
OMIT
1
ZT2835
HOLE-VIA-20R10
OMIT
1
ZT2836
HOLE-VIA-20R10
OMIT
1
ZT2837
HOLE-VIA-20R10
OMIT
1
ZT2838
HOLE-VIA-20R10
OMIT
1
ZT2839
CERM
10V
20%
0.1UF
402
2
1
C2806
HOLE-VIA-20R10
OMIT
1
ZT2840
HOLE-VIA-20R10
OMIT
1
ZT2841
HOLE-VIA-20R10
OMIT
1
ZT2842
HOLE-VIA-20R10
OMIT
1
ZT2843
HOLE-VIA-20R10
OMIT
1
ZT2844
402
0.1UF
20%
10V
CERM
2
1
C2805
HOLE-VIA-20R10
OMIT
1
ZT2845
NOSTUFF
402
0
21
R2805
CERM
10V
20%
0.1UF
402
2
1
C2804
U3LITE
PBGA
OMIT
V1.0-300MM
D13
D4
F10
F7
G2
H16
H13
J13
B19
B10
B7
D16
K8
K4
E14D14
F14
G20
F21
D18
C18
B5
A3
B6
A4
E17
D17
B18
A19
H17
D6
E6
F15
E15
E8
H2
G1
H4
J4
F2
B8
A7
B3
A2
E1
C8
A6
C1
B1
D1
B2
C6
C5
C3
C2
K1
A5
D8
E4
D5
E5
F6
J8
F3
J7
H6
J1
F5
E2
F4
E3
J6
J5
J3
H3
H5
F1
H1
J2
C9
D9
G14
H14
H12
C17
B17
A18
A17
G12
E18
F18
H18
G18
G17
F17
G15
H15
C15
B15
H11
A15
A16
C14
B14
A14
A13
E12
D12
C12
B12
G11
A12
A11
B11
C11
B9
A8
A9
A10
E11
D11
F12
F11
U3
NOSTUFF
121
1%
MF-LF
1/16W
402
2
1
R2803
1%
121
1/16W
MF-LF
NOSTUFF
402
2
1
R2804
0.001UF
402
50V
NOSTUFF
10%
CERM
2
1
C2821
402
20%
10V
CERM
0.1UF
2
1
C2803
I212
I213
I214
I215
I216
I217
I218
I219
CERM
10V
20%
0.1UF
402
2
1
C2802
I220
I221
I222
I223
I224
I225
NOSTUFF
10K
5%
1/16W
MF-LF
402
2
1
R2898
2N3904LF
NOSTUFF
SOT23
2
3
1
Q2899
NOSTUFF
180
5%
1/16W
MF-LF
402
21
R2899
402
0.1UF
20%
10V
CERM
2
1
C2801
402
0.1UF
20%
10V
CERM
2
1
C2850
MF-LF
1/16W
5%
0
NOSTUFF
402
21
R2850
402
10K
MF-LF
1/16W
5%
2
1
R2851
CRITICAL
SOT23-5
74LVC1G66DBVG4
2
1
5
3
4
U2850
5%10402
1/16W
MF-LF
21
R2806
10V
20%
402
CERM
0.1UF
2
1
C2800
CERM
10V
20%
0.1UF
402
2
1
C2814
402
0.1UF
20%
10V
CERM
2
1
C2815
402
0.1UF
20%
10V
CERM
2
1
C2816
402
0.1UF
20%
10V
CERM
2
1
C2817
100
1%
1/16W
MF-LF
402
NOSTUFF
2
1
R2801
402
NOSTUFF
0.1UF
20%
CERM
10V
2
1
C2820
NOSTUFF
100
1%
1/16W
MF-LF
402
2
1
R2802
0.1UF
20%
CERM
402
10V
2
1
C2819
CERM
6.3V
10%
1UF
402
2
1
C2818
2.2
1/10W
5%
MF-LF
603
21
R2800
OMIT
HOLE-VIA-20R10
1
ZT2846
HOLE-VIA-20R10
OMIT
1
ZT2847
HOLE-VIA-20R10
OMIT
1
ZT2848
HOLE-VIA-20R10
OMIT
1
ZT2849
HOLE-VIA-20R10
OMIT
1
ZT2850
HOLE-VIA-20R10
OMIT
1
ZT2851
HOLE-VIA-20R10
OMIT
1
ZT2852
HOLE-VIA-20R10
OMIT
1
ZT2853
HOLE-VIA-20R10
OMIT
1
ZT2854
OMIT
HOLE-VIA-20R10
1
ZT2855
OMIT
HOLE-VIA-20R10
1
ZT2856
OMIT
HOLE-VIA-20R10
1
ZT2857
HOLE-VIA-20R10
OMIT
1
ZT2858
OMIT
HOLE-VIA-20R10
1
ZT2859
OMIT
HOLE-VIA-20R10
1
ZT2860
OMIT
HOLE-VIA-20R10
1
ZT2861
OMIT
HOLE-VIA-20R10
1
ZT2862
OMIT
HOLE-VIA-20R10
1
ZT2863
OMIT
HOLE-VIA-20R10
1
ZT2864
OMIT
HOLE-VIA-20R10
1
ZT2865
OMIT
HOLE-VIA-20R10
1
ZT2866
OMIT
HOLE-VIA-20R10
1
ZT2867
HOLE-VIA-20R10
OMIT
1
ZT2868
OMIT
HOLE-VIA-20R10
1
ZT2869
PERICOM ANALOG SWITCH
U2850
353S0920 CRITICAL353S0867
102
28
11
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
U3LITE APPLE PI
EI_SYNC_FROM_NB
EI_SE
EI_NB_SYNC
EI_NB_TO_CPU_SR_P<1>
EI_NB_TO_CPU_SR_N<0>
EI_NB_CLK_N
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
EI_APCLK_VREF
VOLTAGE=0.6V
EI_NB_CLK_P
EI_SREI_SR
EI_NB_TO_CPU_SR_N<1>
EI_NB_TO_CPU_SR1EI_NB_TO_CPU_CAD
EI_SR EI_SR
EI_CPU_TO_NB_SR_P<0>
EI_CPU_TO_NB_SR0EI_CPU_TO_NB_CAD
EI_SREI_SR
EI_NB_TO_CPU_SR_P<0>
EI_NB_TO_CPU_SR0EI_NB_TO_CPU_CAD
EI_SREI_SR
EI_NB_TO_CPU_SR_P<1>
EI_NB_TO_CPU_SR1EI_NB_TO_CPU_CAD
EI_SREI_SR
EI_CPU_TO_NB_SR_N<0>
EI_CPU_TO_NB_SR0EI_CPU_TO_NB_CAD
EI_SREI_SR
EI_NB_TO_CPU_SR_N<0>
EI_NB_TO_CPU_SR0EI_NB_TO_CPU_CAD
=PP1V2_EI_NB
EI_CPU_TO_NB_AD<12>
EI_CPU_TO_NB_AD<16>
EI_CPU_TO_NB_AD<20>
EI_CPU_TO_NB_AD<23>
EI_NB_TO_CPU_CLK_P
EI_CPU_TO_NB_AD<24>
EI_NB_QREQ_L
SMU_SUSPENDREQ_L
=PP3V3_PWRON_EI
SMU_QREQ
=PP3V3_PWRON_EI
EI_NB_TO_CPU_SR_P<0>
=PP1V5_PWRON_NB_AVDD
=PP1V2_EI_NB
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
PP1V5_PWRON_EI_NB_AVDD
VOLTAGE=1.5V
EI_NB_TO_CPU_AD<0>
EI_NB_TO_CPU_AD<2>
EI_NB_TO_CPU_AD<1>
EI_NB_TO_CPU_AD<4>
EI_NB_TO_CPU_AD<8>
EI_NB_TO_CPU_AD<9>
EI_NB_TO_CPU_AD<10>
EI_NB_TO_CPU_AD<11>
EI_NB_TO_CPU_AD<12>
EI_NB_TO_CPU_AD<14>
EI_NB_TO_CPU_AD<15>
EI_NB_TO_CPU_AD<13>
EI_NB_TO_CPU_AD<17>
EI_NB_TO_CPU_AD<16>
EI_NB_TO_CPU_AD<18>
EI_NB_TO_CPU_AD<20>
EI_NB_TO_CPU_AD<19>
EI_NB_TO_CPU_AD<22>
EI_NB_TO_CPU_AD<21>
EI_NB_TO_CPU_AD<23>
EI_NB_TO_CPU_AD<25>
EI_NB_TO_CPU_AD<28>
EI_NB_TO_CPU_AD<27>
EI_NB_TO_CPU_AD<26>
EI_NB_TO_CPU_AD<29>
EI_NB_TO_CPU_AD<30>
EI_NB_TO_CPU_AD<32>
EI_NB_TO_CPU_AD<33>
EI_NB_TO_CPU_AD<31>
EI_NB_TO_CPU_AD<35>
EI_NB_TO_CPU_AD<34>
EI_NB_TO_CPU_AD<38>
EI_NB_TO_CPU_AD<37>
EI_NB_TO_CPU_AD<39>
EI_NB_TO_CPU_AD<40>
EI_NB_TO_CPU_AD<41>
EI_NB_TO_CPU_AD<42>
EI_NB_TO_CPU_AD<43>
EI_NB_TO_CPU_SR_N<1>
EI_CPU_TO_NB_CLK_P
EI_CPU_TO_NB_CLK_N
EI_CPU_TO_NB_AD<8>
EI_CPU_TO_NB_AD<10>
EI_CPU_TO_NB_AD<9>
EI_CPU_TO_NB_AD<13>
EI_CPU_TO_NB_AD<11>
EI_CPU_TO_NB_AD<14>
EI_CPU_TO_NB_AD<15>
EI_CPU_TO_NB_AD<17>
EI_CPU_TO_NB_AD<18>
EI_CPU_TO_NB_AD<21>
EI_CPU_TO_NB_AD<19>
EI_CPU_TO_NB_AD<22>
EI_CPU_TO_NB_AD<26>
EI_CPU_TO_NB_AD<32>
EI_CPU_TO_NB_AD<33>
EI_CPU_TO_NB_AD<34>
EI_CPU_TO_NB_AD<35>
EI_CPU_TO_NB_SR_N<1>
EI_NB_TO_CPU_CLK_N
EI_CPU_TO_NB_SR_P<1>
EI_CPU_TO_NB_SR_N<0>
EI_NB_TO_CPU_AD<7>
EI_NB_TO_CPU_AD<3>
EI_CPU_TO_NB_AD<25>
EI_CPU_TO_NB_AD<7>
EI_NB_QREQ_L_R
EI_NB_TO_CPU_AD<5>
EI_NB_TO_CPU_AD<24>
EI_NB_TO_CPU_AD<6>
EI_NB_TO_CPU_AD<36>
=PP1V2_EI_NB
EI_CPU_TO_NB_AD<0..43>
EI_CPU_TO_NB_AD
EI_CPU_TO_NB_CAD
EI_CAD
EI_NB_TO_CPU_CAD
EI_NB_TO_CPU_AD<0..43>
EI_NB_TO_CPU_AD
EI_CAD
EI_CPU_TO_NB_CLK_P
EI_CPU_TO_NB_CLKEI_CPU_TO_NB_CLKEI_CPU_TO_NB_CLK
EI_CLK
EI_CPU_TO_NB_CLK_N
EI_CPU_TO_NB_CLKEI_CPU_TO_NB_CLKEI_CPU_TO_NB_CLK
EI_CLK
EI_NB_TO_CPU_CLK
EI_NB_TO_CPU_CLK_N
EI_NB_TO_CPU_CLKEI_NB_TO_CPU_CLK
EI_CLK
EI_NB_TO_CPU_CLKEI_NB_TO_CPU_CLK EI_NB_TO_CPU_CLK
EI_NB_TO_CPU_CLK_P
EI_CLK
EI_CPU_TO_NB_AD<40>
EI_CPU_TO_NB_AD<41>
EI_CPU_TO_NB_AD<43>
EI_CPU_TO_NB_SR_P<0>
EI_QACK_L
EI_CPU_TO_NB_AD<30>
EI_CPU_TO_NB_AD<31>
EI_CPU_TO_NB_AD<36>
EI_CPU_TO_NB_AD<37>
EI_CPU_TO_NB_AD<38>
EI_CPU_TO_NB_AD<39>
CPU_CHKSTOP_L
EI_CPU_TO_NB_AD<42>
EI_QREQ_L
NB_APSYNC
EI_CPU_TO_NB_AD<6>
EI_CPU_TO_NB_AD<5>
EI_CPU_TO_NB_AD<4>
EI_CPU_TO_NB_AD<3>
EI_CPU_TO_NB_AD<2>
EI_SREI_SR
EI_CPU_TO_NB_SR_N<1>
EI_CPU_TO_NB_SR1EI_CPU_TO_NB_CAD
EI_SREI_SR
EI_CPU_TO_NB_SR_P<1>
EI_CPU_TO_NB_SR1EI_CPU_TO_NB_CAD
EI_CPU_TO_NB_AD<29>
EI_CPU_TO_NB_AD<28>
EI_CPU_TO_NB_AD<27>
EI_CPU_TO_NB_AD<1>
EI_CPU_TO_NB_AD<0>
30
29
29
29
29
29
29
29
29 28
29
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60
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6 7
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13
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29
6
6
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6
6
6
6
6
6
6
6
6
6
6
Preliminary
Page 26
(1 OF 3)
PLLTESTOUT
PLLRANGE1
SPARE
PLLTEST
PLLRANGE0
JTAGMODE
GPUL_DBG
EI_DISABLE
ATTENTION
TMS
TRST*
TCK
TDO
TDI
PLLMULT
BYPASS*
PLLLOCK
BUSCFG0
BUSCFG1
BUSCFG2
EI_SRO1*
EI_SRO0*
CKTERMDIS
APSYNCIN
IIC_SDA
IIC_SCL
I2CGO
INT*
EI_SRO1
EI_SRO0
QREQ*
EI_ADO33
EI_ADO34
EI_ADO39
EI_ADO40
EI_ADO41
EI_ADO42
EI_ADO35
EI_ADO36
EI_ADO37
EI_ADO38
EI_ADO43
EI_ADO32
EI_ADO26
EI_ADO27
EI_ADO31
EI_ADO30
EI_ADO29
EI_ADO28
EI_ADO25
SYSCLK
EI_ADO24
EI_ADO22
EI_ADO23
EI_ADO21
EI_ADO20
EI_ADO19
EI_ADO18
EI_ADO16
EI_ADO17
EI_ADO15
EI_ADO14
EI_ADO13
EI_ADO12
EI_ADO10
EI_ADO11
EI_ADO9
EI_ADO8
EI_ADO7
EI_ADO4
EI_ADO6
EI_ADO5
EI_CLKO*
EI_ADO3
EI_ADO2
EI_ADO1
EI_ADO0
EI_CLKO
PSRO1
PSRO2
RI*
SYNCENABLE*
RAMSTOPENABLE
PULSESEL2
PULSESEL1
PULSESEL0
MCP*
DI2*
AFN
BIMODE*
LSSDSTOPENABLE
LSSDSTOPC2STARENABLE
LSSDSTOPC2ENABLE
LSSDSCANENABLE
LSSDMODE
C2UNDGLOBAL
C1UNDGLOBAL
AVPRESET*
PROCID1
PROCID2
TRIGGER_IN
TRIGGER_OUT
PROCID0
TBEN
QACK*
SRESET*
HRESET*
THERM_INT*
APSYNCOUT
EI_SRI0
EI_SRI1
CHKSTOP*
EI_SRI1*
EI_SRI0*
EI_ADI43
EI_ADI33
EI_ADI36
EI_ADI37
EI_ADI34
EI_ADI40
EI_ADI41
EI_ADI39
EI_ADI35
EI_ADI38
EI_ADI42
EI_ADI32
EI_ADI27
EI_ADI26
EI_ADI25
EI_ADI30
EI_ADI31
EI_ADI29
EI_ADI28
EI_ADI24
EI_ADI23
EI_ADI22
EI_ADI13
EI_ADI14
EI_ADI15
EI_ADI17
EI_ADI16
EI_ADI19
EI_ADI20
EI_ADI18
EI_ADI21
EI_ADI12
EI_ADI5
EI_ADI6
EI_ADI7
EI_ADI9
EI_ADI4
EI_ADI8
EI_ADI10
EI_ADI11
EI_ADI3
EI_ADI2
EI_ADI0
EI_CLKI
EI_ADI1
EI_CLKI*
SYSCLK*
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PLACE AT PROCESSOR PINS.
PLACE NEAR PROCESSOR.
MATCH TO SYSCLK
80,84
PLACE BY PROCESSOR PIN.
MORE PROCESSOR DECOUPLING
ON PAGES 31 & 32
PROCESSOR IIC ADDRESS:
PROCESSOR LOGIC I/O
402
CERM
6.3V
10%
1UF
2
1
C2900
1UF
10%
6.3V
CERM
402
2
1
C2902
1UF
10%
6.3V
CERM
402
2
1
C2903
1UF
10%
6.3V
CERM
402
2
1
C2904
1UF
10%
6.3V
CERM
402
2
1
C2905
1UF
10%
CERM
402
6.3V
2
1
C2906
1UF
10%
6.3V
CERM
402
2
1
C2907
1UF
6.3V
402
CERM
10%
2
1
C2908
402
1UF
10%
6.3V
CERM
2
1
C2909
CERM
1UF
10%
6.3V
402
2
1
C2910
1UF
10%
6.3V
CERM
402
2
1
C2911
NOSTUFF
100
1%
1/16W
MF-LF
402
2
1
R2909
402
6.3V
X5R
NOSTUFF
0.22UF
20%
2
1
C2901
NOSTUFF
MF-LF
1/16W
1%
100
402
2
1
R2907
NOSTUFF
5%
1/16W
0
MF-LF
402
21
R2910
CBGA
OMIT
CRITICAL
1.8GHZ-76C
NEO-10S-REV2
W20
N19
N21
AD22
V22
AD13
AB21
AD21
AD17
T22
R22
AB24
AB4
AA13
AA5
AB6
AB12
V21
AC10
AB11
AC9
V5
V23
M18
M19
L19
T19
W22
AA9
AB7
AA8
T20
AD18
AD11
AD7
AD8
U19
AB5
W4
AB19
Y21
AA20
N22
V20
AA22
F1
G1
L2
L3
L22
L21
K24
L24
P20
E3
D3
D24
E24
G4
H1
H3
K2
K4
A6
A8
C10
A10
M3
C9
A9
A4
C6
C8
A7
C7
C4
B4
B6
L1
A12
C12
D8
D2
A2
A5
D6
B2
C5
C1
K3
C11
B10
A11
E12
D11
B8
G3
E2
F4
F2
H2
N3
G20
J24
H23
K22
A13
A19
C16
A17
A15
C13
A18
A20
A23
A21
C18
C19
A22
D20
B21
D18
J22
C17
C14
B19
B17
F21
B24
B23
E21
E20
C22
H22
A16
D15
C15
A14
B15
G19
G24
D22
G21
F23
J21
H21
U24
AA14
R20
AC15
AC16
V24
AB16
AC19
AA19
AC24
W23
AD12
AD14 AA10
AA12
U2900
1/16W
402
MF-LF
1%
46.4
NOSTUFF
21
R2901
1%
MF-LF
402
NOSTUFF
46.4
1/16W
21
R2903
MF-LF
402
1%
49.9
1/16W
NOSTUFF
21
R2905
MF-LF
402
1/16W
0
5%
21
R2902
0
MF-LF
402
5%
1/16W
NOSTUFF
21
R2904
5%
MF-LF
1K
1/16W
402
2
1
R2906
MF-LF
1K
5%
1/16W
402
2
1
R2908
5%
1/16W
0
MF-LF
402
21
R2911
6.3V
10%
1UF
CERM
402
2
1
C2912
402
CERM
6.3V
10%
1UF
2
1
C2913
402
CERM
6.3V
10%
1UF
2
1
C2914
402
CERM
6.3V
10%
1UF
2
1
C2915
402
CERM
6.3V
10%
1UF
2
1
C2916
402
CERM
6.3V
10%
1UF
2
1
C2917
402
CERM
6.3V
10%
1UF
2
1
C2918
402
CERM
6.3V
10%
1UF
2
1
C2919
402
CERM
6.3V
10%
1UF
2
1
C2920
402
CERM
6.3V
10%
1UF
2
1
C2921
402
CERM
6.3V
10%
1UF
2
1
C2922
402
CERM
6.3V
10%
1UF
2
1
C2923
402
CERM
6.3V
10%
1UF
2
1
C2924
402
CERM
6.3V
10%
1UF
2
1
C2925
402
CERM
6.3V
10%
1UF
2
1
C2926
402
CERM
6.3V
10%
1UF
2
1
C2927
402
CERM
6.3V
10%
1UF
2
1
C2928
402
CERM
6.3V
10%
1UF
2
1
C2929
402
CERM
6.3V
10%
1UF
2
1
C2930
402
CERM
6.3V
10%
1UF
2
1
C2931
402
CERM
6.3V
10%
1UF
2
1
C2932
402
CERM
6.3V
10%
1UF
2
1
C2933
402
CERM
6.3V
10%
1UF
2
1
C2934
402
CERM
6.3V
10%
1UF
2
1
C2935
402
CERM
6.3V
10%
1UF
2
1
C2936
402
CERM
6.3V
10%
1UF
2
1
C2937
402
CERM
6.3V
10%
1UF
2
1
C2938
402
CERM
6.3V
10%
1UF
2
1
C2939
402
CERM
6.3V
10%
1UF
2
1
C2940
402
CERM
6.3V
10%
1UF
2
1
C2941
402
CERM
6.3V
10%
1UF
2
1
C2942
402
CERM
6.3V
10%
1UF
2
1
C2943
402
CERM
6.3V
10%
1UF
2
1
C2944
402
CERM
6.3V
10%
1UF
2
1
C2945
402
CERM
6.3V
10%
1UF
2
1
C2946
402
CERM
6.3V
10%
1UF
2
1
C2947
402
CERM
6.3V
10%
1UF
2
1
C2948
402
CERM
6.3V
10%
1UF
2
1
C2949
402
CERM
6.3V
1UF
10%
2
1
C2950
402
CERM
6.3V
10%
1UF
2
1
C2951
402
1UF
10%
6.3V
CERM
2
1
C2952
402
CERM
6.3V
10%
1UF
2
1
C2953
402
CERM
6.3V
10%
1UF
2
1
C2954
402
CERM
6.3V
10%
1UF
2
1
C2955
402
CERM
6.3V
10%
1UF
2
1
C2956
402
CERM
6.3V
10%
1UF
2
1
C2957
10%
CERM
402
6.3V
1UF
2
1
C2958
CERM
6.3V
10%
1UF
402
2
1
C2959
402
6.3V
10%
1UF
CERM
2
1
C2960
102
29
051-6772 11
SYNC_MASTER=N/A
SYNC_DATE=N/A
NEO APPLE PI
EI_CPU_SYNC
EI_CPU_TO_NB_AD<32>
EI_SYNC_FROM_NB
SYSCLK_TERM
VOLTAGE=0.6V
MCP_L
CHKSTOP_L
CPU_CHKSTOP_L
=PP1V2_EI_CPU
CPU_HTBEN
=PP1V2_EI_CPU
CPU_SPARE
PLLRANGE0
PLLRANGE1
PLLTEST
PLLTESTOUT
JTAG_CPU_TRST_L
PLLMULT
PLLLOCK
CPU_BYPASS_L
JTAG_CPU_TDI
JTAG_CPU_TMS
JTAG_CPU_TDO
JTAG_CPU_TCK
GPUL_DBG
JTAGMODE_SPARE2
TP_ATTENTION
BUSCFG2
BUSCFG0
BUSCFG1
EI_DISABLE
I2CGO
CKTERMDIS_L
I2C_CPU_A_SDA
I2C_CPU_A_SCL
CPU_APSYNC
EI_QREQ_L
CPU_INT_L
EI_CPU_TO_NB_SR_N<1>
EI_CPU_TO_NB_SR_P<1>
EI_CPU_TO_NB_SR_N<0>
EI_CPU_TO_NB_SR_P<0>
EI_CPU_TO_NB_AD<41>
EI_CPU_TO_NB_AD<40>
EI_CPU_TO_NB_AD<43>
EI_CPU_TO_NB_AD<42>
EI_CPU_TO_NB_AD<39>
EI_CPU_TO_NB_AD<34>
EI_CPU_TO_NB_AD<35>
EI_CPU_TO_NB_AD<38>
EI_CPU_TO_NB_AD<37>
EI_CPU_TO_NB_AD<36>
EI_CPU_TO_NB_AD<30>
EI_CPU_TO_NB_AD<33>
EI_CPU_TO_NB_AD<31>
EI_CPU_TO_NB_AD<29>
EI_CPU_TO_NB_AD<25>
EI_CPU_TO_NB_AD<27>
EI_CPU_TO_NB_AD<28>
EI_CPU_TO_NB_AD<26>
EI_CPU_CLK_P
EI_CPU_TO_NB_AD<24>
EI_CPU_TO_NB_AD<21>
EI_CPU_TO_NB_AD<23>
EI_CPU_TO_NB_AD<22>
EI_CPU_TO_NB_AD<20>
EI_CPU_TO_NB_AD<19>
EI_CPU_TO_NB_AD<14>
EI_CPU_TO_NB_AD<18>
EI_CPU_TO_NB_AD<17>
EI_CPU_TO_NB_AD<16>
EI_CPU_TO_NB_AD<15>
EI_CPU_TO_NB_AD<10>
EI_CPU_TO_NB_AD<11>
EI_CPU_TO_NB_AD<12>
EI_CPU_TO_NB_AD<13>
EI_CPU_TO_NB_AD<9>
EI_CPU_TO_NB_AD<8>
EI_CPU_TO_NB_AD<5>
EI_CPU_TO_NB_AD<7>
EI_CPU_TO_NB_AD<4>
EI_CPU_TO_NB_AD<6>
EI_CPU_TO_NB_AD<3>
EI_CPU_TO_NB_AD<1>
EI_CPU_TO_NB_CLK_P
RI_L
RAMSTOPENABLE
SYNCENABLE
PULSESEL2
PULSESEL0
TP_PSRO2
TP_PSRO1
PULSESEL1
LSSDSTOPC2STARENABLE
LSSDSTOPC2ENABLE
MCP_L
LSSDSTOPENABLE
LSSDSCANENABLE
C1UNDGLOBAL
DI2_L
C2UNDGLOBAL
LSSDMODE
BIMODE_L
AVPRESET_L
TP_AFN
TP_PROC_TRIGGER_OUT
EI_SE
PROCID1
PROCID0
PROCID2
CPU_SRESET_L
PROC_THERM_INT_L
TP_PSYNCOUT
CPU_HTBEN
CHKSTOP_L
EI_QACK_L
EI_NB_TO_CPU_SR_P<0>
EI_NB_TO_CPU_SR_P<1>
EI_NB_TO_CPU_AD<43>
EI_NB_TO_CPU_AD<42>
EI_NB_TO_CPU_AD<41>
EI_NB_TO_CPU_AD<40>
EI_NB_TO_CPU_AD<39>
EI_NB_TO_CPU_AD<34>
EI_NB_TO_CPU_AD<35>
EI_NB_TO_CPU_AD<36>
EI_NB_TO_CPU_AD<37>
EI_NB_TO_CPU_AD<38>
EI_NB_TO_CPU_AD<33>
EI_NB_TO_CPU_AD<31>
EI_NB_TO_CPU_AD<30>
EI_NB_TO_CPU_AD<29>
EI_NB_TO_CPU_AD<24>
EI_NB_TO_CPU_AD<25>
EI_NB_TO_CPU_AD<26>
EI_NB_TO_CPU_AD<28>
EI_NB_TO_CPU_AD<27>
EI_NB_TO_CPU_AD<22>
EI_NB_TO_CPU_AD<23>
EI_NB_TO_CPU_AD<21>
EI_NB_TO_CPU_AD<20>
EI_NB_TO_CPU_AD<19>
EI_NB_TO_CPU_AD<14>
EI_NB_TO_CPU_AD<16>
EI_NB_TO_CPU_AD<17>
EI_NB_TO_CPU_AD<18>
EI_NB_TO_CPU_AD<13>
EI_NB_TO_CPU_AD<12>
EI_NB_TO_CPU_AD<11>
EI_NB_TO_CPU_AD<10>
EI_NB_TO_CPU_AD<9>
EI_NB_TO_CPU_AD<8>
EI_NB_TO_CPU_AD<4>
EI_NB_TO_CPU_AD<5>
EI_NB_TO_CPU_AD<6>
EI_NB_TO_CPU_AD<7>
EI_NB_TO_CPU_AD<1>
EI_NB_TO_CPU_AD<2>
EI_NB_TO_CPU_AD<0>
EI_NB_TO_CPU_CLK_N
EI_NB_TO_CPU_CLK_P
EI_CPU_CLK_N
CPU_HRESET_L
EI_NB_TO_CPU_AD<3>
EI_CPU_TO_NB_AD<2>
EI_CPU_TO_NB_AD<0>
EI_NB_TO_CPU_AD<15>
EI_NB_TO_CPU_SR_N<0>
EI_NB_TO_CPU_SR_N<1>
=PPVCORE_CPU
EI_CPU_TO_NB_CLK_N
EI_NB_TO_CPU_AD<32>
31
31
30
30
29
29
29
30
30
30
29
36
28
29
14
18
30
18
28
25
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
30
30
29
28
30
14
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
28
30
28
28
28
28
28
28
32
28
28 14
14
8
14
29
14
30
30
30
30
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
30
29
8
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
31
14
14
27
6
28
6
6
28
7
27
7
30
30
30
30
30
30
30
8
30
18
18
18
18
30
30
6
30
30
30
30
30
30
18
18
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
27
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
30
6
30
30
6
30
30
30
6
30
30
30
30
30
30
30
30
6
6
30
30
30
25
30
6
27
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
27
6
6
6
6
6
6
6
7
6
6
Preliminary
Page 27
G
D
S
G
D
S
TABLE_5_ITEM
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
SELECT PLL FREQUENCY RANGE.
*
*
SELECT EI BUS DIVIDER. BUS DATA RATE(BPS)= (PROCESSOR CLOCK) / BUSCFG.
AVPRESET OFF
RESERVED
PROC / 2
PROC / 12
PROC / 6
PROC / 4
BYPASS MODE
*
* STUFF THESE ON Q45.
AVPRESET ON
SELECT PROCESSOR CLOCK MULTIPLIER. PROCESSOR CLOCK(MHZ)= SYSTCLOCK * PLLMULT.
PROC / 16
PROC / 8
PROC / 3
SYSCLK * 12
SYSCLK * 8
SYSTEM CONFIGURATION
SELECT ELASTIC MODE OR BYPASS.
>= 1.8 GHZ *
<= 1.6 GHZ *
402
MF-LF
1/16W
0
5%
21
R3001
1K
5%
1/16W
MF-LF
402
21
R3003
402
5%
1/16W
MF-LF
1K
21
R3005
402
MF-LF
1/16W
5%
1K
21
R3007
402
MF-LF
1/16W
5%
1K
2 1
R3009
1K
5%
1/16W
MF-LF
402
21
R3002
1K
5%
1/16W
MF-LF
402
21
R3004
402
MF-LF
1/16W
5%
1K
21
R3006
OMIT
402
MF-LF
1/16W
5%
1K
2
1
R3008
OMIT
402
MF-LF
1/16W
5%
1K
2
1
R3024
OMIT
402
MF-LF
1/16W
5%
1K
2
1
R3026
OMIT
402
MF-LF
1/16W
5%
1K
2
1
R3028
OMIT
MF-LF
1/16W
5%
1K
402
2
1
R3030
OMIT
1K
5%
1/16W
MF-LF
402
2
1
R3032
402
OMIT
MF-LF
1/16W
5%
1K
2
1
R3034
OMIT
1K
5%
1/16W
MF-LF
402
2
1
R3012
OMIT
1K
5%
1/16W
MF-LF
402
2
1
R3018
OMIT
402
MF-LF
1/16W
5%
1K
2
1
R3016
OMIT
1K
5%
MF-LF
402
1/16W
2
1
R3014
OMIT
1K
5%
1/16W
MF-LF
402
2
1
R3010
OMIT
402
MF-LF
1/16W
5%
1K
2
1
R3020
OMIT
402
1K
5%
1/16W
MF-LF
2
1
R3022
402
1K
5%
MF-LF
1/16W
21
R3040
MF-LF
5%
1K
402
1/16W
NOSTUFF
21
R3042
OMIT
402
1K
5%
1/16W
MF-LF
2
1
R3036
OMIT
402
MF-LF
1/16W
5%
1K
2
1
R3038
10K
5%
1/16W
MF-LF
402
2
1
R3068
SOT-363
2N7002DW
1
2
6
Q3000
5%
402
MF-LF
1/16W
1K
2
1
R3083
2N7002DW
SOT-363
4
5
3
Q3000
402
1K
5%
1/16W
MF-LF
2
1
R3059
NOSTUFF
402
1K
5%
1/16W
MF-LF
2
1
R3057
1K
5%
1/16W
MF-LF
402
21
R3031
402
MF-LF
1/16W
5%
1K
21
R3033
402
MF-LF
1/16W
5%
1K
21
R3035
402
MF-LF
1/16W
5%
1K
21
R3037
0
5%
1/16W
MF-LF
402
21
R3039
402
MF-LF
1/16W
5%
1K
21
R3041
1/16W
1K
5%
MF-LF
402
21
R3043
402
MF-LF
1/16W
5%
1K
21
R3045
1K
5%
1/16W
402
MF-LF
21
R3047
1/16W
402
MF-LF
5%
1K
21
R3049
402
5%
MF-LF
1/16W
1K
21
R3051
MF-LF
1/16W
5%
10K
402
21
R3053
1K
402
MF-LF
1/16W
5%
21
R3055
402
1K
5%
1/16W
MF-LF
21
R3061
402
1K
5%
1/16W
MF-LF
NOSTUFF
21
R3063
402
MF-LF
1/16W
5%
1K
21
R3065
NOSTUFF
1K
5%
MF-LF
402
1/16W
21
R3067
1K
5%
1/16W
402
MF-LF
21
R3069
NOSTUFF
MF-LF
5%
1K
402
1/16W
21
R3071
402
1K
5%
1/16W
MF-LF
21
R3073
402
1K
5%
1/16W
MF-LF
NOSTUFF
21
R3075
1K
5%
1/16W
MF-LF
NOSTUFF
402
21
R3077
1K
5%
MF-LF
402
NOSTUFF
1/16W
21
R3079
1K
402
MF-LF
1/16W
5%
21
R3081
402
1K
5%
1/16W
MF-LF
21
R3085
402
MF-LF
1K
5%
1/16W
21
R3087
402
MF-LF
1/16W
5%
1K
21
R3089
MF-LF
1/16W
5%
1K
402
21
R3091
402
MF-LF
1/16W
1K
5%
21
R3093
10K
402
MF-LF
1/16W
5%
21
R3095
402
5%
1/16W
MF-LF
10K
21
R3097
402
MF-LF
1/16W
5%
10K
21
R3099
0
5%
MF-LF
402
1/16W
NOSTUFF
21
R3000
114S1103
2
R3014,R3016
RES,1K OHM,1/16W,5%,0402
NOSTUFF
1
RES,1K OHM,1/16W,5%,0402
114S1103
R3020
NOSTUFF
R3024,R3026,R3028
3
RES,1K OHM,1/16W,5%,0402
114S1103
EI_2TO1
CPU_PLL_HIGH
114S1103
2
R3030,R3016
RES,1K OHM,1/16W,5%,0402
R3024,R3026,R3012
114S1103
3
RES,1K OHM,1/16W,5%,0402
EI_3TO1
R3008,R3026,R3012
RES,1K OHM,1/16W,5%,0402
3
114S1103
NOSTUFF
1
114S1103
RES,1K OHM,1/16W,5%,0402
R3036
CPU_PLL_LOW
RES,1K OHM,1/16W,5%,0402
R3030,R3032
114S1103
2
R3008,R3010,R3012
114S1103
3
RES,1K OHM,1/16W,5%,0402
NOSTUFF
CPU_PLL_MEDIUM
114S1103
2
R3014,R3032
RES,1K OHM,1/16W,5%,0402
11
051-6772
102
30
SYNC_MASTER=N/A
SYNC_DATE=N/A
CPU STRAPS
114S1103
RES,1K OHM,1/16W,5%,0402
R3008,R3026,R3028
3
NOSTUFF
114S1103
RES,1K OHM,1/16W,5%,0402
1
R3038
NOSTUFF
RES,1K OHM,1/16W,5%,0402
1
114S1103
R3018
EI_2TO1
RES,1K OHM,1/16W,5%,0402
R3008,R3010,R3028
114S1103
3
NOSTUFF
RES,1K OHM,1/16W,5%,0402
R3034
1
114S1103
EI_3TO1
114S1103
RES,1K OHM,1/16W,5%,0402
1
R3022
R3024,R3010,R3012
3
RES,1K OHM,1/16W,5%,0402
114S1103
NOSTUFF
R3024,R3010,R3028
3
RES,1K OHM,1/16W,5%,0402
114S1103
NOSTUFF
CPU_BYPASS_L
CPU_BYPASS
CPU_HRESET
CPU_HRESET_L
=PP1V2_EI_CPU
=PP1V2_EI_CPU
=PP1V2_EI_CPU
CPU_HTBEN
I2CGO
CPU_SRESET_L
PROC_THERM_INT_L
CPU_INT_L
RI_L
DI2_L
BIMODE_L
JTAG_CPU_TDO
JTAG_CPU_TRST_L
GPUL_DBG
CKTERMDIS_L
PLLTEST
C2UNDGLOBAL
C1UNDGLOBAL
EI_SE
JTAG_SEL
PLLTESTOUT
BUSCFG2
PROCID2
PROCID1
PROCID0
PULSESEL2
RAMSTOPENABLE
SYNCENABLE
LSSDSTOPC2ENABLE
LSSDSCANENABLE
JTAGMODE_SPARE2
PULSESEL0
PULSESEL1
JTAG_CPU_TMS
JTAG_CPU_TDI
JTAG_CPU_TCK
LSSDMODE
EI_QREQ_L
LSSDSTOPC2STARENABLE
CPU_SPARE
BUSCFG1
EI_DISABLE
PLLMULT
PLLRANGE1
PLLRANGE0
LSSDSTOPENABLE
AVPRESET_L
BUSCFG0
=PP1V2_EI_CPU
=PP1V2_EI_CPU
=PP1V2_EI_CPU
31
31
31
31
31
31
30
30
30
30
30
30
29
29
29
29
29
29
29
29
29
29
18
18
18
25
29
28
29
28
18
18
18
14
14
14
14
29
29
14
14
29
14
14
29
29
29
14
14
14
14
29
13
13
6
7
7
7
27
29
25
29
6
6
29
29
18
29
29
29
29
29
29
6
29
29
29
29
29
29
29
6
29
29
29
29
29
18
18
18
29
6
29
29
29
29
29
29
29
29
29
29
7
7
7
Preliminary
Page 28
KPVDD2
(2 OF 3)
KPVDD1
AVDD
GND
X105
VCORE
X105
KPGND2KPGND1AGND
GND
X99
VCORE
X100
(3 OF 3)
GND
VOUT
VIN
NOISE
CONT
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
0805
PLACE ALL THESE PARTS VERY CLOSE TO U2900
1/10W
MF-LF
5%
603
2.2
21
R3101
0.22UF
6.3V
20%
402
X5R
2
1
C3100
NOSTUFF
20%
0.22UF
402
6.3V
X5R
2
1
C3101
5%
MF-LF
402
0
NOSTUFF
1/16W
21
R3103
NOSTUFF
0
5%
1/16W
MF-LF
402
21
R3105
20%
6.3V
CERM
805
10UF
2
1
C3102
60-OHM-EMI
SM
21
L3101
5%
MF-LF
1/16W
402
0
21
R3127
0
MF-LF
5%
1/16W
402
21
R3129
5%
1/16W
MF-LF
0
402
21
R3131
10%
1UF
402
6.3V
CERM
2
1
C3103
CERM
6.3V
10%
402
1UF
2
1
C3104
402
CERM
6.3V
10%
1UF
2
1
C3105
402
CERM
6.3V
10%
1UF
2
1
C3106
402
CERM
6.3V
10%
1UF
2
1
C3107
CERM
6.3V
10%
402
1UF
2
1
C3108
402
CERM
10%
1UF
6.3V
2
1
C3109
402
CERM
6.3V
10%
1UF
2
1
C3110
402
CERM
6.3V
10%
1UF
2
1
C3111
402
CERM
6.3V
1UF
10%
2
1
C3112
402
CERM
6.3V
10%
1UF
2
1
C3113
805
20%
6.3V
CERM
10UF
2
1
C3114
10UF
6.3V
20%
805
CERM
2
1
C3115
CERM
6.3V
20%
805
10UF
2
1
C3116
805
CERM
6.3V
20%
10UF
2
1
C3117
402
CERM
6.3V
10%
1UF
2
1
C3118
402
CERM
6.3V
10%
1UF
2
1
C3119
402
CERM
6.3V
10%
1UF
2
1
C3120
CERM
6.3V
10%
1UF
402
2
1
C3121
402
CERM
6.3V
10%
1UF
2
1
C3122
402
CERM
6.3V
10%
1UF
2
1
C3123
402
6.3V
10%
1UF
CERM
2
1
C3124
402
CERM
6.3V
10%
1UF
2
1
C3125
402
CERM
6.3V
10%
1UF
2
1
C3126
402
CERM
6.3V
10%
1UF
2
1
C3127
6.3V
10%
1UF
CERM
402
2
1
C3128
402
CERM
6.3V
10%
1UF
2
1
C3129
402
CERM
6.3V
10%
1UF
2
1
C3130
402
CERM
10%
1UF
6.3V
2
1
C3131
402
CERM
6.3V
10%
1UF
2
1
C3132
402
CERM
10%
1UF
6.3V
2
1
C3133
402
CERM
6.3V
10%
1UF
2
1
C3134
402
6.3V
10%
1UF
CERM
2
1
C3135
CERM
6.3V
1UF
10%
402
2
1
C3136
402
CERM
6.3V
10%
1UF
2
1
C3137
402
CERM
6.3V
10%
1UF
2
1
C3138
6.3V
10%
1UF
CERM
402
2
1
C3139
402
CERM
6.3V
1UF
10%
2
1
C3140
402
CERM
6.3V
10%
1UF
2
1
C3141
402
10%
1UF
CERM
6.3V
2
1
C3142
402
CERM
10%
1UF
6.3V
2
1
C3143
1UF
402
CERM
10%
6.3V
2
1
C3144
402
CERM
6.3V
10%
1UF
2
1
C3145
6.3V
10%
1UF
CERM
402
2
1
C3146
6.3V
10%
1UF
402
CERM
2
1
C3147
1/10W
603
5%
MF-LF
2.2
NOSTUFF
21
R3132
20%
6.3V
CERM
805
10UF
2
1
C3150
20%
603
CERM
10V
1UF
CPU_AVDD_2V6&CPU_AVDD_2V7&CPU_AVDD_2V8
2
1
C3149
16V
CERM
20%
0.01UF
402
CPU_AVDD_2V6&CPU_AVDD_2V7&CPU_AVDD_2V8
2
1
C3148
1UF
10%
CERM
402
6.3V
2
1
C3199
SM
OMIT
2
1
XW3100
CBGA
1.8GHZ-76C
NEO-10S-REV2
CRITICAL
OMIT
N18
N16
N14
N12
N10
M9
M7
M5
M23
M21
C2
M17
M15
M13
M11
M1
L8
L6
L4
L20
L18
B7
L16
L14
L12
L10
K9
K7
K5
K23
K21
K19
B3
K17
K15
K13
K11
J8
J6
J4
J20
J2
J18
B20
J16
J14
J12
J10
J1
H9
H7
H5
H24
H19
B16
H17
H15
H13
H11
G8
G6
G22
G18
G16
G14
B13
G12
G10
F9
F7
F5
F3
F19
F17
F15
F13
B11
F11
E8
E6
E4
E22
E18
E16
E14
E10
E1
A24
D9
D7
D5
D23
D21
D19
D17
D13
C24
N8
N6
N4
N24
N20
N2
C20
A1
R2
Y1
T2
AA1
N5
N23
N17
N15
N13
N11
N1
M8
M6
M4
C21
M24
M22
M20
M2
M16
M14
M12
M10
L9
L7
B9
L5
L23
L17
L15
L13
L11
K8
K6
K20
K18
B5
K16
K14
K12
K10
K1
J9
J7
J5
J3
J23
B22
J19
J17
J15
J13
J11
H8
H6
H4
H20
H18
B18
H16
H14
H12
H10
G9
G7
G5
G23
G2
G17
B14
G15
G13
G11
F8
F6
F24
F22
F20
F18
F16
B12
F14
F12
F10
E9
E7
E5
E23
E19
E17
E15
B1
E13
E11
D4
D16
D14
D12
D10
D1
C3
P16
P14
P12
P10
N9
N7
C23
A3
P24
R24
U2900
1.8GHZ-76C
NEO-10S-REV2
CBGA
OMIT
CRITICAL
AD9
AD5
AD3
AD23
AD19
AD15
AD1
AC8
AC6
AC4
AC22
AC20
AC2
AC18
AC14
AC12
AB9
AB3
AB23
AB17
AB15
AB13
AB1
AA6
AA4
AA24
AA2
AA18
AA16
Y9
Y7
Y5
Y3
Y23
Y22
Y19
Y17
Y15
Y13
Y11
W8
W6
W24
W2
W18
W16
W14
W12
W10
V9
V7
V3
V19
V17
V15
V13
V11
V1
U8
U6
U4
U22
U20
U2
U18
U16
U14
U12
U10
T9
T7
T5
T3
T23
T21
T17
T15
T13
T11
T1
R8
R6
R4
R18
R16
R14
R12
R10
P9
P7
P5
P3
P23
P21
P19
P17
P15
P13
P11
P1
AD6
AD4
AD24
AD20
AD2
AD16
AD10
AC7
AC5
AC3
AC23
AC21
AC17
AC13
AC11
AC1
AB8
AB22
AB20
AB2
AB18
AB14
AB10
AA7
AA3
AA23
AA21
AA17
AA15
AA11
Y8
Y6
Y4
Y24
Y20
Y2
Y18
Y16
Y14
Y12
Y10
W9
W7
W5
W3
W21
W19
W17
W15
W13
W11
W1
V8
V6
V4
V2
V18
V16
V14
V12
V10
U9
U7
U5
U3
U23
U21
U17
U15
U13
U11
U1
T8
T6
T4
T24
T18
T16
T14
T12
T10
R9
R7
R5
R3
R23
R21
R19
R17
R15
R13
R11
R1
P8
P6
P4
P22
P2
P18
U2900
MM1572JN
SOT-25A
OMIT
51
4
2
3
VR3100
CRITICAL
CPU_AVDD_2V6
VR3100
1
353S0806
VREG MM1572 2.6V
CRITICAL
CPU_AVDD_2V8
353S0807
1
VR3100
VREG MM1572 2.8V
CRITICAL
1
VR3100
VREG MM1572 2.7V
CPU_AVDD_2V7
353S0886
051-6772
11
102
31
SYNC_MASTER=N/A
SYNC_DATE=N/A
CPU POWER AND BYPASS
VOLTAGE=2.5V
PP2V5_RUN_CPU_AVDD
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.6MM
GND_CPU_AVDD
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.25MM
VOLTAGE=1.2V
=PPVCORE_CPU
=PP1V2_EI_CPU
PP2V5_RUN_CPU_AVDD_R
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=2.5V
GND_Z_OUT
GND_Z_SENSE
GND_SPARE_GND
DIFFERENTIAL_PAIR=P_KP2
MIN_LINE_WIDTH=0.25MM
NET_SPACING_TYPE=PROC_DIFF
KPVDD2
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PROC_DIFF
DIFFERENTIAL_PAIR=P_TDD
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
TDIODE_POS
GND_SPARE_GND
DIFFERENTIAL_PAIR=P_KP2
MIN_LINE_WIDTH=0.25MM
NET_SPACING_TYPE=PROC_DIFF
KPGND2
MIN_NECK_WIDTH=0.2MM
TDIODE_NEG
NET_SPACING_TYPE=PROC_DIFF
DIFFERENTIAL_PAIR=P_TDD
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
GND_Z_OUT
GND_Z_SENSE
=PP2V5_RUN_CPU
PP2V5_RUN_CPU_AVDD_R_L
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
=PPVCORE_CPU
=PP5V_RUN_CPU
CPU_AVDD_EN
CPU_AVDD_NOISE
36
30
36
32
29
32
8
31
18
36
36
31
7
29
14
33
33
36
29
6
7
7
35
31
31
31
6
36
31
6
6
31
31
7
7
3
3
Preliminary
Page 29
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
1UF
10%
CERM
402
6.3V
2
1
C3200
1UF
10%
CERM
402
6.3V
2
1
C3201
1UF
10%
CERM
402
6.3V
2
1
C3202
402
1UF
10%
CERM
6.3V
2
1
C3203
1UF
10%
CERM
402
6.3V
2
1
C3204
1UF
10%
CERM
402
6.3V
2
1
C3205
1UF
10%
CERM
402
6.3V
2
1
C3206
1UF
10%
CERM
402
6.3V
2
1
C3207
1UF
10%
CERM
402
6.3V
2
1
C3208
1UF
10%
CERM
402
6.3V
2
1
C3209
1UF
10%
CERM
402
6.3V
2
1
C3210
1UF
10%
CERM
402
6.3V
2
1
C3211
1UF
10%
CERM
402
6.3V
2
1
C3212
402
1UF
10%
CERM
6.3V
2
1
C3213
402
1UF
10%
CERM
6.3V
2
1
C3214
1UF
10%
CERM
402
6.3V
2
1
C3215
1UF
10%
CERM
402
6.3V
2
1
C3216
1UF
10%
CERM
402
6.3V
2
1
C3217
1UF
10%
CERM
402
6.3V
2
1
C3218
1UF
10%
CERM
402
6.3V
2
1
C3219
1UF
10%
CERM
402
6.3V
2
1
C3220
1UF
10%
CERM
402
6.3V
2
1
C3221
1UF
10%
CERM
402
6.3V
2
1
C3222
1UF
10%
CERM
402
6.3V
2
1
C3223
1UF
10%
CERM
402
6.3V
2
1
C3224
1UF
10%
CERM
402
6.3V
2
1
C3225
1UF
10%
CERM
402
6.3V
2
1
C3226
1UF
10%
CERM
402
6.3V
2
1
C3227
1UF
10%
CERM
402
6.3V
2
1
C3228
1UF
10%
CERM
402
6.3V
2
1
C3229
1UF
10%
CERM
402
6.3V
2
1
C3230
1UF
10%
CERM
402
6.3V
2
1
C3231
1UF
10%
CERM
402
6.3V
2
1
C3232
1UF
10%
CERM
402
6.3V
2
1
C3233
1UF
10%
CERM
402
6.3V
2
1
C3234
1UF
10%
CERM
402
6.3V
2
1
C3235
1UF
10%
CERM
402
6.3V
2
1
C3236
1UF
10%
CERM
402
6.3V
2
1
C3237
1UF
10%
CERM
402
6.3V
2
1
C3238
1UF
10%
CERM
402
6.3V
2
1
C3239
1UF
10%
CERM
402
6.3V
2
1
C3240
1UF
10%
CERM
402
6.3V
2
1
C3241
1UF
10%
CERM
402
6.3V
2
1
C3242
1UF
10%
CERM
402
6.3V
2
1
C3243
1UF
10%
CERM
402
6.3V
2
1
C3244
1UF
10%
CERM
402
6.3V
2
1
C3245
1UF
10%
CERM
402
6.3V
2
1
C3246
1UF
10%
CERM
402
6.3V
2
1
C3247
1UF
10%
CERM
402
6.3V
2
1
C3248
1UF
10%
CERM
402
6.3V
2
1
C3249
1UF
10%
CERM
402
6.3V
2
1
C3250
1UF
10%
CERM
402
6.3V
2
1
C3251
1UF
10%
CERM
402
6.3V
2
1
C3252
1UF
10%
CERM
402
6.3V
2
1
C3253
1UF
10%
CERM
402
6.3V
2
1
C3254
1UF
10%
CERM
402
6.3V
2
1
C3255
1UF
10%
CERM
402
6.3V
2
1
C3256
1UF
10%
CERM
402
6.3V
2
1
C3257
1UF
10%
CERM
402
6.3V
2
1
C3258
1UF
10%
CERM
402
6.3V
2
1
C3259
1UF
10%
CERM
402
6.3V
2
1
C3260
1UF
10%
CERM
402
6.3V
2
1
C3261
1UF
10%
CERM
402
6.3V
2
1
C3262
1UF
10%
CERM
402
6.3V
2
1
C3263
1UF
10%
CERM
402
6.3V
2
1
C3264
1UF
10%
CERM
402
6.3V
2
1
C3265
1UF
10%
CERM
402
6.3V
2
1
C3266
1UF
10%
CERM
402
6.3V
2
1
C3267
1UF
10%
CERM
402
6.3V
2
1
C3268
1UF
10%
CERM
402
6.3V
2
1
C3269
1UF
10%
CERM
402
6.3V
2
1
C3270
1UF
10%
CERM
402
6.3V
2
1
C3271
1UF
10%
CERM
402
6.3V
2
1
C3272
1UF
10%
CERM
402
6.3V
2
1
C3273
1UF
10%
CERM
402
6.3V
2
1
C3274
1UF
10%
CERM
402
6.3V
2
1
C3275
1UF
10%
CERM
402
6.3V
2
1
C3276
1UF
10%
CERM
402
6.3V
2
1
C3277
1UF
10%
CERM
402
6.3V
2
1
C3278
1UF
10%
CERM
402
6.3V
2
1
C3279
1UF
10%
CERM
402
6.3V
2
1
C3280
1UF
10%
CERM
402
6.3V
2
1
C3281
1UF
10%
CERM
402
6.3V
2
1
C3282
1UF
10%
CERM
402
6.3V
2
1
C3283
1UF
10%
CERM
402
6.3V
2
1
C3284
402
1UF
10%
CERM
6.3V
2
1
C3285
402
1UF
10%
CERM
6.3V
2
1
C3286
402
1UF
10%
CERM
6.3V
2
1
C3287
402
1UF
10%
CERM
6.3V
2
1
C3288
1UF
10%
CERM
402
6.3V
2
1
C3289
402
1UF
10%
CERM
6.3V
2
1
C3290
402
1UF
10%
CERM
6.3V
2
1
C3291
402
1UF
10%
CERM
6.3V
2
1
C3292
1UF
10%
CERM
402
6.3V
2
1
C3293
1UF
10%
CERM
402
6.3V
2
1
C3294
1UF
10%
CERM
402
6.3V
2
1
C3295
1UF
10%
CERM
402
6.3V
2
1
C3296
1UF
10%
CERM
402
6.3V
2
1
C3297
1UF
10%
CERM
402
6.3V
2
1
C3298
1UF
10%
CERM
402
6.3V
2
1
C3299
051-6772
102
32
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
PROC DECOUPLING
=PPVCORE_CPU
36 31 29
7
Preliminary
Page 30
AGND
VCC
BGOUT
PGOOD
ERROUT
DACSTEP
GSENSE
FB
OUT4
OUT1
OUT3
OUT2
VID5
VID2
VID3
VID4
VID1
VID0
OUTSEN
OSCREF
OS2
OS3
OS1
OS4
TG
VREG
VIN
CO
BST
DRN
BG
VPN
THMPAD
TG
VREG
VIN
CO
BST
DRN
BG
VPN
THMPAD
G
D
S
GND
OUT
VIN+ VIN-
V+
G
D
S
D
G
S
G
D
S
D
G
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
KEEP SHORTS NEXT TO U3301
PLACE REGULATOR SENSE POINTS AT DESIGNATED LOCATIONS.
0 TO 2.5V
0 TO 2.5V
ADC IS 10BIT 0 TO 1023
.00675 A/COUNT
CURRENT SENSE
PLACE NEXT TO SMU
FOR REMOTE SENSE
DIFFERENTIAL PAIR
FAR SIDE
CPU SENSE SIDE
NEAR SIDE
UNDER PROCESSOR
PLACE R3344 AND C3331 BY SMU
CONNECT BETWEEN THE INDUCTOR & BULK CAPS.
PLACE R3325 CLOSE TO INDUCTOR OUTPUT LEAD.
COUNTSCALE
VOLTAGE SENSE
COUNTSCALE
2.73224 A/V
6 V/V
.01464 V/COUNT
ADC IS 10BIT 0 TO 1023
SC2643VX
TSSOP
15
10
11
12
13
14
9
16
23
22
21
20
19
17
24
1
2
3
6
7
5
8
4
18
U3300
NOSTUFF
0.0022UF
50V
CERM
402
10%
2
1
C3315
402
1.5K
1/16W
5%
MF-LF
21
R3300
402
CERM
6.3V
1UF
10%
2
1
C3301
50V
330PF
402
CERM
10%
2
1
C3302
402
NOSTUFF
MF-LF
1/16W
5%
0
2
1
R3302
603
1/10W
5%
MF-LF
2.7M
NOSTUFF
21
R3303
SC1211
SOIC
7
5
6
2
9
1
4
3
8
U3320
TH-KZJ
20%
1000UF
16V
ELEC
2
1
C3321
0.6UH-24A
TH1
21
L3320
5%
1
1/16W
MF-LF
402
21
R3320
NOSTUFF
0.0022UF
10%
50V
CERM
402
2
1
C3325
1/16W
0
5%
402
MF-LF
21
R3330
SM
OMIT
21
XW3300
1206
20%
CERM
16V
1UF
2
1
C3313
1206
CERM
16V
20%
1UF
2
1
C3329
1206
20%
1UF
CERM
16V
21
C3310
1206
1UF
20%
16V
CERM
2
1
C3323
1206
1UF
CERM
16V
20%
21
C3320
603
2.2
1/10W
5%
MF-LF
21
R3307
1210
CERM
16V
10%
10UF
2
1
C3322
CERM
CRITICAL
10UF
1210
10%
16V
2
1
C3312
TH-KZJ
ELEC
20%
6.3V
1800UF
2
1
C3317
ELEC
6.3V
20%
CRITICAL
TH-KZJ
1800UF
2
1
C3318
6.3V
1800UF
20%
TH-KZJ
ELEC
2
1
C3328
330
MF-LF
1/16W
402
NOSTUFF
5%
2
1
R3324
1/16W
MF-LF
1K
5%
402
NOSTUFF
21
R3325
402
X7R
0.0082UF
25V
10%
2
1
C3304
402
X7R
0.0082UF
25V
10%
2
1
C3305
402
X7R
0.0082UF
25V
10%
2
1
C3306
20.5K
1%
1/16W
MF-LF
402
2
1
R3313
20.5K
1/16W
MF-LF
1%
402
2
1
R3316
SC1211
SOIC
7
5
6
2
9
1
4
3
8
U3310
20.5K
1%
1/16W
MF-LF
402
2
1
R3317
301
402
1%
1/16W
MF-LF
21
R3326
10%
10V
CERM
402
0.068UF
21
C3308
BAS16
SOT23
3
1
D3310
SOT23
BAS16
3
1
D3320
402
332K
MF-LF
1/16W
1%
2
1
R3328
20%
10V
CERM
402
0.1UF
2
1
C3300
CERM
10%
0.0047UF
25V
402
2
1
C3326
5%
1/8W
1
MF-LF
805
2
1
R3321
5%
805
1
1/8W
MF-LF
2
1
R3311
0.0047UF
402
25V
10%
CERM
2
1
C3316
MF-LF
402
1/16W
5%
30K
2
1
R3301
MF-LF
1/16W
1%
4.99K
402
21
R3305
402
1%
261
1/16W
MF-LF
21
R3304
402
MF-LF
1/16W
5%
0
21
R3335
1/16W
402
MF-LF
5%
0
21
R3336
1UH-20A-4.5MOHM
TH-VERT
CRITICAL
21
L3300
NOSTUFF
5%
1/16W
MF-LF
402
0
21
R3337
1/16W
402
MF-LF
5%
0
NOSTUFF
21
R3338
402
NOSTUFF
0
5%
1/16W
MF-LF
21
R3339
1/16W
5%
NOSTUFF
402
MF-LF
0
21
R3340
NOSTUFF
402
MF-LF
1/16W
5%
0
21
R3341
NOSTUFF
402
MF-LF
1/16W
5%
0
21
R3342
1UF
20%
1206
16V
CERM
2
1
C3330
402
20%
0.001UF
50V
CERM
2
1
C3314
100
5%
1/16W
MF-LF
402
2
1
R3312
0.001UF
20%
CERM
402
50V
2
1
C3324
MF-LF
1/16W
5%
100
402
2
1
R3322
2N7002
SOT23-LF
2
1
3
Q3312
SOT23-5
INA138
43
5 1
2
U3301
1W
0.025
1%
2512
MF
21
R3343
CERM
20%
6.3V
10UF
805
2
1
C3331
402
73.2K
1%
MF-LF
1/16W
2
1
R3345
BAS16
SOT23
NOSTUFF
3
1
D3300
MF-LF
5%
1/16W
100K
402
21
R3344
20.5K
402
MF-LF
1/16W
1%
NOSTUFF
2
1
R3318
1/16W
402
20.5K
1%
MF-LF
NOSTUFF
2
1
R3315
1/16W
NOSTUFF
402
MF-LF
1%
20.5K
2
1
R3314
5%
1/16W
10K
MF-LF
402
2
1
R3350
10K
402
MF-LF
1/16W
5%
2
1
R3351
SM
OMIT
21
XW3301
SM
OMIT
21
XW3303
SM
OMIT
21
XW3304
NOSTUFF
1/16W
100K
5%
402
MF-LF
21
R3308
805
10UF
6.3V
20%
CERM
2
1
C3303
603
2.2
1/10W
5%
MF-LF
21
R3306
ELEC
TH-KZJ
1800UF
20%
6.3V
2
1
C3332
1800UF
ELEC
20%
6.3V
TH-KZJ
2
1
C3333
SM
OMIT
21
XW3302
MF-LF
1/16W
5%
402
0
2
1
R3390
MF-LF
1/16W
5%
0
402
2
1
R3391
1%
1/16W
MF-LF
10K
402
2
1
R3360
MF-LF
1/16W
1%
2.0K
402
2
1
R3361
NTD60N02R
CASE369
CRITICAL
3
1
4
Q3310
NTD70N03R
CASE369
CRITICAL
3
1
4
Q3311
CRITICAL
CASE369
NTD60N02R
3
1
4
Q3320
NTD70N03R
CASE369
CRITICAL
3
1
4
Q3321
0.6UH-24A
TH1
CRITICAL
21
L3310
TH-KZJ
1000UF
20%
ELEC
16V
CRITICAL
2
1
C3311
10%
NOSTUFF
0.015UF
16V
X7R 402
21
C3309
402
1.5K
1%
1/16W
MF-LF
21
R3327
402
1/16W
MF-LF
5%
10
2
1
R3329
CERM
1UF
20%
16V
1206
2
1
C3319
1/16W
1
MF-LF
402
5%
21
R3310
11
33
102
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
CPU VREG
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
PN2
U3320_BG
U3320_TG
PP12V_CPU
U3310_VREG
VPN1
U3310_BG
PN1
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
U3310_TG
PP12V_CPU
PPVCORE_CPU
U3310_DRN
PPVCORE_CPU
U3320_DRN
VCORE_SENSE_VOUT
R3325_2
CPU_SENSE_I
SC2643_ERROUT
CPU_VID_R<1>
CPU_VID_R<2>
SC2643_AGND
VOLTAGE=12V
PP12V_CPU
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
VCORE_SENSE_GND
VRM_EN
PP12V_CPU
SC2643_OSCREF
SC2643_OS3
CPU_VID_R<0>
CPU_VID_R<3>
U3300_BGOUT
SC2643_DACSTEP
SC2643_OUTSEN_R
U3310_BST
U3320_BST
CORE_ISNS_M
C3326_1
OUT2
AUX2
PN2
VPN2
C3316_1
AUX1
PN1
CORE_ISNS_P
INA138_OUT
SC2643_AGND
AUX3AUX2AUX1
SYS_POWERUP_L
SC2643_VCC
C3302_1
SC2643_VCC
KPVDD2
KPGND2
CPU_SENSE_I_R
GND_SMU_AVSS
OUT1
SYS_SLEWING_L
PP12V_CPU
PPVCORE_CPU
CPU_VID_R<4>
CPU_VID_R<5>
=PP12V_RUN_CPU
=PP12V_RUN_CPU
=PP3V3_RUN_CPU
PPVCORE_CPU
GND_SMU_AVSS
PP12V_CPU
SC2643_PGOOD
SC2643_AGND
U3320_BST_R
SC2643_OUTSEN
SC2643_AGND
U3320_VREG
OUT1
OUT2
OUT3
SC2643_OS2
SC2643_AGND
U3310_BST_R
CPU_SENSE_V
SC2643_OS1
SC2643_OS4
SC2643_OS_HUB
OUT4
SC2643_VCC
VCORE_SENSE_VOUT
DIFFERENTIAL_PAIR=P_SENSE_CORE
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PROC_DIFF
VCORE_SENSE_GND
DIFFERENTIAL_PAIR=P_SENSE_CORE
NET_SPACING_TYPE=PROC_DIFF
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
PPVCORE_CPU
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.25MM
PP12V_CPU_R
35
35
13
35
35
35
34
34
11
36
34
34
36
34
34
34
33
33
34
34
10
36
36
33
27
34
33
33
33
34
33
33
33
33
33
7
7
33
8
8
33
33
33
8
8
36
33
33
36
7
31
31
13
25
33
7
8
8
33
33
7
13
33
33
33
7
6
6
6
6
6
6
6
6
6
13
6
6
33
6
6
6
6
6
6
33
33
6
33
6
6
33
34 33 33
6
33
33
6
6
8
33
13
6
6
6
6
7
7
7
6
8
6
33
33
33
33
34
33
13
33
6
6
6
Preliminary
Page 31
TG
VREG
VIN
CO
BST
DRN
BG
VPN
THMPAD
LM339A
V+
GND
G
D
S
D
G
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PLACE LED3400 NEAR VREG
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3400
CERM
6.3V
20%
10UF
1206
2
1
C3401
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3402
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3403
CERM
6.3V
20%
10UF
1206
2
1
C3404
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3405
1206
10UF
20%
6.3V
CERM
2
1
C3406
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3407
CERM
6.3V
20%
10UF
1206
2
1
C3408
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3409
1206
10UF
20%
6.3V
CERM
2
1
C3419
CERM
6.3V
20%
10UF
1206
2
1
C3429
1206
10UF
20%
6.3V
CERM
2
1
C3430
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3431
CERM
6.3V
20%
10UF
1206
2
1
C3432
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3433
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3434
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3435
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3436
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3437
CERM
6.3V
20%
10UF
1206
2
1
C3438
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3439
1206
10UF
20%
6.3V
CERM
2
1
C3440
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3441
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3442
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3443
10UF
1206
20%
6.3V
CERM
EXTRA_C
2
1
C3444
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3445
1206
10UF
20%
6.3V
CERM
2
1
C3446
CERM
6.3V
20%
10UF
1206
2
1
C3447
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3448
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3449
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3450
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3451
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3452
1206
10UF
20%
6.3V
CERM
2
1
C3453
1206
10UF
20%
6.3V
CERM
2
1
C3454
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3455
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3456
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3457
CERM
6.3V
20%
10UF
1206
2
1
C3458
1000UF
16V
ELEC
20%
TH-KZJ
2
1
C3412
ELEC
1000UF
16V
20%
TH-KZJ
2
1
C3411
0.6UH-24A
TH1
21
L3410
1/16W
5%
1
MF-LF
402
21
R3410
SOIC
SC1211
7
5
6
2
9
1
4
3
8
U3410
402
NOSTUFF
0.0022UF
10%
50V
CERM
2
1
C3415
CERM
1206
1UF
20%
16V
2
1
C3413
20%
16V
1206
CERM
1UF
21
C3410
10UF
1210
CERM
16V
10%
2
1
C3468
20%
6.3V
TH-KZJ
ELEC
1800UF
2
1
C3417
6.3V
ELEC
20%
1800UF
TH-KZJ
2
1
C3418
BAS16
SOT23
3
1
D3410
1/8W
805
1
5%
MF-LF
2
1
R3411
10%
CERM
25V
402
0.0047UF
2
1
C3416
16V
CERM
20%
1UF
1206
2
1
C3470
0.001UF
20%
402
CERM
50V
2
1
C3414
402
100
5%
1/16W
MF-LF
2
1
R3412
402
MF-LF
1/16W
5%
10K
2
1
R3450
603
2.2
1/10W
5%
MF-LF
21
R3423
1800UF
6.3V
ELEC
20%
TH-KZJ
2
1
C3472
TH-KZJ
20%
ELEC
6.3V
1800UF
2
1
C3473
1000UF
20%
ELEC
16V
TH-KZJ
2
1
C3422
1800UF
6.3V
ELEC
20%
TH-KZJ
2
1
C3475
1800UF
6.3V
ELEC
20%
TH-KZJ
2
1
C3474
ELEC
6.3V
20%
1800UF
TH-KZJ
2
1
C3427
402
330
DEVELOPMENT
MF-LF
1/16W
5%
2
1
R3490
DEVELOPMENT
2.0X1.25A
GREEN
2
1
LED3400
SOI
DEVELOPMENT
3
14
9
8
12
U1001
MF-LF
1/16W
5%
0
402
DEVELOPMENT
21
R3491
CRITICAL
CASE369
NTD60N02R
3
1
4
Q3410
NTD70N03R
CASE369
CRITICAL
3
1
4
Q3411
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3459
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3460
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3461
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3462
1206
10UF
20%
6.3V
CERM
2
1
C3463
1206
10UF
20%
6.3V
CERM
2
1
C3464
CERM
6.3V
20%
10UF
1206
2
1
C3465
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3466
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3467
051-6772
102
34
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
CPU VREG
U3410_TG
PP12V_CPU
U3410_BG
VPN3
U3410_VREG
U3410_DRN
PPVCORE_CPU
CPU_CORE_FOR_LED
1V1_REF
LED_CPU_CORE_N
LED_CPU_CORE_P
PP3V3_RUN
U3410_BST
U3410_BST_R
PN3
AUX3
C3416_1
OUT3
PPVCORE_CPU
PN3
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
PP12V_CPU
50 22
35
18
35
34
11
34
34
33
50
10
33
34
33
7
22
7
34
7
34
33
6
6
6
10
6
6
33
33
6
6
6
Preliminary
Page 32
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
1206
20%
CERM
6.3V
10UF
CRITICAL
EXTRA_C
2
1
C3500
EXTRA_C
1206
10UF
20%
6.3V
CERM
2
1
C3501
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3502
10BQ040PBF
SMB
21
DS3502
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3503
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3504
10UF
CERM
6.3V
20%
1206
EXTRA_C
2
1
C3505
10UF
1206
20%
6.3V
CERM
EXTRA_C
2
1
C3506
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3507
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3508
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3509
10UF
CERM
6.3V
20%
1206
2
1
C3510
6.3V
1206
10UF
20%
CERM
2
1
C3511
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3512
EXTRA_C
CERM
6.3V
20%
10UF
1206
2
1
C3513
10UF
20%
1206
6.3V
CERM
2
1
C3514
20%
1206
CERM
6.3V
10UF
EXTRA_C
2
1
C3515
CERM
1206
6.3V
20%
10UF
EXTRA_C
2
1
C3516
CERM
1206
6.3V
10UF
20%
2
1
C3517
10UF
1206
CERM
6.3V
20%
2
1
C3518
6.3V
CERM
1206
20%
10UF
EXTRA_C
2
1
C3519
1206
CERM
6.3V
10UF
20%
EXTRA_C
2
1
C3520
1206
CERM
6.3V
20%
10UF
2
1
C3521
1206
CERM
6.3V
20%
10UF
EXTRA_C
2
1
C3522
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3523
CERM
1206
6.3V
20%
10UF
EXTRA_C
2
1
C3524
20%
1206
10UF
6.3V
CERM
EXTRA_C
2
1
C3525
1206
6.3V
CERM
20%
10UF
2
1
C3526
EXTRA_C
CERM
6.3V
1206
20%
10UF
2
1
C3527
6.3V
CERM
1206
10UF
20%
EXTRA_C
2
1
C3528
EXTRA_C
6.3V
1206
CERM
20%
10UF
2
1
C3529
CERM
6.3V
1206
20%
10UF
EXTRA_C
2
1
C3530
1206
6.3V
CERM
10UF
20%
2
1
C3531
EXTRA_C
1206
6.3V
CERM
20%
10UF
2
1
C3532
EXTRA_C
1206
6.3V
CERM
20%
10UF
2
1
C3533
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3534
EXTRA_C
CERM
6.3V
1206
20%
10UF
2
1
C3535
20%
1206
10UF
6.3V
CERM
EXTRA_C
2
1
C3536
CERM
6.3V
1206
20%
10UF
EXTRA_C
2
1
C3537
EXTRA_C
1206
6.3V
CERM
20%
10UF
2
1
C3538
CERM
6.3V
1206
20%
10UF
2
1
C3539
1206
6.3V
CERM
20%
10UF
2
1
C3540
CERM
6.3V
1206
20%
10UF
2
1
C3541
EXTRA_C
1206
6.3V
CERM
20%
10UF
2
1
C3542
10UF
CERM
6.3V
1206
20%
EXTRA_C
2
1
C3543
1206
6.3V
CERM
20%
10UF
2
1
C3544
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3545
1206
CERM
6.3V
20%
10UF
2
1
C3546
CERM
6.3V
1206
20%
10UF
EXTRA_C
2
1
C3547
1206
6.3V
CERM
20%
10UF
EXTRA_C
2
1
C3548
CERM
6.3V
1206
20%
10UF
EXTRA_C
2
1
C3549
1206
6.3V
CERM
20%
10UF
EXTRA_C
2
1
C3550
CERM
6.3V
1206
20%
10UF
2
1
C3551
CERM
6.3V
1206
20%
10UF
EXTRA_C
2
1
C3552
1206
6.3V
CERM
20%
10UF
2
1
C3553
CERM
6.3V
1206
20%
10UF
EXTRA_C
2
1
C3554
1206
6.3V
CERM
20%
10UF
EXTRA_C
2
1
C3555
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3556
CERM
6.3V
1206
20%
10UF
2
1
C3557
1206
10UF
20%
6.3V
CERM
2
1
C3558
CERM
6.3V
20%
10UF
1206
2
1
C3559
1206
10UF
20%
6.3V
CERM
2
1
C3560
CERM
6.3V
20%
10UF
1206
2
1
C3561
EXTRA_C
1206
10UF
20%
6.3V
CERM
2
1
C3562
EXTRA_C
1206
10UF
20%
6.3V
CERM
2
1
C3563
CERM
6.3V
20%
10UF
1206
2
1
C3564
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3565
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3566
CERM
6.3V
20%
10UF
1206
2
1
C3567
6.3V
1206
10UF
20%
CERM
2
1
C3568
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3569
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3570
1206
10UF
20%
6.3V
CERM
2
1
C3571
6.3V
20%
10UF
CERM
1206
EXTRA_C
2
1
C3572
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3573
10UF
1206
20%
6.3V
CERM
EXTRA_C
2
1
C3574
6.3V
CERM
20%
10UF
1206
EXTRA_C
2
1
C3575
1206
10UF
20%
6.3V
CERM
2
1
C3576
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3577
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3578
6.3V
1206
10UF
20%
CERM
2
1
C3579
1206
10UF
20%
6.3V
CERM
2
1
C3580
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3581
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3582
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3583
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3584
10UF
1206
20%
6.3V
CERM
2
1
C3585
10UF
CERM
6.3V
20%
1206
2
1
C3586
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3587
6.3V
20%
10UF
1206
CERM
2
1
C3588
CERM
6.3V
20%
10UF
1206
2
1
C3589
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3590
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3591
CERM
6.3V
20%
10UF
1206
2
1
C3592
10UF
6.3V
1206
20%
CERM
2
1
C3593
CERM
6.3V
20%
10UF
1206
2
1
C3594
1206
10UF
20%
6.3V
CERM
EXTRA_C
2
1
C3595
20%
1206
10UF
6.3V
CERM
2
1
C3596
CERM
6.3V
20%
10UF
1206
2
1
C3597
10UF
20%
6.3V
CERM
EXTRA_C
1206
2
1
C3598
CERM
6.3V
20%
10UF
1206
EXTRA_C
2
1
C3599
051-6772
102
35
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
CPU VREG OUTPUT CAPS
PPVCORE_CPU
PP2V5_RUN_CPU_AVDD_R
PPVCORE_CPU
35
35
34
34
33
33 7 7
6
31
6
Preliminary
Page 33
ADJ
NC1
NC2
NC3
NC5
NC4
VREF
GND
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
THESE SIGNALS HAVE A MIN_LINE_WIDTH=0.25MM
AND MIN_NECK_WIDTH=0.2MM
PLACE CLOSE
TO U2900
PLACE AT BOARD EDGE
100UA CURRENT SOURCE
XW3600, R3602, AND DS3602 MUST BE PLACED CLOSE TO SMU
BUFFER
NEED TO CONNECT TO P65 OF 80PIN SMU OR PIN 49 OF 64PIN SMU
NEEDED FOR FMAX
NC
POWER MONITOR
10V
20%
805
CERM
2.2UF
2
1
C3600
805
CERM
10V
20%
2.2UF
2
1
C3601
200
1/10W
MF-LF
1%
603
2
1
R3601
2.5V
SSOT-23
NOSTUFF
3
12
D3600
CERM
10V
20%
0.47UF
603
2
1
C3602
SOT23-5
LMV2011
2
5
1
4
3
U3601
OMIT
SM
21
XW3601
603
2
5%
1/10W
MF-LF
21
R3602
10V
CERM
20%
805
2.2UF
2
1
C3603
805
20%
CERM
10V
2.2UF
2
1
C3604
10V
CERM
20%
805
2.2UF
2
1
C3605
0.1%
1/16W
603
MF-LF
10.0K
21
R3603
0.1%
MF-LF
603
20.0K
1/16W
21
R3604
MF-LF
0.1%
1/16W
603
10.0K
21
R3605
0.1%
1/16W
603
MF-LF
10.0K
21
R3606
20.0K
1/16W
0.1%
603
MF-LF
21
R3607
12.7K
MF-LF
603
1%
1/10W
2
1
R3608
LMV2011
SOT23-5
2
5
1
4
3
U3602
SOT23-5
LMV2011
2
5
1
4
3
U3603
0.1%
1/16W
MF-LF
10.0K
603
21
R3609
0.1%
1/16W
603
10.0K
MF-LF
21
R3610
603
100K
0.1%
MF-LF
1/16W
21
R3611
603
40.2K
MF-LF
1/16W
0.1%
21
R3612
603
40.2K
0.1%
1/16W
MF-LF
TD4
21
R3613
603
100K
0.1%
MF-LF
1/16W
21
R3614
0.0022UF
CERM
50V
402
10%
2
1
C3606
402
1/16W
MF-LF
5%
0
2
1
R3615
1K
402
MF-LF
1%
1/16W
NOSTUFF
2
1
R3616
CERM
20%
805
10UF
6.3V
21
C3607
6.3V
10UF
CERM
20%
805
21
C3608
0.0022UF
CERM
50V
10%
402
2
1
C3610
NOSTUFF
MF-LF
805
5%
1/8W
0
2
1
R3619
51
402
5%
MF-LF
1/16W
NOSTUFF
21
R3620
1/16W
5%
51
MF-LF
402
NOSTUFF
21
R3621
NOSTUFF
BM12B-SRSS-TB
F-ST-SM
9
8
7
6
5
4
3
2
12
11
10
1
13
14
J3600
100K
1/16W
MF-LF
5%
402
21
R3628
CERM
6.3V
20%
10UF
805
2
1
C3613
OMIT
SM
21
XW3611
SM
OMIT
21
XW3612
OMIT
SM
21
XW3613
SM
OMIT
21
XW3614
402
1/16W
5%
0
MF-LF
21
R3690
402
MF-LF
1/16W
0
5%
NOSTUFF
21
R3691
SOD-123
B0530WXF
NOSTUFF
21
DS3602
B0530WXF
NOSTUFF
SOD-123
2
1
DS3650
1/10W
MF-LF
5%
0
603
2
1
R3650
NCV1009D
SO-8
6
8
7
3
2
1
4
5
U3650
102
36
051-6772
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
CPU DIODE CONDITIONER
KPVDD2_FMAX
DIFFERENTIAL_PAIR=KP2_FMAX
NET_SPACING_TYPE=PROC_DIFF
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.25MM
NET_SPACING_TYPE=PROC_DIFF
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.25MM
DIFFERENTIAL_PAIR=KP2_FMAX
KPGND2_FMAX
TDIODE_NEG_FMAX
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PROC_DIFF
DIFFERENTIAL_PAIR=TDIODE
DAVDD
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.25MM
=PP5V_PWRON_CPU
DAGND
ADC_REF
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
PP3V3_CPU_DIODE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
=PP3V3_ALL_CPU
=PP3V3_PWRON_CPU
GND_SMU_AVSS_DAGND
PPVREF_SMU_ADC_REF
CPU_TEMP_R
DAGND
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
=PP5V_ALL_CPU
DAGND
DAGND
GND_SMU_AVSS
CPU_TEMP
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
FMAXT_M
DIFFERENTIAL_PAIR=P_FMAXT
NET_SPACING_TYPE=PROC_DIFF
DAVDD
DAVDD
DAGND
ADC_REF
ADC_REF
NET_SPACING_TYPE=PROC_DIFF
DIFFERENTIAL_PAIR=P_FMAXT
FMAXT_P
DAGND
=PPVCORE_CPU
ADC_REF
KPVDD2
KPGND2
TDIODE_POS
TDIODE_NEG
DAGND
CPU_TEMP
MIN_LINE_WIDTH=0.25MM
NET_SPACING_TYPE=PROC_DIFF
MIN_NECK_WIDTH=0.2MM
DIFFERENTIAL_PAIR=TDIODE
TDIODE_POS_FMAX
CORE_ISNS_P
DIFFERENTIAL_PAIR=CORE_ISNS
NET_SPACING_TYPE=PROC_DIFF
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
NET_SPACING_TYPE=PROC_DIFF
CORE_ISNS_M
DIFFERENTIAL_PAIR=CORE_ISNS
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
0.25MM
0.2MM
0.2MM
TD3
0.25MM
DAGND
DAGND
TD_CURRENT
DAVDD
TD_BUFFERED
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
TD1
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.25MM
TD2
CPU0_DIODE_POS
TDIODE_NEG
TDIODE_POS
CPU0_DIODE_NEG
32
33
31
33
33
36
36
13
36
29
31
31
36
31
36
33
33
31
36
6
6
6
36
7
36
36
7 7
8
8
36
7
36
36
8
13
36
36
36
36
36
36
7
36
6
6
31
6
36
13
6
6
6
36
36
36
6
31
Preliminary
Page 34
INTERFACE
DATA
MEMORY
DDR_DQ5
DDR_DQ0
DDR_DQ1
DDR_DQ2
DDR_DQ3
DDR_DQ4
DDR_DQ6
DDR_DQ7
DDR_DQ8
DDR_DQ9
DDR_DQ10
DDR_DQ11
DDR_DQ12
DDR_DQ13
DDR_DQ14
DDR_DQ15
DDR_DQ16
DDR_DQ26
DDR_DQ25
DDR_DQ24
DDR_DQ23
DDR_DQ22
DDR_DQ21
DDR_DQ20
DDR_DQ19
DDR_DQ18
DDR_DQ17
DDR_DQ36
DDR_DQ35
DDR_DQ34
DDR_DQ33
DDR_DQ32
DDR_DQ31
DDR_DQ30
DDR_DQ29
DDR_DQ28
DDR_DQ27
DDR_DQ46
DDR_DQ45
DDR_DQ44
DDR_DQ43
DDR_DQ42
DDR_DQ41
DDR_DQ40
DDR_DQ39
DDR_DQ38
DDR_DQ37
DDR_DQ47
DDR_DQ48
DDR_DQ49
DDR_DQ50
DDR_DQ51
DDR_DQ52
DDR_DQ53
DDR_DQ54
DDR_DQ55
DDR_DQ56
DDR_DQ57
DDR_DQ58
DDR_DQ59
DDR_DQ60
DDR_DQ61
DDR_DQ62
DDR_DQ63
VDD_DDR
(SYM 2 OF 7)
DDR_DQ64
DDR_DQ65
DDR_DQ69
DDR_DQ68
DDR_DQ67
DDR_DQ66
DDR_DQ70
DDR_DQ74
DDR_DQ73
DDR_DQ72
DDR_DQ71
DDR_DQ75
DDR_DQ79
DDR_DQ78
DDR_DQ77
DDR_DQ76
DDR_DQ80
DDR_DQ81
DDR_DQ82
DDR_DQ83
DDR_DQ85
DDR_DQ84
DDR_DQ90
DDR_DQ89
DDR_DQ88
DDR_DQ87
DDR_DQ86
DDR_DQ95
DDR_DQ94
DDR_DQ93
DDR_DQ92
DDR_DQ91
DDR_DQ99
DDR_DQ98
DDR_DQ97
DDR_DQ96
DDR_DQ100
DDR_DQ104
DDR_DQ105
DDR_DQ106
DDR_DQ107
DDR_DQ108
DDR_DQ109
DDR_DQ110
DDR_DQ103
DDR_DQ102
DDR_DQ101
DDR_DQ111
DDR_DQ112
DDR_DQ113
DDR_DQ114
DDR_DQ115
DDR_DQ116
DDR_DQ117
DDR_DQ118
DDR_DQ119
DDR_DQ120
DDR_DQ121
DDR_DQ127
DDR_DQ126
DDR_DQ125
DDR_DQ124
DDR_DQ123
DDR_DQ122
DDR_VREF7
DDR_VREF6
DDR_VREF5
DDR_VREF4
DDR_VREF3
INTERFACE
CONTROL
MEMORY
DDR
CLK_AVDD
VDD_DDR
(SYM 3 OF 7)
DDR_CK_D
DDR_CK_CN
DDR_CK_C
DDR_CK_BN
DDR_CK_B
DDR_CK_AN
DDR_CK_A
DDR_CK_DN
DDR_CK_EN
DDR_CK_FN
DDR_CK_F
DDR_CK_E
DDR_CLKP
DDR_CKE7
DDR_CKE6
DDR_CKE5
DDR_CKE4
DDR_CKE3
DDR_CKE1
DDR_CKE2
DDR_CKE0
DDR_VREF1
DDR_RAS
DDR_CAS
DDR_WE
DDR_BA1
DDR_BA0
DDR_MUXEN0
DDR_MAD5
DDR_MAD4
DDR_MAD3
DDR_MAD2
DDR_MAD1
DDR_MAD0
DDR_MUXEN4
DDR_MAD9
DDR_MAD8
DDR_MAD6
DDR_MAD7
DDR_MAD13
DDR_MAD12
DDR_MAD11
DDR_MAD10
DDR_CS1
DDR_CS0
DDR_CS2
DDR_CS8
DDR_CS3
DDR_CS11
DDR_CS10
DDR_CS9
DDR_DQSP1
DDR_DQSP0
DDR_DQSP2
DDR_DQSP3
DDR_DQSP8
DDR_DQSP7
DDR_DQSP6
DDR_DQSP9
DDR_DQSP10
DDR_DQSP11
DDR_DQSP12
DDR_DQSP4
DDR_DQSP5
DDR_DQSP13
DDR_DQSP15
DDR_DQSP14
DDR_CLK_AVSS
DDR_VREF2
DDR_VREF0
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
U3TWINS DO NOT HAVE MASKS
402
0.1UF
20%
10V
CERM
2
1
C3713
CERM
10V
20%
0.1UF
402
2
1
C3712
402
0.1UF
20%
10V
CERM
2
1
C3711
CERM
10V
20%
0.1UF
402
2
1
C3710
402
0.1UF
20%
10V
CERM
2
1
C3709
CERM
10V
20%
0.1UF
402
2
1
C3708
402
0.1UF
20%
10V
CERM
2
1
C3707
CERM
10V
20%
0.1UF
402
2
1
C3706
402
0.1UF
20%
10V
CERM
2
1
C3705
CERM
10V
20%
0.1UF
402
2
1
C3704
402
0.1UF
20%
10V
CERM
2
1
C3703
CERM
10V
20%
0.1UF
402
2
1
C3702
402
0.1UF
20%
10V
CERM
2
1
C3701
10V
20%
402
CERM
0.1UF
2
1
C3700
CERM
10V
20%
0.1UF
402
2
1
C3714
CERM
10V
20%
0.1UF
402
2
1
C3729
402
0.1UF
20%
10V
CERM
2
1
C3728
CERM
10V
20%
0.1UF
402
2
1
C3727
402
0.1UF
20%
10V
CERM
2
1
C3726
CERM
10V
20%
0.1UF
402
2
1
C3725
402
0.1UF
20%
10V
CERM
2
1
C3724
402
0.1UF
20%
10V
CERM
2
1
C3722
CERM
10V
20%
0.1UF
402
2
1
C3721
402
0.1UF
20%
10V
CERM
2
1
C3720
CERM
10V
20%
0.1UF
402
2
1
C3719
402
0.1UF
20%
10V
CERM
2
1
C3718
CERM
10V
20%
0.1UF
402
2
1
C3717
402
0.1UF
20%
10V
CERM
2
1
C3716
10V
20%
402
CERM
0.1UF
2
1
C3715
402
0.1UF
20%
10V
CERM
2
1
C3731
CERM
10V
20%
0.1UF
402
2
1
C3732
CERM
10V
20%
0.1UF
402
2
1
C3733
CERM
10V
20%
0.1UF
402
2
1
C3734
CERM
10V
20%
0.1UF
402
2
1
C3735
CERM
10V
20%
0.1UF
402
2
1
C3730
CERM
10V
20%
0.1UF
402
2
1
C3736
CERM
10V
20%
0.1UF
402
2
1
C3737
402
0.1UF
20%
10V
CERM
2
1
C3738
402
0.1UF
20%
10V
CERM
2
1
C3739
402
0.1UF
20%
10V
CERM
2
1
C3740
402
0.1UF
20%
10V
CERM
2
1
C3742
402
0.1UF
20%
10V
CERM
2
1
C3743
5%
603
MF-LF
1/10W
2.2
21
R3702
0.1UF
20%
10V
CERM
402
2
1
C3744
402
MF-LF
1%
1K
1/16W
2
1
R3700
CERM
10%
1UF
402
6.3V
2
1
C3745
402
20%
10V
CERM
0.1UF
2
1
C3746
10V
402
0.1UF
20%
CERM
2
1
C3747
402
0.1UF
20%
10V
CERM
2
1
C3748
MF-LF
1/16W
1%
1K
402
2
1
R3701
PBGA
OMIT
V1.0-300MM
U3LITE
AA16
AA13
AB25
AC19
AE27
AE22
AE16
AE13
V20
W27
W23
Y19
Y16
AG25
AG19
P27
R28
R26
R27
U26
T28
V28
U27
W28
V24
AH25
V27
V26
Y24
Y28
Y25
Y26
AA28
AA24
AA26
AA27
AH26
AD27
AC27
AC25
AC26
AF27
AD26
AE28
AF28
AG28
AD25
AD21
AD24
AF26
AG26
AE24
AF24
AG27
H22
G21
H21
J21
AD23
H23
E23
J22
F24
A26
B28
A28
A27
A24
A23
AC21
B23
B24
C23
C24
A25
A22
C27
C26
D24
D23
AB20
J23
L23
L22
M24
P22
P21
M23
M25
P23
P24
AG21
R24
P26
U23
R21
R22
P25
U22
V22
V23
U24
AH21
AA22
Y22
AA23
U25
AH28
AF23
AG24
E24
E25
C28
D28
E26
F26
E27
E28
AH27
H26
F27
H24
H25
G28
J26
J24
J25
L24
J27
AH23
H28
H27
K28
L27
L26
L25
P28
L28
N28
M28
AH24
AH22
AF20
U3
OMIT
V1.0-300MM
U3LITE
PBGA
B25
D27
D22
F19
G25
K27
K23
K19
M19
N25
N21
P20
T25
T21
T19
AC23
J20
V21
M21
AA21
H20
L21
U21
Y21
AE21
AH18
AH16
AF15
AG15
AC12
AD12
AE12
AF12
AH15
AH14
AG17
AH17
AG14
AF14
AH13
AG12
AD28
AE23
F23
B27
B26
M22
R23
Y23
F25
F28
J28
M27
U28
Y27
AG23
AC24
AD18
AC18
AH20
AG20
AH19
AG18
AE18
AF18
AA20
AB21
AC20
AB15
AA15
AC15
AD15
AD14
AC14
AE14
AE15
AA14
AB14
AB12
AA12
AA18
AB18
AA17
AB17
AF17
AE17
AD17
AC17
AD20
AE20
AF21
U3
11
37
102
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
U3LITE MEMORY
RAM_CKE_R<5>
RAM_DQ_R<92>
RAM_DQ_R<93>
RAM_DQ_R<90>
RAM_DQ_R<86>
RAM_DQ_R<87>
RAM_DQ_R<88>
RAM_DQ_R<89>
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM
VOLTAGE=1.25V
PP1V25_PWRON_RAM_VREF_NB
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
RAM_CLK_E_N_R
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=1.5V
PP1V5_PWRON_RAM_NB_AVDD
RAM_DQ_R<64>
RAM_DQ_R<71>
RAM_DQ_R<75>
RAM_DQS_R<15>
RAM_DQS_R<14>
RAM_DQS_R<13>
RAM_DQS_R<11>
RAM_DQS_R<9>
RAM_DQS_R<10>
RAM_DQS_R<8>
RAM_DQS_R<7>
RAM_DQS_R<6>
RAM_DQS_R<5>
RAM_DQS_R<4>
RAM_DQS_R<3>
RAM_DQS_R<2>
RAM_DQS_R<1>
RAM_DQS_R<0>
RAM_CS_L_R<9>
RAM_CS_L_R<8>
RAM_CS_L_R<1>
RAM_CS_L_R<0>
RAM_A_R<13>
RAM_A_R<12>
RAM_A_R<11>
RAM_A_R<10>
RAM_A_R<9>
RAM_A_R<8>
RAM_A_R<7>
RAM_A_R<3>
RAM_A_R<4>
RAM_A_R<2>
RAM_A_R<1>
RAM_A_R<0>
RAM_BA_R<0>
RAM_WE_L_R
RAM_CAS_L_R
RAM_RAS_L_R
RAM_DQ_R<127>
RAM_DQ_R<126>
RAM_DQ_R<124>
RAM_DQ_R<125>
RAM_DQ_R<121>
RAM_DQ_R<123>
RAM_DQ_R<122>
RAM_DQ_R<119>
RAM_DQ_R<120>
RAM_DQ_R<117>
RAM_DQ_R<118>
RAM_DQ_R<116>
RAM_DQ_R<114>
RAM_DQ_R<115>
RAM_DQ_R<111>
RAM_DQ_R<113>
RAM_DQ_R<112>
RAM_DQ_R<110>
RAM_DQ_R<109>
RAM_DQ_R<108>
RAM_DQ_R<107>
RAM_DQ_R<104>
RAM_DQ_R<105>
RAM_DQ_R<103>
RAM_DQ_R<101>
RAM_DQ_R<102>
RAM_DQ_R<99>
RAM_DQ_R<98>
RAM_DQ_R<100>
RAM_DQ_R<96>
RAM_DQ_R<97>
RAM_DQ_R<94>
RAM_DQ_R<95>
RAM_DQ_R<91>
RAM_DQ_R<85>
RAM_DQ_R<84>
RAM_DQ_R<83>
RAM_DQ_R<81>
RAM_DQ_R<80>
RAM_DQ_R<82>
RAM_DQ_R<79>
RAM_DQ_R<76>
RAM_DQ_R<77>
RAM_DQ_R<74>
RAM_DQ_R<73>
RAM_DQ_R<70>
RAM_DQ_R<72>
RAM_DQ_R<69>
RAM_DQ_R<68>
RAM_DQ_R<65>
RAM_DQ_R<67>
RAM_DQ_R<59>
RAM_DQ_R<0>
RAM_DQ_R<5>
RAM_DQ_R<3>
RAM_DQ_R<2>
RAM_DQ_R<4>
RAM_DQ_R<10>
RAM_DQ_R<6>
RAM_DQ_R<7>
RAM_DQ_R<8>
RAM_DQ_R<9>
RAM_DQ_R<11>
RAM_DQ_R<15>
RAM_DQ_R<12>
RAM_DQ_R<13>
RAM_DQ_R<14>
RAM_DQ_R<16>
RAM_DQ_R<21>
RAM_DQ_R<20>
RAM_DQ_R<19>
RAM_DQ_R<17>
RAM_DQ_R<18>
RAM_DQ_R<26>
RAM_DQ_R<22>
RAM_DQ_R<23>
RAM_DQ_R<24>
RAM_DQ_R<25>
RAM_DQ_R<31>
RAM_DQ_R<27>
RAM_DQ_R<28>
RAM_DQ_R<29>
RAM_DQ_R<30>
RAM_DQ_R<36>
RAM_DQ_R<32>
RAM_DQ_R<33>
RAM_DQ_R<34>
RAM_DQ_R<35>
RAM_DQ_R<41>
RAM_DQ_R<37>
RAM_DQ_R<38>
RAM_DQ_R<39>
RAM_DQ_R<40>
RAM_DQ_R<46>
RAM_DQ_R<45>
RAM_DQ_R<44>
RAM_DQ_R<43>
RAM_DQ_R<42>
RAM_DQ_R<51>
RAM_DQ_R<47>
RAM_DQ_R<48>
RAM_DQ_R<49>
RAM_DQ_R<52>
RAM_DQ_R<56>
RAM_DQ_R<55>
RAM_DQ_R<54>
RAM_DQ_R<53>
RAM_DQ_R<57>
RAM_DQ_R<60>
RAM_DQ_R<58>
RAM_DQ_R<61>
RAM_DQ_R<62>
RAM_DQ_R<63>
RAM_DQ_R<1>
RAM_DQ_R<66>
RAM_CKE_R<7>
RAM_BA_R<1>
RAM_MUXEN4
RAM_MUXEN0
RAM_CS_L_R<3>
RAM_CS_L_R<2>
RAM_CS_L_R<11>
RAM_CS_L_R<10>
RAM_CKE_R<1>
RAM_CLK_F_P_R
RAM_CLK_E_P_R
RAM_CKE_R<0>
RAM_CKE_R<4>
RAM_CKE_R<6>
RAM_CKE_R<3>
RAM_CLK_D_N_R
RAM_CLK_C_N_R
RAM_CLK_D_P_R
RAM_CLK_C_P_R
RAM_CLK_A_N_R
RAM_CLK_B_N_R
RAM_CLK_B_P_R
=PP1V5_PWRON_NB_AVDD
RAM_CKE_R<2>
RAM_DQ_R<78>
RAM_A_R<5>
RAM_CLK_A_P_R
RAM_CLK66M_NB
RAM_A_R<6>
RAM_DQS_R<12>
RAM_CLK_F_N_R
RAM_DQ_R<106>
RAM_DQ_R<50>
46
46
46
46
40
40
40
40
60
37
37
37
37
48
26
26
26
26
28
38
38
38
38
38
38
38
38
7
7
7
7
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
8
38
8
8
8
8
8
8
38
38
38
38
38
8
8
38
38
38
38
38
38
38
7
8
38
38
38
27
38
38
38
38
38
Preliminary
Page 35
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
ALL R PACKS ARE 1/16W 5%
ELECTRICAL_CONSTRAINT_SET
NET_PHYSICAL_TYPE
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
RAM_CLK LINE-LINE SPACING SET TO 15MIL
TOTAL LENGTH TOLERENCE = 20PS = 2.82MM
RAM_CAD SPACING IS 10MIL
THE FOLLOWING ARE 0402 5% RESISTORS
THE FOLLOWING IS A SWAPPABLE GROUP
THE FOLLOWING IS A SWAPPABLE GROUP
RAM_CLK PRIMARY SPACING SET BASED ON DIFF IMPEDANCE
22
72
RP3818
22
81
RP3818
22
63
RP3826
22
54
RP3807
22
63
RP3807
22
81
RP3826
22
81
RP3807
22
81
RP3811
22
72
RP3811
22
54
RP3811
22
72
RP3814
22
81
RP3814
22
63
RP3817
22
54
RP3814
22
63
RP3814
22
63
RP3811
22
72
RP3830
22
54
RP3830
22
63
RP3830
22
81
RP3830
22
72
RP3812
22
54
RP3812
22
63
RP3812
22
54
RP3817
22
81
RP3813
22
81
RP3812
22
54
RP3831
22
72
RP3831
22
72
RP3813
22
81
RP3831
22
63
RP3831
22
63
RP3813
22
54
RP3813
15
63
RP3832
22
72
RP3802
15
54
RP3832
15
72
RP3832
15
63
RP3833
15
54
RP3800
15
72
RP3833
15
81
RP3833
15
81
RP3834
15
72
RP3834
15
63
RP3800
15
72
RP3800
22
81
RP3817
15
81
RP3832
15
54
RP3833
15
81
RP3800
15
81
RP3804
15
54
RP3804
15
63
RP3804
15
63
RP3834
15
72
RP3804
15
54
RP3834
22
81
RP3802
22
63
RP3802
15
63
RP3841
15
81
RP3841
15
54
RP3841
15
72
RP3841
15
81
RP3842
22
72
RP3806
15
72
RP3842
15
54
RP3842
15
63
RP3842
22
81
RP3821
15
21
R3800
15
21
R3801
22
54
RP3821
15
21
R3802
15
21
R3803
15
21
R3804
15
21
R3805
15
21
R3806
15
21
R3807
15
21
R3808
15
21
R3809
15
21
R3810
15
21
R3811
22
72
RP3805
22
72
RP3821
15
21
R3812
15
21
R3813
15
21
R3814
15
21
R3815
I206
I207
I208
I209
22
81
RP3806
I210
I211
I212
I213
I214
I215
I216
I217
I218
I219
22
63
RP3806
I220
I221
I222
I223
I224
I225
I226
I227
I228
I229
22
63
RP3821
I230
I232
I234
I235
I236
I237
I238
22
54
RP3806
I241
I242
I243
I244
I245
I246
I248
22
63
RP3819
I251
I252
I253
I254
I255
I256
I257
I258
I259
22
81
RP3819
I260
I261
I262
I263
I264
I265
I266
I267
I268
I269
22
54
RP3803
I270
I271
I272
I273
I274
I275
I276
I277
I278
I279
22
54
RP3819
I280
15
21
R3816
15
21
R3817
15
21
R3818
15
21
R3819
15
21
R3820
15
21
R3821
15
21
R3822
15
21
R3823
15
21
R3824
22
72
RP3803
15
21
R3825
15
21
R3826
15
21
R3827
I293
I294
I295
I296
I297
I298
I299
22
54
RP3818
22
63
RP3803
I300
I301
I302
I303
I304
I305
22
72
RP3819
22
81
RP3803
22
54
RP3820
22
63
RP3820
22
72
RP3820
22
81
RP3820
22
72
RP3825
22
63
RP3825
22
81
RP3825
22
81
RP3805
22
54
RP3825
22
81
RP3809
22
63
RP3809
22
72
RP3809
22
72
RP3829
22
54
RP3829
22
63
RP3829
22
54
RP3809
22
81
RP3829
22
54
RP3828
22
63
RP3818
22
72
RP3815
22
81
RP3815
22
81
RP3828
22
63
RP3815
22
63
RP3828
22
72
RP3828
22
54
RP3815
22
63
RP3827
22
72
RP3827
22
54
RP3827
22
54
RP3805
22
72
RP3810
22
81
RP3827
22
54
RP3810
22
81
RP3810
22
63
RP3810
22
54
RP3836
22
72
RP3836
22
81
RP3836
22
63
RP3836
22
72
RP3816
22
54
RP3802
22
81
RP3816
22
63
RP3816
22
54
RP3835
22
54
RP3816
22
63
RP3801
22
81
RP3801
22
54
RP3801
22
72
RP3801
22
72
RP3835
22
63
RP3835
22
72
RP3817
22
81
RP3835
22
81
RP3822
22
72
RP3822
22
54
RP3822
22
63
RP3823
22
63
RP3822
22
54
RP3823
22
81
RP3823
22
72
RP3823
22
81
RP3808
22
63
RP3805
22
72
RP3824
22
63
RP3808
22
54
RP3808
22
81
RP3824
22
72
RP3808
22
63
RP3824
22
54
RP3824
22
72
RP3826
22
54
RP3826
22
72
RP3807
051-6772
102
38
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
SERIES TERM
RAM_CAD RAM_CAD
RAM_CS_L<9>
RAM_CKECS1
RAM_CAD
RAM_DQ<127..0>
RAM_CAD
RAM_CAD
RAM_DQS0
RAM_DQS<0>
RAM_CAD
RAM_CAD
RAM_DQS0
RAM_DQ<7..0>
RAM_CAD
RAM_CAD
RAM_DQS_R<15..0>
RAM_CAD
RAM_CLK_F_N
RAM_CLK
RAM_CLK_F
RAM_CLK1
RAM_CLK
RAM_CLK_F
RAM_CLK
RAM_CLK_F_P
RAM_CLK1
RAM_CLK
RAM_CLK_D
RAM_CLK
RAM_CLK_D_P
RAM_CLK1
RAM_CLK
RAM_CLK0
RAM_CLK
RAM_CLK_B_P
RAM_CLK_B
RAM_CLK
RAM_CAD RAM_CAD
RAM_CS_L<8>
RAM_CKECS1
RAM_CLK
RAM_CLK_D_N_R
RAM_CLK_D_R
RAM_CLK
RAM_CLK_C
RAM_CLK
RAM_CLK_C_P
RAM_CLK0
RAM_CLK
RAM_CAD RAM_CAD
RAM_CKE_R<5..4>
RAM_CLK
RAM_CLK_E
RAM_CLK_E_N
RAM_CLK1
RAM_CLK
RAM_CLK
RAM_CLK_D_N
RAM_CLK_D
RAM_CLK1
RAM_CLK
RAM_CLK
RAM_CLK_D_P_R
RAM_CLK_D_R
RAM_CLK
RAM_CLK
RAM_CLK_E_P_R
RAM_CLK_E_R
RAM_CLK
RAM_CLK
RAM_CLK_E_N_R
RAM_CLK_E_R
RAM_CLK
RAM_CLK0
RAM_CLK_B
RAM_CLK
RAM_CLK_B_N
RAM_CLK
RAM_CAD RAM_CAD
RAM_CKE_R<1..0>
RAM_CAD RAM_CAD
RAM_CKE<1>
RAM_CKECS0
RAM_CAD RAM_CAD
RAM_CKE<4>
RAM_CKECS1
RAM_CAD RAM_CAD
RAM_CKE<5>
RAM_CKECS1
RAM_CAD RAM_CAD
RAM_CS_L_R<9..8>
RAM_CAD
RAM_CKECS0
RAM_CAD
RAM_CS_L<1>
RAM_CLK_A_P_R
RAM_CLK
RAM_CLK_A_R
RAM_CLK
RAM_CLK
RAM_CLK_A_N_R
RAM_CLK_A_R
RAM_CLK
RAM_CLK
RAM_CLK_B_P_R
RAM_CLK_B_R
RAM_CLK
RAM_CLK
RAM_CLK_B_N_R
RAM_CLK_B_R
RAM_CLK
RAM_CLK_C_P_R
RAM_CLK
RAM_CLK_C_R
RAM_CLK
RAM_CLK
RAM_CLK_C_N_R
RAM_CLK_C_R
RAM_CLK
RAM_DQ_R<42>
RAM_DQ<40>
RAM_DQ<68>
RAM_DQ<65>
RAM_DQ<75>
RAM_DQ<66>
RAM_DQ<70>
RAM_DQ<69>
RAM_DQ<71>
RAM_DQ<64>
RAM_DQ<67>
RAM_DQ<74>
RAM_DQ<73>
RAM_DQ<72>
RAM_DQ<79>
RAM_DQ<78>
RAM_DQ<77>
RAM_DQ<76>
RAM_DQ<87>
RAM_DQ<81>
RAM_DQ<86>
RAM_DQ<80>
RAM_DQ<84>
RAM_DQ<85>
RAM_DQ<83>
RAM_DQ<89>
RAM_DQ<82>
RAM_DQ<91>
RAM_DQ<93>
RAM_DQ<88>
RAM_DQ<90>
RAM_DQ<94>
RAM_DQ<92>
RAM_DQ<95>
RAM_DQ<103>
RAM_DQ<96>
RAM_DQ<98>
RAM_DQ<97>
RAM_DQ<100>
RAM_DQ<99>
RAM_DQ<102>
RAM_DQ<101>
RAM_DQ<111>
RAM_DQ<106>
RAM_DQ<105>
RAM_DQ<118>
RAM_DQ<115>
RAM_DQ<107>
RAM_DQ<108>
RAM_DQ<110>
RAM_DQ<104>
RAM_DQ<109>
RAM_DQ<119>
RAM_DQ<112>
RAM_DQ<117>
RAM_DQ<116>
RAM_DQ<113>
RAM_DQ<114>
RAM_DQ<121>
RAM_DQ<124>
RAM_DQ<120>
RAM_DQ<123>
RAM_DQ<125>
RAM_DQ<122>
RAM_DQ<126>
RAM_DQ<127>
RAM_DQ_R<106>
RAM_DQ_R<111>
RAM_DQ_R<68>
RAM_DQ_R<70>
RAM_DQ_R<69>
RAM_DQ_R<71>
RAM_DQ_R<64>
RAM_DQ_R<67>
RAM_DQ_R<74>
RAM_DQ_R<75>
RAM_DQ_R<73>
RAM_DQ_R<72>
RAM_DQ_R<79>
RAM_DQ_R<78>
RAM_DQ_R<77>
RAM_DQ_R<76>
RAM_DQ_R<87>
RAM_DQ_R<81>
RAM_DQ_R<86>
RAM_DQ_R<80>
RAM_DQ_R<84>
RAM_DQ_R<85>
RAM_DQ_R<83>
RAM_DQ_R<93>
RAM_DQ_R<88>
RAM_DQ_R<90>
RAM_DQ_R<94>
RAM_DQ_R<103>
RAM_DQ_R<96>
RAM_DQ_R<98>
RAM_DQ_R<97>
RAM_DQ_R<99>
RAM_DQ_R<102>
RAM_DQ_R<108>
RAM_DQ_R<105>
RAM_DQ_R<110>
RAM_DQ_R<104>
RAM_DQ_R<109>
RAM_DQ_R<119>
RAM_DQ_R<112>
RAM_DQ_R<117>
RAM_DQ_R<118>
RAM_DQ_R<116>
RAM_DQ_R<115>
RAM_DQ_R<113>
RAM_DQ_R<114>
RAM_DQ_R<121>
RAM_DQ_R<124>
RAM_DQ_R<120>
RAM_DQ_R<125>
RAM_DQ_R<122>
RAM_DQ_R<126>
RAM_DQ_R<65>
RAM_DQ_R<66>
RAM_DQ_R<95>
RAM_DQ_R<123>
RAM_DQ_R<127>
RAM_DQ_R<82>
RAM_DQ_R<91>
RAM_DQ_R<89>
RAM_DQ_R<92>
RAM_DQ_R<100>
RAM_DQ_R<101>
RAM_DQ_R<107>
RAM_DQ<2>
RAM_DQ<7>
RAM_DQ<9>
RAM_DQ<10>
RAM_DQ<14>
RAM_DQ<12>
RAM_DQ<22>
RAM_DQ<6>
RAM_DQ<8>
RAM_DQ<17>
RAM_DQ<19>
RAM_DQ<18>
RAM_DQ<20>
RAM_DQ<16>
RAM_DQ<1>
RAM_DQ<11>
RAM_DQ<13>
RAM_DQ<15>
RAM_DQ<21>
RAM_DQ<3>
RAM_DQ<0>
RAM_DQ<4>
RAM_DQ<5>
RAM_DQ_R<7>
RAM_DQ_R<2>
RAM_DQ_R<22>
RAM_DQ_R<18>
RAM_DQ_R<8>
RAM_DQ_R<15>
RAM_DQ_R<17>
RAM_DQ_R<20>
RAM_DQ_R<16>
RAM_DQ_R<21>
RAM_DQ_R<19>
RAM_DQ_R<0>
RAM_DQ_R<12>
RAM_DQ_R<13>
RAM_DQ_R<3>
RAM_DQ_R<4>
RAM_DQ_R<9>
RAM_DQ_R<1>
RAM_DQ_R<6>
RAM_DQ_R<5>
RAM_DQ_R<10>
RAM_DQ_R<11>
RAM_DQ_R<14>
RAM_DQ<27>
RAM_DQ<28>
RAM_DQ<38>
RAM_DQ<35>
RAM_DQ<23>
RAM_DQ<30>
RAM_DQ<24>
RAM_DQ<26>
RAM_DQ<31>
RAM_DQ<32>
RAM_DQ<39>
RAM_DQ<37>
RAM_DQ<34>
RAM_DQ<36>
RAM_DQ<33>
RAM_DQ<46>
RAM_DQ<47>
RAM_DQ<43>
RAM_DQ<25>
RAM_DQ<29>
RAM_DQ<60>
RAM_DQ<61>
RAM_DQ<57>
RAM_DQ<41>
RAM_DQ<45>
RAM_DQ<51>
RAM_DQ<50>
RAM_DQ<44>
RAM_DQ<42>
RAM_DQ<48>
RAM_DQ<53>
RAM_DQ<54>
RAM_DQ<52>
RAM_DQ<49>
RAM_DQ<56>
RAM_DQ<55>
RAM_DQ<63>
RAM_DQ<59>
RAM_DQ<58>
RAM_DQ<62>
RAM_DQ_R<24>
RAM_DQ_R<23>
RAM_DQ_R<30>
RAM_DQ_R<26>
RAM_DQ_R<27>
RAM_DQ_R<28>
RAM_DQ_R<31>
RAM_DQ_R<25>
RAM_DQ_R<29>
RAM_DQ_R<38>
RAM_DQ_R<32>
RAM_DQ_R<35>
RAM_DQ_R<39>
RAM_DQ_R<37>
RAM_DQ_R<34>
RAM_DQ_R<36>
RAM_DQ_R<33>
RAM_DQ_R<46>
RAM_DQ_R<47>
RAM_DQ_R<43>
RAM_DQ_R<51>
RAM_DQ_R<53>
RAM_DQ_R<60>
RAM_DQ_R<58>
RAM_DQ_R<61>
RAM_DQ_R<48>
RAM_DQ_R<49>
RAM_DQ_R<57>
RAM_DQ_R<41>
RAM_DQ_R<45>
RAM_DQ_R<40>
RAM_DQ_R<50>
RAM_DQ_R<44>
RAM_DQ_R<54>
RAM_DQ_R<52>
RAM_DQ_R<56>
RAM_DQ_R<55>
RAM_DQ_R<63>
RAM_DQ_R<59>
RAM_DQ_R<62>
RAM_CLK_F_N_R
RAM_CLK_E_N_R
RAM_CLK_F_P_R
RAM_A<4>
RAM_A<6>
RAM_A<12>
RAM_A<2>
RAM_A_R<2>
RAM_A_R<12>
RAM_A_R<7>
RAM_A_R<9>
RAM_A_R<8>
RAM_A<8>
RAM_A_R<4>
RAM_A_R<10>
RAM_A<1>
RAM_A<10>
RAM_BA_R<0>
RAM_BA_R<1>
RAM_RAS_L_R
RAM_A_R<5>
RAM_A_R<0>
RAM_CS_L_R<0>
RAM_CS_L_R<1>
RAM_CS_L_R<8>
RAM_A_R<1>
RAM_WE_L_R
RAM_A_R<6>
RAM_CKE_R<1>
RAM_CS_L_R<9>
RAM_CS_L<1>
RAM_CLK_C_N_R
RAM_CAD
RAM_DQS2
RAM_DQ<23..16>
RAM_CAD
RAM_CAD
RAM_DQS<2>
RAM_DQS2
RAM_CAD
RAM_RAS_L
RAM_A<9>
RAM_BA<1>
RAM_BA<0>
RAM_CAS_L
RAM_CAS_L_R
RAM_A<3>
RAM_A_R<3>
RAM_A<13>
RAM_A_R<13>
RAM_A<5>
RAM_A<0>
RAM_A<7>
RAM_WE_L
RAM_A<11>
RAM_A_R<11>
RAM_CS_L<0>
RAM_CS_L<9>
RAM_CS_L<8>
RAM_CKE<0>
RAM_CKE_R<0>
RAM_CKE<5>
RAM_CKE_R<5>
RAM_CKE<1>
RAM_CKE<4>
RAM_CKE_R<4>
RAM_CAD
RAM_CKECS0
RAM_CAD
RAM_CS_L<0>
RAM_CAD RAM_CAD
RAM_CS_L_R<1..0>
RAM_CAD RAM_CAD
RAM_CKE<0>
RAM_CKECS0
RAM_CLK
RAM_CLK_E_P
RAM_CLK_E
RAM_CLK1
RAM_CLK
RAM_CLK
RAM_CLK_C_N
RAM_CLK_C
RAM_CLK0
RAM_CLK
RAM_CLK
RAM_CLK_A
RAM_CLK_A_N
RAM_CLK0
RAM_CLK
RAM_CLK_A
RAM_CLK_A_P
RAM_CLK0
RAM_CLKRAM_CLK
RAM_CLK_F_N_R
RAM_CLK
RAM_CLK_F_R
RAM_CLK
RAM_CLK
RAM_CLK_F_P_R
RAM_CLK_F_R
RAM_CLK
RAM_CAD
RAM_DQ_R<127..0>
RAM_CAD
RAM_CAD
RAM_DQS<3>
RAM_DQS3
RAM_CAD
RAM_CAD
RAM_DQS4
RAM_DQ<39..32>
RAM_CAD
RAM_CAD
RAM_DQS<8>
RAM_DQS8
RAM_CAD
RAM_CAD
RAM_DQS9
RAM_DQ<79..72>
RAM_CAD
RAM_CAD
RAM_DQS10
RAM_DQ<87..80>
RAM_CAD
RAM_CAD
RAM_DQS1
RAM_DQ<15..8>
RAM_CAD
RAM_CAD
RAM_DQS8
RAM_DQ<71..64>
RAM_CAD
RAM_CAD
RAM_DQS<7>
RAM_DQS7
RAM_CAD
RAM_CAD
RAM_DQS6
RAM_DQ<55..48>
RAM_CAD
RAM_CAD
RAM_DQS<1>
RAM_DQS1
RAM_CAD
RAM_CAD
RAM_DQS3
RAM_DQ<31..24>
RAM_CAD
RAM_CAD
RAM_DQS12
RAM_DQ<103..96>
RAM_CAD
RAM_CAD
RAM_CAS_L_R
RAM_CAD
RAM_CAD
RAM_A_CTL
RAM_WE_L
RAM_CAD
RAM_CAD
RAM_DQS<4>
RAM_DQS4
RAM_CAD
RAM_DQS<0>
RAM_DQS_R<0>
RAM_DQS<1>
RAM_DQS_R<1>
RAM_DQS<2>
RAM_DQS_R<2>
RAM_DQS<3>
RAM_DQS_R<3>
RAM_DQS<5>
RAM_DQS_R<5>
RAM_DQS<4>
RAM_DQS_R<4>
RAM_DQS<6>
RAM_DQS_R<6>
RAM_DQS<8>
RAM_DQS_R<8>
RAM_DQS<7>
RAM_DQS_R<7>
RAM_DQS<10>
RAM_DQS_R<10>
RAM_DQS<9>
RAM_DQS_R<9>
RAM_DQS<11>
RAM_DQS_R<11>
RAM_DQS<12>
RAM_DQS_R<12>
RAM_DQS<13>
RAM_DQS_R<13>
RAM_DQS<14>
RAM_DQS_R<14>
RAM_DQS<15>
RAM_DQS_R<15>
RAM_CLK_B_P_R
RAM_CLK_B_N_R
RAM_CLK_C_P_R
RAM_CLK_D_P_R
RAM_CLK_D_N_R
RAM_CLK_E_P_R
RAM_CLK_A_P_R
RAM_CLK_A_N_R
RAM_CLK_A_P
RAM_CLK_A_N
RAM_CLK_B_P
RAM_CLK_B_N
RAM_CLK_C_P
RAM_CLK_C_N
RAM_CLK_D_P
RAM_CLK_D_N
RAM_CLK_E_P
RAM_CLK_E_N
RAM_CLK_F_P
RAM_CLK_F_N
RAM_CAD
RAM_DQS<5>
RAM_DQS5
RAM_CAD
RAM_CAD
RAM_DQS5
RAM_DQ<47..40>
RAM_CAD
RAM_CAD
RAM_DQS<6>
RAM_DQS6
RAM_CAD
RAM_CAD
RAM_DQS7
RAM_DQ<63..56>
RAM_CAD
RAM_CAD
RAM_DQS9
RAM_DQS<9>
RAM_CAD
RAM_CAD
RAM_DQS10
RAM_DQS<10>
RAM_CAD
RAM_CAD
RAM_DQS11
RAM_DQS<11>
RAM_CAD
RAM_CAD
RAM_DQS11
RAM_DQ<95..88>
RAM_CAD
RAM_CAD
RAM_DQS12
RAM_DQS<12>
RAM_CAD
RAM_CAD
RAM_DQS13
RAM_DQS<13>
RAM_CAD
RAM_CAD
RAM_DQS13
RAM_DQ<111..104>
RAM_CAD
RAM_CAD
RAM_DQS14
RAM_DQS<14>
RAM_CAD
RAM_CAD
RAM_DQS14
RAM_DQ<119..112>
RAM_CAD
RAM_CAD
RAM_DQS15
RAM_DQ<127..120>
RAM_CAD
RAM_CAD
RAM_DQS15
RAM_DQS<15>
RAM_CAD
RAM_CAD
RAM_A_R<13..0>
RAM_CAD
RAM_CAD
RAM_BA_R<1..0>
RAM_CAD
RAM_CAD
RAM_RAS_L_R
RAM_CAD
RAM_CAD
RAM_WE_L_R
RAM_CAD
RAM_CAD
RAM_A_CTL
RAM_RAS_L
RAM_CAD
RAM_CAD
RAM_A_CTL
RAM_BA<1..0>
RAM_CAD
RAM_CAD
RAM_A_CTL
RAM_A<13..0>
RAM_CAD
RAM_CAD
RAM_A_CTL
RAM_CAS_L
RAM_CAD
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38 37
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38
Preliminary
Page 36
VREF
TOP SIDEBOT SIDE
DQ4
DQ5
VSS
VDDQ
DM0/DQS9
DQ7
VSS
DQ6
NC
NC
VSS
DQ1
DQ0
DQS0
NC
NC
DQ3
DQ2
VDD
DM1/DQS10
DQ12
VDDQ
A13
DQ13
VDDQ
CKE1
DQ14
DQ15
VDD
VDDQ
VSS
DQS1
DQ9
DQ8
DQ11
DQ10
CK1*
CK1
VSS
A12
VSS
DQ20
BA2
DQ21
DM2/DQS11
DQ22
VDD
A11
A8
VDDQ
CKE0
DQS2
DQ17
DQ16
VDDQ
A7
A9
DQ18
VSS
A6
DQ28
DQ23
VSS
DQ29
VDDQ
DM3/DQS12
A3
DQ30
VSS
VSS
A5
DQ25
DQ24
DQ19
DQS3
DQ27
A4
DQ26
VDD
A2 DQ31
NC
VDDQ
NC
CK0
CKO*
NC
VSS
A10
NC
NC
NC
A1
VSS
VDD
VSS
NC
A0
NC
NC VDDQ
VSS
NC
DQ36
DQ37
VDD
DM4/DQS13
VSS
DQ39
DQ38
DQ33
DQ32
BA1
VDDQ
DQS4
DQ35
DQ34
BA0
VSS
DQ40 DQ44
DQ45
VDDQ
RAS*
S0*
S1*
DM5/DQS14
VSS
DQ46
DQ47
DQ41
VDDQ
CAS*
WE*
VSS
VDD
DQ43
DQ42
DQS5
NC,S2* NC,S3*
DQ52
DQ53
VDDQ
VDD
NC,FETEN
DQ55
DQ54
DM6/DQS15
VDDQ
NC
DQ49
DQ48
CK2
CK2*
VSS
VSS
DQ50
DQS6
VDDQ
DQ51
VSS
DQ60
DQ61
DQ62
DM7/DQS16
SA0
SA1
VDDQ
DQ63
SA2
VDD
DQ56
DQS7
VDDID
DQ57
SDA
DQ59
DQ58
VSS
WP
SCL
VVDDSPD
VREF
TOP SIDEBOT SIDE
DQ4
DQ5
VSS
VDDQ
DM0/DQS9
DQ7
VSS
DQ6
NC
NC
VSS
DQ1
DQ0
DQS0
NC
NC
DQ3
DQ2
VDD
DM1/DQS10
DQ12
VDDQ
A13
DQ13
VDDQ
CKE1
DQ14
DQ15
VDD
VDDQ
VSS
DQS1
DQ9
DQ8
DQ11
DQ10
CK1*
CK1
VSS
A12
VSS
DQ20
BA2
DQ21
DM2/DQS11
DQ22
VDD
A11
A8
VDDQ
CKE0
DQS2
DQ17
DQ16
VDDQ
A7
A9
DQ18
VSS
A6
DQ28
DQ23
VSS
DQ29
VDDQ
DM3/DQS12
A3
DQ30
VSS
VSS
A5
DQ25
DQ24
DQ19
DQS3
DQ27
A4
DQ26
VDD
A2 DQ31
NC
VDDQ
NC
CK0
CKO*
NC
VSS
A10
NC
NC
NC
A1
VSS
VDD
VSS
NC
A0
NC
NC VDDQ
VSS
NC
DQ36
DQ37
VDD
DM4/DQS13
VSS
DQ39
DQ38
DQ33
DQ32
BA1
VDDQ
DQS4
DQ35
DQ34
BA0
VSS
DQ40 DQ44
DQ45
VDDQ
RAS*
S0*
S1*
DM5/DQS14
VSS
DQ46
DQ47
DQ41
VDDQ
CAS*
WE*
VSS
VDD
DQ43
DQ42
DQS5
NC,S2* NC,S3*
DQ52
DQ53
VDDQ
VDD
NC,FETEN
DQ55
DQ54
DM6/DQS15
VDDQ
NC
DQ49
DQ48
CK2
CK2*
VSS
VSS
DQ50
DQS6
VDDQ
DQ51
VSS
DQ60
DQ61
DQ62
DM7/DQS16
SA0
SA1
VDDQ
DQ63
SA2
VDD
DQ56
DQS7
VDDID
DQ57
SDA
DQ59
DQ58
VSS
WP
SCL
VVDDSPD
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
516-0086
NC
GND: VDD & VDDQ ARE DIFFERENT
PIN 82:
NC: VDD & VDDQ ARE THE SAME
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
SA1
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
SA0
SA1
SA2
V’S ADJACENT TO G’S FORBIDDEN
R’S ADJACENT TO V’S OR G’S
NC
NC
NC
NC
V
V
R
R
V
NC
NC
NC
NC
NC
NC
NC
NC
NC
SA2
NC
NC
NC
ADDR=0(A0/A1)
ADDR=1(A2/A3)
FETEN
NC
FETEN
NC
20%
10V
CERM
402
0.1UF
2
1
C4001
0.1UF
20%
10V
CERM
402
2
1
C4004
402
CERM
10V
20%
0.1UF
2
1
C4005
0.1UF
20%
10V
CERM
402
2
1
C4009
402
CERM
10V
20%
0.1UF
2
1
C4010
0.1UF
20%
10V
CERM
402
2
1
C4011
0.1UF
20%
10V
CERM
402
2
1
C4012
20%
10V
CERM
402
0.1UF
2
1
C4013
CERM
20%
10V
402
0.1UF
2
1
C4014
CERM
402
10V
20%
0.1UF
2
1
C4015
10V
CERM
402
20%
0.1UF
2
1
C4016
402
CERM
10V
20%
0.1UF
2
1
C4017
0.1UF
20%
10V
CERM
402
2
1
C4018
0.1UF
20%
10V
CERM
402
2
1
C4019
0.1UF
20%
10V
CERM
402
2
1
C4021
5%
1/16W
MF-LF
402
10K
21
R4006
0.1UF
20%
10V
CERM
402
2
1
C4023
20%
10V
CERM
402
0.1UF
2
1
C4024
0.1UF
20%
10V
CERM
402
2
1
C4025
CERM
10V
20%
402
0.1UF
2
1
C4026
10V
20%
402
0.1UF
CERM
2
1
C4029
0.1UF
20%
10V
CERM
402
2
1
C4030
20%
10V
CERM
402
0.1UF
2
1
C4032
0.1UF
20%
10V
CERM
402
2
1
C4033
402
MF-LF
1/16W
1%
150
2
1
R4008
1%
MF-LF
402
1/16W
150
2
1
R4010
603
CERM
6.3V
10%
1UF
2
1
C4035
0.1UF
20%
10V
CERM
402
2
1
C4037
CERM
10V
20%
402
0.1UF
2
1
C4038
402
0.1UF
20%
10V
CERM
2
1
C4039
20%
10V
CERM
402
0.1UF
2
1
C4040
CERM
10V
402
0.1UF
20%
2
1
C4041
20%
10V
CERM
402
0.1UF
2
1
C4042
0.1UF
20%
10V
CERM
402
2
1
C4043
20%
10V
CERM
402
0.1UF
2
1
C4044
0.1UF
20%
10V
CERM
402
2
1
C4045
20%
10V
CERM
402
0.1UF
2
1
C4046
402
CERM
10V
20%
0.1UF
2
1
C4047
0.1UF
20%
10V
CERM
402
2
1
C4048
0.1UF
20%
10V
CERM
402
2
1
C4049
0.1UF
20%
10V
CERM
402
2
1
C4050
10K
402
MF-LF
1/16W
5%
21
R4014
0.1UF
CERM
10V
20%
402
2
1
C4031
0.1UF
20%
10V
CERM
402
2
1
C4028
0.1UF
20%
10V
CERM
402
2
1
C4022
0.1UF
402
CERM
10V
20%
2
1
C4000
0.1UF
402
CERM
10V
20%
2
1
C4020
0.1UF
20%
10V
CERM
402
2
1
C4027
0.1UF
20%
10V
CERM
402
2
1
C4051
0.1UF
20%
10V
CERM
402
2
1
C4052
0.1UF
20%
10V
CERM
402
2
1
C4002
0.1UF
20%
10V
CERM
402
2
1
C4003
20%
10UF
6.3V
1206
CERM
2
1
C4036
CERM
1206
6.3V
10UF
20%
2
1
C4008
CERM
1206
6.3V
10UF
20%
2
1
C4006
20%
10UF
6.3V
1206
CERM
2
1
C4007
OMIT
F-28DEG-TH
DDR-DIMM-STD
90
63
184
66
58
50
42
34
26
18
176
160
152
11
145
139
132
124
116
100
93
89
81
74
3
1
112
104
96
77
62
54
30
22
180
172
164
156
143
136
128
15
82
148
120
108
85
70
46
38
168
7
91
92
183
182
181
158
157
154
101
71
51
49
47
45
44
10
173
167
163
144
142
140
135
134
102
9
86
78
67
56
36
25
14
5
13
12
99
179
178
175
174
98
88
87
84
83
171
170
166
165
80
79
95
73
72
162
161
155
153
69
68
64
61
94
151
150
147
146
60
57
55
53
133
131
8
127
126
40
39
35
33
123
121
117
114
6
31
28
24
23
110
109
106
105
20
19
4
2
177
169
159
149
129
119
107
97
111
21
75
76
17
16
138
137
65
113
52
59
27
122
29
125
32
37
130
41
103
115
118
141
43
48
J4000
DDR-DIMM-STD
F-28DEG-TH
OMIT
90
63
184
66
58
50
42
34
26
18
176
160
152
11
145
139
132
124
116
100
93
89
81
74
3
1
112
104
96
77
62
54
30
22
180
172
164
156
143
136
128
15
82
148
120
108
85
70
46
38
168
7
91
92
183
182
181
158
157
154
101
71
51
49
47
45
44
10
173
167
163
144
142
140
135
134
102
9
86
78
67
56
36
25
14
5
13
12
99
179
178
175
174
98
88
87
84
83
171
170
166
165
80
79
95
73
72
162
161
155
153
69
68
64
61
94
151
150
147
146
60
57
55
53
133
131
8
127
126
40
39
35
33
123
121
117
114
6
31
28
24
23
110
109
106
105
20
19
4
2
177
169
159
149
129
119
107
97
111
21
75
76
17
16
138
137
65
113
52
59
27
122
29
125
32
37
130
41
103
115
118
141
43
48
J4001
2
CONN,DDR DIMM 30 DEG
J4000,J4001 17_INCH_LCD
CRITICAL
516-0086
J4000,J4001
2
CONN,DDR DIMM REVERSE 30 DEG
20_INCH_LCD
CRITICAL
516-0087
051-6772
102
40
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
DIMMS
RAM_A<13>
RAM_A<13>
RAM_CKE<1>
=PP2V5_PWRON_RAM
RAM_DQ<1>
=PP2V5_PWRON_RAM
=PP2V5_PWRON_RAM =PP2V5_PWRON_RAM
PP1V25_RAM_VREF_DIMM
RAM_DQ<11>
RAM_DQ<13>
RAM_DQ<8>
RAM_DQ<12>
RAM_DQ<7>
RAM_DQ<3>
RAM_DQ<4>
RAM_DQ<17>
RAM_A<12>
RAM_DQ<22>
RAM_A<11>
RAM_A<8>
RAM_DQ<21>
RAM_A<6>
RAM_DQ<20>
RAM_DQ<25>
RAM_DQ<26>
RAM_A<3>
RAM_DQ<24>
RAM_DQ<14>
RAM_DQ<10>
TP_J4000_SJRESET_L
RAM_DQ<15>
RAM_DQ<2>
RAM_DQ<0>
RAM_DQS<0>
RAM_CLK_A_N
RAM_CLK_A_P
RAM_DQ<5>
RAM_DQ<6>
RAM_CKE<0>
RAM_DQ<19>
RAM_DQ<18>
RAM_DQS<2>
RAM_DQ<23>
RAM_A<7>
RAM_A<5>
RAM_DQ<16>
RAM_DQ<27>
RAM_DQ<29>
RAM_A<4>
RAM_DQS<3>
RAM_DQ<28>
RAM_DQ<31>
RAM_DQ<30>
RAM_CLK_C_P
RAM_CLK_C_N
RAM_A<10>
RAM_DQ<35>
RAM_DQ<33>
RAM_DQ<36>
RAM_DQ<39>
RAM_DQ<60>
RAM_RAS_L
RAM_DQ<63>
RAM_CS_L<0>
RAM_CS_L<1>
RAM_DQ<58>
RAM_DQ<62>
RAM_DQ<40>
RAM_DQ<42>
RAM_DQ<46>
RAM_DQ<45>
RAM_A<2>
RAM_A<1>
RAM_A<0>
RAM_DQ<34>
RAM_BA<1>
RAM_DQ<37>
RAM_DQ<38>
RAM_DQS<4>
RAM_DQ<32>
RAM_BA<0>
RAM_DQ<61>
RAM_WE_L
RAM_CAS_L
RAM_DQ<57>
RAM_DQ<59>
RAM_DQS<7>
RAM_DQ<56>
RAM_DQ<41>
RAM_DQ<43>
RAM_CLK_B_P
RAM_CLK_B_N
RAM_DQS<5>
RAM_DQ<44>
RAM_DQ<47>
RAM_DQ<48>
RAM_DQ<49>
RAM_DQ<54>
RAM_DQ<55>
SD_A_SA0
RAM_DQ<50>
RAM_DQ<51>
RAM_DQS<6>
RAM_DQ<52>
RAM_DQ<53>
I2C_DIMM_SDA
I2C_DIMM_SCL
PP1V25_RAM_VREF_DIMM
RAM_DQ<74>
RAM_DQ<72>
RAM_DQ<76>
RAM_DQ<78>
RAM_DQ<64>
RAM_DQ<65>
RAM_DQ<69>
RAM_CKE<5>
RAM_DQ<68>
RAM_DQ<81>
RAM_A<12>
RAM_DQ<86>
RAM_A<11>
RAM_A<8>
RAM_DQ<85>
RAM_A<6>
RAM_DQ<84>
RAM_DQ<93>
RAM_DQ<91>
RAM_A<3>
RAM_DQ<92>
RAM_DQ<75>
RAM_DQ<79>
RAM_DQS<9>
RAM_DQ<73>
TP_J4001_SJRESET_L
RAM_DQ<77>
RAM_DQ<66>
RAM_DQ<67>
RAM_DQS<8>
RAM_CLK_F_N
RAM_CLK_F_P
RAM_DQ<70>
RAM_DQ<71>
RAM_CKE<4>
RAM_DQ<83>
RAM_DQ<80>
RAM_DQS<10>
RAM_DQ<82>
RAM_A<9>
RAM_A<7>
RAM_A<5>
RAM_DQ<87>
RAM_DQ<90>
RAM_DQ<89>
RAM_A<4>
RAM_DQS<11>
RAM_DQ<94>
RAM_DQ<88>
RAM_DQ<95>
RAM_CLK_D_P
RAM_CLK_D_N
RAM_A<10>
RAM_DQ<96>
RAM_DQ<97>
RAM_DQ<99>
RAM_DQ<100>
RAM_DQ<104>
RAM_RAS_L
RAM_DQ<105>
RAM_CS_L<8>
RAM_CS_L<9>
RAM_DQ<109>
RAM_DQ<108>
RAM_DQ<112>
RAM_DQ<117>
RAM_DQ<119>
RAM_DQ<116>
RAM_A<2>
RAM_A<1>
RAM_A<0>
RAM_DQ<98>
RAM_BA<1>
RAM_DQ<103>
RAM_DQ<101>
RAM_DQS<12>
RAM_DQ<102>
RAM_BA<0>
RAM_DQ<106>
RAM_WE_L
RAM_CAS_L
RAM_DQ<111>
RAM_DQ<107>
RAM_DQS<13>
RAM_DQ<110>
RAM_DQ<113>
RAM_DQ<114>
RAM_CLK_E_P
RAM_CLK_E_N
RAM_DQS<14>
RAM_DQ<118>
RAM_DQ<115>
RAM_DQ<121>
RAM_DQ<120>
RAM_DQ<122>
RAM_DQ<123>
SD_B_SA2
=PP2V5_PWRON_RAM
RAM_DQ<124>
=PP2V5_PWRON_RAM
RAM_DQ<125>
RAM_DQS<15>
RAM_DQ<126>
RAM_DQ<127>
I2C_DIMM_SDA
I2C_DIMM_SCL
RAM_DQ<9>
RAM_DQS<1>
PP1V25_RAM_VREF_DIMM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
RAM_A<9>
=PP2V5_PWRON_RAM
46 46
46 46
46 46
46 40 40
40 40
40 40
40
44
44
37 37
37 37
44
44
44
44
44
44
44
44
45
45
44
44
44
45
45
45
45
44
44
44
44
44
44
44
44
44
45
45
44
44
44
45
45
45
45
37 37
44
37
40
40
44
26
44
26
26 26
44
44
44
44
44
44
44
44
40
44
40
40
44
40
44
44
44
40
44
44
44
44
44
44
44
44
44
44
44
44
44
44
40
40
44
44
44
40
44
44
44
44
40
44
44
44
44
44
40
44
44
44
44
44
44
44
44
44
40
40
40
44
40
44
44
44
44
40
44
40
40
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
44
40
40
45
45
45
45
45
45
45
45
45
45
40
45
40
40
45
40
45
45
45
40
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
45
40
40
40
45
45
45
40
45
45
45
45
40
45
45
45
45
45
40
45
45
45
45
45
45
45
45
45
40
40
40
45
40
45
45
45
45
40
45
40
40
45
45
45
45
45
45
45
45
45
45
45
45
45
26
45
26
45
45
45
45
40
40
44
44
40
26
38
38
38
7
38
7
7 7
40
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
6
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
18
18
40
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
6
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
7
38
7
38
38
38
38
18
18
38
38
40
38
7
Preliminary
Page 37
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
5%
1/16W
SM-LF
82
RAM_VTT
6
3
RP4417
5%
RAM_VTT
82
SM-LF
1/16W
7
2
RP4428
5%
RAM_VTT
82
SM-LF
1/16W
8
1
RP4428
5%
RAM_VTT
82
1/16W
SM-LF
5
4
RP4413
5%
RAM_VTT
82
1/16W
SM-LF
6
3
RP4413
5%
RAM_VTT
82
SM-LF
1/16W
7
2
RP4413
5%
RAM_VTT
82
1/16W
SM-LF
8
1
RP4413
5%
RAM_VTT
82
1/16W
SM-LF
5
4
RP4412
5%
1/16W
RAM_VTT
82
SM-LF
6
3
RP4404
1/16W
5%
RAM_VTT
82
SM-LF
7
2
RP4404
5%
1/16W
RAM_VTT
82
SM-LF
8
1
RP4404
5%
1/16W
SM-LF
82
RAM_VTT
6
3
RP4408
1/16W
5%
SM-LF
82
RAM_VTT
7
2
RP4408
5%
1/16W
SM-LF
82
RAM_VTT
8
1
RP4408
5%
RAM_VTT
82
1/16W
SM-LF
6
3
RP4412
5%
1/16W
RAM_VTT
82
SM-LF
5
4
RP4421
5%
RAM_VTT
82
1/16W
SM-LF
7
2
RP4412
5%
RAM_VTT
82
1/16W
SM-LF
8
1
RP4412
1/16W
5%
RAM_VTT
82
SM-LF
6
3
RP4421
5%
1/16W
RAM_VTT
82
SM-LF
7
2
RP4421
5%
1/16W
RAM_VTT
82
SM-LF
8
1
RP4421
5%
1/16W
RAM_VTT
82
SM-LF
5
4
RP4420
1/16W
5%
RAM_VTT
82
SM-LF
6
3
RP4420
1/16W
5%
SM-LF
82
RAM_VTT
5
4
RP4417
0.1UF
20%
10V
CERM
402
RAM_VTT
2
1
C4400
0.1UF
RAM_VTT
CERM
20%
10V
402
2
1
C4401
0.1UF
20%
10V
CERM
402
RAM_VTT
2
1
C4402
0.1UF
RAM_VTT
20%
10V
CERM
402
2
1
C4403
0.1UF
20%
10V
CERM
402
RAM_VTT
2
1
C4404
0.1UF
20%
10V
CERM
RAM_VTT
402
2
1
C4405
0.1UF
20%
10V
RAM_VTT
CERM
402
2
1
C4406
0.1UF
20%
10V
CERM
402
RAM_VTT
2
1
C4407
0.1UF
20%
10V
CERM
RAM_VTT
402
2
1
C4408
0.1UF
20%
10V
CERM
402
2
1
C4409
CERM
10V
20%
0.1UF
402
2
1
C4411
5%
1/16W
120
MF-LF
RAM_VTT
402
2
1
R4400
1/16W
5%
120
MF-LF
RAM_VTT
402
2
1
R4401
5%
1/16W
120
MF-LF
RAM_VTT
402
2
1
R4402
1/16W
5%
120
MF-LF
402
RAM_VTT
2
1
R4403
5%
1/16W
120
402
MF-LF
RAM_VTT
2
1
R4404
1/16W
5%
120
MF-LF
402
RAM_VTT
2
1
R4405
5%
1/16W
120
402
MF-LF
RAM_VTT
2
1
R4406
82
RAM_VTT
SM-LF
5%
1/16W
5
4
RP4425
1/16W
5%
120
RAM_VTT
MF-LF
402
2
1
R4407
0.1UF
20%
10V
CERM
402
RAM_VTT
2
1
C4412
0.1UF
RAM_VTT
CERM
20%
10V
402
2
1
C4413
0.1UF
402
CERM
10V
20%
RAM_VTT
2
1
C4416
0.1UF
RAM_VTT
20%
10V
CERM
402
2
1
C4417
0.1UF
20%
10V
CERM
RAM_VTT
402
2
1
C4414
RAM_VTT
0.1UF
402
20%
10V
CERM
2
1
C4415
0.1UF
20%
10V
CERM
RAM_VTT
402
2
1
C4419
20%
0.1UF
10V
CERM
402
RAM_VTT
2
1
C4418
SM-LF
1/16W
5%
82
RAM_VTT
6
3
RP4425
402
CERM
10V
20%
0.1UF
2
1
C4421
CERM
RAM_VTT
402
10V
20%
0.1UF
2
1
C4420
1/16W
5%
SM-LF
82
RAM_VTT
7
2
RP4425
1/16W
SM-LF
5%
150
8
1
RP4438
150
5%
1/16W
SM-LF
7
2
RP4438
5%
1/16W
SM-LF
150
8
1
RP4439
150
5%
1/16W
SM-LF
6
3
RP4438
150
5%
1/16W
SM-LF
5
4
RP4438
5%
150
SM-LF
1/16W
7
2
RP4439
5%
150
1/16W
SM-LF
6
3
RP4439
150
1/16W
SM-LF
5%
5
4
RP4439
150
5%
1/16W
SM-LF
7
2
RP4437
1/16W
5%
SM-LF
150
5
4
RP4436
1/16W
SM-LF
150
5%
6
3
RP4436
SM-LF
1/16W
5%
150
7
2
RP4436
5%
1/16W
SM-LF
150
8
1
RP4436
150
5%
SM-LF
1/16W
5
4
RP4437
1/16W
5%
150
SM-LF
6
3
RP4437
1/16W
5%
150
SM-LF
8
1
RP4437
SM-LF
150
5%
1/16W
7
2
RP4442
0.1UF
20%
10V
CERM
402
2
1
C4422
402
CERM
10V
20%
0.1UF
2
1
C4410
150
1/16W
SM-LF
5%
5
4
RP4441
5%
150
SM-LF
1/16W
6
3
RP4441
1/16W
5%
SM-LF
82
RAM_VTT
7
2
RP4417
SM-LF
1/16W
5%
82
RAM_VTT
8
1
RP4425
1/16W
5%
150
SM-LF
5
4
RP4442
5%
1/16W
150
SM-LF
6
3
RP4442
150
5%
SM-LF
1/16W
7
2
RP4441
SM-LF
150
1/16W
5%
8
1
RP4441
5%
1/16W
SM-LF
150
8
1
RP4442
SM-LF
5%
1/16W
82
RAM_VTT
5
4
RP4424
402
1/16W
MF-LF
150
5%
2
1
R4416
402
1/16W
MF-LF
150
5%
2
1
R4417
SM-LF
1/16W
5%
82
RAM_VTT
6
3
RP4424
5%
150
MF-LF
1/16W
402
2
1
R4421
5%
150
MF-LF
1/16W
402
2
1
R4420
120
MF-LF
1/16W
5%
402
2
1
R4408
1/16W
MF-LF
5%
150
402
2
1
R4411
402
150
5%
MF-LF
1/16W
2
1
R4415
402
4.7K
1/16W
MF-LF
5%
2
1
R4412
402
150
5%
MF-LF
1/16W
2
1
R4410
120
5%
1/16W
MF-LF
402
2
1
R4409
5%
MF-LF
1/16W
4.7K
402
2
1
R4413
1/16W
MF-LF
5%
150
402
2
1
R4414
RAM_VTT
82
1/16W
SM-LF
5%
5
4
RP4429
5%
RAM_VTT
82
SM-LF
1/16W
6
3
RP4429
5%
RAM_VTT
82
SM-LF
1/16W
7
2
RP4429
5%
RAM_VTT
82
SM-LF
1/16W
8
1
RP4429
5%
RAM_VTT
82
SM-LF
1/16W
5
4
RP4428
5%
RAM_VTT
82
SM-LF
1/16W
6
3
RP4428
1/16W
5%
SM-LF
82
RAM_VTT
7
2
RP4416
5%
1/16W
SM-LF
82
RAM_VTT
8
1
RP4416
SM-LF
5%
1/16W
82
RAM_VTT
5
4
RP4401
SM-LF
1/16W
5%
82
RAM_VTT
6
3
RP4401
SM-LF
5%
1/16W
82
RAM_VTT
7
2
RP4401
SM-LF
1/16W
5%
82
RAM_VTT
8
1
RP4401
SM-LF
5%
1/16W
82
RAM_VTT
5
4
RP4400
SM-LF
1/16W
5%
82
RAM_VTT
6
3
RP4400
5%
1/16W
SM-LF
82
RAM_VTT
8
1
RP4417
SM-LF
1/16W
5%
82
RAM_VTT
7
2
RP4400
5%
1/16W
SM-LF
82
RAM_VTT
8
1
RP4400
5%
1/16W
RAM_VTT
82
SM-LF
7
2
RP4420
1/16W
5%
RAM_VTT
82
SM-LF
8
1
RP4420
1/16W
5%
SM-LF
82
RAM_VTT
5
4
RP4416
SM-LF
5%
1/16W
82
RAM_VTT
7
2
RP4424
SM-LF
1/16W
5%
82
RAM_VTT
8
1
RP4424
1/16W
5%
RAM_VTT
82
SM-LF
5
4
RP4405
5%
1/16W
RAM_VTT
82
SM-LF
6
3
RP4405
1/16W
5%
RAM_VTT
82
SM-LF
7
2
RP4405
1/16W
5%
RAM_VTT
82
SM-LF
8
1
RP4405
1/16W
5%
RAM_VTT
82
SM-LF
5
4
RP4404
5%
1/16W
SM-LF
82
RAM_VTT
6
3
RP4416
1/16W
5%
SM-LF
82
RAM_VTT
5
4
RP4409
5%
1/16W
SM-LF
82
RAM_VTT
6
3
RP4409
1/16W
5%
SM-LF
82
RAM_VTT
7
2
RP4409
5%
1/16W
SM-LF
82
RAM_VTT
8
1
RP4409
1/16W
5%
SM-LF
82
RAM_VTT
5
4
RP4408
102
11
44
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
PARALLEL TERM
RAM_DQ<53>
RAM_DQ<55>
RAM_DQ<52>
RAM_DQ<49>
RAM_DQ<50>
RAM_DQ<48>
RAM_DQ<54>
PP1V25_RAM_VTT
RAM_DQ<51>
RAM_DQ<21>
RAM_DQ<16>
RAM_DQ<20>
RAM_DQ<17>
RAM_DQ<23>
PP1V25_RAM_VTT
RAM_DQ<19>
RAM_DQ<22>
RAM_DQ<18>
RAM_DQ<38>
RAM_DQ<36>
RAM_DQ<32>
RAM_DQ<34>
RAM_DQ<39>
RAM_DQ<35>
RAM_DQ<37>
PP1V25_RAM_VTT
RAM_DQ<33>
RAM_DQ<6>
RAM_DQ<1>
RAM_DQ<5>
RAM_DQ<2>
RAM_DQ<4>
RAM_DQ<3>
RAM_DQ<0>
RAM_DQ<7>
PP1V25_RAM_VTT
RAM_DQ<13>
RAM_DQS<7>
PP1V25_RAM_VTT
=PP2V5_RUN_RAM
RAM_A<5>
RAM_A<7>
RAM_DQ<41>
RAM_CS_L<0>
RAM_CKE<1>
PP1V25_RAM_VTT
=PP2V5_RUN_RAM
RAM_CKE<0>
RAM_CS_L<1>
RAM_A<2>
RAM_DQS<5>
PP1V25_RAM_VTT
RAM_A<1>
RAM_A<3>
RAM_A<4>
RAM_A<0>
RAM_A<6>
RP4441_NC
RAM_A<8>
RAM_A<9>
RAM_A<11>
RAM_A<12>
RAM_A<13>
PP1V25_RAM_VTT
RAM_DQ<57>
RAM_DQ<63>
RAM_DQ<60>
RAM_DQS<6>
RAM_DQ<26>
RAM_DQ<27>
RAM_DQ<43>
RAM_DQS<2>
RAM_DQS<3>
RAM_DQS<4>
RAM_DQ<42>
RAM_DQ<44>
PP1V25_RAM_VTT
PP1V25_RAM_VTT
RAM_DQ<8>
RAM_DQ<15>
RAM_DQ<31>
RAM_DQ<29>
RAM_DQS<1>
RAM_DQS<0>
RAM_DQ<56>
RAM_DQ<62>
RAM_DQ<58>
RAM_DQ<9>
RAM_DQ<14>
RAM_DQ<25>
RAM_DQ<24>
RAM_DQ<10>
RAM_DQ<30>
RAM_DQ<28>
RAM_DQ<61>
RAM_DQ<59>
RAM_DQ<12>
RAM_DQ<11> RAM_DQ<40>
RAM_DQ<45>
=PP2V5_RUN_RAM
RAM_DQ<46>
RAM_DQ<47>
46 46
46 46
46
45
46
45
46
46 46
46
45
40
40
40
40
40
40
40
45
40
40
40
40
40
40
45
40
40
40
40
40
40
40
40
40
40
45
40
40
40
40
40
40
40
40
40
45
40
40
45
44
40
40
40
40
40
45
44
40
40
40
40
45
40
40
40
40
40
40
40
40
40
40
45
40
40
40
40
40
40
40
40
40
40
40
40
45
45
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40 40
40
44
40
40
38
38
38
38
38
38
38
44
38
38
38
38
38
38
44
38
38
38
38
38
38
38
38
38
38
44
38
38
38
38
38
38
38
38
38
44
38
38
44
7
38
38
38
38
38
44
7
38
38
38
38
44
38
38
38
38
38
38
38
38
38
38
44
38
38
38
38
38
38
38
38
38
38
38
38
44
44
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38 38
38
7
38
38
Preliminary
Page 38
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
SM-LF
5%
1/16W
82
RAM_VTT
5
4
RP4517
5%
RAM_VTT
82
1/16W
SM-LF
6
3
RP4528
5%
RAM_VTT
82
1/16W
SM-LF
7
2
RP4528
5%
RAM_VTT
82
1/16W
SM-LF
8
1
RP4528
5%
1/16W
RAM_VTT
82
SM-LF
5
4
RP4513
1/16W
5%
RAM_VTT
82
SM-LF
6
3
RP4513
5%
1/16W
RAM_VTT
82
SM-LF
7
2
RP4513
1/16W
5%
RAM_VTT
82
SM-LF
8
1
RP4513
5%
1/16W
RAM_VTT
82
SM-LF
5
4
RP4512
1/16W
5%
SM-LF
RAM_VTT
82
5
4
RP4521
SM-LF
1/16W
5%
RAM_VTT
82
6
3
RP4504
SM-LF
5%
1/16W
RAM_VTT
82
7
2
RP4504
SM-LF
1/16W
5%
RAM_VTT
82
8
1
RP4504
SM-LF
1/16W
5%
RAM_VTT
82
6
3
RP4521
SM-LF
1/16W
5%
RAM_VTT
82
6
3
RP4508
SM-LF
5%
1/16W
RAM_VTT
82
7
2
RP4508
SM-LF
1/16W
5%
82
8
1
RP4508
1/16W
5%
RAM_VTT
82
SM-LF
6
3
RP4512
5%
1/16W
RAM_VTT
82
SM-LF
7
2
RP4512
1/16W
5%
SM-LF
RAM_VTT
82
7
2
RP4521
1/16W
5%
RAM_VTT
82
SM-LF
8
1
RP4512
5%
1/16W
SM-LF
RAM_VTT
82
8
1
RP4521
1/16W
5%
SM-LF
RAM_VTT
82
5
4
RP4520
0.1UF
CERM
20%
10V
402
RAM_VTT
2
1
C4500
CERM
0.1UF
RAM_VTT
402
10V
20%
2
1
C4501
RAM_VTT
0.1UF
CERM
20%
10V
402
2
1
C4502
RAM_VTT
0.1UF
10V
20%
402
CERM
2
1
C4503
402
CERM
10V
20%
0.1UF
RAM_VTT
2
1
C4504
0.1UF
20%
10V
RAM_VTT
CERM
402
2
1
C4505
0.1UF
20%
10V
RAM_VTT
CERM
402
2
1
C4506
RAM_VTT
402
CERM
10V
20%
0.1UF
2
1
C4507
0.1UF
20%
10V
RAM_VTT
CERM
402
2
1
C4508
SM-LF
1/16W
5%
82
RAM_VTT
6
3
RP4517
MF-LF
1/16W
5%
120
402
RAM_VTT
2
1
R4500
MF-LF
5%
1/16W
120
402
RAM_VTT
2
1
R4501
MF-LF
1/16W
5%
120
402
RAM_VTT
2
1
R4502
MF-LF
5%
1/16W
120
402
RAM_VTT
2
1
R4503
MF-LF
1/16W
5%
120
402
RAM_VTT
2
1
R4504
MF-LF
5%
1/16W
120
402
RAM_VTT
2
1
R4505
MF-LF
1/16W
5%
120
402
RAM_VTT
2
1
R4506
120
402
5%
1/16W
MF-LF
RAM_VTT
2
1
R4507
20%
10V
402
0.1UF
CERM
RAM_VTT
2
1
C4510
1/16W
5%
SM-LF
RAM_VTT
82
5
4
RP4525
RAM_VTT
0.1UF
CERM
402
10V
20%
2
1
C4511
0.1UF
20%
10V
RAM_VTT
CERM
402
2
1
C4514
0.1UF
20%
10V
RAM_VTT
CERM
402
2
1
C4515
0.1UF
20%
10V
RAM_VTT
CERM
402
2
1
C4512
0.1UF
20%
10V
CERM
RAM_VTT
402
2
1
C4513
402
0.1UF
20%
10V
CERM
RAM_VTT
2
1
C4516
0.1UF
20%
10V
CERM
RAM_VTT
402
2
1
C4517
0.1UF
20%
10V
RAM_VTT
CERM
402
2
1
C4518
5%
1/16W
SM-LF
RAM_VTT
82
6
3
RP4525
1/16W
5%
SM-LF
RAM_VTT
82
7
2
RP4525
0.1UF
20%
10V
CERM
402
2
1
C4519
0.1UF
20%
10V
CERM
402
2
1
C4509
1/16W
5%
150
SM-LF
7
2
RP4530
5%
1/16W
150
SM-LF
8
1
RP4530
SM-LF
150
5%
1/16W
6
3
RP4530
1/16W
5%
150
SM-LF
7
2
RP4531
SM-LF
150
1/16W
5%
5
4
RP4530
5%
1/16W
150
SM-LF
8
1
RP4531
SM-LF
150
1/16W
5%
5
4
RP4531
150
1/16W
5%
SM-LF
8
1
RP4532
5%
1/16W
150
SM-LF
5
4
RP4532
150
1/16W
5%
SM-LF
8
1
RP4533
SM-LF
150
5%
1/16W
6
3
RP4531
150
5%
1/16W
SM-LF
7
2
RP4532
1/16W
5%
150
SM-LF
6
3
RP4532
150
5%
1/16W
SM-LF
7
2
RP4533
5%
1/16W
SM-LF
RAM_VTT
82
8
1
RP4525
SM-LF
1/16W
5%
150
6
3
RP4533
5%
1/16W
150
SM-LF
5
4
RP4533
120
RAM_VTT
MF-LF
1/16W
5%
402
2
1
R4508
120
402
5%
1/16W
MF-LF
RAM_VTT
2
1
R4509
402
4.7K
5%
1/16W
MF-LF
2
1
R4510
MF-LF
1/16W
5%
4.7K
402
2
1
R4511
1/16W
5%
SM-LF
RAM_VTT
82
5
4
RP4524
SM-LF
5%
1/16W
82
RAM_VTT
7
2
RP4517
5%
RAM_VTT
82
1/16W
SM-LF
5
4
RP4529
5%
RAM_VTT
82
1/16W
SM-LF
6
3
RP4529
5%
RAM_VTT
82
1/16W
SM-LF
7
2
RP4529
5%
RAM_VTT
82
1/16W
SM-LF
8
1
RP4529
5%
RAM_VTT
82
1/16W
SM-LF
5
4
RP4528
5%
SM-LF
1/16W
82
RAM_VTT
6
3
RP4516
SM-LF
5%
1/16W
82
RAM_VTT
7
2
RP4516
5%
SM-LF
1/16W
82
RAM_VTT
8
1
RP4516
1/16W
5%
SM-LF
82
RAM_VTT
5
4
RP4501
5%
SM-LF
1/16W
82
RAM_VTT
6
3
RP4501
1/16W
5%
SM-LF
82
RAM_VTT
7
2
RP4501
5%
1/16W
SM-LF
82
RAM_VTT
8
1
RP4501
1/16W
5%
SM-LF
82
RAM_VTT
5
4
RP4500
5%
1/16W
SM-LF
82
RAM_VTT
6
3
RP4500
1/16W
5%
SM-LF
82
RAM_VTT
7
2
RP4500
1/16W
5%
SM-LF
82
RAM_VTT
8
1
RP4500
5%
1/16W
SM-LF
RAM_VTT
82
6
3
RP4520
1/16W
5%
SM-LF
RAM_VTT
82
7
2
RP4520
5%
1/16W
SM-LF
RAM_VTT
82
8
1
RP4520
5%
1/16W
SM-LF
RAM_VTT
82
6
3
RP4524
1/16W
5%
SM-LF
RAM_VTT
82
7
2
RP4524
SM-LF
1/16W
5%
82
RAM_VTT
8
1
RP4517
5%
1/16W
SM-LF
RAM_VTT
82
8
1
RP4524
SM-LF
5%
1/16W
RAM_VTT
82
5
4
RP4505
SM-LF
1/16W
5%
RAM_VTT
82
6
3
RP4505
SM-LF
5%
1/16W
RAM_VTT
82
7
2
RP4505
SM-LF
1/16W
5%
RAM_VTT
82
8
1
RP4505
SM-LF
5%
1/16W
RAM_VTT
82
5
4
RP4504
SM-LF
5%
1/16W
RAM_VTT
82
5
4
RP4509
SM-LF
5%
1/16W
82
RAM_VTT
5
4
RP4516
SM-LF
1/16W
5%
RAM_VTT
82
6
3
RP4509
SM-LF
5%
1/16W
RAM_VTT
82
7
2
RP4509
SM-LF
1/16W
5%
RAM_VTT
82
8
1
RP4509
SM-LF
5%
1/16W
RAM_VTT
82
5
4
RP4508
102
45
11
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
PARALLEL TERM
RAM_DQ<100>
RAM_DQ<99>
RAM_DQ<101>
RAM_DQ<102>
RAM_DQ<98>
RAM_DQ<103>
RAM_DQ<96>
RAM_DQ<97>
PP1V25_RAM_VTT
RAM_DQ<107>
RAM_DQ<110>
RAM_DQ<108>
PP1V25_RAM_VTT
RAM_DQ<116>
RAM_DQ<109>
RAM_DQ<104>
RAM_DQ<106>
RAM_DQ<111>
RAM_DQ<105>
RAM_DQ<118>
RAM_DQ<114>
RAM_DQ<113>
RAM_DQ<112>
RAM_DQ<117>
RAM_DQ<119>
RAM_DQ<115>
PP1V25_RAM_VTT
RAM_DQ<71>
RAM_DQ<68>
RAM_DQ<69>
RAM_DQ<70>
RAM_DQ<66>
RAM_DQ<65>
RAM_DQ<64>
RAM_DQ<67>
PP1V25_RAM_VTT
PP1V25_RAM_VTT
RAM_DQ<76>
RAM_DQ<73>
RAM_DQ<78>
RAM_DQ<77>
RAM_DQ<75>
RAM_DQ<80>
RAM_DQ<83>
RAM_DQ<86>
RAM_DQ<82>
RAM_DQ<81>
PP1V25_RAM_VTT
RAM_DQ<79>
RAM_DQ<74>
RAM_DQ<72>
RAM_DQ<85>
RAM_DQ<84>
RAM_DQ<87>
PP1V25_RAM_VTT
PP1V25_RAM_VTT
=PP2V5_RUN_RAM
RAM_RAS_L
RAM_BA<1>
RAM_A<10>
RAM_CS_L<8>
RAM_CS_L<9>
RAM_WE_L
RAM_CAS_L
RAM_BA<0>
RAM_DQ<120>
RAM_DQ<121>
RAM_DQ<124>
RAM_DQ<126>
RAM_DQ<125>
RAM_DQ<127>
RAM_DQ<122>
RAM_DQ<123>
RAM_DQ<93>
RAM_DQ<88>
RAM_DQ<89>
RAM_DQ<91>
RAM_DQ<90>
RAM_DQ<95>
RAM_DQ<94>
RAM_DQ<92>
RAM_DQS<10>
RAM_DQS<9>
RAM_DQS<8>
PP1V25_RAM_VTT
PP1V25_RAM_VTT
RAM_DQS<12>
RAM_DQS<11>
RAM_DQS<13>
RAM_DQS<15>
RAM_DQS<14>
RAM_CKE<4>
RAM_CKE<5>
46
46
46
46
46
46
46
46
46
46
40
40
40
40
40
40
40
40
45
40
40
40
45
40
40
40
40
40
40
40
40
40
40
40
40
40
45
40
40
40
40
40
40
40
40
45
45
40
40
40
40
40
40
40
40
40
40
45
40
40
40
40
40
40
45
45
44
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
40
45
45
40
40
40
40
40
40
40
38
38
38
38
38
38
38
38
44
38
38
38
44
38
38
38
38
38
38
38
38
38
38
38
38
38
44
38
38
38
38
38
38
38
38
44
44
38
38
38
38
38
38
38
38
38
38
44
38
38
38
38
38
38
44
44
7
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
44
44
38
38
38
38
38
38
38
Preliminary
Page 39
VSS VSS
SHTDWN
VTT
REFOUT
VDD
G
D
S
(TAB)
VCNTRL
VIN
REFEN
VOUT
GND
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
353S0603
PHILIPS
ONLY STUFF ONE VTT VREG
NOTE: U4700 PIN 4 IS LOW ACTIVE.
PLACE 10UF CAPS NEAR DIMMS
10K
402
MF-LF
1/16W
5%
NOSTUFF
2
1
R4603
10%
16V
X7R
603
NOSTUFF
0.1UF
2
1
C4601
NE57811
SPAK-5
RAM_VTT
1
6
3
2
4
5
U4600
X7R
RAM_VTT
0.1UF
16V
10%
603
2
1
C4606
2N7002
SOT23-LF
2
1
3
Q4600
7343
20%
2V
220UF
TANT
2
1
C4609
NOSTUFF
MF-LF
1/16W
5%
0
402
21
R4610
1206
6.3V
20%
10UF
CERM
2
1
C4600
1206
6.3V
20%
10UF
CERM
2
1
C4602
1206
6.3V
20%
CERM
10UF
2
1
C4608
NOSTUFF
RT9173A
TO-252
51
3 6
4
2
U4660
6.3V
1UF
CERM
402
10%
NOSTUFF
2
1
C4660
402
1%
20.5K
1/16W
MF-LF
NOSTUFF
2
1
R4660
402
1%
1/16W
20.5K
MF-LF
NOSTUFF
2
1
R4661
20%
NOSTUFF
10UF
6.3V
CERM
1206
2
1
C4661
20%
10UF
CERM
6.3V
1206
2
1
C4610
NOSTUFF
1206
10UF
6.3V
CERM
20%
2
1
C4611
051-6772
46
102
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
MEM TERM VREGS
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
PP1V25_RAM_VTT
VOLTAGE=1.25V
TURN_ON_VTT
SYS_SLEEP
U4600_REFOUT
=PP3V3_PWRON_RAM
=PP2V5_PWRON_RAM
VR4600_SHTDWN
50 22 11 10
40 9 37
45
8
26
44
3
6
7
7
Preliminary
Page 40
G
D
S
AGP
REFCLK_AVDD
VDD_AGP
AGP_CBE2
AGP_AD_STBS0
AGP_AD_STBF0
AGP_DBI_LO
AGP_CBE1
AGP_CBE0
AGP_SB_STBS
AGP_SB_STBF
AGP_AD_STBS1
AGP_AD_STBF1
AGP_DBI_HI
AGP_CBE3
AGP_STOP
AGP_REQ
AGP_DEVSEL
AGP_FRAME
AGP_GNT
AGP_IRDY
AGP_TRDY
AGP_PAR
AGP_ST0
AGP_ST1
AGP_ST2
AGP_RBF
AGP_WBF
AGP_GC_AGP8X_DET
AGP_TYPEDET
AGP_AD0
AGP_AD1
AGP_AD2
AGP_AD3
AGP_AD4
AGP_AD5
AGP_AD6
AGP_AD7
AGP_AD9
AGP_AD8
AGP_AD15
AGP_AD16
AGP_AD12
AGP_AD11
AGP_AD10
AGP_AD13
AGP_AD14
AGP_AD21
AGP_AD20
AGP_AD19
AGP_AD18
AGP_AD17
AGP_AD26
AGP_AD25
AGP_AD24
AGP_AD23
AGP_AD22
AGP_AD27
AGP_SBA2
AGP_SBA3
AGP_AD31
AGP_AD30
AGP_AD29
AGP_AD28
AGP_SBA1
AGP_SBA0
AGP_SBA4
AGP_STP_AGP*
AGP_BUSY*
AGP_REFCLK
AGP_SBA5
AGP_SBA6
AGP_SBA7
AGP_VREFCG
AGP_PVTREF2
AGP_PVTREF1
AGP_VREFGC
AGP_MB_AGP8X_DET
AGP_REFCLK_AVSS
(SYM 4 OF 7)
AGP
INTERFACE
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
GROUPS WITH STROBE1
DBI_HI IS NOT A STROBE BUT SHARES THE SAME TOPOLOGY AS A STROBE
FOR CONSTRAINTS
DIFFERENTIAL_PAIR
NET_SPACING_TYPE
NET_PHYSICAL_TYPE
PVTREF RESISTOR
DBIHI AND DBILO
LEVEL SHIFTER FOR U3LITE
AGP BUSY AND STOP ARE NOT USED IN ALL DESIGNS
ELECTRICAL_CONSTRAINT_SET
CERM
10V
20%
0.1UF
402
2
1
C4808
402
MF-LF
1/16W
5%
10K
AGP_BUSYSTOP
2
1
R4811
1/16W
402
10K
5%
MF-LF
2
1
R4812
AGP_BUSYSTOP
10K
MF-LF
402
5%
1/16W
2
1
R4808
MF-LF
402
10K
5%
1/16W
2
1
R4810
2N3904LF
SOT23
AGP_BUSYSTOP
2
3
1
Q4802
2N7002
SOT23-LF
AGP_BUSYSTOP
2
1
3
Q4803
MF-LF
10K
5%
1/16W
402
2
1
R4809
402
0.1UF
20%
10V
CERM
2
1
C4807
AGP_BUSYSTOP
5%
402
MF-LF
1/16W
1K
21
R4813
402
MF-LF
1/16W
5%
10K
2
1
R4807
CERM
10V
20%
0.1UF
402
2
1
C4806
402
0.1UF
20%
10V
CERM
2
1
C4805
CERM
20%
0.1UF
402
10V
2
1
C4804
402
0.1UF
20%
10V
CERM
2
1
C4803
CERM
10V
20%
0.1UF
402
2
1
C4802
402
0.1UF
20%
10V
CERM
2
1
C4801
10V
20%
402
CERM
0.1UF
2
1
C4800
603
5%
2.2
1/10W
MF-LF
21
R4800
1UF
6.3V
CERM
402
10%
2
1
C4811
CERM
10V
402
0.1UF
20%
2
1
C4816
1%
1/16W
MF-LF
182
402
21
R4801
10V
402
0.1UF
20%
CERM
2
1
C4812
CERM
20%
0.1UF
402
10V
2
1
C4813
CERM
20%
0.1UF
402
10V
2
1
C4814
CERM
20%
0.1UF
402
10V
2
1
C4815
0.01UF
402
20%
16V
CERM
2
1
C4817
I46
I48
I49
I50
I51
I52
I53
I54
I55
I56
I57
I58
I59
V1.0-300MM
PBGA
U3LITE
OMIT
W10
W6
W2
Y11
AB4
AC10
AE7
AE2V9AG10
AG4
AD6
AA9
AC5
AC9
AH5
AD4
AH4
AB1
AC1
AC4
AE1
AD1
AF1
AG1
AF2
AD2
AG3
AH1
AF3
AG2
AB9
AE5
AE6
AH2
AC6
AF5
AG5
AH7
AA8
AG6
AC3
AB8
AH6
AF6
AA6
AA4
AA5
Y8
AF8
AG8
AC8
AA2
AD8
AA3
AE8
AH9
AH8
AF11
AE11
AD11
AC11
AA7
W1
AH12
V7
V8
V3
V4
V6
V5
Y7
Y1
Y2
AA1
AG11
Y5
Y6
Y3
Y4
AD9
AE9
AF9
AG9
AH11
AH10
AA11
AB11
U3
CERM
20%
0.1UF
402
10V
2
1
C4810
SOT-363
2N7002DW
AGP_BUSYSTOP
4
5
3
Q4801
SOT-363
2N7002DW
AGP_BUSYSTOP
1
2
6
Q4801
11
48
102
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
U3LITE AGP
AGP_SB_STBF
AGP_SB_STBS
AGP_SB_STBAGP_STROBEAGP_STROBE
AGP_CBE<3..2>
AGP_DATAAGP_AD_1 AGP_DATA
AGP_AD_STB0
AGP_AD_STBS<0>
AGP_STROBE
AGP_AD_STB_0
AGP_STROBE
AGP_AD_1 AGP_DATA
AGP_DBI_LO
AGP_DATA
AGP_AD<0>
AGP_AD_0
AGP_AD<15..0>
AGP_DATAAGP_DATA
STOP_AGP_L_R
NB_STOP_AGP_L
STOP_AGP_L
AGP_BUSY_L
AGP_BUSY_L_F
=PP3V3_AGP
NB_AGP_BUSY_L
=PP1V5_AGP
AGP_AD<4>
AGP_FRAME
AGP_TYPEDET_L
NB_AGP_GCDET_L
AGP_GNT
AGP_STOP
AGP_ST<0>
AGP_ST<1>
AGP_AD<26>
AGP_AD<22>
AGP_AD<20>
AGP_AD<15>
AGP_AD<14>
AGP_AD<12>
AGP_AD<10>
AGP_AD<9>
AGP_AD<8>
AGP_AD<6>
AGP_AD<5>
AGP_AD<25>
AGP_AD<30>
AGP_CLK66M_NB
AGP_SBA_L<6>
AGP_SBA_L<4>
AGP_REQ
AGP_AD<13>
AGP_DEVSEL
AGP_ST<2>
AGP_WBF
AGP_AD<17>
AGP_SB_STBF
AGP_AD<27>
AGP_AD<28>
AGP_AD_STBF<0>
AGP_CBE<2>
AGP_CBE<3>
AGP_SBA_L<2>
AGP_SBA_L<1>
AGP_AD<11>
AGP_AD_1
AGP_AD<31..16>
AGP_DATAAGP_DATA
AGP_AD<16>
AGP_AD<18>
AGP_AD<19>
AGP_SBA_L<3>
AGP_AD<31>
AGP_AD<29>
AGP_AD<7>
AGP_AD<3>
AGP_AD<2>
AGP_AD<21>
AGP_AD<23>
AGP_AD<24>
TP_AGP_MB_AGP8X_DET_L
AGP_VREF_GC
AGP_DBI_HI
AGP_SBA_L<0>
AGP_AD_STBF<1>
TP_VREF_CG
AGP_SBA_L<5>
AGP_DATA
AGP_DBI_HI
AGP_AD_1 AGP_DATA
=PP1V5_PWRON_NB_AVDD
=PP1V5_AGP
=PP3V3_AGP
=PP1V5_AGP
=PP3V3_AGP
=PP1V5_AGP
AGP_STROBE
AGP_AD_STBS<1>
AGP_AD_STB1
AGP_AD_STB_1
AGP_STROBE
AGP_AD_STB1
AGP_STROBE
AGP_AD_STBF<1>
AGP_AD_STB_1
AGP_STROBE
AGP_SB_STBS
AGP_SB_STBAGP_STROBE
AGP_SB_STBS
AGP_STROBE
AGP_AD_STBF<0>
AGP_AD_STB0
AGP_STROBE
AGP_AD_STB_0
AGP_STROBE
AGP_DBI_LO
AGP_CBE<1>
AGP_CBE<0>
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
PP1V5_PWRON_AGP_NB_AVDD
VOLTAGE=1.5V
AGP_AD_STBS<0>
AGP_AD<1>
AGP_CBE<1..0>
AGP_DATAAGP_AD_0 AGP_DATA
AGP_SBA
AGP_DATA
AGP_SBA_L<7..0>
AGP_DATA
AGP_IRDY
AGP_TRDY
AGP_PAR
AGP_SB_STBS
AGP_AD_STBS<1>
AGP_SBA_L<7>
NB_AGP_BUSY_L
NB_STOP_AGP_L
STOP_AGP_L_F
AGP_RBF
AGP_PVTREF1
AGP_PVTREF2
59
59
59
58
58
58
56
56
56
50
50
60
50
50
50
50
50
49
49
37
49
49
49
49
49
49
49
49
49
49
49
48
48
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
49
28
48
48
48
48
48
49
49
49
49
49
49
49
49
49
49
49
49
49
49
48
48
48
48
48
48
48
7
48
7
48
49
49
49
49
49
49
49
48
48
48
48
48
48
48
48
48
48
48
48
48
27
48
48
49
48
49
49
49
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
6
49
48
48
48
6
48
48
7
7
7
7
7
7
48
48
48
48
48
48
48
48
48
48
48
49
49
49
48
48
48
48
48
49
Preliminary
Page 41
AD_STBS_1*
AGPTEST*
SBA2
FRAME*
WBF*
RBF*
AD4
AD3
AD2
AD1
AD0
PCICLK
ST2
ST1
REQ*
SB_STBS*
SB_STBF
AD22
AD5
AD7
AD10
AD12
AD13
AD14
AD15
AD18
AD17
AD19
AD21
AD20
AD23
AD24
AD25
AD26
AD27
AD29
AD28
AD31
AD30
SBA0
SBA1
SBA4
SBA5
SBA6
RST*
GNT*
STOP*
TRDY*
DEVSEL*
IRDY*
AD11
AD9
AD8
AD6
AGPREF
CBE0*
CBE1*
DBI_LO
AD_STBF_0
AD_STBS_0*
CBE2*
CBE3*
DBI_HI
PAR
AGP8X_DET*
AD16
AD_STBF_1
VDDP
SBA3
INTA*
SBA7
ST0
(1 OF 5)
AGP
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
U3LITE AGP I/O REFERENCE
(PLACE CLOSE TO GPU AGP BALLS)
GPU AGP I/O REFERENCE
PLACE C4910 CLOSE TO BALL M26
0.35V
AGP 3.0
(LOW = AGP V3.X)
(HIGH = AGP V2.X)
AGP VERSION SELECT
DO WE NEED THE SERIES R?
0.233 * VDDP
U3LITE SIGNALS
(PLACE CLOSE TO GPU AGP BALL)
402
0
5%
MF-LF
1/16W
21
R4912
3.32K
402
1%
MF-LF
1/16W
2
1
R4906
1/16W
1%
1.02K
MF-LF
402
2
1
R4907
20%
0.01UF
CERM
16V
402
2
1
C4957
402
5%
10K
MF-LF
1/16W
2
1
R4909
402
MF-LF
1/16W
5%
0
2
1
R4913
1.02K
402
MF-LF
1/16W
1%
2
1
R4940
MF-LF
1/16W
1%
3.32K
402
2
1
R4914
402
0.01UF
20%
16V
CERM
2
1
C4940
OMIT
BGA
RV351
AC26
Y27
W30
V24
V23
U27
T30
T24
T23
P27
P23
N30
M24
M23
J30
AF27
AE30
AC27
AC23
AB30
AA24
AA23
V28
N26
AE28
AD27
AF29
Y29
Y28
AA29
AA28
AC29
AC28
AD29
AD28
AB28
AB29
AG28
AF28
AE29
AG30
M25
W29
AE26
AD26
W28
V29
AB26
AB25
U26
P26
U28
N29
M27
M26
AC25
V26
M29
V25
M28
P29
N28
L28
L29
K28
K29
AA27
AA25
J28
AA26
Y25
Y26
W25
W26
V27
U25
T26
T25
R25
J29
R27
P25
R26
N25
U29
T28
T29
R28
R29
P28
H28
H29
U4900
402
1UF
10%
6.3V
CERM
2
1
C4900
16V
20%
0.01UF
402
CERM
2
1
C4910
CERM
6.3V
10%
1UF
402
2
1
C4901
CERM
20%
16V
402
0.01UF
2
1
C4902
402
CERM
0.01UF
20%
16V
2
1
C4903
402
CERM
0.01UF
20%
16V
2
1
C4904
402
CERM
0.01UF
20%
16V
2
1
C4905
1/16W
10K
5%
MF-LF
402
2
1
R4908
402
47
1%
1/16W
MF-LF
21
R4910
051-6772
102
11
49
SYNC_MASTER=N/A
SYNC_DATE=N/A
GPU AGP
IC,RV351LE, GRAPHICS CTLR
1
U4900
338S0231
=PP1V5_AGP
GPU_AGPTEST_L
=PP1V5_AGP
AGP_TYPEDET_L
NB_AGP_GCDET_L
AGP_AD<22>
AGP_AD<24>
=PP1V5_AGP
AGP_SBA_L<2>
AGP_WBF
AGP_RBF
AGP_AD<4>
AGP_AD<3>
AGP_AD<2>
AGP_AD<1>
AGP_AD<0>
AGP_CLK66M_GPU
AGP_ST<2>
AGP_ST<1>
AGP_AD<5>
AGP_AD<10>
AGP_AD<12>
AGP_AD<13>
AGP_AD<14>
AGP_AD<15>
AGP_AD<18>
AGP_AD<17>
AGP_AD<19>
AGP_AD<21>
AGP_AD<20>
AGP_AD<23>
AGP_AD<25>
AGP_AD<26>
AGP_AD<27>
AGP_AD<29>
AGP_AD<28>
AGP_AD<31>
AGP_AD<30>
AGP_SBA_L<0>
AGP_SBA_L<1>
AGP_SBA_L<4>
AGP_SBA_L<5>
AGP_SBA_L<6>
AGP_AD<11>
AGP_AD<9>
AGP_AD<8>
AGP_AD<6>
AGP_AD<16>
AGP_SBA_L<3>
AGP_SBA_L<7>
AGP_ST<0>
ATI_PCIRST_L
GPU_RESET_L
=PP1V5_AGP
MIN_NECK_WIDTH=0.2 MM
GPU_AGP_VREF
MIN_LINE_WIDTH=0.6 MM
VOLTAGE=0.35V
AGP_REQ
AGP_FRAME
AGP_GNT
AGP_STOP
AGP_TRDY
AGP_DEVSEL
AGP_IRDY
GPU_AGP_VREF
AGP_AD<7>
AGP_CBE<0>
AGP_CBE<1>
AGP_DBI_LO
AGP_AD_STBF<0>
AGP_AD_STBS<0>
AGP_CBE<3>
AGP_AD_STBF<1>
AGP_SB_STBS
AGP_AD_STBS<1>
AGP_INT_L
=PP3V3_AGP
AGP_CBE<2>
AGP_DBI_HI
AGP_SB_STBF
AGP_PAR
VOLTAGE=0.35V
MIN_LINE_WIDTH=0.6 MM
MIN_NECK_WIDTH=0.2 MM
AGP_VREF_GC
59 58
50
50
50
50
56
49
49
49
49
50
48
48
48
48
48
7
7
48
48
48
48
7
48
48
48
48
48
48
48
48
27
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
48
8
7
49
48
48
48
48
48
48
48
49
48
48
48
48
48
48
48
48
48
48
25
7
48
48
48
48
48
Preliminary
Page 42
FB
LD
HD
GND
COMP
SS
VCC
VC
GND
VOUT
VIN
NOISE
CONT
EN
GND
IN
OUT
ADJ
PG
EN
VIN
ADJ
VOUT
GND
G
D
S
G
D
S
PG
EN
VIN
ADJ
VOUT
GND
LM339A
V+
GND
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
GPU 2.5V A2VDD
POWER SEQUENCING FOR RV351: =PP3V3_AGP > PP2V5_GPU > PPVCORE_GPU > VDDC_CT
PP2V5_GPU_A2VDD > PP1V8_GPU
HOWEVER IDEALLY ALL POWER RAILS SHOULD RAMP TOGETHER
VOUT = 0.59V * [1 + R5060 / R5061]
GPU 1.80V TPVDD
VOUT = 1.80V
POWER DOWN SEQUENCE SHOULD BE IN REVERSE ORDER
PLACE LED5000 NEAR VREG
NOTE:
SET OUTPUT = 1.20V +/- 5% FOR RV351LE
IRU3037ACS VREF = 0.8 VDC
PEAK CURRENT OF TOTAL RAILS
5A WITH RV351LE
VOUT=VREF*(R5003+R5005)/R5005 = 1.199 VDC
U5000_FEEDBACK
GPU VCORE VREG
GPU 1.8V VREG
VOUT = 1.50V
VOUT = 0.59V * [1 + R5090 / R5091]
THIS RAIL SHOULD BE THE LAST UP AND THE FIRST DOWN
GPU 1.50V VDDC_CT
CERM
10UF
20%
6.3V
1206
2
1
C5001
402
MF-LF
1/16W
10K
1%
2
1
R5005
3300PF
50V
NOSTUFF
603
10%
CERM
2
1
C5007
5%
FF
1206
1/4W
0.51
2
1
R5004
CERM
20%
50V
0.1UF
1206
2
1
C5012
CERM
2200PF
5%
603
50V
2
1
C5005
MF-LF
0
805
1/8W
5%
21
R5002
CERM
25V
1UF
805
20%
2
1
C5004
TH
1.6UH
21
L5001
805
20%
1UF
25V
CERM
2
1
C5016
220PF
5%
402
CERM
25V
2
1
C5006
0.1UF
603
16V
CERM
20%
2
1
C5014
SOI
IRU3037ACS
2 6
8
3
5
4
1
7
U5000
MF-LF
1/16W
1%
4.99K
402
2
1
R5003
CERM
0.0018UF
402
10%
50V
2
1
C5023
20PF
5%
50V
CERM
603
2
1
C5013
MF-LF
1/16W
1%
402
61.9K
2
1
R5001
4.7
5%
1/8W
MF-LF
805
2
1
R5000
10UF
20%
CERM
6.3V
805
2
1
C5072
SOT-25A
MM1572FN
5
1
4
2
3
U5070
CERM
16V
20%
0.01UF
402
2
1
C5071
402
MF-LF
1/16W
10K
5%
2
1
R5070
805
1UF
20%
CERM
10V
2
1
C5070
CRITICAL
SOP-8
MIC39102
3
2
8765
1
4
U5080
402
MF-LF
1/16W
1%
453
2
1
R5081
402
5%
3.3K
MF-LF
1/16W
2
1
R5080
SM-1
ELEC
6.3V
20%
330UF
2
1
C5083
20%
10UF
1206
CERM
6.3V
2
1
C5080
MF-LF
1/16W
1%
402
1K
2
1
R5082
CERM
6.3V
10%
1uF
402
2
1
C5092
MF-LF
402
1/16W
1%
64.9K
2
1
R5091
0.001UF
402
10%
50V
CERM
2
1
C5091
CRITICAL
FAN2558
SOT23-6
61
4
2
3 5
U5090
4.7UF
6.3V
20%
CERM
805
2
1
C5090
CASE369
NTD60N02R
3
1
4
Q5001
CASE369
NTD60N02R
3
1
4
Q5002
SMB
10BQ040PBF
2
1
D5000
SMB
10BQ040PBF
2
1
D5090
NOSTUFF
5%
1/8W
MF-LF
0
805
21
R5092
1%
100K
1/16W
402
MF-LF
2
1
R5090
6.3V
TH-KZJ
20%
1800UF
ELEC
2
1
C5009
805
CERM
6.3V
20%
10UF
2
1
C5008
6.3V
TH-KZJ
20%
1800UF
ELEC
2
1
C5002
6.3V
TH-KZJ
20%
1800UF
ELEC
2
1
C5003
10UF
6.3V
CERM
1206
20%
2
1
C5010
402
10%
1uF
CERM
6.3V
2
1
C5062
402
1/16W
100K
1%
MF-LF
2
1
R5060
1%
1/16W
MF-LF
48.7K
402
2
1
R5061
50V
10%
0.001UF
CERM
402
2
1
C5061
SOT23-6
CRITICAL
FAN2558
61
4
2
3 5
U5060
4.7UF
6.3V
CERM
805
20%
2
1
C5060
402
330
DEVELOPMENT
MF-LF
1/16W
5%
2
1
R5019
DEVELOPMENT
2.0X1.25A
GREEN
2
1
LED5000
SOI
DEVELOPMENT
3
13
11
10
12
U1001
DEVELOPMENT
0
5%
1/16W
MF-LF
402
21
R5020
SOT23-LF
2N7002
2
1
3
Q5000
402
3.3K
MF-LF
1/16W
5%
2
1
R5097
SOT23-LF
2N7002
2
1
3
Q5080
2N7002
SOT23-LF
2
1
3
Q5090
402
MF-LF
1/16W
3.3K
5%
2
1
R5062
SOT23-LF
2N7002
2
1
3
Q5060
2N7002
SOT23-LF
2
1
3
Q5070
50
051-6772
11
102
SYNC_MASTER=N/A
SYNC_DATE=N/A
GRAPHICS VREGS
MIN_LINE_WIDTH=0.5MM
VOLTAGE=1.5V
PP1V5_GPU_VDDC_CT
MIN_NECK_WIDTH=0.25MM
FAN2558_ADJ
U5080_EN
U5000_GATE_L
U5000_GATE_H
U5000_COMP
R5001_2
U5000_VC
Q5001_GATE
R5004_P2
GPU_CORE_FOR_LED
1V1_REF
LED_GPU_CORE_N
LED_GPU_CORE_P
=PP5V_AGP
=PP12V_AGP
=PP3V3_AGP
PP2V5_GPU_A2VDD
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
=PP1V8_GPU
U5070_NOISE
PP3V3_RUN
=PP3V3_AGP
SYS_SLEEP
SYS_SLEEP
VOLTAGE=1.8V
PP1V8_GPU_TPVDD
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
U5060_ADJ
SYS_SLEEP
SYS_SLEEP
MIN_LINE_WIDTH=0.6MM
VOLTAGE=1.2V
MIN_NECK_WIDTH=0.25MM
PPVCORE_GPU
Q5002_DRAIN
U5000_SS
U5060_EN
U5000_FEEDBACK
=PP3V3_AGP
=PP3V3_AGP
U5070_CONT
U5080_ADJ
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=1.8V
MAKE_BASE=TRUE
PP1V8_GPU
=PP3V3_AGP
=PP1V5_AGP
=PP3V3_AGP
U5090_EN
SYS_SLEEP
=PP3V3_AGP
50
50 50
50
50
59
34
59
46
46 46
46
59
59
59
59
46
59
58
22
58
22
22 22
22
58
58
58
58
22
58
56
18
56
11
11 11
11
56
56
56
56
11
56
50
11
50
10
10 10
10
50
50
50
50
10
50
34
49
58
10
49
9
9 9
9
51
49
49
49
49
49
9
49
22
59
59
48
58
52
7
48
8
8 8
8
22
48
48
48
48
48
8
48
51
6
6
6
6
6
10
7
7
7
51
51
6
7
6
6
58
6
6
7
6 6
6
7
7
7
7
7
6
7
Preliminary
Page 43
PVSS
PVDD
VDD15
VDDC
VSS
VSS
VDDCI
VDDL0
VDDL1
(2 OF 5)
CORE POWER
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
25MA MAX
BGA
OMIT
RV351
AD18
Y4
W8
W7
W27
W24
W23
W15
V30
V16
V15
U8
U4
U23
U16
U15
T27
T19
T18
T17
T16
T15
T14
T13
T1
R8
R7
R30
R24
R23
R18
R17
R16
R15
R14
R13
R12
P4
P16
P15
N27
N24
N23
N16
N15
M8
M7
M30
M16
L4
K8
K7
K30
K27
K24
K23
K1
H9
H8
H4
H27
H23
H21
H18
H16
H14
H12
G9
G24
G21
G18
G16
G12
F27
E4
D9D6D4
D27
D25
D24
D21
D18
D15
D12
D10
C30C3C28
C1
AK29
AK25
AK2
AJ30
AJ19
AJ1
AG9
AG5
AG27
AG22
AG18
AG15
AG11
AF20
AF15
AE27
AE19
AE16
AD30
AD25
AD16
AD12
AC4
AC18
AC16
AC14
AC12
AB8
AB7
AB4
AB27
AB24
AB23
AB1
AA30
A29
A22
A2
A16
A10
AE20
AE17
AJ20
AF21
AE15
W16
T12
R19
M15
W19
W18
W17
W14
W13
W12
V19
V18
V17
V14
V13
V12
U19
U18
U17
U14
U13
U12
P19
P18
P17
P14
P13
P12
N19
N18
N17
N14
N13
N12
M19
M18
M17
M14
M13
M12
AD15
AD13
AC17
AC15
AC13
Y8
Y23
P8
L23
H20
H11
AC20
AC11
AJ28
AK28
U4900
CERM
6.3V
10%
1UF
402
2
1
C5102
6.3V
402
1UF
10%
CERM
2
1
C5101
402
CERM
0.01UF
20%
16V
2
1
C5110
402
CERM
20%
16V
0.01UF
2
1
C5109
402
CERM
0.01UF
20%
16V
2
1
C5108
CERM
20%
16V
402
0.01UF
2
1
C5107
402
1UF
10%
6.3V
CERM
2
1
C5103
CERM
6.3V
10%
1UF
402
2
1
C5104
16V
20%
0.01UF
CERM
402
2
1
C5105
16V
20%
0.01UF
CERM
402
2
1
C5106
16V
20%
0.01UF
CERM
402
2
1
C5111
16V
20%
0.01UF
CERM
402
2
1
C5112
402
CERM
0.01UF
20%
16V
2
1
C5120
402
CERM
0.01UF
20%
16V
2
1
C5119
16V
20%
0.01UF
CERM
402
2
1
C5118
16V
20%
CERM
402
0.01UF
2
1
C5117
16V
20%
0.01UF
CERM
402
2
1
C5116
0.01UF
402
16V
20%
CERM
2
1
C5115
402
CERM
0.01UF
20%
16V
2
1
C5114
402
CERM
0.01UF
20%
16V
2
1
C5113
402
1UF
10%
6.3V
CERM
2
1
C5143
1UF
10%
6.3V
CERM
402
2
1
C5142
402
1UF
10%
6.3V
CERM
2
1
C5141
1UF
CERM
6.3V
10%
402
2
1
C5140
402
CERM
6.3V
1UF
10%
2
1
C5131
805
NOSTUFF
10UF
20%
6.3V
CERM
2
1
C5130
0805
1.8UH
21
L5130
SM
21
XW5130
FERR-220-OHM
0805
21
L5150
NOSTUFF
805
10UF
20%
6.3V
CERM
2
1
C5100
51
102
051-6772
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
GPU CORE POWER
PP1V5_GPU_VDDC_CT
PP2V5_GPU_A2VDD
PP2V5_GPU_VDDL1
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=2.5V
PPVCORE_GPU
=PP1V8_GPU
PPVCORE_GPU
GND_GPU_PVSS
VOLTAGE=0V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
PP1V8_GPU_PVDD
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=1.8V
PP1V8_GPU_TXVDDR
51
51
50
58
50
58
22
52
22
50
50
7
50
7
58
Preliminary
Page 44
VDDRH1
VDDRH0
DQA5
DQA6
DQA7
DQA4
DQA0
DQA1
DQA2
DQA23
DQA21
DQA20
DQA18
DQA22
DQA52
DQA25
DQA24
DQA8
DQA9
DQA10
DQA11
DQA12
DQA13
DQA14
DQA15
DQA16
DQA17
DQA19
DQA26
DQA27
DQA28
DQA29
DQA30
DQA31
DQA32
DQA33
DQA34
DQA35
DQA36
DQA37
DQA38
DQA39
DQA40
DQA41
DQA42
DQA43
DQA44
DQA45
DQA46
DQA47
DQA48
DQA49
DQA50
DQA51
DQA53
DQA54
DQA55
DQA56
DQA57
DQA58
DQA59
DQA60
DQA62
DQA3
MAA1
MAA0
MAA2
MAA4
MAA3
MAA5
MAA8
MAA14
DQMA1*
DQMA0*
DQMA2*
DQMA6*
DQMA5*
QSA0
DQMA7*
QSA1
QSA2
QSA3
QSA5
QSA4
RASA*
CASA*
WEA*
CSA1*
CSA0*
CKEA
CLKA0*
CLKA0
CLKA1*
CLKA1
MVREFS
MVREFD
DIMA_1
DIMA_0
VDDR1
DQA63
DQA61
QSA6
QSA7
MAA6
MAA7
MAA9
MAA10
MAA11
MAA12
MAA13
DQMA4*
DQMA3*
VSSRH1VSSRH0
(3 OF 5)
MEMORY INTERFACE A
MEMVMODE0
CLKB1*
CLKB0
VDDR1
MAB5
MAB4
MAB10
MAB11
MAB13
DQB33
DQB14
DQB29
DQB30
DQB31
DQB32
DQB34
DQB35
DQB36
DQB37
DQB39
DQB38
DQB40
DQB42
DQB41
DQB43
DQB44
DQB45
DQB46
DQB47
DQB48
DQB50
DQB49
DQB51
DQB52
DQB53
DQB55
DQB54
DQB58
DQB57
DQB56
DQB59
DQB60
DQB63
DQB61
DQB62
DQB3
DQB4
DQB5
DQB6
DQB7
DQB8
DQB12
DQB17
DQB15
DQB19
DQB20
DQB22
DQB23
DQB24
DQB25
DQB27
DQB26
DQB28
DQB9
DQB10
DQB11
DQB13
DQB16
DQB18
DQB21
MAB0
MAB1
MAB3
MAB2
MAB6
MAB7
MAB8
MAB9
MAB14
DQMB0*
DQMB2*
DQMB1*
DQMB3*
DQMB5*
DQMB4*
DQMB6*
DQMB7*
QSB0
QSB1
QSB2
QSB4
QSB3
QSB5
QSB7
QSB6
RASB*
WEB*
CKEB
CLKB0*
DIMB_0
DIMB_1
DQB1
DQB2
CASB*
CSB0*
CSB1*
CLKB1
ROMCS*
MEMVMODE1
MEMTEST
DQB0
MPVSS
MPVDD
MAB12
MEMORY INTERFACE B
(4 OF 5)
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
10MA MAX
01
10
MEMVMODE
01
1.8V
2.5V
2.8V
11
RV351
OMIT
BGA
E19
M6
F19
N6
F18
V8
V7
V4
T8
M4
H17
F4
D5
D26
D23
D20
D19
D17
D14
D13
D11
B30
B1
AD4
AA8
AA7
AA4
AA1
A9
A3
A28
A21
A15
A19
F10
B11
B16
E16
B27
F24
F30
J27
B8
B7
A24
C21
F21
F22
C22
C23
B24
B23
C19
B20
E21
A25
C24
B22
E22
E11
C11
C15
F15
A27
E25
F29
J25
D29
G30
G26
F8
F9
E9
F11
H26
F12
E10
E12
E13
B10
B9
C9
C10
B12
C12
H25
A12
A13
C16
C14
B14
C13
B15
B17
B18
C17
J26
F13
E14
F14
E15
F16
D16
E17
F17
B26
C26
K26
B25
B28
C27
C25
C29
B29
D22
E23
F23
E24
K25
F25
E26
F26
G25
F28
G28
G29
E29
E28
D28
L26
L25
B13
D30
F20
E20
A18
C18
C20
B21
B19
E18
U4900
0.01UF
16V
20%
CERM
402
2
1
C5212
0.01UF
402
CERM
20%
16V
2
1
C5211
0.01UF
402
CERM
20%
16V
2
1
C5210
402
CERM
20%
16V
0.01UF
2
1
C5209
0.01UF
402
CERM
16V
20%
2
1
C5208
CERM
20%
16V
402
0.01UF
2
1
C5207
0.01UF
CERM
402
20%
16V
2
1
C5206
0.01UF
CERM
402
20%
16V
2
1
C5205
BGA
OMIT
RV351
T6
T7
T4
R4
R1
N8
N7
N4
L8
L27
J8
J7
J4
J24
J23
J1
H22
H19
H15
H13
H10
G7
G27
G22
G19
G15
G13
G10
E27
D8
AF5
R2
AD1
AC5
W1
V5
G1
K6
B3
F6
A6
A7
C7
C6
C8
K2
N3
P6
M5
M2
L2
L3
M3
P2
P3
P5
J2
K3
M1
N5
AD2
AC6
W2
W6
G3
J5
B2
E6
C5
B5
C4
AE3
AE2
AE1
AD3
E5
AC3
AC2
AB3
AB2
AE4
AE5
AD5
AD6
AB5
AB6
F5
AA5
AA6
AA2
Y3
Y2
W3
V3
V1
V2
U2
G5
Y5
Y6
W4
W5
V6
U3
U5
U6
H3
F1
G6
J3
F2
E2
H2
F3
G2
L5
L6
K4
K5
E7
J6
H5
H6
G4
D2
D1
D3
C2
B4
A4
F7
D7
AA3
E3
R6
R5
T3
T2
N2
N1
R3
T5
U4900
10UF
20%
805
6.3V
CERM
2
1
C5201
10UF
805
CERM
6.3V
20%
2
1
C5200
1UF
10%
CERM
6.3V
402
2
1
C5231
CERM
6.3V
20%
10UF
805
NOSTUFF
2
1
C5230
0805
1.8UH
21
L5230
SM
21
XW5230
MF-LF
1/16W
5%
10K
402
2
1
R5200
MF-LF
1/16W
5%
10K
402
2
1
R5201
100
1%
1/16W
MF-LF
402
2
1
R5220
402
CERM
10V
20%
0.1UF
2
1
C5221
MF-LF
1/16W
47
1%
402
2
1
R5222
51.1
MF-LF
1/16W
1%
402
2
1
R5223
0.1UF
CERM
10V
20%
402
2
1
C5223
402
MF-LF
1/16W
1%
100
2
1
R5221
4.7K
5%
MF-LF
1/16W
402
NOSTUFF
2
1
R5226
4.7K
5%
1/16W
MF-LF
402
2
1
R5227
402
MF-LF
1/16W
1%
47
2
1
R5228
402
MF-LF
1/16W
5%
4.7K
2
1
R5224
402
MF-LF
1/16W
5%
4.7K
NOSTUFF
2
1
R5225
1UF
402
10%
6.3V
CERM
2
1
C5204
1UF
402
CERM
6.3V
10%
2
1
C5203
1UF
402
10%
6.3V
CERM
2
1
C5202
051-6772
52
102
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
GPU FRAME BUFFER
TP_GPU_ROMCS_L
FBBCLK1_L
FBBCLK1
FBD<101>
FBD<50>
FBD<51>
FBD<54>
FBD<48>
FBD<61>
FBD<62>
FBD<55>
FBD<52>
FBA<2>
FBDQS<7>
FBDQM<4>
FBDQM<6>
FBDQM<0>
FBDQS<0>
FBDQS<6>
FBDQS<4>
FBDQS<5>
FBDQM<2>
FBDQM<3>
FBDQM<1>
FBAWE_L
FBACLK0_L
FBACLK1
GPU_MVREFD
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
FBD<18>
FBD<20>
FBD<16>
FBD<17>
FBD<28>
FBD<30>
FBD<31>
FBD<29>
FBD<27>
FBD<25>
FBD<26>
FBD<24>
FBD<10>
FBD<13>
FBD<14>
FBD<15>
FBD<12>
FBD<11>
FBD<8>
FBD<9>
FBD<0>
FBD<1>
FBD<5>
FBD<7>
FBD<4>
FBD<6>
FBD<3>
FBD<2>
FBD<53>
FBD<49>
FBD<63>
FBD<60>
FBD<58>
FBD<57>
FBD<56>
FBD<59>
FBD<34>
FBD<33>
FBD<32>
FBD<36>
FBD<37>
FBD<38>
FBD<35>
FBD<47>
FBD<45>
FBD<46>
FBA<7>
PP2V5_GPU
FBD<23>
FBD<22>
FBD<21>
FBD<19>
FBA<10>
FBA<12>
FBA<13>
FBA<9>
FBA<8>
FBA<11>
FBACAS_L
FBACKE
FBA<3>
FBDQS<2>
FBDQS<3>
FBACLK1_L
FBACLK0
TP_FBACS1_L
FBA<1>
=PP1V8_GPU
FBD<39>
FBD<44>
FBD<42>
FBD<40>
FBD<41>
FBD<43>
FBDQM<5>
FBDQM<7>
FBA<6>
FBA<5>
FBA<4>
FBA<0>
TP_GPU_DIMA_1
TP_GPU_DIMA_0
FBBA<12>
FBD<104>
GPU_MEMTEST
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
GPU_MEMVMODE1
TP_FBBCS1_L
FBBCS0_L
FBBCAS_L
FBD<106>
FBD<107>
FBBCLK0_L
FBBCKE
FBBWE_L
FBBRAS_L
FBDQS<10>
FBDQS<11>
FBDQS<9>
FBDQS<14>
FBDQS<8>
FBDQS<15>
FBDQS<12>
FBDQS<13>
FBDQM<11>
FBDQM<10>
FBDQM<8>
FBDQM<9>
FBDQM<14>
FBDQM<12>
FBDQM<15>
FBDQM<13>
FBBA<9>
FBBA<8>
FBBA<7>
FBBA<6>
FBBA<2>
FBBA<3>
FBBA<1>
FBBA<0>
FBD<126>
FBD<123>
FBD<120>
FBD<99>
FBD<98>
FBD<97>
FBD<114>
FBD<118>
FBD<112>
FBD<113>
FBD<116>
FBD<127>
FBD<125>
FBD<124>
FBD<122>
FBD<103>
FBD<121>
FBD<100>
FBD<96>
FBD<105>
FBD<108>
FBD<110>
FBD<109>
FBD<111>
FBD<94>
FBD<93>
FBD<95>
FBD<92>
FBD<91>
FBD<88>
FBD<89>
FBD<90>
FBD<86>
FBD<87>
FBD<85>
FBD<84>
FBD<83>
FBD<81>
FBD<82>
FBD<80>
FBD<79>
FBD<78>
FBD<77>
FBD<76>
FBD<74>
FBD<73>
FBD<75>
FBD<72>
FBD<69>
FBD<71>
FBD<70>
FBD<68>
FBD<67>
FBD<66>
FBD<64>
FBD<117>
FBD<115>
FBD<119>
FBD<102>
FBD<65>
FBBA<13>
FBBA<11>
FBBA<10>
FBBA<4>
FBBA<5>
FBBCLK0
GPU_MEMVMODE0
TP_GPU_DIMB_0
TP_GPU_DIMB_1
TP_FBBA<14>
TP_FBA<14>
FBARAS_L
FBDQS<1>
FBACS0_L
PP2V5_GPU
=PP1V8_GPU
GND_GPU_MPVSS
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=0V
PP1V8_GPU_MPVDD
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=1.8V
PP2V5_GPU
GPU_MVREFS
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
55
58
55
58
55
54
52
54
52
54
55
55
54
54
54
54
54
54
54
54
54
54
52
54
54
54
54
54
54
54
54
54
54
51
54
54
54
54
54
54
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55
55
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7
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6
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7
50
7
Preliminary
Page 45
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
NET_SPACING_TYPE
PLACE R’S CLOSE TO MEMORY
FRAME BUFFER B TERMINATION
PLACE CLOCK TERMINATION AFTER MEMORY
GPU -> MEMORY -> TERMINATION
DIFFERENTIAL_PAIRNET_PHYSICAL_TYPE
ELECTRICAL_CONSTRAINT_SET
FRAME BUFFER A TERMINATION
22
63
RP5300
22
63
RP5301
22
54
RP5301
22
72
RP5301
22
81
RP5301
22
81
RP5302
22
54
RP5302
22
72
RP5302
22
63
RP5302
GPU128BIT
22
54
RP5303
GPU128BIT
22
63
RP5303
22
GPU128BIT
72
RP5303
GPU128BIT
22
81
RP5303
22
GPU128BIT
63
RP5304
22
GPU128BIT
81
RP5305
22
GPU128BIT
54
RP5305
22
GPU128BIT
72
RP5305
22
GPU128BIT
63
RP5305
22
GPU128BIT
54
RP5304
22
GPU128BIT
72
RP5304
22
GPU128BIT
81
RP5304
22
GPU128BIT
81
RP5306
22
GPU128BIT
72
RP5306
22
GPU128BIT
63
RP5306
GPU128BIT
22
54
RP5307
GPU128BIT
22
63
RP5307
GPU128BIT
22
72
RP5307
GPU128BIT
22
81
RP5307
GPU128BIT
22
54
RP5308
GPU128BIT
22
63
RP5308
GPU128BIT
22
81
RP5308
GPU128BIT
22
72
RP5308
GPU128BIT
22
63
RP5309
GPU128BIT
22
54
RP5309
GPU128BIT
22
81
RP5309
GPU128BIT
22
72
RP5309
GPU128BIT
22
72
RP5310
GPU128BIT
22
63
RP5310
GPU128BIT
22
54
RP5310
GPU128BIT
22
81
RP5310
22
GPU128BIT
81
RP5311
22
GPU128BIT
72
RP5311
22
GPU128BIT
63
RP5311
22
GPU128BIT
54
RP5311
22
GPU128BIT
54
RP5306
22
GPU128BIT
54
RP5312
22
GPU128BIT
81
RP5313
22
GPU128BIT
54
RP5313
22
GPU128BIT
63
RP5313
22
GPU128BIT
72
RP5313
22
GPU128BIT
81
RP5314
22
GPU128BIT
72
RP5314
22
GPU128BIT
63
RP5312
22
GPU128BIT
72
RP5312
22
GPU128BIT
81
RP5312
22
GPU128BIT
54
RP5314
22
GPU128BIT
63
RP5314
22
GPU128BIT
63
RP5315
22
GPU128BIT
72
RP5315
22
GPU128BIT
81
RP5315
22
GPU128BIT
54
RP5315
22
54
RP5316
22
81
RP5316
22
63
RP5316
22
72
RP5316
GPU128BIT
22
81
RP5317
GPU128BIT
22
54
RP5317
GPU128BIT
22
72
RP5317
GPU128BIT
22
63
RP5317
22
GPU128BIT
63
RP5318
GPU128BIT
22
54
RP5318
22
GPU128BIT
81
RP5318
22
GPU128BIT
72
RP5318
GPU128BIT
22
63
RP5319
GPU128BIT
22
72
RP5319
GPU128BIT
22
81
RP5319
22
GPU128BIT
54
RP5319
402
56.2
1%
1/16W
MF-LF
2
1
R5320
MF-LF
1/16W
1%
56.2
402
2
1
R5321
402
0.01UF
20%
16V
CERM
2
1
C5321
402
56.2
1%
1/16W
MF-LF
2
1
R5323
MF-LF
1/16W
1%
56.2
402
2
1
R5322
402
0.01UF
20%
16V
CERM
2
1
C5323
0.01UF
16V
CERM
20%
402
2
1
C5325
MF-LF
1/16W
1%
56.2
402
2
1
R5324
402
56.2
1%
1/16W
MF-LF
2
1
R5325
402
56.2
1%
1/16W
MF-LF
2
1
R5326
402
0.01UF
20%
16V
CERM
2
1
C5327
MF-LF
1/16W
1%
56.2
402
2
1
R5327
I421
I423
I425
I426
I427
I428
I429
I430
I431
I432
I433
I434
I435
I436
22
81
RP5320
22
72
RP5320
22
63
RP5320
22
54
RP5320
22
81
RP5321
22
72
RP5321
22
63
RP5321
22
54
RP5321
22
54
RP5322
22
63
RP5322
22
72
RP5322
22
81
RP5322
22
81
RP5323
22
54
RP5323
22
63
RP5323
22
72
RP5323
22
54
RP5324
22
63
RP5324
22
72
RP5324
22
81
RP5324
22
81
RP5325
22
54
RP5325
22
63
RP5325
22
72
RP5325
22
54
RP5326
22
63
RP5326
22
72
RP5326
22
81
RP5326
22
81
RP5327
22
54
RP5327
22
63
RP5327
22
72
RP5327
22
72
RP5328
22
81
RP5328
22
54
RP5328
22
63
RP5328
22
54
RP5329
22
63
RP5329
22
81
RP5329
22
72
RP5329
22
81
RP5330
22
63
RP5330
22
54
RP5330
22
72
RP5330
22
72
RP5331
22
81
RP5331
22
63
RP5331
22
54
RP5331
22
54
RP5300
22
81
RP5300
22
72
RP5300
53
102
11
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
FB TERMINATION
RFBD<114>
RFBD<93>
GPU_FBCLK
FBBCLK1_L
FBBCLK1
GPU_FBCLK
GPU_FBGPU_FB
FBBA<13..0>
FBACLK1_TERM
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
FBBCLK0_TERM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
FBBCLK1_TERM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
FBACLK0_TERM
RFBDQS<3>
FBACLK0_L
FBD<63>
FBD<87>
FBD<73>
FBD<68>
FBD<69>
FBD<17>
GPU_FBCLK
FBACLK1
FBACLK1_L
GPU_FBCLK
GPU_FBCLK
FBACLK1
FBACLK1
GPU_FBCLK
GPU_FBCLK
FBACLK0_L
FBACLK0
GPU_FBCLK
GPU_FBCLK
FBACLK0
FBACLK0
GPU_FBCLK
GPU_FBGPU_FB
FBDQS<15..0>
GPU_FB GPU_FB
FBDQM<15..0>
GPU_FB GPU_FB
RFBD<127..0>
RFBD<95>
FBD<95>
RFBD<92>
RFBD<79>
RFBD<94>
FBACLK0
FBACLK1
FBACLK1_L
RFBDQS<0>
FBDQS<0>
MAKE_BASE=TRUE
RFBDQS<1>
FBDQS<1>
MAKE_BASE=TRUE
RFBDQS<2>
FBDQS<2>
MAKE_BASE=TRUE
MAKE_BASE=TRUE
FBDQS<3>
RFBDQS<4>
FBDQS<4>
MAKE_BASE=TRUE
RFBDQS<5>
FBDQS<5>
MAKE_BASE=TRUE
RFBDQS<6>
MAKE_BASE=TRUE
FBDQS<6>
RFBDQS<7>
FBDQS<7>
MAKE_BASE=TRUE
FBD<32>
RFBD<32>
FBD<33>
RFBD<33>
FBD<34>
RFBD<34>
FBD<35>
RFBD<35>
FBD<36>
RFBD<36>
FBD<38>
RFBD<38>
FBD<37>
RFBD<37>
FBD<39>
RFBD<39>
FBD<40>
RFBD<40>
FBD<41>
RFBD<41>
FBD<44>
RFBD<44>
FBD<42>
RFBD<42>
FBD<43>
RFBD<43>
FBD<45>
RFBD<45>
FBD<46>
RFBD<46>
FBD<48>
RFBD<48>
FBD<49>
RFBD<49>
FBD<47>
RFBD<47>
FBD<50>
RFBD<50>
FBD<51>
RFBD<51>
FBD<53>
RFBD<53>
FBD<54>
RFBD<54>
FBD<52>
RFBD<52>
FBD<56>
RFBD<56>
FBD<55>
RFBD<55>
FBD<29>
RFBD<29>
FBD<30>
RFBD<30>
FBD<31>
RFBD<31>
FBD<27>
RFBD<27>
FBD<28>
RFBD<28>
FBD<24>
RFBD<24>
FBD<25>
RFBD<25>
FBD<26>
RFBD<26>
FBD<0>
RFBD<0>
FBD<1>
RFBD<1>
RFBD<17>
FBD<2>
RFBD<2>
FBD<3>
RFBD<3>
FBD<16>
RFBD<16>
FBD<18>
RFBD<18>
FBD<15>
RFBD<15>
FBD<14>
RFBD<14>
FBD<19>
RFBD<19>
FBD<13>
RFBD<13>
RFBD<12>
FBD<11>
RFBD<11>
FBD<9>
RFBD<9>
FBD<10>
RFBD<10>
RFBD<5>
FBD<8>
FBD<57>
RFBD<57>
FBD<6>
RFBD<6>
FBD<58>
RFBD<58>
FBD<59>
RFBD<59>
FBD<61>
RFBD<61>
FBD<60>
RFBD<60>
FBD<62>
RFBD<62>
RFBD<63>
FBD<4>
RFBD<4>
FBD<7>
RFBD<7>
FBD<21>
RFBD<21>
FBD<20>
RFBD<20>
FBD<22>
RFBD<22>
FBD<23>
RFBD<23>
FBBCLK0
FBBCLK0_L
FBBCLK1
FBBCLK1_L
RFBDQS<8>
FBDQS<8>
MAKE_BASE=TRUE
RFBDQS<9>
FBDQS<9>
MAKE_BASE=TRUE
RFBDQS<10>
FBDQS<10>
MAKE_BASE=TRUE
RFBDQS<11>
FBDQS<11>
MAKE_BASE=TRUE
RFBDQS<13>
FBDQS<13>
MAKE_BASE=TRUE
RFBDQS<12>
FBDQS<12>
MAKE_BASE=TRUE
RFBDQS<15>
FBDQS<15>
MAKE_BASE=TRUE
RFBDQS<14>
FBDQS<14>
MAKE_BASE=TRUE
FBD<99>
RFBD<99>
FBD<97>
RFBD<97>
FBD<96>
RFBD<96>
FBD<98>
RFBD<98>
FBD<102>
RFBD<102>
FBD<100>
RFBD<100>
FBD<101>
RFBD<101>
FBD<103>
RFBD<103>
FBD<104>
RFBD<104>
FBD<105>
RFBD<105>
FBD<106>
RFBD<106>
FBD<107>
RFBD<107>
FBD<109>
RFBD<109>
FBD<108>
RFBD<108>
FBD<110>
RFBD<110>
FBD<112>
RFBD<112>
FBD<111>
RFBD<111>
FBD<113>
RFBD<113>
FBD<114>
FBD<115>
RFBD<115>
FBD<117>
RFBD<117>
FBD<116>
RFBD<116>
FBD<118>
RFBD<118>
FBD<119>
RFBD<119>
FBD<120>
RFBD<120>
FBD<121>
RFBD<121>
FBD<122>
RFBD<122>
FBD<123>
RFBD<123>
FBD<124>
RFBD<124>
FBD<125>
RFBD<125>
FBD<127>
RFBD<127>
FBD<126>
RFBD<126>
FBD<64>
RFBD<64>
FBD<66>
RFBD<66>
FBD<65>
RFBD<65>
FBD<67>
RFBD<67>
FBD<85>
RFBD<85>
FBD<84>
RFBD<84>
FBD<86>
RFBD<86>
RFBD<73>
RFBD<87>
FBD<72>
RFBD<72>
FBD<75>
RFBD<75>
FBD<74>
RFBD<74>
FBD<70>
RFBD<70>
RFBD<68>
RFBD<69>
FBD<71>
RFBD<71>
FBD<80>
RFBD<80>
FBD<81>
RFBD<81>
FBD<82>
RFBD<82>
FBD<83>
RFBD<83>
FBD<76>
RFBD<76>
FBD<77>
RFBD<77>
FBD<78>
RFBD<78>
FBD<79>
FBD<91>
RFBD<91>
FBD<90>
RFBD<90>
FBD<89>
RFBD<89>
FBD<94>
FBD<88>
RFBD<88>
FBD<93>
RFBD<8>
FBD<12>
FBD<5>
GPU_FB GPU_FB
FBA<13..0>
FBD<127..0>
GPU_FBGPU_FB
FBD<92>
GPU_FBCLK
FBBCLK1
FBBCLK1
GPU_FBCLK
GPU_FBCLK
FBBCLK0_L
FBBCLK0
GPU_FBCLK
GPU_FBCLK
FBBCLK0
FBBCLK0
GPU_FBCLK
55
55
54
54
54
54
54
55
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
55
55
55
55
54
55
55
55
55
55
53
55
53
53
53
53
53
53
53
53
53
53
53
53
54
53
55 53
55
55
55
53
53
53
53
53
53
53
53
53
53
53
53 53
53 53
53 54
53 53
53 53
53 53
53 53
53 54
53 53
53 54
53 54
53 53
53 53
53 53
53 53
53 53
53 53
53 53
53 54
53 54
53 54
53 54
53 54
53 54
53 54
53 53
53 53
53 54
53 54
53 53
53 53
53 53
53 53
53 54
53 53
54
53 53
53 53
53 53
53 53
53 54
53 53
53 53
53 53
53
53 53
53 53
53 54
54
53
53 54 53 53
53 54
53 54
53 54
53 54
53 54
54
53 53
53 53
53 53
53 54
53 53
53 53
53
53
53
53
53
53
53
53
53
53
53
53
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
55
55
53 55
53 55
53 55
53 55
55
55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53 55
53
53 55
53 55
53 55
53
53 55
53
53
53
53
54
53
53
53
53
53
53
53
52
52
54
52
52
52
52
52
52
52
52
52
52
52
52
52
6
53 52
53
53
53
52
52
52
54 52
54 52
54 52
52
54 52
54 52
54 52
54 52
52
6
52
6
52 53
52
6
52
6
52
6
52
6
52 53
52
6
52 53
52 53
52
6
52
6
52
6
52
6
52
6
52
6
52
6
52 53
52 53
52 53
52 53
52 53
52 53
52 53
52
6
52
6
52 53
52 53
52
6
52
6
52
6
52
6
52 53
52
6
53
52
6
52
6
52
6
52
6
52 53
52
6
52
6
52
6
6
52
6
52
6
52 53
53
52
52 53 52
6
52 53
52 53
52 53
52 53
52 53
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52
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6
52 53
52
6
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6
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55 52
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6
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52
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52
52
Preliminary
Page 46
(1 OF 2)
CK
CK
CKE
RFU2
RFU1
MCL
DQ31
NC
BA1
DQ26
DQ27
DQ28
DQ29
DQ30
DQ25
DQ24
DQ21
DQ22
DQ23
DQ19
DQ20
DQ14
DQ16
DQ17
DQ18
DQ15
DQ13
DQ12
DQ11
DQ9
DQ10
DQ8
DQ4
DQ6
DQ5
DQ7
DQ3
DQ2
DQ1
DQ0
CS
RAS
CAS
WE
BA0
DM3
DQS3
DM2
DM1
DM0
DQS2
DQS0
DQS1
A0
A1
A2
A3
A6
A5
A4
A9
A8
A7
A10
A11
VSSQ
VSS_THERM
VSS
VDDQ
VREF
VDD
(2 OF 2)
(1 OF 2)
CK
CK
CKE
RFU2
RFU1
MCL
DQ31
NC
BA1
DQ26
DQ27
DQ28
DQ29
DQ30
DQ25
DQ24
DQ21
DQ22
DQ23
DQ19
DQ20
DQ14
DQ16
DQ17
DQ18
DQ15
DQ13
DQ12
DQ11
DQ9
DQ10
DQ8
DQ4
DQ6
DQ5
DQ7
DQ3
DQ2
DQ1
DQ0
CS
RAS
CAS
WE
BA0
DM3
DQS3
DM2
DM1
DM0
DQS2
DQS0
DQS1
A0
A1
A2
A3
A6
A5
A4
A9
A8
A7
A10
A11
VSSQ
VSS_THERM
VSS
VDDQ
VREF
VDD
(2 OF 2)
DESCRIPTION
REFERENCE DES
BOM OPTION
QTY
PART NUMBER
CRITICAL
TABLE_ALT_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
SGRAM0 & SGRAM1 MEMORY SUPPORT
EVENLY PLACE 0.1UF CAP & 0.01UF CAPS
PLACE NEAR VDD PINSPLACE NEAR VDD PINS
DDR SDRAM A VREF
805
CERM
20%
6.3V
10UF
2
1
C5400
6.3V
CERM
805
20%
10UF
2
1
C5401
10V
CERM
0.1UF
20%
402
2
1
C5402
0.1UF
10V
402
20%
CERM
2
1
C5403
0.1UF
20%
402
10V
CERM
2
1
C5404
0.1UF
20%
CERM
402
10V
2
1
C5405
CERM
402
10V
20%
0.1UF
2
1
C5406
0.1UF
20%
402
CERM
10V
2
1
C5407
0.1UF
20%
10V
CERM
402
2
1
C5408
10V
402
20%
CERM
0.1UF
2
1
C5409
0.1UF
20%
10V
CERM
402
2
1
C5410
0.1UF
20%
10V
CERM
402
2
1
C5411
20%
10V
CERM
402
0.1UF
2
1
C5412
0.1UF
20%
10V
402
CERM
2
1
C5413
805
20%
6.3V
CERM
10UF
2
1
C5414
805
20%
6.3V
CERM
10UF
2
1
C5415
OMIT
BGA
SDRAM_DDR_4MX32
L3
M10
L9
M2
N3
M4
M3
L13
L12
H11
H4
C11
C4
M13
B13
H2
H13
B2
K12
K13
E2
D2
D3
C2
B8
C9
B5
B9
B10
C13
D12
D13
E13
K3
K2
J2
J3
B6
G2
G3
F2
F3
F12
F13
G12
G13
J12
J13
C6
B7
B12
H3
H12
B3
N2
N12
M12
M11
L2
M5
N4
M8
N11
N10
N9
M9
N8
N7
M6
M7
L6
N6
N5
U5400
OMIT
SDRAM_DDR_4MX32
BGA
H7
H6
G9
G8
G7
G6
F9
F8
J9
J8
J7
J6
H9
H8
F7
F6
E9
E6
D11
D10
D9
D6
D5
D4
K10
K5
J10
J5
H10
H5
G10
G5
F10
F5
B11
B4
L10
L5
K9
K8
K7
K6
E10
E8
E7
E5
N13
F11
F4
E12
E3
C12
C10
C8
C7
K11
K4
J11
J4
G11
G4
C5
C3
L11
L8
L7
L4
E11
E4
D8
D7
U5400
OMIT
BGA
SDRAM_DDR_4MX32
L3
M10
L9
M2
N3
M4
M3
L13
L12
H11
H4
C11
C4
M13
B13
H2
H13
B2
K12
K13
E2
D2
D3
C2
B8
C9
B5
B9
B10
C13
D12
D13
E13
K3
K2
J2
J3
B6
G2
G3
F2
F3
F12
F13
G12
G13
J12
J13
C6
B7
B12
H3
H12
B3
N2
N12
M12
M11
L2
M5
N4
M8
N11
N10
N9
M9
N8
N7
M6
M7
L6
N6
N5
U5401
OMIT
SDRAM_DDR_4MX32
BGA
H7
H6
G9
G8
G7
G6
F9
F8
J9
J8
J7
J6
H9
H8
F7
F6
E9
E6
D11
D10
D9
D6
D5
D4
K10
K5
J10
J5
H10
H5
G10
G5
F10
F5
B11
B4
L10
L5
K9
K8
K7
K6
E10
E8
E7
E5
N13
F11
F4
E12
E3
C12
C10
C8
C7
K11
K4
J11
J4
G11
G4
C5
C3
L11
L8
L7
L4
E11
E4
D8
D7
U5401
402
20%
10V
CERM
0.1UF
2
1
C5417
402
MF-LF
1/16W
1%
1K
2
1
R5400
1%
1/16W
MF-LF
402
1K
2
1
R5401
10%
0.001UF
50V
CERM
402
2
1
C5418
0.001UF
CERM
50V
10%
402
2
1
C5419
0.001UF
10%
50V
CERM
402
2
1
C5420
50V
CERM
0.001UF
10%
402
2
1
C5421
0.001UF
402
10%
50V
CERM
2
1
C5422
CERM
50V
10%
402
0.001UF
2
1
C5423
0.1UF
402
CERM
20%
10V
2
1
C5424
0.1UF
CERM
20%
10V
402
2
1
C5425
0.1UF
CERM
20%
10V
402
2
1
C5426
CERM
20%
10V
0.1UF
402
2
1
C5427
0.1UF
CERM
20%
10V
402
2
1
C5428
0.1UF
CERM
20%
10V
402
2
1
C5429
0.001UF
402
CERM
50V
10%
2
1
C5430
CERM
50V
10%
402
0.001UF
2
1
C5431
CERM
0.001UF
10%
402
50V
2
1
C5432
0.001UF
10%
402
50V
CERM
2
1
C5433
0.1UF
20%
10V
CERM
402
2
1
C5434
0.1UF
20%
10V
CERM
402
2
1
C5435
54
102
11
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
GPU DDR SDRAM A
U5400,U5401
CRITICAL
2
333S0299
SDRAM,8MX32,DDR,300MHZ
HYNIX128
U5400,U5401,U5500,U5501
333S0292 333S0252
HYNIX64
SAM4M B-DIE
333S0290 333S0251
U5400,U5401,U5500,U5501
SAMSUNG64
HYN4M G-DIE
U5400,U5401
CRITICAL
SDRAM,4MX32,DDR,300MHZ
333S0252
2
HYNIX64
SAMSUNG64
2
CRITICAL
U5400,U5401SDRAM,4MX32,DDR,300MHZ
333S0251
PP2V5_GPU
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
VOLTAGE=1.25V
SGRAVREF
FBA<7>
TP_U5401_RFU1
NO_TEST
NO_TEST
TP_U5401_RFU2
TP_U5400_RFU1
NO_TEST
NO_TEST
TP_U5400_RFU2
FBACLK0_L
FBACLK0
RFBDQS<0>
FBA<10>
PP2V5_GPU
FBA<2>
RFBD<52>
RFBD<20>
RFBD<43>
FBACS0_L
RFBD<21>
FBACAS_L
FBAWE_L
RFBD<13>
RFBD<2>
RFBD<1>
RFBD<31>
RFBD<26>
RFBD<15>
RFBD<12>
RFBD<10>
RFBD<11>
RFBD<8>
RFBD<9>
RFBD<4>
RFBD<5>
RFBD<7>
RFBD<3>
RFBD<0>
RFBD<30>
RFBD<29>
RFBD<27>
RFBD<28>
RFBD<23>
RFBD<22>
RFBD<19>
RFBD<16>
RFBD<18>
FBA<0>
RFBDQS<1>
FBDQM<1>
FBDQM<2>
FBA<12>
FBACKE
FBA<2>
FBA<3>
FBA<1>
FBA<0>
FBA<11>
FBA<10>
FBA<9>
FBA<8>
FBA<4>
FBA<5>
FBA<6>
RFBDQS<4>
RFBDQS<6>
FBA<13>
FBA<12>
FBDQM<5>
FBDQM<7>
FBDQM<6>
FBDQM<4>
RFBDQS<7>
RFBDQS<5>
FBACKE
FBAWE_L
FBARAS_L
FBACAS_L
RFBD<48>
RFBD<50>
RFBD<49>
RFBD<36>
RFBD<34>
RFBD<37>
RFBD<35>
RFBD<33>
RFBD<32>
RFBD<54>
RFBD<55>
RFBD<53>
RFBD<51>
RFBD<60>
RFBD<63>
RFBD<61>
RFBD<62>
RFBD<59>
RFBD<58>
RFBD<57>
RFBD<56>
RFBD<38>
RFBD<39>
RFBD<46>
RFBD<45>
RFBD<47>
RFBD<42>
RFBD<44>
RFBD<40>
RFBD<41>
RFBDQS<2>
FBA<11>
RFBD<14>
RFBD<17>
FBA<5>
FBA<7>
FBA<8>
FBA<9>
PP2V5_GPU PP2V5_GPU
FBA<3>
PP2V5_GPU
FBACLK1_L
FBACLK1
FBA<13>
PP2V5_GPU
FBA<4>
FBA<6>
FBDQM<3>
FBACS0_L
SGRAVREF
SGRAVREF
RFBD<6>
PP2V5_GPU
FBA<1>
RFBDQS<3>
FBARAS_L
FBDQM<0>
RFBD<25>
RFBD<24>
PP2V5_GPU
55
55
55 55
55
55
55
55
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54
54 54
54
54
54
54
54
54
54
54
54
52
53
53
53
53
52
53
53
54
53
54
54
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
54
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
54
54
54
54
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
52 52
53
52
53
53
53
52
53
53
53
54
53
52
53
54
53
53
53
52
7
54
52
52
52
53
52
7
52
53
53
6
52
6
52
52
6
6
6
53
6
53
6
53
6
6
6
6
53
6
6
53
6
6
53
6
6
6
6
6
6
52
53
52
52
52
52
52
52
52
52
52
52
52
52
52
52
52
53
53
52
52
52
52
52
52
53
53
52
52
52
52
6
53
6
6
53
6
6
6
6
53
53
53
53
53
53
53
53
53
53
53
53
6
53
6
6
6
6
53
6
53
53
52
6
53
52
52
52
52
7 7
52
7
52
52
52
7
52
52
52
52
54
54
6
7
52
53
52
52
6
6
7
Preliminary
Page 47
(1 OF 2)
CK
CK
CKE
RFU2
RFU1
MCL
DQ31
NC
BA1
DQ26
DQ27
DQ28
DQ29
DQ30
DQ25
DQ24
DQ21
DQ22
DQ23
DQ19
DQ20
DQ14
DQ16
DQ17
DQ18
DQ15
DQ13
DQ12
DQ11
DQ9
DQ10
DQ8
DQ4
DQ6
DQ5
DQ7
DQ3
DQ2
DQ1
DQ0
CS
RAS
CAS
WE
BA0
DM3
DQS3
DM2
DM1
DM0
DQS2
DQS0
DQS1
A0
A1
A2
A3
A6
A5
A4
A9
A8
A7
A10
A11
VSSQ
VSS_THERM
VSS
VDDQ
VREF
VDD
(2 OF 2)
(1 OF 2)
CK
CK
CKE
RFU2
RFU1
MCL
DQ31
NC
BA1
DQ26
DQ27
DQ28
DQ29
DQ30
DQ25
DQ24
DQ21
DQ22
DQ23
DQ19
DQ20
DQ14
DQ16
DQ17
DQ18
DQ15
DQ13
DQ12
DQ11
DQ9
DQ10
DQ8
DQ4
DQ6
DQ5
DQ7
DQ3
DQ2
DQ1
DQ0
CS
RAS
CAS
WE
BA0
DM3
DQS3
DM2
DM1
DM0
DQS2
DQS0
DQS1
A0
A1
A2
A3
A6
A5
A4
A9
A8
A7
A10
A11
VSSQ
VSS_THERM
VSS
VDDQ
VREF
VDD
(2 OF 2)
DESCRIPTION
REFERENCE DES
BOM OPTION
QTY
PART NUMBER
CRITICAL
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
EVENLY PLACE 0.1UF CAP & 0.01 UF CAPS
PLACE NEAR VDD PINSPLACE NEAR VDD PINS
DDR SDRAM B VREF
SGRAM0 & SGRAM1 MEMORY SUPPORT
805
CERM
20%
6.3V
10UF
GPU128BIT
2
1
C5500
GPU128BIT
6.3V
CERM
805
20%
10UF
2
1
C5501
CERM
402
10V
20%
GPU128BIT
0.1UF
2
1
C5502
GPU128BIT
0.1UF
402
20%
CERM
10V
2
1
C5503
10V
CERM
402
20%
GPU128BIT
0.1UF
2
1
C5504
CERM
402
10V
20%
GPU128BIT
0.1UF
2
1
C5505
GPU128BIT
0.1UF
CERM
402
10V
20%
2
1
C5506
402
CERM
10V
20%
GPU128BIT
0.1UF
2
1
C5507
GPU128BIT
20%
402
CERM
10V
0.1UF
2
1
C5508
GPU128BIT
0.1UF
10V
402
20%
CERM
2
1
C5509
402
10V
CERM
20%
GPU128BIT
0.1UF
2
1
C5510
10V
CERM
402
20%
GPU128BIT
0.1UF
2
1
C5511
0.1UF
20%
10V
CERM
402
GPU128BIT
2
1
C5512
GPU128BIT
CERM
402
10V
0.1UF
20%
2
1
C5513
805
20%
6.3V
CERM
10UF
GPU128BIT
2
1
C5514
GPU128BIT
805
20%
6.3V
CERM
10UF
2
1
C5515
SDRAM_DDR_4MX32
BGA
OMIT
L3
M10
L9
M2
N3
M4
M3
L13
L12
H11
H4
C11
C4
M13
B13
H2
H13
B2
K12
K13
E2
D2
D3
C2
B8
C9
B5
B9
B10
C13
D12
D13
E13
K3
K2
J2
J3
B6
G2
G3
F2
F3
F12
F13
G12
G13
J12
J13
C6
B7
B12
H3
H12
B3
N2
N12
M12
M11
L2
M5
N4
M8
N11
N10
N9
M9
N8
N7
M6
M7
L6
N6
N5
U5500
BGA
SDRAM_DDR_4MX32
OMIT
H7
H6
G9
G8
G7
G6
F9
F8
J9
J8
J7
J6
H9
H8
F7
F6
E9
E6
D11
D10
D9
D6
D5
D4
K10
K5
J10
J5
H10
H5
G10
G5
F10
F5
B11
B4
L10
L5
K9
K8
K7
K6
E10
E8
E7
E5
N13
F11
F4
E12
E3
C12
C10
C8
C7
K11
K4
J11
J4
G11
G4
C5
C3
L11
L8
L7
L4
E11
E4
D8
D7
U5500
BGA
SDRAM_DDR_4MX32
OMIT
L3
M10
L9
M2
N3
M4
M3
L13
L12
H11
H4
C11
C4
M13
B13
H2
H13
B2
K12
K13
E2
D2
D3
C2
B8
C9
B5
B9
B10
C13
D12
D13
E13
K3
K2
J2
J3
B6
G2
G3
F2
F3
F12
F13
G12
G13
J12
J13
C6
B7
B12
H3
H12
B3
N2
N12
M12
M11
L2
M5
N4
M8
N11
N10
N9
M9
N8
N7
M6
M7
L6
N6
N5
U5501
SDRAM_DDR_4MX32
BGA
OMIT
H7
H6
G9
G8
G7
G6
F9
F8
J9
J8
J7
J6
H9
H8
F7
F6
E9
E6
D11
D10
D9
D6
D5
D4
K10
K5
J10
J5
H10
H5
G10
G5
F10
F5
B11
B4
L10
L5
K9
K8
K7
K6
E10
E8
E7
E5
N13
F11
F4
E12
E3
C12
C10
C8
C7
K11
K4
J11
J4
G11
G4
C5
C3
L11
L8
L7
L4
E11
E4
D8
D7
U5501
GPU128BIT
10V
CERM
0.1UF
402
20%
2
1
C5517
1%
402
1/16W
MF-LF
GPU128BIT
1K
2
1
R5500
1/16W
GPU128BIT
1K
402
MF-LF
1%
2
1
R5501
GPU128BIT
0.1UF
402
CERM
20%
10V
2
1
C5518
0.1UF
CERM
10V
GPU128BIT
20%
402
2
1
C5519
CERM
0.1UF
402
10V
20%
GPU128BIT
2
1
C5520
GPU128BIT
402
10%
50V
CERM
0.001UF
2
1
C5521
GPU128BIT
402
CERM
20%
0.1UF
10V
2
1
C5522
GPU128BIT
0.1UF
402
10V
20%
CERM
2
1
C5523
0.1UF
GPU128BIT
402
CERM
20%
10V
2
1
C5524
GPU128BIT
402
CERM
50V
10%
0.001UF
2
1
C5525
10%
402
GPU128BIT
CERM
50V
0.001UF
2
1
C5526
402
GPU128BIT
CERM
50V
10%
0.001UF
2
1
C5527
GPU128BIT
0.001UF
402
10%
50V
CERM
2
1
C5528
402
50V
10%
0.001UF
CERM
GPU128BIT
2
1
C5529
402
50V
CERM
10%
GPU128BIT
0.001UF
2
1
C5530
GPU128BIT
402
CERM
50V
10%
0.001UF
2
1
C5531
GPU128BIT
0.001UF
402
10%
50V
CERM
2
1
C5532
402
50V
10%
GPU128BIT
0.001UF
CERM
2
1
C5533
402
0.1UF
10V
CERM
20%
GPU128BIT
2
1
C5534
402
0.1UF
10V
CERM
20%
GPU128BIT
2
1
C5535
333S0252
SDRAM,4MX32,DDR,300MHZ
CRITICAL
2
U5500,U5501
HYNIX64
2
333S0251 CRITICAL
U5500,U5501SDRAM,4MX32,DDR,300MHZ
SAMSUNG64
U5500,U5501SDRAM,8MX32,DDR,300MHZ
CRITICAL
2
333S0299 HYNIX128
55
051-6772
11
102
SYNC_MASTER=N/A
SYNC_DATE=N/A
GPU DDR SDRAM B
FBBA<4>
SGRBVREF
FBBA<13>
RFBD<76>
RFBD<74>
RFBD<77>
RFBD<83>
RFBD<81>
RFBD<80>
RFBD<91>
RFBD<93>
RFBD<67>
RFBD<90>
RFBD<70>
RFBD<68>
RFBD<69>
RFBD<71>
RFBD<65>
RFBD<66>
RFBD<95>
RFBD<94>
RFBD<73>
RFBD<87>
RFBD<86>
RFBD<84>
RFBD<85>
RFBD<113>
RFBD<114>
RFBD<101>
RFBD<98>
RFBD<100>
RFBD<99>
RFBD<96>
RFBD<97>
RFBD<118>
RFBD<119>
RFBD<117>
RFBD<116>
RFBD<124>
RFBD<127>
RFBD<125>
RFBD<126>
RFBD<123>
RFBD<121>
RFBD<102>
RFBD<103>
RFBD<111>
RFBD<109>
RFBD<110>
RFBD<106>
RFBD<108>
RFBD<107>
RFBD<105>
RFBD<104>
RFBD<122>
RFBD<120>
RFBD<115>
RFBD<112>
RFBD<72>
PP2V5_GPU
PP2V5_GPU
PP2V5_GPUPP2V5_GPU
RFBDQS<11>
FBBA<1>
RFBDQS<8>
FBBA<5>
FBBA<8>
FBBA<9>
FBBA<10>
FBDQM<11>
FBBWE_L
FBBRAS_L
FBBCS0_L
FBBCKE
FBBCAS_L
FBBA<0>
FBBA<2>
RFBDQS<12>
RFBDQS<14>
FBBA<7>
FBBA<9>
FBBA<10>
FBBA<13>
FBBA<12>
FBDQM<13>
FBDQM<15>
FBDQM<14>
FBDQM<12>
RFBDQS<15>
RFBDQS<13>
FBBCKE
FBBWE_L
FBBRAS_L
FBBCS0_L
FBBCAS_L
FBBA<2>
FBBA<11>
FBBA<11>
FBBA<8>
FBBA<6>
FBBA<5>
FBBA<4>
FBBA<3>
FBBA<1>
FBBCLK1_L
FBBCLK1
RFBD<64>
RFBD<92>
FBBA<6>
RFBDQS<9>
RFBDQS<10>
FBDQM<9>
FBBA<12>
PP2V5_GPU
PP2V5_GPU
RFBD<89>
RFBD<88>
RFBD<78>
RFBD<79>
RFBD<75>
FBDQM<10>
FBBA<7>
PP2V5_GPU
SGRBVREF
FBBA<0>
FBBA<3>
RFBD<82>
FBDQM<8>
FBBCLK0
FBBCLK0_L
TP_U5500_RFU2
NO_TEST
NO_TEST
TP_U5500_RFU1
TP_U5501_RFU2
NO_TEST
NO_TEST
TP_U5501_RFU1
MIN_NECK_WIDTH=0.25MM
SGRBVREF
VOLTAGE=1.25V
MIN_LINE_WIDTH=0.5MM
PP2V5_GPU
55
55
55 55
55
55
55
55
55
55
54
54
54 54
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
55
54
54
55
54
55
55
54
53
53
52
52
52 52
53
53
53
53
53
53
55
55
55
55
55
53
53
53
53
53
53
53
53
53
53
53
55
55
55
55
55
53
53
53
53
53
53
53
53
53
53
53
53
53
53
52
52
53
53
52
53
53
53
53
53
52
52
55
52
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
53
7
7
7 7
53
52
53
52
52
52
52
52
52
52
52
52
52
52
52
53
53
52
52
52
52
52
52
52
52
52
53
53
52
52
52
52
52
52
52
52
52
52
52
52
52
52
52
52
53
53
52
53
53
52
52
7
7
53
53
53
53
53
52
52
7
55
52
52
53
52
52
52
55
7
Preliminary
Page 48
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
MULTIFUNC(1:0)
01 - TWO FUNCTION DEVICE. NO AGP IN EITHER FUNCTION
Q45 A/B SUPPORT IS FOR DEVELOPMENT
FPD_PWR_ON
GPIO(9,13:11)
GPIO(3:2)
APPLE GPIO ATI STRAP
ID_DISABLE
BUSCFG(2:0)
MEMSTRAP(1:0)
GPIO<7>
LCDDATA(17:16)
DEFAULT
00
INTERNAL
PULL-DOWN
00
CLOCK PHASE ADJUSTMENT BETWEEN X1 CLK AND X2CLK
00 - REFCLK SLIGHTLY EARLIER THEN FEEDBACK
AGP 1X CLOCK FEEDBACK PHASE ADJUSTMENT WRT REFCLK (CPUCLK)
10 - REFCLK 1 TAP LATER THEN FEEDBACK
01 - REFCLK 1 TAP EARLIER THEN FEEDBACK
DESCRIPTION
00 - 0 TAP DELAY
PIN
GPIO(1:0)
AGPFBSKEW(1:0)
11 - REFCLK 2 TAPS EARLIER THEN FEEDBACK CLOCK (ATI RECOMMENDED)
INTERNAL
PULL-DOWN
0
INTERNAL PULL-DOWN
ROMIDCFG(3:0)
X1CLK_SKWE(1:0)
0X0X - NO ROM, CHG_ID=0
IF NO ROM ATTACHED, CONTROLS CHIP IDS. IF ROM- IDENTIFIES TYPE
GPIO(8)
1 - SHUTS THE CHIP DOWN BY NOT RESPONDING TO ANY CONFIG CYCLES
STRAP
0 - NORMAL OPERATION
GPIO(6:4)
000
PULL-DOWN
INTERNAL
00
10 - TWO FUNCTION DEVICE. AGP ONLY IN FUNCTION 0
IF BUSCFG PIN BASED STRAPS ARE SET TO PCI, THEN AGP WILL NOT BE
11 - TWO FUNCTION DEVICE. AGP IN BOTH FUNCTIONS
00 - SINGLE FUNCTION DEVICE.
ENABLED IN ANY FUNCTION.
GPU_GPIO<15,10>
AGP8X_DETB
BUSCFG[2:0]
AGPMODE
SIGNALING
IDSEL
AD160.8V
AGP8X
0000
INV_CUR_HI
MULTI-FUNCTION DEVICE SELECT
INV_CUR_HI
1
0
1
0
0
1
Q45 A
PANEL ID
SYSTEM
0X9C27
0X9C39
TBD
TBD
0X9C3A
GPIO<16>
GPIO<14>
TMDS_EN
1
0X9C38
0X9C3A
OUTPUT: GPU READS PANEL ID AND SETS THIS BIT ACCORDINGLY
FOR REFERENCE ONLY, ACTIONS COME FROM BOOTROM
Q45 B
Q45 C
Q45 D
OUTPUT: PANEL POWER SEQUENCING
INPUT: PANEL POWER SEQUENCING
00 - SAMSUNG 4MX32
01 - UNDEFINED
10 - HYNIX 4MX32
11 - HYNIX 8MX32
402
10K
5%
1/16W
MF-LF
2
1
R5600
402
10K
5%
1/16W
MF-LF
NOSTUFF
2
1
R5601
402
10K
5%
1/16W
MF-LF
2
1
R5602
10V
CERM
20%
402
0.1UF
2
1
C5600
402
10K
5%
1/16W
MF-LF
NOSTUFF
2
1
R5603
MF-LF
1/16W
5%
47
402
21
R5620
1/16W
5%
47
402
MF-LF
21
R5611
MF-LF
1/16W
10K
402
1%
2
1
R5610
SOT23-5
MC74VHC1G08
5
4
1
2
3
U5600
402
0
5%
MF-LF
1/16W
NOSTUFF
21
R5609
402
10V
20%
CERM
0.1UF
2
1
C5601
MC74VHC1G08
SOT23-5
5
4
1
2
3
U5601
MF-LF
1/16W
5%
0
402
NOSTUFF
21
R5621
MF-LF
1/16W
5%
10K
402
2
1
R5604
1/16W
MF-LF
5%
10K
402
2
1
R5605
10K
402
5%
1/16W
MF-LF
2
1
R5606
MF-LF
1/16W
5%
10K
402
2
1
R5607
NOSTUFF
402
10K
1/16W
MF-LF
5%
2
1
R5614
NOSTUFF
5%
1/16W
MF-LF
10K
402
2
1
R5612
402
1/16W
MF-LF
10K
5%
2
1
R5615
10K
5%
MF-LF
402
1/16W
2
1
R5613
HYNIX128&HYNIX64
402
10K
5%
1/16W
MF-LF
2
1
R5618
HYNIX128
MF-LF
1/16W
5%
10K
402
2
1
R5616
SAMSUNG64
402
10K
5%
1/16W
MF-LF
2
1
R5619
SAMSUNG64&HYNIX64
MF-LF
1/16W
5%
10K
402
2
1
R5617
NOSTUFF
402
1%
1/16W
MF-LF
10K
2
1
R5624
NOSTUFF
MF-LF
1/16W
1%
10K
402
2
1
R5623
NOSTUFF
MF-LF
1/16W
5%
0
402
2
1
R5625
NOSTUFF
MF-LF
5%
0
402
1/16W
2
1
R5626
NOSTUFF
402
10K
5%
1/16W
MF-LF
2
1
R5627
402
10K
5%
1/16W
MF-LF
NOSTUFF
2
1
R5628
402
47
5%
1/16W
MF-LF
21
R5622
402
0
5%
MF-LF
1/16W
NOSTUFF
21
R5629
11
051-6772
56 102
SYNC_MASTER=N/A
SYNC_DATE=N/A
GPU STRAPS
=PP3V3_AGP
PCI_RESET_L
GPU_GPIO<7>
TMDS_EN
GPU_GPIO<16>
=PP3V3_AGP
GPU_LCDDATA<16>
GPU_LCDDATA<17>
=PP3V3_AGP
GPU_GPIO<15>
=PP3V3_AGP
GPU_GPIO<14>
GPU_GPIO<10>
=PP3V3_AGP
PCI_SLOTF_GNT_L
FPD_PWR_ON
GPU_GPIO<0>
=PP3V3_AGP
GPU_GPIO<11>
GPU_GPIO<12>
GPU_GPIO<9>
GPU_GPIO<8>
GPU_GPIO<1>
=PP3V3_AGP
PCI_RESET_L
INV_CUR_HI
FPD_PWR_ON
GPU_GPIO<13>
ATI_PWM
LCD_PWM
LCD_PWM_U5600
59
59
59 59
59
59
59 58
58
58 58
58
58
58 56
56
56 56
56
56
56 50
74
50
50 50
50
50
50
74
49
56
49
49 49
49
49
49
56
48
8
48
48 48
48
59
48
48
8
59
7
6
58
59
58
7
58
58
7
58
7
58
58
7
25
56
58
7
58
58
58
58
58
7
6
59
56
58
58
59
Preliminary
Page 49
DPLUS
DMINUS
HPD1
DVOMODE
LCDCNTL
A2VSSQ
A2VSSN
A2VDDQ
AVSSN
A2VDD
AVSSQ
AVDD
VSS2DI
VSS1DI
VDD1DI
VDD2DI
TPVSS
TPVDD
TXVSSR
TXVDDR
DDC3CLK
DDC3DATA
V2SYNC
COMP_B
R2SET
H2SYNC
C_R
Y_G
AUXWIN
STEREOSYNC
RSET
DDC1CLK
DDC1DATA
VSYNC
B
HSYNC
R
G
DDC2CLK
DDC2DATA
TX2P
TX2M*
TX0M*
TX1M*
TX1P
TXCM*
TX0P
TXCP
NC
NC
VREFG
GPIO
RSTB_MSK
TESTEN
PLLTEST
TEST_YCLK
TEST_MCLK
XTALOUT
XTALIN
LCDDATA
VDDR4VDDR3
3
2
1
0
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
4
16
15
14
13
12
11
10
9
8
7
6
5
3
2
1
0
(5 OF 5)
EXTERNAL TMDS
CLK
TEST
NO CONNECTS
DAC2
DAC1
TMDS
GND
VDD
D-
D+
ALERT*/
PWM
SMBCLK
SMBDA
TACH
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
GPU THERMAL SENSOR
ROUTE SIGNALS AT 37.5 OHMS
PLACE R5821-3 & FL5900-2 NEAR MINI-VGA CONNECTOR
NC
NC
NC
ROUTE GND IN BETWEEN RGB SIGNALS WITH A VIA EVERY INCH
DIFFERENTIAL_PAIR
NET_SPACING_TYPE
NET_PHYSICAL_TYPE
ELECTRICAL_CONSTRAINT_SET
DIFFERENTIAL IMPEDANCE SHOULD BE 100 OHM
NC
NC
NC
NC
75MA MAX
NC
THE FREQUENCY OF THE 20" PIXEL CLOCK IS 119 MHZ
OMIT
BGA
RV351
AJ22
AJ29
AH28
AH25
AE21
AE23
AG4
AG7
AD9
AD10
AC9
AC10
AD7
AD22
AD21
AD19
AC8
AC22
AC21
AC19
AE22
AE24
AK24
AH12
AG14
AG13
AF14
AF13 AK13
AH13
AK15
AJ15
AH15
AJ14
AH14
AJ13
AJ12
AK12
AH27
E8
B6
AG26
AG29
AH26
AK21
AK27
AE25
AK19
AK16
AJ25
AJ18
AJ17
AJ16
AH30
AH29
AH20
AH19
AH18
AH17
AH16
AG20
AG19
AG17
AG16
AG12
AF18
AF17
AF16
AE18
AE12
AJ9
AH9
AJ8
AH8
AJ7
AK7
AH7
AF10
AG10
AF9
AE9
AK6
AF8
AG8
AE8
AF7
AE7
AF6
AG6
AE6
AH10
AK9
AJ6
AH6
AH11
AJ11
AK10
AJ10
AG25
AF12
AJ24
AJ2
AH3
AK3
AJ3
AF4
AH4
AK4
AJ4
AF2
AF3
AG2
AG1
AG3
AH1
AH2
AH5
AJ5
AJ27
AE10
AF11
AE11
AG24
AG23
AE14
AE13
AF25
AF24
AK22
AJ23
AJ26
AD24
AH23
AH24
AF26
AF23
AJ21
AH22
AF22
AH21
AG21
U4900
402
715
1%
1/16W
MF-LF
2
1
R5824
402
CERM
6.3V
10%
1UF
2
1
C5803
402
1UF
10%
6.3V
CERM
2
1
C5802
NOSTUFF
CERM
6.3V
20%
10UF
805
2
1
C5800
CERM
6.3V
10%
1UF
402
2
1
C5801
5%
MF-LF
1M
1/16W
402
2
1
R5814
1/16W
MF-LF
249
1%
402
21
R5815
SM-3
27.000M
31
Y5800
50V
5%
603
CERM
22PF
2
1
C5815
50V
5%
603
CERM
22PF
2
1
C5814
402
1/16W
1%
1K
MF-LF
2
1
R5816
402
MF-LF
1%
1K
1/16W
2
1
R5817
CERM
10V
20%
0.1UF
402
2
1
C5817
402
75
1%
1/16W
MF-LF
2
1
R5821
1%
499
402
1/16W
MF-LF
2
1
R5820
75
402
MF-LF
1/16W
1%
2
1
R5822
75
1%
1/16W
MF-LF
402
2
1
R5823
402
10K
MF-LF
1/16W
5%
2
1
R5818
1/16W
5%
MF-LF
0
402
21
R5819
1UF
10%
CERM
6.3V
402
2
1
C5831
NOSTUFF
805
20%
CERM
10UF
6.3V
2
1
C5830
1.8UH
0805
NOSTUFF
21
L5830
SM
21
XW5830
1UF
402
6.3V
CERM
10%
2
1
C5832
10V
CERM
20%
0.1UF
402
2
1
C5833
CERM
10V
20%
0.1UF
402
2
1
C5837
402
6.3V
CERM
10%
1UF
2
1
C5836
CERM
6.3V
20%
10UF
805
NOSTUFF
2
1
C5835
FERR-220-OHM
0805
21
L5835
SM
21
XW5835
402
6.3V
CERM
10%
1UF
2
1
C5841
CERM
6.3V
20%
10UF
805
NOSTUFF
2
1
C5840
0805
FERR-220-OHM
21
L5840
SM
21
XW5840
402
6.3V
CERM
10%
1UF
2
1
C5846
CERM
20%
10UF
805
NOSTUFF
6.3V
2
1
C5845
0805
FERR-220-OHM
21
L5845
SM
21
XW5845
402
6.3V
CERM
10%
1UF
2
1
C5856
CERM
6.3V
20%
10UF
805
NOSTUFF
2
1
C5855
SM
21
XW5855
0805
FERR-220-OHM
21
L5865
402
6.3V
CERM
10%
1UF
2
1
C5866
CERM
6.3V
20%
10UF
805
NOSTUFF
2
1
C5865
SM
21
XW5865
402
10K
5%
1/16W
MF-LF
2
1
R5825
SM
21
XW5847
I572
I573
I574
I575
I576
I577
I578
I579
1/16W
5%
4.7K
SM-LF
8
1
RP5810
4.7K
5%
1/16W
SM-LF
7
2
RP5810
1/16W
5%
4.7K
SM-LF
6
3
RP5810
4.7K
5%
1/16W
SM-LF
5
4
RP5810
I589
I590
I591
DEVELOPMENT
402
MF-LF
1/16W
1%
75
2
1
R5826
SOI
LM63CIMA
DEVELOPMENT
1
7
8
4
5
3
2
6
U5890
CERM
50V
5%
2200PF
603
DEVELOPMENT
2
1
C5892
DEVELOPMENT
0.1UF
CERM
10V
20%
402
2
1
C5890
CERM
DEVELOPMENT
50V
5%
100PF
402
2
1
C5891
DEVELOPMENT
402
MF-LF
1/16W
5%
10K
2
1
R5892
DEVELOPMENT
MF-LF
1/16W
5%
10K
402
2
1
R5891
58
11
051-6772
102
SYNC_MASTER=N/A
SYNC_DATE=N/A
GPU DVI & DACS
GPU_STEREOSYNC
ATI_PWM
TMDS
TMDS_D0
GPU_TMDSGPU_TMDS
TMDS_D0P
TMDS_CK
GPU_TMDSGPU_TMDS
TMDS_CKM
PP1V8_GPU_TXVDDR
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
VOLTAGE=1.8V
PP1V8_GPU_TPVDD
MIN_NECK_WIDTH=0.25MM
GPU_VGA_37P5GPU_VGA_37P5
ANALOG_BLU
TMDS_D0
GPU_TMDSGPU_TMDS
TMDS_D0M
GPU_VGA_37P5GPU_VGA_37P5
ANALOG_GRN
MON_DETECT
GPU_GPIO<8>
GPU_GPIO<10>
GPU_GPIO<12>
GPU_GPIO<7>
TP_GPU_GPIO<6>
TP_GPU_GPIO<5>
TP_GPU_GPIO<3>
GPU_GPIO<0>
GPU_GPIO<9>
GPU_GPIO<13>
TP_GPU_GPIO<2>
GPU_GPIO<1>
GPU_GPIO<11>
GPU_GPIO<14>
GPU_GPIO<15>
GPU_GPIO<16>
TP_GPU_GPIO<4>
TMDS_CKP
TMDS_D0P
TMDS_CKM
TMDS_D0M
ANALOG_HSYNC
I2C_GPU_MON_SDA
I2C_GPU_MON_SCL
GND_GPU_AVSSQ
MON_DETECT_R
GPU_LCDCNTL<0>
GPU_LCDCNTL<1>
GPU_LCDCNTL<2>
GPU_LCDCNTL<3>
VOLTAGE=0V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
GND_GPU_A2VSSN
GND_GPU_A2VSSQ
VOLTAGE=0V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
PP1V8_GPU_A2VDDQ
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
PP2V5_GPU_A2VDD
PP1V8_GPU_AVDD
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
GND_GPU_VSSDI
VOLTAGE=0V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
PP1V8_GPU_VDDDI
MIN_NECK_WIDTH=0.25MM
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.5MM
=PP3V3_AGP
=PP3V3_AGP
MIN_NECK_WIDTH=0.25MM
GPU_R2SET
MIN_LINE_WIDTH=0.5MM
=PP3V3_AGP
TMDS
TMDS_D2
GPU_TMDSGPU_TMDS
TMDS_D2P
ANALOG_BLU
ANALOG_GRN
ANALOG_VSYNC
TMDS_D2
GPU_TMDSGPU_TMDS
TMDS_D2M
GND_GPU_AVSSQ
GPU_RSET
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
ANALOG_RED
I2C_GPU_TMDS_SDA
I2C_GPU_TMDS_SCL
TMDS_D2M
TMDS_D2P
TMDS_D1M
TMDS_D1P
NO_TEST=TRUE
GPU_DAC1_VSYNC
GND_GPU_TXVSSR
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=0V
PP3V3_PWRON
GPU_DIODE_PLUS
GPU_DIODE_MINUS
U5890_PWM
U5890_ALERT_L
I2C_GPU_DIODE_SCL
I2C_GPU_DIODE_SDA
MIN_LINE_WIDTH=0.5MM
GPU_VREFG
MIN_NECK_WIDTH=0.25MM
GPU_CLK27M_XOUT
GPU_DIODE_MINUS
GPU_DIODE_PLUS
TP_GPU_LCDDATA<3>
TP_GPU_LCDDATA<2>
TP_GPU_LCDDATA<1>
TP_GPU_LCDDATA<0>
TP_GPU_LCDDATA<8>
TP_GPU_LCDDATA<9>
TP_GPU_LCDDATA<5>
TP_GPU_LCDDATA<4>
TP_GPU_LCDDATA<7>
TP_GPU_LCDDATA<6>
TP_GPU_LCDDATA<22>
TP_GPU_LCDDATA<20>
TP_GPU_LCDDATA<21>
TP_GPU_LCDDATA<23>
TP_GPU_LCDDATA<18>
TP_GPU_LCDDATA<19>
TP_GPU_LCDDATA<13>
TP_GPU_LCDDATA<10>
TP_GPU_LCDDATA<11>
TP_GPU_LCDDATA<12>
TP_GPU_LCDDATA<14>
TP_GPU_LCDDATA<15>
GPU_LCDDATA<16>
GPU_LCDDATA<17>
TMDS_D1
GPU_TMDSGPU_TMDS
TMDS_D1M
TMDS
TMDS_D1
GPU_TMDSGPU_TMDS
TMDS_D1P
TMDS
TMDS_CK
GPU_TMDSGPU_TMDS
TMDS_CKP
GPU_VGA_37P5GPU_VGA_37P5
ANALOG_RED
GND_GPU_TPVSS
MIN_LINE_WIDTH=0.5MM
VOLTAGE=0V
MIN_NECK_WIDTH=0.25MM
GPU_CLK27M_XOUT_R
=PP1V8_GPU
GPU_CLK27M_XIN
GND_GPU_AVSSN
VOLTAGE=0V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
59
59
59
58
58
58
56
56
56
50
50
50
27
59
59
59
59
49
49
49
59
59
59
59
18
59
59
52
59
58
58
59
58
59
59
59
58
59
51
48
48
48
59
58
58
59
58
59
59
58
59
11
58
59
59
58
51
56
58
6
51
50
6
58
6
6
56
56
56
56
56
56
56
56
56
56
56
56
58
58
6
58
59
59
59
58
50
7
7
7
58
6
6
59
58
58
6
59
59
58
58
6
58
6
58
58
18
18
58
58
56
56
6
58
58
6
50
Preliminary
Page 50
SYM_VER-1
LCFILTER
LCFILTER
LCFILTER
SYM_VER-1
SYM_VER-1
G
D
S
G
D
S
SYM_VER-1
G
D
S
125
G
S D
G
S D
125
125
125
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
376S0082
TABLE FOR PANEL POWER SEQUENCING (LOWER LEFT)
NET_PHYSICAL_TYPE
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
PLACE R5821-3 & FL5900-2 CLOSE TO J5903 ON BOTTOM SIDE OF BOARD
SILKSCREEN: 3
(516S0241)
518-0141
ON/OFF FOR 20" LCD INVETER.
NOTE:REMOVED 2 PINS:LAMP_STATUS &
INTERNAL TMDS CONNECTOR
(514-0201)
(GRN_RTN)
(BLU_RTN)
(RED_RTN)
NC
LEAVING CONNECTED
DURING DEVELOPMENT
SO WE CAN USE
Q45A INVERTERS
ON Q45C
INVERTER
PIN 3 IS NC
17" LCD INVERTER NEED +12V.
INVERTER INTERFACE
516-0114
LAMP_STS NOT USED ON Q45C
20" LCD INVERTER NEED +24V.
PLACE R5901-R5904 AS CLOSE TO GPU AS POSSIBLE
EXTERNAL VGA CONNECTOR
1/16W
33
5%
MF-LF
402
21
R5900
2.0K
5%
1/16W
MF-LF
402
2
1
R5905
0.01UF
CERM
10%
16V
402
2
1
C5900
402
16V
0.01UF
10%
CERM
2
1
C5901
SM
90-OHM
4
32
1
L5902
16V
402
10%
CERM
0.01UF
2
1
C5903
CERM
10%
16V
402
0.01UF
2
1
C5904
16V
0.01UF
CERM
402
10%
2
1
C5905
47PF
402
CERM
50V
5%
2
1
C5978
CRITICAL
DV01793
F-ST-TH
9
8
7
6
5
4
3
2
18
17
16
15
14
13
12
11
10
1
J5903
4.7K
1/16W
402
MF-LF
5%
2
1
R5978
5%
1/16W
MF-LF
4.7K
402
2
1
R5977
402
CERM
50V
5%
47PF
2
1
C5977
SM-220MHZ
NOSTUFF
43
21
FL5902
SM-220MHZ
NOSTUFF
43
21
FL5901
SM-220MHZ
NOSTUFF
43
21
FL5900
0.01UF
20%
CERM
50V
603
17_INCH_LCD
2
1
C5910
DEVELOPMENT
CERM
20%
50V
603
0.01UF
2
1
C5911
603
220PF
5%
25V
CERM
17_INCH_LCD
2
1
C5912
603
50V
20%
0.01UF
CERM
17_INCH_LCD
2
1
C5913
SM
90-OHM
4
32
1
L5909
SM
90-OHM
4
32
1
L5910
50V
20%
0.01UF
CERM
603
17_INCH_LCD
2
1
C5915
10K
402
MF-LF
1/16W
5%
2
1
R5914
0.022UF
16V
402
20%
CERM
2 1
C5918
16V
20%
0.01UF
CERM
402
2 1
C5919
2N7002
SOT23-LF
2
1
3
Q5901
CRITICAL
53307-3072
F-ST-SM
9
8
7
6
5
4
30
3
29
28
27
26
25
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
J5902
STDOFF-118OD-181H-TH
1
SDF5900
STDOFF-118OD-181H-TH
1
SDF5901
20%
10UF
16V
ELEC
SM
17_INCH_LCD
2
1
C5921
10UF
20%
16V
SM
ELEC
DEVELOPMENT
2
1
C5922
PP3V3_RUN PP12V_RUN
20_INCH_LCD
0
1206
MF-LF
1/4W
5%
2
1
R5922
100K
5%
MF-LF
1/16W
402
21
R5925
OMIT
10K
1/16W
402
5%
MF-LF
2
1
R5913
0
NOSTUFF
21
R5932
0
NOSTUFF
21
R5933
0
NOSTUFF
21
R5931
0
NOSTUFF
21
R5930
0
NOSTUFF
21
R5928
0
NOSTUFF
21
R5926
0
NOSTUFF
21
R5929
0
NOSTUFF
21
R5927
20_INCH_LCD
MMBZ5227B
SOT23
3
1
DZ5900
1/4W
NOSTUFF
0
MF-LF
1206
5%
2
1
R5935
PP12V_RUNPP3V3_RUN
5%
1206
MF-LF
NOSTUFF
0
1/4W
2
1
R5934
10UF
10%
16V
1210
CERM
2
1
C5917
100K
5%
1/16W
402
MF-LF
2
1
R5915
603
50V
20%
0.01UF
CERM
20_INCH_LCD
2
1
C5943
20_INCH_LCD
603
50V
20%
0.01UF
CERM
2
1
C5944
603
220PF
5%
25V
20_INCH_LCD
CERM
2
1
C5945
20_INCH_LCD
603
50V
20%
0.01UF
CERM
2
1
C5946
402
1/16W
1%
MF-LF
332
2
1
R5903
1/16W
332
402
1%
MF-LF
2
1
R5902
402
1/16W
1%
MF-LF
332
2
1
R5901
402
1/16W
MF-LF
332
1%
2
1
R5904
CERM
10%
10UF
1210
16V
2
1
C5916
1/10W
MF-LF
5%
330
603
2
1
R5912
RT-S-TH
53048
CRITICAL
20_INCH_LCD
6
5
4
3
2
1
J5901
20_INCH_LCD
1210
1UF
20%
50V
CERM
2
1
C5942
CERM
50V
20%
1UF
1210
NOSTUFF
2
1
C5947
SOT23-LF
2N7002
DEVELOPMENT
Q5902_DRAIN
2
1
3
Q5902
DEVELOPMENT
SI3433DV
TSOP
4
3 6
5
2
1
Q5903
100K
MF-LF
1/16W
5%
402
DEVELOPMENT
2
1
R5916
200K
402
5%
1/16W
MF-LF
DEVELOPMENT
2
1
R5919
MF-LF
402
5%
DEVELOPMENT
100K
1/16W
21
R5920
DEVELOPMENT
10V
402
20%
CERM
0.1UF
2
1
C5920
NOSTUFF
MMBD914XXG
SOT23
3
1
D5901
10K
5%
1/16W
MF-LF
DEVELOPMENT
402
2
1
R5921
SM
90-OHM
4
3 2
1
L5908
GREEN
2.0X1.25A
2
1
LED5900
IRF7410
SO-8
OMIT
321
4
8765
Q5900
0
NOSTUFF
5%
MF-LF
1206
1/4W
2
1
R5950
17_INCH_LCD
5%
1/4W
MF-LF
1206
0
2
1
R5923
1/16W
MF-LF
5%
10K
402
2
1
R5960
MMBD914XXG
SOT23
3
1
D5914
MF-LF
402
5%
1/16W
33
21
R5906
MF-LF
1/16W
5%
2.0K
402
2
1
R5907
10V
CERM
402
0.1UF
20%
2
1
C5970
50V
CERM
5%
22PF
402
NOSTUFF
2
1
C5908
402
33
MF-LF
1/16W
5%
21
R5971
50V
5%
22PF
402
CERM
NOSTUFF
2
1
C5907
402
33
1/16W
5%
MF-LF
21
R5972
TSSOP
74LCX125
6
14
47
5
U5970
SOT-363
2N7002DW
1
2
6
Q5975
SOT-363
2N7002DW
4
5
3
Q5975
402
10K
5%
1/16W
MF-LF
2
1
R5973
402
10K
5%
1/16W
MF-LF
2
1
R5974
402
MF-LF
1/16W
5%
100
21
R5975
402
100
5%
1/16W
MF-LF
21
R5976
74LCX125
TSSOP
CRITICAL
3
14
17
2
U5970
CERM
16V
10%
0.01UF
402
2
1
C5902
74LCX125
TSSOP
8
14
10
7
9
U5970
TSSOP
74LCX125
11
14
13
7
12
U5970
805
0
5%
1/8W
MF-LF
21
R5980
MF-LF
1/8W
5%
0
805
21
R5981
805
0
5%
1/8W
MF-LF
21
R5982
17_INCH_LCD
0
805
21
R5984
805
0
17_INCH_LCD
21
R5985
0
805
DEVELOPMENT
21
R5986
805
0
17_INCH_LCD
21
R5987
805
0
17_INCH_LCD
21
R5988
0
20_INCH_LCD
805
21
R5989
20_INCH_LCD
805
0
21
R5990
20_INCH_LCD
0
805
21
R5991
20_INCH_LCD
0
805
21
R5992
I885
I886
I887
I888
I889
I890
I891
I892
I893
I894
I895
402
0
21
R5940
0
402
21
R5941
402
0
21
R5942
17_INCH_LCD
CRITICAL
F-ST-TH
90147-1106
6
5
4
3
2
1
J5900
20_INCH_LCD
RES,100K OHM,1/16W,5%,0402
116S0114
1
R5913
17_INCH_LCD
R5913
RES,10K OHM,1/16W,5%,0402
1
116S0090
XSTR,MOSFET,P-CH,0.007OHM
17_INCH_LCD
Q5900
376S0082
1
20_INCH_LCD
376S0225
1
XSTR,MOSFET,P-CH,0.02OHM
Q5900
EXT VGA / TMDS AND INVERTER
SYNC_DATE=N/A
SYNC_MASTER=N/A
051-6772
11
59
102
PP24V_INV
VOLTAGE=24V
MIN_LINE_WIDTH=2MM
MIN_NECK_WIDTH=0.25MM
=PP3V3_AGP
TMDS_D2P
TD2P
TMDS_D1M
TD2M
TD1M
TD1P
TCKM
TMDS_CKP
TMDS_CKM
TMDS_D0P
TCKP
TD0M
TMDS_D0M
TMDS_D2M
INV_17_LCD_PWM_F
GND_17_INV
VOLTAGE=0V
MIN_LINE_WIDTH=2MM
MIN_NECK_WIDTH=0.25MM
PP12V_INV
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=2MM
VOLTAGE=12V
PP5V_AGP_RL
VOLTAGE=5V
MIN_LINE_WIDTH=2MM
MIN_NECK_WIDTH=0.25MM
INV_17_CUR_HI_F
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
PP5V_VGA
VOLTAGE=5V
PP5V_USB2
GND_CHASSIS_VGA
PP5V_AGP_P_SEQ
MIN_LINE_WIDTH=2MM
MIN_NECK_WIDTH=0.25MM
GND_CHASSIS_17_INCH_INVERTER
INV_CUR_HI
LCD_PWM
Q5902_GATE
=PP12V_AGP
Q5903_GATE
I2C_TMDS_SDA
I2C_TMDS_SCL
I2C_GPU_TMDS_SCL
I2C_GPU_TMDS_SDA
TMDS_D1P
MON_DETECT
I2C_MON_SCL_R
TD0P
TD0M
TD1P
I2C_TMDS_SCL
TCKM
TCKP
TD1M
TD2P
GND_CHASSIS_TMDS
VOLTAGE=3.3V
PP3V3_DDC
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
GND_CHASSIS_20_INCH_INVERTER
TD0P
ANALOG_HSYNC
ANALOG_VSYNC
VGA_VSYNC_R
VGA_HSYNC_R
VGA_VSYNC_R
=PP3V3_AGP
PP3V3_DDC
=PP24V_GRAPHICS
LCD_PWM
INV_CUR_HI
INV_20_CUR_HI_F
TD2M
I2C_TMDS_SDA
VOLTAGE=3.3V
PPVCC_TMDS
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
GND_CHASSIS_VGA
VGA_HSYNC
FILT_ANALOG_BLU
ANALOG_BLU
FILT_ANALOG_GRN
ANALOG_GRN
FILT_ANALOG_RED
GND_20_INV
VOLTAGE=0V
MIN_LINE_WIDTH=2MM
MIN_NECK_WIDTH=0.25MM
INV_20_LCD_PWM_
I2C_MON_SDA_R
PP5V_VGA
=PP3V3_AGP
PP5V_VGA
I2C_MON_SDA_R
I2C_GPU_MON_SCL
TMDS_EN
PPVCC_TMDS
I2C_MON_SCL
I2C_MON_SDA
FPD_PWR_ON
LED5900_P1
=PP5V_AGP
=PP12V_AGP
FPD_PWR_ON
FPD_PWR_ON_D
TMDS_EN_R
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=3.3V
PPVCC_FPD
GND_CHASSIS_VGA
I2C_MON_SCL_R
GND_CHASSIS_VGA
TCK
TCKP
GPU_TMDSGPU_TMDS
TCK
TCKM
GPU_TMDSGPU_TMDS
GPU_TMDS
TD0
TD0P
GPU_TMDS
TD0
TD0M
GPU_TMDS GPU_TMDS
GPU_TMDS
TD1
GPU_TMDS
TD1P
GPU_TMDS
TD1
TD1M
GPU_TMDS
GPU_TMDS
TD2
TD2P
GPU_TMDS
GPU_TMDS
TD2
TD2M
GPU_TMDS
FILT_ANALOG_GRN
GPU_VGA_75
GPU_VGA
FILT_ANALOG_RED
GPU_VGA_75
GPU_VGA
FILT_ANALOG_BLU
GPU_VGA
GPU_VGA_75
LED5900_PWR
VGA_HSYNC_R
PP3V3_ALL
ANALOG_RED
=PP3V3_AGP
I2C_GPU_MON_SDA
MIN_NECK_WIDTH=0.3MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=3.3V
FPD_PWR_SW_S
FPD_PWR_SW_G
VGA_VSYNC
59
59
59
59
58
58
58
58
56
56
56
56
50
50
50
50
49
59
49
49
59
49
48
59
58
59
59
58
59
59
59
59
59
50
59
59
58
59
59
59
59
59
59
7
59
59
59
59
59
48 59
59
59
59
59
59
59
58
58
48
59
59
50
50
59
59
59 59
59
59
59
59
59
59
59
59
59
11
58
48
6
7
58
6
6
6
59
6
59
58
6
58
6
6
58
58
6
6
6
6
59 92
7
7
56
56
7
6
6
58
58
58
6
59
6
6
6
6
59
6
59
6
6
6
7
6
58
58
6
6
6
7 6
7
56
56
6
6
6
6
7
6
6
6
6
59
59
7
59
59
58
56
6
56
7
7
56
7
59
7 6
59
6
6
6
59
6
6
6
6
6
6
7
6
7
58
Preliminary
Page 51
HT_CTL_TXN0
HT_CTL_TXP0
HT_CTL_RXN0
HT_CTL_RXP0
HT_CLK_RXN0
HT_CLK_RXP0
HT_CLK_TXN0
HT_CLK_TXP0
(SYM 5 OF 7)
INTERFACE
HT
HT_LDTREQ*
HT_LDTSTOP*
HT_RESET*
HT_PWROK
HT_CAD_RXN7
HT_CAD_RXP7
HT_CAD_RXN6
HT_CAD_RXN1
HT_CAD_RXN5
HT_CAD_RXP5
HT_CAD_RXP6
HT_CAD_RXN4
HT_CAD_RXP4
HT_CAD_RXN3
HT_CAD_RXP3
HT_CAD_RXN2
HT_CAD_RXP2
HT_CLK
HT_CAD_RXP0
HT_CAD_RXN0
HT_CAD_RXP1
HT_PVTREF1
HT_PVTREF0
HT_CAD_TXP7
HT_CAD_TXN7
HT_CAD_TXN6
HT_CAD_TXN1
HT_CAD_TXN5
HT_CAD_TXN4
HT_CAD_TXP2
HT_CAD_TXP3
HT_CAD_TXP4
HT_CAD_TXN2
HT_CAD_TXN3
HT_CAD_TXP5
HT_CAD_TXP6
HT_CAD_TXN0
HT_CAD_TXP1
HT_CAD_TXP0
HT_CLK_AVSS
AVDD
HT_CLK VDD_HT VDD_HT
2_5 1_2
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
ELECTRICAL_CONSTRAINT_SET
NET_PHYSICAL_TYPE
NET_SPACING_TYPE
HT_SB_TO_NB
10 MIL SPACING TO ANYTHING ELSE
5 MIL SPACING FOR DIFF PAIR
HT_NB_TO_SB
LENGTH TOLERENCE CAN BE LOOSE
8 MIL SPACING TO ANYTHING ELSE
MATCHED GROUP CONSTRAINT IS TIGHT ENOUGH
HT_2V5
4 MIL SPACING IN GROUP
DIFFERENTIAL_PAIR
402
0.1UF
20%
10V
CERM
2
1
C6006
CERM
10V
20%
0.1UF
402
2
1
C6005
402
0.1UF
20%
10V
CERM
2
1
C6004
402
0.1UF
20%
10V
CERM
2
1
C6002
CERM
10V
20%
0.1UF
402
2
1
C6001
0.1UF
CERM
402
20%
10V
2
1
C6000
CERM
10V
20%
0.1UF
402
2
1
C6007
CERM
10V
20%
0.1UF
402
2
1
C6008
0.1UF
20%
10V
CERM
402
2
1
C6012
2.2
603
MF-LF
1/10W
5%
21
R6000
402
CERM
10%
6.3V
1UF
2
1
C6013
402
0.1UF
20%
10V
CERM
2
1
C6011
10V
20%
402
CERM
0.1UF
2
1
C6010
402
MF-LF
1/16W
1%
200
2
1
R6001
402
MF-LF
1/16W
5%
1K
2
1
R6002
1K
5%
1/16W
MF-LF
402
2
1
R6003
402
MF-LF
1/16W
5%
1K
2
1
R6004
402
MF-LF
1/16W
5%
1K
2
1
R6005
I46
I47
I48
I49
I50
I51
I52
I53
I54
I55
I56
I57
I58
I59
I60
I61
I62
I63
I64
I65
I66
I67
I68
I69
I70
I71
I72
I73
I74
I75
I76
I77
I78
I79
I80
I81
I82
I83
I84
I85
I86
I87
I88
I89
OMIT
U3LITE
V1.0-300MM
PBGA
G6
J10
L9
N10
N6N2R9T8T4
G9
F9
L8
L7H8
H7
L6
L5
V2
V1
R7
R8
N1
P1
G8
F8
H9
M7
M5
P6
P8
R5
U4
U6
U8
M8
M6
P5
P7
R6
U3
U5
U7
U1
R1
R3
P2
M2
M4
L3
L1
U2
T1
R2
P3
M1
M3
L4
L2
U3
11
60
102
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
U3LITE HT
VOLTAGE=1.5V
PP1V5_PWRON_HT_NB_AVDD
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
HT_2V5
HT_PWROK
HT_2V5
HT_PWROK
HT_2V5HT_CTL HT_2V5
HT_LDTSTOP_L
HT_2V5HT_CTL
HT_LDTREQ_L
HT_2V5
=PP1V5_PWRON_NB_AVDD
=PP2V5_HT
=PP2V5_HT
HT_NB_TO_SB_CTL_N
HT_NB_TO_SB_CTL_P
HT_SB_TO_NB_CTL_N
HT_SB_TO_NB_CTL_P
HT_SB_TO_NB_CLK_N
HT_SB_TO_NB_CLK_P
HT_NB_TO_SB_CLK_N
HT_NB_TO_SB_CLK_P
HT_NB_TO_SB_CAD_P<0>
HT_NB_TO_SB_CAD_N<0>
HT_NB_TO_SB_CAD_P<1>
HT_NB_TO_SB_CAD_P<3>
HT_NB_TO_SB_CAD_N<3>
HT_NB_TO_SB_CAD_N<2>
HT_NB_TO_SB_CAD_P<2>
HT_NB_TO_SB_CAD_N<1>
HT_NB_TO_SB_CAD_P<4>
HT_NB_TO_SB_CAD_N<4>
HT_NB_TO_SB_CAD_P<5>
HT_NB_TO_SB_CAD_N<5>
HT_NB_TO_SB_CAD_P<6>
HT_NB_TO_SB_CAD_P<7>
HT_NB_TO_SB_CAD_N<7>
HT_NB_TO_SB_CAD_N<6>
HT_NB_PVTREF0
HT_NB_PVTREF1
HT_CLK66M_NB
HT_SB_TO_NB_CAD_P<1>
HT_SB_TO_NB_CAD_N<0>
HT_SB_TO_NB_CAD_P<0>
HT_SB_TO_NB_CAD_N<3>
HT_SB_TO_NB_CAD_P<3>
HT_SB_TO_NB_CAD_N<2>
HT_SB_TO_NB_CAD_P<2>
HT_SB_TO_NB_CAD_P<6>
HT_SB_TO_NB_CAD_N<5>
HT_SB_TO_NB_CAD_P<5>
HT_SB_TO_NB_CAD_N<4>
HT_SB_TO_NB_CAD_N<6>
HT_SB_TO_NB_CAD_P<7>
HT_SB_TO_NB_CAD_N<7>
HT_PWROK
HT_LDTSTOP_L
HT_RESET_L
HT_LDTREQ_L
=PP2V5_HT
=PP1V2_HT
HT_SB_TO_NB_CAD_P<4>
HT_SB_TO_NB_CAD_N<1>
=PP1V2_HT
HT_CAD
HT_SB_TO_NB_CAD_P<2>
HT_SB_TO_NB_CAD2
HT_SB_TO_NB HT_SB_TO_NB
HT_CAD
HT_SB_TO_NB_CAD_N<6>
HT_SB_TO_NB_CAD6
HT_SB_TO_NB HT_SB_TO_NB
HT_CAD
HT_NB_TO_SB_CTL
HT_NB_TO_SB_CTL_N
HT_NB_TO_SB HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD1
HT_NB_TO_SB_CAD_P<1>
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD4
HT_NB_TO_SB_CAD_P<4>
HT_NB_TO_SB
HT_CAD
HT_SB_TO_NB
HT_SB_TO_NB_CLK
HT_SB_TO_NB_CLK_N
HT_SB_TO_NB
HT_CAD
HT_SB_TO_NB_CAD0
HT_SB_TO_NB_CAD_P<0>
HT_SB_TO_NB HT_SB_TO_NB
HT_CAD
HT_SB_TO_NB_CAD_N<3>
HT_SB_TO_NB_CAD3
HT_SB_TO_NB HT_SB_TO_NB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD0
HT_NB_TO_SB_CAD_N<0>
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CLK
HT_NB_TO_SB_CLK_N
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB_CTL
HT_NB_TO_SB_CTL_P
HT_NB_TO_SB HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD0
HT_NB_TO_SB_CAD_P<0>
HT_NB_TO_SB
HT_CAD
HT_SB_TO_NB_CAD0
HT_SB_TO_NB_CAD_N<0>
HT_SB_TO_NB HT_SB_TO_NB
HT_CAD
HT_SB_TO_NB_CTL_N
HT_SB_TO_NB_CTL
HT_SB_TO_NB HT_SB_TO_NB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD7
HT_NB_TO_SB_CAD_N<7>
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD7
HT_NB_TO_SB_CAD_P<7>
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD6
HT_NB_TO_SB_CAD_N<6>
HT_NB_TO_SB
HT_CAD
HT_SB_TO_NB_CAD_P<6>
HT_SB_TO_NB_CAD6
HT_SB_TO_NB HT_SB_TO_NB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD5
HT_NB_TO_SB_CAD_N<5>
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD3
HT_NB_TO_SB_CAD_P<3>
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD2
HT_NB_TO_SB_CAD_N<2>
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD2
HT_NB_TO_SB_CAD_P<2>
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB_CAD_N<1>
HT_NB_TO_SB
HT_NB_TO_SB_CAD1
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD5
HT_NB_TO_SB_CAD_P<5>
HT_NB_TO_SB
HT_CAD
HT_SB_TO_NB
HT_SB_TO_NB_CLK
HT_SB_TO_NB_CLK_P
HT_SB_TO_NB
HT_CAD
HT_SB_TO_NB_CAD_P<1>
HT_SB_TO_NB_CAD1
HT_SB_TO_NB HT_SB_TO_NB
HT_CAD
HT_SB_TO_NB_CAD_P<7>
HT_SB_TO_NB_CAD7
HT_SB_TO_NB HT_SB_TO_NB
HT_CAD
HT_SB_TO_NB_CTL_P
HT_SB_TO_NB_CTL
HT_SB_TO_NB HT_SB_TO_NB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD6
HT_NB_TO_SB_CAD_P<6>
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD3
HT_NB_TO_SB_CAD_N<3>
HT_NB_TO_SB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CAD4
HT_NB_TO_SB_CAD_N<4>
HT_NB_TO_SB
HT_CAD
HT_SB_TO_NB
HT_SB_TO_NB_CAD_N<1>
HT_SB_TO_NB_CAD1
HT_SB_TO_NB
HT_CAD
HT_SB_TO_NB_CAD_P<4>
HT_SB_TO_NB_CAD4
HT_SB_TO_NB HT_SB_TO_NB
HT_CAD
HT_SB_TO_NB
HT_SB_TO_NB_CAD_P<5>
HT_SB_TO_NB_CAD5
HT_SB_TO_NB
HT_CAD
HT_SB_TO_NB_CAD_N<4>
HT_SB_TO_NB_CAD4
HT_SB_TO_NB HT_SB_TO_NB
HT_CAD
HT_SB_TO_NB_CAD_N<5>
HT_SB_TO_NB_CAD5
HT_SB_TO_NB HT_SB_TO_NB
HT_CAD
HT_SB_TO_NB_CAD_P<3>
HT_SB_TO_NB_CAD3
HT_SB_TO_NB HT_SB_TO_NB
HT_CAD
HT_SB_TO_NB_CAD_N<2>
HT_SB_TO_NB_CAD2
HT_SB_TO_NB HT_SB_TO_NB
HT_CAD
HT_NB_TO_SB
HT_NB_TO_SB_CLK
HT_NB_TO_SB_CLK_P
HT_NB_TO_SB
HT_2V5HT_CTL
HT_RESET_L
HT_2V5
HT_CAD
HT_SB_TO_NB_CAD_N<7>
HT_SB_TO_NB_CAD7
HT_SB_TO_NB HT_SB_TO_NB
48
64
64
64
37
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
60
64
64
60
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
62
62
62
28
60
60
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
60
24
62
62
24
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
60
60
60
7
7
7
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
27
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
7
7
60
60
7
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
Preliminary
Page 52
SEL_HT00_H
HT_S100M66M
HT_CTLOUT_N
HT_CTLOUT_P
HT_CTLIN_N
HT_CTLIN_P
HT_LDTSTOP_L
HT_RESET_L
HT_LDTREQ_L
HT_RXVDD
HT
HT_PLL
VDDPDVDDAVDD
HT_CADIN_7_P
HT_CADIN_7_N
HT_PWROK_H
HT_CADIN_6_N
HT_CADIN_3_P
HT_CADIN_3_N
HT_CADIN_4_P
HT_CADIN_4_N
HT_CADIN_5_P
HT_CADIN_5_N
HT_CADIN_6_P
HT_CADIN_2_N
HT_CADIN_2_P
HT_CADIN_1_N
HT_CADIN_1_P
HT_CLKIN_N
HT_CLKIN_P
HT_CADIN_0_P
HT_CADIN_0_N
AGND DGND
HT_PLL
HT_RXGND
HT_CADOUT_7_P
HT_CADOUT_7_N
HT_TXGND
HT_R100N
HT_R100P
HT_CADOUT_6_N
HT_CADOUT_6_P
HT_CADOUT_5_N
HT_CADOUT_5_P
HT_CADOUT_4_N
HT_CADOUT_4_P
HT_CADOUT_3_N
HT_CADOUT_3_P
HT_CADOUT_2_N
HT_CADOUT_2_P
HT_CADOUT_1_N
HT_CADOUT_1_P
HT_CADOUT_0_N
HT_CADOUT_0_P
HT_CLKOUT_N
HT_CLKOUT_P
(3 OF 8)
HT_TXVDD
HT_REFCLK
HYPERTRANSPORT
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
Stuffs resistor to select 200MHz HT I/F.
- SB_HT_200M
Power aliases required by this page:
NET_SPACING_TYPE
AC coupled
- _PP1V2_PWRON_HT
1.0V pk-pk
0 = 200MHz
1 = 100MHz
HT I/F Speed
1 = 100MHz
HT RefClk
0 = 66MHz
(NONE)
DIFFERENTIAL_PAIR
BOM options provided by this page:
Signal aliases required by this page:
- _PP2V5_PWRON_HT
Page Notes
ELECTRICAL_CONSTRAINT_SET
0.1uF
402
CERM
10V
20%
2
1
C6231
20%
10V
CERM
402
0.1uF
2
1
C6230
20%
10V
CERM
402
0.1uF
2
1
C6220
1K
402
MF-LF
1/16W
5%
SB_HT_200M
2
1
R6251
OMIT
SHASTA
BGA
V1.0
B19
V6
G11
B9
B12
G10
A9
A12
D8
G13
B17
B15
G12
A17
A15
C18
C8
E10
F10
E16
B6A6C7C6
E17 A19
C13
D13
F13
E13
B10
A10
D15
C15
A13
B13
E12
F12
C12
D12
A11
B11
D11
C11
E11
F11
B8
A8
D10
C10
B14
A14
E14
F14
D14
C14
B16
A16
D16
C16
F15
E15
B18
A18
D17
C17
U2300
20%
10V
CERM
402
0.1uF
21
C6255
402
1/16W
MF-LF
1%
332
2
1
R6255
MF-LF
805
3.3
5%
1/8W
21
R6200
5%
1/8W
MF-LF
805
3.3
21
R6210
5%
1/16W
MF-LF
402
10K
2
1
R6254
10uF
CERM
6.3V
20%
1206
NOSTUFF
2
1
C6200
6.3V
402
CERM
10%
1uF
2
1
C6201
10%
CERM
402
1uF
6.3V
2
1
C6211
20%
6.3V
CERM
1206
10uF
NOSTUFF
2
1
C6210
5%
50V
CERM
402
47pF
2
1
C6250
5%
50V
CERM
402
47pF
2
1
C6251
1/16W
MF-LF
402
1%
82.5
21
R6250
NO STUFF
4.7K
402
MF-LF
1/16W
5%
2
1
R6252
4.7K
402
5%
1/16W
MF-LF
2
1
R6253
20%
10V
CERM
402
0.1uF
2
1
C6240
10V
402
0.1uF
20%
CERM
2
1
C6241
402
CERM
10V
20%
0.1uF
2
1
C6242
20%
10V
CERM
402
0.1uF
2
1
C6232
62
102
11
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
Shasta HyperTransport
VOLTAGE=1.2V
PP1V2_PWRON_HT_PLLAVDD
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.3MM
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=1.2V
PP1V2_PWRON_HT_PLLDVDD
=PP1V2_PWRON_HT
HT_CLK66M_SB_C
P25MM
=PP2V5_PWRON_HT
=PP1V2_PWRON_HT
SB_HT_R100_P
HT_NB_TO_SB_CAD_P<7>
SB_HT_S100M66M
=PP1V2_PWRON_HT
SB_SELHT100
HT_PWROK
HT_LDTSTOP_L
HT_SB_TO_NB_CAD_N<7>
HT_SB_TO_NB_CTL_N
HT_LDTREQ_L
=PP1V2_PWRON_HT
SB_HT_R100_N
HT_CLK66M_SB
HT_SB_TO_NB_CLK_P
HT_SB_TO_NB_CAD_P<0>
HT_SB_TO_NB_CLK_N
HT_SB_TO_NB_CAD_N<0>
HT_SB_TO_NB_CAD_P<1>
HT_SB_TO_NB_CAD_N<2>
HT_SB_TO_NB_CAD_P<2>
HT_SB_TO_NB_CAD_N<1>
HT_SB_TO_NB_CAD_N<3>
HT_SB_TO_NB_CAD_N<4>
HT_SB_TO_NB_CAD_P<4>
HT_SB_TO_NB_CAD_P<5>
HT_NB_TO_SB_CLK_P
HT_NB_TO_SB_CAD_P<1>
HT_NB_TO_SB_CLK_N
HT_NB_TO_SB_CAD_P<2>
HT_NB_TO_SB_CAD_N<2>
HT_NB_TO_SB_CAD_N<1>
HT_NB_TO_SB_CAD_N<3>
HT_NB_TO_SB_CAD_P<3>
HT_NB_TO_SB_CAD_P<4>
HT_NB_TO_SB_CAD_N<4>
HT_NB_TO_SB_CAD_P<5>
HT_NB_TO_SB_CAD_N<5>
HT_NB_TO_SB_CAD_P<6>
HT_NB_TO_SB_CAD_N<7>
HT_NB_TO_SB_CAD_N<6> HT_SB_TO_NB_CAD_N<6>
HT_SB_TO_NB_CAD_P<7>
HT_SB_TO_NB_CAD_N<5>
HT_SB_TO_NB_CAD_P<6>
HT_NB_TO_SB_CTL_P HT_SB_TO_NB_CTL_P
HT_RESET_L
HT_SB_TO_NB_CAD_P<3>
HT_NB_TO_SB_CTL_N
HT_NB_TO_SB_CAD_N<0>
HT_NB_TO_SB_CAD_P<0>
HT_CLK66M_SB_C
62
62
64
62
64
64
64
64
64
62
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64
64 64
64
64
64
64 64
64
64
64
64
64
7
62
7
7
60
7
60
60
60
60
60
7
27
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60 60
60
60
60
60 60
60
60
60
60
60
62
Preliminary
Page 53
GND
GND
GND
GND
GND
GND
CLK+
GND
CLK-
GND
GND
SYM_VER1
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
GND
GND
GND
GND
GND
GND
CLK+
GND
CLK-
GND
GND
SYM_VER1
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
GND
GND
GND
GND
GND
GND
CLK+
GND
CLK-
GND
GND
SYM_VER1
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
SAME CONNECTORS & PINOUT AS
Q37 HYPERTRANSPORT BETWEEN GOLEM AND K2
ST-SM-DF
P6860
NOSTUFF
B3
B6
B9
B12
A13
A10
A7
A4
A1
B1
B4
B7
B10
A15
A12
A9
A6
A3
B2
B5
B8
B11
A14
A11
A8
A5
A2
J6401
DEVELOPMENT
10K
5%
1/16W
MF-LF
402
2
1
R6401
DEVELOPMENT
5%
MF-LF
402
1/16W
10K
2
1
R6402
603
1/10W
5%
0
NOSTUFF
21
R6403
603
0
5%
1/10W
MF-LF
NOSTUFF
21
R6404
NOSTUFF
P6860
ST-SM-DF
B3
B6
B9
B12
A13
A10
A7
A4
A1
B1
B4
B7
B10
A15
A12
A9
A6
A3
B2
B5
B8
B11
A14
A11
A8
A5
A2
J6400
NOSTUFF
0
5%
1/10W
MF-LF
603
21
R6400
NOSTUFF
ST-SM-DF
P6860
B3
B6
B9
B12
A13
A10
A7
A4
A1
B1
B4
B7
B10
A15
A12
A9
A6
A3
B2
B5
B8
B11
A14
A11
A8
A5
A2
J6402
102
64
051-6772
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
HT DEBUG CONN
HT_VREF_DEBUG
VOLTAGE=1.25V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
TEK_HT_A9
TEK_HT_A10
TEK_HT_A7
TEK_HT_A12
HT_SB_TO_NB_CLK_P
HT_LDTSTOP_L
HT_NB_TO_SB_CTL_P
HT_SB_TO_NB_CAD_N<2>
HT_SB_TO_NB_CAD_P<4>
HT_SB_TO_NB_CAD_P<6>
HT_SB_TO_NB_CTL_P
HT_SB_TO_NB_CAD_P<2>
HT_SB_TO_NB_CAD_N<4>
HT_SB_TO_NB_CAD_N<6>
HT_SB_TO_NB_CTL_N
HT_SB_TO_NB_CAD_N<0>
HT_SB_TO_NB_CAD_P<0>
HT_SB_TO_NB_CAD_P<1>
HT_SB_TO_NB_CAD_P<3>
HT_SB_TO_NB_CAD_N<3>
HT_SB_TO_NB_CAD_N<5>
HT_SB_TO_NB_CAD_P<5>
HT_SB_TO_NB_CAD_N<7>
HT_SB_TO_NB_CAD_P<7>
HT_NB_TO_SB_CAD_P<6>
HT_NB_TO_SB_CAD_N<4>
HT_NB_TO_SB_CAD_N<2>
HT_NB_TO_SB_CAD_N<0>
HT_NB_TO_SB_CAD_N<6>
HT_NB_TO_SB_CAD_P<4>
HT_NB_TO_SB_CAD_P<2>
HT_NB_TO_SB_CAD_P<0>
HT_NB_TO_SB_CLK_P
HT_NB_TO_SB_CLK_N
HT_NB_TO_SB_CAD_N<7>
HT_NB_TO_SB_CAD_P<7>
HT_NB_TO_SB_CAD_N<5>
HT_NB_TO_SB_CAD_P<5>
HT_NB_TO_SB_CAD_P<3>
HT_NB_TO_SB_CAD_N<3>
HT_NB_TO_SB_CAD_P<1>
HT_NB_TO_SB_CAD_N<1>
TEK_HT_B10
TEK_HT_B12
HT_PWROK
HT_SB_TO_NB_CLK_N
HT_RESET_L
HT_LDTREQ_L
HT_NB_TO_SB_CTL_N
HT_SB_TO_NB_CAD_N<1>
=PP2V5_HT
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
62
60
6
6
6
6
6
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
60
6
6
60
60
60
60
60
60
7
Preliminary
Page 54
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PLACE CLOSE TO SHASTA
R PAKS ARE PIN SWAPPABLE ACROSS ALL SIGNALS (EXCEPT IDSELS)
ALL RESISTOR PACKS ARE 47 OHM 1/16W 5%
AD<17> IS IDSEL FOR AIRPORT
AD<27> IS IDSEL FOR USB
47
72
RP7303
47
54
RP7303
47
72
RP7309
47
81
RP7300
47
54
RP7309
47
63
RP7300
47
54
RP7300
47
72
RP7301
47
54
RP7301
47
81
RP7301
47
81
RP7309
47
63
RP7309
47
81
RP7307
47
63
RP7301
47
81
RP7308
47
63
RP7306
47
81
RP7305
47
72
RP7305
47
81
RP7302
47
63
RP7302
47
81
RP7304
47
54
RP7306
47
63
RP7305
47
72
RP7302
47
54
RP7304
47
54
RP7302
47
72
RP7304
47
63
RP7303
47
72
RP7306
47
54
RP7305
47
63
RP7304
47
81
RP7306
47
54
RP7307
47
63
RP7307
47
63
RP7308
47
54
RP7308
47
72
RP7308
47
72
RP7307
402
5%
1/16W
47
MF-LF
21
R7300
402
47
5%
1/16W
MF-LF
21
R7301
47
72
RP7300
47
81
RP7303
102
73
11
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
PCI SERIES TERMINATION
PCI_SB_AD<17>
PCI_SB_CBE_L<2>
PCI_SB_AD<10>
PCI_SB_AD<14>
PCI_SB_AD<18>
PCI_TRDY_L
PCI_CBE_L<2>
PCI_AD<17>
PCI_SB_AD<27>
PCI_AD<27>
PCI_PAR
PCI_SB_PAR
PCI_IRDY_L
PCI_SB_IRDY_L
PCI_DEVSEL_L
PCI_SB_DEVSEL_L
PCI_FRAME_L
PCI_SB_FRAME_L
PCI_STOP_L
PCI_SB_STOP_L
PCI_SB_TRDY_L
PCI_CBE_L<3>
PCI_SB_CBE_L<3>
PCI_CBE_L<0>
PCI_SB_CBE_L<0>
PCI_CBE_L<1>
PCI_SB_CBE_L<1>
PCI_AD<30>
PCI_SB_AD<30>
PCI_AD<31>
PCI_SB_AD<31>
PCI_AD<29>
PCI_SB_AD<29>
PCI_AD<28>
PCI_SB_AD<28>
PCI_AD<26>
PCI_SB_AD<26>
PCI_AD<22>
PCI_SB_AD<22>
PCI_AD<23>
PCI_SB_AD<23>
PCI_AD<24>
PCI_SB_AD<24>
PCI_AD<25>
PCI_SB_AD<25>
PCI_AD<21>
PCI_SB_AD<21>
PCI_AD<19>
PCI_SB_AD<19>
PCI_AD<20>
PCI_SB_AD<20>
PCI_AD<18>
PCI_SB_AD<0>
PCI_AD<0>
PCI_SB_AD<1>
PCI_AD<1>
PCI_SB_AD<3>
PCI_AD<3>
PCI_SB_AD<2>
PCI_AD<2>
PCI_SB_AD<4>
PCI_AD<4>
PCI_SB_AD<5>
PCI_AD<5>
PCI_SB_AD<6>
PCI_AD<6>
PCI_SB_AD<7>
PCI_AD<7>
PCI_SB_AD<8>
PCI_AD<8>
PCI_SB_AD<9>
PCI_AD<9>
PCI_SB_AD<11>
PCI_AD<11>
PCI_AD<10>
PCI_SB_AD<12>
PCI_AD<12>
PCI_SB_AD<13>
PCI_AD<13>
PCI_AD<14>
PCI_SB_AD<15>
PCI_AD<15>
PCI_SB_AD<16>
PCI_AD<16>
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
76
76
77
77
77
77
77
77
77
77
76
76
76
76
76
77
77
76
76
77
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
75
75
76
76
76
76
76
76
76
76
75
75
75
75
75
76
76
75
75
76
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
75
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
6
6
6
74
6
6
74
6
74
6
74
6
74
6
74
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
74
6
6
74
6
74
6
6
74
6
74
6
Preliminary
Page 55
PCI
(4 OF 8)
PCI1CLK_H
PCIBR_CLK_H
PCI1PAR_H
PCI1AD_31_H
PCI1AD_30_H
PCI1AD_29_H
PCI1AD_28_H
PCI1AD_27_H
PCI1AD_26_H
PCI1AD_19_H
PCI1AD_18_H
PCI1AD_16_H
PCI1AD_17_H
PCI1AD_24_H
PCI1AD_25_H
PCI1AD_20_H
PCI1AD_21_H
PCI1AD_22_H
PCI1AD_23_H
PCI1AD_15_H
PCI1AD_8_H
PCI1AD_9_H
PCI1AD_10_H
PCI1AD_11_H
PCI1AD_12_H
PCI1AD_13_H
PCI1AD_14_H
PCI1AD_7_H
PCI1AD_6_H
PCI1AD_5_H
PCI1AD_4_H
PCI1AD_0_H
PCI1AD_1_H
PCI1AD_2_H
PCI1AD_3_H
PCIVDDP
VDDOPC
PCI1GNT_0_L
PCI1REQ_0_L
PCI1REQ_1_L
PCI1GNT_1_L
PCI1REQ_2_L
PCI1GNT_2_L
ROMCS_L
ROMOE_L
ROMRW_L
PCI1RST_L
PCI1STOP_L
PCI1TRDY_L
PCI1IRDY_L
PCI1FRAME_L
PCI1DEVSEL_L
PCI1C_BE_3_L
PCI1C_BE_2_L
PCI1C_BE_1_L
PCI1C_BE_0_L
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
(NONE)
(NONE)
- _PP2V5_PWRON_SB
"Slot G" - AD27
"Slot A" - AD17
"Slot D" - AD20
- _PP3V3_SB_PCI (can be _PP3V3_PCI)
- _PP3V3_PCI
AD11 - PCI2 (0x106B/0x0055)
AD11 - PCI1 (0x106B/0x0054)
BOM options provided by this page:
Signal aliases required by this page:
AD23 - KeyLargo (0x106B/0x004F, PCI1)
AD31 - Ethernet (0x106B/0x0051, PCI0)
AD11 - PCI0 (0x106B/0x0053)
PCI Devices implemented on this page:
AD29 - UATA 133 (0x106B/0x0050, PCI0 or 2)
- _PP3V3_PWRON_SB
Shasta drives PCI RESET, but its output
it is ANDed with a reset from the SMU.
may not be valid during power-up, so
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
Power aliases required by this page:
Page Notes
AD28 - SATA 150 (0x1166/0x0240, PCI0 or 2)
ELECTRICAL_CONSTRAINT_SET
AD30 - FireWire (0x106B/0x0052, PCI0 or 2)
20%
10V
CERM
402
0.1uF
2
1
C7409
0.1uF
402
CERM
10V
20%
2
1
C7408
20%
10V
CERM
402
0.1uF
2
1
C7407
0.1uF
402
CERM
10V
20%
2
1
C7406
10V
402
0.1uF
20%
CERM
2
1
C7405
CERM
10V
20%
0.1uF
402
2
1
C7404
0.1uF
402
CERM
10V
20%
2
1
C7403
20%
10V
CERM
402
0.1uF
2
1
C7402
20%
10V
CERM
402
0.1uF
2
1
C7401
0.1uF
402
CERM
10V
20%
2
1
C7400
402
20%
10V
CERM
0.1uF
2
1
C7423
20%
10V
CERM
402
0.1uF
2
1
C7422
402
CERM
10V
20%
0.1uF
2
1
C7421
402
10V
CERM
0.1uF
20%
2
1
C7420
SM-LF
5%
1/16W
4.7K
63
RP7402
4.7K
1/16W
5%
SM-LF
54
RP7402
SM-LF
5%
1/16W
4.7K
72
RP7402
SM-LF
1/16W
5%
4.7K
81
RP7402
SM-LF
1/16W
5%
4.7K
72
RP7400
SM-LF
5%
1/16W
4.7K
81
RP7400
SM-LF
5%
1/16W
4.7K
54
RP7400
SM-LF
5%
1/16W
4.7K
63
RP7400
SM-LF
1/16W
5%
4.7K
54
RP7401
SM-LF
1/16W
5%
4.7K
63
RP7401
SM-LF
5%
1/16W
4.7K
27
RP7401
BGA
V1.0
SHASTA
OMIT
V19
U21
R20
N21
M16
J21
H16
E21
B22
AA22
Y10
AA9
AB8
U20
N20
J18
B20
AB9
P19
P17
U18
V17
AB20
AB18
N17
R21
V18
AB19
AA18
T21
T22
V20
V22
P16
L19
U19
P22
M20
N16
M21
L20
M18
M22
T17
AA21
L22
T16
W20
Y21
T18
T19
R18
Y22
W21
R17
R16
K19
T20
P18
V21
P20
R22
P21
N19
M19
N18
M17
L18
U2300
NO STUFF
6.3V
10uF
CERM
20%
805
2
1
C7410
NO STUFF
20%
CERM
10uF
805
6.3V
2
1
C7411
SOT23-5
MC74VHC1G08
5
4
1
2
3
U7450
0.1uF
CERM
10V
20%
402
2
1
C7450
5%
1/16W
MF-LF
402
4.7K
2
1
R7450
5%
1/16W
MF-LF
402
4.7K
2
1
R7455
051-6772
11
10274
SYNC_MASTER=N/A
SYNC_DATE=N/A
Shasta PCI Interface
PCI_AD<31..28>
PCI
PCI_AD
PCI_AD<22>
PCI_AD22
PCI
PCI_AD17
PCI_AD<17>
PCI
PCI
PCI_PAR
PCI
PCI_CTL
PCI
PCI_STOP_L
PCI_AD
PCI_AD<16..0>
PCI
PCI_CTL
PCI_DEVSEL_L
PCI
PCI_FRAME_L
PCI_CTL
PCI
PCI_IRDY_L
PCI_CTL
PCI
PCI_CTL
PCI_TRDY_L
PCI
PCI_CBE_L<3..0>
PCI PCI
PCI_AD<19..18>
PCI_AD
PCI
PCI_AD20
PCI_AD<20>
PCI
PCI_AD21
PCI_AD<21>
PCI
PCI_AD23
PCI_AD<23>
PCI
PCI_AD
PCI_AD<26..24>
PCI
PCI_AD<27>
PCI_AD27
PCI
SYS_WARM_RESET_L
=PP3V3_SB_PCI
PCI_SLOTD_REQ_L
PCI_SLOTD_GNT_L
PCI_SLOTG_REQ_L
PCI_SLOTG_GNT_L
PCI_SLOTA_GNT_L
PCI_SLOTA_REQ_L
PCI_TRDY_L
PCI_FRAME_L
PCI_STOP_L
PCI_IRDY_L
PCI_DEVSEL_L
=PP3V3_PCI
=PP3V3_PCI
PCI_CLK33M_SB_EXT
PCI_CLK66M_SB_INT
PCI_SLOTA_GNT_L
PCI_SLOTA_REQ_L
PCI_SLOTG_REQ_L
PCI_SLOTG_GNT_L
PCI_SLOTD_REQ_L
PCI_SLOTD_GNT_L
ROM_CS_L
ROM_OE_L
ROM_WE_L
=PP2V5_PWRON_SB
PCI_SB_TRDY_L
PCI_SB_STOP_L
PCI_SB_IRDY_L
PCI_SB_PAR
PCI_SB_FRAME_L
PCI_SB_CBE_L<3>
PCI_SB_AD<31>
PCI_SB_CBE_L<0>
PCI_SB_AD<28>
PCI_SB_CBE_L<2>
PCI_SB_AD<29>
PCI_SB_CBE_L<1>
PCI_SB_DEVSEL_L
PCI_SB_AD<30>
PCI_SB_AD<21>
PCI_SB_AD<19>
PCI_SB_AD<18>
PCI_SB_AD<20>
PCI_SB_AD<22>
PCI_SB_AD<23>
PCI_SB_AD<24>
PCI_SB_AD<25>
PCI_SB_AD<26>
PCI_SB_AD<27>
PCI_SB_AD<10>
PCI_SB_AD<7>
PCI_SB_AD<9>
PCI_SB_AD<8>
PCI_SB_AD<11>
PCI_SB_AD<12>
PCI_SB_AD<14>
PCI_SB_AD<17>
PCI_SB_AD<15>
PCI_SB_AD<16>
PCI_SB_AD<13>
PCI_SB_AD<0>
PCI_SB_AD<6>
PCI_SB_AD<1>
PCI_SB_AD<2>
PCI_SB_AD<4>
PCI_SB_AD<3>
PCI_SB_AD<5>
=PP3V3_PWRON_SB
PCI_RESET_L
SB_PCI_RESET_L
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
76
76
76
77
76
77
76
76
76
76
76
76
77
76
76
77
77
76
76
76
76
76
76
76
75
75
88
75
76
75
76
74
75
74
74
74
74
76
75
75
76
76
75
75
77
76
76
74
74
74
74
74
74
74
76
76
76
76
76
25
25
56
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
25
77
77
74
74
73
73
73
73
73
25
25
27
74
74
77
77
75
75
75
23
23
8
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
8
7
74
74
74
74
6
6
6
6
6
6
6
7
7
8
27
6
6
74
74
74
74
6
6
6
7
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
7
6
Preliminary
Page 56
A0
A1
A6
A2
A3
A4
A5
A9
A8
A7
A10
A11
A12
A13
A14
A15
A16
A20
A17
A18
A19
CE
OE
WE
WP
PWD
GND
DQ0
DQ1
DQ6
DQ5
DQ2
DQ3
DQ4
DQ7
VPP VCC
FEPR-1MX8
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
Allows ROM override module
BOM options provided by this page:
symbol to declare U7500 part number.
part number. Must use a TABLE_x_ITEM
(NONE)
Signal aliases required by this page:
(NONE)
Page Notes
Power aliases required by this page:
- _PP3V3_PCI
to intercept ROM chip select
NOTE: This page does not specify a BootROM
90.0ns
OMIT
TSOP
12
9
11 3130
10
24
3923
35
34
33
32
28
27
26
25
22
7
8
14
15
16
17
18
38
19
37
13
40
1
2
3
4
5
6
36
20
21
U7500
402
MF-LF
1/16W
5%
470
21
R7502
5%
1/16W
MF-LF
402
10K
2
1
R7501
402
MF-LF
1/16W
10K
5%
2
1
R7500
2.2uF
CERM
10V
20%
805
2
1
C7500
0.1uF
20%
10V
CERM
402
2
1
C7501
402
CERM
10V
20%
0.1uF
2
1
C7502
75 102
051-6772 11
SYNC_MASTER=N/A
SYNC_DATE=N/A
BootROM
ROM_ONBOARD_CS_L
ROM_CS_L
=PP3V3_PCI
PCI_AD<31>
PCI_AD<30>
PCI_AD<29>
PCI_AD<28>
PCI_AD<27>
PCI_AD<26>
PCI_AD<25>
PCI_AD<24>
PCI_AD<9>
PCI_AD<8>
PCI_AD<7>
PCI_AD<6>
PCI_AD<5>
PCI_AD<4>
PCI_AD<3>
PCI_AD<20>
PCI_AD<2>
PCI_AD<19>
PCI_AD<18>
PCI_AD<16>
PCI_AD<15>
PCI_AD<14>
PCI_AD<12>
PCI_AD<11>
PCI_AD<10>
PCI_AD<1>
PCI_AD<0>
ROM_OE_L
ROM_WE_L
=PCI_ROM_RESET_L
ROM_WP_L
=PP3V3_PCI
PCI_AD<13>
PCI_AD<17>
77
77
76
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
76
77
77
75
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
75
76
76
76
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
76
76
74
74
74
76
74
25
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
74
74
25
73
73
6
6
7
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
8
6
7
6
6
Preliminary
Page 57
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
Signal aliases required by this page:
PCI Devices implemented on this page:
NOTE: This AirPort implementation does
AD17 (Slot "A") - AirPort (0x????/0x????)
- _PCI_CLK33M_AIRPORT (33MHz PCI clock)
516S0285
Q85 WIRELESS CONNECTOR
not support PME#.
(NONE)
- _PP3V3_PCI
ELECTRICAL_CONSTRAINT_SET
BOM options provided by this page:
Power aliases required by this page:
Page Notes
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
402
1UF
10%
6.3V
CERM
2
1
C7652
5%
402
MF-LF
1/16W
10K
2
1
R7650
1UF
10%
6.3V
CERM
402
2
1
C7651
10UF
20%
6.3V
CERM
1206
NOSTUFF
2
1
C7650
15K
5%
MF-LF
1/16W
402
2
1
R7660
5%
1/16W
MF-LF
402
15K
2
1
R7661
CERM
6.3V
10%
1UF
402
2
1
C7660
MF-LF
1/16W
5%
22
402
21
R7651
STDOFF-3MMOD5MMH-TH
1
SDF7600
STDOFF-3MMOD5MMH-TH1
1
SDF7601
20-5602-080-041-829
CRITICAL
F-ST-SM
8079
7877
7675
7473
7271
7069
6867
6665
6463
6261
6059
5857
5655
5453
5251
5049
4847
4645
4443
4241
4039
3837
3635
3433
3231
3029
2827
2625
2423
2221
2019
1817
1615
1413
1211
10
9
87
65
43
21
J7650
051-6772
11
76
102
SYNC_MASTER=N/A
SYNC_DATE=N/A
AIRPORT & BLUETOOTH
USB2_N<4>
MAKE_BASE=TRUE
USB_BT_N
MAKE_BASE=TRUE
USB_BT_P
USB2_P<4>
PCI_AD<17>
PCI_AD<30>
PCI_AD<27>
PCI_AD<29>
PCI_AD<26>
PCI_AD<22>
PCI_SLOTA_IDSEL
PCI_AD<19>
PCI_AD<21>
PCI_IRDY_L
PCI_AD<18>
PCI_DEVSEL_L
_PCI_CLK33M_AIRPORT
PCI_STOP_L
PCI_AD<12>
PCI_PAR
PCI_AD<8>
PCI_CBE_L<0>
PCI_AD<7>
PCI_AD<3>
PCI_AD<6>
PCI_AD<1>
PCI_AD<5>
PCI_AD<0>
PCI_AD<10>
PCI_AD<31>
AIRPORT_CLKRUN_L_PD
TP_AP_PME_L
PCI_SLOTA_GNT_L
PCI_AD<24>
PCI_AIRPORT_RESET_L
PCI_AD<28>
PCI_AD<23>
PCI_AD<20>
PCI_FRAME_L
PCI_AD<17>
PCI_TRDY_L
PCI_CBE_L<2>
PCI_AD<16>
PCI_AD<14>
PCI_AD<13>
PCI_AD<15>
AP_ALT_ANT
PCI_CBE_L<1>
PCI_AD<4>
PCI_AD<11>
ROM_WE_L
PCI_AD<2>
PCI_SLOTA_INT_L
ROM_OE_L
ROM_ONBOARD_CS_L
ROM_CS_L
USB2_OC<4>
PCI_AD<9>
PCI_CBE_L<3>
PCI_AD<25>
PCI_SLOTA_REQ_L
=PP3V3_PCI
_PCI_CLK33M_AIRPORT
PCI_CLK_AIRPORT
CLOCKS
_PP3V3_PWRON_BT
77
77
76
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
77
76
77
77
77
77
77
77
77
77
77
77
75
75
75
75
75
77
75
77
77
75
77
77
75
77
75
77
75
75
75
75
75
75
75
75
75
75
77
75
77
75
77
77
75
75
75
75
77
75
75
75
75
77
75
75
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
75
74
75
75
74
74
74
74
73
73
73
73
73
73
73
73
73
73
73
76
73
73
73
73
73
73
73
73
73
73
73
73
73
74
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
74
73
25
74
75
74
73
73
73
74
25
76
91
6
6
91
6
6
6
6
6
6
6
6
6
6
6
6
8
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
8
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
91
6
6
6
6
7
8
7
Preliminary
Page 58
AD1
SRMOD
NANDTEST
NTEST1
SRDTA
SRCLK
TEST
TEB
AMC
SMC
LEGC
PME
PCLK
INTC
INTB
INTA
VBBRST
SMI
CRUN
SERR
REQ
STOP
TRDY
IRDY
FRAME
IDSEL
DEVSEL
GNT
PERR
PAR
CBE3
CBE2
CBE1
CBE0
AD31
AD30
AD29
AD28
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD25
AD26
AD27
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD15
AD16
AD17
AD7
AD6
AD0
AD2
AD5
AD4
VCCRST
AD3
VDD_PCI
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
facilitate NAND-tree testing
(PCI_AD<27>)
RP7702 & RP7703 required to
OD
OD
OD
OD
OD
OD
IPD
IPD
IPD
IPD
IPD
IPD
(PCI RESET)
(CHIP RESET)
DIFFERENTIAL_PAIR
NET_SPACING_TYPE
BOM options provided by this page:
Power aliases required by this page:
PCI Devices implemented on this page:
AD27 (Slot "G") - USB2 (0x1033/0x0035)
NOTE: This USB2 implementation supports
- _PCI_CLK33M_USB2 (33MHz PCI clock)
- _PPVIO_PCI (to 3.3V or 5V)
(NONE)
D3cold.
ELECTRICAL_CONSTRAINT_SET
Page Notes
Signal aliases required by this page:
20%
10V
CERM
402
0.1uF
2
1
C7703
10K
1/16W
MF-LF
402
5%
2
1
R7716
47
SM-LF
1/16W
5%
72
RP7703
5%
1/16W
SM-LF
47
63
RP7702
47
SM-LF
1/16W
5%
72
RP7702
1/16W
SM-LF
5%
47
54
RP7703
47
SM-LF
5%
1/16W
63
RP7703
5%
1/16W
SM-LF
47
54
RP7702
5%
22
MF-LF
402
1/16W
2
1
R7714
NEC_UPD720101_USB2
CRITICAL
FBGA
C8M4H3
C9
B8
G1
L8
N7
G3
P9
N9
M9
L6
M7
H1
C6
D9
H2
A8
J4
M8
M10
L7
F4
A7
B7
C7
B3
D6
F3
G2
N6
C3
F1
J3
M2
P7
L1
L2
M1
N3
M3
N4
A6
B6
P4
C5
A5
C4
B5
A4
B4
C1
C2
D2
D1
N5
D3
E1
E3
F2
J1
J2
K3
K1
L3
K2
P5
M5
U7700
10K
5%
402
MF-LF
1/16W
2
1
R7713
47
5%
SM-LF
1/16W
8
1
RP7703
5%
1/16W
MF-LF
402
4.7K
2
1
R7715
051-6772
11
102
77
SYNC_MASTER=N/A
SYNC_DATE=N/A
USB 2.0 PCI Interface
PCI_CLK_USB2
CLOCKS
=PCI_CLK33M_USB2
PCI_AD<15>
PCI_AD<22>
PCI_AD<27>
NEC_PME_L
TP_NEC_SMI_L
NEC_SERR_L_PU
TP_NEC_AMC
PCI_AD<0>
TP_NEC_SMC
TP_NEC_TEB
TP_NEC_SRDATA
PCI_AD<12>
NEC_INTC_L
NEC_INTA_L
NEC_VBBRST_L
NEC_VCCRST_L
=PP3V3_PCI
PCI_SLOTG_IDSEL
PCI_AD<4>
PCI_AD<3>
PCI_AD<10>
PCI_AD<13>
PCI_AD<14>
PCI_AD<17>
PCI_AD<16>
PCI_AD<18>
PCI_AD<19>
PCI_AD<20>
PCI_AD<21>
PCI_AD<23>
PCI_AD<24>
PCI_AD<25>
PCI_AD<26>
PCI_AD<29>
PCI_AD<28>
PCI_AD<30>
PCI_AD<31>
PCI_CBE_L<3>
PCI_CBE_L<1>
PCI_CBE_L<2>
PCI_PAR
PCI_FRAME_L
PCI_IRDY_L
PCI_TRDY_L
PCI_STOP_L
PCI_DEVSEL_L
PCI_SLOTG_REQ_L
PCI_SLOTG_GNT_L
=PCI_CLK33M_USB2
NEC_CRUN_L_PD
NEC_LEGC_PD
TP_NEC_NTEST1
TP_NEC_TEST
TP_NEC_SRCLK
TP_NEC_NANDTEST
TP_NEC_SRMOD
NEC_INTB_L
SYS_WARM_RESET_L
=PCI_USB2_RESET_L
SYS_PME_L
NEC_PERR_L_PU
PCI_AD<11>
PCI_SLOTG_INT_L
PCI_AD<1>
PCI_AD<2>
PCI_AD<9>
PCI_AD<8>
PCI_AD<6>
PCI_AD<5>
PCI_AD<7>
=PPVIO_PCI_USB2
PCI_CBE_L<0>
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
76
75
76
75
75
75
75
75
75
75
75
75
75
75
75
75
75
76
76
75
75
75
75
75
75
75
76
76
76
76
76
76
76
76
76
75
75
75
75
75
75
75
75
76
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
74
77
73
73
73
73
73
25
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
73
77
25
25
73
73
73
73
73
73
73
73
73
8
6
6
6
6
6
6
6
6
6
6
7
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
74
74
8
6
6
6
6
6
8
8
13
6
25
6
6
6
6
6
6
6
7
6
Preliminary
Page 59
UATA
UD_IDECHRDY_H
UD_IDEDMARQ_H
UD_IDEINTRQ_H
UD_IDEDA2_H
UD_IDEDA1_H
UD_IDEDA0_H
UD_IDEDD_15_H
UD_IDEDD_14_H
UD_IDEDD_0_H
UD_IDEDD_1_H
UD_IDEDD_2_H
UD_IDEDD_3_H
UD_IDEDD_4_H
UD_IDEDD_5_H
UD_IDEDD_6_H
UD_IDEDD_7_H
UD_IDEDD_8_H
UD_IDEDD_9_H
UD_IDEDD_10_H
UD_IDEDD_11_H
UD_IDEDD_12_H
UD_IDEDD_13_H
TXDN1
TXDP1
TXDN2
TXDP2
RXDN2
RXDP2
RXDN1
RXDP1
SATA_GND
SATA_VDD
SATA 0
SATA 1
(5 OF 8)
UD_IDECS1FX_L
UD_IDECS3FX_L
UD_IDEDMACK_L
UD_IDERD_L
UD_IDEWR_L
UD_IDERST_L
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
Secondary Length: 500 mils
Secondary Max Sep: 100 mils
Primary Max Sep: 10 mils outer
Primary Max Sep: 9 mils inner
SATA data pairs is 100 ohms.
Length Tolerance: 50 mils
Net Spacing Type: SATA
NOTE: Target differential impedance for
- _PP1V2_PWRON_DISK
BOM options provided by this page:
(NONE)
(Caps provided by device page)
AC coupling required for any SATA pair used.
Recommend 0.1uF cap placed close to Shasta.
SATA_VDD x 5
DIOW*
STOP aka:
DIOR*
HSTROBE aka:
DSTROBE aka:
IORDY/HDMARDY*
(NONE)
Power aliases required by this page:
Page Notes
ELECTRICAL_CONSTRAINT_SET
UATA Termination
Signal aliases required by this page:
Line To Line: 15 mils
DIFFERENTIAL_PAIR
NET_SPACING_TYPE
NET_PHYSICAL_TYPE
10V
20%
CERM
402
0.1uF
2
1
C8002
402
CERM
10V
20%
0.1uF
2
1
C8001
0.1uF
402
CERM
20%
10V
2
1
C8000
20%
10V
CERM
402
0.1uF
2
1
C8004
0.1uF
402
CERM
20%
10V
2
1
C8003
SHASTA
V1.0
BGA
OMIT
D3
E7
E4
C5
D7 E8
D4
G5
G6
E3
C2
C1
E2
H6
H7
D5
E5
F5
C3
F6
G7
J6
D6
C4
E6
B4
B3
F9
Y15
AA16
Y14
AB16
Y18
W15
T14
AB17
AB14
W16
T13
AA17
AA14
AB15
Y17
AA15
Y16
U2300
1/16W
33
5%
SM-LF
54
RP8000
5%
1/16W
33
SM-LF
63
RP8000
SM-LF
1/16W
5%
33
72
RP8000
33
5%
1/16W
SM-LF
54
RP8003
33
1/16W
5%
SM-LF
81
RP8001
5%
1/16W
33
SM-LF
72
RP8001
SM-LF
5%
33
1/16W
63
RP8003
33
1/16W
5%
SM-LF
81
RP8002
SM-LF
5%
33
1/16W
72
RP8002
SM-LF
5%
33
1/16W
81
RP8000
33
1/16W
5%
SM-LF
54
RP8002
5%
1/16W
33
SM-LF
72
RP8003
SM-LF
1/16W
33
5%
63
RP8001
33
1/16W
5%
SM-LF
81
RP8004
33
1/16W
5%
SM-LF
81
RP8003
5%
33
1/16W
SM-LF
63
RP8002
33
1/16W
5%
SM-LF
72
RP8004
33
1/16W
5%
SM-LF
54
RP8004
1/16W
33
5%
SM-LF
54
RP8001
5%
1/16W
33
SM-LF
63
RP8004
402
10K
MF-LF
1/16W
5%
2
1
R8005
402
MF-LF
1/16W
5%
33
21
R8001
5%
1/16W
MF-LF
402
22
21
R8002
22
402
MF-LF
1/16W
5%
21
R8003
22
402
MF-LF
1/16W
5%
21
R8004
33
5%
1/16W
MF-LF
402
21
R8000
051-6772
11
80 102
SYNC_MASTER=N/A
SYNC_DATE=N/A
Shasta Disk
SATA SATA
SATA_RXD1
SATA_RXD1_C
SATA_RXD_P1_C
SATA SATA
SATA_RXD2
SATA_RXD_N2_C
SATA_RXD2_C
UATA_HOST
UATA_DA<2..0>
UATA_HOST
UATA_CS0_L
UATA_DEV_R
UATA_DMARQ
UATA_HOST
UATA_CS1_L
UATA_DD
UATA_DD<15..8>
SATA SATA
SATA_TXD2
SATA_TXD_N2
SATA_TXD2
SATA SATA
SATA_TXD_P1
SATA_TXD1SATA_TXD1
UATA_DEV_R_C
UATA_DSTROBE
UATA_DEV_R
UATA_INTRQ
UATA_HOST_R
UATA_RESET_L
UATA_HOST_R
UATA_DMACK_L
UATA_HOST
UATA_STOP
UATA_DD7
UATA_DD<7>
SATA SATA
SATA_RXD_N1_C
SATA_RXD1_C
SATA_RXD1
SATA SATA
SATA_TXD1 SATA_TXD1
SATA_TXD_N1
SATA SATA
SATA_TXD_P2
SATA_TXD2 SATA_TXD2
UATA_DD<6..0>
UATA_DD
UATA_HOST
UATA_HSTROBE
SATA SATA
SATA_RXD2
SATA_RXD_P2_C
SATA_RXD2_C
=PP1V2_PWRON_DISK_SB
UATA_DA_R<1>
UATA_DA_R<1>
UATA_DA_R<2>
SATA_TXD_N1
SATA_TXD_P1
SATA_TXD_P2
SATA_TXD_N2
UATA_DSTROBE
UATA_DMARQ
UATA_INTRQ
UATA_DD_R<0>
UATA_DD_R<1>
UATA_DD_R<2>
UATA_DD_R<3>
UATA_DD_R<4>
UATA_DD_R<5>
UATA_DD_R<6>
UATA_DD_R<9>
UATA_DD_R<7>
UATA_DD_R<8>
UATA_DD_R<10>
UATA_DD_R<11>
UATA_DD_R<12>
UATA_DD_R<14>
UATA_DD_R<13>
UATA_DD_R<15>
UATA_DA_R<0>
UATA_CS0_L_R
UATA_CS1_L_R
UATA_DMACK_L_R
UATA_HSTROBE_R
UATA_STOP_R
UATA_RESET_L_R
UATA_DD_R<0>
UATA_DD<0>
UATA_DD_R<2>
UATA_DD<2>
UATA_DD_R<4>
UATA_DD<4>
UATA_DD_R<6>
UATA_DD<6>
UATA_DD_R<8>
UATA_DD<8>
UATA_DD_R<10>
UATA_DD<10>
UATA_DD_R<12>
UATA_DD<12>
UATA_DD_R<14>
UATA_DD<14>
UATA_DA_R<0>
UATA_DA<0>
UATA_DA_R<2>
UATA_DA<2>
UATA_CS0_L
UATA_CS0_L_R
UATA_HSTROBE
UATA_HSTROBE_R
UATA_DMACK_L
UATA_DMACK_L_R
UATA_DD_R<1>
UATA_DD<1>
UATA_DD_R<3>
UATA_DD<3>
UATA_DD_R<5>
UATA_DD<5>
UATA_DD_R<7>
UATA_DD<7>
UATA_DD_R<9>
UATA_DD<9>
UATA_DD_R<11>
UATA_DD<11>
UATA_DD_R<13>
UATA_DD<13>
UATA_DD_R<15>
UATA_DD<15>
UATA_DA<1>
UATA_RESET_L_R
UATA_RESET_L
UATA_CS1_L
UATA_CS1_L_R
UATA_STOP
UATA_STOP_R
SATA_RXD_P1_C
SATA_RXD_N1_C
SATA_RXD_P2_C
SATA_RXD_N2_C
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
80
80
83
80
80
83
83
83
83
80
80
80
80
83
83
83
80
80
83
83
83
83
83
83
83
83
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
83
83
83
83
80
80
6
6
80
6
6
80
80
80
80
6
6
6
6
80
80
80
6
6
80
7
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
80
6
80
6
80
6
80
6
80
6
80
6
80
6
80
6
80
6
80
6
6
80
6
80
6
80
80
6
80
6
80
6
80
6
80
6
80
6
80
6
80
6
6
80
6
6
80
6
80
80
80
80
80
Preliminary
Page 60
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PATA CONNECTOR
Per ATA Spec
518-0157
518-0144
SATA CONNECTORS
NET_PHYSICAL_TYPE
NET_SPACING_TYPE
ELECTRICAL_CONSTRAINT_SET
DIFFERENTIAL_PAIR
Obsolete
NC
NCNC
NC
NCNC
ATA-6 spec does not call out R8180 or R8182
Per ATA Spec
Per ATA Spec
Terminate near connector
HD POWER
Sourced by drive
ATA-6 spec does not call out C8177
PER ATA7 SPEC
"UATA ACTIVE"
516S0235
NO STUFF
402
5%
1/16W
MF-LF
10K
2
1
R8311
1/16W
MF-LF
402
1K
5%
2
1
R8312
NO STUFF
5%
MF-LF
402
10K
1/16W
2
1
R8313
4.7K
5%
MF-LF
402
1/16W
2
1
R8314
82
402
1/16W
5%
MF-LF
21
R8315
5%
1/16W
MF-LF
402
82
21
R8316
NO STUFF
10pF
402
CERM
50V
5%
2
1
C8301
402
6.2K
5%
1/16W
MF-LF
2
1
R8317
5%
1/16W
MF-LF
402
0
2
1
R8318
1/16W
MF-LF
5.6K
5%
402
2
1
R8319
82
5%
1/16W
MF-LF
402
21
R8320
499
402
MF-LF
1/16W
1%
DEVELOPMENT
2
1
R8321
SATA_TXD_P1
CERM
0.1UF
20%
10V
402
21
C8304
0.1UF
20%
10V
CERM
402
21
C8305
LD18077-S04
M-ST-TH
7
6
5
4
3
2
1
J8300
0.1UF
20%
402
10V
CERM
21
C8307
402
10V
20%
CERM
0.1UF
21
C8308
CRITICAL
M-RT-TH
S05B-XA
5
4
3
2
1
J8303
2.0X1.25A
DEVELOPMENT
GREEN
21
LED8301
F-ST-SM
804RVS-050505R
CRITICAL
9
87
6
50
5
49
4847
4645
4443
4241
40
4
39
3837
3635
3433
3231
30
3
29
2827
2625
2423
2221
20
2
19
1817
1615
1413
1211
10
1
52
51
J8301
83
102
051-6772
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
DISK CONNECTORS
UATA_RESET_L
UATA_DMARQ_R
UATA_DMACK_L
UATA_IOCS16_PU
UATA_CS1_L
UATA_DD<3>
=PP5V_PATA
UATA_DA<0>
UATA_DA<1>
UATA_DA<2>
UATA_DD<0>
UATA_DD7
UATA_DD<7>
UATA_DD<7> UATA_DD<9>
UATA_DD<10>
UATA_DD<12>
UATA_DD<13>
UATA_DD<14>
UATA_DD<15>
UATA_DASP_L_DS
UATA_DSTROBE_R
UATA_DEV_R
UATA_DMARQ
UATA_DEV_R
UATA_INTRQ
UATA_DMARQ
UATA_INTRQ
UATA_HOST
UATA_DA<2..0>
UATA_DD
UATA_DD<6..0>
UATA_DD
UATA_DD<15..8>
UATA_DEV_R_C
UATA_DSTROBE
UATA_DSTROBE
SATA_RXD_N1_C
SATA_TXD_N1
UATA_INTRQ_R
UATA_CSEL_PD
UATA_HOST
UATA_STOP
UATA_STOP
UATA_HOST_R
UATA_RESET_L
UATA_HOST
UATA_HSTROBE
UATA_HOST_R
UATA_DMACK_L
UATA_HOST
UATA_CS1_L
UATA_HOST
UATA_CS0_L
UATA_CS0_L
=PP5V_PATA
UATA_DASP_L
=PP5V_DISK
=PP12V_DISK
=PP3V3_DISK
SATA_RXD_P1_C
SATA_TXD_P1_C
SATA_RXD_N1
UATA_DD<8>
UATA_DD<11>
UATA_DD<2>
SATA_TXD_N1_C
UATA_HSTROBE
UATA_DD<1>
UATA_DD<4>
UATA_DD<5>
UATA_DD<6>
=PP3V3_PATA
SATA_RXD_P1
SATA_TXD_P2
SATA_TXD_N2
SATA_RXD_N2_C
SATA_RXD_P2_C
TP_SATA_RXD_N2_C
MAKE_BASE=TRUE
TP_SATA_TXD_N2
MAKE_BASE=TRUE
TP_SATA_RXD_P2_C
MAKE_BASE=TRUE
TP_SATA_TXD_P2
MAKE_BASE=TRUE
83
83
83
83
83
83
83
83
83
83 83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
83
80
80
80
80
83
80
80
80
80
80
80 80
80
80
80
80
80
83
83
83
83
80
80
80
83
83
80
80
80
80
80
80
80
80
83
7
7
80
80
80
80
80
80
80
80
80
6
6
6
6
6
6
7
6
6
6
6
6
6 6
6
6
6
6
6
6
6
80
80
80
80
6
6
6
80
80
80
80
6
6
6
6
6
6
6
6
6
6
7
6
6
6
7
80
6
6
6
6
6
6
6
6
7
80
80
80
80
Preliminary
Page 61
ETHERNET
(6 OF 8)
ETH_GTX_CLK_H
ETH_TX_ER_H
ETH_TX_EN_H
ETH_TXD_7_H
ETH_TXD_6_H
ETH_TXD_5_H
ETH_TXD_4_H
ETH_TXD_3_H
ETH_TXD_2_H
ETH_TXD_1_H
ETH_TXD_0_H
ETH_MDC_H
ETH_MDIO_H
ETH_TX_CLK_H
ETH_RX_CLK_H
ETH_RXD_0_H
ETH_RXD_1_H
ETH_RXD_2_H
ETH_REFCLK_H
ETH_RXD_3_H
ETH_RXD_4_H
ETH_RXD_5_H
ETH_RXD_6_H
ETH_RXD_7_H
ETH_RX_DV_H
ETH_RX_ER_H
ETH_CRS_H
ETH_COL_H
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
NET_PHYSICAL_TYPE DIFFERENTIAL_PAIR
NET_SPACING_TYPE
Page Notes
Signal aliases required by this page:
BOM options provided by this page:
(NONE)
(NONE)
Power aliases required by this page:
(NONE)
ELECTRICAL_CONSTRAINT_SET
SHASTA
V1.0
BGA
OMIT
F1
H3
H5
K6
J4
F2
G3
J5
H4
E1
G4
G2
K4
J3
G1
J2
K3
L4
J1
K2
L3
K1
M5
M6
M4
K5
L6
L5
U2300
SM-LF
5%
0
1/16W
72
RP8400
SM-LF
5%
1/16W
0
54
RP8400
SM-LF
1/16W
5%
0
81
RP8400
SM-LF
1/16W
5%
0
63
RP8400
SM-LF
1/16W
5%
0
72
RP8401
5%
1/16W
SM-LF
0
54
RP8401
SM-LF
1/16W
5%
0
81
RP8401
0
SM-LF
1/16W
5%
63
RP8401
5%
1/16W
MF-LF
402
0
21
R8400
402
MF-LF
0
1/16W
5%
21
R8401
402
MF-LF
1/16W
5%
0
21
R8402
051-6772
11
84 102
SYNC_MASTER=N/A
SYNC_DATE=N/A
Shasta Ethernet
ENET_TXD_R<6>
ENET_TXD_R<3>
ENET_TXD_R<7>
ENET_TXD_R<4>
ENET_TX_EN_R
ENET_CLK125M_GBE_REF
ENET_TXD_R<5>
ENET_TXD_R<1>
ENET_TXD_R<0>
ENET_TXD_R<2>
ENET_COL
ENET_CRS
ENET_RX_ER
ENET_RX_DV
ENET_RXD<7>
ENET_RXD<6>
ENET_RXD<5>
ENET_RXD<4>
ENET_RXD<3>
ENET_RXD<2>
ENET_RXD<1>
ENET_RXD<0>
ENET_MDC
ENET_MDIO
ENET_TXD<7>
ENET_TXD<0>
ENET_TXD<1>
ENET_TXD<2>
ENET_TXD<4>
ENET_TXD<3>
ENET_TXD<6>
ENET_TX_EN
ENET_TXD<5>
ENET_CLK125M_GTX
ENET_TX_ER
ENET_RX_CTL
ENET_RX_DV
ENET_RXD<7..0>
ENET_RX
ENET_RX_ER
ENET_RX_CTL
ENET_TX_CTL
ENET_TX_EN
ENET_MDC
ENET_MDC
ENET_MDIO
ENET_MDIO
ENET_TX_ER
ENET_TX_CTL
ENET_RX_CTL
ENET_CRS
ENET_CLK125M_RX
ENET_CLK25M_TX
ENET_RX_CTL
ENET_COL
ENET_TXD<7..0>
ENET_TX
ENET_CLK125M_GTX_R
P25MM
ENET_CLK125M_GTX
ENET_TX_CLK
P25MM
ENET_RX_CLK
ENET_CLK125M_RX
P25MM
ENET_CLK25M_TX
ENET_RX_CLK
P25MM
ENET_CLK125M_GBE_REF
ENET_GBE_REF
ENET_TX_ER_R
ENET_CLK125M_GTX_R
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
86
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
84
Preliminary
Page 62
INTR*/ENERGYDET
GTXCLK
XTALGND BIASGND PLLGND1
CLK125
TXD[4]
TXD[3]
TXD[2]
TXD[1]
TXD[0]
MDIO
MDC
TX_ER
TX_EN
TXD[7]
TXD[6]
TXD[5]
LOWPWR
TXC
RXC
RXD[7]
RX_DV
RX_ER
XTALO
XTALI
ER
HUB
MANMS
SPD0
F1000
FDX
RGMIIEN
EN_10B
PHYA[4]
PHYA[3]
PHYA[2]
PHYA[1]
PHYA[0]
TVCO
TEST[0]
TEST[1]
COL
CRS
RBC0
TRD+[0]
TRD-[0]
TRD+[1]
TRD-[1]
TRD+[2]
TRD-[2]
TRD-[3]
TRD+[3]
RBC1
RXD[2]
RXD[3]
RXD[4]
RXD[5]
RXD[6]
RXD[1]
RXD[0]
SLAVE*/AN_EN
ACTLED*
XMTLED*
FDXLED*
LINK2*
LINK1*
QUALITY*/TXC_RXC_DELAY
RDAC1
PLLVDD1
BIASVDD1XTALVDD1
VESTA ENET
2 OF 3
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
Page Notes
Power aliases required by this page:
CRYSTAL LOAD CAPACITANCE IS 20PF
(Internal Pull-up)
MANMS - Manual Master/Slave Configuration Select
NOTE: Target differential impedance for
AN_EN F1000 SPD0 Description
F1000 - Speed Select
Sets manual duplex mode bit
(Internal Pull-down)
0 - GMII/TBI Mode
RGMIIEN - RGMII Enable
Vesta Config Straps:
Secondary Length: 500 mils
Length Tolerance: 50 mils
ELECTRICAL_CONSTRAINT_SET
SPACING
DIFFERENTIAL_PAIR
PHYSICAL
NET_TYPE
(NONE)
(NONE)
Secondary Max Sep: 100 mils
Primary Max Sep: 5 mils
Line To Line: 0.38 mms
BOM options provided by this page:
Signal aliases required by this page:
ENET data pairs is 100 ohms.
Net Spacing Type: ENET
- _PP2V5_ENETFW
- _PP3V3_ENET
PLACE RESISTORS CLOSE TO PHY
ESR < 0.5 ohms
Sets Hub/DTE bit and master/slave configuration value bit
(Internal Pull-up)
0 - Auto-negotiation disabled
1 - Auto-negotiation enabled
AN_EN - Auto-Negotiation Select
0 - Rise time approx. 4 ns
1 - Rise time approx. 5 ns
ER - Edge Rate Select
(Internal Pull-down)
FDX - Full-Duplex Select
1 - RGMII/RTBI Mode
(Internal Pull-down)
0 - GMII/RGMII Mode
TXC_RXC_DELAY
GTXCLK are delayed by 1.9 ns
(Internal Pull-down)
0 - No clock delay
0 1 X Force 1000BASE-T (test use only)
1 1 0 Auto-negotiate advertise 10/100/1000BASE-T
1 0 1 Auto-negotiate advertise 10/100BASE-TX
1 0 0 Auto-negotiate advertise 10BASE-T
0 0 1 Force 100BASE-TX
SPD0 - Speed Select
(Internal Pull-down)
See table below
(Internal Pull-up)
0 0 0 Force 10BASE-T
See table below
- _PP1V2_ENETFW
1 1 1 Auto-negotiate advertise 1000BASE-T
(Internal Pull-down)
1 - TBI/RTBI Mode
EN_10B - TBI Interface Select
PHYA<4..0> - PHY Address Select
(Internal Pull-downs)
(Internal Pull-down)
HUB - Repeater Select
Sets manual master/slave configuration enable bit
1 - If RGMII Mode enabled, RXC clock and
Put crystal circuit close to PHY
402
MF-LF
1/16W
1%
49.9
2
1
R8616
49.9
1%
MF-LF
402
1/16W
2
1
R8617
49.9
1%
1/16W
MF-LF
402
2
1
R8614
49.9
1%
1/16W
MF-LF
402
2
1
R8615
MF-LF
1/16W
5%
402
0
21
R8602
25.0000M
CRITICAL
8X4.5MM-SM
21
Y8600
1/16W
402
MF-LF
1%
49.9
2
1
R8620
402
49.9
1%
1/16W
MF-LF
2
1
R8618
1%
49.9
1/16W
MF-LF
402
2
1
R8621
402
MF-LF
1/16W
49.9
1%
2
1
R8619
402
CERM
16V
0.01UF
20%
2
1
C8620
20%
16V
CERM
0.01UF
402
2
1
C8622
20%
16V
CERM
402
0.01UF
2
1
C8623
MF-LF
1/16W
5%
402
0
21
R8601
5%
402
1/16W
MF-LF
0
21
R8600
1.24K
1%
1/16W
MF-LF
402
2
1
R8613
332
MF-LF
1/16W
1%
402
2
1
R8609
402
CERM
16V
20%
0.01UF
2
1
C8621
1.5K
5%
MF-LF
402
1/16W
2
1
R8650
402
CERM
20%
50V
0.001uF
2
1
C8604
FERR-EMI-600-OHM
SM
21
L8602
6.3V
20%
CERM
10uF
1206-1
2
1
C8605
10V
0.1uF
20%
402
CERM
2
1
C8601
FERR-EMI-600-OHM
SM
21
L8600
FERR-EMI-600-OHM
SM
21
L8601
20%
0.001uF
CERM
50V
402
2
1
C8603
X5R
6.3V
10UF
10%
805
2
1
C8602
FBGA-200
BCM5462
OMIT
N1
P2
N2
P3
B12
C4
B4
A5
B5
C5
E6
D6
C7
C6
B6
A6
N3
R10
R11
R9
R8
R6
R7
R5
R4
M5
M4
K5
C10
C2
D2
D3
D4
D5
E3
E4
E5
F5
F4
C1
B8
R1
B3
A3
A8
M1
M2
L1
L2
L3
L4
L5
G2
G1
D9
H5
B11
A10
D10
A9
A4
B10
C8
K4
H3
K3
G3
F3
D1
P1
R2
A11
U8600
33pF
402
CERM
50V
5%
2
1
C8618
CERM
50V
5%
402
33pF
2
1
C8619
86 102
051-6772
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
Vesta Ethernet PHY
MIN_LINE_WIDTH=0.5 mm
PP2V5_VESTA_BIASVDD1
VOLTAGE=2.5V
MIN_NECK_WIDTH=0.25 mm
ENET_COL
ENET_CRS
ENET_MDI_P<0>
ENET_MDI_N<0>
ENET_MDI_P<1>
ENET_MDI_N<1>
ENET_MDI_P<2>
ENET_MDI_N<2>
ENET_MDI_P<3>
ENET_MDI_N<3>
TP_VESTA_SPD0
TP_VESTA_MANMS
TP_VESTA_HUB
TP_VESTA_TVCO
TP_VESTA_ER
=PP2V5_ENETFW
ENET_MDC
TP_VESTA_PHYA<4>
=PP1V2_ENETFW
ENET_CLK25M_TX_R
TP_VESTA_TXC_RXC_DELAY
TP_VESTA_AN_EN
ENET_ENERGYDET
ENET_CLK125M_GTX
ENET_TXD<1>
ENET_TXD<0>
ENET_TXD<4>
ENET_TXD<2>
ENET_TXD<3>
ENET_TXD<5>
ENET_TXD<6>
ENET_TXD<7>
ENET_TX_EN
ENET_TX_ER
ENET_CLK125M_RX_R
ENET_RXD<7>
ENET_RX_DV
ENET_RX_ER
VESTA_CLK25M_XTALO_R
TP_VESTA_PHYA<0>
TP_VESTA_PHYA<1>
TP_VESTA_PHYA<2>
TP_VESTA_PHYA<3>
TP_VESTA_EN_10B
TP_VESTA_FDX
TP_VESTA_RGMIIEN
TP_VESTA_F1000
TP_VESTA_TEST<1>
TP_VESTA_TEST<0>
TP_VESTA_RBC0
ENET_RXD<0>
ENET_RXD<3>
ENET_RXD<1>
ENET_RXD<4>
ENET_RXD<5>
ENET_RXD<6>
TP_VESTA_LINK1_L
TP_VESTA_FDXLED_L
TP_VESTA_XMTLED_L
TP_VESTA_ACTLED_L
VESTA_RDAC1_PD
VESTA_ENET_LOWPWR
ENET_CLK125M_RX
ENET_CLK125M_GBE_REF
ENET_CLK25M_TX
ENET_MDIO
ENET_MDI0 ENET_MDI1 ENET_MDI2 ENET_MDI3
ENET_CLK125M_GBE_REF_R
PP2V5_VESTA_XTALVDD1
MIN_LINE_WIDTH=0.5 mm
VOLTAGE=2.5V
MIN_NECK_WIDTH=0.25 mm
TP_VESTA_LINK2_L
TP_VESTA_RBC1
ENET_RXD<2>
VESTA_CLK25M_XTALI
VESTA_CLK25M_XTAL
P25MM
P25MM
ENET_CLK125M_RX_R
P25MM
ENET_CLK25M_TX_R
ENET_MDI_P<1>
ENET ENET
ENET_MDI1
ENET_MDI
ENET_MDI_N<1>
ENET ENET
ENET_MDI1
ENET_MDI
ENET_MDI_N<3>
ENET ENET
ENET_MDI3
ENET_MDI
P25MM
VESTA_CLK25M_XTALO
P25MM
VESTA_CLK25M_XTALO_R
ENET_MDI_N<2>
ENET ENET
ENET_MDI2
ENET_MDI
ENET_MDI_P<0>
ENET ENET
ENET_MDI0
ENET_MDI
P25MM
ENET_CLK125M_GBE_REF_R
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.5 mm
VOLTAGE=1.2V
PP1V2_VESTA_PLLVDD1
=PP3V3_ENET
VESTA_CLK25M_XTALO
ENET_MDI_P<2>
ENET ENET
ENET_MDI2
ENET_MDI
VESTA_CLK25M_XTALI
ENET_MDI_P<3>
ENET ENET
ENET_MDI3
ENET_MDI
ENET_MDI_N<0>
ENET ENET
ENET_MDI0
ENET_MDI
87
87
87
87
87
87
87
87
89
89
87
87
87
87
87
87
87
87
87
84
84
86
86
86
86
86
86
86
86
12
84
7
86
25
84
84
84
84
84
84
84
84
84
84
84
86
84
84
84
86
84
84
84
84
84
84
87
87
12
84
84
84
84
86
84
86
86
86
86
86
86
86
86
86
86
86
7
86
86
86
86
86
Preliminary
Page 63
G
D
S
G
D
S
G
D
S
G
D
S
1CT:1CT
1CT:1CT
MDI_3-
ENET_CTAP
MDI_0+
75 OHM
MDI_0-
MDI_1ÂMDI_2+
MDI_2-
75 OHM
75 OHM
1CT:1CT
75 OHM
RJ45
CABLE SIDE
SECONDARY
J4
J8
J7
J6
J5
J1
J2
J3
1CT:1CT
RJ45
CHIP SIDE
ENET_CTAP
MDI_1+
MDI_3+
PRIMARY
SHIELD 1000PF, 2000V
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
(514-0222)
PUT DEVELOPMENT LEDS ON TOP SIDE OF BOARD
FERR-EMI-600-OHM
SM
21
L8700
20%
10V
CERM
402
0.1UF
2
1
C8700
0.1UF
20%
10V
CERM
402
2
1
C8701
0.1UF
20%
10V
CERM
402
2
1
C8702
603
CERM
50V
20%
0.001UF
2
1
C8705
402
CERM
10V
20%
0.1UF
2
1
C8703
0.001UF
20%
50V
CERM
603
2
1
C8704
DEVELOPMENT
330
603
MF-LF
1/10W
5%
2
1
R8701
DEVELOPMENT
330
603
MF-LF
1/10W
5%
2
1
R8703
MF-LF
402
5%
1/16W
10K
DEVELOPMENT
2
1
R8700
DEVELOPMENT
SOT-363
2N7002DW
4
5
3
Q8700
DEVELOPMENT
SOT-363
2N7002DW
1
2
6
Q8700
DEVELOPMENT
SOT-363
2N7002DW
4
5
3
Q8701
402
5%
MF-LF
1/16W
10K
DEVELOPMENT
2
1
R8702
SOT-363
DEVELOPMENT
2N7002DW
1
2
6
Q8701
MJRR0156
F-ST-TH
CRITICAL
9
8
7
6
5
4
3
2
10
1
14
13
12
11
J8700
DEVELOPMENT
2.0X1.25A
GREEN
2
1
LED8700
DEVELOPMENT
2.0X1.25A
GREEN
2
1
LED8701
87
11
051-6772
102
SYNC_MASTER=N/A
SYNC_DATE=N/A
ETHERNET CONNECTOR
MAKE_BASE=TRUE
VESTA_XMTLED_L
TP_VESTA_XMTLED_L
TP_VESTA_ACTLED_L
MAKE_BASE=TRUE
VESTA_ACTLED_L
=PP3V3_ENET
=PP3V3_ENET
VESTA_ACTLED
VESTA_XMTLED
=PP2V5_ENET
ENET_MDI_P<0>
ENET_MDI_N<0>
ENET_MDI_P<1>
ENET_MDI_N<1>
ENET_MDI_N<3>
ENET_MDI_P<3>
ENET_MDI_N<2>
ENET_MDI_P<2>
GND_CHASSIS_RJ45
GBIT_2_5V
LED8700_N
LED8700_P
LED8701_N
LED8701_P
87
87
86
86
86
86
7
7
7
86
86
86
86
86
86
86
86
7
Preliminary
Page 64
PHY_LINKON_LPHY_PINT_L
FWVDDP
PHY_LREQ_H
PHY_LPS_H
PHY_CTL_1_H
PHY_CTL_0_H
PHY_DATA_7_H
PHY_DATA_6_H
PHY_DATA_0_H
PHY_DATA_1_H
PHY_DATA_2_H
PHY_DATA_3_H
PHY_DATA_4_H
PHY_DATA_5_H
(7 OF 8)
PHY_LCLK_HPHY_SCLK_H
FIREWIRE
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
Power aliases required by this page:
Signal aliases required by this page:
(NONE)
(NONE)
- _PP2V5_PWRON_SB
BOM options provided by this page:
ELECTRICAL_CONSTRAINT_SET
Page Notes
DIFFERENTIAL_PAIR
NET_SPACING_TYPE
NET_PHYSICAL_TYPE
402
MF-LF
22
1/16W
5%
21
R8800
20%
402
CERM
10V
0.1uF
2
1
C8802
0.1uF
402
CERM
10V
20%
2
1
C8801
20%
10V
CERM
402
0.1uF
2
1
C8800
SHASTA
V1.0
BGA
OMIT
P2
P3
P1
P6
N7
R1
L2
M3
L1
N6
M7
N1
P5
N4
N3
N2
A4J7N5
U2300
10288
11
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
Shasta FireWire
FW_PINT
FW_PINT
FW_LREQ
FW_LREQ
FW_LPS
FW_LPS
FW_DATA<7..0>
FW
FW_CLK98M_LCLK
FW_LCLK
P25MM
FW_CLK98M_LCLK_R
P25MM
FW
FW_CTL<1..0>
FW_CLK98M_PCLK
FW_PCLK
P25MM
FW_CLK98M_LCLKFW_CLK98M_PCLK
FW_CLK98M_LCLK_R
FW_LREQ
FW_LPS
FW_CTL<0>
FW_CTL<1>
FW_DATA<7>
FW_DATA<5>
FW_DATA<4>
FW_DATA<3>
FW_DATA<2>
FW_DATA<1>
FW_DATA<0>
=PP2V5_PWRON_SB
FW_PINT
FW_LINKON
FW_DATA<6>
74 25
89
89
89
89
89
89
89
89 89
89
89
89
89
89
89
89
89
89
89
89
23
89
89
88
88
88
88
88
88
88
88
88 88
88
88
88
88
88
88
88
88
88
88
88
88
7
88 89
88
Preliminary
Page 65
FAVDDLFAVDDMFAVDDH
TDBL[1]
TDBL[2]
PLI_PCLK
TDBL[0]
TPBIAS[0]
TPAP[0]
TPAN[0]
TPBP[0]
TPBN[0]
TPBIAS[1]
TPAP[1]
TPAN[1]
TPBP[1]
TPBN[1]
TPAP[2]
TPAN[2]
TPBP[2]
TPBN[2]
TPBIAS[2]
PLI_INT
PLI_LINK
SDC
SDA
RDAC2
XTALVDD2
BIASVDD2
PLLVDD2
BIASGND PLLGND2
TEST_1394[0]
TEST_1394[1]
TVCO_24
XTALI_24
XTALO_24
CPS
ESDET1
ESDET0
ESDET2
PLI_LCLK
PLI_DATA[7]
PLI_DATA[0]
PLI_DATA[1]
PLI_DATA[2]
PLI_DATA[3]
PLI_DATA[4]
PLI_DATA[5]
PLI_DATA[6]
PLI_CTL[0]
PWR_CLASS
PLI_CTL[1]
PLI_LPS
PLI_LREQ
LPWR_1394
DS_ONLY_EN0
3 OF 3
VESTA FW
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
- _PP3V3_ENETFW
Signal aliases required by this page:
If stuffed, adds external pull-up to
See straps table for more information.
counter internal pull-up in Vesta.
(Int PU)
Internal Pull-Up
(Int PU)
(Int PU)
(I2C_VESTA_SCL)
(I2C_VESTA_SDA)
Vesta Config Straps:
PWR_CLASS - FireWire Power Class
1 - Sets Power Class to 0x4
(Internal Pull-up)
DS_ONLY_EN0 - Port 0 Data/Strobe
1 - Port 0 Data/Strobe mode only
(Internal Pull-down)
0 - Port 0 Bilingual mode
Page Notes
- _PP1V2_ENETFW
- _PP2V5_ENETFW
Power aliases required by this page:
- _PPFW_PHY
- _PP3V3_FW
Internal Pull-Down
counter internal pull-down in Vesta.
BOM options provided by this page:
(NONE)
- VESTA_DS_ONLY_EN0
Net Spacing Type: FW
Line To Line: 0.38 mms
Secondary Max Sep: 100 mils
Primary Max Sep: 7.5 mils
Length Tolerance: 100 mils
See straps table for more information.
- VESTA_PWR_CLASS_0
If stuffed, adds external pull-down to
FW data pairs is 110 ohms.
NOTE: Target differential impedance for
Secondary Length: 500 mils
DIFFERENTIAL_PAIR
PHYSICAL
NET_TYPE
SPACING
ELECTRICAL_CONSTRAINT_SET
(PROVIDED BY LINK PAGE)
ESR < 0.5 ohms
0 - Sets Power Class to 0x0
CRYSTAL LOAD CAPACITANCE IS 12PF
Put crystal circuit close to PHY
1/16W
22
SM-LF
5%
81
RP8900
1/16W
5%
SM-LF
22
63
RP8900
22
SM-LF
1/16W
5%
72
RP8900
5%
1/16W
SM-LF
22
54
RP8901
22
SM-LF
1/16W
5%
81
RP8901
22
SM-LF
1/16W
5%
54
RP8900
22
5%
1/16W
SM-LF
72
RP8901
5%
1/16W
SM-LF
22
63
RP8901
5%
1/16W
MF-LF
402
22
21
R8900
5%
1/16W
MF-LF
402
22
21
R8901
1/16W
5%
MF-LF
402
22
21
R8902
2.0K
MF-LF
1/16W
1%
402
2
1
R8909
MF-LF
1/16W
10K
5%
VESTA_DS_ONLY_EN0
402
2
1
R8911
5%
1/16W
MF-LF
402
VESTA_PWR_CLASS_0
10K
2
1
R8912
0.1uF
20%
CERM
402
10V
2
1
C8913
20%
10V
CERM
402
0.1uF
2
1
C8914
20%
10V
CERM
0.1uF
402
2
1
C8915
0.1uF
402
CERM
10V
20%
2
1
C8911
20%
10V
CERM
402
0.1uF
2
1
C8909
20%
10V
402
0.1uF
CERM
2
1
C8908
CERM
20%
402
0.1uF
10V
2
1
C8907
402
CERM
10V
20%
0.1uF
2
1
C8906
402
10V
20%
CERM
0.1uF
2
1
C8903
SM
FERR-EMI-600-OHM
21
L8901
402
CERM
20%
50V
0.001uF
2
1
C8901
6.3V
10uF
20%
CERM
1206-1
2
1
C8900
SM
FERR-EMI-600-OHM
21
L8900
20%
50V
402
0.001uF
CERM
2
1
C8905
805
6.3V
10UF
10%
X5R
2
1
C8904
SM
FERR-EMI-600-OHM
21
L8902
332
MF-LF
1/16W
1%
402
2
1
R8921
24.576M
8X4.5MM-SM
CRITICAL
21
Y8920
MF-LF
402
1K
1/16W
1%
2
1
R8903
MF-LF
5%
402
1/16W
390K
2
1
R8914
BCM5462
FBGA-200
OMIT
N15
P13
P14
N13
H15
K15
M15
H14
K14
M14
H13
J13
L13
G15
J15
L15
G14
J14
L14
J4
J5
B14
B13
A14
H1
H2
R15
A12
P15
N14
E15
D12
D11
D14
D15
D13
G11
G12
G13
F13
F12
F11
E11
E12
E13
E14
J3
M12
M11
L12
L11
N12
N11
M10
L10
K13
K12
K11
C13
C12
C11
A13
R13
R14
P12
U8600
1/16W
5%
MF-LF
402
10K
2
1
R8915
MF-LF
402
1/16W
5%
10K
2
1
R8916
FERR-EMI-600-OHM
SM
21
L8906
FERR-EMI-600-OHM
SM
21
L8909
SM
FERR-EMI-600-OHM
21
L8913
805
X5R
10UF
6.3V
10%
2
1
C8917
X5R
805
10%
10UF
6.3V
2
1
C8918
X5R
10%
10UF
805
6.3V
2
1
C8919
50V
CERM
5%
22pF
402
2
1
C8920
5%
402
CERM
50V
22pF
2
1
C8921
1%
10K
1/16W
MF-LF
402
2
1
R8904
402
5%
10K
MF-LF
1/16W
VESTA_BILINGUAL_EN12
2
1
R8931
402
1/16W
5%
10K
MF-LF
VESTA_PORT1_DISABLE
2
1
R8933
402
MF-LF
1/16W
5%
VESTA_PORT2_DISABLE
10K
2
1
R8935
I402
I403
I404
I405
I406
I407
I408
I409
I410
I411
I412
I413
I414
I415
I416
I417
10289
11
051-6772
SYNC_MASTER=N/A
SYNC_DATE=N/A
Vesta FireWire PHY
VESTA_CLK24M_XTALI
VESTA_CLK24M_XTALO
FW_CTL_R<0>
FW_DATA_R<7>
FW_DATA_R<5>
FW_DATA_R<0>
TP_VESTA_TDBL<0>
=PP3V3_FW
I2C_VESTA_SCL
VESTA_DS_ONLY_EN0
FW_LOWPWR
FW_CTL_R<1>
VESTA_PWR_CLASS
TP_VESTA_TEST_1394<1>
=PP2V5_ENETFW
VESTA_BILINGUAL_EN12_L
FW_TPA_P<2>
VOLTAGE=2.5V
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.5 mm
PP2V5_VESTA_FAVDDM
VESTA_PORT2_DISABLE_L
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.5 mm
VOLTAGE=3.3V
PP3V3_VESTA_FAVDDH
FW_DATA_R<4>
VOLTAGE=1.2V
PP1V2_VESTA_PLLVDD2
MIN_LINE_WIDTH=0.5 mm
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=2.5V
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.5 mm
PP2V5_VESTA_BIASVDD2
VESTA_PORT1_DISABLE_L
VESTA_PORT2_DISABLE_L
FW_TPA_N<2>
FW
FW_TPA_P<2>
FW_TPA3
FW
FW_TPA2
FW_TPBIAS<2>
MIN_LINE_WIDTH=0.25 mm
MIN_NECK_WIDTH=0.25 mm
FW FW
FW_TPA_N<0>
FW_TPA1 FW_TPA0
FW
FW_TPA_P<1>
FW_TPA2
FW
FW_TPA1
FW
FW_TPB_N<1>
FW_TPB2
FW
FW_TPB1
FW
FW_TPB_N<0>
FW_TPB1
FW
FW_TPB0
FW
FW_TPB_P<0>
FW_TPB1
FW
FW_TPB0
=PP2V5_ENETFW
FW_LREQ
FW_LPS
VESTA_CLK24M_XTALO_R
=PPFW_PHY
=PP3V3_FW
FW_CLK98M_LCLK
FW_TPBIAS<1>
MIN_LINE_WIDTH=0.25 mm
MIN_NECK_WIDTH=0.25 mm
FW_TPBIAS<0>
MIN_LINE_WIDTH=0.25 mm
MIN_NECK_WIDTH=0.25 mm
FW_TPA_P<1>
FW_DATA<3>
FW_CTL<0>
FW_DATA<6>
FW_DATA<4>
FW_DATA<2>
FW_DATA<0>
FW_CTL<1>
FW_DATA<7>
FW_DATA<5>
FW_DATA<1>
FW_CLK98M_PCLK
FW_PINT
FW_TPA_P<0>
FW_TPB_N<0>
TP_VESTA_TDBL<2>
=PP3V3_ENETFW
FW_TPB_N<2>
FW_TPA_N<1>
VESTA_RDAC2_PD
=PP1V2_ENETFW
=PP1V2_ENETFW
MIN_LINE_WIDTH=0.5 mm
PP2V5_VESTA_XTALVDD2
VOLTAGE=2.5V
MIN_NECK_WIDTH=0.25 mm
TP_VESTA_TDBL<1>
FW_TPB_P<2>
MIN_LINE_WIDTH=0.5 mm
VOLTAGE=1.2V
MIN_NECK_WIDTH=0.25 mm
PP1V2_VESTA_FAVDDL
FW_TPB_P<1>
FW_CLK98M_PCLK_R
FW_LINKON
FW_TPA_N<0>
FW_TPB_N<1>
FW_TPB_P<0>
I2C_VESTA_SDA
FW_DATA_R<1>
FW_DATA_R<2>
VESTA_PORT1_DISABLE_L
VESTA_BILINGUAL_EN12_L
FW_CPS
TP_VESTA_TVCO_24
TP_VESTA_TEST_1394<0>
FW_DATA_R<3>
FW_DATA_R<6>
P38MM
VESTA_CLK24M_XTALI
VESTA_CLK24M_XTAL
FW
FW_TPA_N<2>
FW_TPA3
FW
FW_TPA2
FW FW
FW_TPA_P<0>
FW_TPA0FW_TPA1
CLOCKS
P38MM
FW_CLK98M_PCLK_R
FW
FW_TPA_N<1>
FW_TPA2
FW
FW_TPA1
FW
FW_TPB_P<1>
FW_TPB2
FW
FW_TPB1
FW
FW_TPB_P<2>
FW_TPB3
FW
FW_TPB2
FW
FW_TPB_N<2>
FW_TPB3
FW
FW_TPB2
P38MM
VESTA_CLK24M_XTALO
P38MM
VESTA_CLK24M_XTALO_R
90
89 89
90
89
89
89
86
90
90
90
90
90
90
90
90
86
89
90
90
90
90
90
86
86
90
90
90
90
90
90
90
90
90
90
90
89
89
7
25
12
89
89
89
89
89
89
89
90
89
89
89
89
89
12
88
88
89
90
7
88
90
90
89
88
88
88
88
88
88
88
88
88
88
88
88
89
89
7
89
89
7
7
89
89
89
88
89
89
89
89
89
89
89
89
89
89
89
89
89
89
89
Preliminary
Page 66
SYM_VER-1
SYM_VER-1
TPI
VGND
VP
TPI#
TPO#
TPO
TPI
VGND
VP
TPI#
TPO#
TPO
SYM_VER-1
SYM_VER-1
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
"Snapback" & "Late VG" Protection
3rd TPA/TPB pair unused
(TPA+)
(TPA-)
(TPB+)
(TPB-)
SPACING
NET_TYPE
PHYSICAL
DIFFERENTIAL_PAIR
ESD Rail
"Snapback" & "Late VG" Protection
8 WATTS MAX
24 VOLTS
1394A
514-0202
514-0202
1394A
(TPA+)
(TPA-)
(TPB+)
(TPB-)
(PPFW_PORT1_VP)
PORT 1
(PPFW_PORT0_VP)
PORT 0
Termination
Place close to FireWire PHY
SMC
MURS320XXG
21
D9000
805
50V
CERM
0.1UF
20%
2
1
C9009
1206
FERR-160-OHM
21
L9001
PP24V_RUN
2512
FF
1W
1.3
20%
21
R9056
CRITICAL
1.3
20%
1W
FF
2512
21
R9002
0.01uF
402
CERM
16V
20%
2
1
C9026
0.01uF
20%
16V
CERM
402
2
1
C9025
0.001uF
402
50V
20%
CERM
2
1
C9021
20%
50V
CERM
402
0.001uF
2
1
C9020
0
5%
1/8W
MF-LF
805
21
R9020
BAV99DW-X-F
SOT-363
3
5
4
DP9020
SOT-363
BAV99DW-X-F
3
5
4
DP9021
20%
0.001uF
402
CERM
50V
2
1
C9023
SOT-363
BAV99DW-X-F
6
2
1
DP9020
SOT-363
BAV99DW-X-F
6
2
1
DP9021
20%
CERM
0.001uF
402
50V
2
1
C9022
165-OHM
SM
4
32
1
FL9020
SM
165-OHM
4
32
1
FL9021
FWS22
F-ST-TH
CRITICAL
1
2
5
6
3
4
987
10
J9001
CRITICAL
F-ST-TH
FWS22
1
2
5
6
3
4
987
10
J9000
20%
16V
CERM
402
0.01uF
2
1
C9016
402
CERM
16V
20%
0.01uF
2
1
C9015
SM
165-OHM
4
32
1
FL9010
165-OHM
SM
4
32
1
FL9011
805
MF-LF
1/8W
5%
0
21
R9010
SOT-363
BAV99DW-X-F
3
5
4
DP9010
20%
50V
CERM
402
0.001uF
2
1
C9011
BAV99DW-X-F
SOT-363
3
5
4
DP9011
0.001uF
50V
CERM
402
20%
2
1
C9013
BAV99DW-X-F
SOT-363
6
2
1
DP9010
0.001uF
402
CERM
50V
20%
2
1
C9010
BAV99DW-X-F
SOT-363
6
2
1
DP9011
0.001uF
CERM
20%
50V
402
2
1
C9012
SM
0.5AMP
21
F9002
SM
1.5AMP-33V
21
F9000
1uF
CERM
402
6.3V
10%
2
1
C9060
402
1%
56.2
1/16W
MF-LF
2
1
R9061
56.2
1%
1/16W
402
MF-LF
2
1
R9060
6.3V
CERM
402
1uF
10%
2
1
C9050
56.2
1%
1/16W
MF-LF
402
2
1
R9051
56.2
1%
402
1/16W
MF-LF
2
1
R9050
MF-LF
56.2
1%
1/16W
402
2
1
R9063
56.2
1%
1/16W
MF-LF
402
2
1
R9062
MF-LF
402
1/16W
1%
4.99K
2
1
R9064
402
CERM
25V
5%
270pF
2
1
C9064
1K
5%
MF-LF
1/16W
402
2
1
R9070
56.2
1%
1/16W
MF-LF
402
2
1
R9053
56.2
1%
1/16W
MF-LF
402
2
1
R9052
402
4.99K
1%
1/16W
MF-LF
2
1
R9054
25V
5%
CERM
402
270pF
2
1
C9054
SM-1
400-OHM-EMI
21
L9090
1/16W
1%
MF-LF
665
402
21
R9090
BZX84C2V7-X-F
SOT23
31
D9090
I400
I401
I402
I403
I404
I405
I406
I407
051-6772
11
90
102
SYNC_MASTER=N/A
SYNC_DATE=N/A
FIREWIRE CONNECTORS
MAKE_BASE=TRUE
NC_FW_TPA_P2
NO_TEST=YES
FW_TPB_N<2>
NC_FW_TPA_N2
MAKE_BASE=TRUE
NO_TEST=YES
FW_TPBIAS<2>
FW_PORT0_TPB_P
FW_PORT0_TPA_P_FL
FW_PORT0_TPA_N_FL
FW_PORT0_TPB_P_FL
FW_PORT1_TPA_P_FL
FW_PORT1_TPA_N_FL
FW_PORT1_TPB_P_FL
PPFW_PORT0_VP
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=33V
MIN_LINE_WIDTH=0.6 mm
GND_FW_PORT0_VG
VOLTAGE=0V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
GND_CHASSIS_FIREWIRE
FW_PORT0_TPA_P
FW_PORT0_TPB_N
GND_FW_PORT1_VG
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.6 mm
VOLTAGE=0V
GND_CHASSIS_FIREWIRE
FW_PORT1_TPA_P
FW_PORT0_TPA_N
FW_PORT1_TPB_P
PPFW_PORT1_VP
MIN_LINE_WIDTH=0.6 mm
VOLTAGE=33V
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=24V
FW_VP
MIN_LINE_WIDTH=0.8MM
MIN_NECK_WIDTH=0.25MM
PP24V_FW_R
VOLTAGE=24V
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.8MM
FW_PORT0_TPB_N_FL
FW_PORT1_TPB_N_FL
=PP3V3_FW
FW_TPA_C<0>
VOLTAGE=3.3V
PP3V3_FW_ESD
MIN_LINE_WIDTH=0.38 mm
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=3.3V
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.38 mm
PP3V3_FW_ESD_F
FW_PORT0_TPA_P_FL
FW FW
FW_TPA0_FL
FW_PORT0_TPA_N_FL
FW FW
FW_TPA0_FL
FW FW
FW_TPA1_FL
FW_PORT1_TPA_N_FL
FW_PORT0_TPB_P_FL
FW FW
FW_TPB0_FL
FW_PORT0_TPB_N_FL
FW FW
FW_TPB0_FL
FW FW
FW_TPA1_FL
FW_PORT1_TPA_P_FL
FW FW
FW_TPB1_FL
FW_PORT1_TPB_P_FL
FW FW
FW_TPB1_FL
FW_PORT1_TPB_N_FL
VOLTAGE=24V
PP24V_FW_D
MIN_LINE_WIDTH=0.8MM
MIN_NECK_WIDTH=0.25MM
PPFW_PORT1_VP
FW_TPBIAS<0>
MAKE_BASE=TRUE
NC_FW_TPBIAS2
NO_TEST=YES
FW_TPB2_PD
MAKE_BASE=TRUE
NO_TEST=YES
FW_PORT1_TPB_N
FW_PORT1_TPA_N
PP3V3_FW_ESD
=PPFW_PHY
MAKE_BASE=TRUE
PP24V_FW
VOLTAGE=24V
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.8MM
PP3V3_FW_ESD
FW_TPB_P<2>
FW_TPA_N<2>
FW_TPA_P<2>
FW_PORT1_TPB_N
MAKE_BASE=TRUE
FW_TPB_N<1>
FW_TPA_C<1>
FW_TPB_P<1>
FW_TPBIAS<1>
FW_PORT1_TPA_N
MAKE_BASE=TRUE
FW_TPB_N<0>
MAKE_BASE=TRUE
FW_PORT1_TPA_P
FW_PORT0_TPA_P
MAKE_BASE=TRUE
FW_TPA_N<1>
FW_TPA_P<1>
MAKE_BASE=TRUE
FW_PORT0_TPA_N
FW_PORT0_TPB_P
MAKE_BASE=TRUE
FW_PORT0_TPB_N
MAKE_BASE=TRUE
FW_PORT1_TPB_P
MAKE_BASE=TRUE
FW_TPB_P<0>
FW_TPA_N<0>
FW_TPA_P<0>
90
90
89
89
89
90
90
90
90
90
90
90
7
90
90
7
90
90
90
90
6
90
90
7
90
90
90
90
90
90
90
90
90
90
89
90
90
90
89
90
89
89
89
90
89
89
89
90
89
90
90
89
89
90
90
90
90
89
89
89
Preliminary
Page 67
DM1
DP1
DM2
DP2
RSDM2
RSDP1
RSDM1
RSDP2
AVDD
DM3
DP3
RSDM3
RSDP3
PPON1
OCI2
OCI1
OCI3
OCI4
OCI5
PPON2
PPON5
PPON4
PPON3
RSDM4
DM4
DP4
DM5
DP5
RSDP4
RSDM5
RSDP5
RREF
AVSS(R)
AVSS
NC1
NC2
XT1/SCLK
XT2
VDD
VSS
(8 OF 8)
NC0
NC1
NC3
NC2
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC12
NC11
NC14
NC13
NC15
NC19
NC18
NC17
NC16
NC20
NC22
NC23
NC24
NC21
NC25
NC29
NC28
NC27
NC26
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
(NONE)
Length Tolerance: 50 mils
Line To Line: 19.5 mils
Tie to GND at ball N11
Y9145 LOAD CAPACITANCE IS ??PF
USB2 data pairs is 90 ohms.
NOTE: Target differential impedance for
Secondary Length: 500 mils
NET_PHYSICAL_TYPE
NET_SPACING_TYPE
DIFFERENTIAL_PAIR
(USB2_OC<4>)
(USB2_OC<0>)
(USB2_N<4>)
(USB2_P<4>)
(USB2_N<3>)
(USB2_P<3>)
(USB2_P<2>)
(USB2_N<2>)
(USB2_P<1>)
(USB2_N<1>)
(USB2_N<0>)
(USB2_P<0>)
ELECTRICAL_CONSTRAINT_SET
(USB2_OC<2>)
Secondary Max Sep: 100 mils
Primary Max Sep: 7.5 mils
BOM options provided by this page:
- _PP3V3_PWRON_USB
Power aliases required by this page:
(NONE)
Page Notes
Net Spacing Type: USB2
(USB2_OC<1>)
(USB2_OC<3>)
Signal aliases required by this page:
1%
1/16W
MF-LF
402
36
21
R9102
1%
1/16W
36
402
MF-LF
21
R9103
402
MF-LF
1/16W
1%
36
21
R9104
1%
1/16W
MF-LF
402
36
21
R9105
36
402
MF-LF
1/16W
1%
21
R9106
MF-LF
1%
1/16W
402
36
21
R9107
1%
1/16W
MF-LF
402
36
21
R9108
36
402
MF-LF
1/16W
1%
21
R9109
402
9.09K
1%
MF-LF
1/16W
2
1
R9138
402
10V
CERM
0.1uF
20%
2
1
C9125
402
CERM
10V
20%
0.1uF
2
1
C9124
20%
10V
CERM
0.1uF
402
2
1
C9130
402
0.1uF
CERM
10V
20%
2
1
C9129
1.5K
402
MF-LF
1/16W
5%
2
1
R9141
CRITICAL
FBGA
NEC_UPD720101_USB2
P8
L9
N2B2A2
B14
H14
N14
P10
N1
D8
F11
J11
G4
D12
H12
L12
M11
B13
N13
B1
L13
N8E2A3
A12
A13
P12
P3
D7H4G12
D13
F13
H13
J13
P2
C14
E14
G14
J12
K13
E13
F12
H11
K14
M14
P11
A9
C10
C11
A11
C12
B9
A10
B10
B11
B12
M6
P6
C13
E12
G13
J14
L14
D14
F14
G11
K12
M13
N11
M12
P13
N12
N10
U7700
MF-LF
1/16W
5%
100
402
1
2
R9145
22pF
5%
50V
CERM
402
2
1
C9146
20%
10V
CERM
0.1uF
402
2
1
C9123
402
CERM
10V
20%
0.1uF
2
1
C9122
CERM
0.1uF
402
20%
10V
2
1
C9128
0.1uF
402
CERM
10V
20%
2
1
C9127
20%
10V
CERM
0.1uF
402
2
1
C9121
402
0.1uF
CERM
10V
20%
2
1
C9126
10K
5%
1/16W
SM-LF
5678
4321
RP9110
10K
5%
1/16W
MF-LF
402
1
2
R9110
NOSTUFF
10uF
6.3V
805
CERM
20%
2
1
C9120
MF-LF
402
1.5K
1/16W
5%
2
1
R9140
11.4X4.7X4.2-SM
CRITICAL
30.0000M
21
Y9145
22pF
5%
50V
CERM
402
2
1
C9145
V1.0
BGA
SHASTA
OMIT
T2
T1
R8
R7
R6
R5
R4
Y3
Y1
W3
W1
V4
V3
V2
V1
U6
U5
R3
U4
U3
U2
U1
T8
T7
T6
T5
T4
T3
P8
P7
U2300
SM
21
XW9100
20%
402
10V
CERM
0.1uF
2
1
C9137
0.1uF
20%
10V
CERM
402
2
1
C9136
NOSTUFF
805
CERM
6.3V
10uF
20%
C9135
FERR-EMI-100-OHM
SM
21
L9135
5%
1/10W
MF-LF
4.7
603
21
R9135
402
MF-LF
36
1%
1/16W
21
R9100
402
MF-LF
1%
1/16W
36
21
R9101
10291
051-6772
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
USB Host Interfaces
USB2 USB2
USB2_1
USB2_P<1>
USB2_1
USB2 USB2
USB2_N<1>
USB2_1 USB2_1
USB2 USB2
USB2_P<2>
USB2_2USB2_2
USB2 USB2
USB2_P<3>
USB2_3USB2_3
NEC_CLK30M_XT2_R
P25MM
=PP3V3_PWRON_USB
USB_NEC_P<3>
USB2
USB2_4
USB2_N<4>
USB2_4
USB2
USB2_OC<0>
GND_NEC_AVSS_R
NEC_NC2_PU
USB2_PWREN<0>
USB2_PWREN<2>
TP_SB_NC_R4
USB2_P<3>
USB2_N<1>
USB_NEC_N<0>
USB_NEC_P<0>
USB_NEC_N<1>
USB_NEC_P<1>
USB_NEC_N<2>
USB_NEC_N<3>
USB_NEC_N<4>
USB_NEC_P<4>
USB2_N<0>
USB2_P<0>
USB2_P<1>
USB2_P<2>
USB2_N<2>
USB2_P<4>
NEC_CLK30M_XT2
=PP3V3_PWRON_USB
USB2_OC<1>
USB2_OC<3>
USB2_OC<2>
USB2_OC<4>
=PP3V3_PWRON_USB
NEC_CLK30M_XT1
NEC_RREF_PD
NEC_NC1_PU
NEC_CLK30M_XT2_R
USB2_PWREN<4>
USB2_PWREN<3>
USB2_PWREN<1>
TP_SB_NC_Y1
TP_SB_NC_Y3
TP_SB_NC_W3
TP_SB_NC_W1
TP_SB_NC_V2
TP_SB_NC_V3
TP_SB_NC_V4
TP_SB_NC_V1
TP_SB_NC_U6
TP_SB_NC_U5
TP_SB_NC_U3
TP_SB_NC_U4
TP_SB_NC_U2
TP_SB_NC_T8
TP_SB_NC_U1
TP_SB_NC_T7
TP_SB_NC_T6
TP_SB_NC_T5
TP_SB_NC_T3
TP_SB_NC_T4
TP_SB_NC_T2
TP_SB_NC_T1
TP_SB_NC_R8
TP_SB_NC_R6
TP_SB_NC_R7
TP_SB_NC_R5
TP_SB_NC_R3
TP_SB_NC_P7
TP_SB_NC_P8
USB2_N<4>
USB2 USB2
USB2_P<0>
USB2_0 USB2_0
USB2 USB2
USB2_N<0>
USB2_0 USB2_0
USB2 USB2
USB2_2
USB2_N<2>
USB2_2
USB2
USB2_3
USB2_N<3>
USB2_3
USB2
USB2 USB2
USB2_4
USB2_P<4>
USB2_4
NEC_CLK30M_XT1
USB2_NEC_XTAL
P25MM
NEC_CLK30M_XT2
P25MM
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.5MM
PP3V3_PWRON_NEC_AVDD
MIN_NECK_WIDTH=0.25MM
USB_NEC_P<2>
USB2_N<3>
GND_NEC_AVSS_R
VOLTAGE=0V
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
92
92
92
92
91
91
92
92
92
92
92
92
92
91
91
91
91
92
92
92
92
91
92
91
91
91
91
91
7
76
92
91
92
92
6
91
91
91
91
91
91
91
76
91
7
92
92
92
76
7
91
91
92
92
92
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
76
91
91
91
91
76
91
91
91
91
Preliminary
Page 68
SYM_VER-1
SYM_VER-1
SYM_VER-1
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PORT 1
ELECTRICAL_CONSTRAINT_SET
NET_SPACING_TYPE
NET_PHYSICAL_TYPE
Page Notes
USB
CONTROLLER
BY
DIFFERENTIAL_PAIR
PROVIDED
UNUSED PORT
provide the appropriate constraints
this page. It is assumed that the
terminate unused signals.
(NONE)
(NONE)
necessary aliases to map the
- _PP5V_PWRON_USB
Signal aliases required by this page:
BOM options provided by this page:
NOTE: USB pairs are NOT constrained on
destinations and/or to properly
USB pairs to their appropriate
External USB Ports
514-0199
GND
D+
D-
VDD
PORT 2
514-0199
VDD
DÂD+
GND
VDD
PORT 3
514-0199
DÂD+
GND
- _PP3V3_PWRON_BT
- _PP3V3_PWRON_UDASH
- _PP5V_PWRON_UDASH
Power aliases required by this page:
to apply to entire USB D+/D- XNets.
USB Host Controller page will
control on USB ports 2-4. Rename
single-pin connections.
USB controller outputs to indicate
NOTE: This design does not provide power
neoBorg Implementation
NOTE: This page is expected to contain the
402
CERM
50V
NO STUFF
5%
33pF
2
1
C9215
NO STUFF
33pF
402
5%
50V
CERM
2
1
C9214
120-OHM
2012
4
32
1
L9212
CERM
402
16V
0.01uF
20%
2
1
C9213
0.01uF
CERM
20%
402
16V
2
1
C9212
NOSTUFF
10UF
1210
16V
10%
CERM
2
1
C9211
6.3V
NOSTUFF
POLY
150uF
20%
SMD
2
1
C9210
FERR-250-OHM
SM
21
L9211
FERR-250-OHM
SM
21
L9210
MF-LF
15K
402
1/16W
5%
2
1
R9211
1/16W
MF-LF
5%
15K
402
2
1
R9210
0.01uF
402
CERM
20%
16V
2
1
C9223
NO STUFF
402
CERM
50V
5%
33pF
2
1
C9225
NO STUFF
33pF
CERM
50V
5%
402
2
1
C9224
1210
NOSTUFF
CERM
16V
10%
10UF
2
1
C9221
CERM
402
0.01uF
20%
16V
2
1
C9222
6.3V
POLY
20%
150uF
SMD
NOSTUFF
2
1
C9220
SM
FERR-250-OHM
21
L9220
FERR-250-OHM
SM
21
L9221
120-OHM
2012
4
32
1
L9222
15K
1/16W
MF-LF
5%
402
2
1
R9221
402
MF-LF
1/16W
5%
15K
2
1
R9220
F-ST-TH
USB-UAS25
CRITICAL
4
3
2
1
7
6
5
J9210
F-ST-TH
USB-UAS25
CRITICAL
4
3
2
1
7
6
5
J9220
120-OHM
2012
4
32
1
L9232
402
CERM
0.01uF
20%
16V
2
1
C9233
CRITICAL
USB-UAS25
F-ST-TH
4
3
2
1
7
6
5
J9230
5%
50V
CERM
402
33pF
NO STUFF
2
1
C9235
CERM
402
0.01uF
20%
16V
2
1
C9232
CERM
1210
NOSTUFF
10UF
10%
16V
2
1
C9231
NO STUFF
33pF
5%
50V
CERM
402
2
1
C9234
FERR-250-OHM
SM
21
L9230
NOSTUFF
150uF
20%
6.3V
SMD
POLY
2
1
C9230
FERR-250-OHM
SM
21
L9231
15K
5%
1/16W
MF-LF
402
2
1
R9231
15K
MF-LF
402
1/16W
5%
2
1
R9230
SM-1
2AMP-6V
21
F9200
I526
I527
1/10W
5%
300
603
MF-LF
2
1
R9201
603
5%
1/10W
MF-LF
160
2
1
R9200
402
MF-LF
1/16W
5%
15K
2
1
R9251
5%
1/16W
402
15K
MF-LF
2
1
R9250
NOSTUFF
402
0
21
R9212
NOSTUFF
0
402
21
R9213
NOSTUFF
0
402
21
R9222
NOSTUFF
402
0
21
R9223
NOSTUFF
0
402
21
R9232
NOSTUFF
0
402
21
R9233
102
92
051-6772
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
USB Device Interfaces
USB2_PORT3_N_F
USB2_PORT1_N
MAKE_BASE=TRUE
USB2_PORT1_P_F
USB2_PORT1_N_F
USB2_N<0>
MIN_LINE_WIDTH=0.6MM
PP5V_USB2_PORT2_F
MIN_NECK_WIDTH=0.25MM
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
VOLTAGE=0V
MIN_NECK_WIDTH=0.5MM
GND_USB2_PORT2
USB2_PORT2_P_F
USB2 USB2_PORT2_F
USB2_PORT2_P_F
USB2
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
PP5V_USB2
USB2_PORT3_P_F
USB2 USB2_PORT3_F USB2
USB2_PORT1_P
MAKE_BASE=TRUE
USB2_P<0>
VOLTAGE=0V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.5MM
GND_USB2_PORT3
TP_USB2_PWREN<2>
MAKE_BASE=TRUE
TP_USB2_PWREN<4>
MAKE_BASE=TRUE
USB2_PWREN<4>
USB2_PWREN<3>
TP_USB2_PWREN<3>
MAKE_BASE=TRUE
USB2_PWREN<2>
USB2_PWREN<1>
TP_USB2_PWREN<1>
MAKE_BASE=TRUE
TP_USB2_PWREN<0>
MAKE_BASE=TRUE
USB2_PWREN<0>
USB2_OC<1>
USB2_OC<0>
USB2_PORT3_N
MAKE_BASE=TRUE
USB2_N<2>
USB2_P<2>
USB2_PORT3_P
MAKE_BASE=TRUE
USB2_OC<2>
USB_OC
MAKE_BASE=TRUE
USB2_OC<3>
_PP5V_PWRON_USB
USB2_P<1>
USB2_N<1>
MAKE_BASE=TRUE
USB2_PORT2_N
USB2_PORT3_P_F
GND_CHASSIS_USB
PP5V_USB2_PORT3_F
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
GND_CHASSIS_USB
MIN_NECK_WIDTH=0.25MM
VOLTAGE=0
MIN_LINE_WIDTH=0.6MM
GND_CHASSIS_USB
MIN_NECK_WIDTH=0.5MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=0V
GND_USB2_PORT1
VOLTAGE=5V
PP5V_USB2_PORT1_F
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
USB2_N<3>
USB2_P<3>
USB2
USB2_PORT3_N_F
USB2 USB2_PORT3_F
USB2 USB2_PORT1_F
USB2_PORT1_N_F
USB2
USB2 USB2_PORT1_F
USB2_PORT1_P_F
USB2
USB2_PORT2_FUSB2
USB2_PORT2_N_F
USB2
USB2_PORT2_P
MAKE_BASE=TRUE
USB2_PORT2_N_F
92
92
92
92
92
92
92
92
92
92
92
92
92
92
92
6
6
6
91
6
6
6
59
6
91
6
6
91
91
6
91
91
6
6
91
91
91
91
91
91
91
7
91
91
6
7
6
7
7
6
91
91
6
6
6
6
6
Preliminary
Page 69
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
Page Notes
Spec Load: 0.5 A active, 3 mA auxiliary
Q52 Modem Connector
1 - MONO_OUT/PC_BEEP
From Intel Mobile Audio/Modem
Rev 1.0, February 22, 1999
Daughter Card Specification
13 - CD_LEFT
9 - CD_GND
3 - GND
11 - CD_RIGHT
7 - AUXA_LEFT
5 - AUXA_RIGHT
27 - GND
29 - AC97_MSTRCLK
25 - AC97_RESET#
21 - 3.3Vmain
19 - GND
17 - 3.3Vaux
15 - GND
23 - AC97_SDATA_OUT
28 - GND
16 - PRIMARY_DN
20 - GND
2 - AUDIO_PWRON
10 - 5Vmain
18 - 5Vd
22 - AC97_SYNC
24 - AC97_SDATA_INB
26 - AC97_SDATA_INA
30 - AC97_BITCLK
6 - RESERVED
4 - MONO_PHONE
8 - GND
14 - RESERVED
12 - RESERVED
516S0116
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
514-0205
NC
NC NC
Power aliases required by this page:
- _PP3V3_PWRON_MODEM
Signal aliases required by this page:
(NONE)
(NONE)
BOM options provided by this page:
RJ11 CONNECTOR
STUFFED AT FATP
SYMBOL USED FOR PLACEMENT
F-ST-SM
C104A-H9.0
CRITICAL
9
87
65
4
30
3
29
2827
2625
2423
2221
20
2
19
1817
1615
1413
1211
10
1
36
35
3433
3231
J9401
RJ11-HGT27.5
ST-TH
OMIT
2
1
J9402
STDOFF-4MM-9MMH-TH
1
SDF9400
STDOFF-4MM-9MMH-TH
1
SDF9401
10K
402
MF-LF
5%
1/16W
2
1
R9451
10UF
CERM
6.3V
20%
805
2
1
C9450
402
0.1UF
10V
CERM
20%
2
1
C9451
051-6772
94
102
11
SYNC_MASTER=N/A
SYNC_DATE=N/A
Modem Interface
I2S1_BITCLK
I2S1_SYNC
_PP3V3_PWRON_MODEM
I2S1_DEV_TO_SB_DTI
_PP3V3_PWRON_MODEM
MODEM_FC_RGDT
I2S1_MCLK
I2S1_SB_TO_DEV_DTO
I2S1_RESET_L
MODEM_RING2SYS_L
GND_CHASSIS_MODEM
MAKE_BASE=TRUE
TP_UDASH_SDOWN
UDASH_SDOWN
25
25
94
25
94
25
25
25
25
6
6
7
6
7
6
6
6
6
25
Preliminary
Page 70
DOUT
LRCK
VREF2
L/M#
REFO
VREF1
VDD
BCK
MINP
MINM
MBIAS
VCOM
VOUTL
VOUTR
VINR
VINL
ATEST
SCKI
PDWN*
SDA
ADR
SCL
I2CEN
DOUTS
DIN
DGND AGND
VCC
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
APPLE P/N 353S0933
AUDIO CODEC
NC
NC
PLACE AT U9500
1UF
10%
10V
805
CERM
2
1
C9503
10UF
SM
ELEC
20%
16V
2
1
C9506
1000-OHM-200MA
0603
21
L9500
1UF
10%
805
10V
CERM
2
1
C9502
1UF
10V
805
CERM
10%
2
1
C9501
SM
10UF
16V
ELEC
20%
2
1
C9512
5%
MF-LF
402
1/16W
33
21
R9500
402
1/16W
33
MF-LF
5%
21
R9502
1/16W
402
MF-LF
5%
47K
2
1
R9501
16V
SM
ELEC
20%
10UF
2
1
C9510
X7R
10%
16V
603
0.1UF
2
1
C9511
603
X7R
16V
10%
0.1UF
2
1
C9509
20%
10UF
CERM
6.3V
805
2
1
C9500
603
X7R
16V
10%
0.1UF
2
1
C9504
0.1UF
10%
16V
X7R
603
2
1
C9505
402
C0G
50V
+/-0.25PF
4.7PF
NOSTUFF
2
1
C9513
1K
1%
1/16W
MF-LF
402
2
1
R9503
VQFN
PCM3052A
5
4
24
25
6
2
16
26
31237
18
19
17
32
9
29
28
27
10
3
21
14
13
12
15
11
1
30
22
8
20
U9500
SM
ELEC
16V
20%
10UF
2
1
C9508
0.1UF
10%
16V
X7R
603
2
1
C9507
SYNC_MASTER=AUDIO
AUDIO: CODEC
SYNC_DATE=02/16/2005
102
11
95
051-6772
AUD_CODEC_OUT_R
MIN_NECK_WIDTH=0.2MM
PPV_3V3_AUDIO_CODEC
VOLTAGE=3.3V
PP4V5_AUDIO_ANALOG
AUD_CODEC_IN_R
AUD_PCM_VCOM
AUD_PCM_REF1
AUD_CODEC_LI_SHDN_L
GND_AUDIO_CODEC
PP3V3_AUDIO
NET_SPACING_TYPE=AUDIO
AUD_SPDIF_OUT
I2S0_DEV_TO_SB_DTI
NET_SPACING_TYPE=AUDIO
GND_AUDIO_CODEC
NET_SPACING_TYPE=AUDIO
I2S0_BITCLK_DELAYED
AUD_MICIN_P
AUD_PCM_MBIAS
AUD_PSEUDO_VREF
NET_SPACING_TYPE=AUDIO
AUD_CODEC_MCLK
I2S0_RESET_L
I2C_AUDIO_SDA
I2C_AUDIO_SCL
AUD_PCM_REF2
AUD_CODEC_IN_L
I2S0_SYNC
AUDI2S0OUT
AUDSPDIFOUT
I2S0_SB_TO_DEV_DTO
NET_SPACING_TYPE=AUDIO
AUD_MICIN_N
AUD_CODEC_OUT_L
102
102
102
98
101
98
100
102
96
100
96
100
98
MIN_LINE_WIDTH=0.25MM
96
96
100
96
95
7
101
25
95
102
102
102
96
102
25
18
18
96
25
25
102
98
Preliminary
Page 71
V-
V+
V-
V+
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
APPLE P/N 353S0642
APPLE P/N 353S0642
LINE IN PSEUDO-DIFFERENTIAL AMP
AV= 0.49
CRITICAL
MAX4253EUB
UMAX
4
10
5
1
2
3
U9600
0.47UF
20%
10V
603
CERM
2
1
C9602
SM
16V
20%
10UF
ELEC
2 1
C9600
16V
20%
SM
ELEC
10UF
2 1
C9601
402
MF-LF
1%
1/16W
100K
2
1
R9603
402
47K
5%
1/16W
MF-LF
2
1
R9602
NOSTUFF
1/16W
0
5%
MF-LF
402
21
R9601
1%
20.5K
1/16W
MF-LF
402
21
R9604
1%
10K
1/16W
MF-LF
402
21
R9607
1/16W
402
20.5K
1%
MF-LF
21
R9605
1/16W
1%
10K
402
MF-LF
21
R9606
MF-LF
1/16W
1%
165
402
2
1
R9600
NOSTUFF
5%
50V
CERM
402
47PF
21
C9603
BAV99DW-X-F
SOT-363
6
2
1
D9600
MF-LF
1/16W
1%
10K
402
21
R9611
NOSTUFF
5%
50V
CERM
402
47PF
21
C9606
1%
10K
1/16W
MF-LF
402
21
R9612
UMAX
MAX4253EUB
CRITICAL
4
10
6
9
8
7
U9600
SOT-363
BAV99DW-X-F
3
5
4
D9600
402
MF-LF
1%
20.5K
1/16W
21
R9609
1/16W
402
1%
MF-LF
20.5K
21
R9610
10UF
SM
20%
ELEC
16V
2 1
C9604
ELEC
16V
20%
10UF
SM
2 1
C9605
100K
402
MF-LF
1%
1/16W
2
1
R9608
AUDIO: LINE INPUT AMP
SYNC_DATE=02/16/2005
SYNC_MASTER=AUDIO
051-6772
11
96
102
AUD_LI_L
AUD_LI_L1
AUD_LI_VREFL
AUD_LI_L2
AUD_CODEC_IN_L
AUD_CODEC_LI_SHDN_L
AUD_CODEC_IN_R
AUD_PSEUDO_VREF
AUD_LI_GNDR1
PP4V5_AUDIO_ANALOG
AUD_LI_GND
AUD_LI_R1
AUD_LI_GNDL1
AUD_LI_VREFR
GND_AUDIO_CODEC
AUD_LI_R
PP4V5_AUDIO_ANALOG
AUD_LI_R2
GND_AUDIO_CODEC
AUD_CODEC_LI_SHDN_L1
AUD_PSEUDO_VREF
AUD_LI_GND
102
102
102
98
102
98
96
96
101
96
96
96
96
101
101
95
95
95
95
95
96
95
101
95
95
95
96
Preliminary
Page 72
RIN+
SHDN*
VDDR
PVDD
VDDL
C1P
ROUT
PGND
SGND
PVSS
VSS
RIN-
LOUTLIN-
LIN+
C1N
NC
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
APPLE P/N 353S0687
LINE OUT AMP
FC = 37 KHZ, HO = -1.4
CANCELLATION
GROUND NOISE
TO SHASTA GPIO
LINE OUT LOW-PASS FILTER
LINE OUT
CERM
1UF
10%
10V
805
2
1
C9808
16V
SM
20%
10UF
ELEC
2
1
C9811
CERM
10V
805
1UF
10%
2
1
C9810
CRITICAL
QFN
MAX9722AETE
11
9
13
16
6
10
8
7
5
1
3
17
12
14
15
2
4
U9800
402
MF-LF
1/16W
1%
10K
2
1
R9805
402
1/16W
1%
MF-LF
14.0K
21
R9806
1%
1/16W
402
14.0K
MF-LF
21
R9801
402
1/16W
1%
MF-LF
3.92K
21
R9802
10UF
20%
16V
SM
ELEC
2
1
C9806
402
10K
1%
1/16W
MF-LF
21
R9800
10UF
20%
16V
ELEC
SM-1
21
C9800
0603
1.5NF
5%
25V
CERM
CRITICAL
2
1
C9802
CERM
0603
25V
5%
1.5NF
CRITICAL
2
1
C9804
MF-LF
402
1/16W
14.0K
1%
21
R9809
3.92K
402
MF-LF
1%
1/16W
21
R9808
402
10K
MF-LF
1/16W
1%
21
R9807
SM-1
ELEC
16V
20%
10UF
21
C9803
402
4.7K
1/16W
5%
MF-LF
2
1
R9815
1/10W
5%
4.7
MF-LF
603
21
R9810
270PF
CERM
603
5%
50V
21
C9801
270PF
CERM
50V
5%
603
21
C9805
50V
100PF
CERM
402
5%
2
1
C9812
402
100PF
5%
50V
CERM
2
1
C9813
402
1K
5%
1/16W
MF-LF
21
R9816
1K
MF-LF
402
1/16W
1%
2
1
R9817
1K
1%
1/16W
MF-LF
402
2
1
R9818
805
6.3V
CERM
10UF
20%
2
1
C9807
14
1%
1/8W
MF-LF
805
21
R9811
805
MF-LF
1/8W
1%
14
21
R9812
1/16W
10K
1%
MF-LF
402
2
1
R9804
MF-LF
1/8W
0
805
5%
21
R9813
MF-LF
1/8W
0
805
5%
21
R9814
1/16W
402
1%
MF-LF
14.0K
21
R9803
1UF
805
10%
CERM
10V
2
1
C9809
AUDIO: LINE OUT AMP
SYNC_DATE=02/16/2005
SYNC_MASTER=AUDIO
102
98
051-6772
11
AUD_LOAMP_OUT_R
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
AUD_LO_GND
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
GND_AUD_LOAMP
AUD_LOAMP_IN_L_P
AUD_LOAMP_IN_L_M
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.25MM
AUD_MAX9722_PVSS
AUD_CODEC_OUT_R
GND_AUD_LOAMP_CHGPMP
PP5V_AUDIO_ANALOG
AUD_LOAMP_IN_R_P
GND_AUDIO_CODEC
AUD_MAX9722_C1P
AUDIO_LO_MUTE_L_F
AUD_LOAMP_IN_R_M
AUD_LOAMP_OUT_L
AUD_LOAMP_IN_L_P
AUD_LOAMP_IN_L_M
AUDCODECOUTL1
AUD_LOAMP_IN_R_P
AUDCODECOUTR1
AUDCODECOUTL
AUDCODECOUTR
AUD_CODEC_OUT_L
AUD_LOAMP_OUT_R
AUD_LOAMP_IN_R_M
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
AUD_LO_L
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
AUD_LO_R
GND_AUD_LOAMP_CHGPMP
AUD_MAX9722_C1N
GND_AUD_LOAMP_CHGPMP
AUDIO_LO_MUTE_L
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
AUD_LOAMP_OUT_L
AUD_LO_GND_PRB
GND_AUDIO_CODEC
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=5V
PP5V_AUDIO_LOAMP
102
102
98
98
100
102
96
100
102
102
96
98
101
102
98
98
95
98
102
98
95
98
98
98
98
98
95
98
98
101
101
98
98
25
98
101
95
Preliminary
Page 73
SYM_VER-1
SYM_VER-1
PGND
VDD
G1
G2
CHOLD
AGND
PAD
THM
NC
SHDN*
FS2
FS1
INL-
INL+
INR-
REG
INR+
OUTL+
OUTL+
OUTLÂOUTL-
C1+
C1-
OUTR+
OUTR+
OUTRÂOUTR-
SS
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
GAIN AND SWITCHING FREQUENCY STUFF OPTIONS
MODULATION SETTING: LOW EMI
GAIN SETTINGS: +19DB
APPLE P/N 353S0680
SPEAKER AMP
TIE TO SHASTA GPIO
NC
APPLE P/N 155S0194
MF-LF
402
1%
1/16W
10K
21
RA015
MF-LF
1/16W
5%
47K
402
21
RA013
402
1/16W
MF-LF
1%
10K
2
1
RA014
NOSTUFF
800-OHM
ACM4532
4
32
1
LA011
NOSTUFF
ACM4532
800-OHM
4
32
1
LA012
MAX9714
QFN
22
21
4
3
33
12
11
14
24
23
2
1
26
28
25
27
30
32
29
31
8
15
16
9
10
18
17
20
19
7
5
6
13
U9700
0
5%
1/10W
MF-LF
603
21
RA016
603
MF-LF
1/10W
5%
0
21
RA017
1.5AMP-33V
SM
21
FA000
180-OHM-1.5A
0603
21
LA003
0.1UF
50V
10%
X7R
603-1
2
1
CA008
180-OHM-1.5A
0603
21
LA004
X7R
0.47UF
16V
10%
805
2
1
CA009
FERR-250-OHM
SM-1
21
LA000
0.47UF
16V
805
X7R
10%
21
CA004
0.47UF
16V
X7R
10%
805
21
CA005
180-OHM-1.5A
0603
21
LA002
0.47UF
X7R
805
10%
16V
2
1
CA014
10%
X7R
805
16V
0.47UF
21
CA007
10%
805
X7R
16V
0.47UF
21
CA006
20%
SM-2
ELEC
220UF
16V
2
1
CA000
0603
180-OHM-1.5A
21
LA001
402
MF-LF
1/16W
5%
0
2
1
RA008
NOSTUFF
0
5%
1/16W
MF-LF
402
2
1
RA009
1/16W
402
MF-LF
5%
0
NOSTUFF
2
1
RA010
NOSTUFF
0
5%
1/16W
MF-LF
402
2
1
RA011
16V
20%
SM-2
220UF
ELEC
2
1
CA017
CERM
16V
20%
1206
1UF
2
1
CA002
1/16W
5%
47K
SM-LF
5678
4321
RPA000
5%
1/16W
MF-LF
4.7K
402
2
1
RA012
50R28
1
XCA000
0603
1000-OHM-200MA
21
LA005
5%
CERM
100PF
402
50V
2
1
CA015
402
CERM
50V
5%
100PF
2
1
CA016
1000-OHM-200MA
0603
21
LA006
1000-OHM-200MA
0603
21
LA007
1000-OHM-200MA
0603
21
LA008
0.1UF
603
20%
CERM
16V
2
1
CA019
603
20%
16V
CERM
0.1UF
2
1
CA018
100PF
CERM
50V
5%
402
2
1
CA020
CERM
50V
5%
402
100PF
2
1
CA021
NOSTUFF
402
100PF
5%
50V
CERM
2
1
CA022
SM
OMIT
21
XWA001
SM
OMIT
21
XWA000
10UF
10%
16V
CERM
1210
2
1
CA003
10UF
10%
16V
CERM
1210
2
1
CA023
CERM
1210
10%
10UF
16V
2
1
CA001
OMIT
SM
21
XWA002
OMIT
SM
21
XWA003
1000PF
CERM
25V
5%
603
2
1
CA010
603
1000PF
5%
25V
CERM
2
1
CA011
603
1000PF
5%
25V
CERM
2
1
CA012
CERM
25V
5%
1000PF
603
2
1
CA013
2N7002DW
SOT-363
1
2
6
QA000
SOT-363
2N7002DW
4
5
3
QA000
AUDIO: SPEAKER AMP
SYNC_DATE=02/16/2005
SYNC_MASTER=AUDIO
051-6772
11
102100
NET_SPACING_TYPE=AUDIO
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
AUDSAMPOUTRN
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
AUD_SPKR_OUTR_N
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=1MM
MIN_NECK_WIDTH=0.25MM
PP12V_AUDIO_SPKRAMP
VOLTAGE=12V
MIN_LINE_WIDTH=1MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=12V
PP12V_AUDIO_SPKRAMP_F
AUD_SAMP_FS1
AUD_SAMP_SHDN_L
MIN_NECK_WIDTH=0.1MM
MIN_LINE_WIDTH=0.1MM
PP3V3_AUDIO_SPKR_EMI
PP3V3_AUDIO
AUDSAMPINRP
AUDIO_SPKR_MUTE_L_INV
AUD_CODEC_OUT_L
AUD_SAMP_G1
AUD_SAMP_G2
AUD_SAMP_FS2
AUDIO_SPKR_MUTE_L
AUDSAMPINLP
AUD_SAMP_INL_N
MIN_NECK_WIDTH=0.15MM
MIN_LINE_WIDTH=0.2MM
AUD_MAX9714_VREG
AUD_SAMP_INR_P
AUD_SAMP_INL_P
AUD_SAMP_FS1
AUD_SAMP_FS2
AUD_SAMP_G2
AUD_SAMP_G1
AUDSAMPINRN
AUD_PCM_VCOM
PP3V3_AUDIO_SPKR
AUDSAMPINLN
DIFFERENTIAL_PAIR=AUD_SPKRAMP_PWR
NET_SPACING_TYPE=AUDIO
GND_AUDIO_SPKRAMP
MIN_LINE_WIDTH=1MM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.15MM
AUDSAMPCPN
MIN_NECK_WIDTH=0.15MM
MIN_LINE_WIDTH=0.2MM
AUDSAMPCSS
AUD_SAMP_INR_N
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
NET_SPACING_TYPE=AUDIO
AUD_SPKR_OUTL_N
NET_SPACING_TYPE=AUDIO
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
AUD_SPKR_OUTR_P
NET_SPACING_TYPE=AUDIO
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
AUD_SPKR_OUTL_P
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=12V
PP12V_AUD_SPKRAMP_PLANE
MIN_NECK_WIDTH=0.15MM
MIN_LINE_WIDTH=0.2MM
AUDSAMPCPP
AUDSAMPOUTLN
NET_SPACING_TYPE=AUDIO
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
AUD_MAX9714_CHOLD
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
AUDSAMPOUTLP
GND_AUDIO_SPKRAMP_PLANE
AUDIO_SPKR_MUTE_L_F
MIN_NECK_WIDTH=0.25MM
AUDSAMPOURTP
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=0.5MM
GND_AUDIO_SPKRAMP_PLANE
MIN_NECK_WIDTH=0.1MM
MIN_LINE_WIDTH=0.1MM
PP3V3_AUDIO_SPKR
GND_AUDIO_SPKRAMP_PLANE
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=1MM
PP3V3_AUDIO_SPKR
AUD_CODEC_OUT_R
PP12V_AUDIO_SPKRAMP_F2
VOLTAGE=12V
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=1MM
NET_SPACING_TYPE=AUDIO
GND_AUDIO_SPKRAMP_PLANE
102 101
95
98
102
102
102
102
98
102
101
7
100
7
95
100
100
100
25
100
100
100
100
95
100
7
101
101
101
100
100
100
100
100
95
100
Preliminary
Page 74
G
D
S
LED
VIN
VDD
GND
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
LINE IN JACK
APPLE P/N 514-0204
MMBZ15DLT1
AUDIO_LO_DET_L = HIGH: PLUG NOT INSERTED
LINE OUT PLUG DETECTS
AUDIO_LO_DET_L = LOW: PLUG INSERTED
AUDIO_LO_OPTICAL_PLUG_L = LOW: OPTICAL DIGITAL AUDIO PLUG INSERTED
AUDIO_LO_OPTICAL_PLUG_L = HIGH: ANALOG AUDIO PLUG INSERTED
MIC CABLE CONNECTOR
TO SHASTA GPIO
LINE OUT JACK
AUDIO_IN_DET0_L = LOW: PLUG INSERTED
TO SHASTA GPIO
TO SHASTA GPIO
LINE IN PLUG DETECT
PLACE NEAR
J9801
PLACE NEAR
J700
SPEAKER CABLE CONNECTOR
APPLE P/N 518-0138
APPLE P/N 518-0034
TO SHASTA GPIO
SPEAKER TYPE DETECT
AUDIO_IN_DET0_L = HIGH: PLUG NOT INSERTED
APPLE P/N 514-0203
5%
402
CERM
50V
100PF
2
1
CA103
5%
1/16W
MF-LF
402
100K
2
1
RA100
402
10V
20%
0.1UF
CERM
2
1
CA108
5%
402
1/16W
47K
MF-LF
21
RA102
MF-LF
47K
1/16W
5%
402
2
1
RA101
5%
47K
402
1/16W
MF-LF
21
RA105
MF-LF
1/16W
5%
47K
402
2
1
RA104
402
5%
50V
CERM
100PF
2
1
CA102
100K
5%
1/16W
MF-LF
402
2
1
RA103
MF-LF
1/16W
5%
47K
402
2
1
RA107
MF-LF
1/16W
5%
47K
402
21
RA108
402
MF-LF
1/16W
5%
100K
2
1
RA106
402
MF-LF
1/16W
5%
0
2
1
RA112
5%
MF-LF
402
1/16W
47K
2
1
RA113
HF28
M-ST-TH
3
2
1
JA102
0405
14V-15A
NOSTUFF
42
31
DZA100
100PF
402
50V
5%
CERM
2
1
CA101
402
10%
X7R
25V
1000PF
2
1
CA120
402
25V
1000PF
X7R
10%
2
1
CA121
1000PF
25V
X7R
10%
402
2
1
CA122
50V
CERM
5%
100PF
402
2
1
CA100
5%
402
50V
CERM
100PF
2
1
CA124
5%
402
50V
CERM
100PF
2
1
CA123
M-ST-TH
10-89-7082
8 7
5
4 3
2 1
JA101
1000-OHM-200MA
0603
21
LA132
2N7002
SOT23-LF
2
1
3
QA100
50R28
1
XCA100
50R28
1
XCA101
25V
CERM
1000PF
5%
603
NOSTUFF
2
1
CA104
25V
1000PF
NOSTUFF
CERM
5%
603
2
1
CA105
25V
CERM
5%
1000PF
603
NOSTUFF
2
1
CA106
1000PF
5%
25V
CERM
NOSTUFF
603
2
1
CA107
25V
5%
1000PF
603
CERM
2
1
CA126
603
25V
CERM
1000PF
5%
2
1
CA127
603
5%
25V
CERM
1000PF
2
1
CA119
CERM
5%
25V
603
1000PF
2
1
CA125
0603
180-OHM-1.5A
21
LA130
0603
180-OHM-1.5A
21
LA131
0603
180-OHM-1.5A
21
LA133
0603
180-OHM-1.5A
21
LA134
SM
FERR-EMI-100-OHM
21
LA100
FERR-EMI-100-OHM
SM
21
LA101
SM
FERR-EMI-100-OHM
21
LA102
SM
FERR-EMI-100-OHM
21
LA103
FERR-EMI-100-OHM
SM
21
LA104
SM
FERR-EMI-100-OHM
21
LA105
FERR-EMI-100-OHM
SM
21
LA106
SM
FERR-EMI-100-OHM
21
LA107
SM
FERR-EMI-100-OHM
21
LA108
FERR-EMI-100-OHM
SM
21
LA109
SM
FERR-EMI-100-OHM
21
LA110
SM
FERR-EMI-100-OHM
21
LA111
FERR-EMI-100-OHM
SM
21
LA112
SM
FERR-EMI-100-OHM
21
LA113
SM
FERR-EMI-100-OHM
21
LA114
FERR-EMI-100-OHM
SM
21
LA115
SM
FERR-EMI-100-OHM
21
LA116
SM
FERR-EMI-100-OHM
21
LA117
SM
FERR-EMI-100-OHM
21
LA118
FERR-EMI-100-OHM
SM
21
LA119
SM
FERR-EMI-100-OHM
21
LA120
SM
FERR-EMI-100-OHM
21
LA121
FERR-EMI-100-OHM
SM
21
LA122
FERR-EMI-100-OHM
SM
21
LA123
SM
FERR-EMI-100-OHM
21
LA124
SM
FERR-EMI-100-OHM
21
LA126
FERR-EMI-100-OHM
SM
21
LA125
SM
FERR-EMI-100-OHM
21
LA127
SM
FERR-EMI-100-OHM
21
LA128
SM
FERR-EMI-100-OHM
21
LA129
15V
SOT23
3
2
1
DZA101
JFJ8210
F-ST-TH
6
7
9
5
4
3
2
12
11
10
1
8
JA103
805
1UF
10V
CERM
10%
2
1
CA118
CERM
0.1UF
402
20%
10V
2
1
CA117
CERM
402
16V
10%
0.01UF
2
1
CA116
5%
402
50V
CERM
100PF
2
1
CA115
402
CERM
50V
5%
100PF
2
1
CA114
100PF
5%
50V
CERM
402
2
1
CA113
5%
50V
CERM
402
100PF
2
1
CA112
50V
5%
402
CERM
100PF
2
1
CA111
SOT-363
2N7002DW
4
5
3
QA101
2N7002DW
SOT-363
1
2
6
QA101
AJR23
F-ST-TH
4
3
2
1
8
7
6
5
JA100
402
MF-LF
1/16W
5%
100K
NOSTUFF
2
1
RA109
CERM
10V
20%
0.1UF
402
2
1
CA109
CERM
10V
20%
0.1UF
402
2
1
CA110
AUDIO: Q45 CONNECTORS
SYNC_DATE=02/16/2005
SYNC_MASTER=AUDIO
11
102101
051-6772
MIN_NECK_WIDTH=0.15MM
AUD_LI_GND_EMI
MIN_LINE_WIDTH=0.2MM
AUD_LI_GND_JACK
MIN_NECK_WIDTH=0.15MM
MIN_LINE_WIDTH=0.2MM
AUD_LO_GND_JACK
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.25MM
AUD_SPDIF_OUT_JACK
PP5V_AUDIO_SPDIF_EMI
MIN_NECK_WIDTH=0.2MM
MIN_LINE_WIDTH=0.25MM
AUD_SPDIF_OUT_EMI
AUD_LO_L_EMI
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
AUD_LI_L_JACK
MIN_NECK_WIDTH=0.15MM
MIN_LINE_WIDTH=0.2MM
AUD_LI_DET_JACK
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.15MM
GND_CHASSIS_AUDIO_EXTERNAL
MIN_LINE_WIDTH=0.2MM
AUD_LI_R_EMI
MIN_NECK_WIDTH=0.15MM
AUD_LI_L_EMI
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.15MM
AUD_LO_DET1
PP3V3_AUDIO
AUDIO_LO_OPTICAL_PLUG_L
PP3V3_AUDIO
GND_CHASSIS_AUDIO_INTERNAL
AUDIO_LI_DET_L
AUDLINDETH
AUD_LI_DET_H
AUDIO_LO_DET_L
AUD_LO_DET2
AUD_LO_DET2_1
PP3V3_AUDIO
AUD_SPDIF_GND
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
AUDIO_GPIO_12
PP3V3_AUDIO
AUD_LO_DET1_1
NET_SPACING_TYPE=AUDIO
AUD_SPKR_OUTR_P_CONN
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.3MM
NET_SPACING_TYPE=AUDIO
AUD_SPKR_OUTL_P_CONN
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.3MM
AUD_SPKR_OUTR_N_CONN
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.3MM
AUD_SPKR_OUTR_N
AUD_SPKR_OUTL_P
GND_CHASSIS_AUDIO_INTERNAL
AUDIO_GPIO_12_CONN
AUD_SPKR_OUTL_N_CONN
NET_SPACING_TYPE=AUDIO
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.3MM
AUD_SPKR_OUTL_N
AUD_SPKR_OUTR_P
AUD_LI_R_JACK
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.15MM
AUD_LI_L
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.15MM
AUD_LI_GND
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.15MM
AUD_LI_DET_H
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.15MM
AUD_LI_R
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.15MM
GND_AUDIO_MIC
AUD_MIC_IN_N
AUD_MIC_IN_P
AUD_MIC_IN_N_CONN
AUD_MIC_IN_N_EMI
AUD_MIC_IN_P_CONN
GND_AUDIO_MIC_EMI
GND_AUDIO_MIC_CONN
AUD_MIC_IN_P_EMI
GND_CHASSIS_AUDIO_INTERNAL
AUD_LO_DET1
AUD_SPDIF_OUT
PP5V_AUDIO
AUD_LO_GND
AUD_LO_DET2
AUD_LO_R
AUD_LO_L
AUD_LO_GND_PRB
AUD_LO_R_JACK
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
AUD_LO_L_JACK
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
AUD_LO_DET1_EMI
AUD_LO_DET1_JACK
PP5V_AUDIO_SPDIF_JACK
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
AUD_LO_DET2_JACK
AUD_LO_GND_EMI
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
AUD_LO_GND_PRB_EMI
AUD_LO_DET2_EMI
GND_CHASSIS_AUDIO_EXTERNAL
AUD_LI_GND_EMI
AUD_LO_R_EMI
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.2MM
GND_CHASSIS_AUDIO_EXTERNAL
AUD_LI_DET_EMI
MIN_LINE_WIDTH=0.2MM
MIN_NECK_WIDTH=0.15MM
102
102
102
102
101
101
101
101
102
100
100
100
100
102
102
101
95
95
101
25
95
95
101
101
101
101
101
7
101
7
25
7
7
25
101
6
101
7
25
7
100
100
7
100
100
96
96
101
96
102
102
102
6
6
7
101
95
7
98
101
98
98
98
7
101
7
Preliminary
Page 75
IN
OUT
SHDN*
GND
BP
OUT
VOUT
IN
ADJ/GND
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
NOT USED: C9906
PLACE ACROSS GROUND SPLIT
PLACE NEAR ENTRY TO SPEAKER
AT CODEC U9500
AMP GROUND PLANE
PLACE ACROSS GROUND SPLIT
AT RIGHT SIDE OF CA007
UNUSED GPIO TERMINATIONS
AUDIO GROUND RETURNS
PLACE AT J5903
MICROPHONE IMPEDANCE MATCHING CIRCUIT
4.5V POWER SUPPLY FOR CODEC AND LINE IN AMP
APPLE P/N 353S0733
FC=7HZ
APPLE P/N 353S0539
5V POWER SUPPLY FOR THE HEADPHONES/LINE OUT AMP
MAX8510-4.5V
CRITICAL
SC70-5
3
5
1
2
4
VRA201
0.1UF
16V
10%
603
X7R
21
CA213
0.1UF
X7R
603
10%
16V
21
CA214
1/16W
MF-LF
402
1%
1K
2
1
RA223
1%
100K
402
1/16W
MF-LF
2
1
RA222
402
MF-LF
1/16W
1%
1K
2
1
RA224
165
1%
1/16W
MF-LF
402
21
RA219
25V
402
X7R
10%
1000PF
2
1
CA212
1K
1/16W
MF-LF
402
1%
NOSTUFF
2
1
RA218
402
MF-LF
1/16W
1%
165
21
RA220
NOSTUFF
1K
1/16W
MF-LF
402
1%
2
1
RA221
805
10UF
20%
6.3V
CERM
NOSTUFF
2
1
CA210
10UF
20%
SM-1
16V
ELEC
2
1
CA211
NOSTUFF
0
5%
1/16W
MF-LF
402
21
RA225
1/16W
402
5%
MF-LF
0
21
RA226
402
MF-LF
1/16W
5%
0
21
RA227
I116
NOSTUFF
402
MF-LF
5%
1/16W
0
2
1
RA228
MF-LF
1/8W
5%
0
805
21
RA229
SOT223-4
LM1117MPX
CRITICAL
PP5V_AUDIO_ANALOG
4
2
3
1
VRA200
5%
FF
10
1W
AUD_12V_CODEC2
2512
21
RA200
FERR-250-OHM
SM-1
21
LA200
SM
20%
16V
ELEC
100UF
2
1
CA203
MF-LF
1/16W
1%
205
402
2
1
RA201
402
634
1%
1/16W
MF-LF
2
1
RA202
ELEC
20%
100UF
SM
16V
2
1
CA202
ELEC
16V
SM-1
20%
10UF
2
1
CA208
805
10%
10V
CERM
1UF
2
1
CA207
1/16W
402
100K
1%
MF-LF
2
1
RA203
16V
603
0.1UF
X7R
10%
2
1
CA205
SM
OMIT
21
XWA200
OMIT
SM
21
XWA201
OMIT
SM
21
XWA202
OMIT
SM
21
XWA203
50R28
1
XCA201
1206
16V
1UF
20%
CERM
2
1
CA200
SM-2
220UF
20%
16V
ELEC
2
1
CA201
ELEC
20%
220UF
SM-2
16V
2
1
CA209
402
5%
1/16W
MF-LF
47K
21
RA210
1/16W
MF-LF
5%
47K
402
21
RA213
402
47K
5%
1/16W
MF-LF
21
RA214
402
47K
5%
1/16W
MF-LF
21
RA215
402
47K
5%
1/16W
MF-LF
21
RA206
MF-LF
1/16W
5%
402
47K
21
RA207
MF-LF
1/16W
5%
47K
402
21
RA208
47K
MF-LF
5%
402
1/16W
21
RA209
1/10W
5%
603
0
MF-LF
21
RA205
402
47K
5%
1/16W
MF-LF
21
RA211
402
47K
5%
1/16W
MF-LF
21
RA212
I88
I89
402
100K
1%
1/16W
MF-LF
NOSTUFF
21
RA204
805
10UF
20%
6.3V
CERM
2
1
CA204
NOSTUFF
805
0
5%
1/8W
MF-LF
21
RA216
0.01UF
CERM
16V
10%
402
2
1
CA206
805
0
5%
1/8W
MF-LF
NOSTUFF
21
RA217
AUDIO: Q45 POWER SUPPLIES
SYNC_DATE=02/16/2005
SYNC_MASTER=AUDIO
051-6772
102 102
11
353S0655 353S0933
U9500
PCM3052
AUD_12V_CODEC
VOLTAGE=12V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.3MM
PP12V_AUDIO_CODEC
VOLTAGE=12V
DIFFERENTIAL_PAIR=AUD_CODEC_PWR
NET_SPACING_TYPE=AUDIO
MIN_NECK_WIDTH=0.3MM
MIN_LINE_WIDTH=1MM
GND_AUDIO_CODEC
MIN_NECK_WIDTH=0.3MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=12V
AUD_V5_REF
MIN_LINE_WIDTH=0.6MM
VOLTAGE=5V
MIN_NECK_WIDTH=0.25MM
PP3V3_AUDIO
GND_AUDIO_CODEC
AUD_4V5_SHDN*
NET_SPACING_TYPE=AUDIO
I2S0_BITCLK
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=4.5V
GND_AUDIO_CODEC
DIFFERENTIAL_PAIR=AUDIO_MIC_1
AUD_MIC_P1
NET_SPACING_TYPE=AUDIO
I2S2_DEV_TO_SB_DTI
AUDIO_EXT_MCLK_SEL
AUDIO_HP_MUTE_L
AUD_PCM_MBIAS
GND_AUDIO_CODEC
DIFFERENTIAL_PAIR=AUDIO_MIC_2
AUD_MICIN_N
NET_SPACING_TYPE=AUDIO
NET_SPACING_TYPE=AUDIO
AUD_MICIN_P
DIFFERENTIAL_PAIR=AUDIO_MIC_2
GND_AUDIO_MIC
DIFFERENTIAL_PAIR=AUDIO_MIC
NET_SPACING_TYPE=AUDIO
AUD_MIC_IN_N
AUD_MIC_IN_P
NET_SPACING_TYPE=AUDIO
DIFFERENTIAL_PAIR=AUDIO_MIC
AUD_MIC_M1
DIFFERENTIAL_PAIR=AUDIO_MIC_1
NET_SPACING_TYPE=AUDIO
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=4.5V
GND_AUD_LOAMP
MIN_NECK_WIDTH=0.3MM
MIN_LINE_WIDTH=1.0MM
GND_AUDIO
NET_SPACING_TYPE=AUDIO
DIFFERENTIAL_PAIR=AUD_CODEC_PWR
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
VOLTAGE=4.5V
GND_AUD_LOAMP_CHGPMP
MIN_NECK_WIDTH=0.15MM
MIN_LINE_WIDTH=0.25MM
VOLTAGE=4.5V
GND_AUDIO_MIC
AUDIO_LI_OPTICAL_PLUG_L
AUDIO_HP_DET_L
I2S2_BITCLK
AUDIO_GPIO_11
AUDIO_SPKR_DET_L
I2S2_SYNC
I2S2_SB_TO_DEV_DTO
TP_I2S2_SB_TO_DEV_DTO
I2S2_RESET_L
TP_I2S2_MCLK
I2S2_MCLK
I2S0_BITCLK_DELAYED
I2S0_BITCLK_8NS_DELAY
NET_SPACING_TYPE=AUDIO
ELECTRICAL_CONSTRAINT_SET=8NS
GND_AUDIO_CODEC
GND_AUDIO_SPKRAMP_PLANE
GND_AUDIO_SPKRAMP
GND_AUDIO_CODEC
GND_CHASSIS_AUDIO_EXTERNAL
I2S0_MCLK
AUD_CODEC_MCLK
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
PP3V3_AUDIO
AUD_4V5_FB
MIN_NECK_WIDTH=0.25MM
VOLTAGE=4.5V
MIN_LINE_WIDTH=0.6MM
PP4V5_AUDIO_ANALOG
PP5V_AUDIO_ANALOG
102
102
102
101
102
102
102
102
102
101
98
100
98
98
98
98
98
100
102
96
95
96
96
96
102
102
96
100
96
101
MAKE_BASE=TRUE
95
96
102
98
7
95
7
95
25
95
25
25
25
95
95
95
95
101
101
101
98
7
98
101
25
25
25
25
25
25
25
MAKE_BASE=TRUE
25
MAKE_BASE=TRUE
25
95
95
100
7
95
7
25
95
7
6
95 98
Preliminary
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