Apple A1107 Schematic
ANGLES
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
DATE
APPD
ENG
DATE
APPD
CK
ECN
ZONE
REV
DO NOT SCALE DRAWING
X.XXX
X.XX
XX
DIMENSIONS ARE IN MILLIMETERS
THIRD ANGLE PROJECTION
D
SIZE
APPLICABLE
NOTED AS
MATERIAL/FINISH
NONE
SCALE
DESIGNER
MFG APPD
DESIGN CK
RELEASE
QA APPD
ENG APPD
DRAFTER
METRIC
OF
SHT
DRAWING NUMBER
TITLE
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
Apple Computer Inc.
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
DESCRIPTION OF CHANGE
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
28
PAGE
10/15/2004
8
VIDEO CONNECTORS - INVERTER, DVI, S-VIDEO
CONTENTS
D3_COLD
SYSTEM BLOCK DIAGRAM
NO_SSCG
SSCG
ATI_MEMIO_LO
ATI_MEMIO_HI
NO_BBANG
BBANG
INTREPID_USB
NEC_USB
1_5V_MAXBUS
1_8V_MAXBUS
GPU_SWITCH
BOM OPTIONS
STUFF
NO STUFF
DUAL-CHANNEL LVDS
FAN CONTROLLER, MODEM, SOUND
CTO
CTO
43-44
SCHEM,SAPPHIRE,Q41B
VCORE_OFFSET
SERIAL_DEBUG
5V_HD_LOGIC
3V_HD_LOGIC
EXT_TMDS
INT_TMDS
NO_4XVCORE
INT_CLK
EXT_CLK
CPU CORE VOLTAGE POWER SUPPLY
3.3V / 5V SYSTEM POWER SUPPLIES
12.8V SYSTEM POWER SUPPLY / PMU POWER SUPPLY
BATTERY CHARGER AND CONNECTOR
PMU (POWER MANAGEMENT UNIT)
FIREWIRE A/B PHY
MARVELL GIGABIT ETHERNET PHY
USB 2.0
1.5V/ 1.8V / 2.5V SYSTEM POWER SUPPLIES
SIGNAL CONSTRAINTS (1 OF 3) - DIGITAL/CLK
SIGNAL CONSTRAINTS (2 OF 3) - DIGITAL/DIFF
SIGNAL CONSTRAINTS (3 OF 3) - POWER NETS
FUNCTIONAL TEST POINTS
REVISION HISTORY (1 OF 1)
SIGNAL NAMES
COMPONENT LOCATIONS
SIL1162 TMDS TRANSMITTER
M10 ANALOG, POWER, GND
M10 LVDS/TMDS/VGA/GPIO & GPU VCORE
M10 AGP & CLOCKS
CARDBUS CONTROLLER (PCI1510)
21
20
19
18
17
16
15
14
13
12
11
9
7
6
5
4
3
1
POWER BLOCK DIAGRAM
PCB NOTES AND HOLES
CPU PLL AND CONFIGURATION STRAPS
INTREPID MAXBUS AND BOOT STRAPS
DDR MEMORY MUXES
200PIN DDR MEMORY SODIMM CONNECTORS
INTREPID AGP 4X/PCI
INTREPID ENET/FW/UATA/EIDE INTERFACES
INTREPID GPIOS/SERIAL/USB INTERFACES/SSCG
INTREPID POWER RAILS
INTREPID DECOUPLING
23
24
25
26
27
29
30
31
32
33
34
35
36
37
38
39
40
41-42
D3_HOT
PAGE
22
LMU, LIGHT SENSOR, BOOTBANGER, SLEEP LED
SPIDEY - KBD,TPAD,HALL EFFECT,PWR BUTTON
INTERNAL CONNECTORS - DVD,
CARDSLOT, HARD DRIVE, LEFT USB/BLUETOOTH
GPU_SS
FIREWIRE A/B CONNECTORS, PORT POWER LIMITER
INTREPID MEMORY INTERFACE / BOOT ROM
10
MPC7450 DATA
MPC7450 MAXBUS INTERFACE
TITLE PAGE AND CONTENTS
CONTENTS
2
SERIAL DEBUG (JOLLY ROGER, PWR/NMI/RESET)
SCHEM,SAPPHIRE,Q41B
B
1 45
02
051-6694
328536
PRODUCTION RELEASED
05/19/04
?
1
PCBF,SAPPHIRE,Q41B
PCB1820-1688
SCH1
1
SCHEM,SAPPHIRE,Q41B
051-6694
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
1.5V/3.3V
AGP BUS
EIDE
CH. B
MEMORY
CH. D
MEMORY
CH. C
MEMORY
CH. A
MEMORY
64MB
Connector
Serial Debug
Connector
USB 2.0
J8
U43
J5
J21
J11
32BITS
LVDS
P.13
P.10
DDR MEMORY
U17
P.14
66MHZ
P.13
33MHZ
P.26
P.25
P.18-21
P.33
USB 2.0
NOT USED
NOT USED
(INTERNAL MEM)(INTERNAL MEM)
(INTERNAL MEM)(INTERNAL MEM)
SYSTEM BLOCK DIAGRAM
I2S
P.14
P.15
P.15
P.25
@ 400MHZ
2 DATA PAIRS
EDID (I2C)
S-VIDEO
COMPOSITE
TMDS
RGB
(DDC TOO)
U48/J2/J4
I2C
OPTICAL DRIVE
P.15
P.15
32BITS
BOOTROM
VIA/PMU
SCCA
PCI
4X AGP
ATI M11
AIRPOPT
Connector
Controller
CardBus
TI PCI1510
P.18
PCI BUS
32BITS
33MHZ
3.3V
CARDBUS
Connector
P.18
33MHZ
16/32 BITS
3.3V/5V
U26
J10
P.24
LMU
I2C
U36
SUTRO (PWR)
Connector
P.32
J19
Power Supply
& Charger
P.32-36
SMBUS
3.3V
P.32
Connector
Battery
J25
U39
PMU
P.31
SERIAL
5V
J15
TRACKPAD
Connector Connector
Keyboard
KB LED
LIGHT SENSOR
P.24
USB 2.0
CONTROLLER
P.27
U52
P.10
1M X 8
BOOT ROM
P.26
Circuit
Fan
P.26
Connector
TUBA (SOUND)
I2CI2S
I2C
P.26
LED
SLEEP
LMU
J14
NOT USED
10/100/1000
800 MB/S
P.14
FIREWIRE
UATA 100
P.14 P.14
EIDE
CARDSLOT
P.14
UIDE
P.25
Connector
ULTRA ATA/100
J13
1394 OHCI
3.3V
8BIT TX/RX
100MHZ
P.29
PHY
FireWire
U28
@ 200MHz
2 DATA PAIRS
P.30
Connector
FW - B
J22
J24
Connector
FW - A
P.30
4 DATA PAIRS
Connector
Ethernet
J18
U49
P.28
Ethernet
PHY
P.28
G/MII
3.3V
10/100/1000
8BIT TX
8BIT RX
125MHZ
ETHERNET
J3 (SHARE WITH BLUETOOTH)
LEFT USB
P.25
J12
RIGHT USB
BACKUP BATTERY
J3 (SHARE WITH LEFT USB)
BlueTooth
P.25
J9
Modem Board
Connector
P.26
INTRPEID
I2C
MAXBUS
1.8V
167MHZ
32BIT ADDRESS
64BIT DATA
APOLLO
CPU
(MPC7457)
P.5-6
PMU
Config
CPU PLL
P.7
U42
P.9
MAXBUS
P.15
USB PORT F
P.15
USB PORT E
P.15
USB PORT D
P.15
USB PORT C
P.15
USB PORT B
P.15
USB PORT A
P.14
U44
INTREPID
U11/U12/U13/U14
2:1 DDR MUXES
P.11
64BITS
167MHZ
2.5V
MEMORY BUS
DDR SDRAM DIMM 0
DDR SDRAM DIMM 1
SO-DIMM Connector
P.12
J20/J23
P.22
Connector
Inverter
P.22 P.22 P.22
Connector
DVI-I
Connector
S-VideoLCD Panel
Connector
J7
J17 J16
02
2
45
051-6694
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
AC
ADAPTER
IN
PG 31
+BATT
+3V_PMU
LDO
MAIN 3V/5V
DC/DC
(LTC3707)
RC AT 1M*0.1UF @ 24V
NO INRUSH PROTECTION
+24V_PBUS
NO INRUSH PROTECTION
+PBUS
PG 31
FEED-IN PATH
BATTERY VOLTAGE
3S 3P PRISMATIC CELLS
+BATT
PG 31
(MAX1772)
CHARGER
BATTERY
PG 32
& BOOST OUTPUT
CHARGER INPUT
BATTERY
BACKUP
AGP I/O
INTREPID CORE
DDR POWER
MAP31 DDR CORE
MAP31 DDR I/O
+2.5V_MAIN
+1.5V_MAIN
+PBUS
SEQUENCING
MAXBUS
SLEEP
DCDC_EN
EXT_VCC
RUN: RUNNING
SLEEP: D3HOT/D3COLD
SHUTDOWN: STOPPED
PG 20
(LTC1778)
DC/DC
+1.2V/+1.0V
GPU_VCORE
RUN: RUNNING
SLEEP: STOPPED
SHUTDOWN: STOPPED
VCC
SHDN
DC/DC
(MAX1717)
PG 34
CPU_VCORE
(+1.4V/+1.5V)
SHUT-DOWNRUN
SLEEPRUNSHUT-DOWN
+1_8V_MAIN
(D3COLD)
GPU_VCORE
(D3HOT)
GPU_VCORE
(AT LTC1778 RUN/SS)
1_5V_2_5V_OK
1_5V_2_5V_OK
(MAX1715 OUTPUT)
+1_5V_SLEEP
+1_5V_MAIN
+2_5V_SLEEP
+2_5V_MAIN
3V_5V_OK
+3V_SLEEP
+3V_MAIN
+5V_SLEEP
+5V_MAIN
DCDC_EN_L
DCDC_EN
SLEEP_L_LS5
SLEEP
+5V_MAIN
3V_5V_OK
HOLDS BOTH RUN/SS AT GND
WHEN IT’S CONNECTED TO GND
TURNS CONTROL TO RUN/SS
WHEN IT’S OPEN
+3.3V_MAIN
RUN/SS - 3V
INTERNAL ZENER CLAMP TO 6V
RUN: RUNNING
SLEEP: RUNNING
SHUTDOWN: STOPPED
VCC
RUN/SS - 5V
TURNS ON AT >1V
<100UA ALLOWED
INTERNAL ZENER CLAMP TO 6V
PG 33
STBYMD
+4_6V_BU
+3V_PMU
+5V_MAIN
PG 32
14V_PBUS
+24V_PBUS
PG 30
LIMITER
INRUSH
RUN: RUNNING
SLEEP: RUNNING
SHUTDOWN: RUNNING
1625 NOT RUNNING
NO AC: BATTERY VOLTAGE
AC: 12.8V
PG 32
(LTC1625)
REGULATOR
BUCK
RUN/SS
BACKUP BATTERY
WHEN ONLY BATTERY IS CONNECTED
STARTS 2.0MSEC AFTER DCDC_EN_L BECOMES LOW
+PBUS (12.8V)
PG 31
BECOMES ’1’; MUCH LESS THAN THE
AFTER PMU IS UP AND RUNNING
TURNS ON AS LOW AS 0.8V/TYP 1.5V
RC CHARGING AT INT_VCC (5V)
2.4V - ??? MS
DCDC_EN_L
D3_HOT
D3_HOT
RUN/SS
INTERNAL 1.2UA CURRENT SOURCE
1_5V_2_5V_OK WILL NOT PULL LOW UNTIL
+5V_MAIN TURNS ON
DCDC_EN_L OR PMU_POWERUP_L
+5V_MAIN
(UNTIL DRAINED)
-
24V IS OUTPUT ONLY FROM
VCC
+5V_MAIN
LOW IN SHUTDOWN
DCDC_EN_L WILL PULL ON1/ON2
DCDC_EN_L
TURNS ON AT >1V
<100UA ALLOWED
~13.5MS
2.6 MS
~11MS
~???MS
2.6 MS
1.9 MS
BACKUP BATTERY CIRCUIT CHARGES OFF +PBUS
AND PREVENTS +PBUS AND +24V_PBUS FROM DROPPING BELOW 6V
HOWEVER, 5V SHOULD TURN ON ~2.23MS AFTER
+
U21
1V20_REF
+PBUS
12.8V CHARGES BACKUP BATTERY
WHEN ONLY BATTERY IS CONNECTED
RUN: RUNNING
SLEEP: STOPPED
SHUTDOWN: STOPPED
PG 35
(LTC3411)
DC/DC
+1.8V_MAIN
MAXBUS
BROADCOM
STARTS ~4.25MSEC AFTER DCDC_EN_L BECOMES LOW
PGOOD
RC AT 1M*0.047UF @ 24V
BACKLIGHT
INVERTER
MAIN 2.5V/1.5V
DC/DC
(MAX1715)
PG 35
SHUTDOWN: STOPPED
SLEEP: RUNNING
RUN: RUNNING
TURNS ON OUTPUT @ 2.4V
ON1/ON2
PGOOD
1_5V_2_5V_OK
+5V_MAIN
+5V_MAIN
VCC
+PBUS (12.8V)
DCDC_EN
SLEEP
D3_COLD
GPU_VCORE
SEQUENCING
1M & 0.1UF @14V, IT TAKES
~5.88MS TO START SWITCHER
1_5V_2_5V_OK
VCC
<~13.44V SHUTS-OFF
>~13.44V TURNS-ON
POWER SYSTEM ARCHITECTURE
POWER BLOCK DIAGRAM
051-6694
453
02
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
GROUND VIAS
1
2
3
4
5
6
7
8
10
9
11
12
20R10 TH VIA OR VIA IN PAD
LAYER COUNT: 12
SIGNAL TRACE WIDTH: 4 MILS
SIGNAL TRACE SPACING: 4 MILS
PREPREG THICKNESS: 2-3 MILS
SEE PCB CAD FILES FOR MORE SPECIFIC INFO.
BOARD STACK-UP AND CONSTRUCTION
SIGNAL (1/3 OZ + COPPER PLATING)
GROUND (1/2 OZ)
SIGNAL (1/2 OZ)
SIGNAL (1/2 OZ)
GROUND (1/2 OZ)
CUT POWER PLANE(1 OZ)
CUT POWER PLANE(1 OZ)
GROUND (1/2 OZ)
SIGNAL (1/2 OZ)
SIGNAL (1/2 OZ)
GROUND (1/2 OZ)
SIGNAL (1/3 OZ + COPPER PLATING)
PREPREG (3MIL)
LAMINATE (4MIL)
PREPREG (3MIL)
LAMINATE (4MIL)
PREPREG (2MIL)
LAMINATE (3MIL)
PREPREG (2MIL)
LAMINATE (4MIL)
PREPREG (3MIL)
LAMINATE (4MIL)
PREPREG (3MIL)
BOARD INFORMATION
CONDUCTIVE MOUNTS
ASICS HEATSINK MOUNTS
I/O AREA
CHASSIS MOUNTS
BOARD HOLES
INVERTER
SPEAKER CLIPS
DIELECTRIC: FR-4
IMPEDANCE : 50 OHMS +/- 10%
1.0 OZ CU THICKNESS: 1.4 MILS
1/2 OZ CU THICKNESS: 0.7 MILS
THICKNESS : 1.2 MM / 0.047 IN
PCB SPECS
255R158
OMIT
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
OMIT
235R126
OMIT
146R126
OMIT
146R126
OG-503040
SHLD-SM
CHGND1
SPKR_CLIP_P84SPKR_CLIP_P84SPKR_CLIP_P84SPKR_CLIP_P84SPKR_CLIP_P84
STDOFF-217ODX150IDX35H-TH
SPKR_CLIP_P84
235R126
OMIT
235R126
OMIT
CHGND6
CHGND2
OMIT
255R158
CHGND5
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
255R158
OMIT
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
HOLE-VIA-20R10
02
051-6694
454
ZT11
1
ZT10
1
ZT2
1
ZT6
1
ZT16
1
ZT77
1
ZT30
1
ZT28
1
ZT37
1
ZT39
1
ZT40
1
ZT27
1
ZT36
1
ZT38
1
ZT24
1
ZT81
1
ZT34
1
ZT33
1
ZT43
1
ZT46
1
ZT50
1
ZT35
1
ZT44
1
ZT66
1
ZT67
1
ZT53
1
ZT52
1
ZT70
1
ZT71
1
ZT78
1
ZT69
1
ZT65
1
ZT45
1
ZT47
1
ZT49
1
ZT56
1
ZT48
1
ZT72
1
ZT55
1
ZT29
1
ZT82
1
ZT74
1
ZT79
1
ZT68
1
ZT60
1
ZT58
1
ZT41
1
ZT7
1
ZT9
1
ZT8
1
ZT1
1
ZT57
1
ZT80
1
ZT73
1
ZT75
1
ZT61
1
ZT63
1
ZT51
1
ZT54
1
ZT42
1
ZT64
1
ZT76
1
ZT59
1
ZT62
1
ZT22
1
ZT3
1
ZT25
1
ZT32
1
ZT31
1
ZT26
1
ZT23
1
ZT19
1
ZT15
1
ZT17
1
ZT13
1
ZT12
1
ZT21
1
ZT14
1
ZT18
1
ZT20
1
ZT4
1
ZT83
1
ZT5
1
SH1
1
2
3
SP6
1
SP1
1
SP3
1
SP5
1
SP2
1
BS1
1
SP4
1
QACK*
TEA*
A10
MCP*
A23
A28
A29
TRST*
PMON_OUT*
A7
SHD1*
HIT*
SHD0*
ARTRY*
AACK*
CI*
WT*
GBL*
TBST*
TS*
BG*
BR*
GND
VDD
A1
A2
A11
A5
A4
A3
A6
A8
A9
A12
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A32
A31
A30
A27
A24
A25
AP1
AP4
AP2
AP3
AP0
A35
A34
A33
TT0
TT4
TSIZ1
TSIZ2
TSIZ0
TT1
TT2
TT3
DTI3
DTI2
TDI
TDO
TMS
TCK
A26
BMODE0*
PMON_IN*
BMODE1*
DTI1
A0
DTI0
LSSD_MODE*
TA*
L2_TSTCLK
L1_TSTCLK
EXT_QUAL
CHKS*
DX*
SRW0*
IARTRY0*
SRW1*
(1 OF 3)
HRESET*
SRESET*
TBEN
QREQ*
CKSTP_IN*
CKSTP_OUT*
SYSCLK
INT*
SMI*
PLL_CFG1
CLK_OUT
OVDD
PLL_CFG0
PLL_CFG3
DRDY*
DBG*
PLL_CFG2
PLL_CFG4
BVSEL
AVDD
OVDDSENSE
PG
EN
VIN
ADJ
VOUT
GND
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
MPC7447 MAXBUS
MPC7447 PULL-UPS
470OHM FOR BOOT BANGER
CPU INTERNAL PLL FILTERING
470OHM FOR BOOT BANGER
470OHM FOR BOOT BANGER
TO UXX PIN 5 AND 6
PLACE RXXX AND RXXX CLOSE
VOUT = 0.59*(1+R1/R2)
CPU_OVDD DECOUPLING NETWORK
CPU_VCORE DECOUPLING NETWORK
IN FORMER L3 AREA
PLACE BELOW CPU
PLCAE SHORT CLOSE TO CENTER OF CPU
POWER SUPPLY PAGE (PG 33)
MORE 0805 10UF CAPS ON VCORE
R2
R1
NC
NC
NC
NC
NC
NC
NC
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
470
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
NO_BBANG
200
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
1K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
0.1uF
20%
10V
CERM
402
CERM
402
10V
20%
0.1uF
402
CERM
10V
20%
0.1uF
402
CERM
10V
20%
0.1uF
0.1uF
20%
10V
CERM
402402
CERM
10V
20%
0.1uF
402
CERM
10V
20%
0.1uF
402
CERM
10V
20%
0.1uF
0.1uF
20%
10V
CERM
402
0.1uF
20%
10V
CERM
402
0.1uF
20%
10V
CERM
402
402
CERM
10V
20%
0.1uF
0.1uF
20%
10V
CERM
402
0.1uF
20%
10V
CERM
402
402
CERM
10V
20%
0.1uF
0.1uF
10V
20%
CERM
402
0.1uF
20%
10V
CERM
402
402
CERM
10V
20%
0.1uF
1/16W
5%
MF
402
470
402
CERM
10V
20%
0.1uF
0.1uF
20%
10V
CERM
402
0.1uF
20%
10V
CERM
402
402
CERM
10V
20%
0.1uF
402
CERM
10V
20%
0.1uF
0.1uF
20%
10V
CERM
402
470
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
470
5%
1/16W
MF
402
10K
5%
1/16W
402
MF
1K
5%
1/16W
MF
402
10uF
20%
6.3V
CERM
805
10uF
20%
6.3V
CERM
805
805
CERM
6.3V
20%
10uF
805
CERM
6.3V
20%
10uF
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
NO STUFF
10
1%
1/16W
MF
402
805
CERM
10V
20%
2.2uF2.2uF
20%
10V
CERM
805
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
5%
1/16W
MF
603
1_5V_MAXBUS
0
1_8V_MAXBUS
5%
1/16W
MF
603
0
+1_5V_SLEEP
+1_8V_SLEEP
BBANG
402
MF
1/16W
5%
470
470
5%
1/16W
MF
402
402
CERM
10V
20%
0.1uF
0.1uF
20%
10V
CERM
402
0.1uF
20%
10V
CERM
402 402
CERM
10V
20%
0.1uF
0.1uF
20%
10V
CERM
402
0.1uF
20%
10V
CERM
402
0.1uF
20%
10V
CERM
402
402
CERM
10V
20%
0.1uF
0.1uF
20%
10V
CERM
402
0.1uF
20%
10V
CERM
402
10V
CERM
402
20%
0.1uF
0.1uF
20%
10V
CERM
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
402
CERM
10V
20%
0.1uF
402
CERM
10V
20%
0.1uF
0.1uF
20%
10V
CERM
402
0.1uF
20%
10V
CERM
402
0.1uF
20%
10V
CERM
402
20%
6.3V
CERM
10uF
805
0.1uF
20%
10V
402
CERM
402
CERM
10V
20%
0.1uF
0.1uF
20%
10V
402
CERM
402
CERM
10V
20%
0.1UF
0.1UF
20%
10V
CERM
402
402
CERM
10V
20%
0.1UF
0.1UF
20%
10V
CERM
402
402
CERM
10V
20%
0.1UF
0.1UF
10V
20%
CERM
402
0.1UF
20%
10V
402
CERM
402
CERM
10V
20%
0.1UF
10UF
20%
6.3V
CERM
805 805
CERM
6.3V
20%
10UF 10UF
20%
6.3V
CERM
805 805
CERM
6.3V
20%
10UF
805
CERM
6.3V
20%
10UF 10UF
20%
6.3V
CERM
805 805
CERM
6.3V
20%
10UF 10UF
20%
6.3V
CERM
805
OMIT
SM
CRITICAL
OMIT
1.50GHZ-1.28V
APOLL7_PM-R1.1
BGA
CRITICAL
SOT23-6
FAN2558
2.2UF
20%
6.3V
CERM1
603
10%
6.3V
CERM
402
1UF
10
1%
1/16W
MF
402
47K
5%
1/16W
MF
402
5%
1/10W
MF
603
0
1%
1/16W
MF
402
63.4K
1%
1/16W
MF
402
52.3K
+3V_SLEEP
CERM
402
10V
20%
0.1uF
20%
4.7UF
6.3V
CERM
805
1
337S2955
U43
CRITICAL
?
IC,A7PM,R1.2,1.67GHZ,1.24V
02
45
5
051-6654
CPU_VCORE_SLEEP
MAXBUS_SLEEP
CPU_TBEN
JTAG_CPU_TRST_L
MAXBUS_SLEEP
CPU_AVDD_ADJVCORE_SHDN_L
CPU_AVDD_VIN
CPU_AVDD_PG
CPU_SRWX_L
CPU_PULLUP
CPU_BUS_VSEL
CPU_QREQ_L
CPU_SMI_L
MPIC_CPU_INT_L
CPU_AVDD
CPU_TEA_L
CPU_PULLDOWN
CPU_PULLUP
CPU_L1TSTCLK
CPU_L2TSTCLK
JTAG_CPU_TRST_L
CPU_LSSD_MODE
CPU_CLKOUT_SPN
CPU_EMODE1_L
CPU_PULLDOWN
SYSCLK_CPU
CPU_TA_L
CPU_QACK_L
CPU_ADDR<7>
CPU_AACK_L
CPU_CI_L
CPU_GBL_L
CPU_WT_L
CPU_TSIZ<1>
CPU_TSIZ<2>
CPU_TSIZ<0>
CPU_TT<4>
CPU_TBST_L
CPU_TT<2>
CPU_TT<3>
CPU_TT<1>
CPU_TT<0>
CPU_ADDR<30>
CPU_ADDR<31>
CPU_ADDR<29>
CPU_ADDR<28>
CPU_ADDR<27>
CPU_ADDR<26>
CPU_ADDR<25>
CPU_ADDR<23>
CPU_ADDR<24>
CPU_ADDR<22>
CPU_ADDR<20>
CPU_ADDR<19>
CPU_ADDR<17>
CPU_ADDR<15>
CPU_ADDR<13>
CPU_ADDR<14>
CPU_ADDR<12>
CPU_ADDR<10>
CPU_ADDR<11>
CPU_ADDR<8>
CPU_ADDR<9>
CPU_ADDR<5>
CPU_ADDR<6>
CPU_ADDR<4>
CPU_ADDR<3>
CPU_TS_L
CPU_BG_L
CPU_BR_L
CPU_SHD1_L
CPU_HIT_L
CPU_SHD0_L
CPU_ARTRY_L
JTAG_CPU_TCK
JTAG_CPU_TDO_TP
CPU_EMODE0_L
CPU_PMONIN_L
CPU_ADDR<21>
CPU_ADDR<16>
CPU_PULLDOWN
CPU_CHKS_L
CPU_ADDR<0>
CPU_ADDR<2>
CPU_PLL_CFG<2>
CPU_ADDR<18>
CPU_CHKSTP_OUT_L
JTAG_CPU_TMS
JTAG_CPU_TDI
CPU_DTI<2>
CPU_DTI<1>
CPU_DTI<0>
CPU_EDTI
CPU_DRDY_L
CPU_PLL_CFG<3>
CPU_DBG_L
CPU_PLL_CFG<1>
CPU_PLL_CFG<4>
CPU_ADDR<1>
CPU_VCORE_SLEEP
ADT7460_VCORE_MON
JTAG_CPU_TCK
CPU_L1TSTCLK
MPIC_CPU_INT_L
JTAG_CPU_TDI
JTAG_CPU_TMS
CPU_SMI_L
CPU_HRESET_L
CPU_SRWX_L
CPU_L2TSTCLK
CPU_PULLDOWN
CPU_EDTI
CPU_PULLUP
CPU_PMONIN_L
CPU_CHKSTP_OUT_L
CPU_LSSD_MODE
CPU_SHD0_L
CPU_TBEN
CPU_SHD1_L
CPU_CHKS_L
MAXBUS_SLEEP
CPU_EMODE1_L
CPU_MCP_L
CPU_SRESET_L
CPU_HRESET_L
CPU_SRESET_L
CPU_MCP_L
CPU_AVDD_VOUT
CPU_PLL_CFG<0>
C137
1
2
C136
1
2
R87
1 2
R139
1 2
R107
1 2
R59
1 2
R97
1 2
R85
1
2
R160
1 2
R57
1 2
R58
1 2
R129
1 2
C39
1
2
C203
1
2
C73
1
2
C74
1
2
C194
1
2
C40
1
2
C191
1
2
C152
1
2
C138
1
2
C113
1
2
C104
1
2
C115
1
2
C38
1
2
C224
1
2
C48
1
2
C90
1
2
C72
1
2
C107
1
2
R206
1
2
C114
1
2
C154
1
2
C91
1
2
C168
1
2
C223
1
2
C112
1
2
R241
1
2
R60
1 2
R61
1 2
R148
1 2
R98
1 2
C25
C346
1
2
C342
C8
1
2
R120
1 2
R109
1 2
R106
1 2
C340
1
2
C12
1
2
R73
1 2
R72
1 2
R702
1 2
R693
1 2
R86
1
2
R128
1 2
C103
1
2
C149
1
2
C151
1
2
C202
1
2
C111
1
2
C110
1
2
C275
1
2
C257
1
2
C273
1
2
C41
1
2
C272
1
2
C46
1
2
R65
1 2
R130
1 2
R79
1 2
R108
1 2
C190
1
2
C150
1
2
C201
1
2
C193
1
2
C153
1
2
C344
1
2
C189
1
2
C105
1
2
C192
1
2
C47
1
2
C188
1
2
C169
1
2
C170
1
2
C155
1
2
C139
1
2
C92
1
2
C106
1
2
C195
1
2
C347
1
2
C258
1
2
C345
1
2
C156
1
2
C341
1
2
C225
1
2
C343
1
2
XW31
1 2
U43
E11
H1
D12
L3
G4
T2
F4
V1
J4
R2
K5
W2
C11
J2
K4
N4
J3
M5
P5
N3
T1
V2
U1
G3
N5
W1
B12
C4
G10
B11
F10
L2
D11
D1
C10
G2
R1
C1
E3
H6
F5
G7
N2
A8
M1
G9
F8
D2 B7
A12
J1
A3
B1
H2
M2
R3
G1
K1
P1
N1
D10
A11
E2
B5
H9
H11
H13
J6
J8
J10
J12
K7K3K9
C3
K11
K13
L6
L8
L10
L12
M4M7M9
M11D6M13
N7P3P9
P12R5R14
R17T7T10
D13
U3
U13
U17
V5
V8
V11
V15
E17F3G17
H4
H7
B2
D8
B6
D4
G8
B3
E8
C9
B4
M3N6P2P8P11R4R13
R16T6T9C2U2
U12
U16V4V7
V10
V14
C12D5F2H3J5K2L5
E18
G18
B8
C8
C7
D7
A7
D9
A9
G5
P4
E4
H5
F9
A2
B10
E10
A10
K6
E1
F11
C6
B9
A4
L1
F1
A5
L4
G6
F7
E7
E5
E6
F6
E9
C5
H8
K12
K14L7L9
L11
L13M8M10
M12
H10
H12J7J9
J11
J13K8K10
D3
U6
53
2
4
1 6
C283
1
2
C909
1
2
R280
1 2
R275
1
2
R276
1
2
R282
1
2
R283
1
2
39 35 16 15
8 7 6 5
8 5
40 23
6 5
39 35 16 15
8 7 6 5
35
5
5
7
37
8
31
5
14
5
39
37
8
5
5
5
5
40 23
6 5
5
5
5
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
5
37
8
5
37
8
40
6 5
40
7
5
37
8
37
8
5
5
37
8
37
8
7
37
8
40
5
40 23
6 5
40 23
6 5
37
8
37
8
37
8
5
37
8
7
37
8
7
7
37
8
40 39 35
6 5
26
40
6 5
5
14
5
40 23
6 5
40 23
6 5
31
5
40
7 6 5
5
5
5
5
5
5
40
5
5
5
8 5
5
5
39 35 16 15
8 7 6 5
5
5
40
5
40
7 6 5
40
5
5
7
D22
D3
D2
D1
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D28
D27
D23
D24
D25
D26
D29
D32
D31
D30
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D48
D47
D45
D46
D49
D51
D50
D52
D53
D54
D55
D58
D57
D56
D59
DP6
DP5
DP4
DP3
DP2
DP1
DP0
DP7
D63
D62
D61
D60
D0
(2 OF 3)
VDD
N/C_1
N/C_4
N/C_8
N/C_13
N/C_17
N/C_20
N/C_22
N/C_23
N/C_31
N/C_39
N/C_30
N/C_33
N/C_35
N/C_36
N/C_38
N/C_29
N/C_28
N/C_27
N/C_25
N/C_24
N/C_21
N/C_19
N/C_18
N/C_16
N/C_15
N/C_14
N/C_12
N/C_11
N/C_10
N/C_9
N/C_7
N/C_6
N/C_5
N/C_3
N/C_2
(3 OF 3)
N/C_26
N/C_32
N/C_34
N/C_37
SENSEVDD
GND
TEMP_CATHODE
TEMP_ANODE
SENSEGND
HPR*
Y
B
A
Y
B
A
SYM_VER2
WC*
VCC
VSS
SDA
SCL
NC1
NC2
NC3
VCC
RESET*
XTAL1
XTAL2
PB0
PD6
PD5
PD4
PD3
PD2
PD1
PD0
GND
PB1
PB2
PB3
PB4
PB5
PB6
PB7
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
3/ BBANG_JTAG_TCK (REGULAR OUTPUT)
1/ BBANG_HRESET_L (OPEN COLLECTOR OUTPUT - 10K PULLUP ON MLB)
4/ JTAG_CPU_TMS (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)
6/ JTAG_CPU_TRST_L (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)
5/ JTAG_CPU_TDI (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)
2/ PMU_HRESET_L (3V INPUT INTO LMU)
BOOT BANGING SIGNAL DEFINITION
INPUTS ARE 3V TOLERANT
INPUTS ARE 3V TOLERANT
BOOT BANGER
UNSTUFFING RA AND STUFFING RB
NC
BOOT BANGER E2PROM
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
MPC7447/BBANG
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
WILL DISABLE THE CONTROLLER
7
4
8
5
6
3
2
1
U32
2
1
R39
2
1
R40
21
R6
2
1
R62
4
5
3
2
1
U2
4
5
3
2
1
U4
2
1
R533
2
1
R532
2
1
C638
21
R884
21
R882
21
R886
21
R885
2
1
C938
9
8
7
6
4
3
2
1
10
5
RP6
4
5
20
1
11
9
8
7
6
3
2
19
18
17
16
15
14
13
12
10
U61
P18
P16
N17
N15
M18
M16
M14
H19
H17
H14
G16
G11
F19
F17
F12
E16
E13
C13
B19
B17
A18
A16
A13
N19
N18
G13
N12
G12
N13
B15
A15
G14
F14
E14
D14
L19
K19
J19
L18
K18
J18
L17
K17
J17
L16
C14
K16
J16
H16
D19
C19
D18
C18
D17
C17
D16
B14
C16
L15
K15
J15
H15
G15
F15
E15
D15
C15
A14
A6
P19
P15
N16
N14
M19
M17
M15
L14
J14
H18
G19
F18
F16
F13
E19
E12
B18
B16
B13
A19
A17
U43
W6
N8
V3
M6
W9
T4
W4
T3
W13
V13
P14
T8
W8
R8
P6
U15
R7
U7
U8
U4
V17
W3
T17
T18
T16
W18
T15
W17
U18
W19
U19
T19
V19
R18
V18
R19
P17
W16
V6
P7
R6
W7
U5
T5
U6
W5
V9
U9
V16
W10
R9
U10
P10
N9
R10
T11
W11
U11
R11
T14
N10
N11
V12
W12
T12
R12
W14
U14
P13
T13
W15
R15
U43
CPU_DATA<40>
CPU_DATA<17>
CPU_DATA<12>
CPU_DATA<7>
CPU_DATA<6>
CPU_DATA<5>
CPU_DATA<62>
CPU_DATA<36>
CPU_DATA<33>
CPU_DATA<14>
CPU_DATA<13>
CPU_DATA<11>
CPU_DATA<10>
CPU_DATA<9>
CPU_DATA<1>
CPU_DATA<2>
CPU_DATA<3>
CPU_DATA<4>
CPU_DATA<8>
CPU_DATA<58>
CPU_DATA<57>
CPU_DATA<56>
CPU_DATA<55>
CPU_DATA<54>
CPU_DATA<63>
CPU_DATA<0>
CPU_DATA<61>
CPU_DATA<60>
CPU_DATA<59>
CPU_DATA<53>
CPU_DATA<52>
CPU_DATA<51>
CPU_DATA<50>
CPU_DATA<49>
CPU_DATA<48>
CPU_DATA<47>
CPU_DATA<46>
CPU_DATA<45>
CPU_DATA<44>
CPU_DATA<43>
CPU_DATA<42>
CPU_DATA<41>
CPU_DATA<39>
CPU_DATA<38>
CPU_DATA<37>
CPU_DATA<35>
CPU_DATA<34>
CPU_DATA<32>
CPU_DATA<31>
CPU_DATA<30>
CPU_DATA<29>
CPU_DATA<28>
CPU_DATA<27>
CPU_DATA<26>
CPU_DATA<25>
CPU_DATA<24>
CPU_DATA<23>
CPU_DATA<22>
CPU_DATA<21>
CPU_DATA<20>
CPU_DATA<19>
CPU_DATA<18>
CPU_DATA<16>
CPU_DATA<15>
CPU_VCORE_SLEEP
02
051-6654
6
45
BGA
APOLL7_PM-R1.1
1.50GHZ-1.28V
009-6240 FW GT4 BBANGER MCU,PROGRAMMED W/ BANGER
BBANG
341S1135
1 U54
+3V_MAIN
+3V_MAIN
1/32W
10K
SM
25V
5%
BBANG
CERM
10V
20%
0.1UF
402
BBANG
402
CERM
10V
0.1UF
AT90S1200A
OMIT
SSOP
BBANG
10K
1/10W
1%
MF
603
NO STUFF
10K
1%
1/10W
603
MF
BBANG
603
10K
1%
1/10W
BBANG
10K
1%
1/10W
MF
603
+3V_MAIN
EEPROM_ADDR
BB_SCK
BB_MISO
BB_MOSI
BBANG_JTAG_TCK
ESP_EN_L
ICT_TRST_L
BB_SCK
BB_MISO
BB_MOSI
INT_I2C_DATA0
BBANG_HRESET_L
PMU_CPU_HRESET_L
JTAG_CPU_TDI
JTAG_CPU_TMS
BBANG_JTAG_TCK
ICT_TRST_L
ESP_EN_L
BFR_TDO
BB_XTAL1_SPN
BBANG
SC70-5
SN74AUC1G08
402
MF
5%
NO_BBANG
1/16W
0
402
MF
1/16W
5%
BBANG
10K
+3V_SLEEP
BBANG
1/16W
402
MF
10K
5%
MAXBUS_SLEEP
CPU_HRESET_L
BBANG_HRESET_L
PMU_CPU_HRESET_L
BBANG
SN74AUC1G08
SC70-5
BBANG
10K
402
MF
1/16W
5%
MAXBUS_SLEEP
BBANG_TCK_EN
BBANG_JTAG_TCK
JTAG_CPU_TCK
BBANG
1/16W
5%
MF
BBANG
402
10K
SOI
BBANG
32KX8_M24256B
10K
5%
1/16W
MF
402
BBANG
EEPROM_WP_PD
INT_I2C_CLK0
INT_I2C_DATA0
CPU_THERM_DP
CPU_THERM_DM
1.50GHZ-1.28V
BGA
APOLL7_PM-R1.1
BB_RESET_L
RESET_VREF
MF
INT_I2C_CLK0
EEPROM_ADDR
JTAG_CPU_TRST_L
BFR_TDO
20%
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
37
8
40 39 35
5
6
6
6
6
23
6
6
6
6
6
6
6
40 23 13 11
6
40 23
6
31 23
6
40 23
5
40 23
5
40 23
5
23
6
6
6
6
39 35 16 15
8 7 6 5
40
7 5
40 23
6
31 23
6
39 35 16 15
8 7 6 5
23
6
40
5
23 13 11
6
40
23
13
11
6
26
26
40 23 13 11
6
6
40
G
D
S
G
D
S
04
G
D
S
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
NEED TO CHARACTERIZE
INVERTER TO INVERT HRESET_L
DESKTOP HAD PROBLEM USING
INVERTED HRESET_L
MAXBUS VSEL
1.5V INTERFACE
1.8V INTERFACE
CPU CONFIGURATION
BUSTYPE SELECT
APOLLO ONLY SUPPORTS MAXBUS
CPU CONFIGURATION
(Bus-to-Core)
MULTIPLIER
133MHZ167MHZ
(AT BUS FREQUENCY)
CORE FREQUENCY
CPU_PLL_CFG
4 0123
E ABCD HEX
APOLLO 7
CPU FREQUENCY CONFIGURATION
R00E
R10E, R01E, OR PULLUP STUFFED
STUFF PASS TRANSISTOR ONLY IF
CPU PLL CONFIG CIRCUITRY
PLL DISABLE 1 X
HIGH SPEED 0 1
LOW SPEED 0 0
R10ER01E
R10DR00DR01DR10CR00CR01CR10BR00BR01BR10AR00AR01A
+5V_SLEEP NOW REQUIRED FOR PLL_STOP_L
267
400500
333
PLL BYPASS
PLL OFF0.0X
1.0X
2.0X
3.0X
4.0X
5.0X
5.5X
6.0X
6.5X
7.0X
7.5X
8.0X
8.5X
9.0X
9.5X
10.0X
10.5X 1750
1667
1583
1500
1417
1333
1250
1167
1083
1000
917
833
667 533
667
733
800
867
933
1000
1067
1133
1200
1267
1333
1400
1467183311.0X
11.5X
12.0X
12.5X
13.0X
13.5X
14.0X
15.0X
16.0X
17.0X
18.0X
20.0X
21.0X
24.0X
28.0X 4667
4000
3500
3333
3000
2833
2667
2500
2333
2250
2167
2083
2000
1917 1533
1600
1667
1733
1800
1867
2000
2133
2267
2400
2667
2800
3200
3733 1 1110 1E
1 0110 16
1 0100 14
1 0011 13
1 0010 12
1 0000 10
1 1101 1D
1 0001 11
1 1100 1C
0 1110 0E
1 0101 15
1 1111 1F
1 1011 1B
0 0000 00
1 1001 19
1 1000 18
1 1010 1A
0 0111 07
1 0111 17
0 0110 06
0 1100 0C
0 0001 01
0 0010 02
0 0101 05
0 1101 0D
0 1001 09
0 1011 0B
0 1010 0A
0 1000 08
0 0100 04
0 0011 03
0 1111 0F
HIGH
CPU_HRESET_L
CPU_HRESET_L
LOW
CPU_HRESET_INV 1.5V INTERFACE
1.8V INTERFACE
2.5V INTERFACE
MAX BUS MODE
60X BUS MODE
APPLICATION
TIED
SIGNAL
(PROCESSOR)
CPU_BUS_VSEL
(PROCESSOR)
CPU_EMODE0_L
STATE ENCODING CPU_PLL_STOP_OC CPU_VCORE_HI_OC
TRANSISTOR ON CPU_PLL_CFG<4> IS MET.
PULLUP TO ENSURE THAT Vgs OF PASS
(MHZ)
402
MF
1/16W
5%
0
NO STUFF
0
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
47K
5%
402
1/16W
MF
10K
5%
1/16W
MF
402
82K
5%
1/16W
MF
402
NO STUFF
0
5%
1/16W
MF
402
NO STUFF
0
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
2N7002DW
SOT-363
SOT-363
2N7002DW
SC70-5
1_5V_MAXBUS
CRITICAL
SN74AUC1G04
402
MF
1/16W
5%
0
NO STUFF
2N7002DW
SOT-363
2N7002DW
SOT-363
+5V_SLEEP
1_5V_MAXBUS
22
5%
1/16W
MF
402
402
MF
1/16W
5%
22
1_8V_MAXBUS
10
5%
1/16W
MF
402
2N7002
SM
2N3904
SM
249K
1%
1/16W
MF
402
NO STUFF
0
5%
1/16W
MF
402
+3V_SLEEP
NO STUFF
402
MF
1/16W
5%
0
NO STUFF
0
1/16W
5%
MF
402
NO STUFF
0
5%
1/16W
MF
402
NO STUFF
0
5%
1/16W
MF
402
NO STUFF
0
5%
1/16W
MF
402 402
MF
1/16W
5%
0
NO STUFF
NO STUFF
0
5%
1/16W
MF
402
NO STUFF
0
1/16W
5%
MF
402 402
MF
1/16W
5%
0
02
051-6694
457
CPU_PLL_CFG<0>
CPU_PLL_FS10
MAXBUS_SLEEP
CPU_PLL_CFG<4>
PLL_STOP_L
CPU_VCORE_HI_OC
CPU_PLL_STOP_BASE
CPU_PLL_STOP_OC
CPU_PLL_STOP_OC
CPU_BUS_VSEL
MAXBUS_SLEEP
CPU_HRESET_INV
CPU_HRESET_L
CPU_HRESET_L CPU_EMODE0_L
PLL_STOP_L
CPU_PLL_FS00
CPU_PLL_CFGEXT
CPU_PLL_FS01
CPU_PLL_CFG<3>
CPU_PLL_CFG<2>
CPU_PLL_CFG<1>
R149
21
R5
1
2
Q3
3
1
2
Q4
1
3
2
R47
1 2
R19
1
2
R20
1
2
R21
1
2
R22
1
2
R24
1
2
R25
1
2
R26
1
2
R14
1
2
R13
1
2
R15
1
2
R23
1
2
R16
1
2
R9
1
2
R10
1
2
R11
1
2
R12
1
2
R3
1
2
R48
1
2
R33
1
2
R18
1
2
R17
1
2
R2
1
2
Q2
3
5
4
Q2
6
2
1
U1
2
3
5
4
R27
1
2
Q1
6
2
1
Q1
3
5
4
R4
21
5
39 35 16 15
8 7 6 5
5
7
35 31
31
7
31
7
5
39 35 16 15
8 7 6 5
40
7 6 5
40
7 6 5 5
7
5
5
5
(PLL6)
VSSA_7
(PLL6)
VDD15A_7
D_42
D_41
D_40
D_39
D_38
D_44
D_43
D_45
D_46
D_47
D_48
D_52
D_51
D_50
D_49
D_53
D_55
D_54
D_56
D_57
D_58
D_60
D_59
D_62
D_61
D_63
DBG
DRDY
DTI_0
TEA
TA
DTI_2
DTI_1
D_1
D_0
D_2
D_6
D_5
D_4
D_3
D_7
D_11
D_10
D_9
D_8
D_12
D_14
D_13
D_15
D_16
D_17
D_22
D_21
D_20
D_19
D_18
D_23
D_24
D_25
D_26
D_27
D_32
D_31
D_30
D_29
D_28
D_34
D_33
D_35
D_36
D_37
BR
(1 OF 9)
MAXBUS
INTERFACE
TS
BG
A_0
A_1
A_2
A_3
A_4
A_5
A_9
A_6
A_7
A_8
A_10
A_14
A_13
A_12
A_11
A_20
A_16
A_17
A_18
A_19
A_15
A_27
A_22
A_21
A_30
A_29
A_28
A_26
A_25
A_24
A_23
TT_2
TT_1
TT_0
A_31
TBST
TSIZ_0
TSIZ_1
TSIZ_2
CI
GBL
TT_4
AACK
QREQ
ARTRY
TT_3
WT
HIT
ANALYZER_CLK
SUSPENDACK
SUSPENDREQ
QACK
STOPCPUCLK
CPU_FB_OUT
CPU_FB_IN
CPU_CLK
TBEN
ACS_REF
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
INTREPID OUTPUTS HIGH BY DEFAULT
Intrepid MaxBus
0: Max Bus (G4)
Processor Bus Mode
1: 60x bus (G3)
FireWire PHY interface
0: Legacy interface
1: B-mode interface
PCI1_REQ0_L / PCI1_GNT0_L
0: REQ/GNT
1: GPIOs
PCI1_REQ2_L / PCI1_GNT2_L
0: REQ/GNT
1: GPIOs
1: GPIOs
PCI1_REQ1_L / PCI1_GNT1_L
0: REQ/GNT
Spare
Spare
Spare
BIT 56 TO 63
INTREPID BOOT STRAPS
MAXBUS PULL-UPS
IT CANNOT BE CHANGED BY SOFTWARE
IF A STRAP IS NOT LISTED, THEN
6/ D33 - ANALYZERCLK_EN_H - IMMEDIATE EFFECT
5/ D42 - PLL4MODESEL_NXT<2> - SLEEP/WAKE CYCLE REQUIRED
4/ D43 - PLL4MODESEL_NXT<1> - SLEEP/WAKE CYCLE REQUIRED
3/ D44 - PLL4MODESEL_NXT<0> - SLEEP/WAKE CYCLE REQUIRED
2/ D46 - SELPCI1SPREADCLK - SLEEP/WAKE CYCLE REQUIRED
1/ D47 - SELAGPSPREADCLK - SLEEP/WAKE CYCLE REQUIRED
CHANGED BY SOFTWARE:
THE FOLLOWING STRAP BITS CAN BE
INPUT
NO BUS KEEPER
NO BUS KEEPER
NO BUS KEEPER - PU
NO BUS KEEPER - PU
INPUT - PU
INPUT - PD
NO BUS KEEPER - ?
Vin = Intrepid Vcore (1.5V)
Vout = MaxBus rail (1.8V)
NO BUS KEEPER - PU
INPUT - PU
NO BUS KEEPER - PU
NO BUS KEEPER - ?
NO BUS KEEPER - ?
NO BUS KEEPER - ?
NO BUS KEEPER - PU
FB BUFFER HAS 50 OHM OUTPUT IMPEDANCE
NO BUS KEEPER - PU
SHORT = 1" SHORTER THAN MATCHED LENGTH
BUF_REF_CLK_OUTEnable_h
1: Active
0: Inactive
1: External source
0: PLL5
SelPLL4ExtSrc
Spare
1: TI PHY workaround
0: Normal 1394b
TI 1394b workaround
000: 200 ohm
100: 200 ohm
010: 100 ohm
110: 66.6 ohm
001: 50 ohm
101: 40 ohm
011: 33.3 ohm
111: 28.6 ohm
MaxBus output impedance
BIT2 BIT1 BIT0
Spare
BIT 48 TO 55
MODE C (2.0X) IS FOR CLOCK SLEW OPERATION
MODE A (2.5X) IS FOR STATIC OPERATION
PCI0 Source Clock
1: PLL4
0: PLL5 (NO SPREAD)
PCI1 Source Clock
1: PLL4
0: PLL5 (NO SPREAD)
InternalSpreadEn
0: Inactive
1: Active
Spare
Spare
100: 83.20MHZ
011: 99.84MHZ (1.5X)
010: 133.12MHZ (2.0X)
001: 149.76MHZ
000: 166.4MHZ (2.5X)
PLL4MODESEL_NXT[2:0]
BIT0BIT2 BIT1
BIT 40 TO 47
Spare
Spare
Spare
Spare
ExtPLL_SDwn_Pol
0: Active high
1: Active low
DDR_TPDEn_Pol
0: Active high
1: Active low
AnalyzerClk_En_h
0: Inactive
1: Active
DDR_TPDModeEnable_h
0: TDI input (JTAG)
1: TDI output
INTREPID BOOT STRAPS
BIT 32 TO 39
LONG = 1" LONGER THAN MATCHED LENGTH
1K
1%
1/16W
MF
402
0.22UF
20%
6.3V
CERM
402
4.7
1/16W
402
MF
5%
402
MF
1/16W
5%
0
10K
5%
1/16W
SM1
0
5%
MF
402
1/16W
511
1/16W
1%
MF
402
NO STUFF
5%
10K
1/16W
MF
402
NO STUFF
10K
5%
1/16W
MF
402
NO STUFF
10K
5%
1/16W
MF
402
NO STUFF
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
NO STUFF
5%
10K
1/16W
MF
402
NO STUFF
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402402
MF
1/16W
5%
10K10K
5%
1/16W
402
MF
402
MF
1/16W
5%
10K
NO STUFF
10K
5%
1/16W
MF
402
10K
5%
MF
1/16W
402402
MF
1/16W
5%
10K
NO STUFF
10K
5%
1/16W
MF
402
10K
5%
MF
1/16W
402
INT_CLK
10K
5%
1/16W
MF
402
INT_CLK
10K
1/16W
5%
MF
402
INT_CLK
10K
5%
1/16W
MF
402
NO STUFF
10K
5%
1/16W
MF
402
EXT_CLK
402
MF
1/16W
5%
10K
NO STUFF
10K
5%
1/16W
MF
402
NO STUFF
10K
5%
1/16W
MF
402
NO STUFF
10K
5%
1/16W
MF
402
402
MF
1/16W
5%
10K
EXT_CLK
10K
5%
1/16W
MF
402
EXT_CLK
402
MF
1/16W
5%
10K
EXT_CLK
10K
5%
1/16W
MF
402402
MF
1/16W
5%
10K
INT_CLK
10K
5%
1/16W
MF
402402
MF
1/16W
5%
10K10K
1/16W
5%
MF
402
NO STUFF
10K
5%
1/16W
MF
402
NO STUFF
10K
5%
1/16W
MF
402 402
MF
1/16W
5%
10K
NO STUFF
10K
5%
1/16W
MF
402
NO STUFF
10K
5%
1/16W
MF
402
10K
1/16W
5%
MF
402
EXT_CLK
10K
5%
1/16W
MF
402
402
MF
1/16W
5%
10K
NO STUFF
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402402
MF
1/16W
5%
10K10K
5%
MF
1/16W
402
NO STUFF
402
MF
1/16W
5%
10K
INT_CLK
10K
5%
1/16W
MF
402
EXT_CLK
10K
5%
1/16W
402
MF
INT_CLK
10K
5%
1/16W
MF
402
NO STUFF
402
MF
1/16W
5%
10K10K
1/16W
5%
MF
402
NO STUFF
10K
1/16W
5%
MF
402
NO STUFF
402
MF
1/16W
5%
10K
NO STUFF
10K
5%
1/16W
MF
402
NO STUFF
402
MF
1/16W
5%
10K
NO STUFF
10K
5%
1/16W
MF
402
NO STUFF
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
NO STUFF
402
MF
1/16W
5%
10K
402
MF
5%
10K
1/16W
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
CRITICAL
BGA
INTREPID-REV2.1
NO STUFF
402
MF
1/16W
5%
0
402
0
5%
1/16W
MF
402
MF
1/16W
5%
0
NO STUFF
0
5%
1/16W
MF
402
0
5%
1/16W
MF
402
NO STUFF
0
5%
1/16W
MF
402
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1 10K
1/16W
5%
SM1
10K
5%
1/16W
SM1 10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
02
051-6694
45
8
CPU_DATA<36>
CPU_DATA<45>
MAXBUS_SLEEP
CPU_DATA<37>
CPU_DATA<38>
CPU_DATA<32>
CPU_DATA<33>
CPU_DATA<39>
CPU_TSIZ<0>
CPU_TSIZ<1>
CPU_TSIZ<2>
CPU_DATA<38>
CPU_QREQ_L
CPU_TA_L
CPU_TS_L
CPU_ADDR<15>
CPU_ADDR<16>
CPU_ADDR<12>
CPU_ADDR<10>
CPU_ADDR<8>
INT_CPUFB_OUT_SHORT
INT_CPUFB_OUT
SYSCLK_CPU
SYSCLK_CPU_UF
INT_CPUFB_IN
MAXBUS_SLEEP
CPU_BG_L
CPU_DBG_L
CPU_TEA_L
CPU_AACK_L
CPU_HIT_L
CPU_DRDY_L
CPU_ARTRY_L
CPU_BR_L
CPU_DATA<56>
CPU_DATA<57>
CPU_DATA<58>
MAXBUS_SLEEP
CPU_DATA<59>
CPU_DATA<60>
CPU_DATA<61>
INT_CPUFB_LONG
INT_CPUFB_IN_NORM
INT_CPUFB_OUT_NORM
INT_CPUFB_IN
CPU_DATA<48>
CPU_DATA<49>
CPU_DATA<50>
CPU_DATA<51>
CPU_DATA<53>
CPU_DATA<40>
CPU_DATA<41>
CPU_DATA<55>
CPU_DATA<34>
CPU_DATA<35>
+1_5V_INTREPID_PLL
CPU_TEA_L
CPU_TA_L
CPU_DTI<2>
CPU_DTI<1>
CPU_DTI<0>
CPU_DRDY_L
CPU_DBG_L
CPU_DATA<63>
CPU_DATA<61>
CPU_DATA<62>
CPU_DATA<60>
CPU_DATA<58>
CPU_DATA<59>
CPU_DATA<57>
CPU_DATA<56>
CPU_DATA<55>
CPU_DATA<53>
CPU_DATA<54>
CPU_DATA<52>
CPU_DATA<51>
CPU_DATA<48>
CPU_DATA<50>
CPU_DATA<49>
CPU_DATA<47>
CPU_DATA<46>
CPU_DATA<44>
CPU_DATA<45>
CPU_DATA<43>
CPU_DATA<41>
CPU_DATA<42>
CPU_DATA<40>
CPU_DATA<39>
CPU_DATA<37>
CPU_DATA<36>
CPU_DATA<35>
CPU_DATA<34>
CPU_DATA<33>
CPU_DATA<32>
CPU_DATA<30>
CPU_DATA<31>
CPU_DATA<29>
CPU_DATA<28>
CPU_DATA<25>
CPU_DATA<26>
CPU_DATA<23>
CPU_DATA<22>
CPU_DATA<20>
CPU_DATA<21>
CPU_DATA<19>
CPU_DATA<17>
CPU_DATA<18>
CPU_DATA<16>
CPU_DATA<15>
CPU_DATA<14>
CPU_DATA<12>
CPU_DATA<13>
CPU_DATA<11>
CPU_DATA<10>
CPU_DATA<7>
CPU_DATA<9>
CPU_DATA<8>
CPU_DATA<6>
CPU_DATA<5>
CPU_DATA<2>
CPU_DATA<4>
CPU_DATA<3>
CPU_DATA<0>
CPU_DATA<1>
CPU_BR_L
CPU_BG_L
CPU_TS_L
CPU_ADDR<1>
CPU_ADDR<0>
CPU_ADDR<2>
CPU_ADDR<3>
CPU_ADDR<4>
CPU_ADDR<5>
CPU_ADDR<6>
CPU_ADDR<7>
CPU_ADDR<9>
CPU_ADDR<11>
CPU_ADDR<14>
CPU_ADDR<13>
CPU_ADDR<17>
CPU_ADDR<19>
CPU_ADDR<18>
CPU_ADDR<20>
CPU_ADDR<22>
CPU_ADDR<21>
CPU_ADDR<24>
CPU_ADDR<23>
CPU_ADDR<25>
CPU_ADDR<28>
CPU_ADDR<30>
CPU_TBST_L
CPU_TT<1>
CPU_TT<0>
CPU_TT<2>
CPU_TT<4>
CPU_TT<3>
CPU_WT_L
CPU_AACK_L
CPU_HIT_L
CPU_ARTRY_L
CPU_QREQ_L
CPU_QACK_L
INT_SUSPEND_REQ_L
INT_SUSPEND_ACK_L
INT_CPUFB_OUT
SYSCLK_LA_TP
CPU_CLK_EN
CPU_TBEN
INTREPID_ACS_REF
+1_5V_INTREPID_PLL7
CPU_GBL_L
CPU_DATA<44>
CPU_DATA<42>
CPU_ADDR<29>
CPU_ADDR<31>
CPU_CI_L
MAXBUS_SLEEP
CPU_DATA<52>
CPU_DATA<54>
MAXBUS_SLEEP
CPU_DATA<46>
CPU_DATA<47>
CPU_ADDR<27>
CPU_ADDR<26>
CPU_DATA<43>
CPU_DATA<24>
CPU_DATA<27>
CPU_DATA<63>
CPU_DATA<62>
RP24
3 6
RP23
1 8
RP23
4 5
RP23
2 7
RP21
2 7
RP21
1 8
RP21
3 6
RP21
4 5
RP24
4 5
RP23
3 6
R137
1
2
C308
1
2
R227
1 2
R144
1 2
RP24
2 7
R167
12
R197
1
2
R178
1
2
R179
1
2
R651
1
2
R166
1
2
R153
1
2
R123
1
2
R135
1
2
R674
1
2
R143
1
2
R673
1
2
R664
1
2
R657
1
2
R639
1
2
R643
1
2
R642
1
2
R136
1
2
R165
1
2
R177
1
2
R152
1
2
R184
1
2
R134
1
2
R164
1
2
R142
1
2
R122
1
2
R666
1
2
R658
1
2
R675
1
2
R683
1
2
R644
1
2
R665
1
2
R652
1
2
R640
1
2
R176
1
2
R141
1
2
R183
1
2
R162
1
2
R151
1
2
R163
1
2
R121
1
2
R676
1
2
R684
1
2
R653
1
2
R667
1
2
R659
1
2
R668
1
2
R641
1
2
R133
1
2
R645
1
2
R182
1
2
R174
1
2
R150
1
2
R131
1
2
R132
1
2
R175
1
2
R161
1
2
R140
1
2
R685
1
2
R660
1
2
R678
1
2
R647
1
2
R646
1
2
R677
1
2
R669
1
2
R654
1
2
U45
B29
H13
G8
H23
D24
D25
J22
B25
H22
G22
D22
B24
B23
E22
J21
G21
A27
E21
A24
D21
A23
H20
B22
H21
A22
E20
B21
E24
D20
A21
G23
B26
A26
D23
A25
E23
E26
E29
G26
J15
J24
H16 A30
G28
K25
D29
B30
D10
G12
B10
J13
A10
D12
E13
G13
B11
D13
A11
G14
E11
H14
E14
B12
G15
B13
H15
D14
B14
A12
G16
H11
E15
J16
D15
A14
A13
D16
E16
G17
B15
H17
B9
A15
B16
E17
A16
J18
H18
D17
G18
A17
B17
B8
E18
B18
D18
A18
A19
H19
B19
J19
A20
D19
A9
E19
G19
B20
G20
A8
E12
D11
A29
B31
G27
A32
AH9
AM8
AK9
E27
A31
A28
E28
B27
G24
H24
D26
E25
G25
B28
D27
J25
H26
H25
D28
R225
1
2
R215
1 2
R208
1
2
R207
1 2
R226
1 2
R196
1 2
37
8 6
37
8 6
39 35 16 15
8 7 6 5
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
5
37
5
37
5
37
8 6
37
8 5
37
8 5
37
8 5
37
5
37
5
37
5
37
5
37
5
37
37
8
37
5
37
37
8
39 35 16 15
8 7 6 5
37
8 5
37
8 5
37
8 5
37
8 5
37
8 5
37
8 5
37
8 5
37
8 5
37
8 6
37
8 6
37
8 6
39 35 16 15
8 7 6 5
37
8 6
37
8 6
37
8 6
37
37
37
37
8
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
39 14 12
37
8 5
37
8 5
37
5
37
5
37
5
37
8 5
37
8 5
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
8 6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
6
37
8 5
37
8 5
37
8 5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
5
37
8 5
37
8 5
37
8 5
37
8 5
37
5
31
31
37
8
31
5
39
37
5
37
8 6
37
8 6
37
5
37
5
37
5
39 35 16 15
8 7 6 5
37
8 6
37
8 6
39 35 16 15
8 7 6 5
37
8 6
37
8 6
37
5
37
5
37
8 6
37
6
37
6
37
8 6
37
8 6
A0
A1
A6
A2
A3
A4
A5
A9
A8
A7
A10
A11
A12
A13
A14
A15
A16
A20
A17
A18
A19
CE
OE
WE
WP
PWD
GND
DQ0
DQ1
DQ6
DQ5
DQ2
DQ3
DQ4
DQ7
VPP VCC
FEPR-1MX8
(2 OF 9)
DDR_VREF_1
DDR_VREF_0
DDR_DATA_0
DDR_DATA_1
DDR_DATA_2
DDR_DATA_3
DDR_DATA_4
DDR_DATA_5
DDR_DATA_6
DDR_DATA_7
DDR_DATA_8
DDR_DATA_9
DDR_DATA_10
DDR_DATA_11
DDR_DATA_12
DDR_DATA_13
DDR_DATA_14
DDR_DATA_15
DDR_DATA_16
DDR_DATA_17
DDR_DATA_18
DDR_DATA_19
DDR_DATA_20
DDR_DATA_21
DDR_DATA_25
DDR_DATA_26
DDR_DATA_27
DDR_DATA_28
DDR_DATA_29
DDR_DATA_30
DDR_DATA_33
DDR_DATA_34
DDR_DATA_35
DDR_DATA_36
DDR_DATA_37
DDR_DATA_38
DDR_DATA_39
DDR_DATA_40
DDR_DATA_41
DDR_DATA_42
DDR_DATA_43
DDR_DATA_44
DDR_DATA_45
DDR_DATA_46
DDR_DATA_47
DDR_DATA_48
DDR_DATA_49
DDR_DATA_50
DDR_DATA_51
DDR_DATA_52
DDR_DATA_53
DDR_DATA_54
DDR_DATA_55
DDR_DATA_56
DDR_DATA_57
DDR_DATA_58
DDR_DATA_59
DDR_DATA_60
DDR_DATA_61
DDR_DATA_62
DDR_DATA_63
DDR_DATA_22
DDR_DATA_23
DDR_DATA_24
DDR_DATA_31
DDR_DATA_32
DDR_BA_0
DDR_BA_1
DDRCS_3
DDRCS_2
DDRCS_1
DDRCS_0
DDR_DQS_7
DDR_DQS_6
DDR_DQS_5
DDR_DQS_4
DDR_DQS_3
DDR_DQS_2
DDR_DQS_1
DDR_DQS_0
DDR_DM_7
DDR_DM_6
DDR_DM_5
DDR_DM_4
DDR_DM_3
DDR_DM_2
DDR_DM_1
DDR_DM_0
DDRRAS
DDRCAS
DDRWE
DDRCKE0
DDRCKE1
DDRCKE2
DDRCKE3
DDR_MCLK_0_P
DDR_MCLK_0_N
DDR_MCLK_1_P
DDR_MCLK_1_N
DDR_MCLK_2_P
DDR_MCLK_2_N
DDR_MCLK_3_P
DDR_MCLK_3_N
DDR_MCLK_4_P
DDR_MCLK_4_N
DDR_MCLK_5_P
DDR_MCLK_5_N
DDR_REF
DDR_SELHI_0
DDR_SELHI_1
DDR_SELLO_0
DDR_SELLO_1
MEMORY
DDR
INTERFACE
DDR_A_10
DDR_A_11
DDR_A_12
DDR_A_9
DDR_A_8
DDR_A_7
DDR_A_6
DDR_A_5
DDR_A_4
DDR_A_3
DDR_A_2
DDR_A_1
DDR_A_0
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
CLOCKS
SERIES RESISTORS FOR CLOCK/CONTROL SIGNALS
CS
CKE
’0’ & ’1’ GO TO SLOT A
1MB BOOT ROM
2.5V I/O SHUTS OFF
PULL-DOWN RESISTORS TO ENSURE
CKE STAYS LOW AFTER INTREPID
PINS ARE SWAPABLE FOR RPAKS
’2’ & ’3’ GO TO SLOT B
’0’ & ’1’ GO TO SLOT A
’1’S ARE SAME POLARITY (ACTIVE-HI)
’0’S ARE SAME POLARITY (ACTIVE-LO)
’2’ & ’3’ GO TO SLOT B
MEM_VREF
ADDR
BA
CNTL
INTERCEPTS ROM CHIP SELECT
OVERRIDE ROM MODULE
INT - DDR/BOOTROM
10K
5%
1/16W
MF
402
22
5%
402
MF
1/16W
402
MF
1/16W
1%
1K
10K
1%
1/16W
MF
402
402
CERM
10V
20%
0.1UF
10K
1%
1/16W
MF
402
3.3V
TSOP
OMIT
20%
10V
CERM
805
2.2UF
402
CERM
10V
20%
0.1UF
0.1UF
20%
10V
CERM
402
1/16W
MF
402
10K
5%
+3V_MAIN
BGA
CRITICAL
INTREPID-REV2.1
402
MF
1/16W
5%
10K
402
MF
1/16W
5%
1K
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
MF
402
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
5%
1/16W
SM1
22
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
SM1
1/16W
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
+3V_MAIN
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
?
341S1556
1
IC,BOOTROM,Q41B
U17
CRITICAL
02
051-6694
459
SYSCLK_DDRCLK_A1_UF
MEM_CS_L<0>
RAM_ADDR<6>
SYSCLK_DDRCLK_B0_UF
MEM_CS_L<0>
MEM_ADDR<6>
MEM_DATA<10>
MEM_DATA<12>
MEM_DATA<7>
MEM_ADDR<8>
MEM_BA<1>
MEM_DQS<6>
MEM_DQS<5>
MEM_DQS<4>
MEM_DQS<3>
MEM_DQS<2>
MEM_CS_L<3>
MEM_ADDR<1>
SYSCLK_DDRCLK_A0_L_UF
SYSCLK_DDRCLK_B1_UF
SYSCLK_DDRCLK_B1_L_UF
RAM_CKE<1>
RAM_CKE<2>
RAM_CKE<3>
+2_5V_INTREPID
MEM_RAS_L RAM_RAS_L
RAM_WE_LMEM_WE_L
MEM_CAS_L RAM_CAS_L
RAM_BA<1>MEM_BA<1>
RAM_BA<0>MEM_BA<0>
RAM_ADDR<11>MEM_ADDR<11>
RAM_ADDR<9>MEM_ADDR<9>
RAM_ADDR<12>MEM_ADDR<12>
RAM_ADDR<10>MEM_ADDR<10>
RAM_ADDR<8>MEM_ADDR<8>
RAM_ADDR<7>MEM_ADDR<7>
RAM_ADDR<5>MEM_ADDR<5>
RAM_ADDR<3>MEM_ADDR<3>
RAM_ADDR<1>MEM_ADDR<1>
MEM_ADDR<6>
RAM_ADDR<4>MEM_ADDR<4>
RAM_ADDR<2>MEM_ADDR<2>
RAM_ADDR<0>MEM_ADDR<0>
RAM_CKE<3>MEM_CKE<3>
RAM_CKE<1>MEM_CKE<1>
RAM_CS_L<3>MEM_CS_L<3>
RAM_CKE<2>MEM_CKE<2>
RAM_CKE<0>MEM_CKE<0>
RAM_CS_L<2>MEM_CS_L<2>
RAM_CS_L<1>MEM_CS_L<1>
SYSCLK_DDRCLK_B0_L
SYSCLK_DDRCLK_B0_L_UF
SYSCLK_DDRCLK_A0_L
RAM_CS_L<0>
SYSCLK_DDRCLK_B0
SYSCLK_DDRCLK_B1
SYSCLK_DDRCLK_A1_L
SYSCLK_DDRCLK_A1_L_UF
SYSCLK_DDRCLK_A0
SYSCLK_DDRCLK_A1
INT_MEM_VREF
MEM_ADDR<12>
MEM_ADDR<11>
MEM_ADDR<10>
MEM_ADDR<9>
MEM_ADDR<7>
MEM_ADDR<5>
MEM_ADDR<4>
MEM_ADDR<3>
MEM_ADDR<2>
MEM_ADDR<0>
MEM_MUXSEL_L<1>
MEM_MUXSEL_H<1>
MEM_MUXSEL_H<0>
MEM_CKE<3>
MEM_CKE<2>
MEM_CKE<1>
MEM_CKE<0>
MEM_WE_L
MEM_CAS_L
MEM_RAS_L
MEM_DQM<7>
MEM_DQM<6>
MEM_DQM<5>
MEM_DQM<4>
MEM_DQM<3>
MEM_DQM<1>
MEM_DQM<0>
MEM_DQM<2>
MEM_DQS<7>
MEM_DQS<1>
MEM_DQS<0>
MEM_CS_L<2>
MEM_CS_L<1>
MEM_BA<0>
MEM_DATA<54>
MEM_DATA<31>
MEM_DATA<29>
MEM_DATA<25>
MEM_DATA<24>
MEM_DATA<15>
MEM_DATA<63>
MEM_DATA<62>
MEM_DATA<61>
MEM_DATA<60>
MEM_DATA<59>
MEM_DATA<58>
MEM_DATA<57>
MEM_DATA<56>
MEM_DATA<55>
MEM_DATA<53>
MEM_DATA<52>
MEM_DATA<51>
MEM_DATA<50>
MEM_DATA<49>
MEM_DATA<48>
MEM_DATA<47>
MEM_DATA<46>
MEM_DATA<45>
MEM_DATA<44>
MEM_DATA<43>
MEM_DATA<42>
MEM_DATA<41>
MEM_DATA<40>
MEM_DATA<39>
MEM_DATA<38>
MEM_DATA<37>
MEM_DATA<36>
MEM_DATA<35>
MEM_DATA<34>
MEM_DATA<33>
MEM_DATA<32>
MEM_DATA<30>
MEM_DATA<28>
MEM_DATA<27>
MEM_DATA<26>
MEM_DATA<23>
MEM_DATA<22>
MEM_DATA<21>
MEM_DATA<20>
MEM_DATA<19>
MEM_DATA<18>
MEM_DATA<17>
MEM_DATA<16>
MEM_DATA<14>
MEM_DATA<13>
MEM_DATA<11>
MEM_DATA<9>
MEM_DATA<8>
MEM_DATA<6>
MEM_DATA<5>
MEM_DATA<4>
MEM_DATA<3>
MEM_DATA<2>
MEM_DATA<1>
MEM_DATA<0>
MEM_MUXSEL_L<0>
INT_DDRCLK5_N_TP
SYSCLK_DDRCLK_A1_L_UF
SYSCLK_DDRCLK_A1_UF
SYSCLK_DDRCLK_A0_UF
SYSCLK_DDRCLK_A0_L_UF
SYSCLK_DDRCLK_B1_L_UF
SYSCLK_DDRCLK_B1_UF
SYSCLK_DDRCLK_B0_L_UF
SYSCLK_DDRCLK_B0_UF
INT_DDRCLK5_P_TP
INT_DDRCLK2_P_TP
INT_DDRCLK2_N_TP
INT_MEM_VREF
INT_MEM_REF_H
PCI_AD<30>
PCI_AD<24>
PCI_AD<9>
PCI_AD<8>
PCI_AD<7>
PCI_AD<6>
PCI_AD<5>
PCI_AD<4>
PCI_AD<3>
PCI_AD<20>
PCI_AD<2>
PCI_AD<19>
PCI_AD<18>
PCI_AD<17>
PCI_AD<13>
PCI_AD<12>
PCI_AD<11>
PCI_AD<10>
PCI_AD<1>
PCI_AD<0>
ROM_OE_L
ROM_RW_L
INT_RESET_L
ROM_CS_L
ROM_ONBOARD_CS_L
ROM_WP_L
RAM_CKE<0>
PCI_AD<31>
PCI_AD<29>
PCI_AD<28>
PCI_AD<27>
PCI_AD<26>
PCI_AD<25>
PCI_AD<16>
PCI_AD<15>
PCI_AD<14>
SYSCLK_DDRCLK_A0_UF
SYSCLK_DDRCLK_B1_L
R238
1 2
R250
1 2
R199
1
2
R198
1
2
C245
1
2
R191
1
2
U17
21
20
36
6
5
4
3
2
1
40
13
37
19
38
18
17
16
15
14
8
7
22
25
26
27
28
32
33
34
35
23 39
24
10
30 3111
9
12
C460
1
2
C470
1
2
C479
1
2
R386
1
2
U45
H32
AN35
AM35
AM36
AL36
AN34
AN36
AL35
AL33
L29
K30
H35
G35
G33
H33
D35
G36
F36
F35
E35
E36
G32
D36
H36
L30
M29
AK32
AK33
AH35
AG36
AH36
AH32
AG32
AG31
AE32
AF35
AF36
AE36
AK31
AE35
AE33
AD36
AD35
AA36
AA35
AA33
AB36
AB35
AC36
AK35
AA32
AB33
V36
U33
U32
V35
T30
U36
U35
T36
AK36
P33
R30
P35
P36
R36
R35
R33
R32
N35
M36
AJ32
L35
M35
M33
L36
N33
M30
J32
J33
J35
K32
AJ35
K33
J36
K36
K35
AJ36
AG33
AG35
AJ33
AH33
AD33
AC35
T35
T33
N32
L33
AJ31
AH31
AD32
AB30
V30
P32
N29
L32
Y33
Y32
Y36
Y35
W30
Y30
W33
W32
V32
V33
W36
W35
AA22
AB32
AE29
N30
T32
Y22
T22
R338
1
2
R357
1 2
RP33
4 5
RP33
3 6
RP34
1 8
RP34
2 7
RP33
2 7
RP34
3 6
RP33
1 8
RP34
4 5
RP36
1 8
RP35
4 5
RP36
3 6
RP36
2 7
RP36
4 5
RP35
2 7
RP35
1 8
RP35
3 6
RP31
1 8
RP25
1 8
RP25
2 7
RP25
3 6
RP25
4 5
RP30
1 8
RP30
2 7
RP31
3 6
RP30
4 5
RP31
4 5
RP31
2 7
RP26
4 5
RP30
3 6
RP26
1 8
RP26
2 7
RP26
3 6
R500
1
2
R439
1
2
R409
1
2
R387
1
2
37
9
37
9
37 11
37
9
37
9
37
9
37 10
37 10
37 10
37
9
37
9
37 10
37 10
37 10
37 10
37 10
37
9
37
9
37
9
37
9
37
9
37 11
9
37 11
9
37 11
9
39 16 15 10
37
9
37 11
37 11 37
9
37
9
37 11
37 11 37
9
37 11 37
9
37 11 37
9
37 11 37
9
37 11 37
9
37 11 37
9
37 11 37
9
37 11 37
9
37 11 37
9
37 11 37
9
37 11 37
9
37
9
37 11 37
9
37 11 37
9
37 11 37
9
37 11
9
37
9
37 11
9
37
9
37 11 37
9
37 11
9
37
9
37 11
9
37
9
37 11 37
9
37 11 37
9
37 11 37
9
37 11
37 11
37 11
37 11
37 11 37
9
37 11
37 11
39
9
37
9
37
9
37
9
37
9
37
9
37
9
37
9
37
9
37
9
37
9
37 10
37 10
37 10
37
9
37
9
37
9
37
9
37
9
37
9
37
9
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37
9
37
9
37
9
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37
9
37
9
37
9
37
9
37
9
37
9
37
9
37
9
39
9
39
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 25 12
40 25 12
31 13
40 25 12
40 25
37 11
9
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
37
9
37 11
GND
DA10
SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
GND
DA10
SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
GND
DA10
SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
GND
DA10
SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
BIT 48..63
BIT 0..15
BIT 16..31
BIT 32..47
SEL = LOW; HOST = B PORT; A PORT = 100OHM TO GND
SEL = HIGH; HOST = A PORT; B PORT = 100OHM TO GND
MEM_MUXSEL_H<0> AND MEM_MUXSEL_L<0> ARE ACTIVE LOW
MEM_MUXSEL_H<1> AND MEM_MUXSEL_L<1> ARE ACTIVE HIGH
ADDED 0 OHM RESISTORS IN CASE POLARITY IS WRONG
16BIT 2:1 DDR MUXES
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402402
CERM
10V
20%
0.1UF0.1UF
20%
10V
CERM
402
402
CERM
10V
20%
0.1UF0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402402
CERM
10V
20%
0.1UF0.1UF
20%
10V
CERM
402
CRITICAL
CBTV4020
BGA
CRITICAL
CBTV4020
BGA
CRITICAL
CBTV4020
BGA
CRITICAL
BGA
CBTV4020
NO STUFF
0
5%
1/16W
MF
402
NO STUFF
0
5%
MF
1/16W
402
0
5%
1/16W
MF
402
0
5%
1/16W
MF
402
02
051-6694
4510
MEM_DQM<4>
RAM_DATA_B<4>
RAM_DATA_B<13>
RAM_DQS_B<1>
MEM_DATA<46>
MEM_DATA<44>
+2_5V_INTREPID
MEM_DQM<5>
RAM_DQM_B<7>
RAM_DQS_B<7>
RAM_DATA_B<59>
RAM_DATA_A<45>
+2_5V_INTREPID
RAM_DATA_A<57>
MEM_DQM<7>
RAM_DATA_A<56>
RAM_DATA_A<48>
RAM_DATA_A<50>
RAM_DATA_A<51>
RAM_DATA_A<49>
RAM_DATA_A<53>
RAM_DATA_A<52>
RAM_DATA_A<54>
RAM_DATA_A<55>
RAM_DQS_A<6>
RAM_DQM_A<6>
RAM_MUXSEL_H
MEM_DATA<63>
MEM_DQS<7>
MEM_DATA<62>
MEM_DATA<60>
MEM_DATA<61>
MEM_DATA<57>
MEM_DATA<58>
MEM_DATA<59>
MEM_DATA<56>
MEM_DQM<6>
MEM_DATA<55>
MEM_DATA<54>
MEM_DQS<6>
MEM_DATA<52>
MEM_DATA<53>
MEM_DATA<50>
MEM_DATA<49>
MEM_DATA<51>
RAM_DQM_A<7>
MEM_DATA<48>
RAM_DQS_A<7>
RAM_DATA_A<62>
RAM_DATA_A<63>
RAM_DATA_A<60>
RAM_DATA_A<61>
RAM_DATA_A<59>
RAM_DATA_A<58>
RAM_DATA_B<60>
RAM_DATA_B<61>
RAM_DATA_B<62>
RAM_DATA_B<63>
RAM_DATA_B<53>
RAM_DATA_B<54>
RAM_DATA_B<55>
RAM_DATA_B<51>
RAM_DATA_B<52>
RAM_DQS_B<6>
RAM_DQM_B<6>
RAM_DATA_B<56>
RAM_DATA_B<57>
RAM_DATA_B<58>
RAM_DATA_B<50>
RAM_DATA_B<49>
RAM_DATA_B<48>RAM_DATA_A<41>
RAM_DATA_A<40>
RAM_DATA_A<32>
RAM_DATA_A<34>
RAM_DATA_A<35>
RAM_DATA_A<33>
RAM_DATA_A<37>
RAM_DATA_A<36>
RAM_DATA_A<38>
RAM_DATA_A<39>
RAM_DQS_A<4>
RAM_DQM_A<4>
RAM_MUXSEL_H
MEM_DATA<47>
MEM_DQS<5>
MEM_DATA<45>
MEM_DATA<41>
MEM_DATA<42>
MEM_DATA<43>
MEM_DATA<40>
MEM_DATA<39>
MEM_DATA<38>
MEM_DQS<4>
MEM_DATA<36>
MEM_DATA<37>
MEM_DATA<34>
MEM_DATA<33>
MEM_DATA<35>
RAM_DQM_A<5>
MEM_DATA<32>
RAM_DQS_A<5>
RAM_DATA_A<46>
RAM_DATA_A<47>
RAM_DATA_A<44>
RAM_DATA_A<43>
RAM_DATA_A<42>
RAM_DATA_B<43>
RAM_DATA_B<44>
RAM_DATA_B<45>
RAM_DATA_B<46>
RAM_DATA_B<47>
RAM_DQS_B<5>
RAM_DQM_B<5>
RAM_DATA_B<37>
RAM_DATA_B<38>
RAM_DATA_B<39>
RAM_DATA_B<35>
RAM_DATA_B<36>
RAM_DQS_B<4>
RAM_DQM_B<4>
RAM_DATA_B<40>
RAM_DATA_B<41>
RAM_DATA_B<42>
RAM_DATA_B<34>
RAM_DATA_B<33>
RAM_DATA_B<32>
RAM_DATA_A<25>
MEM_DQM<3>
RAM_DATA_A<24>
RAM_DATA_A<16>
RAM_DATA_A<18>
RAM_DATA_A<19>
RAM_DATA_A<17>
RAM_DATA_A<21>
RAM_DATA_A<20>
RAM_DATA_A<22>
RAM_DATA_A<23>
RAM_DQS_A<2>
RAM_DQM_A<2>
RAM_MUXSEL_L
MEM_DATA<31>
MEM_DQS<3>
MEM_DATA<30>
MEM_DATA<28>
MEM_DATA<29>
MEM_DATA<25>
MEM_DATA<26>
MEM_DATA<27>
MEM_DATA<24>
MEM_DQM<2>
MEM_DATA<23>
MEM_DATA<22>
MEM_DQS<2>
MEM_DATA<20>
MEM_DATA<21>
MEM_DATA<18>
MEM_DATA<17>
MEM_DATA<19>
RAM_DQM_A<3>
MEM_DATA<16>
RAM_DQS_A<3>
RAM_DATA_A<31>
RAM_DATA_A<28>
RAM_DATA_A<27>
RAM_DATA_A<26>
RAM_DATA_B<27>
RAM_DATA_B<28>
RAM_DATA_B<29>
RAM_DATA_B<30>
RAM_DATA_B<31>
RAM_DQS_B<3>
RAM_DQM_B<3>
RAM_DATA_B<21>
RAM_DATA_B<22>
RAM_DATA_B<23>
RAM_DATA_B<19>
RAM_DATA_B<20>
RAM_DQS_B<2>
RAM_DQM_B<2>
RAM_DATA_B<24>
RAM_DATA_B<25>
RAM_DATA_B<26>
RAM_DATA_B<18>
RAM_DATA_B<17>
RAM_DATA_B<16>
RAM_DATA_A<9>
MEM_DQM<1>
RAM_DATA_A<8>
RAM_DATA_A<0>
RAM_DATA_A<2>
RAM_DATA_A<3>
RAM_DATA_A<1>
RAM_DATA_A<5>
RAM_DATA_A<4>
RAM_DATA_A<6>
RAM_DATA_A<7>
RAM_DQS_A<0>
RAM_DQM_A<0>
RAM_MUXSEL_L
MEM_DATA<15>
MEM_DQS<1>
MEM_DATA<14>
MEM_DATA<12>
MEM_DATA<13>
MEM_DATA<9>
MEM_DATA<10>
MEM_DATA<11>
MEM_DATA<8>
MEM_DQM<0>
MEM_DATA<7>
MEM_DATA<6>
MEM_DQS<0>
MEM_DATA<4>
MEM_DATA<5>
MEM_DATA<2>
MEM_DATA<1>
MEM_DATA<3>
RAM_DQM_A<1>
MEM_DATA<0>
RAM_DQS_A<1>
RAM_DATA_A<14>
RAM_DATA_A<15>
RAM_DATA_A<12>
RAM_DATA_A<13>
RAM_DATA_A<11>
RAM_DATA_A<10>
RAM_DATA_B<11>
RAM_DATA_B<12>
RAM_DATA_B<14>
RAM_DATA_B<15>
RAM_DQM_B<1>
RAM_DATA_B<5>
RAM_DATA_B<6>
RAM_DATA_B<7>
RAM_DATA_B<3>
RAM_DQS_B<0>
RAM_DQM_B<0>
RAM_DATA_B<8>
RAM_DATA_B<9>
RAM_DATA_B<10>
RAM_DATA_B<2>
RAM_DATA_B<1>
RAM_DATA_B<0>
RAM_MUXSEL_L
MEM_MUXSEL_L<1>
RAM_MUXSEL_H
MEM_MUXSEL_H<1>
RAM_MUXSEL_L
MEM_MUXSEL_L<0>
RAM_MUXSEL_H
MEM_MUXSEL_H<0>
+2_5V_INTREPID
RAM_DATA_A<29>
RAM_DATA_A<30>
+2_5V_INTREPID
C742
1
2
C748
1
2
C753
1
2
C737
1
2
C738
1
2
C736
1
2
C752
1
2
C747
1
2
C741
1
2
C743
1
2
C727
1
2
C735
1
2
U13
F1
H1
K1
K3
K4
K6
J7
K9
J10
G10
E10
C10
A10
A8
A7
A5
B4
A2
B1
D1
G1
J1
K2
J4
K5
K7
K8
K10
H10
F10
D10
B10
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B7
A6
A4
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A1
C1
E1
F2
H2
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J5
J6
J8
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B6
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C5C6D2D9G2G9H5
H6
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U12
F1
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G10
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K8
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H10
F10
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A9
B7
A6
A4
A3
A1
C1
E1
F2
H2
J2
J3
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H6
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U9
F1
H1
K1
K3
K4
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J10
G10
E10
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A10
A8
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A2
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F10
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A6
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A3
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C1
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F2
H2
J2
J3
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J6
J8
J9
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F9
E9
C9
B9
B8
B6
B5
B3
B2
C2
E2
C5C6D2D9G2G9H5
H6
E3
E8F3F8
R242
1 2
R252
1 2
R243
1 2
R239
1 2
37
9
37 11
37 11
37 11
37
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37
9
39 16 15 10
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37
9
37 11
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39 16 15 10
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37 10 37
9
37 10 37
9
37 10 37
9
37 10 37
9
39 16 15 10
9
37 11
37 11
39 16 15 10
9
DQ58
RFU18
KEY
VDD6
VSS6
VSS8
VDD5
DQ15
DQ13
DQ14
VSS5
DM1
VDD3
VSS3
DQ7
DQ12
DQ6
DM0
DQ4
DQ5
VSS1
VREF1
VDD1
SA1
SA2
RFU19
SA0
VDD32
DQ63
DQ62
VSS32
DQ61
VDD30
DQ60
DQ55
DM7
VSS30
DQ54
DM6
VDD28
DQ53
DQ52
VDD25
CK1*
CK1
VSS28
DQ47
DQ46
VDD23
VSS25
DM5
DQ45
DQ44
DM4
DQ39
VSS23
DQ38
DQ37
RFU17
DQ36
VSS21
VDD21
VDD19
RAS*
BA1
CAS*
S1*
A6
A4
A2
A0
VSS19
A8
A11
VDD17
RFU15
CKE0
VDD15
VSS17
RFU11
VSS16
RFU9
VDD14
RFU3
VSS14
RFU5
RFU7
RFU1
VDD12
VSS12
DM3
DQ31
DQ30
DQ29
VSS10
VDD10
DQ28
DQ23
DM2
DQ20
VDD8
DQ21
DQ22
VDDSPD
SCL
SDA
VDD31
VSS31
DQ59
DQS7
DQ51
VDD29
DQ56
VSS29
DQ57
DQ48
DQS6
VDD27
DQ49
DQ50
DQ43
VSS26
VDD26
VDD24
VSS27
DQ41
DQS5
VSS24
VDD22
DQ42
DQ34
VSS22
DQ35
DQS4
DQ40
VDD20
RFU16
DQ32
VSS20
DQ33
S0*
VDD18
BA0
A10_AP
WE*
A1
A5
A3
A9
A7
VSS18
CKE1
RFU14
RFU13
VDD16
VDD13
VSS15
RFU10
RFU8
RFU12
RFU0
RFU4
VSS13
RFU2
RFU6
VSS11
DQ26
DQ27
DQS3
VDD11
DQ19
DQ24
VDD9
VSS9
DQ25
DQ18
DQ16
VDD7
DQ17
DQS2
DQ11
VDD4
VSS7
CK0*
CK0
DQS1
VSS4
DQ10
VDD2
DQ9
DQ2
DQS0
DQ8
DQ3
VSS2
VDD0
DQ0
DQ1
VSS0
VREF0
A12
DQ58
RFU18
KEY
VREF0
VDD0
DQ0
DQ1
VSS0
DQS0
VSS2
DQ3
DQ8
DQ2
VDD2
VSS4
DQS1
DQ10
DQ9
DQ11
CK0
CK0*
VSS7
VDD4
DQ16
DQ18
VDD7
DQ17
DQS2
VSS9
DQ25
VDD9
DQ24
DQ19
DQS3
VDD11
DQ27
DQ26
VSS11
RFU0
VDD13
RFU4
VSS13
RFU2
RFU6
RFU13
RFU12
RFU8
RFU10
VSS15
A9
CKE1
RFU14
VDD16
A1
A5
A7
VSS18
A3
BA0
VDD18
S0*
WE*
A10_AP
DQ33
VSS20
DQ32
VDD20
RFU16
DQS4
DQ34
VSS22
DQ35
DQ40
VDD22
DQ41
DQS5
VSS24
DQ42
DQ43
DQ48
VSS26
VDD26
VDD24
VSS27
VSS29
DQ50
DQ49
DQS6
VDD27
DQS7
DQ51
VDD29
DQ56
DQ57
SDA
VDD31
VSS31
DQ59
VDDSPD
SCL
RFU19
VDD32
VSS28
CK1
DQ52
VDD28
DM6
DQ54
VSS30
DM7
DQ55
DQ60
VDD30
DQ61
DQ53
SA1
SA2
SA0
DQ63
DQ62
VSS32
VSS25
DM5
DQ45
VDD23
VDD21
VSS21
DQ36
RFU17
DQ44
DM4
DQ39
VSS23
DQ38
DQ37
RAS*
CAS*
S1*
DQ46
DQ47
CK1*
VDD25
RFU7
RFU5
VDD14
VSS17
VDD15
CKE0
RFU15
VDD17
A11
A8
RFU11
VSS16
RFU9
VSS19
A0
A2
A4
A6
BA1
VDD19
VDD12
VSS12
DQ31
DQ30
DM3
DQ22
DQ21
VDD8
DQ20
DQ29
VSS10
VDD10
DQ28
DQ23
DM2
VSS6
VSS8
RFU1
VSS14
RFU3
VREF1
DQ5
DQ4
DM0
DQ6
DQ12
DQ7
VSS3
VSS1
VDD1
VDD3
DM1
VSS5
DQ14
DQ13
DQ15
VDD5
VDD6
A12
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
FACTORY SLOT
SLOT "A"
STANDARD
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
DDR SODIMM CONNS
SLOT "B"
FOR RETURN CURRENT
SLOT "A"
DDR BYPASS CAPS
ONE 0.1UF PER SLOT
DDR VREF
NC
NC
NC
NC
NC
NC
CUSTOMER SLOT
SLOT "B"
REVERSED
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
ADDR=0XA0(WR)/0XA1(RD)
ADDR=0XA2(WR)/0XA3(RD)
AS0A42-D2S
F-RT-SM
CRITICAL
10UF
6.3V
20%
CERM
805
10UF
20%
6.3V
CERM
805
AS0A42-D2R
F-RT-SM
CRITICAL
10UF
20%
6.3V
CERM
805
10UF
20%
6.3V
CERM
805
1K
1%
1/16W
MF
402
1K
1%
1/16W
MF
402
402
CERM
10V
20%
0.1UF 0.1UF
20%
10V
CERM
402
+2_5V_MAIN+2_5V_MAIN
+2_5V_MAIN +2_5V_MAIN
+2_5V_MAIN
+2_5V_MAIN
+2_5V_MAIN
+3V_MAIN
0.1UF
20%
10V
CERM
402 402
CERM
10V
20%
0.1UF 0.1UF
20%
10V
CERM
402
+3V_MAIN
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402402
CERM
10V
20%
0.1UF0.1UF
20%
10V
402
CERM
0.1UF
20%
10V
CERM
402402
CERM
10V
20%
0.1UF
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
CERM
10V
402
+3V_MAIN
0.1UF
20%
10V
CERM
402
0.1UF
10V
20%
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
20%
10V
CERM
402
0.1UF
10V
20%
CERM
402
402
CERM
10V
20%
0.1UF
02
051-6694
4511
RAM_DATA_B<1>
RAM_DQS_B<0>
RAM_DATA_B<2>
RAM_DATA_A<21>
RAM_DATA_A<20>
RAM_DATA_B<19>
RAM_DATA_B<24>
RAM_DATA_B<18>
RAM_DQS_B<2>
RAM_DATA_B<17>
RAM_DATA_B<16>
SYSCLK_DDRCLK_B0_L
SYSCLK_DDRCLK_B0
RAM_DATA_B<11>
RAM_DATA_B<10>
RAM_ADDR<12>
RAM_DATA_B<35>
RAM_DATA_B<34>
RAM_DQS_B<4>
RAM_DATA_B<33>
RAM_DATA_B<32>
RAM_WE_L
RAM_CS_L<2>
RAM_BA<0>
RAM_ADDR<10>
RAM_ADDR<1>
RAM_ADDR<3>
RAM_ADDR<5>
RAM_ADDR<7>
RAM_ADDR<9>
RAM_CKE<3>
RAM_DATA_B<27>
RAM_DATA_B<26>
RAM_DQS_B<3>
RAM_DATA_B<25>
RAM_DQS_B<5>
RAM_DATA_B<41>
RAM_DATA_B<40>
DDR_VREF
RAM_DATA_A<61>
RAM_DATA_A<62>
RAM_DQM_A<7>
RAM_DATA_A<60>
RAM_DATA_A<55>
RAM_DQM_A<6>
RAM_DATA_A<54>
RAM_DATA_A<53>
RAM_DATA_A<52>
SYSCLK_DDRCLK_A1
SYSCLK_DDRCLK_A1_L
RAM_DATA_A<47>
RAM_DATA_A<46>
RAM_DQM_A<5>
RAM_DATA_A<45>
RAM_DATA_A<39>
RAM_DATA_A<44>
RAM_DATA_A<38>
RAM_DQM_A<4>
RAM_DATA_A<36>
RAM_DATA_A<37>
RAM_CS_L<1>
RAM_RAS_L
RAM_CAS_L
RAM_BA<1>
RAM_ADDR<0>
RAM_ADDR<4>
RAM_ADDR<2>
RAM_ADDR<6>
RAM_ADDR<8>
RAM_ADDR<11>
RAM_CKE<0>
RAM_DATA_A<30>
RAM_DQM_A<3>
RAM_DATA_A<29>
RAM_DATA_A<28>
RAM_DATA_A<23>
RAM_DATA_A<22>
RAM_DATA_A<15>
RAM_DATA_A<14>
RAM_DQM_A<1>
RAM_DATA_A<13>
RAM_DATA_A<7>
RAM_DATA_A<12>
RAM_DATA_A<6>
RAM_DQM_A<0>
RAM_DATA_A<5>
RAM_DATA_A<4>
DDR_VREF
INT_I2C_CLK0
INT_I2C_DATA0
RAM_DATA_A<59>
RAM_DATA_A<58>
RAM_DQS_A<7>
RAM_DATA_A<57>
RAM_DATA_A<56>
RAM_DATA_A<51>
RAM_DQS_A<6>
RAM_DATA_A<50>
RAM_DATA_A<49>
RAM_DATA_A<48>
RAM_DATA_A<43>
RAM_DQS_A<5>
RAM_DATA_A<42>
RAM_DATA_A<41>
RAM_DATA_A<35>
RAM_DATA_A<40>
RAM_DQS_A<4>
RAM_DATA_A<34>
RAM_DATA_A<32>
RAM_DATA_A<33>
RAM_CS_L<0>
RAM_BA<0>
RAM_WE_L
RAM_ADDR<10>
RAM_ADDR<1>
RAM_ADDR<5>
RAM_ADDR<3>
RAM_ADDR<7>
RAM_ADDR<9>
RAM_ADDR<12>
RAM_CKE<1>
RAM_DATA_A<27>
RAM_DATA_A<26>
RAM_DQS_A<3>
RAM_DATA_A<24>
RAM_DATA_A<25>
RAM_DATA_A<19>
RAM_DATA_A<18>
RAM_DQS_A<2>
RAM_DATA_A<17>
RAM_DATA_A<16>
SYSCLK_DDRCLK_A0
SYSCLK_DDRCLK_A0_L
RAM_DATA_A<11>
RAM_DQS_A<1>
RAM_DATA_A<10>
RAM_DATA_A<9>
RAM_DATA_A<3>
RAM_DATA_A<8>
RAM_DATA_A<2>
RAM_DQS_A<0>
RAM_DATA_A<1>
RAM_DATA_A<0>
DDR_VREF
RAM_DATA_A<63>
RAM_DQM_A<2>
RAM_DATA_A<31>
DDR_VREF
RAM_DATA_B<0>
RAM_DATA_B<3>
RAM_DATA_B<8>
RAM_DATA_B<9>
RAM_DQS_B<1>
RAM_DATA_B<42>
RAM_DATA_B<43>
RAM_DATA_B<48>
RAM_DATA_B<49>
RAM_DATA_B<50>
RAM_DQS_B<6>
RAM_DATA_B<56>
RAM_DATA_B<51>
RAM_DQS_B<7>
RAM_DATA_B<57>
RAM_DATA_B<58>
RAM_DATA_B<59>
INT_I2C_DATA0
INT_I2C_CLK0
RAM_DATA_B<62>
RAM_DQM_B<7>
RAM_DATA_B<61>
RAM_DATA_B<63>
RAM_DATA_B<60>
RAM_DATA_B<55>
RAM_DQM_B<6>
RAM_DATA_B<54>
RAM_DATA_B<53>
RAM_DATA_B<52>
SYSCLK_DDRCLK_B1
SYSCLK_DDRCLK_B1_L
RAM_DATA_B<45>
RAM_DQM_B<5>
RAM_DATA_B<44>
RAM_DATA_B<39>
RAM_DATA_B<46>
RAM_DATA_B<47>
RAM_DATA_B<38>
RAM_DQM_B<4>
RAM_DATA_B<37>
RAM_DATA_B<36>
RAM_CAS_L
RAM_RAS_L
RAM_CS_L<3>
RAM_ADDR<4>
RAM_ADDR<0>
RAM_ADDR<6>
RAM_ADDR<8>
RAM_ADDR<11>
RAM_ADDR<2>
RAM_BA<1>
RAM_CKE<2>
RAM_DATA_B<31>
RAM_DQM_B<3>
RAM_DATA_B<30>
RAM_DATA_B<29>
RAM_DATA_B<28>
RAM_DATA_B<23>
RAM_DATA_B<21>
RAM_DATA_B<20>
RAM_DATA_B<15>
RAM_DATA_B<14>
RAM_DATA_B<13>
RAM_DQM_B<1>
RAM_DATA_B<12>
RAM_DATA_B<7>
RAM_DATA_B<6>
RAM_DQM_B<0>
RAM_DATA_B<5>
RAM_DATA_B<4>
DDR_VREF
RAM_DQM_B<2>
RAM_DATA_B<22>
J19
112111
115
10099
110109
108107
106105
102101
117
116
120
35
37
160
158
9695
12
26
48
62
134
148
170
184
5
7
29
31
20
24
30
32
41
43
49
53
13
42
44
50
54
55
59
65
67
56
60
17
66
68
127
129
135
139
128
130
136
140
6
141
145
151
153
142
146
152
154
163
165
8
171
175
164
166
172
176
177
181
187
189
14
178
182
188
190
18
19
23
11
25
47
61
133
147
169
183
201
202
118
71 72
85 86
89
91
97 98
123 124
199 200
73 74
77 78
79 80
83 84
121 122
194
196
198
195
193
9 10
58
69 70
81 82
92
93 94
113 114
21
131 132
143 144
155 156
157
167 168
179
22
180
191 192
33 34
36
45 46
57
197
1 2
3 4
52
63 64
75 76
87 88
90
103 104
15
125 126
137 138
149 150
159
161 162
173
16
174
185 186
27 28
38
39 40
51
119
J22
112 111
115
100 99
110 109
108 107
106 105
102 101
117
116
120
35
37
160
158
96 95
12
26
48
62
134
148
170
184
5
7
29
31
20
24
30
32
41
43
49
53
13
42
44
50
54
55
59
65
67
56
60
17
66
68
127
129
135
139
128
130
136
140
6
141
145
151
153
142
146
152
154
163
165
8
171
175
164
166
172
176
177
181
187
189
14
178
182
188
190
18
19
23
11
25
47
61
133
147
169
183
201
202
118
7172
8586
89
91
9798
123124
199200
7374
7778
7980
8384
121122
194
196
198
195
193
910
58
6970
8182
92
9394
113114
21
131132
143144
155156
157
167168
179
22
180
191192
3334
36
4546
57
197
12
34
52
6364
7576
8788
90
103104
15
125126
137138
149150
159
161162
173
16
174
185186
2728
38
3940
51
119
C602
1
2
C601
1
2
C530
1
2
C589
1
2
R449
1
2
R440
1
2
C542
1
2
C482
1
2
C573
1
2
C526
1
2
C525
1
2
C490
1
2
C527
1
2
C481
1
2
C523
1
2
C549
1
2
C524
1
2
C595
1
2
C522
1
2
C597
1
2
C489
1
2
C594
1
2
C596
1
2
C548
1
2
C565
1
2
C550
1
2
C551
1
2
C761
1
2
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37
9
37
9
37 10
37 10
37 11
9
37 10
37 10
37 10
37 10
37 10
37 11
9
37
9
37 11
9
37 11
9
37 11
9
37 11
9
37 11
9
37 11
9
37 11
9
37
9
37 10
37 10
37 10
37 10
37 10
37 10
37 10
39 11
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37
9
37
9
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37
9
37 11
9
37 11
9
37 11
9
37 11
9
37 11
9
37 11
9
37 11
9
37 11
9
37 11
9
37
9
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
39 11
40 23 13 11
6
40 23 13 11
6
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37
9
37 11
9
37 11
9
37 11
9
37 11
9
37 11
9
37 11
9
37 11
9
37 11
9
37 11
9
37
9
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37
9
37
9
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
39 11
37 10
37 10
37 10
39 11
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
40 23 13 11
6
40 23 13 11
6
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37
9
37
9
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 11
9
37 11
9
37
9
37 11
9
37 11
9
37 11
9
37 11
9
37 11
9
37 11
9
37 11
9
37
9
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
37 10
39 11
37 10
37 10
(PLL4)
VDD15A_6
(PLL4)
VSSA_6
ROM_WE
ROM_OE
PCI_STOP
PCI_DEVSEL
PCI_CBE_3
PCI_CBE_2
PCI_CBE_1
PCI_CBE_0
ROM_CS
PCI_CLK_IN
PCI_CLK_OUT
PCI_CLK2
PCI_CLK1
PCI_CLK0
PCI_FRAME
PCI_PAR
PCI_TRDY
PCI_IRDY
PCI_REQ_2
PCI_REQ_1
PCI_REQ_0
PCI_GNT_0
PCI_GNT_1
PCI_GNT_2
PCI/ROM
INTERFACE
PCIAD_31
PCIAD_30
PCIAD_28
PCIAD_27
PCIAD_26
PCIAD_25
PCIAD_29
PCIAD_19
PCIAD_18
PCIAD_17
PCIAD_16
PCIAD_15
PCIAD_23
PCIAD_24
PCIAD_20
PCIAD_21
PCIAD_22
PCIAD_14
(7 OF 9)
PCIAD_11
PCIAD_10
PCIAD_12
PCIAD_13
PCIAD_9
PCIAD_6
PCIAD_5
PCIAD_7
PCIAD_8
PCIAD_4
PCIAD_3
PCIAD_1
PCIAD_2
PCIAD_0
ROM_OVRLY_EN
VSSA_5
(PLL5)
(PLL5)
VDD15A_5
STP_AGP
AGPPVT
AGPVREF0
AGPVREF1
AGP_BUSY
AGP_CLK
AGP_FB_IN
AGP_FB_OUT
AGPAD0
AGPREQ
AGPGNT
AGP_SBA3
AGP_SBA2
AGP_SBA1
AGP_SBA0
AGPCBE_3
AGPFRAME
AGPTRDY
AGPIRDY
AGPSTOP
AGPDEVSEL
AGPPAR
AGPAD31
AGPAD30
AGPCBE_0
AGPCBE_1
AGPCBE_2
AGP_ST2
AGP_AD_STB0_P
AGP_AD_STB0_N
AGP_AD_STB1_P
AGP_AD_STB1_N
AGPPIPE
AGPRBF
AGP_ST1
AGP_SBA7
AGP_SB_STB_P
AGP_SB_STB_N
AGP_ST0
AGP_WBF
AGP
INTERFACES
AGP_SBA6
AGP_SBA5
AGP_SBA4
AGPAD29
AGPAD28
AGPAD27
AGPAD26
AGPAD25
AGPAD24
AGPAD23
AGPAD22
AGPAD21
AGPAD20
AGPAD19
AGPAD18
AGPAD17
AGPAD16
AGPAD15
AGPAD14
AGPAD13
AGPAD12
AGPAD11
AGPAD10
AGPAD9
AGPAD8
AGPAD7
AGPAD6
AGPAD5
AGPAD4
AGPAD3
AGPAD2
AGPAD1
(3 OF 9)
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
INTREPID AGP/PCI
AGP PULL-UPS/PULL DOWNS
Need divider for 3.3V slot!
Vout = AGPIO (1.5V)
Vin = Vcore (1.5V)
AGP I/O REFERENCE
(PLACE CLOSE TO INTREPID AGP BALLS)
SERIES RESISTORS FOR BOOTROM CONTROL SIGNALS
PLACE CLOSE TO INTREPID SIDE
ARE POWERED IN SLEEP
+3V_MAIN BECAUSE THESE CHIPS
USB2 AND CBUS REQ REMAINS ON
PCI PULL-UPS
PCI FEEDBACK CLOCK MATCHES LONGEST PCI CLOCK ROUTE
OUTPUT IMPEDANCE IS ABOUT 20OHM
VIN = 1.5V (CORE)
VOUT = 3.3V
BECAUSE SINGLE AGP PWR PLANE AND CLOSE PROXIMITY OF CHIPS
SIMPLY PROVIDING REFERENCE TO CHIP
AGP_FB_CLK IS ROUTED THE SAME LENGTH AS CLK66M_GPU_AGP
use 52-ohm a resistor here.
NOTE: Designs using AGP slot should
4.7
5%
MF
1/16W
402
402
MF
1/16W
5%
0
60.4
1%
1/16W
MF
402
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
4.7
5%
1/16W
MF
402
0.22UF
20%
6.3V
CERM
402
INTREPID-REV2.1
BGA
CRITICAL
33
5%
1/16W
MF
402
33
5%
1/16W
MF
402
33
5%
1/16W
MF
402
47
5%
1/16W
402
MF
+3V_SLEEP
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
402
MF
1/16W
5%
22
402
MF
1/16W
5%
22
22
5%
1/16W
MF
402
33
5%
1/16W
MF
402
NEC_USB
22
5%
1/16W
MF
402
+3V_MAIN
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
MF
402
1/16W
4.99K
1%
1/16W
MF
402
4.99K
1%
1/16W
MF
402
0.22UF
20%
6.3V
CERM
402
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
SM1
1/16W
10K
5%
1/16W
SM1
BGA
CRITICAL
INTREPID-REV2.1
0.22UF
20%
6.3V
CERM
402
02
12
45
051-6694
CLK33M_USB2_UF
INT_PCI_FB_IN
PCI_AD<3>
PCI_AD<4>
PCI_AD<30>
PCI_AD<31>
PCI_AD<29>
PCI_AD<28>
AGP_AD<4>
AGP_AD<6>
AGP_AD<7>
AGP_RBF_L
AGP_AD<24>
CBUS_PCI_REQ_L
USB2_PCI_REQ_L
AIRPORT_PCI_REQ_L
INT_ROM_RW_L ROM_RW_L
INT_ROM_OE_L ROM_OE_L
INT_ROM_CS_L ROM_CS_L
INT_AGP_VREF
+1_5V_AGP
INT_AGP_FB_OUT
INT_AGP_FB_IN
CLK66M_AGP_15V_TP
AGP_SB_STB_L
AGP_AD_STB_L<1>
AGP_SB_STB
+1_5V_AGP
AGP_AD_STB<0>
AGP_STOP_L
AGP_WBF_L
AGP_IRDY_L
AGP_AD_STB_L<0>
AGP_AD_STB<1>
AGP_PIPE_L
AGP_TRDY_L
AGP_DEVSEL_L
AGP_REQ_L
AGP_FRAME_L
+3V_GPU
STOP_AGP_L
AGP_GNT_L
AGP_BUSY_L
+1_5V_INTREPID_PLL
AGP_WBF_L
AGP_RBF_L
AGP_PIPE_L
AGP_AD_STB_L<0>
AGP_AD_STB<0>
AGP_AD_STB_L<1>
AGP_AD_STB<1>
AGP_ST<1>
AGP_ST<2>
AGP_ST<0>
AGP_SB_STB_L
AGP_SB_STB
AGP_SBA<7>
AGP_SBA<6>
AGP_SBA<5>
AGP_SBA<4>
AGP_SBA<3>
AGP_SBA<2>
AGP_SBA<0>
AGP_DEVSEL_L
AGP_STOP_L
AGP_IRDY_L
AGP_TRDY_L
AGP_FRAME_L
AGP_PAR
AGP_CBE<3>
AGP_CBE<2>
AGP_CBE<1>
AGP_CBE<0>
AGP_AD<31>
AGP_AD<30>
AGP_AD<29>
AGP_AD<28>
AGP_AD<27>
AGP_AD<26>
AGP_AD<25>
AGP_AD<23>
AGP_AD<22>
AGP_AD<21>
AGP_AD<20>
AGP_AD<19>
AGP_AD<18>
AGP_AD<17>
AGP_AD<16>
AGP_AD<15>
AGP_AD<14>
AGP_AD<13>
AGP_AD<12>
AGP_AD<11>
AGP_AD<10>
AGP_AD<9>
AGP_AD<8>
AGP_AD<5>
AGP_AD<3>
AGP_AD<2>
AGP_AD<1>
AGP_AD<0>
INT_AGP_VREF
AGP_BUSY_L
STOP_AGP_L
AGP_GNT_L
AGP_REQ_L
AGP_SBA<1>
+1_5V_INTREPID_PLL5
INT_AGPPVT
+1_5V_AGP
PCI_FRAME_L
PCI_DEVSEL_L
PCI_IRDY_L
PCI_TRDY_L
PCI_STOP_L
+1_5V_INTREPID_PLL
PCI_AD<0>
PCI_AD<1>
PCI_AD<2>
PCI_AD<5>
PCI_AD<6>
PCI_AD<8>
PCI_AD<7>
PCI_AD<10>
PCI_AD<11>
PCI_AD<9>
PCI_AD<13>
PCI_AD<12>
PCI_AD<16>
PCI_AD<14>
PCI_AD<15>
PCI_AD<18>
PCI_AD<17>
PCI_AD<20>
PCI_AD<21>
PCI_AD<19>
PCI_AD<22>
PCI_AD<23>
PCI_AD<24>
PCI_AD<25>
PCI_AD<26>
PCI_AD<27>
+1_5V_INTREPID_PLL6
AIRPORT_PCI_REQ_L
CBUS_PCI_REQ_L
USB2_PCI_REQ_L
USB2_PCI_GNT_L
AIRPORT_PCI_GNT_L
CBUS_PCI_GNT_L
PCI_PAR
PCI_IRDY_L
PCI_FRAME_L
PCI_TRDY_L
PCI_STOP_L
PCI_DEVSEL_L
PCI_CBE<0>
PCI_CBE<1>
PCI_CBE<2>
PCI_CBE<3>
INT_ROM_OE_L
INT_ROM_CS_L
INT_ROM_RW_L
CLK33M_AIRPORT_UF
CLK33M_AIRPORT
INT_PCI_FB_OUT
CLK33M_USB2
CLK66M_GPU_AGP_UF
CLK66M_GPU_AGP
CLK33M_CBUS_UF
CLK33M_CBUS
R187
1 2
R230
1 2
R193
1 2
R170
1 2
R194
1 2
R216
1 2
R185
1
2
R180
1
2
C247
1
2
RP20
4 5
RP22
2 7
RP20
2 7
RP19
3 6
RP19
4 5
RP20
3 6
RP22
4 5
RP22
3 6
U45
AR19
AM19
AR22
AN22
AM22
AN23
AR23
AT24
AM23
AR24
AT25
AR25
AT20
AM24
AN25
AL24
AR26
AT26
AM25
AN26
AM26
AR27
AT27
AR20
AR28
AN27
AT21
AN20
AR21
AN21
AM21
AT22
AM20
AT23
AN24
AL25
AM27
AN28
AM29
AT28
AT29
AJ29
AJ24
AK24
AT33
AM28
AR29
AB20
AB21
AK19
AK20
AK22
AK21
AT19
AK28
AK27
AK25
AT32
AR32
AM31
AN31
AR31
AT31
AM30
AN30
AG25
AH25
AN29
AT30
AR30
AK30
AN19
V14
V13
C160
1
2
R146
1 2
R217
1 2
R209
1
2
RP22
1 8
RP20
1 8
RP19
1 8
RP19
2 7
R112
1 2
C83
1
2
U45
AM10
AR8
AR10
AT9
AR11
AM12
AN12
AK11
AT11
AT10
AN13
AM13
AK12
AR12
AJ11
AT12
AM11
AR13
AK15
AH15
AN14
AT13
AK14
AJ8
AN15
AM15
AN10
AT8
AN11
AH13
AK13
AR9
AR14
AK16
AM16
AJ15
AR18
AH18
AT18
AJ19
AM18
AM17
AN16
AT16
AN18
AN17
AH16
AT14
AR17
AR16
AT17
AR15
AT15
AM9
AR7
AK17
AN9
J11
J10
R192
1 2
R147
1 2
R171
1 2
R186
1
2
RP18
1 8
RP17
3 6
RP17
1 8
RP17
2 7
RP18
3 6
RP17
4 5
RP18
4 5
RP18
2 7
R77
1 2
R82
1 2
R103
1 2
R169
1 2
R157
1 2
37
37
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
38 18
38 18
38 18
38 18 12
38 18
17 12
27 12
40 25 12
12 40 25
9
12 40 25
9
12 40 25
9
39 18 12
39 21 19 18 16 15 12
37
37
38 18 12
38 18 12
38 18 12
39
21 19 18 16 15 12
38 18 12
38 18 12
18 12
38 18 12
38 18 12
38 18 12
12
38 18 12
38 18 12
38 18 12
38 18 12
39 21 19 18
12
38 18 12
18 12
39 14 12
8
18 12
38 18 12
12
38 18 12
38 18 12
38 18 12
38 18 12
18
18
18
38 18 12
38 18 12
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18 12
38 18 12
38 18 12
38 18 12
38 18 12
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
38 18
39 18 12
18 12
12
38 18 12
38 18 12
38 18
39
39 21 19 18 16 15 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
40 38 27 25 17 12
39 14 12
8
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
40 38 27 25 17
9
40 38 27 25 17
40 38 27 25 17
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
40 38 27 25 17
9
39
40 25 12
17 12
27 12
27
40 25
17
40
38 27 25 17
40 38
27 25 17 12
40 38
27 25 17 12
40 38
27 25 17 12
40 38
27 25 17 12
40 38
27 25 17 12
40 38 27 25 17
40 38 27 25 17
40 38 27 25 17
40 38 27 25 17
12
12
12
37
40 37 25
37
37 27
37
37 18
37
37 17
CS_CE2
CS_CE1
CS_IORD
CS_IOWR
ATA_CS1
ATA_CS0
IDE
IDEINTRQ
IDECHRDY
IDECS0
IDECS1
IDEDMACK
IDEDMARQ
IDERD
IDEWR
IDERST
IDEA9
IDEA8
IDEA7
IDEA6
IDEA5
IDEA4
IDEA3
IDEA2
IDEA1
IDEA0
IDEDD15
IDEDD14
IDEDD13
IDEDD12
IDEDD11
IDEDD10
IDEDD9
IDEDD8
IDEDD7
IDEDD6
IDEDD5
IDEDD4
IDEDD3
IDEDD2
IDEDD1
IDEDD0
CARDSLOT
CS_WAIT
CS_OE
CS_WE
ATA_INTRQ
ATA_DMARQ
ATA_CHRDY
ATA_DMACK
ATA_RD
ATA_WR
ATA_RST
ATA_VREF
UATA100
ATA_A1
ATA_A2
ATA_A0
ATA_D12
ATA_D11
ATA_D15
ATA_D14
ATA_D13
ATA_D10
ATA_D9
ATA_D3
ATA_D2
ATA_D1
ATA_D0
ATA_D4
ATA_D8
ATA_D7
ATA_D6
ATA_D5
(5 OF 9)
IICDATA_1
IICCLK_1
IICCLK_0
IICDATA_0
TST_PLLEN
TST_MONOUT
TST_MONIN
TEI
TRSTN
TMS
TCK
TDO
TDI
TEST
MDC
GBE_REFCLK
MDIO
COL
CRS
GTX_CLK
RXD_6
RXD_4
RXD_5
RXD_3
RXD_7
RXD_2
RXD_1
RX_ER
RX_DV
RX_CLK
RXD_0
FW_PINT
FW_LINKON
FWR_LCLK
TX_ER
TX_EN
TX_CLK
TXD_0
RESET
PURESET
PHY_LPS
PHY_CTL0
PHY_CTL1
PHY_LREQ
FWR_PCLK
(4 OF 9)
MISC
TXD_3
TXD_2
TXD_1
TXD_4
TXD_5
TXD_6
TXD_7
GB ETHERNET
FIREWIRE
PHY_DATA0
PHY_DATA1
PHY_DATA2
PHY_DATA3
PHY_DATA5
PHY_DATA7
PHY_DATA4
PHY_DATA6
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
ENET_TXD SERIES TERMINATION
NOT USING CARDSLOT INTERFACE
DESCRIPTION
JTAG MODE
NORMAL OPERATION
VIEW PLLS (SOFTWARE)
VIEW PLLS (HARDWARE)
ATPG NORMAL
ATPG IDDQ
TEST TRI-STATE
FUNCTIONAL TEST WITHOUT
POSTSCALAR BYPASS
FUNCTIONAL TEST WITH
POSTSCALAR BYPASS
FUNCTIONAL TEST IDDQ
X(I)
X(I)
X(I)
X(I)
X(I)
BYPASS
SYNC/MEM DATA
PLL OUTPUTS
SELECTED
PLL OUTPUTS
SELECTED
(OUTPUT)
X
ANALYZER_CLK
TST_PLLEN_H
X
0
1
1
0
MEMWE
1
0
1
X
1(I)
0(I)
0(I)
1(I)
1(I)
0(I)
1(I)
0(I)
(OUTPUT)
TPDENABLE
DDR_
X
(I/O)
JTG_TDI_H
(I/O)
JTG_TDO_H
TST_TEI_H
X X
(OUTPUT)
SHUTDOWN
EXTPLL
(INPUT)
TESTSEL5
HWPLL_
(OUTPUT)
0
0
0(I)
0(I)
0(I)
1(I)
1(I)
1(I)
0
1
1
1
1
1
10
0
0
0
0
0
0
0
0
1
JTG_RSTN_L
INT - ENET/FW/UATA
EIDE/I2C
ADDR LSB INDICATES READ (’1’) OR WRITE (’0’) MODES
PMU
I2C-2
I2C-1I2C-0
BUS
ADDR
A0-WR
A1-RD
A2-WR
A3-RD
AC-WR
AD-RD
AE-WR
AF-RD
84-WR
85-RD
58-WR
59-RD
6A-WR
6B-RD
D0-WR
D1-RD
B0-WR
B1-RD
N/A
N/A
N/A
N/AN/A
N/A
MMM
U56 - PG 15
CLOCK SLEW SSCG
N/AN/A
N/A
U36 - PG 23
LMU
U37 - PG 23
BOOTBANG E2PROM
N/A
J23 - PG 12
RAM - REVERSED
U3 - PG 24
FAN CONTROLLER
N/A
N/A
N/A
N/A
N/A
J20 - PG 12
RAM - STANDARD
(MAIN) (MAIN)
J12 - PG 24
SNAPPER SOUND
N/A
N/A
N/A
N/A
N/A
N/AN/A
J9 - PG 25
DASH MODEM
N/A
N/AN/A
N/A N/A
(SLEEP)
(SLEEP)
I2C PULL-UPS
TEST PULL-UPS/DOWNS
UDMA - STOP
UDMA - HOSTDMARDY/HSTROBE
UDMA - DEVICEDMARDY/DSTROBE
.
CS_WAIT IS AN INPUT
1K
5%
1/16W
MF
402
10K
5%
1/16W
SM1
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
22
5%
1/16W
SM1
+3V_MAIN
10K
5%
1/16W
MF
402
+3V_MAIN
+3V_MAIN
1K
5%
1/16W
MF
402
2.2K
5%
1/16W
SM1
2.2K
5%
1/16W
SM1
2.2K
5%
1/16W
SM1
2.2K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
402
MF
1/16W
1%
1K
INTREPID-REV2.1
BGA
CRITICAL
402
MF
1/16W
5%
82
402
MF
1/16W
5%
82
CRITICAL
INTREPID-REV2.1
BGA
22
5%
1/16W
MF
402
22
5%
MF
1/16W
402
10
5%
1/16W
MF
402
10
5%
1/16W
MF
402
10
5%
1/16W
MF
402
02
051-6694
13
45
CSLOT_CE1_L_SPN
UIDE_REF
EIDE_DATA<7>
CLKENET_LINK_GBE_REF
ENET_LINK_RXD<5>
ENET_LINK_RXD<1>
ENET_LINK_TXD<7>
ENET_LINK_TXD<5>
ENET_PHY_TX_ER
UIDE_DATA<0>
UIDE_DATA<2>
UIDE_DATA<3>
UIDE_DATA<7>
EIDE_DATA<0>
CSLOT_ADDR3_SPN
CSLOT_ADDR4_SPN
CSLOT_ADDR5_SPN
CSLOT_ADDR6_SPN
CSLOT_ADDR7_SPN
CSLOT_ADDR8_SPN
CSLOT_ADDR9_SPN
CSLOT_IORD_L_SPN
CSLOT_IOWR_L_SPN
CSLOT_OE_L_SPN
CSLOT_WE_L_SPN
CSLOT_IOWAIT_L_PU
HD_INTRQ
HD_DMARQ
EIDE_DATA<1>
EIDE_DATA<2>
EIDE_DATA<3>
EIDE_DATA<5>
EIDE_DATA<4>
EIDE_DATA<6>
EIDE_DATA<8>
EIDE_DATA<10>
EIDE_DATA<9>
EIDE_DATA<12>
EIDE_ADDR<2>
EIDE_IOCHRDY
EIDE_ADDR<1>
EIDE_ADDR<0>
EIDE_DATA<14>
EIDE_DATA<15>
EIDE_DATA<13>
EIDE_DATA<11>
UIDE_DATA<1>
UIDE_DATA<4>
UIDE_DATA<6>
UIDE_DATA<8>
UIDE_DATA<10>
UIDE_DATA<13>
UIDE_DATA<15>
UIDE_DATA<5>
UIDE_ADDR<2>
UIDE_DMACK_L
UIDE_IOCHRDY
FW_PHY_LREQ
CLKFW_PHY_LCLK
CLKFW_LINK_PCLK
FW_LINK_LREQ
FW_LINK_CNTL<0>
FW_LINK_CNTL<1>
FW_PHY_LPS
FW_LINK_DATA<6>
FW_LINK_DATA<2>
FW_LINK_DATA<0>
FW_LINK_DATA<1>
ENET_LINK_TXD<4>
ENET_LINK_TXD<1>
ENET_LINK_TX_EN
FW_LKON
FW_PINT
CLKFW_LINK_LCLK
CLKENET_LINK_RX
ENET_RX_DV
ENET_RX_ER
ENET_LINK_RXD<0>
ENET_CRS
ENET_COL
ENET_MDIO
ENET_MDC
INT_TST_MONIN_PD
INT_TST_PLLEN_PD
INT_I2C_CLK0
INT_I2C_DATA0
INT_I2C_DATA1
INT_I2C_CLK1
INT_JTAG_TEI
JTAG_ASIC_TMS
JTAG_ASIC_TCK
JTAG_ENET_TDO
INT_RESET_L
INT_PU_RESET_L
ENET_PHY_TXD<1>
ENET_PHY_TXD<0>
ENET_PHY_TXD<3>
ENET_PHY_TXD<4>
ENET_LINK_TXD<4>
ENET_PHY_TXD<2>
ENET_PHY_TXD<5>
ENET_PHY_TXD<7>
ENET_PHY_TXD<6>
ENET_LINK_TXD<6>
INT_I2C_DATA0
INT_I2C_CLK0
INT_I2C_DATA1
INT_I2C_CLK1
INT_JTAG_TEI
JTAG_ASIC_TRST_L
INT_TST_MONIN_PD
INT_TST_PLLEN_PD
JTAG_ASIC_TDO
JTAG_ENET_TDO
JTAG_ASIC_TMS
JTAG_ASIC_TCK
FW_LINK_DATA<7>
FW_LINK_DATA<3>
FW_LINK_DATA<4>
FW_LINK_DATA<5>
CLKENET_LINK_TX
ENET_LINK_TXD<5>
ENET_LINK_TXD<7>
ENET_LINK_TXD<3>
ENET_LINK_TX_ER
ENET_LINK_TXD<0>
ENET_LINK_TXD<3>
ENET_LINK_TXD<6>
UIDE_INTRQ
UIDE_DIOR_L
UIDE_DIOW_L
UIDE_RST_L
UIDE_ADDR<1>
UIDE_ADDR<0>
UIDE_DATA<14>
UIDE_DATA<12>
UIDE_DATA<11>
UIDE_DATA<9>
UIDE_CS0_L
UIDE_CS1_L
UIDE_DMARQ
CSLOT_CE2_L_SPN
CLKENET_PHY_GTX
ENET_LINK_RXD<6>
ENET_LINK_RXD<7>
CLKENET_LINK_GTX
EIDE_INT
EIDE_DMARQ
EIDE_DMACK_L
EIDE_RD_L
EIDE_WR_L
EIDE_RST_L
EIDE_CS1_L
EIDE_CS0_L
ENET_PHY_TX_EN
ENET_LINK_TXD<2>
ENET_LINK_RXD<2>
ENET_LINK_RXD<3>
ENET_LINK_RXD<4>
JTAG_ASIC_TDO
JTAG_ASIC_TRST_L
INT_TST_MONOUT_TP
ENET_LINK_TXD<0>
ENET_LINK_TXD<2>
ENET_LINK_TXD<1>
R626
1 2
RP12
2 7
RP12
1 8
RP12
4 5
RP12
3 6
RP16
3 6
RP16
2 7
RP16
4 5
R154
1
2
U45
Y5
AB1
Y7
AA5
AA4
AB2
V5
T1
W4
W5
Y2
Y1
W7
Y8
U1
U2
V4
V2
W1
V1
W2
W8
AC1
AC2
AA8
AA2
Y4
Y15
AA1
AD1
AB4
AB5
AD2
AC4
AE2
AE1
AF5
AE7
AK1
AG5
AH4
AL1
AK2
AH5
AF7
AG7
AK4
AB7
AM1
AC5
AD4
AF4
AH2
AD7
AG4
AJ1
AJ2
AF1
AG1
AF2
AH1
AD5
AG2
AE4
AE5
AG8
AH7
AA7
AL2
AJ4
AM2
R51
1 2
R92
1 2
U45
C5
E6
U14
T7
N2
N1
L13
H12
AN2
AK5
AN1
AM3
B6
B5
P5
L1
L4
M4
P7
N5
K1
K2
L2
N4
M1
M2
T2
U5
D3
E7
D6
B4
A4
D7
G9
E8
J12
C4
D2
AP5
AK8
AT5
AH10
AR5
AN6
AM7
AK10
AR6
H10
E9
D8
A6
B7
G10
D9
E10
H9
A7
A5
R145
1 2
R34
1 2
R624
1 2
R630
1 2
R124
1 2
R629
1 2
RP16
1 8
R621
1 2
R52
1
2
RP15
2 7
RP14
4 5
RP14
3 6
RP14
1 8
RP14
2 7
RP15
3 6
RP15
1 8
RP15
4 5
R117
2 1
39
38 25
37 28
38 28
38 28
38 13
38 13
38 28
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 29
37 29
37 29
38
38 29
38 29
29
38 29
38 29
38 29
38 29
38 13
38 13
38
29
38 29
37
37 28
38 28
38 28
38 28
38 28
38 28
38 28
38 28
13
13
40 23 13 11
6
40 23 13 11
6
40 26 24 23 14 13
40 26 24 23 14 13
13
40 28 13
40 28 13
28 13
31
9
31 26
38 28
38 28
38 28
38 28 38 13
38 28
38 28
38 28
38 28 38 13
40 23 13 11
6
40 23 13 11
6
40 26 24 23 14 13
40 26 24 23 14 13
13
40 28 13
13
13
40 14 13
28 13
40 28 13
40 28 13
38 29
38 29
38 29
38 29
37 28
38 13
38 13
38 13
38
38 13
38 13
38 13
38
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38
37 28
38 28
38 28
37
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 25
38 28
38 13
38 28
38 28
38 28
40 14 13
40 28 13
38 13
38 13
38 13
(PLL9)
(PLL7)
(PLL3)
(PLL2)
(PLL1)
VSSA_8
VSSA4
VSSA3
VSSA2
VSSA1
(PLL9)
(PLL7)
(PLL3)
(PLL2)
(PLL1)
VDD15A_8
VDD15A_4
VDD15A_3
VDD15A_2
VDD15A_1
CPU_INT
PCIPME
EXTINT12
EXTINT13
EXTINT14
EXTINT15
EXTINT16
EXTINT17
GPIO16
GPIO15
GPIO12
GPIO11
GPIO9
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
VSSU_2
VDDU33_2
VDDU33_1
(6 OF 9)
SCCRTSA
SCCTXDA
SCCDTRA
SCCRXDA
SCCGPIOA
SCCTRXCA
SCCTXDB
SCCGPIOB
SCCTRXCB
SCCRXDB
SCCRTSB
PURPOSE
GENERAL
I/O’S
EXTINT8
EXTINT7
EXTINT6
EXTINT0
INTERRUPTS
EXTINT11
EXTINT4
EXTINT5
EXTINT10
EXTINT9
EXTINT3
EXTINT2
EXTINT1
AUD_DTO
AUD_DTI
AUD_SYNC
MOD_DTO
AUD_BITCLK
AUD_CLKOUT
IICCLK_2
MOD_SYNC
MOD_DTI
MOD_CLKOUT
IICDATA_2
MOD_BITCLK
IIC
AUDIO/I2S
CLOCKS
XTAL_OUT
PROCSLEEPREQ
PENDPROCINT
XTAL_IN
SS_REF_CLK_IN
BUF_REF_CLK_OUT
STOPXTAL
WATCHDOG
PCI_
PCI_
PCI_
VSSU_1
PCI_
USB_VD0_P
USB_VD0_N
USB_VD1_P
USB_VD1_N
USB_VD2_N
USB_VD2_P
USB_PWRFLT0
USB_PRTPWR0
USB_VD3_N
USB_VD3_P
USB
USB_PRTPWR1
USB_PWRFLT1
USB_VD4_N
USB_VD4_P
USB_VD5_N
USB_VD5_P
USB_PRTPWR2
USB_PWRFLT2
ADJ
BYP
GND
OUT
NC
NC
SHDN
IN
CPU0
VDDA
VDD0
VDD1
VDDC
VDDQ
VSS1
VSS0
VSSA
VSSC
VSSQ
LOCK
ODSEL
PD*
SDATA
SCLK
FSEL
CLKIN
RESET*
ADDRSEL
TABLE_ALT_ITEM
TABLE_ALT_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_5_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
NC
NC
USB POWER FAULT SIGNALS
OUTPUT IMPEDANCE ~18-20OHM
INTERNAL 250K PULL-UP
OPEN-DRAIN OUTPUT
INTERNAL 250K PULL-UP
PLACE R68 CLOSE TO INTREPID SIDE
USB PORT ASSIGNMENTS
PORT A - RIGHT USB 1
PORT C - LEFT USB
PORT D - MODEM
PORT E - BLUETOOTH
R89,R80 NEED PLACE NEAR TPAD CONNECTOR
PORT F - TPAD
INT - USB/GPIOS/I2S
SIGNAL NAME
MOD_BITCLK_B_H
MOD_CLKOUT_B_H
MOD_DTO_B_H
MOD_SYNC_B_H
MOD_DTI_B_H
JTG_TDO_H
0
1
2
3
4
5
TESTMUXSEL
HWPLL_
VGATE/LOCK INTERRUPT
CBUS_IREQ_L
FAN PWM
BRIGHTNESS PWM
CONTRAST PWM
POWERBOOK SPARE
VIA
MISO
REQ*
MOSI
ACK*
SCK
VCORE_A/B SEL
CRYSTAL LOAD CAPACITANCE IS 16PF
PORT B - UNUSE
INTERNAL 250K PULL-DOWN
OTHERWISE A LOT OF OVERSHOOT/UNDERSHOOT
+3V_MAIN
10UF
20%
6.3V
CERM
805
100K
5%
1/16W
MF
402
+3V_MAIN
402
CERM
10V
20%
0.1UF
0.01UF
20%
16V
CERM
402
22
5%
1/16W
MF
402
22
5%
1/16W
MF
402
22
5%
1/16W
MF
402
47
5%
1/16W
SM1
47
5%
1/16W
SM1
47
5%
1/16W
SM1
47
5%
1/16W
SM1
22
5%
1/16W
MF
402
INTREPID-REV2.1
BGA
CRITICAL
+3V_SLEEP
INTREPID_USB
24
5%
1/16W
MF
402
15K
5%
1/16W
MF
402
INTREPID_USB
24
5%
1/16W
MF
402
0.22UF
6.3V
20%
402
CERM
4.7
5%
1/16W
MF
402
CERM
0.22UF
20%
6.3V
402
4.7
5%
1/16W
MF
402
0.22UF
20%
6.3V
CERM
402
4.7
5%
1/16W
MF
402
0.22UF
20%
6.3V
CERM
402
15K
5%
1/16W
MF
402
0.22UF
20%
6.3V
CERM
402
4.7
5%
1/16W
MF
402
4.7
5%
1/16W
402
MF
8X4.5MM-SM
18.432M
CRITICAL
NO STUFF
402
MF
1/16W
5%
10M
22PF
5%
50V
CERM
402
22PF
5%
50V
CERM
402
NO STUFF
0
5%
1/16W
MF
402
CRITICAL
NO STUFF
U.FL-R_SMT
F-ST-SM
51
NO STUFF
5%
1/16W
MF
402
0
5%
1/16W
MF
402
1UF
20%
10V
CERM
603
68.1K
1%
1/16W
MF
402
15.8K
1%
1/16W
MF
402
20%
6.3V
CERM
805
10UF
NO STUFF
MF
603
1/16W
0
5%
0
5%
1/16W
MF
603
+2_5V_MAIN
+1_8V_MAIN
CRITICAL
LT1962-ADJ
MSOP
20%
0.01UF
16V
CERM
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
1K
5%
1/16W
MF
402 402
MF
1/16W
5%
1K
15K
5%
1/16W
MF
402
15K
5%
1/16W
MF
402
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
SM1
1/16W
5%
10K
10K
5%
1/16W
SM110K
5%
1/16W
SM1
10K
5%
1/16W
SM1
SSCG
75
5%
1/16W
MF
402
NO STUFF
10K
5%
1/16W
SM1
NO STUFF
10K
1/16W
5%
SM1
NO STUFF
10K
5%
1/16W
SM1
SSCG
MF
402
5%
1/16W
0
10K
5%
1/16W
MF
402
SSCG
402
10V
CERM
0.1UF
20%
SSCG
20%
10V
1UF
CERM
603
SSCG
0.1UF
20%
10V
CERM
402
SM-1
400-OHM-EMI
SSCG
+3V_MAIN
400-OHM-EMI
SM-1
SSCG
SSCG
0.1UF
20%
10V
402
CERM
+2_5V_MAIN
1/16W
402
MF
5%
0
SSCG
NO STUFF
10K
1/16W
MF
402
5%
NO STUFF
10K
5%
1/16W
MF
402
CRITICAL
TSSOP
SSCG
CY28512-2
33
SSCG
5%
1/16W
MF
402
SSCG
10K
5%
1/16W
MF
402
NO STUFF
0
5%
1/16W
MF
402
+3V_SLEEP
47
5%
1/16W
SM1
47
5%
1/16W
SM1
MOD_BITCLK
47
5%
1/16W
SM1
47
5%
1/16W
SM1
NEC_USB
1/16W
5%
MF
15K
402
NEC_USB
402
5%
MF
15K
1/16W
NEC_USB
10K
5%
1/16W
MF
402
NEC_USB
402
MF
1/16W
5%
10K
0
402
5%
1/16W
MF
10K
5%
1/16W
MF
402
NO STUFF
402
MF
1/16W
5%
0
5%
402
MF
1/16W
0
INT_GPIO0
0
5%
1/16W
MF
402
10K
1/16W
5%
SM1
10K
1/16W
SM1
5%
22
402
5% MF
1/16W
402
1/16W 5% MF
22
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
NO STUFF
0
5%
1/16W
MF
402
10K
5%
1/16W
SM1
10K
5%
1/16W
SM1
NO STUFF
0
5%
1/16W
MF
402
1/16W
10K
5%
MF
402
NO STUFF
0
5%
402
MF
1/16W
NO STUFF
0
5%
1/16W
MF
402
10K
5%
1/16W
MF
402
0
5%
1/16W
MF
402
NO STUFF
402
MF
1/16W
5%
10K
10K
5%
1/16W
MF
402
+3V_MAIN
NO STUFF
0
5%
1/16W
MF
402
MF
5%
402
0
1/16W
NO STUFF
10K
5%
1/16W
MF
402
SM
FERR-EMI-100-OHM
197S0004 197S0035 Y1 ALT FOR SIWARD
?
359S0074 359S0086 ALT FOR NEW SCREEN
U42
051-6694
4514
02
116S1104
1
RES,METAL FILM,10 K OHM,5,1/16W,0402,SM
R100
NO_SSCG
INT_EXTINT8_PU
PMU_INT_NMI
AUDIO_LO_DET_L
MMM_SIRQ_L
INT_I2C_DATA1
CG_ADDRSEL
CG_LOCK
CG_SYSCLK_EN
SYSTEM_CLK_EN
INT_GPIO1_PU
COMM_RING_DET_L
INT_GPIO15_PU
VCORE_VGATE
MAIN_RESET_L
INT_MOD_CLKOUT_UF
PMU_INT_L
USB_OC_CD_L
+1_5V_INTREPID_PLL8
+1_5V_INTREPID_PLL4
USB_DCP
MODEM_USB_DP
MODEM_USB_DM
SND_SCLK
SND_CLKOUT
MOD_SYNC
INT_I2C_CLK1
INT_REF_CLK_OUT
USB_DCM
USB_TPAD_N
USB_DEM
BT_USB_DM
USB_TPAD_P
INT_SND_CLKOUT
USB_DBM
USB_DAM
PMU_CLK
PMU_REQ_L
PMU_TO_INT
USB_DFP
USB_DFM
BT_USB_DP
USB_DEP
USB_DCM
USB_DAP
USB_D1P
COMM_DTR_L
COMM_RTS_L
+1_5V_INTREPID_PLL3
INT_WATCHDOG_L
INT_GPIO15_PU
INT_GPIO12_PU
SND_HP_MUTE_L
COMM_RESET_L
SND_HW_RESET_L
SND_AMP_MUTE_L
USB_DDM
USB_DBP
SND_SYNC
USB_DBM
USB_DEP
USB_PWREN_CD_L
USB_DBP
USB_DCP
MOD_DTO
USB_PWREN_AB_L
+1_5V_INTREPID_PLL1
INT_I2C_CLK2
INT_I2C_DATA2
CG_CLKOUT
+3V_INTREPID_USB
+1_5V_INTREPID_PLL2
COMM_GPIO_L
PMU_FROM_INT
INT_REF_CLK_OUT
INT_REF_CLK_IN
COMM_RXD
INT_AUDIO_TO_SND
INT_MOD_DTI
USB_OC_EF_L
MOD_CLKOUT
USB_OC_EF_L
INT_MOD_SYNC_UF
INT_MOD_CLKOUT_UF
INT_MOD_BITCLK_UF
INT_MOD_DTO_UF
COMM_TRXC
SND_TO_AUDIO
COMM_TXD_L
USB_DFP
USB_DFM
INT_SND_TO_AUDIO
USB_PWREN_EF_L
USB_DEM
USB_OC_CD_L
USB_DDM
USB_DDP
USB_OC_AB_L
USB_DAP
INT_SND_SYNC
INT_SND_SCLK
PMU_ACK_L
USB_DDP
USB_DAM
USB_D1M
LT1962_INT_BYP
MPIC_CPU_INT_L
USB2_PCI_INT_L
USB_OC_AB_L
USB_PWREN_CD_L
USB_PWREN_AB_L
USB2_PCI_INT_L
MMM_FFIRQ_L
LT1962_INT_ADJ
USB_PWREN_EF_L
AIRPORT_PCI_INT_L
LTC1962_INT_VIN
+3V_CG_PLL_MAIN
CBUS_INT_L
AIRPORT_PCI_INT_L
ENET_ENERGY_DET
AUDIO_LI_DET_L
AGP_INT_L
PMU_INT_L
INT_ENET_RST_L
CG_FSEL
+1_5V_INTREPID_PLL
INT_GPIO1_PU
COMM_SHUTDOWN
COMM_RING_DET_L
INT_EXTINT3_PU
+2_5V_CG_MAIN
VCORE_VGATE
CG_FSEL
INT_EXTINT10_PU
PMU_REQ_L
PMU_INT_NMI
CBUS_INT_L
INT_GPIO9_PU
FW_PHY_PD_INT
INT_MOD_BITCLK_UF
INT_MOD_SYNC_UF
SND_HW_RESET_L
INT_MOD_DTI_UF
INT_EXTINT13_PU
INT_GPIO12_PU
INT_EXTINT3_PU
JTAG_ASIC_TDO
CLK18M_XTAL_IN
INT_EXTINT14_PU
INT_EXTINT8_PU
CG_RESET_L
CG_SYSCLK_EN
CLK18M_INT_EXT
SYSTEM_CLK_EN
CLK18M_INT_XOUT
CLK18M_INT_XIN
INT_PEND_PROC_INT
INT_PROC_SLEEP_REQ_L
PMU_PME_L
INT_EXTINT13_PU
MMM_SIRQ_L
MMM_FFIRQ_L
INT_EXTINT10_PU
INT_EXTINT14_PU
INT_MOD_DTO_UF
INT_EXTINT16_PU
FW_PHY_PD_INT
FW_PHY_PD
INT_GPIO9_PU_H
INT_EXTINT16_PU
INT_REF_CLK_IN
INT_GPIO9_PU
L1
2
1
C85
1
2
C84
1
2
R91
1 2
R90
1 2
R115
1
2
R114
1
2
C97
1
2
R111
1 2
R50
1 2
R67
1 2
RP8
2 7
RP8
3 6
RP8
4 5
RP8
1 8
U45
P2
R5
R7
R4
T5
U15
D30
F33
E34
B32
E30
J9
F4
D1
E2
H7
G4
C33
D34
B33
A33
E31
G30
D31
C32
G5
E1
J5
K8
F1
K7
J7
F2
J8
H5
L9
H4
AL4
AH8
V8
P1
T4
R2
R1
AJ7
AA16
AJ12
AJ17
AJ18
AN8
AT6
AF10
AG9
AP4
AN3
AL5
AG11
AG10
AT4
AM5
AF9
AR4
K9
AN7
J4
J2
M5
K4
J1
N7
L7
L8
G1
G2
H1
H2
M8
M7
L5
K5
N8
P8
AG29
T8
U8
AA15
AJ13
AJ16
AK18
AH29
R9
R8
AT7
U4
V15
R614
1 2
R609
1 2
C198
1
2
R155
1 2
C148
1
2
R125
1 2
C182
1
2
R156
1 2
C353
1
2
C200
1
2
R244
1 2
R168
1 2
Y1
1 2
R622
12
C140
1
2
C15
1
2
R49
1 2
J1
3
2
1
R28
1
2
R632
1
2
C433
1
2
R277
1
2
R278
1
2
C419
1
2
R291
1 2
R264
1 2
U7
2
3
4
8
6
7
1
5
C424
1
2
R7
2 1
R113
2 1
R29
2
1
R102
2
1
R89
1 2
R80
1 2
RP47
8 1
RP47
6 3
RP7
1 8
RP47
7 2
RP48
1 8
RP29
2 7
RP29
4 5
RP51
2 7
RP29
1 8
RP48
2 7
RP29
3 6
RP24
1 8
RP7
3 6
R100
2
1
RP1
4 5
RP1
3 6
RP1
2 7
R636
1 2
R638
1
2
C691
1
2
C692
1
2
C698
1
2
L22
1
2
L18
1
2
C686
1
2
R281
1 2
R656
1
2
R682
1
2
U42
14
20
16
3
2
4
13
17
9
8
11012
5
18
7
19
11
6
15
R634
1 2
R625
1
2
R631
1
2
RP56
2 7
RP56
3 6
RP56
1 8
RP56
4 5
R701
R708
12
R699
1
2
R707
1
2
R698
1 2
R720
1 2
R285
1 2
R604
1 2
R608
1 2
RP48
3 6
RP7
4 5
R66
1 2
R41
1 2
R204
1 2
R219
1 2
R220
R530
1 2
RP51
1 8
RP51
3 6
R819
1 2
R820
R825
1 2
R780
1 2
R770
R554
1 2
R863
1 2
R864
1 2
R897
1 2
R896
1 2
R895
1 2
40 26
14
31 14
26
24 14
40 26 24 23 13
14
31 14
35 14
40 31 26 14
26 14
39 35 14
40 31 27 25 20 18 17
14
31 14
14
39
39
27 14
40 38 26
40 38 26
40 37 26
40 37 26
40 26
40 26 24 23 13
37 14
27 14
23
38 14 40 38 25
23
14
27 14
31
31 14
31
38 14
38 14
40 38 25 38 14
27 14
27 14
27
40 26
40 26
39
31
26 14
26 14
26
40 26
40 26 14
26
14
14
40 26
14
38 14
14
14
27 14
40 26
14
39
40 26
40 26
39
39
40 26
31
37 14
37 14
40 26
40 26
40 26
14
40 26
14
14
14
14
14
40 26
40 26
40 26
38 14
38 14
14
38 14
14
14
14
14
27 14
31
14
27 14
27
5
27 14
14
14
14
27 14
24 14
14
40 25 14
39
39
17 14
40 25 14
28
26
18
31 14
28
14
39 12
8
35 14
40 26
40 31 26 14
26 14
39
39 35 14
14
14
31 14
31 14
17 14
26 14
14
14
14
40 26 14
14
26 14
26 14
40 13
37
26 14
14
14
37
31 14
37
37
31
31
31 27
14
24 14
24 14
14
26 14
14
14
14
29
14
37
14
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