Apple A1106 Schematic

REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
ANGLES
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
DATE
APPD
ENG
DATE
APPD
CK
ECN
ZONE
REV
DO NOT SCALE DRAWING
X.XXX
X.XX
XX
DIMENSIONS ARE IN MILLIMETERS
THIRD ANGLE PROJECTION
D
SIZE
APPLICABLE
NOTED AS
MATERIAL/FINISH
NONE
SCALE
DESIGNER
MFG APPD
DESIGN CK
RELEASE
QA APPD
ENG APPD
DRAFTER
METRIC
OF
SHT
DRAWING NUMBER
TITLE
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
Apple Computer Inc.
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
DESCRIPTION OF CHANGE
SCHEM,MLB,PB15"
12/17/2004
PAGE
VIDEO CONNECTORS - INVERTER,DVI,
13
DDR MEMORY MUXES
36
MPC7447A MAXBUS INTERFACE
MPC7447A DATA/NC PINS/BOOTBANGER
CPU PLL AND CONFIGURATION STRAPS
REVISION HISTORY
SIGNAL CONSTRAINTS(PG4)-POWER NETS
SIGNAL CONSTRAINTS(PG3)-DIGITAL/DIFF
SIGNAL CONSTRAINTS(PG2)-CPU
PBUS SUPPLY,PMU SUPPLY,SUPERCAP
PMU
LVDS,S-VIDEO
27 28
SYSTEM BLOCK DIAGRAM
TITLE PAGE AND CONTENTS
CONTENTS
SIGNAL CONSTRAINTS(PG1)-DDR MEM/CLK
CARDBUS INTERFACE (PCI1510)
3.3V/5V SYSTEM POWER SUPPLY
BATTERY CHARGER AND CONNECTOR
BBANG INT_2_5V_HOT
(BETTER/BEST)
(BEST128)
(BEST128)
(BETTER/BEST)
PAGE
1 2 3 4
6
5
7 8
9 10 11 12
14
17 18 19 20
22
43-46
42
41
39
38
35
34
33
32
30
29
26
25
24
23
POWER BLOCK DIAGRAM
PCB NOTES AND HOLES
INTREPID MAXBUS AND BOOT STRAPS
INTREPID MEMORY INTERFACE/BOOTROM
400PIN STACKED DDR SODIMM CONNECTOR
INTREPID AGP 4X/PCI
USB 2.0 INTERFACE (uPD720101)
16
15
INTERFACES INTREPID GPIOS/SERIAL/USB
37
SCHEMATIC CREF AND NETLIST REPORTS
1.5V/1.8V/2.5V SYS. POWER SUPPLIES
CPU CORE VOLTAGE POWER SUPPLY
,BACKUP BATTERY
FIREWIRE PORTS
FIREWIRE PHY
GIGABIT ETHERNET INTERFACE
INTERNAL CONNECTORS-AIRPORT,HDD,ODD
MMM & BATTERY CURRENT SENSE CIRCUIT
SPIDEY,PWR BUTTON,ALS
STUFF 1_8V_MAXBUS NO_SSCG 5V_HD_LOGIC NO_BBANG
ATI_MEMIO_HI
INT_2_5V_COLD
SOFT_MODEM
EMI
GPU_PWRMSR GPU_SS
VGA_BUFFER_RES
MMM
SUPERCAP ADT7460
INT_TMDS
EXT_TMDS
ADT7467
NO STUFF
3V_HD_LOGIC
1_5V_MAXBUS SSCG
ATI_MEMIO_LO
USB_MODEM
EXT_TMDS
INT_TMDS
BACKUP_BATT
40
INTERFACES/SSCG
INTREPID DECOUPLING
M11 AGP INTERFACE & SPREAD SPECTRUM
EXTERNAL TMDS (DUAL TMDS - SIL178)
M11 LVDS/TMDS/GPIO & GPU VCORE
M11 POWER
21
FAN CONTROLLER,SW MODEM,SERIAL DEBUG SOUND/LEFT USB/BLUETOOTH
BOM OPTIONS (IN COMMON PARTS)
CONTENTS
31
INTREPID ENET/FW/UATA/EIDE
INTREPID POWER RAILS/1.5V LDO
FUNCTIONAL TESTPOINTS
051-6680
A
46
?
1
PRODUCTION RELEASED
12/17/04
356292
A
SCHEM,MLB,PB15
051-6680
1
SCH1
SCHEM,MLB,PB15
1
820-1679 PCB1
PCBF,MLB,PB15
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
NOT USED
NOT USED
(INTERNAL MEM)
(INTERNAL MEM)
U16/U18/U28/U27
(INTERNAL MEM)
(INTERNAL MEM)
J5
U8
NOT USED
@ 400MHZ
2 DATA PAIRS
NOT USED
Ethernet
Connector
P.28
J23
4 DATA PAIRS
U43
Ethernet
PHY
P.28
G/MII
3.3V
10/100/1000
8BIT TX 8BIT RX 125MHZ
U15/U20/U58
MMM
P.25
BATTERY
CURRENT
U41
SENSOR
P.25
BlueTooth (LIO)
P.27
J3
J10
SPIDEY
P.24
MAXBUS
1.8V
167MHZ 32BIT ADDRESS 64BIT DATA
U56
APOLLO
CPU
(MPC7447)
P.5-6
PMU
P.7
Config
CPU PLL
P.11
SO-DIMM Connector
DDR SDRAM DIMM 1
DDR SDRAM DIMM 0
J25
P.10
2:1 DDR MUXES
64BITS
167MHZ
2.5V
MEMORY BUS
P.9
DDR MEMORY
P.8
MAXBUS
P.12
4X AGP
P.12
33MHZ
64BITS
PCI
INTREPID
U51
P.14
USB PORT F
P.14
USB PORT E
P.14
USB PORT D
P.14
USB PORT C
P.14
USB PORT B
P.14
USB PORT A
ETHERNET
10/100/1000
P.13
FIREWIRE
400 MB/S
P.13
UATA 100
P.13
EIDE
P.13
CARDSLOT
P.13
I2S
P.14
I2C
P.13 P.14
SCCA
P.14
VIA/PMU
P.14
BOOTROM
P.12
NOT USED
I2C
I2CI2S
EIDE
P.26
Connector
HDD
P.26
Connector
ODD
J13
J12
J24
FW - A
Connector
P.30
2 DATA PAIRS @ 200MHz
U36
FireWire
PHY
P.29
1394 OHCI
3.3V
8BIT TX/RX
50MHZ
J20
FW - B
Connector
P.30
UIDE
J15
SW MODEM
Connector
P.27
J3
LIO/Audio
Connector
P.27
P.27
Circuit
Fan
U53/J1/J18
J8
SLEEP
P.24
J28
Serial Debug
Connector
P.27
U11
BOOT ROM
1M X 8
P.9
5V
SERIAL
PMU
U28
3.3V
SMBUS
P.32
Connector
Battery
J26
P.32-36
& Charger
Power Supply
P.32
Connector
DC-In
J27
P.33
SUPERCAP
C692
BACKUP
BATTERY
CONNECTOR
P.33
J16
P.24
Connector
ALS BOARD
P.24
Connector
RUX Board
J2
J19
CARDBUS
Connector
P.18
33MHZ 16/32 BITS
3.3V/5V
TI PCI1510
CardBus
Controller
P.18
PCI BUS
33MHZ
32BITS
3.3V
AIRPORT
Connector
P.26
P.31
U47
ATI M11
64MB
P.19-22
AGP BUS
1.5V/3.3V
66MHZ
32BITS
J4
Inverter
Connector
P.23
J14
LCD Panel
Connector
P.23
LVDS
EDID (I2C)
COMPOSITE
TMDS
(VIA SIL1162)
RGB
DDC
DVI-I
P.23
J22
P.23
J21
MEMORY CH. A
MEMORY
CH. C
MEMORY CH. D
MEMORY CH. B
RIGHT USB
J17
(VIA STATLER)
P.27
P.27
(VIA LIO)
LEFT USB
J3
P.17
EHCI HC
NEC USB2.0
U17
SYSTEM BLOCK DIAGRAM
ConnectorConnector
S-Video
S-VIDEO
J6
LED
051-6680
A
46
2
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
+PBUS
14V CHARGES BACKUP BATTERY
BACKUP BATTERY
+5V_MAIN
MAP31 DDR CORE
<~13.44V SHUTS-OFF
+PBUS
PG 33
PG 33
+1.5V_MAIN
+2.5V_MAIN
+BATT
14V_PBUS
+5V_MAIN
+3V_PMU
+4_6V_BU
+5V_MAIN
1V20_REF
>~13.44V TURNS-ON
+3V_PMU
INTERNAL ZENER CLAMP TO 6V
TURNS ON AT >1V
STARTS 2.0MSEC AFTER DCDC_EN_L BECOMES LOW
DCDC_EN_L WILL PULL ON1/ON2
1_5V_2_5V_OK
RC AT 1M*0.1UF @ 24V
STARTS ~4.25MSEC AFTER DCDC_EN_L BECOMES LOW
LDO
BACKUP BATTERY CIRCUIT CHARGES OFF +PBUS
(D3COLD)
(D3HOT)
(AT LTC1778 RUN/SS)
(MAX1715 OUTPUT)
+PBUS
DDR POWER
AGP I/O
+PBUS
3S 2P 18650 CELLS
INTERNAL ZENER CLAMP TO 6V
DCDC_EN_L D3_HOT
D3_HOT
1_5V_2_5V_OK WILL NOT PULL LOW UNTIL +5V_MAIN TURNS ON
BECOMES ’1’; MUCH LESS THAN THE
DCDC_EN_L OR PMU_POWERUP_L
RC CHARGING AT INT_VCC (5V)
HOWEVER, 5V SHOULD TURN ON ~2.23MS AFTER
D3_COLD
14V_PBUS
(UNTIL DRAINED)
-
+
AFTER PMU IS UP AND RUNNING
DCDC_EN_L
TURNS ON AT >1V
<100UA ALLOWED
<100UA ALLOWED
INTERNAL 1.2UA CURRENT SOURCE
INTREPID CORE
MAP31 DDR I/O
24V IS OUTPUT ONLY FROM
LOW IN SHUTDOWN
AND PREVENTS +PBUS AND +24V_PBUS FROM DROPPING BELOW 6V
POWER SYSTEM ARCHITECTURE
AC
ADAPTER
IN
PG 32
INRUSH
LIMITER
PG 32
+24V_PBUS
RUN/SS
BUCK
REGULATOR
VCC
NO AC: BATTERY VOLTAGE
AC: 12.8V
PG 33
(LTC1625)
1625 NOT RUNNING
SHUTDOWN: RUNNING
SLEEP: RUNNING
RUN: RUNNING
BATTERY VOLTAGE
FEED-IN PATH
PG 32
WHEN ONLY BATTERY IS CONNECTED
NO INRUSH PROTECTION
PG 36
RUN: RUNNING
SLEEP: STOPPED
SHUTDOWN: STOPPED
(LTC3411)
DC/DC
MAXBUS
+1.8V_MAIN
PG 32
(MAX1772)
CHARGER
BATTERY
+BATT
PG 33
& BOOST OUTPUT
CHARGER INPUT
BATTERY
BACKUP
+24V_PBUS
WHEN ONLY BATTERY IS CONNECTED
NO INRUSH PROTECTION
STBYMD
PGOOD
PG 34
(LTC3707)
DC/DC
MAIN 3V/5V
VCC
SHUTDOWN: STOPPED
SLEEP: RUNNING
RUN: RUNNING
RUN/SS - 3V
RUN/SS - 5V
+5V_MAIN
3V_5V_OK
+3.3V_MAIN
RC AT 1M*0.047UF @ 24V
BACKLIGHT
INVERTER
+5V_MAIN
MAIN 2.5V/1.5V
VCC
DC/DC
(MAX1715)
PG 36
PGOOD
SHUTDOWN: STOPPED
SLEEP: RUNNING
RUN: RUNNING
TURNS ON OUTPUT @ 2.4V
ON1/ON2
DCDC_EN
SLEEP
MAXBUS
SEQUENCING
+5V_MAIN
VCC
SHDN
DC/DC
(MAX1717)
SHUTDOWN: STOPPED
SLEEP: STOPPED
RUN: RUNNING
PG 35
CPU_VCORE
(+1.385V)
GPU_VCORE
+1.2V
VCC
EXT_VCC
DC/DC
(LTC1778)
SHUTDOWN: STOPPED
SLEEP: D3COLD
RUN: RUNNING
TURNS ON AS LOW AS 0.8V/TYP 1.5V
PG 20
RUN/SS
DCDC_EN
SLEEP
GPU_VCORE
SEQUENCING
1M & 0.1UF @14V, IT TAKES ~5.88MS TO START SWITCHER
1_5V_2_5V_OK
HOLDS BOTH RUN/SS AT GND WHEN IT’S CONNECTED TO GND
TURNS CONTROL TO RUN/SS WHEN IT’S OPEN
POWER BLOCK DIAGRAM
SHUT-DOWN
RUN
SLEEP
RUN
SHUT-DOWN
SLEEP
SLEEP_L_LS5
DCDC_EN
DCDC_EN_L
+5V_MAIN
+5V_SLEEP
+3V_MAIN
+3V_SLEEP
3V_5V_OK
+2_5V_MAIN
+2_5V_SLEEP
+1_5V_MAIN
+1_5V_SLEEP
1_5V_2_5V_OK
1_5V_2_5V_OK
GPU_VCORE GPU_VCORE
~8.2MS
??? MS
??? MS
2.4V - ??? MS
~7.36MS
~2.23MS
051-6680
A
46
3
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
GROUND VIAS
1 2
PREPREG (3 MIL)
3
CORE (3 MIL)
4
PREPREG (5 MIL)
5
CORE (5 MIL)
6
PREPREG (5 MIL)
7
CORE (3 MIL)
8
PREPREG (3 MIL)
9
10
PREPREG (3 MIL)
SIGNAL (1/2 OZ + COPPER PLATING)
SIGNAL (1/2 OZ)
GROUND (1/2 OZ)
SIGNAL (1/2 OZ)
CUT POWER PLANE (1 OZ)
CUT POWER PLANE (1 OZ)
SIGNAL (1/2 OZ)
GROUND (1/2 OZ)
SIGNAL (1/2 OZ)
SIGNAL (1/2 OZ + COPPER PLATING)
BOARD HOLES
CHASSIS MOUNTS
INVERTER
ASICS HEATSINK MOUNTS
I/O AREA
LEFT CPU
UPPER RT GPU
LWR CPU
LWR RT GPU
1394
DVI
MECH. HOLES
BATT. CHRGR
BOARD INFORMATION
PCB SPECS
THICKNESS : 1.2 MM / 0.047 IN
1/2 OZ CU THICKNESS: 0.7 MILS
1.0 OZ CU THICKNESS: 1.4 MILS
IMPEDANCE : 50 OHMS +/- 10% DIELECTRIC: FR-4 LAYER COUNT: 10 SIGNAL TRACE WIDTH: 4 MILS
SIGNAL TRACE SPACING: 4 MILS PREPREG THICKNESS: 2-3 MILS
SEE PCB CAD FILES FOR MORE SPECIFIC INFO.
BOARD STACK-UP AND CONSTRUCTION
1-8-1 BLIND MICROVIA/20R10 BURIED VIA/20R10 TH VIA
PREPREG (3 MIL)
DVI
1
ZT70
HOLE-VIA-20R10
1
ZT9
HOLE-VIA-20R10
1
ZT2
HOLE-VIA-20R10
1
ZT73
HOLE-VIA-20R10
1
ZT75
HOLE-VIA-20R10
1
ZT63
HOLE-VIA-20R10
1
ZT77
HOLE-VIA-20R10
1
ZT66
HOLE-VIA-20R10
1
ZT65
HOLE-VIA-20R10
1
ZT62
HOLE-VIA-20R10
1
ZT25
HOLE-VIA-20R10
1
ZT24
HOLE-VIA-20R10
1
ZT19
HOLE-VIA-20R10
1
ZT67
HOLE-VIA-20R10
1
ZT37
HOLE-VIA-20R10
1
ZT29
HOLE-VIA-20R10
1
ZT31
HOLE-VIA-20R10
1
ZT1
HOLE-VIA-20R10
1
ZT12
HOLE-VIA-20R10
1
ZT14
HOLE-VIA-20R10
1
ZT27
HOLE-VIA-20R10
1
ZT26
HOLE-VIA-20R10
1
ZT13
HOLE-VIA-20R10
1
ZT30
HOLE-VIA-20R10
1
ZT33
HOLE-VIA-20R10
1
ZT18
HOLE-VIA-20R10
3
2
1
SH1
OG-503040
SHLD-SM
CHGND5
1
ZT7
HOLE-VIA-20R10
1
ZT21
HOLE-VIA-20R10
1
ZT59
HOLE-VIA-20R10
1
ZT58
HOLE-VIA-20R10
1
ZT85
HOLE-VIA-20R10
1
ZT86
HOLE-VIA-20R10
1
ZT16
HOLE-VIA-20R10
1
ZT74
HOLE-VIA-20R10
1
ZT36
HOLE-VIA-20R10
1
ZT23
HOLE-VIA-20R10
1
ZT42
HOLE-VIA-20R10
CHGND2
CHGND1
CHGND3
1
ZT76
HOLE-VIA-20R10
1
ZT41
HOLE-VIA-20R10
1
ZT40
HOLE-VIA-20R10
1
ZT39
HOLE-VIA-20R10
1
ZT38
HOLE-VIA-20R10
1
ZT61
HOLE-VIA-20R10
1
ZT64
HOLE-VIA-20R10
1
ZT68
HOLE-VIA-20R10
1
ZT69
HOLE-VIA-20R10
1
ZT72
HOLE-VIA-20R10
1
ZT28
HOLE-VIA-20R10
1
ZT46
HOLE-VIA-20R10
1
ZT71
HOLE-VIA-20R10
1
ZT78
HOLE-VIA-20R10
1
ZT80
HOLE-VIA-20R10
1
ZT51
HOLE-VIA-20R10
1
ZT50
HOLE-VIA-20R10
1
ZT52
HOLE-VIA-20R10
1
ZT53
HOLE-VIA-20R10
1
ZT57
HOLE-VIA-20R10
1
ZT82
HOLE-VIA-20R10
1
ZT60
HOLE-VIA-20R10
1
ZT22
HOLE-VIA-20R10
1
ZT17
HOLE-VIA-20R10
1
ZT35
HOLE-VIA-20R10
1
ZT45
HOLE-VIA-20R10
1
ZT79
HOLE-VIA-20R10
1
ZT83
HOLE-VIA-20R10
1
ZT81
HOLE-VIA-20R10
1
ZT49
HOLE-VIA-20R10
1
ZT47
HOLE-VIA-20R10
1
ZT48
HOLE-VIA-20R10
1
ZT54
HOLE-VIA-20R10
1
ZT55
HOLE-VIA-20R10
1
ZT56
HOLE-VIA-20R10
1
ZT5
HOLE-VIA-20R10
1
ZT84
HOLE-VIA-20R10
1
ZT15
HOLE-VIA-20R10
1
ZT44
HOLE-VIA-20R10
1
ZT4
HOLE-VIA-20R10
1
ZT8
HOLE-VIA-20R10
1
ZT6
HOLE-VIA-20R10
1
ZT3
HOLE-VIA-20R10
1
ZT32
HOLE-VIA-20R10
1
ZT10
HOLE-VIA-20R10
1
ZT34
HOLE-VIA-20R10
1
ZT11
HOLE-VIA-20R10
1
ZT20
HOLE-VIA-20R10
1
ZT43
HOLE-VIA-20R10
051-6680
A
46
4
ZT10_SPN NO_TEST=TRUE
ZT302_SPN NO_TEST=TRUE
NO_TEST=TRUE
ZT301_SPN
QACK*
TEA*
A10
MCP*
A23
A28 A29
TRST*
PMON_OUT*
A7
SHD1* HIT*
SHD0*
ARTRY*
AACK*
CI*
WT*
GBL*
TBST*
TS*
BG*
BR*
GND
VDD
A1 A2
A11
A5
A4
A3
A6
A8 A9
A12
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A32
A31
A30
A27
A24 A25
AP1
AP4
AP2 AP3
AP0
A35
A34
A33
TT0
TT4
TSIZ1 TSIZ2
TSIZ0
TT1 TT2 TT3
DTI3
DTI2
TDI TDO TMS TCK
A26
BMODE0*
PMON_IN*
BMODE1*
DTI1
A0
DTI0
LSSD_MODE*
TA*
L2_TSTCLK
L1_TSTCLK
EXT_QUAL
CHKS*
DX*
SRW0*
IARTRY0*
SRW1*
(1 OF 3)
HRESET*
SRESET*
TBEN
QREQ*
CKSTP_IN*
CKSTP_OUT*
SYSCLK
INT* SMI*
PLL_CFG1
CLK_OUT
OVDD
PLL_CFG0
PLL_CFG3
DRDY*
DBG*
PLL_CFG2
PLL_CFG4
BVSEL
AVDD
OVDDSENSE
PG EN
VIN
ADJ
VOUT
GND
TABLE_5_ITEM
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
NC
(NAP VOLTAGE=0.98V FOR ALL CONFIG.)
470OHM FOR BOOT BANGER
470OHM FOR BOOT BANGER
(R1)
(R1)
MPC7447 MAXBUS
Place R449 & R452 close to U5 pin 6&5
Vout=0.59*(1+R1/R2)
MPC7447 PULL-UPS
CPU_OVDD DECOUPLING NETWORK
CPU_VCORE DECOUPLING NETWORK
MORE 0805 10UF CAPS ON VCORE POWER SUPPLY PAGE (PG 32)
R1
R2
For CPU DFS mode, Must stuff R748
NC
NC
NC
NC
NC
CPU INTERNAL PLL FILTERING
10K
5%
1/16W
MF
402
21
R46
10K
5%
1/16W
MF
402
21
R13
10K
5%
1/16W
MF
402
21
R20
470
1/16W
5% MF
402
21
R32
10K
5%
1/16W
MF
402
21
R11
10K
5%
1/16W
MF
402
21
R4
1K
5%
1/16W
MF
402
21
R7
10K
5%
1/16W
MF
402
21
R24
10K
5%
1/16W
MF
402
21
R34
0.1uF
20% 10V CERM 402
2
1
C89
0.1uF
20% 10V CERM 402
2
1
C73
0.1uF
20% 10V CERM 402
2
1
C18
CERM 402
20%
0.1uF
10V
2
1
C20
0.1uF
20% 10V CERM 402
2
1
C75
0.1uF
20% 10V CERM 402
2
1
C9
20%
402
CERM
10V
0.1uF
2
1
C49
402
CERM
10V
20%
0.1uF
2
1
C46
402
CERM
10V
20%
0.1uF
2
1
C30
0.1uF
402
CERM
10V
20%
2
1
C56
402
CERM
10V
20%
0.1uF
2
1
C45
402
CERM
10V
20%
0.1uF
2
1
C48
0.1uF
20% 10V CERM 402
2
1
C44
0.1uF
10V
20% CERM
402
2
1
C86
0.1uF
20% 10V CERM 402
2
1
C88
20%
0.1uF
10V CERM 402
2
1
C10
0.1uF
20% 10V CERM 402
2
1
C38
0.1uF
20% 10V CERM 402
2
1
C72
402
MF
1/16W
5%
470
2
1
R89
0.1uF
20% 10V CERM 402
2
1
C50
402
CERM
10V
20%
0.1uF
2
1
C28
402
CERM
10V
20%
0.1uF
2
1
C39
402
CERM
10V
20%
0.1uF
2
1
C47
402
CERM
10V
20%
0.1uF
2
1
C26
402
CERM
10V
20%
0.1uF
2
1
C31
402
1/16W
5% MF
470
2
1
R38
10K
5%
1/16W
MF
402
21
R36
470
5%
1/16W
MF
402
21
R45
10K
5%
1/16W
MF
402
21
R28
1K
5%
1/16W
MF
402
21
R3
805
20%
6.3V
10uF
CERM
2
1
C32
805
CERM
6.3V
20%
10uF
2
1
C33
805
CERM
6.3V
20%
10uF
2
1
C59
805
CERM
6.3V
20%
10uF
2
1
C58
10K
5%
1/16W
MF
402
21
R27
10K
5%
1/16W
MF
402
21
R33
2.2uF
20% 10V CERM 805
2
1
C62
805
CERM
10V
20%
2.2uF
2
1
C34
10K
5%
1/16W
MF
402
21
R25
10K
5%
1/16W
MF
402
21
R8
1_5V_MAXBUS
0
5%
1/16W
MF
603
21
R281
1_8V_MAXBUS
0
5%
1/16W
MF
603
21
R283
+1_5V_SLEEP
+1_8V_SLEEP
470
5%
1/16W
MF
402
21
R2
APOLL7_PM-R1.1
1.50GHZ-1.28V BGA
OMIT
D3
K10
K8
J13
J11
J9J7H12
H10
M12
M10
M8
L13
L11
L9L7K14
K12
H8
C5
E9
F6
E6
E5
E7
F7
G6
L4
A5
F1
L1
A4
B9
C6
F11
E1
K6
A10
E10
B10
A2
F9
H5
E4
P4 G5
A9
D9
A7
D7
C7
C8
B8
G18
E18
L5K2J5H3F2D5C12
V14
V10
V7V4U16
U12
U2C2T9T6R16
R13
R4
P11
P8P2N6
M3
B4
C9
E8
B3
G8
D4
B6
D8
B2
H7
H4
G17
F3
E17
V15
V11
V8
V5
U17
U13
U3
D13
T10
T7
R17
R14
R5
P12
P9
P3
N7
M13D6M11
M9
M7
M4
L12
L10
L8
L6
K13
K11
C3
K9
K3
K7
J12
J10
J8
J6
H13
H11
H9
B5
E2
A11
D10
N1
P1
K1
G1
R3
M2
H2
B1
A3
J1
A12
B7D2
F8
G9
M1
A8
N2
G7
F5
H6
E3
C1
R1
G2
C10
D1
D11
L2
F10
B11
G10
C4
B12
W1
N5
G3
U1
V2
T1
N3
P5
M5
J3
N4
K4
J2
C11
W2
K5
R2
J4
V1
F4
T2
G4
L3
D12
H1
E11
U56
402
CERM
10V
20%
0.1uF
2
1
C29
402
CERM
10V
20%
0.1uF
2
1
C27
20%
402
CERM
10V
0.1uF
2
1
C25
402
CERM
10V
20%
0.1uF
2
1
C54
402
CERM
10V
20%
0.1uF
2
1
C53
402
CERM
10V
20%
0.1uF
2
1
C55
0.1uF
20% 10V CERM 402
2
1
C87
0.1uF
20% 10V CERM 402
2
1
C69
0.1uF
402
CERM
10V
20%
2
1
C17
0.1uF
402
CERM
10V
20%
2
1
C82
0.1uF
20% 10V CERM 402
2
1
C81
0.1uF
20% 10V CERM 402
2
1
C61
10K
5%
1/16W
MF
402
21
R6
10K
5%
1/16W
MF
402
21
R37
10K
5%
1/16W
MF
402
21
R19
10K
5%
1/16W
MF
402
21
R26
402
CERM
10V
20%
0.1uF
2
1
C2
402
CERM
10V
20%
0.1uF
2
1
C103
402
CERM
10V
20%
0.1uF
2
1
C68
402
CERM
10V
20%
0.1uF
2
1
C109
0.1uF
20% 10V CERM 402
2
1
C107
CERM 805
6.3V
20%
10uF
2
1
C104
402
CERM
10V
20%
0.1uF
2
1
C108
402
CERM
10V
20%
0.1uF
2
1
C110
402
CERM
10V
20%
0.1uF
2
1
C1
SM
OMIT
21
XW34
FAN2558
SOT23-6
61
4
2
3 5
U5
MF
100K
1% 1/16W
402
2
1
R452
1uF
10%
6.3V CERM 402
2
1
C102
2.2uF
10%
6.3V
CERM1
603
2
1
C85
0
5%
1/16W
MF
603
2
1
R302
+3V_SLEEP
10
1%
1/16W
MF
402
2 1
R748
NO STUFF
10
1%
1/16W
MF
402
2 1
R453
1/16W
402
100K
5% MF
R455
SM
MBR0530
2 1
D17
0.1uF
20% 10V CERM 402
2
1
C502
0.001uF
10% 50V
CERM
402
2
1
C626
1/16W
5%
0
MF 402
2
1
R755
NO STUFF
200K
5% 1/16W MF 402
2
1
R775
MF
1/16W
CPU_BST
402
1%
118K
2
1
R449
0.1uF
20% 10V CERM 402
2
1
C810
4.7uF
20%
6.3V CERM 805
2
1
C811
IC,A7PM,R1.2.3,1.50GHZ,1.2VCORE,18W,85C
337S2952
1
CRITICAL
CPU_BTR
U56
U56
CPU_BST_VCORE126
IC,A7PM,R1.2.3,1.67GHZ,1.26VCORE,23W,85C
337S3069
1
CRITICAL
CRITICAL
1
IC,A7PM,R1.3,1.50GHZ,1.20VCORE,18W,85C
337S3027
NO STUFF
U56
CPU_BST_VCORE126
114S1155
RES,MF,1/16W,115K OHM,1%,0402,SMD
R449
1
IC,A7PM,R1.3,1.67GHZ,1.29VCORE,18W,85C
U56
CRITICAL
1
337S3028
NO STUFF
CPU_BTR
R449
RES,MF,1/16W,105K OHM,1%,0402,SMD
1
114S0413
051-6680
A
46
5
U56
IC,A7PM,R1.2.3,1.67GHZ,1.28VCORE,23W,85C
CPU_BST
CRITICAL
337S2953
1
CPU_L1TSTCLK
CPU_AVDD
CPU_TA_L
ADT7467_VCORE_MON
CPU_AVDD_SHDN_L
CPU_LSSD_MODE
MAXBUS_SLEEP
CPU_HRESET_L
JTAG_CPU_TDI
JTAG_CPU_TCK
SYSCLK_CPU
CPU_BG_L
CPU_PULLUP
CPU_PLL_CFG<4>
JTAG_CPU_TCK
CPU_L1TSTCLK
CPU_MCP_L
CPU_ADDR<18>
CPU_PULLDOWN
CPU_PMONIN_L
CPU_EMODE0_L
CPU_ARTRY_L CPU_SHD0_L
CPU_BR_L
CPU_ADDR<4>
CPU_ADDR<6>
CPU_ADDR<5>
CPU_ADDR<9>
CPU_ADDR<11>
CPU_ADDR<10>
CPU_ADDR<12>
CPU_ADDR<15>
CPU_ADDR<17>
CPU_ADDR<20>
CPU_ADDR<22>
CPU_ADDR<24>
CPU_ADDR<23>
CPU_ADDR<25>
CPU_ADDR<27> CPU_ADDR<28>
CPU_TT<0> CPU_TT<1>
CPU_TT<3>
CPU_TT<2>
CPU_TBST_L CPU_TSIZ<0>
CPU_TSIZ<2>
CPU_TSIZ<1>
CPU_WT_L
CPU_GBL_L
CPU_CI_L CPU_AACK_L
CPU_ADDR<7>
CPU_PULLDOWN
CPU_EMODE1_L
CPU_SRWX_L
CPU_PULLUP
CPU_HRESET_L
CPU_SRESET_L
MPIC_CPU_INT_L CPU_SMI_L
CPU_CHKS_L
CPU_SHD1_L
CPU_MCP_L
CPU_L2TSTCLK
MPIC_CPU_INT_L
JTAG_CPU_TMS
CPU_PULLDOWN
VCORE_SHDN_L_3V
CPU_DTI<0>
CPU_TBEN
CPU_SHD0_L
CPU_EDTI
CPU_VCORE_SLEEP
CPU_EMODE1_L
CPU_CHKSTP_OUT_L
CPU_SMI_L
CPU_SRESET_L
CPU_ADDR<19>
JTAG_CPU_TRST_L
CPU_AVDD_VIN
CPU_PMONIN_L
CPU_SRWX_L
CPU_ADDR<21>
CPU_DTI<1>
CPU_ADDR<0> CPU_ADDR<1> CPU_ADDR<2> CPU_ADDR<3>
CPU_ADDR<8>
CPU_ADDR<13> CPU_ADDR<14>
CPU_ADDR<16>
CPU_ADDR<26>
CPU_ADDR<29> CPU_ADDR<30> CPU_ADDR<31>
CPU_AVDD_ADJ
CPU_HIT_L
CPU_SHD1_L
CPU_TT<4>
CPU_PLL_CFG<0>
MAXBUS_SLEEP
VCORE_SHDN_L
CPU_AVDD_VOUT
CPU_VCORE_SLEEP
CPU_BUS_VSEL
NO_TEST=TRUE
CPU_CLKOUT_SPN
CPU_PLL_CFG<1> CPU_PLL_CFG<2>
CPU_DRDY_L
CPU_PLL_CFG<3>
CPU_DBG_L
CPU_EDTI
CPU_DTI<2>
JTAG_CPU_TDI JTAG_CPU_TDO_TP JTAG_CPU_TMS
CPU_LSSD_MODE
CPU_L2TSTCLK
CPU_TEA_L
CPU_TBEN CPU_QREQ_L CPU_QACK_L
CPU_CHKSTP_OUT_L
CPU_CHKS_L
CPU_PULLDOWN
CPU_TS_L
40
40
35
35
16
16
15
41
15
41
8
41
41
40
8
40
7
7
41
41
41
7
41
35
7
35
41
41
38
6
6
6
6
37
38
6
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
6
41
14
31
14
6
38
8
6
41
31
41
38
41
38
38
38
38 38
38
38
38
38
38
38
38 38
38
38
38
6
6
38
38
38
6
6
38
8 38
38
41
38
5
40
8
27
5
5
5
5
5
8
8
5
7
5
5
5
8
5
5
7
8
5
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
8
5
5
5
5
5
5
5
5
8
6
40
5
5
8
8
8
8 8
8
8
8
8
8
8
8 8
8
8
5
8
7
5
35
40
5
7
7 7
8
7
8
5
8
5
41
5
5
5
8
5 8
8
5
5
5
8
D22
D3
D2
D1
D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21
D28
D27
D23 D24 D25 D26
D29
D32
D31
D30
D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44
D48
D47
D45 D46
D49
D51
D50
D52 D53 D54 D55
D58
D57
D56
D59
DP6
DP5
DP4
DP3
DP2
DP1
DP0
DP7
D63
D62
D61
D60
D0
(2 OF 3)
VDD
N/C_1
N/C_4
N/C_8
N/C_13
N/C_17
N/C_20
N/C_22 N/C_23
N/C_31
N/C_39
N/C_30
N/C_33
N/C_35 N/C_36
N/C_38
N/C_29
N/C_28
N/C_27
N/C_25
N/C_24
N/C_21
N/C_19
N/C_18
N/C_16
N/C_15
N/C_14
N/C_12
N/C_11
N/C_10
N/C_9
N/C_7
N/C_6
N/C_5
N/C_3
N/C_2
(3 OF 3)
N/C_26
N/C_32
N/C_34
N/C_37
SENSEVDD
GND
TEMP_CATHODE
TEMP_ANODE
SENSEGND
HPR*
SYM_VER2
WC*
VCC
VSS
SDA SCL
NC1 NC2 NC3
Y
B
A
Y
B
A
VCC
RESET* XTAL1 XTAL2 PB0
PD6
PD5
PD4
PD3
PD2
PD1
PD0
GND
PB1 PB2 PB3 PB4 PB5 PB6 PB7
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_5_ITEM
WILL DISABLE THE CONTROLLER
NC
(Rb)
NC
NC
NC
NC
NC
NC
INPUTS ARE 3V TOLERANT
NC
NC
NC NC
NC
NC
NC
NC
NC NC
NC
NC
NC NC
NC
NC
NC
NC
NC
NC
NC
NC
NC NC NC NC NC
NC NC NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
(Ra)
UNSTUFFING Ra AND STUFFING Rb
INPUTS ARE 3V TOLERANT
NC
NC
BOOT BANGER - TWEAK PROCESSOR BITS AFTER POWER-ON
470OHM FOR BOOT BANGER
MPC7447/BBANG
W6
N8
V3
M6
W9
T4
W4
T3
W13
V13
P14
T8
W8
R8
P6
U15
R7
U7
U8
U4
V17
W3
T17
T18
T16
W18
T15
W17
U18
W19
U19
T19
V19
R18
V18
R19
P17
W16
V6
P7
R6
W7
U5
T5
U6
W5
V9
U9
V16
W10
R9
U10
P10
N9
R10
T11
W11
U11
R11
T14
N10
N11
V12
W12
T12
R12
W14
U14
P13
T13
W15
R15
U56
APOLL7_PM-R1.1
1.50GHZ-1.28V
OMIT
BGA
P18
P16
N17
N15
M18
M16
M14
H19
H17
H14
G16
G11
F19
F17
F12
E16
E13
C13
B19
B17
A18
A16
A13
N19
N18
G13
N12
G12
N13
B15
A15
G14
F14
E14
D14
L19
K19
J19
L18
K18
J18
L17
K17
J17
L16
C14
K16
J16
H16
D19
C19
D18
C18
D17
C17
D16
B14
C16
L15
K15
J15
H15
G15
F15
E15
D15
C15
A14
A6
P19
P15
N16
N14
M19
M17
M15
L14
J14
H18
G19
F18
F16
F13
E19
E12
B18
B16
B13
A19
A17
U56
APOLL7_PM-R1.1
1.50GHZ-1.28V
OMIT
BGA
+3V_MAIN
9
8
7
6
4
3
2
1
10
5
RP46
25V
1/32W
5%
10K
BBANG
SM
2
1
C762
402
CERM
10V
20%
0.1uF
BBANG
+3V_MAIN
2
1
C120
BBANG
402
CERM
10V
20%
0.1uF
+3V_MAIN
7
4
8
5 6
3
2
1
U52
SOI
32KX8_M24256B
OMIT
2
1
R100
BBANG
10K
5%
1/16W
MF
402
4
5
3
2
1
U9
BBANG
SN74AUC1G08
SC70-5
2
1
R104
NO_BBANG
0
5%
1/16W
MF
402
+3V_MAIN
2
1
R103
BBANG
10K
5%
1/16W
MF
402
4
5
3
2
1
U10
SN74AUC1G08
SC70-5
BBANG
2
1
R105
10K
BBANG
402
MF
1/16W
5%
2 1
R637
BBANG
402
MF
1/16W
1%
10K
2 1
R707
402
MF
1/16W
1%
10K
BBANG
2 1
R712
BBANG
10K
1% 1/16W MF
402
2 1
R846
MF
402
1/16W
5%
10K
BBANG
2 1
R844
BBANG
402
1/16W MF
5%
10K
2 1
R838
BBANG
402
1/16W MF
5%
10K
2 1
R847
402
MF
1/16W
5%
10K
NO STUFF
2 1
R845
402
MF
1/16W
5%
10K
NO STUFF
2 1
R839
402
MF
1/16W
5%
10K
NO STUFF
+3V_MAIN
2 1
R692
402
MF
1/16W
5%
10K
BBANG
2 1
R709
402
MF
1/16W
5%
10K
NO STUFF
4
5
20
1
11
9
8
7
6
3
2
19
18
17
16
15
14
13
12
10
U54
SOI
ATTINY2313
OMIT
2
1
R9
BBANG
470
5% 1/16W MF 402
2
1
R10
NO_BBANG
200
5% 1/16W MF 402
BBANG
U541
341S1660
MCU,PROGRAMMED W/ BBANGER
051-6680
A
46
6
BBANG
1 U52
341S1661
I2C EEPROM,PROGRAMMED W/ BBANGER
BB_MISO BB_SCK
BB_MOSI
INT_I2C_DATA0
INT_I2C_CLK0
BBANG_HRESET_L
RESET_VREF
PMU_CPU_HRESET_L
JTAG_CPU_TDI JTAG_CPU_TRST_L
JTAG_CPU_TMS
BBANG_JTAG_TCK
ICT_TRST_L
ESP_EN_L BFR_TDO
TP_BB_XTAL1
BB_RESET_L
BB_EEPR_ADDR2
BB_EEPR_ADDR0
CPU_DATA<4>
CPU_DATA<3>
CPU_DATA<1>
CPU_DATA<0>
CPU_DATA<2>
CPU_DATA<5>
BB_MOSI
CPU_DATA<27>
MAXBUS_SLEEP
BB_EEPR_ADDR1
ESP_EN_L BFR_TDO
BBANG_JTAG_TCK
BB_SCK
PMU_CPU_HRESET_L
BBANG_HRESET_L
ICT_TRST_L
CPU_DATA<59>
CPU_DATA<53>
CPU_DATA<52>
CPU_DATA<51>
CPU_DATA<6>
CPU_DATA<50>
CPU_DATA<23>
CPU_THERM_DP CPU_THERM_DM
CPU_DATA<8>
CPU_DATA<7>
CPU_DATA<9> CPU_DATA<10> CPU_DATA<11> CPU_DATA<12> CPU_DATA<13> CPU_DATA<14> CPU_DATA<15> CPU_DATA<16> CPU_DATA<17> CPU_DATA<18> CPU_DATA<19> CPU_DATA<20> CPU_DATA<21> CPU_DATA<22>
CPU_DATA<24> CPU_DATA<25> CPU_DATA<26>
CPU_DATA<28> CPU_DATA<29> CPU_DATA<30> CPU_DATA<31> CPU_DATA<32>
CPU_DATA<34>
CPU_DATA<33>
CPU_DATA<35>
CPU_DATA<37>
CPU_DATA<36>
CPU_DATA<39>
CPU_DATA<38>
CPU_DATA<40>
CPU_DATA<42>
CPU_DATA<41>
CPU_DATA<43> CPU_DATA<44> CPU_DATA<45>
CPU_DATA<47>
CPU_DATA<46>
CPU_DATA<48> CPU_DATA<49>
CPU_DATA<54> CPU_DATA<55> CPU_DATA<56> CPU_DATA<57> CPU_DATA<58>
CPU_DATA<60> CPU_DATA<61> CPU_DATA<62> CPU_DATA<63>
MAXBUS_SLEEP
BBANG_TCK_EN
BBANG_JTAG_TCK
JTAG_CPU_TCK
BB_MISO
CPU_VCORE_SLEEP
CPU_HRESET_L
INT_I2C_CLK0
INT_I2C_DATA0
BB_EEPR_WP_PD
MAXBUS_SLEEP
JTAG_CPU_TRST_L
40
40
40
35
35
35
16
16
16
41
41
15
15
41
41
15
24
24
8
8
41
24
24
8
13
13
41
41
7
41
7
40
41
13
13
7
41
11
11
31
41 6
41
38
38
38
38
38
38
38
6
31
38
38
38
38
38
38
38
38
38
38 38
38 38
38
38 38
38
38 38
38
38 38
38
38
38 38
38 38
38
38 38
38
38
38
38
38
38
38
38
38
38
38
38 38
38
38
38
38
38
38 38
38
38
38
38 38
38
6
41
35
7
11
11
6
6
6
6
6
6
6
6
6
5 5
5
6
6
6
6
41
8
8
8
8
8
8
6
8
5
6 6
6
6
6
6
6
8
8
8
8
8
8
8
27
27
8
8
8 8
8 8
8
8 8
8
8 8
8
8 8
8
8
8 8
8 8
8
8 8
8
8
8
8
8
8
8
8
8
8
8
8 8
8
8
8
8
8
8 8
8
8
8
8 8
8
5
6
5
6
5
5
6
6
5
5
G
D
S
G
D
S
04
G
D
S
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
CPU CONFIGURATION
PLL OFF
PLL BYPASS
333 267
400500
667 533
667833
917 733
800
1000 1083
867 933
1167 1250 1000
10671333
1417 1133
12001500
1583 1267
13331667
1750 1400
14671833
1917 1533
16002000
2083 1667
17332167
2250 1800
18672333
2500 2000
21332667
2833 2267
24003000
3333 2667
28003500
4000 3200
37334667
28.0X
24.0X
21.0X
20.0X
18.0X
17.0X
16.0X
15.0X
13.5X
14.0X
13.0X
12.5X
12.0X
11.5X
11.0X
10.5X
10.0X
9.5X
9.0X
8.5X
8.0X
7.5X
7.0X
6.5X
6.0X
5.5X
5.0X
4.0X
3.0X
2.0X
1.0X
0.0X
E ABCD HEX
4 0123
CPU_PLL_CFG
(MHZ)
133MHZ167MHZ
(AT BUS FREQUENCY)
CORE FREQUENCY
(Bus-to-Core)
MULTIPLIER
APOLLO 7PM
CPU FREQUENCY CONFIGURATION
CPU_BUS_VSEL
(PROCESSOR)
(PROCESSOR)
CPU_EMODE0_L
CPU_HRESET_L CPU_HRESET_L
LOW
CPU_HRESET_INV
1.5V INTERFACE
1.8V INTERFACE
2.5V INTERFACE
MAX BUS MODE
60X BUS MODE
APPLICATION
TIED
SIGNAL
APOLLO ONLY SUPPORTS MAXBUS
BUSTYPE SELECT
CPU CONFIGURATION
NEED TO CHARACTERIZE
INVERTER TO INVERT HRESET_L
DESKTOP HAD PROBLEM USING
1.8V INTERFACE
1.5V INTERFACE
INVERTED HRESET_L
MAXBUS VSEL
PLL DISABLE 1 X
HIGH SPEED 0 1
LOW SPEED 0 0
STATE ENCODING CPU_PLL_STOP_OC CPU_VCORE_HI_OC
R00ER10ER01ER10DR00DR01DR10CR00CR01CR01B R00B R10BR10AR00AR01A
TRANSISTOR ON CPU_PLL_CFG<4> IS MET.
PULLUP TO ENSURE THAT Vgs OF PASS
+5V_SLEEP NOW REQUIRED FOR PLL_STOP_L
CPU PLL CONFIG CIRCUITRY
STUFF PASS TRANSISTOR ONLY IF R10E, R01E, OR PULLUP STUFFED
HIGH
0 1111 0F 0 0011 03 0 0100 04 0 1000 08 0 1010 0A 0 1011 0B 0 1001 09 0 1101 0D 0 0101 05 0 0010 02 0 0001 01 0 1100 0C 0 0110 06 1 0111 17 0 0111 07 1 1010 1A 1 1000 18 1 1001 19 0 0000 00 1 1011 1B 1 1111 1F 1 0101 15 0 1110 0E 1 1100 1C 1 0001 11 1 1101 1D 1 0000 10 1 0010 12 1 0011 13 1 0100 14 1 0110 16 1 1110 1E
2
1
R63
CPU_BST&CPU_BST_VCORE126
0
5% 1/16W MF 402
2
1
R92
NO STUFF
402
MF
1/16W
5%
0
2
1
R35
10K
5% 1/16W MF 402
2
1
R50
402
MF
1/16W
5%
10K
2
1
R68
10K
5% 1/16W MF 402
2
1
R79
10K
5% 1/16W MF 402
2
1
R133
402
1/16W
MF
5%
47K
2
1
R132
402
MF
1/16W
5%
10K
2
1
R14
402
MF
1/16W
5%
82K
2
1
R31
NO STUFF
0
5% 1/16W MF 402
2
1
R23
NO STUFF
402
MF
1/16W
5%
0
4
5
3
Q14
SOT-363
2N7002DW
1
2
6
Q14
SOT-363
2N7002DW
4
5
3
2
U12
1_5V_MAXBUS
SN74AUC1G04
SC70-5
2
1
R12
NO STUFF
0
5% 1/16W MF 402
1
2
6
Q3
2N7002DW
SOT-363
4
5
3
Q3
2N7002DW
SOT-363
+5V_SLEEP
1 2
R5
1_5V_MAXBUS
22
5%
1/16W
402
MF
2
1
R70
NO STUFF
0
5% 1/16W MF 402
2
1
R18
10K
5% 1/16W MF 402
1 2
R110
402
1/16W
5%
22
MF
2
1
R17
1_8V_MAXBUS
10
5%
1/16W
MF
402
2
1
3
Q13
SM
2N7002
2
3
1
Q12
SM
2N3904
21
R131
MF
1%
1/16W
402
249K
2
1
R43
5%
NO STUFF
0
1/16W MF 402
+3V_SLEEP
2
1
R44
5%
0
1/16W MF 402
CPU_BTR
2
1
R48
5%
0
1/16W MF 402
NO STUFF
2
1
R60
NO STUFF
0
5% 1/16W MF 402
2
1
R64
NO STUFF
0
5% 1/16W MF 402
2
1
R76
NO STUFF
0
5% 1/16W MF 402
2
1
R84
NO STUFF
0
5% 1/16W MF 402
2
1
R78
NO STUFF
402
MF
1/16W
5%
0
2
1
R88
CPU_BST&CPU_BST_VCORE126
0
5% 1/16W MF 402
7
46
A
051-6680
CPU_PLL_CFG<1>
CPU_PLL_CFG<4>
CPU_PLL_CFG<3>
CPU_VCORE_HI_OC
PLL_STOP_L
CPU_PLL_STOP_OC
CPU_PLL_FS10
CPU_PLL_STOP_BASE
CPU_PLL_FS00
CPU_PLL_CFG<0>
PLL_STOP_L
CPU_PLL_CFGEXT
CPU_PLL_STOP_OC
CPU_BUS_VSELCPU_HRESET_L
CPU_EMODE0_LCPU_HRESET_L
CPU_HRESET_INV
MAXBUS_SLEEP
CPU_PLL_CFG<2>
MAXBUS_SLEEP
CPU_PLL_FS01
40
40
35
35
16
16
15
15
41
41
8
8
7
7
7
7
35
31
31
6
6
6
6
5
5
5
31
7
7
5
7
7
5 5
5 5
5
5
5
(PLL6)
VSSA_7
(PLL6)
VDD15A_7
D_42
D_41
D_40
D_39
D_38
D_44
D_43
D_45 D_46 D_47 D_48
D_52
D_51
D_50
D_49
D_53
D_55
D_54
D_56 D_57 D_58
D_60
D_59
D_62
D_61
D_63
DBG
DRDY
DTI_0
TEA
TA
DTI_2
DTI_1
D_1
D_0
D_2
D_6
D_5
D_4
D_3
D_7
D_11
D_10
D_9
D_8
D_12
D_14
D_13
D_15 D_16 D_17
D_22
D_21
D_20
D_19
D_18
D_23 D_24 D_25 D_26 D_27
D_32
D_31
D_30
D_29
D_28
D_34
D_33
D_35 D_36 D_37
BR
(1 OF 9)
MAXBUS
INTERFACE
TS
BG
A_0 A_1 A_2 A_3 A_4 A_5
A_9
A_6 A_7 A_8
A_10
A_14
A_13
A_12
A_11
A_20
A_16 A_17 A_18 A_19
A_15
A_27
A_22
A_21
A_30
A_29
A_28
A_26
A_25
A_24
A_23
TT_2
TT_1
TT_0
A_31
TBST TSIZ_0 TSIZ_1 TSIZ_2
CI GBL
TT_4
AACK
QREQ
ARTRY
TT_3
WT
HIT
ANALYZER_CLK
SUSPENDACK
SUSPENDREQ
QACK
STOPCPUCLK
CPU_FB_OUT
CPU_FB_IN
CPU_CLK
TBEN
ACS_REF
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
Vin = Intrepid Vcore (1.5V)
INPUT - PD
INPUT - PU
NO BUS KEEPER - PU
NO BUS KEEPER - PU
NO BUS KEEPER - PU
INPUT - PU
NO BUS KEEPER - ? NO BUS KEEPER - ? NO BUS KEEPER - ?
NO BUS KEEPER - PU NO BUS KEEPER - PU
INTREPID OUTPUTS HIGH BY DEFAULT
NO BUS KEEPER - PU
Vout = MaxBus rail (1.8V)
NO BUS KEEPER - ?
Spare
Spare
Spare
Spare
ExtPLL_SDwn_Pol
0: Active high
1: Active low
DDR_TPDEn_Pol
1: Active low
0: Active high
AnalyzerClk_En_h
0: Inactive
1: Active
DDR_TPDModeEnable_h
0: TDI input (JTAG)
1: TDI output
BIT 40 TO 47
PCI0 Source Clock
0: PLL5 (no spread)
1: PLL4
PCI1 Source Clock
0: PLL5 (no spread)
1: PLL4
(SW CNTL ONLY)
InternalSpreadEn
0: Inactive
1: Active
BIT0BIT1BIT2
PLL4MODESEL_NXT[2:0] 000: 166.4MHZ (2.5X) 001: 149.76MHZ 010: 133.12MHZ (2.0X) 011: 99.84MHZ (1.5X) 100: 83.20MHZ
MODE A (2.5X) IS FOR STATIC OPERATION MODE C (2.0X) IS FOR CLOCK SLEW OPERATION
Spare
Spare
BIT 48 TO 55
1: Active
0: Inactive
BUF_REF_CLK_OUTEnable_h
1: External source
0: PLL5
SelPLL4ExtSrc
1: BootROM on PCI1
0: BootROM on IDE/CardSlot
En_PCI_ROM_P
OBSOLETE (Should remain high)
1: TI PHY workaround
0: Normal 1394b
TI 1394b workaround
BIT2 BIT1 BIT0
Spare
MaxBus output impedance 111: 28.6 ohm 011: 33.3 ohm 101: 40 ohm 001: 50 ohm
010: 100 ohm
110: 66.6 ohm
100: 200 ohm 000: 200 ohm
INPUT NO BUS KEEPER
NO BUS KEEPER
FB BUFFER HAS 50 OHM OUTPUT IMPEDANCE
SHORT = 1" SHORTER THAN MATCHED LENGTH
LONG = 1" LONGER THAN MATCHED LENGTH
THE FOLLOWING STRAP BITS CAN BE CHANGED BY SOFTWARE:
1/ D47 - SELAGPSPREADCLK - SLEEP/WAKE CYCLE REQUIRED 2/ D46 - SELPCI1SPREADCLK - SLEEP/WAKE CYCLE REQUIRED 3/ D44 - PLL4MODESEL_NXT<0> - SLEEP/WAKE CYCLE REQUIRED 4/ D43 - PLL4MODESEL_NXT<1> - SLEEP/WAKE CYCLE REQUIRED 5/ D42 - PLL4MODESEL_NXT<2> - SLEEP/WAKE CYCLE REQUIRED 6/ D33 - ANALYZERCLK_EN_H - IMMEDIATE EFFECT
IF A STRAP IS NOT LISTED, THEN IT CANNOT BE CHANGED BY SOFTWARE
MAXBUS PULL-UPS
INTREPID BOOT STRAPS
BIT 56 TO 63
Spare
Spare
OBSOLETE
ROM_Ovrly_Rng
0: 0 IDE / 1 PCI1
1: 0-1 IDE / 2-3 PCI1
1: GPIOs
0: REQ/GNT
PCI1_REQ2_L / PCI1_GNT2_L
1: GPIOs
0: REQ/GNT
PCI1_REQ1_L / PCI1_GNT1_L
1: GPIOs
0: REQ/GNT
PCI1_REQ0_L / PCI1_GNT0_L
1: 60x bus (G3)
Intrepid MaxBus
INTREPID BOOT STRAPS
BIT 32 TO 39
Processor Bus Mode
0: Max Bus (G4)
FireWire PHY interface
0: Legacy interface
1: B-mode interface
2
1
R161
402
MF
1/16W
1%
1K
2
1
C187
402
CERM
6.3V
20%
0.22uF
21
R159
402
MF
1/16W
5%
4.7
21
R168
402
MF
1/16W
5%
0
2 1
R155
402
MF
1/16W
5%
0
2
1
R169
402
MF
1/16W
1%
511
2
1
R666
402
1/16W
MF
5%
10K
2
1
R638
5%
NO STUFF
10K
402
MF
1/16W
2
1
R639
5%
402
1/16W
10K
MF
NO STUFF
2
1
R650
402
MF
1/16W
5%
10K
2
1
R652
402
MF
1/16W
5%
10K
2
1
R620
402
MF
1/16W
5%
10K
2
1
R621
402
MF
5%
1/16W
10K
2
1
R653
402
MF
1/16W
5%
10K
NO STUFF
2
1
R618
402
MF
1/16W
5%
10K
2
1
R619
402
MF
1/16W
5%
10K
2
1
R640
402
MF
1/16W
5%
10K
NO STUFF
2
1
R622
402
MF
1/16W
5%
10K
2
1
R699
402
MF
1/16W
5%
10K
NO STUFF
2
1
R693
402
MF
1/16W
5%
10K
NO_SSCG
2
1
R694
402
MF
1/16W
5%
10K
NO STUFF
2
1
R664
402
MF
1/16W
5%
10K
NO STUFF
2
1
R665
402
MF
1/16W
5%
10K
SSCG
2
1
R641
402
MF
1/16W
5%
10K
NO STUFF
2
1
R684
402
MF
5%
1/16W
10K
2
1
R679
402
MF
1/16W
5%
10K
2
1
R678
402
MF
1/16W
5%
10K
SSCG
2
1
R649
402
MF
1/16W
5%
10K
2
1
R651
402
MF
1/16W
5%
10K
NO_SSCG
2
1
R623
402
MF
1/16W
5%
10K
2
1
R677
402
MF
1/16W
5%
10K
2
1
R648
402
MF
1/16W
5%
10K
2
1
R642
NO STUFF
402
MF
1/16W
5%
10K
2
1
R698
402
MF
1/16W
5%
10K
2
1
R643
402
MF
1/16W
5%
10K
NO STUFF
2
1
R668
5%
1/16W
MF
402
10K
NO STUFF
2
1
R667
402
MF
1/16W
5%
10K
2
1
R695
402
MF
1/16W
5%
10K
SSCG
2
1
R626
402
MF
1/16W
5%
10K
2
1
R683
402
MF
1/16W
5%
10K
NO STUFF
2
1
R624
402
MF
1/16W
5%
10K
2
1
R625
402
MF
1/16W
5%
10K
2
1
R655
402
MF
1/16W
5%
10K
2
1
R654
402
MF
1/16W
5%
10K
NO STUFF
2
1
R680
402
MF
1/16W
5%
10K
NO_SSCG
2
1
R696
402
MF
5%
1/16W
10K
SSCG
2
1
R681
402
MF
1/16W
5%
10K
NO_SSCG
2
1
R646
402
MF
1/16W
5%
10K
NO STUFF
2
1
R644
402
MF
1/16W
5%
10K
2
1
R670
402
MF
1/16W
5%
10K
NO STUFF
2
1
R697
402
MF
1/16W
5%
10K
NO STUFF
2
1
R645
402
1/16W
MF
5%
10K
NO STUFF
2
1
R669
402
MF
1/16W
5%
10K
NO STUFF
2
1
R629
402
MF
1/16W
5%
10K
2
1
R658
402
MF
1/16W
5%
10K
2
1
R627
402
MF
1/16W
5%
10K
NO STUFF
2
1
R682
402
MF
1/16W
5%
10K
2
1
R628
402
MF
1/16W
5%
10K
2
1
R657
402
MF
1/16W
5%
10K
2
1
R685
402
MF
1/16W
5%
10K
2
1
R656
402
MF
1/16W
5%
10K
2
1
R146
402
MF
1/16W
5%
0
NO STUFF
21
R140
402
MF
1/16W
5%
0
2
1
R141
402
MF
1/16W
5%
0
21
R128
MF
402
1/16W
5%
0
NO STUFF
21
R147
MF
402
1/16W
5%
0
21
R136
402
MF
1/16W
5%
0
NO STUFF
D28
H25
H26
J25
D27
B28
G25
E25
D26
H24
G24
B27
E28
A28
A31
E27
AK9 AM8
AH9
A32
G27
B31
A29
D11
E12
A8
G20
B20
G19
E19
A9
D19
A20
J19
B19
H19
A19
A18
D18
B18
E18
B8
B17
A17
G18
D17
H18
J18
A16
E17
B16
A15
B9
H17
B15
G17
E16
D16
A13
A14
D15
J16
E15
H11
G16
A12
B14
D14
H15
B13
G15
B12
E14
H14
E11
G14
A11
D13
B11
G13
E13
D12
A10
J13
B10
G12
D10
B30
D29
K25
G28
A30
H16
J24
J15
G26
E29 E26
E23
A25
D23
A26
B26
G23
A21
D20
E24
B21
E20
A22
H21
B22
H20
A23
D21
A24
E21
A27
G21
J21
E22
B23
B24
D22
G22
H22
B25
J22
D25
D24
H23
G8
H13
B29
U51
CRITCAL
BGA
INTREPID-REV2.1
OMIT
21
R152
1/16W
402
MF
5%
10K
21
R150
402
MF
1/16W
5%
10K
21
R151
402
MF
1/16W
5%
10K
81
RP2
SM1
1/16W
5%
10K
54
RP2
SM1
1/16W
5%
10K
72
RP2
SM1
1/16W
5%
10K
72
RP3
SM1
1/16W
5%
10K
81
RP3
SM1
1/16W
5%
10K
63
RP3
SM1
1/16W
5%
10K
54
RP3
SM1
1/16W
5%
10K
63
RP2
SM1
1/16W
5%
10K
8 46
A
051-6680
CPU_DATA<59> CPU_DATA<60> CPU_DATA<61> CPU_DATA<62> CPU_DATA<63>
CPU_DATA<38>
CPU_DATA<37>
CPU_DATA<36>
CPU_DATA<34> CPU_DATA<35>
CPU_DATA<39>
MAXBUS_SLEEP
CPU_ADDR<11>
CPU_ADDR<13>
CPU_DATA<32> CPU_DATA<33>
CPU_DATA<58>
CPU_DATA<56>
SYSCLK_CPU_UF
CPU_DATA<49>
MAXBUS_SLEEP
CPU_DATA<47>
CPU_DATA<46>
CPU_DATA<45>
MAXBUS_SLEEP
CPU_ADDR<0>
CPU_TS_L
CPU_BG_L
CPU_DATA<13> CPU_DATA<14> CPU_DATA<15>
CPU_ADDR<10>
CPU_ADDR<7>
CPU_ADDR<2>
CPU_ADDR<6>
+1_5V_INTREPID_PLL
CPU_ADDR<3>
CPU_DATA<40>
CPU_DATA<42>
CPU_DATA<53>
CPU_DATA<55>
CPU_DATA<43> CPU_DATA<44>
CPU_DATA<41>
CPU_TSIZ<0>
CPU_GBL_L
SYSCLK_CPU
CPU_QREQ_L
CPU_BG_L
CPU_AACK_L
CPU_TEA_L
CPU_DRDY_L
CPU_HIT_L
CPU_ARTRY_L
CPU_BR_L
CPU_TS_L
CPU_TA_L
CPU_DATA<54>
CPU_DATA<49>
CPU_DATA<48>
CPU_DATA<57>
INT_CPUFB_OUT
INT_CPUFB_OUT_SHORT
INT_CPUFB_IN
INT_CPUFB_OUT_NORM
INT_CPUFB_IN_NORM
INT_CPUFB_LONG
MAXBUS_SLEEP
+1_5V_INTREPID_PLL7
CPU_TEA_L
CPU_TA_L
CPU_DTI<2>
CPU_DTI<1>
CPU_DTI<0>
CPU_DRDY_L
CPU_DBG_L
CPU_DATA<63>
CPU_DATA<61> CPU_DATA<62>
CPU_DATA<60>
CPU_DATA<58> CPU_DATA<59>
CPU_DATA<57>
CPU_DATA<56>
CPU_DATA<55>
CPU_DATA<53> CPU_DATA<54>
CPU_DATA<52>
CPU_DATA<51>
CPU_DATA<48>
CPU_DATA<50>
CPU_DATA<47>
CPU_DATA<46>
CPU_DATA<45>
CPU_DATA<43>
CPU_DATA<41> CPU_DATA<42>
CPU_DATA<40>
CPU_DATA<39>
CPU_DATA<38>
CPU_DATA<37>
CPU_DATA<36>
CPU_DATA<35>
CPU_DATA<34>
CPU_DATA<33>
CPU_DATA<32>
CPU_DATA<30> CPU_DATA<31>
CPU_DATA<29>
CPU_DATA<28>
CPU_DATA<27>
CPU_DATA<25> CPU_DATA<26>
CPU_DATA<24>
CPU_DATA<23>
CPU_DATA<22>
CPU_DATA<20> CPU_DATA<21>
CPU_DATA<19>
CPU_DATA<17> CPU_DATA<18>
CPU_DATA<16>
CPU_DATA<12>
CPU_DATA<11>
CPU_DATA<10>
CPU_DATA<7>
CPU_DATA<9>
CPU_DATA<8>
CPU_DATA<6>
CPU_DATA<5>
CPU_DATA<2>
CPU_DATA<4>
CPU_DATA<3>
CPU_DATA<0> CPU_DATA<1>
CPU_BR_L
CPU_ADDR<1>
CPU_ADDR<4> CPU_ADDR<5>
CPU_ADDR<8> CPU_ADDR<9>
CPU_ADDR<12>
CPU_ADDR<15> CPU_ADDR<16>
CPU_ADDR<19> CPU_ADDR<20>
CPU_ADDR<22>
CPU_ADDR<21>
CPU_ADDR<24>
CPU_ADDR<23>
CPU_ADDR<25> CPU_ADDR<26> CPU_ADDR<27>
CPU_ADDR<29>
CPU_ADDR<28>
CPU_ADDR<31>
CPU_CI_L
CPU_TBST_L
CPU_TSIZ<2>
CPU_TSIZ<1>
CPU_TT<1>
CPU_TT<0>
CPU_TT<2>
CPU_TT<4>
CPU_TT<3>
CPU_WT_L
CPU_AACK_L
CPU_HIT_L
CPU_ARTRY_L
CPU_QREQ_L
CPU_QACK_L INT_SUSPEND_REQ_L INT_SUSPEND_ACK_L
INT_CPUFB_IN INT_CPUFB_OUT SYSCLK_LA_TP
CPU_CLK_EN
CPU_TBEN
CPU_DBG_L
CPU_ADDR<30>
CPU_DATA<44>
INTREPID_ACS_REF
CPU_DATA<51>
MAXBUS_SLEEP
CPU_DATA<50>
CPU_DATA<52>
CPU_ADDR<18>
CPU_ADDR<17>
CPU_ADDR<14>
40
40
40
40
40
35
35
35
35
35
16
16
16
16
16
15
15
15
15
15
8
8
8
8
8
38 38
38
38 38
38
38
38
38 38
38
7
38
38
38
38
38
7
38
38
38
7
38
38
40
38
38
38
38
38 38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
7
38
38
38
38
38
38 38
38
38 38
38
38
38
38 38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
7
38
38
8 8
8
8 8
8
8
8
8 8
8
6
38
38
8
8
8
8
8
6
8
8
8
6
38
8
8
38
38 38
38
38
38
38
14
38
8
8
8
8
8 8
8
38
38
37
8
8
8
8
8
8
8
8
8
8
8
8
8
8
37
37
6
8
8
38
38
38
8
8
8
8 8
8
8 8
8
8
8
8 8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
38
38
38
38
38
38 38
38
38
38
38 38
38
38 38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
8
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
8
8
8
8
38
37
37
8
38
8
8
6
8
8
38
38
38
6 6
6
6 6
6
6
6
6 6
6
5
5
5
6
6
6
6
37
6
5
6
6
6
5
5
5
5
6
6 6
5
5
5
5
12
5
6
6
6
6
6 6
6
5
5
5
5
5
5
5
5
5
5
5
5
5
6
6
6
6
8
37
8
37
37
37
5
40
5
5
5
5
5
5
5
6
6 6
6
6 6
6
6
6
6 6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6 6
6
6
6
6 6
6
6 6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
31 31
8
8
31
5
5
5
6
6
5
6
6
5
5
5
A0 A1
A6
A2 A3 A4 A5
A9
A8
A7
A10 A11 A12 A13 A14 A15 A16
A20
A17 A18 A19
CE OE WE WP PWD
GND
DQ0 DQ1
DQ6
DQ5
DQ2 DQ3 DQ4
DQ7
VPP VCC
FEPR-1MX8
(2 OF 9)
DDR_VREF_1
DDR_VREF_0
DDR_DATA_0 DDR_DATA_1 DDR_DATA_2 DDR_DATA_3 DDR_DATA_4 DDR_DATA_5 DDR_DATA_6 DDR_DATA_7 DDR_DATA_8 DDR_DATA_9 DDR_DATA_10 DDR_DATA_11 DDR_DATA_12 DDR_DATA_13 DDR_DATA_14 DDR_DATA_15 DDR_DATA_16 DDR_DATA_17 DDR_DATA_18 DDR_DATA_19 DDR_DATA_20 DDR_DATA_21
DDR_DATA_25 DDR_DATA_26 DDR_DATA_27 DDR_DATA_28 DDR_DATA_29 DDR_DATA_30
DDR_DATA_33 DDR_DATA_34 DDR_DATA_35 DDR_DATA_36 DDR_DATA_37 DDR_DATA_38 DDR_DATA_39 DDR_DATA_40 DDR_DATA_41 DDR_DATA_42 DDR_DATA_43 DDR_DATA_44 DDR_DATA_45 DDR_DATA_46 DDR_DATA_47 DDR_DATA_48 DDR_DATA_49 DDR_DATA_50 DDR_DATA_51 DDR_DATA_52 DDR_DATA_53 DDR_DATA_54 DDR_DATA_55 DDR_DATA_56 DDR_DATA_57 DDR_DATA_58 DDR_DATA_59 DDR_DATA_60 DDR_DATA_61 DDR_DATA_62 DDR_DATA_63
DDR_DATA_22 DDR_DATA_23 DDR_DATA_24
DDR_DATA_31 DDR_DATA_32
DDR_BA_0 DDR_BA_1
DDRCS_3
DDRCS_2
DDRCS_1
DDRCS_0
DDR_DQS_7
DDR_DQS_6
DDR_DQS_5
DDR_DQS_4
DDR_DQS_3
DDR_DQS_2
DDR_DQS_1
DDR_DQS_0
DDR_DM_7
DDR_DM_6
DDR_DM_5
DDR_DM_4
DDR_DM_3
DDR_DM_2
DDR_DM_1
DDR_DM_0
DDRRAS DDRCAS
DDRWE DDRCKE0 DDRCKE1 DDRCKE2 DDRCKE3
DDR_MCLK_0_P DDR_MCLK_0_N DDR_MCLK_1_P DDR_MCLK_1_N DDR_MCLK_2_P DDR_MCLK_2_N DDR_MCLK_3_P DDR_MCLK_3_N DDR_MCLK_4_P DDR_MCLK_4_N DDR_MCLK_5_P DDR_MCLK_5_N
DDR_REF
DDR_SELHI_0 DDR_SELHI_1 DDR_SELLO_0 DDR_SELLO_1
MEMORY
DDR
INTERFACE
DDR_A_10 DDR_A_11 DDR_A_12
DDR_A_9
DDR_A_8
DDR_A_7
DDR_A_6
DDR_A_5
DDR_A_4
DDR_A_3
DDR_A_2
DDR_A_1
DDR_A_0
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
SERIES RESISTORS FOR CLOCK/CONTROL SIGNALS
PINS ARE SWAPABLE FOR RPAKS
CLOCKS
’2’ & ’3’ GO TO SLOT B
’0’ & ’1’ GO TO SLOT A
’0’ & ’1’ GO TO SLOT A ’2’ & ’3’ GO TO SLOT B
’1’S ARE SAME POLARITY (ACTIVE-HI)
’0’S ARE SAME POLARITY (ACTIVE-LO)
MEM_VREF
CS
CKE
ADDR
BA
CNTL
1MB BOOT ROM
OVERRIDE ROM MODULE INTERCEPTS ROM CHIP SELECT
Weak pulldowns ensure CKEs stay low after 2.5V I/O to Intrepid shuts off.
INT - DDR/BOOTROM
2
1
R260
INT_2_5V_COLD
10K
5% 1/16W MF 402
2
1
R265
INT_2_5V_COLD
10K
5% 1/16W MF 402
12
9
11 3130
10
24
3923
35
34
33
32
28
27
26
25
22
7
8
14
15
16
17
18
38
19
37
13
40
1
2
3
4
5
6
36
20
21
U11
OMIT
1MX8-3.3V
TSOP
21
R1
0
402
MF
1/16W
5%
NO STUFF
21
R271
NO STUFF
0
5%
1/16W
MF
402
21
R194
402
MF
1/16W
5%
0
NO STUFF
2
1
R236
0
5% 1/16W MF 402
NO STUFF
21
R176
22
5%
1/16W
MF
402
2
1
R209
402
MF
1/16W
1%
1K
2
1
R208
402
MF
1/16W
1%
10K
2
1
C249
402
CERM
10V
20%
0.1uF
2
1
R202
402
MF
1/16W
1%
10K
2
1
C125
2.2uF
20% 10V CERM 805
2
1
C773
0.1uF
20% 10V CERM 402
2
1
C122
0.1uF
20% 10V CERM 402
2
1
R112
10K
5%
1/16W
MF
402
+3V_MAIN
T22
Y22
T32
N30
AE29
AB32
AA22
W35 W36
V33 V32
W32 W33
Y30 W30
Y35 Y36
Y32 Y33
L32
N29
P32
V30
AB30
AD32
AH31
AJ31
L33
N32
T33
T35
AC35
AD33
AH33
AJ33
AG35
AG33
AJ36
K35
K36
J36
K33
AJ35
K32
J35
J33
J32
M30
N33
L36
M33
M35
L35
AJ32
M36
N35
R32
R33
R35
R36
P36
P35
R30
P33
AK36
T36
U35
U36
T30
V35
U32
U33
V36
AB33
AA32
AK35
AC36
AB35
AB36
AA33
AA35
AA36
AD35
AD36
AE33
AE35
AK31
AE36
AF36
AF35
AE32
AG31
AG32
AH32
AH36
AG36
AH35
AK33
AK32
M29
L30
H36
D36
G32
E36
E35
F35
F36
G36
D35
H33
G33
G35
H35
K30
L29
AL33
AL35
AN36
AN34
AL36
AM36
AM35
AN35
H32
U51
CRITICAL
BGA
INTREPID-REV2.1
OMIT
2
1
R691
10K
5% 1/16W MF 402
21
R674
1K
5%
1/16W
MF
402
54
RP20
SM1
1/16W
5%
22
63
RP20
SM1
1/16W
5%
22
81
RP22
SM1
1/16W
5%
22
72
RP22
1/16W
SM1
5%
22
72
RP20
SM1
1/16W
5%
22
63
RP22
SM1
1/16W
5%
22
21
R162
22
5%
1/16W
MF
402
81
RP20
5%
1/16W
SM1
22
54
RP22
SM1
1/16W
5%
22
63
RP31
SM1
1/16W
5%
22
63
RP29
SM1
1/16W
5%
22
72
RP31
SM1
1/16W
5%
22
81
RP31
1/16W
SM1
5%
22
54
RP31
SM1
1/16W
5%
22
54
RP29
SM1
1/16W
5%
22
81
RP29
SM1
1/16W
5%
22
72
RP29
SM1
1/16W
5%
22
63
RP14
5%
SM1
1/16W
22
72
RP12
SM1
1/16W
5%
22
81
RP12
SM1
1/16W
5%
22
63
RP12
SM1
1/16W
5%
22
54
RP12
SM1
1/16W
5%
22
72
RP9
SM1
1/16W
5%
22
81
RP9
SM1
1/16W
5%
22
72
RP14
SM1
1/16W
5%
22
54
RP9
SM1
1/16W
5%
22
81
RP14
22
5%
1/16W
SM1
54
RP14
22
5%
1/16W
SM1
54
RP17
22
5%
1/16W
SM1
63
RP9
22
5%
1/16W
SM1
81
RP17
22
5%
1/16W
SM1
72
RP17
22
5%
1/16W
SM1
63
RP17
22
1/16W
5%
SM1
+3V_MAIN
2
1
R247
INT_2_5V_COLD
10K
5% 1/16W MF 402
2
1
R257
10K
5% 1/16W MF 402
INT_2_5V_COLD
1 ?
341S1555
IC,BOOTROM Q16B
CRITICAL
U11
051-6680
A
469
MEM_ADDR<8> RAM_ADDR<8>
RAM_ADDR<6>
RAM_ADDR<7>
RAM_ADDR<11>
RAM_ADDR<9>
RAM_ADDR<5>
PCI_AD<26>
PCI_AD<31>
RAM_CKE<0>
MEM_CKE<3>
MEM_CKE<2>
MEM_MUXSEL_LSB_L_TP
MEM_ADDR<12>
MEM_ADDR<11>
MEM_ADDR<10>
MEM_ADDR<9>
MEM_ADDR<8>
MEM_ADDR<7>
MEM_ADDR<6>
MEM_ADDR<5>
MEM_ADDR<4>
MEM_ADDR<3>
MEM_ADDR<2>
MEM_ADDR<1>
MEM_ADDR<0>
MEM_MUXSEL_LSB
MEM_MUXSEL_MSB
MEM_MUXSEL_MSB_L_TP
INT_MEM_REF_H
INT_DDRCLK5_P_TP INT_DDRCLK5_N_TP
SYSCLK_DDRCLK_B1_L_UF
SYSCLK_DDRCLK_B1_UF
SYSCLK_DDRCLK_B0_L_UF
INT_DDRCLK2_N_TP
SYSCLK_DDRCLK_B0_UF
INT_DDRCLK2_P_TP
SYSCLK_DDRCLK_A1_UF SYSCLK_DDRCLK_A1_L_UF
SYSCLK_DDRCLK_A0_L_UF
SYSCLK_DDRCLK_A0_UF
MEM_CKE<1>
MEM_CKE<0>
MEM_WE_L
MEM_CAS_L
MEM_RAS_L
MEM_DQM<7>
MEM_DQM<6>
MEM_DQM<5>
MEM_DQM<4>
MEM_DQM<3>
MEM_DQM<1>
MEM_DQM<0>
MEM_DQM<2>
MEM_DQS<7>
MEM_DQS<6>
MEM_DQS<5>
MEM_DQS<4>
MEM_DQS<3>
MEM_DQS<2>
MEM_DQS<1>
MEM_DQS<0>
MEM_CS_L<2>
MEM_CS_L<1>
MEM_CS_L<0>
MEM_CS_L<3>
MEM_BA<1>
MEM_BA<0>
MEM_DATA<54>
MEM_DATA<31>
MEM_DATA<29>
MEM_DATA<25>
MEM_DATA<24>
MEM_DATA<15>
MEM_DATA<63>
MEM_DATA<62>
MEM_DATA<61>
MEM_DATA<60>
MEM_DATA<59>
MEM_DATA<58>
MEM_DATA<57>
MEM_DATA<56>
MEM_DATA<55>
MEM_DATA<53>
MEM_DATA<52>
MEM_DATA<51>
MEM_DATA<50>
MEM_DATA<49>
MEM_DATA<48>
MEM_DATA<47>
MEM_DATA<46>
MEM_DATA<45>
MEM_DATA<44>
MEM_DATA<43>
MEM_DATA<42>
MEM_DATA<41>
MEM_DATA<40>
MEM_DATA<39>
MEM_DATA<38>
MEM_DATA<37>
MEM_DATA<36>
MEM_DATA<35>
MEM_DATA<34>
MEM_DATA<33>
MEM_DATA<32>
MEM_DATA<30>
MEM_DATA<28>
MEM_DATA<27>
MEM_DATA<26>
MEM_DATA<23>
MEM_DATA<22>
MEM_DATA<21>
MEM_DATA<20>
MEM_DATA<19>
MEM_DATA<18>
MEM_DATA<17>
MEM_DATA<16>
MEM_DATA<14>
MEM_DATA<13>
MEM_DATA<12>
MEM_DATA<11>
MEM_DATA<10>
MEM_DATA<9>
MEM_DATA<8>
MEM_DATA<7>
MEM_DATA<6>
MEM_DATA<5>
MEM_DATA<4>
MEM_DATA<3>
MEM_DATA<2>
MEM_DATA<1>
MEM_DATA<0>
INT_MEM_VREF
SYSCLK_DDRCLK_A0_UF
PCI_AD<18>
SYSCLK_DDRCLK_A1_L_UF
PCI_AD<1>
PCI_AD<5>
ROM_OE_L
ROM_WP_L
ROM_ONBOARD_CS_L
PCI_AD<25>
PCI_AD<27>
RAM_ADDR<1>
ROM_RW_TP_L
ROM_RW_L
SYSCLK_DDRCLK_B0_UF
SYSCLK_DDRCLK_B0_L
PCI_AD<24>
PCI_AD<14>
RAM_CS_L<3>
PCI_AD<20>
PCI_AD<19>
PCI_AD<9>
RAM_CKE<0>
ROM_OE_TP_L
INT_MEM_VREF
SYSCLK_DDRCLK_B0_L_UF
PCI_AD<11> PCI_AD<12>
PCI_AD<17>
PCI_AD<7> PCI_AD<8>
PCI_AD<28> PCI_AD<29> PCI_AD<30>
RAM_ADDR<2>
RAM_CKE<3>
RAM_CKE<1> RAM_CKE<2>
RAM_BA<1>
MEM_RAS_L RAM_RAS_L
RAM_WE_LMEM_WE_L
MEM_CAS_L RAM_CAS_L
RAM_BA<0>
RAM_ADDR<12>
RAM_ADDR<10>
MEM_ADDR<5>
MEM_ADDR<3>
MEM_ADDR<1>
RAM_ADDR<4>MEM_ADDR<4>
RAM_ADDR<0>
MEM_CKE<1>
MEM_CS_L<3>
SYSCLK_DDRCLK_B1
SYSCLK_DDRCLK_A1_L
SYSCLK_DDRCLK_A0
SYSCLK_DDRCLK_A1
RAM_CS_L<0>
MEM_BA<1>
MEM_ADDR<11>
MEM_BA<0>
MEM_ADDR<12>
MEM_ADDR<10>
MEM_ADDR<9>
MEM_ADDR<6>
MEM_ADDR<2>
+2_5V_INTREPID
RAM_CKE<3>
RAM_CKE<1>
SYSCLK_DDRCLK_A0_L
RAM_CKE<2>
ROM_ONBOARD_CS_TP_L
MEM_CKE<0>
SYSCLK_DDRCLK_B1_L_UF
SYSCLK_DDRCLK_B1_UF
MEM_CS_L<2> RAM_CS_L<2>
PCI_AD<10>
SYSCLK_DDRCLK_A0_L_UF
SYSCLK_DDRCLK_B1_L
PCI_AD<3>
PCI_AD<2>
PCI_AD<6>
PCI_AD<4>
PCI_AD<0>
RAM_ADDR<3>
MEM_CS_L<1>
MEM_CS_L<0>
MEM_CKE<3>
SYSCLK_DDRCLK_A1_UF
SYSCLK_DDRCLK_B0
PCI_AD<16>
PCI_AD<15>
PCI_AD<13>
MEM_ADDR<7>
RAM_CS_L<1>
INT_RESET_L
MEM_ADDR<0>
MEM_CKE<2>
ROM_CS_L
ROM_CS_TP_L
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41 41
41 41
41
41
41
41
41
41
41
41
41
41
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39 39
39 39
39
39
39
39
39
39
39
39
39
39
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26 26
26 26
26
40
26
26
26
26
26
26
26
26
26
18
18
37
18
18
18
18
18
18
18
18
18
18
37
18
18
18
18 18
18 18
18
37
37
37
16
37
37
37
18
18
18
18
18
18
18
18
18
37 37
37
37
37
37
37
17
17
11
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37 37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
40
37
17
37
17
17
41
17
17
37
41
37
37
17
17
37
17
17
17
11
40
37
17
17
17
17 17
17 17
17
37
11
11
11
37
37 37
37 37
37 37
37
37
37
37
37
37
37 37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
15
11
11
37
11
37
37
37
37 37
17
37
37
17
17
17
17
17
37
37
37
37
37
37
17
17
17
37
37
31
37
37
41
9
11
11
11
11
11
11
12
12
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
10
10
40
9
9
9
9
9 9
9
9
9
9
9
9
9
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
9
9
9
9
9
9
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
9
9
12
9
12
12
12
41
12
12
11
26
12
9
11
12
12
11
12
12
12
9
26
9
9
12
12
12
12 12
12 12
12
11
9
9
9
11
9
11
11
9
9
11
11
11
11
9
9
9
11
9
11
9
9
11
11
11
11
11
9
9
9
9
9
9
9
9
10
9
9
11
9
26
9
9
9
9
11
12
9
11
12
12
12
12
12
11
9
9
9
9
11
12
12
12
9
11
13
9
9
12
26
GND
DA10
SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
GND
DA10
SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
GND
DA10
SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
GND
DA10
SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
BIT 0..15
BIT 16..31
BIT 32..47 BIT 48..63
SEL = LOW; HOST = B PORT; A PORT = 100OHM TO GND SEL = HIGH; HOST = A PORT; B PORT = 100OHM TO GND
16BIT 2:1 DDR MUXES
2
1
C727
0.1uF
20% 10V CERM 402
2
1
C745
0.1uF
20% 10V CERM 402
2
1
C742
0.1uF
20% 10V CERM 402
2
1
C732
0.1uF
20% 10V CERM 402
2
1
C733
0.1uF
20% 10V CERM 402
2
1
C741
0.1uF
20% 10V CERM 402
2
1
C764
0.1uF
20% 10V CERM 402
2
1
C734
0.1uF
20% 10V CERM 402
2
1
C726
0.1uF
20% 10V CERM 402
2
1
C730
0.1uF
20% 10V CERM 402
2
1
C758
0.1uF
20% 10V CERM 402
2
1
C757
0.1uF
20% 10V CERM 402
F8F3E8
E3
H6H5G9G2D9D2C6
C5
E2
C2
B2
B3
B5
B6
B8
B9
C9
E9
F9
H9
J9
J8
J6
J5
J3
J2
H2
F2
E1
C1
A1
A3
A4
A6
B7
A9
B10
D10
F10
H10
K10
K8
K7
K5
J4
K2
J1
G1
D1
B1
A2
B4
A5
A7
A8
A10
C10
E10
G10
J10
K9
J7
K6
K4
K3
K1
H1
F1
U28
CRITICAL
CBTV4020
BGA
F8F3E8
E3
H6H5G9G2D9D2C6
C5
E2
C2
B2
B3
B5
B6
B8
B9
C9
E9
F9
H9
J9
J8
J6
J5
J3
J2
H2
F2
E1
C1
A1
A3
A4
A6
B7
A9
B10
D10
F10
H10
K10
K8
K7
K5
J4
K2
J1
G1
D1
B1
A2
B4
A5
A7
A8
A10
C10
E10
G10
J10
K9
J7
K6
K4
K3
K1
H1
F1
U27
CBTV4020
BGA
CRITICAL
F8F3E8
E3
H6H5G9G2D9D2C6
C5
E2
C2
B2
B3
B5
B6
B8
B9
C9
E9
F9
H9
J9
J8
J6
J5
J3
J2
H2
F2
E1
C1
A1
A3
A4
A6
B7
A9
B10
D10
F10
H10
K10
K8
K7
K5
J4
K2
J1
G1
D1
B1
A2
B4
A5
A7
A8
A10
C10
E10
G10
J10
K9
J7
K6
K4
K3
K1
H1
F1
U18
CRITICAL
CBTV4020
BGA
F8F3E8
E3
H6H5G9G2D9D2C6
C5
E2
C2
B2
B3
B5
B6
B8
B9
C9
E9
F9
H9
J9
J8
J6
J5
J3
J2
H2
F2
E1
C1
A1
A3
A4
A6
B7
A9
B10
D10
F10
H10
K10
K8
K7
K5
J4
K2
J1
G1
D1
B1
A2
B4
A5
A7
A8
A10
C10
E10
G10
J10
K9
J7
K6
K4
K3
K1
H1
F1
U16
CRITICAL
CBTV4020
BGA
A
051-6680
10 46
+2_5V_INTREPID
+2_5V_INTREPID
RAM_DQS_A<2>
RAM_DATA_A<23>
RAM_DATA_A<22>
MEM_DATA<12>
MEM_DATA<11>
MEM_DATA<10>
MEM_DATA<9>
MEM_DATA<1>
MEM_DATA<0>
MEM_DQS<0>
MEM_DATA<13>
MEM_DATA<15>
MEM_DQS<1> MEM_DQM<1>
MEM_MUXSEL_LSB
MEM_DATA<8>
MEM_DQM<0>
MEM_DATA<7>
MEM_DATA<6>
MEM_DATA<5>
MEM_DATA<4>
MEM_DATA<3>
RAM_DATA_B<0> RAM_DATA_B<1> RAM_DATA_B<2>
RAM_DATA_B<10>
RAM_DATA_B<9>
RAM_DATA_B<8>
RAM_DQM_B<0>
RAM_DQS_B<0>
RAM_DATA_B<4>
RAM_DATA_B<3>
RAM_DATA_B<7>
RAM_DATA_B<6>
RAM_DATA_B<5>
RAM_DQM_B<1>
RAM_DQS_B<1>
RAM_DATA_B<15>
RAM_DATA_B<14>
RAM_DATA_B<12>
RAM_DATA_B<11>
RAM_DATA_A<10> RAM_DATA_A<11>
RAM_DATA_A<13>
RAM_DATA_A<12>
RAM_DATA_A<15>
RAM_DATA_A<14>
RAM_DQS_A<1> RAM_DQM_A<1>
MEM_DATA<2>
MEM_DATA<14>
RAM_DQM_A<0>
RAM_DQS_A<0>
RAM_DATA_A<7>
RAM_DATA_A<6>
RAM_DATA_A<4> RAM_DATA_A<5>
RAM_DATA_A<1>
RAM_DATA_A<3>
RAM_DATA_A<2>
RAM_DATA_A<0>
RAM_DATA_A<8>
RAM_DATA_B<16> RAM_DATA_B<17> RAM_DATA_B<18>
RAM_DATA_B<26>
RAM_DATA_B<24>
RAM_DQM_B<2>
RAM_DQS_B<2>
RAM_DATA_B<20>
RAM_DATA_B<19>
RAM_DATA_B<23>
RAM_DATA_B<22>
RAM_DATA_B<21>
RAM_DQM_B<3>
RAM_DQS_B<3>
RAM_DATA_B<31>
RAM_DATA_B<30>
RAM_DATA_B<28>
RAM_DATA_B<27>
RAM_DATA_A<26> RAM_DATA_A<27>
RAM_DATA_A<29>
RAM_DATA_A<28>
RAM_DATA_A<31>
RAM_DATA_A<30>
RAM_DQS_A<3>
MEM_DATA<16>
RAM_DQM_A<3>
MEM_DATA<19>
MEM_DATA<17> MEM_DATA<18>
MEM_DATA<21>
MEM_DATA<20>
MEM_DQS<2>
MEM_DATA<22> MEM_DATA<23>
MEM_DQM<2>
MEM_DATA<24>
MEM_DATA<27>
MEM_DATA<26>
MEM_DATA<25>
MEM_DATA<29>
MEM_DATA<28>
MEM_DATA<30>
MEM_MUXSEL_LSB
RAM_DQM_A<2>
RAM_DATA_A<20> RAM_DATA_A<21>
RAM_DATA_A<17>
RAM_DATA_A<19>
RAM_DATA_A<18>
RAM_DATA_A<16>
RAM_DATA_A<24>
MEM_DQM<3>
RAM_DATA_A<25>
RAM_DATA_B<32> RAM_DATA_B<33> RAM_DATA_B<34>
RAM_DATA_B<42>
RAM_DATA_B<41>
RAM_DATA_B<40>
RAM_DQM_B<4>
RAM_DQS_B<4>
RAM_DATA_B<36>
RAM_DATA_B<35>
RAM_DATA_B<39>
RAM_DATA_B<38>
RAM_DATA_B<37>
RAM_DQM_B<5>
RAM_DQS_B<5>
RAM_DATA_B<46>
RAM_DATA_B<44>
RAM_DATA_B<43>
RAM_DATA_A<42> RAM_DATA_A<43>
RAM_DATA_A<45>
RAM_DATA_A<44>
RAM_DATA_A<47>
RAM_DATA_A<46>
RAM_DQS_A<5>
MEM_DATA<32>
RAM_DQM_A<5>
MEM_DATA<35>
MEM_DATA<33> MEM_DATA<34>
MEM_DATA<37>
MEM_DATA<36>
MEM_DQS<4>
MEM_DATA<38> MEM_DATA<39>
MEM_DQM<4>
MEM_DATA<40>
MEM_DATA<43>
MEM_DATA<42>
MEM_DATA<41>
MEM_DATA<45>
MEM_DATA<44>
MEM_DATA<46>
MEM_DQS<5>
MEM_DATA<47>
MEM_MUXSEL_MSB
RAM_DQM_A<4>
RAM_DQS_A<4>
RAM_DATA_A<39>
RAM_DATA_A<38>
RAM_DATA_A<36>
RAM_DATA_A<33> RAM_DATA_A<34>
RAM_DATA_A<32>
RAM_DATA_A<40>
MEM_DQM<5>
RAM_DATA_A<41> RAM_DATA_B<48>
RAM_DATA_B<49> RAM_DATA_B<50>
RAM_DATA_B<58>
RAM_DATA_B<57>
RAM_DATA_B<56>
RAM_DQM_B<6>
RAM_DQS_B<6>
RAM_DATA_B<52>
RAM_DATA_B<51>
RAM_DATA_B<55>
RAM_DATA_B<54>
RAM_DATA_B<53>
RAM_DQM_B<7>
RAM_DQS_B<7>
RAM_DATA_B<63>
RAM_DATA_B<62>
RAM_DATA_B<61>
RAM_DATA_B<60>
RAM_DATA_B<59>
RAM_DATA_A<58> RAM_DATA_A<59>
RAM_DATA_A<61>
RAM_DATA_A<60>
RAM_DATA_A<63>
RAM_DATA_A<62>
RAM_DQS_A<7>
MEM_DATA<48>
RAM_DQM_A<7>
MEM_DATA<51>
MEM_DATA<49> MEM_DATA<50>
MEM_DATA<53>
MEM_DATA<52>
MEM_DQS<6>
MEM_DATA<54> MEM_DATA<55>
MEM_DQM<6>
MEM_DATA<56>
MEM_DATA<59>
MEM_DATA<58>
MEM_DATA<57>
MEM_DATA<61>
MEM_DATA<60>
MEM_DATA<62>
MEM_DQS<7>
MEM_DATA<63>
MEM_MUXSEL_MSB
RAM_DQM_A<6>
RAM_DQS_A<6>
RAM_DATA_A<55>
RAM_DATA_A<54>
RAM_DATA_A<52> RAM_DATA_A<53>
RAM_DATA_A<49>
RAM_DATA_A<51>
RAM_DATA_A<50>
RAM_DATA_A<48>
RAM_DATA_A<56>
MEM_DQM<7>
RAM_DATA_A<57>
+2_5V_INTREPID+2_5V_INTREPID
RAM_DATA_B<47>
RAM_DATA_B<45>
RAM_DATA_B<25>
MEM_DATA<31>
MEM_DQS<3>
RAM_DATA_B<13>
RAM_DATA_A<37>
RAM_DATA_A<35>
RAM_DATA_B<29>
RAM_DATA_A<9>
40
40
40 40
16
16
16 16
15
15
37
37
37 37
15 15
10
10
37
37
37
37
37
37
37
37
37
37
37
37
37 37
10
37
37
37
37
37
37
37
37
37 37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37 37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37 37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37 37
37
37
37
37 37
37 37
37
37
37
37
37
37
10
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37 37
37
37
37
37
37
37
37
37
37
37
10
37
37
37
37
37
37 37
37
37
37
37 37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37 37
37
37
37
37
37
37
37
37
37
37
10
37
37
37
37
37 37
37
37
37
37
37
37
37
10 10
37
37
37
37 37
37
37
37
37
37
9
9
11
11
11
9
9
9
9
9
9
9
9
9
9 9
9
9
9
9
9
9
9
9
11
11 11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11 11
11
11
11
11
11
11
9
9
11
11
11
11
11
11
11
11
11
11
11
11 11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
9
11
9
9 9
9
9
9
9 9
9 9
9
9
9
9
9
9
9
11
11
11
11
11
11
11
11
9
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
9
11
9
9
9
9
9
9
9 9
9
9
9
9
9
9
9
9
9
9
9
11
11
11
11
11
11 11
11
11
9
11 11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
9
11
9
9
9
9
9
9
9 9
9
9
9
9
9
9
9
9
9
9
9
11
11
11
11
11 11
11
11
11
11
11
9
11
9 9
11
11
11
9 9
11
11
11
11
11
DQ58
RFU18
KEY
VDD6 VSS6 VSS8
VDD5
DQ15
DQ13
DQ14
VSS5
DM1
VDD3
VSS3
DQ7
DQ12
DQ6
DM0
DQ4 DQ5
VSS1
VREF1
VDD1
SA1 SA2
RFU19
SA0
VDD32
DQ63
DQ62
VSS32
DQ61
VDD30
DQ60
DQ55
DM7
VSS30
DQ54
DM6
VDD28
DQ53
DQ52
VDD25
CK1*
CK1
VSS28
DQ47
DQ46
VDD23
VSS25
DM5
DQ45
DQ44
DM4
DQ39
VSS23
DQ38
DQ37
RFU17
DQ36
VSS21
VDD21
VDD19
RAS*
BA1
CAS*
S1*
A6 A4 A2 A0
VSS19
A8
A11
VDD17
RFU15
CKE0
VDD15
VSS17
RFU11 VSS16
RFU9
VDD14
RFU3
VSS14
RFU5 RFU7
RFU1
VDD12
VSS12
DM3
DQ31
DQ30
DQ29
VSS10
VDD10
DQ28
DQ23
DM2
DQ20
VDD8
DQ21
DQ22
VDDSPD
SCL
SDA
VDD31
VSS31
DQ59
DQS7
DQ51
VDD29
DQ56
VSS29
DQ57
DQ48
DQS6
VDD27
DQ49
DQ50
DQ43
VSS26
VDD26
VDD24
VSS27
DQ41 DQS5 VSS24
VDD22
DQ42
DQ34 VSS22 DQ35
DQS4
DQ40
VDD20
RFU16
DQ32
VSS20
DQ33
S0*
VDD18
BA0
A10_AP
WE*
A1
A5 A3
A9
A7
VSS18
CKE1 RFU14
RFU13 VDD16
VDD13
VSS15
RFU10
RFU8
RFU12
RFU0
RFU4
VSS13
RFU2
RFU6
VSS11 DQ26 DQ27
DQS3
VDD11
DQ19 DQ24 VDD9
VSS9
DQ25
DQ18
DQ16
VDD7
DQ17
DQS2
DQ11 VDD4
VSS7
CK0*
CK0
DQS1 VSS4 DQ10
VDD2 DQ9
DQ2
DQS0
DQ8
DQ3
VSS2
VDD0
DQ0 DQ1
VSS0
VREF0
A12
(1 OF 2)(2 OF 2)
DQ58
RFU18
KEY
VDD6 VSS6 VSS8
VDD5
DQ15
DQ13
DQ14
VSS5
DM1
VDD3
VSS3
DQ7
DQ12
DQ6
DM0
DQ4 DQ5
VSS1
VREF1
VDD1
SA1 SA2
RFU19
SA0
VDD32
DQ63
DQ62
VSS32
DQ61
VDD30
DQ60
DQ55
DM7
VSS30
DQ54
DM6
VDD28
DQ53
DQ52
VDD25
CK1*
CK1
VSS28
DQ47
DQ46
VDD23
VSS25
DM5
DQ45
DQ44
DM4
DQ39
VSS23
DQ38
DQ37
RFU17
DQ36
VSS21
VDD21
VDD19
RAS*
BA1
CAS*
S1*
A6 A4 A2 A0
VSS19
A8
A11
VDD17
RFU15
CKE0
VDD15
VSS17
RFU11 VSS16
RFU9
VDD14
RFU3
VSS14
RFU5 RFU7
RFU1
VDD12
VSS12
DM3
DQ31
DQ30
DQ29
VSS10
VDD10
DQ28
DQ23
DM2
DQ20
VDD8
DQ21
DQ22
VDDSPD
SCL
SDA
VDD31
VSS31
DQ59
DQS7
DQ51
VDD29
DQ56
VSS29
DQ57
DQ48
DQS6
VDD27
DQ49
DQ50
DQ43
VSS26
VDD26
VDD24
VSS27
DQ41 DQS5 VSS24
VDD22
DQ42
DQ34 VSS22 DQ35
DQS4
DQ40
VDD20
RFU16
DQ32
VSS20
DQ33
S0*
VDD18
BA0
A10_AP
WE*
A1
A5 A3
A9
A7
VSS18
CKE1 RFU14
RFU13 VDD16
VDD13
VSS15
RFU10
RFU8
RFU12
RFU0
RFU4
VSS13
RFU2
RFU6
VSS11 DQ26 DQ27
DQS3
VDD11
DQ19 DQ24 VDD9
VSS9
DQ25
DQ18
DQ16
VDD7
DQ17
DQS2
DQ11 VDD4
VSS7
CK0*
CK0
DQS1 VSS4 DQ10
VDD2 DQ9
DQ2
DQS0
DQ8
DQ3
VSS2
VDD0
DQ0 DQ1
VSS0
VREF0
A12
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
NC
NCNC
NC NC
NCNC
NC NC
NC NC
NC
NC
NC
NC
NC
NC
NC NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC NC
NC
NC
NC
NC
NC
NC NC
NC
NC
NC
NC NC
SLOT "A" LOWER SLOT
FACTORY SLOT
SLOT "B" UPPER SLOT
CUSTOMER SLOT
ADDR=0XA0(WR)/0XA1(RD) ADDR=0XA2(WR)/0XA3(RD)
on the PCB for additional mounting
DDR VREF
ONE 0.1UF PER SLOT
DDR BYPASS
SLOT "A"
SLOT "B"
DDR SODIMM CONNS
NOTE: The SODIMM connector footprint has a through-hole slot
2
1
C140
0.1uF
20% 10V CERM 402
2
1
C156
0.1uF
20% 10V CERM 402
2
1
C132
0.1uF
20% 10V CERM 402
119B
51B
40B39B
38B
28B27B
16B
186B185B
174B
15B
173B
162B161B
159B
150B149B
138B137B
126B125B
4B
104B103B
90B
88B87B
76B75B
64B63B
52B
3B
2B1B
197B
57B
46B45B
36B
34B33B
22B
192B191B
180B
21B
179B
168B167B
157B
156B155B
144B143B
132B131B
10B
114B113B
94B93B
92B
82B81B
70B69B
58B
9B
193B 195B
198B
196B
194B
122B121B
84B83B
80B79B
78B77B
74B73B
72B
200B199B
124B123B
98B97B
91B
89B
86B85B
71B
118B
402
401
183B
169B
147B
133B
61B
47B
25B
11B
23B
19B
18B
14B
190B
188B
182B
178B
8B
189B
187B
181B
177B
176B
172B
166B
164B
175B
171B
6B
165B
163B
154B
152B
146B
142B
153B
151B
145B
141B
17B
140B
136B
130B
128B
139B
135B
129B
127B
68B
66B
13B
60B
56B
67B
65B
59B
55B
54B
50B
44B
42B
7B
53B
49B
43B
41B
32B
30B
24B
20B
31B
29B
5B
184B
170B
148B
134B
62B
48B
26B
12B
95B 96B
158B 160B
37B
35B
120B
116B
117B
101B 102B
105B 106B 107B 108B 109B 110B 111B
99B
100B
115B
112B
J25
CRITICAL
F-RT-SM
DDR-SO-DIMM-DUAL
119A
51A
40A39A
38A
28A27A
16A
186A185A
174A
15A
173A
162A161A
159A
150A149A
138A137A
126A125A
4A
104A103A
90A
88A87A
76A75A
64A63A
52A
3A
2A1A
197A
57A
46A45A
36A
34A33A
22A
192A191A
180A
21A
179A
168A167A
157A
156A155A
144A143A
132A131A
10A
114A113A
94A93A
92A
82A81A
70A69A
58A
9A
193A 195A
198A
196A
194A
122A121A
84A83A
80A79A
78A77A
74A73A
72A
200A199A
124A123A
98A97A
91A
89A
86A85A
71A
118A
404
403
183A
169A
147A
133A
61A
47A
25A
11A
23A
19A
18A
14A
190A
188A
182A
178A
8A
189A
187A
181A
177A
176A
172A
166A
164A
175A
171A
6A
165A
163A
154A
152A
146A
142A
153A
151A
145A
141A
17A
140A
136A
130A
128A
139A
135A
129A
127A
68A
66A
13A
60A
56A
67A
65A
59A
55A
54A
50A
44A
42A
7A
53A
49A
43A
41A
32A
30A
24A
20A
31A
29A
5A
184A
170A
148A
134A
62A
48A
26A
12A
95A 96A
158A 160A
37A
35A
120A
116A
117A
101A 102A
105A 106A 107A 108A 109A 110A 111A
99A
100A
115A
112A
J25
CRITICAL
F-RT-SM
DDR-SO-DIMM-DUAL
2
1
C404
10uF
20%
6.3V CERM 805
2
1
C128
10uF
20%
6.3V CERM 805
2
1
R299
1K
1% 1/16W MF 402
2
1
R303
1K
1% 1/16W MF 402
2
1
C397
0.1uF
20% 10V CERM 402
2
1
C403
0.1uF
20%
402
CERM
10V
+2_5V_MAIN+2_5V_MAIN
+2_5V_MAIN
+2_5V_MAIN
+2_5V_MAIN+2_5V_MAIN
+3V_MAIN +3V_MAIN
+3V_MAIN
2
1
C169
0.1uF
10V
20% CERM
402
2
1
C391
20%
0.1uF
10V 402
CERM
2
1
C356
0.1uF
20% 10V CERM 402
2
1
C211
0.1uF
20% 10V CERM 402
2
1
C127
0.1uF
20% 10V CERM 402
+2_5V_MAIN
2
1
C174
10uF
20%
6.3V 805
CERM
2
1
C150
0.1uF
20% 10V CERM 402
2
1
C157
10uF
20%
6.3V CERM 805
2
1
C383
0.1uF
20% 10V CERM 402
051-6680
A
4611
SYSCLK_DDRCLK_B1_L
INT_I2C_DATA0 INT_I2C_CLK0
RAM_DATA_A<26>
RAM_DQS_A<2>
RAM_DATA_A<9> RAM_DQS_A<1>
RAM_DATA_A<10>
DDR_VREF
RAM_DATA_A<4>
RAM_DATA_B<21>
RAM_DATA_B<5>
RAM_DATA_B<37>
RAM_DATA_B<63>
RAM_DATA_B<62>
RAM_DQM_B<7>
RAM_DATA_B<61>
RAM_DATA_B<60>
RAM_DATA_B<55>
RAM_DATA_B<54>
RAM_DQM_B<6>
RAM_DATA_B<53>
RAM_DATA_B<52>
SYSCLK_DDRCLK_B1
RAM_DATA_B<47>
RAM_DATA_B<46>
RAM_DQM_B<5>
RAM_DATA_B<45>
RAM_DATA_B<44>
RAM_DATA_B<39>
RAM_DATA_B<38>
RAM_DQM_B<4>
RAM_DATA_B<36>
RAM_CS_L<3>
RAM_CAS_L
RAM_RAS_L
RAM_BA<1>
RAM_ADDR<0>
RAM_ADDR<2>
RAM_ADDR<4>
RAM_ADDR<6>
RAM_ADDR<8>
RAM_ADDR<11>
RAM_CKE<2>
RAM_DATA_B<31>
RAM_DATA_B<30>
RAM_DQM_B<3>
RAM_DATA_B<29>
RAM_DATA_B<28>
RAM_DATA_B<23>
RAM_DATA_B<22>
RAM_DQM_B<2>
RAM_DATA_B<20>
RAM_DATA_B<15>
RAM_DATA_B<14>
RAM_DQM_B<1>
RAM_DATA_B<13>
RAM_DATA_B<12>
RAM_DATA_B<7>
RAM_DATA_B<6>
RAM_DQM_B<0>
RAM_DATA_B<4>
DDR_VREF
INT_I2C_CLK0
INT_I2C_DATA0
RAM_DATA_B<59>
RAM_DATA_B<58>
RAM_DQS_B<7>
RAM_DATA_B<57>
RAM_DATA_B<56>
RAM_DATA_B<51>
RAM_DATA_B<50>
RAM_DQS_B<6>
RAM_DATA_B<49>
RAM_DATA_B<48>
RAM_DATA_B<43>
RAM_DATA_B<42>
RAM_DQS_B<5>
RAM_DATA_B<41>
RAM_DATA_B<40>
RAM_DATA_B<35>
RAM_DATA_B<34>
RAM_DQS_B<4>
RAM_DATA_B<33>
RAM_DATA_B<32>
RAM_CS_L<2>
RAM_WE_L
RAM_BA<0>
RAM_ADDR<10>
RAM_ADDR<1>
RAM_ADDR<3>
RAM_ADDR<5>
RAM_ADDR<7>
RAM_ADDR<9>
RAM_ADDR<12>
RAM_CKE<3>
RAM_DATA_B<27>
RAM_DATA_B<26>
RAM_DQS_B<3>
RAM_DATA_B<25>
RAM_DATA_B<24>
RAM_DATA_B<19>
RAM_DATA_B<18>
RAM_DQS_B<2>
RAM_DATA_B<17>
RAM_DATA_B<16>
SYSCLK_DDRCLK_B0_L
SYSCLK_DDRCLK_B0
RAM_DATA_B<11>
RAM_DATA_B<10>
RAM_DQS_B<1>
RAM_DATA_B<9>
RAM_DATA_B<8>
RAM_DATA_B<3>
RAM_DATA_B<2>
RAM_DQS_B<0>
RAM_DATA_B<1>
RAM_DATA_B<0>
DDR_VREF
RAM_DATA_A<7>
RAM_DATA_A<13>
RAM_DATA_A<20>
RAM_DATA_A<22>
RAM_DATA_A<28>
RAM_ADDR<8>
RAM_ADDR<2>
RAM_DATA_A<39>
RAM_DATA_A<47>
RAM_DQM_A<6>
RAM_DATA_A<60>
RAM_DATA_A<43>
RAM_DATA_A<42>
RAM_DQS_A<4>
RAM_DATA_A<33>
RAM_DATA_A<40>
RAM_DQS_A<5>
RAM_DATA_A<41>
RAM_ADDR<10>
RAM_ADDR<3> RAM_ADDR<1>
RAM_ADDR<12>
RAM_DATA_A<27>
RAM_DATA_A<17>
RAM_DATA_A<16>
RAM_DQS_A<0>
RAM_DATA_A<1>
DDR_VREF
RAM_DATA_A<0>
SYSCLK_DDRCLK_A1_L
RAM_DATA_A<21>
DDR_VREF
RAM_DATA_A<38>
RAM_DQM_A<4>
RAM_BA<1>
RAM_DATA_A<15>
RAM_DATA_A<63>
RAM_DATA_A<62>
RAM_DQM_A<7>
RAM_DATA_A<61>
RAM_DATA_A<55>
RAM_DATA_A<54>
RAM_DATA_A<53>
RAM_DATA_A<52>
SYSCLK_DDRCLK_A1
RAM_DATA_A<46>
RAM_DQM_A<5>
RAM_DATA_A<45>
RAM_DATA_A<44>
RAM_DATA_A<37>
RAM_DATA_A<36>
RAM_CS_L<1>
RAM_CAS_L
RAM_ADDR<0>
RAM_ADDR<4>
RAM_ADDR<6>
RAM_ADDR<11>
RAM_CKE<0>
RAM_DATA_A<30>
RAM_DQM_A<3>
RAM_DATA_A<29>
RAM_DATA_A<14>
RAM_DQM_A<1>
RAM_DATA_A<12>
RAM_DQM_A<0>
RAM_DATA_A<5>
RAM_DATA_A<56>
RAM_DATA_A<50>
RAM_DATA_A<59>
RAM_DATA_A<58>
RAM_DQS_A<7>
RAM_DATA_A<57>
RAM_DATA_A<51>
RAM_DQS_A<6>
RAM_DATA_A<49>
RAM_DATA_A<48>
RAM_DATA_A<35>
RAM_DATA_A<34>
RAM_DATA_A<32>
RAM_CS_L<0>
RAM_WE_L
RAM_BA<0>
RAM_ADDR<5>
RAM_ADDR<7>
RAM_ADDR<9>
RAM_CKE<1>
RAM_DQS_A<3>
RAM_DATA_A<25>
RAM_DATA_A<24>
RAM_DATA_A<19>
SYSCLK_DDRCLK_A0_L
SYSCLK_DDRCLK_A0
RAM_DATA_A<11>
RAM_DATA_A<8>
RAM_DATA_A<3>
RAM_DATA_A<2>
RAM_RAS_L
RAM_DATA_A<6>
RAM_DATA_A<18>
RAM_DQM_A<2>
RAM_DATA_A<31>
RAM_DATA_A<23>
41
41 41
41 24
24 24
24 13
13
37
37
37
37
37
37
37
37
37
13
13
37
37
37
37
37
37
37
37
37
37
37
37
37 37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
11
11
37
37
37 37
37
40
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
11
11
11
11
11
11
11
11
11
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
40
11
11
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
11
11
11
11
11
11
11
11
11
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
40
37
37
37
37
37
11
11
37
37
37
37
37
37
37
37
37
37
37
11
11 11
11
37
37
37
37
37
40
37
37
37
40
37
37
11
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
11
11
11
11
11
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
11
11
11
11
11
37
37
37
37
37
37
37
37
37
37
37
11
37
37
37
37
37
9
6
6
10
10
10 10
10
11
10
10
10
10
10
10
10
10
10
10
10
10
10
9
10
10
10
10
10
10
10
10
10
9
9
9
9
9
9
9
9
9
9
9
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
11
6
6
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
9
9
9
9
9
9
9
9
9
9
9
10
10
10
10
10
10
10
10
10
10
9
9
10
10
10
10
10
10
10
10
10
10
11
10
10
10
10
10
9
9
10
10
10
10
10
10
10
10
10
10
10
9
9 9
9
10
10
10
10
10
11
10
9
10
11
10
10
9
10
10
10
10
10
10
10
10
10
9
10
10
10
10
10
10
9
9
9
9
9
9
9
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
9
9
9
9
9
9
9
10
10
10
10
9
9
10
10
10
10
9
10
10
10
10
10
(PLL4)
VDD15A_6
(PLL4) VSSA_6
ROM_WE
ROM_OE
PCI_STOP PCI_DEVSEL
PCI_CBE_3
PCI_CBE_2
PCI_CBE_1
PCI_CBE_0
ROM_CS
PCI_CLK_IN
PCI_CLK_OUT
PCI_CLK2
PCI_CLK1
PCI_CLK0
PCI_FRAME
PCI_PAR
PCI_TRDY PCI_IRDY
PCI_REQ_2
PCI_REQ_1
PCI_REQ_0
PCI_GNT_0 PCI_GNT_1 PCI_GNT_2
PCI/ROM
INTERFACE
PCIAD_31
PCIAD_30
PCIAD_28
PCIAD_27
PCIAD_26
PCIAD_25
PCIAD_29
PCIAD_19
PCIAD_18
PCIAD_17
PCIAD_16
PCIAD_15
PCIAD_23 PCIAD_24
PCIAD_20 PCIAD_21 PCIAD_22
PCIAD_14
(7 OF 9)
PCIAD_11
PCIAD_10
PCIAD_12 PCIAD_13
PCIAD_9
PCIAD_6
PCIAD_5
PCIAD_7 PCIAD_8
PCIAD_4
PCIAD_3
PCIAD_1 PCIAD_2
PCIAD_0
ROM_OVRLY_EN
VSSA_5 (PLL5)
(PLL5)
VDD15A_5
STP_AGP AGPPVT AGPVREF0 AGPVREF1
AGP_BUSY AGP_CLK AGP_FB_IN AGP_FB_OUT
AGPAD0
AGPREQ AGPGNT
AGP_SBA3
AGP_SBA2
AGP_SBA1
AGP_SBA0
AGPCBE_3
AGPFRAME
AGPTRDY AGPIRDY AGPSTOP
AGPDEVSEL
AGPPAR
AGPAD31
AGPAD30
AGPCBE_0 AGPCBE_1 AGPCBE_2
AGP_ST2
AGP_AD_STB0_P AGP_AD_STB0_N AGP_AD_STB1_P AGP_AD_STB1_N
AGPPIPE
AGPRBF
AGP_ST1
AGP_SBA7
AGP_SB_STB_P AGP_SB_STB_N
AGP_ST0
AGP_WBF
AGP
INTERFACES
AGP_SBA6
AGP_SBA5
AGP_SBA4
AGPAD29
AGPAD28
AGPAD27
AGPAD26
AGPAD25
AGPAD24
AGPAD23
AGPAD22
AGPAD21
AGPAD20
AGPAD19
AGPAD18
AGPAD17
AGPAD16
AGPAD15
AGPAD14
AGPAD13
AGPAD12
AGPAD11
AGPAD10
AGPAD9
AGPAD8
AGPAD7
AGPAD6
AGPAD5
AGPAD4
AGPAD3
AGPAD2
AGPAD1
(3 OF 9)
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PCI FEEDBACK CLOCK MATCHES LONGEST PCI CLOCK ROUTE
PLACE NEAR INTREPID
VOUT = 3.3V
VIN = 1.5V
PCI PULL-UPS
BECAUSE THIS CHIP IS POWERED DURING SLEEP
NEC USB2 REQ REMAINS ON +3V_MAIN
AGP I/O REFERENCE
BECAUSE SINGLE AGP PWR PLANE AND CLOSE PROXIMITY OF CHIPS
SIMPLY PROVIDING REFERENCE TO CHIP
(PLACE CLOSE TO INTREPID AGP BALLS)
SERIES RESISTORS FOR BOOTROM CONTROL SIGNALS
PLACE CLOSE TO INTREPID SIDE
AGP_FB_CLK IS ROUTED THE SAME LENGTH AS CLK66M_GPU_AGP
USE 52-OHM A RESISTOR HERE.
NOTE: Designs using AGP slot should
Vout = AGPIO (1.5V) Vin = Vcore (1.5V) Vout = AGPIO (1.5V)
INTREPID AGP/PCI
AGP PULL-UPS/PULL DOWNS
21
R197
4.7
5%
1/16W
MF
402
21
R246
402
MF
1/16W
5%
0
2
1
R245
60.4
1% 1/16W MF 402
63
RP34
SM1
1/16W
5%
10K
21
R167
4.7
5%
1/16W
MF
402
2
1
C190
0.22uF
20%
6.3V CERM
402
J10
J11
AN9
AK17
AR7
AM9
AT15
AR15
AT17
AR16
AR17
AT14
AH16
AN17
AN18
AT16
AN16
AM17
AM18 AJ19
AT18
AH18
AR18
AJ15
AM16
AK16
AR14
AR9
AK13
AH13
AN11
AT8
AN10
AM15
AN15
AJ8
AK14
AT13
AN14
AH15
AK15
AR13
AM11
AT12
AJ11
AR12
AK12
AM13
AN13
AT10
AT11
AK11
AN12
AM12
AR11
AT9
AR10
AR8
AM10
U51
OMIT
INTREPID-REV2.1
BGA
CRITICAL
21
R272
33
5%
1/16W
402
MF
21
R230
33
5%
1/16W
MF
402
21
R264
33
5% MF
1/16W
402
2
1
R244
47
5% 1/16W MF 402
+3V_SLEEP
72
RP33
10K
5%
1/16W
SM1
54
RP33
10K
5%
1/16W
SM1
54
RP36
10K
5%
1/16W
SM1
63
RP36
10K
5%
1/16W
SM1
81
RP36
10K
5%
1/16W
SM1
72
RP36
10K
5%
1/16W
SM1
63
RP33
10K
5%
1/16W
SM1
81
RP33
10K
5%
1/16W
SM1
21
R282
22
5%
1/16W
MF
402
21
R278
22
5%
1/16W
MF
402
21
R277
22
5%
1/16W
MF
402
21
R252
33
5%
MF
1/16W
402
21
R273
22
5%
1/16W
MF
402
2
1
C311
NO STUFF
12PF
5%
50V
CERM
402
2
1
C362
NO STUFF
12PF
5%
50V
CERM
402
2
1
C372
NO STUFF
12PF
5%
50V
CERM
402
21
R553
402
MF
1/16W
5%
10K
21
R318
402
MF
1/16W
5%
10K
21
R316
402
MF
1/16W
5%
10K
21
R314
10K
5%
1/16W
MF
402
21
R317
402
1/16W
MF
5%
10K
21
R552
402
MF
1/16W
5%
10K
21
R334
10K
5%
1/16W
MF
402
21
R308
10K
5%
1/16W
MF
402
+3V_MAIN
21
R255
402
MF
1/16W
5%
10K
21
R239
402
MF
1/16W
5%
10K
21
R254
10K
5%
1/16W
MF
402
21
R256
402
MF
5%
1/16W
10K
21
R253
402
MF
1/16W
5%
10K
21
R235
402
1/16W
MF
5%
10K
2
1
R225
1K
1% MF
1/16W
402
2
1
R219
1K
1%
1/16W
MF
402
2
1
C291
0.22uF
6.3V
20% CERM
402
81
RP34
SM1
1/16W
5%
10K
54
RP34
1/16W
SM1
5%
10K
72
RP34
SM1
1/16W
5%
10K
V13
V14
AN19
AK30
AR30
AT30
AN29
AH25 AG25
AN30
AM30
AT31
AR31
AN31
AM31
AR32
AT32
AK25
AK27
AK28
AT19
AK21 AK22
AK20 AK19
AB21
AB20
AR29
AM28
AT33
AK24
AJ24
AJ29
AT29
AT28
AM29
AN28
AM27
AL25
AN24
AT23
AM20
AT22
AM21
AN21
AR21
AN20
AT21
AN27
AR28
AR20
AT27
AR27
AM26
AN26
AM25
AT26
AR26
AL24
AN25
AM24
AT20
AR25
AT25
AR24
AM23
AT24
AR23
AN23
AM22
AN22
AR22
AM19
AR19
U51
OMIT
INTREPID-REV2.1
BGA
CRITICAL
2
1
C270
0.22uF
20%
402
6.3V
CERM
051-6680
A
4612
AGP_GNT_L
AGP_AD<0> AGP_AD<1>
+1_5V_INTREPID_PLL
CLK33M_CBUS_UF
CLK33M_AIRPORT_UF
+1_5V_INTREPID_PLL5
+1_5V_INTREPID_PLL
+1_5V_INTREPID_PLL6
AIRPORT_PCI_REQ_L
INT_PCI_FB_OUT INT_PCI_FB_IN
PCI_TRDY_L
INT_ROM_CS_L INT_ROM_OE_L
PCI_CBE<0>
PCI_IRDY_L PCI_STOP_L PCI_DEVSEL_L
PCI_CBE<1> PCI_CBE<2> PCI_CBE<3>
CLK66M_GPU_AGP_UF
PCI_TRDY_L
INT_AGP_VREF
PCI_AD<11>
PCI_AD<10>
PCI_AD<6>
AIRPORT_PCI_GNT_L CBUS_PCI_GNT_L
PCI_AD<9>
STOP_AGP_L
INT_AGP_FB_OUT
INT_AGP_FB_IN
+1_5V_AGP
AGP_SB_STB_L
PCI_AD<31>
CLK33M_NEC
CLK33M_AIRPORT
INT_ROM_RW_L
PCI_FRAME_L
PCI_PAR
NEC_PCI_GNT_L
CBUS_PCI_REQ_L
PCI_AD<30>
PCI_AD<29>
PCI_AD<28>
PCI_AD<27>
PCI_AD<26>
PCI_AD<25>
PCI_AD<24>
PCI_AD<23>
PCI_AD<22>
PCI_AD<21>
PCI_AD<20>
PCI_AD<17> PCI_AD<18>
PCI_AD<15>
PCI_AD<14>
PCI_AD<16>
PCI_AD<12> PCI_AD<13>
PCI_AD<7> PCI_AD<8>
PCI_AD<5>
PCI_AD<4>
PCI_AD<2>
PCI_AD<1>
PCI_AD<0>
PCI_STOP_L
PCI_DEVSEL_L
PCI_FRAME_L
+1_5V_AGP
INT_AGPPVT
+1_5V_AGP
AGP_SBA<1>
AGP_REQ_L
STOP_AGP_L
INT_AGP_VREF
AGP_AD<2> AGP_AD<3> AGP_AD<4>
AGP_AD<10> AGP_AD<11> AGP_AD<12>
AGP_AD<14> AGP_AD<15> AGP_AD<16>
AGP_AD<18> AGP_AD<19>
AGP_AD<22> AGP_AD<23> AGP_AD<24> AGP_AD<25> AGP_AD<26> AGP_AD<27>
AGP_AD<29> AGP_AD<30> AGP_AD<31>
AGP_CBE<0> AGP_CBE<1> AGP_CBE<2> AGP_CBE<3>
AGP_PAR AGP_FRAME_L AGP_TRDY_L AGP_IRDY_L AGP_STOP_L AGP_DEVSEL_L
AGP_SBA<0>
AGP_SBA<2> AGP_SBA<3> AGP_SBA<4> AGP_SBA<5> AGP_SBA<6> AGP_SBA<7>
AGP_SB_STB AGP_SB_STB_L
AGP_ST<0>
AGP_ST<2>
AGP_ST<1>
AGP_AD_STB<1> AGP_AD_STB_L<1>
AGP_AD_STB<0> AGP_AD_STB_L<0>
AGP_PIPE_L AGP_RBF_L
AGP_WBF_L
ROM_OE_LINT_ROM_OE_L
ROM_CS_LINT_ROM_CS_L
ROM_RW_LINT_ROM_RW_L
AGP_REQ_L
AGP_AD_STB<1>
AGP_AD_STB_L<0>
AGP_IRDY_L
AGP_WBF_L
AGP_AD_STB<0>
AGP_SB_STB
AGP_AD_STB_L<1>
AGP_BUSY_L
CLK66M_AGP_1_5V_TP
CLK66M_GPU_AGP
AGP_AD<5>
AGP_AD<8>
AGP_AD<7>
AGP_TRDY_L
AGP_AD<17>
AGP_STOP_L
AGP_PIPE_L
PCI_AD<19>
AGP_AD<28>
AGP_AD<6>
AGP_AD<9>
AGP_AD<13>
AGP_FRAME_L
AGP_DEVSEL_L
AGP_RBF_L
AGP_BUSY_L
+3V_GPU
CLK33M_CBUS
CLK33M_NEC_UF
AIRPORT_PCI_REQ_L
AGP_AD<21>
AGP_GNT_L
AGP_AD<20>
NEC_PCI_REQ_L
CBUS_PCI_REQ_L
PCI_IRDY_L
PCI_AD<3>
NEC_PCI_REQ_L
40
40
40
41 41
41 41
41
41
41
41
41
22
41
41
41
41
41
41
41
41
41
41
41 41
41
41
41
41 41
41
41
41
41
41
41
41
41
41
41
22
22
41
41
41
39 39
39 39
39
39
39
39
39
21
39
39
41
39
39
39
39
39
39
39
41
41
41
39
39 39
39
39
39
39 39
39
39
39
39
39
39
39
39
39
39
21
21
39
39
39
40
40
26
39
26
26 26
39 39
39
26
26
26
26
26
19
26
26
39
26
26
26
26
26
26
26
39
39
39
26
26 26
26
26
26
26 26
26
26
26
26
26
26
26
26
26
26
19
19
26
40
26
26
39
14
14
41
18
26
18
18 18
26 26
26
18
40
18
18
18
18
16
39
18
41
18
26
18
18
18
18
18
18
18
26
26
26
18
18 18
18
18
18
18 18
18
18
18
18
18
18
18
18
18
18
16
16
39
40
39
39
39 39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
18
39
39
39
22
41
39
18
18
19
39
39
12
12
26
17
18
17
17 17
18 18
18
17
19
17
17
17
41
17
15
19
17
37
37
17
18
18
17
17
17
17
17
17
17
18
18
18
17
17 17
17
17
17
17 17
17
17
17
17
17
17
17
17
17
17
15
15
39
19
19
39
39
39
39 39
39
39
39 39
39 39
39
39 39
39
39 39
39 39
39
39
39 39
39
39 19
19
19 19
19
39
39
39 39
39
39 39
19
19
19
19
19
19
19
19
41
41
41
19
19
19
19
19
19
19
19
19
37
39
39
39
19
39
19
17
39
39
39
39
19
19
19
19
21
37
26
39
19
39
17
18
17
17
17
12
19
19
8
37
37
40
8
40
12
37 37
12
12 12
17
12
12 12
17 17
17
37
12
12
9
9
9
26
18
9
12
37
37
12
12
9
17
26
12
12
17
17
12
9
9
9
9
9
9
9
17
17
17
9
9 9
9
9
9
9 9
9
9
9
9
9
9
9
12
12
12
12
12
19
12 12
12
19
19
19
19 19
19
19
19 19
19 19
19
19 19
19
19 19
19 19
19
19
19 19
19
19 12
12
12 12
12
19
19
19 19
19
19 19
12
12
19
19
19
12
12
12
12
12
12
12
9
12
9
12
9
12
12
12
12
12
12
12
12
12
12
19
19
19
19
12
19
12
12
9
19
19
19
19
12
12
12
12
19
18
37
12
19
12
19
12
12
12
9
12
CS_CE2
CS_CE1
CS_IORD CS_IOWR
ATA_CS1
ATA_CS0
IDE
IDEINTRQ
IDECHRDY
IDECS0 IDECS1
IDEDMACK IDEDMARQ
IDERD
IDEWR
IDERST
IDEA9
IDEA8
IDEA7
IDEA6
IDEA5
IDEA4
IDEA3
IDEA2
IDEA1
IDEA0
IDEDD15
IDEDD14
IDEDD13
IDEDD12
IDEDD11
IDEDD10
IDEDD9
IDEDD8
IDEDD7
IDEDD6
IDEDD5
IDEDD4
IDEDD3
IDEDD2
IDEDD1
IDEDD0
CARDSLOT
CS_WAIT
CS_OE CS_WE
ATA_INTRQ
ATA_DMARQ
ATA_CHRDY
ATA_DMACK
ATA_RD
ATA_WR
ATA_RST
ATA_VREF
UATA100
ATA_A1 ATA_A2
ATA_A0
ATA_D12
ATA_D11
ATA_D15
ATA_D14
ATA_D13
ATA_D10
ATA_D9
ATA_D3
ATA_D2
ATA_D1
ATA_D0
ATA_D4
ATA_D8
ATA_D7
ATA_D6
ATA_D5
(5 OF 9)
IICDATA_1
IICCLK_1
IICCLK_0 IICDATA_0
TST_PLLEN
TST_MONOUT
TST_MONIN
TEI
TRSTN
TMS
TCK
TDO
TDI
TEST
MDC
GBE_REFCLK
MDIO
COL
CRS
GTX_CLK
RXD_6
RXD_4 RXD_5
RXD_3
RXD_7
RXD_2
RXD_1
RX_ER
RX_DV
RX_CLK
RXD_0
FW_PINT
FW_LINKON
FWR_LCLK
TX_ER
TX_EN
TX_CLK
TXD_0
RESET
PURESET
PHY_LPS PHY_CTL0 PHY_CTL1 PHY_LREQ FWR_PCLK
(4 OF 9)
MISC
TXD_3
TXD_2
TXD_1
TXD_4 TXD_5 TXD_6 TXD_7
GB ETHERNET
FIREWIRE
PHY_DATA0 PHY_DATA1 PHY_DATA2 PHY_DATA3
PHY_DATA5
PHY_DATA7
PHY_DATA4
PHY_DATA6
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
UDMA - STOP UDMA - HOSTDMARDY/HSTROBE UDMA - DEVICEDMARDY/DSTROBE
CS_WAIT IS AN INPUT
Keep C847 stub short
NOT USING CARDSLOT INTERFACE
ENET_TXD SERIES TERMINATION
JTG_RSTN_L
TST_TEI_H
JTG_TDO_H
(I/O)
JTG_TDI_H
(I/O)
TST_PLLEN_H
ANALYZER_CLK
DESCRIPTION
1 0 0 0 0
0 0 0 0 0
X 0 0 0 1
1 1 1 1 1
1(I)
1(I)
1(I)
0(I)
0(I)
0(I)
(INPUT)
TESTSEL5
HWPLL_
(OUTPUT)
(OUTPUT)
SHUTDOWN
EXTPLL
X X X X
JTAG MODE
NORMAL OPERATION
TPDENABLE
DDR_
(OUTPUT)
0(I) 1(I) 0(I)
1(I) 1(I) 0(I) 0(I) 1(I)
X
1
0
1
0
MEMWE
1
1
0
(OUTPUT)
SELECTED
PLL OUTPUTS
SELECTED
PLL OUTPUTS
SYNC/MEM DATA
BYPASS
X(I) X(I) X(I) X(I) X(I)
FUNCTIONAL TEST IDDQ
POSTSCALAR BYPASS
FUNCTIONAL TEST WITH
POSTSCALAR BYPASS
FUNCTIONAL TEST WITHOUT
TEST TRI-STATE
ATPG IDDQ
ATPG NORMAL
VIEW PLLS (HARDWARE)
VIEW PLLS (SOFTWARE)
TEST PULL-UPS/DOWNS
HW_PLL<BIT 0>
I2C PULL-UPS
ADDR LSB INDICATES READ (’1’) OR WRITE (’0’) MODES
BUS
ADDR
A0-WR A1-RD A2-WR A3-RD AC-WR AD-RD AE-WR AF-RD 84-WR 85-RD 5C-WR 5D-RD 6A-WR 6B-RD D2-WR D3-RD B0-WR B1-RD
I2C-0
(MAIN)
RAM - LOWER
J25 - PG 11
RAM - UPPER
J25 - PG 11
N/A
BOOTBANG EEPROM
U51 - PG 6
LMU
J3000 - PG 24
(LMU on RUX Brd.)
N/A N/A N/A N/A
I2C-1
(MAIN)
I2C-2
(SLEEP)
PMU
(SLEEP)
N/AN/AN/A
N/A
N/A N/A
N/A
SOFT MODEM
J14 - PG 26
N/A N/A
N/A
N/A N/A
N/A
N/A
FAN CONTROLLER
U52 - PG 26
N/A
N/A N/A
SNAPPER SOUND
J2 - PG 26
N/A
CLOCK SLEW SSCG
U30 - PG 14
N/A N/A
N/AN/A
MMM
U15 - PG 42
INT - ENET/FW/UATA
EIDE/I2C
21
R259
1K
5%
1/16W
MF
402
81
RP35
10K
5%
1/16W
SM1
2
1
R232
10K
5% 1/16W MF 402
54
RP16
22
5%
1/16W
SM1
63
RP10
22
5%
1/16W
SM1
81
RP10
22
5%
1/16W
SM1
54
RP10
22
5%
1/16W
SM1
72
RP10
22
5%
1/16W
SM1
63
RP16
22
5%
1/16W
SM1
81
RP16
22
5%
1/16W
SM1
72
RP16
22
5%
1/16W
SM1
+3V_MAIN
12
R269
10K
5%
1/16W
MF
402
21
R270
10K
5%
1/16W
MF
402
2
1
C847
NO STUFF
10pF
5% 50V CERM 402
21
R630
NO STUFF
10K
5%
1/16W
MF
402
+3V_MAIN
+3V_MAIN
21
R263
1K
5%
1/16W
MF
402
72
RP32
2.2K
5%
1/16W
SM1
81
RP32
2.2K
5%
1/16W
SM1
54
RP32
2.2K
5%
1/16W
SM1
63
RP32
2.2K
5%
1/16W
SM1
72
RP35
10K
5%
1/16W
SM1
63
RP35
10K
5%
1/16W
SM1
54
RP35
10K
5%
1/16W
SM1
2
1
R207
1K
1% 1/16W MF 402
AM2
AJ4
AL2
AA7
AH7
AG8
AE5
AE4
AG2
AD5
AH1
AF2
AG1
AF1
AJ2
AJ1
AG4
AD7
AH2
AF4
AD4
AC5
AM1
AB7
AK4
AG7
AF7
AH5
AK2
AL1
AH4
AG5
AK1
AE7
AF5
AE1 AE2
AC4
AD2
AB5
AB4
AD1
AA1
Y15
Y4
AA2
AA8
AC2
AC1
W8
W2
V1
W1
V2
V4
U2
U1
Y8
W7
Y1
Y2
W5
W4
T1
V5
AB2
AA4
AA5
Y7
AB1
Y5
U51
CRITICAL
INTREPID-REV2.1
OMIT
BGA
21
R224
82
5%
1/16W
MF
402
21
R205
402
MF
1/16W
5%
82
A5
A7
H9
E10
D9
G10
B7
A6
D8
E9
H10
AR6
AK10
AM7
AN6
AR5
AH10
AT5
AK8
AP5
D2
C4
J12
E8
G9
D7
A4
B4
D6
E7
D3
U5
T2
M2
M1
N4
L2
K2
K1
N5
P7
M4
L4
L1
P5
B5 B6
AM3
AN1
AK5
AN2
H12
L13
N1
N2
T7
U14 E6 C5
U51
BGA
OMIT
INTREPID-REV2.1
CRITICAL
21
R195
22
5% MF
1/16W
402
21
R186
22
MF
402
5%
1/16W
21
R149
10
5%
1/16W
MF
402
21
R145
10
5%
1/16W
MF
402
21
R160
10
5%
1/16W
MF
402
051-6680
A
4613
HD_DMARQ
UIDE_ADDR<1>
UIDE_DATA<13>
UIDE_DATA<12>
UIDE_DATA<10>
JTAG_ASIC_TRST_L
UIDE_DATA<11>
ENET_PHY_TXD<6>
ENET_PHY_TXD<7>
ENET_RX_DV
UIDE_DATA<1>
UIDE_DATA<0>
UIDE_DATA<3>
UIDE_DATA<5>
ENET_LINK_TXD<1>
ENET_PHY_TXD<1>
ENET_PHY_TXD<0>
EIDE_DATA<13>
FW_LKON
CLKFW_LINK_LCLK
FW_PHY_LPS
ENET_PHY_TXD<5>
ENET_LINK_RXD<4> ENET_LINK_RXD<5>
ENET_LINK_RXD<7>
ENET_COL
ENET_LINK_TXD<0>
CLKENET_LINK_TX
HD_INTRQ
CLKENET_PHY_GTX
UIDE_REF
UIDE_CS1_L
UIDE_DIOR_L
EIDE_DATA<1> EIDE_DATA<2>
ENET_PHY_TX_ER
CLKFW_LINK_PCLK
FW_LINK_CNTL<0> FW_LINK_CNTL<1>
FW_LINK_DATA<7>
FW_LINK_DATA<0> FW_LINK_DATA<1>
ENET_LINK_TXD<2>
FW_PINT
ENET_LINK_RXD<0>
ENET_LINK_RXD<3>
ENET_LINK_RXD<2>
INT_I2C_DATA0
INT_I2C_DATA1
INT_I2C_CLK1
JTAG_ASIC_TCK
INT_RESET_L
INT_PU_RESET_L
ENET_LINK_TXD<0>
ENET_PHY_TXD<3>
ENET_LINK_TXD<3>
ENET_PHY_TXD<4>
ENET_LINK_TXD<4>
ENET_PHY_TXD<2>
ENET_LINK_TXD<2>
ENET_LINK_TXD<5>
ENET_LINK_TXD<7>
ENET_LINK_TXD<6>
INT_I2C_DATA1
INT_I2C_CLK1
CLKFW_PHY_LCLK
FW_PHY_LREQ
CSLOT_CE2_L_SPN
NO_TEST=TRUE
CSLOT_CE1_L_SPN
NO_TEST=TRUE
UIDE_CS0_L
CSLOT_IOWR_L_SPN
NO_TEST=TRUE
CSLOT_IORD_L_SPN
NO_TEST=TRUE
EIDE_INT
EIDE_DMACK_L EIDE_DMARQ
EIDE_WR_L EIDE_RD_L
EIDE_RST_L
EIDE_IOCHRDY
CSLOT_ADDR9_SPN
NO_TEST=TRUE
CSLOT_ADDR8_SPN
NO_TEST=TRUE
CSLOT_ADDR7_SPN
NO_TEST=TRUE
CSLOT_ADDR6_SPN
NO_TEST=TRUE
CSLOT_ADDR5_SPN
NO_TEST=TRUE
CSLOT_ADDR4_SPN
NO_TEST=TRUE
CSLOT_ADDR3_SPN
NO_TEST=TRUE
EIDE_ADDR<2>
EIDE_ADDR<1>
EIDE_ADDR<0>
EIDE_DATA<14> EIDE_DATA<15>
EIDE_DATA<11> EIDE_DATA<12>
EIDE_DATA<9> EIDE_DATA<10>
EIDE_DATA<8>
EIDE_DATA<6> EIDE_DATA<7>
EIDE_DATA<4> EIDE_DATA<5>
EIDE_DATA<3>
EIDE_DATA<0>
CSLOT_IOWAIT_L_PU
CSLOT_WE_L_SPN
NO_TEST=TRUE
CSLOT_OE_L_SPN
NO_TEST=TRUE
UIDE_INTRQ
UIDE_DMARQ
UIDE_IOCHRDY
UIDE_DMACK_L
UIDE_DIOW_L
UIDE_RST_L
UIDE_ADDR<2>
UIDE_ADDR<0>
UIDE_DATA<15>
UIDE_DATA<14>
UIDE_DATA<9>
UIDE_DATA<8>
UIDE_DATA<7>
UIDE_DATA<6>
UIDE_DATA<2>
EIDE_CS0_L EIDE_CS1_L
INT_I2C_DATA0
ENET_LINK_TXD<3>
ENET_LINK_TXD<5>
ENET_PHY_TX_EN
ENET_LINK_TX_ER
ENET_LINK_TXD<6>
ENET_MDIO ENET_MDC
ENET_LINK_RXD<1>
JTAG_ASIC_TDI
INT_TST_PLLEN_PD
JTAG_ASIC_TCK
FW_LINK_DATA<3> FW_LINK_DATA<4> FW_LINK_DATA<5> FW_LINK_DATA<6>
JTAG_ASIC_TRST_L
FW_LINK_LREQ
INT_TDO
JTAG_ASIC_TMS
ENET_LINK_TX_EN
UIDE_DATA<4>
FW_LINK_DATA<2>
INT_TST_MONIN_PD
ENET_CRS
CLKENET_LINK_GBE_REF
ENET_LINK_RXD<6>
ENET_RX_ER
CLKENET_LINK_RX
ENET_LINK_TXD<4>
JTAG_ASIC_TDI INT_TDO
JTAG_ASIC_TMS
INT_JTAG_TEI INT_TST_MONIN_PD INT_TST_MONOUT_TP INT_TST_PLLEN_PD
ENET_LINK_TXD<1>
INT_I2C_CLK0
INT_I2C_CLK0
INT_JTAG_TEI
ENET_LINK_TXD<7>
CLKENET_LINK_GTX
41
41
41
41
41
27
27
27
27
41
41
41
24
25
25
25
25
24
24
24
41
13
24
24
41
24
24
13
41
41
28
41
28
41
13
13
39
39
39
39
39
28
39
39
39
39
39
39
39
39
39
39
39 39
39
39
39
39
39
39
37
39
37
39
39
39 39
39
37
39
39
39
39
39
39
39
39
39
39
11
14
14
28
31
31
39
39 39
39 39
39 39
39
39
39
14
14
37
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39 39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
11
39
39
39
39
39
39
39
41
41
28
39
39 39
39
28
14
28
39
39
41
39
37
39
39
37
39
41 14
28
41 41
41
39
11
11
41
39
26
26
26
26
26
13
26
28
28
28
26
26
26
26
13
28
28 26
29
37
29
28
28
28
28
28
13
28
26
28
40
26
26
26 26
28
29
29
29
29
29
29
13
29
28
28
28
6
13
13
13
9
27
13
28 13
28 13
28 13
13
13
13
13
13
29
29
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26 26
26
26
39
39
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
6
13
13
28
39
13
28
28
28
13
13
13
29
29 29
29
13
39
13
13
39
26
29
13
28
28
28
28
28
13
13 13
13
13 13
41
13
13
6
6
13
13
37
(PLL9)
(PLL7)
(PLL3)
(PLL2)
(PLL1)
VSSA_8
VSSA4
VSSA3
VSSA2
VSSA1
(PLL9)
(PLL7)
(PLL3)
(PLL2)
(PLL1)
VDD15A_8
VDD15A_4
VDD15A_3
VDD15A_2
VDD15A_1
CPU_INT PCIPME
EXTINT12 EXTINT13 EXTINT14 EXTINT15 EXTINT16 EXTINT17
GPIO16
GPIO15
GPIO12
GPIO11
GPIO9
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
VSSU_2
VDDU33_2
VDDU33_1
(6 OF 9)
SCCRTSA
SCCTXDA
SCCDTRA
SCCRXDA SCCGPIOA SCCTRXCA
SCCTXDB
SCCGPIOB SCCTRXCB
SCCRXDB
SCCRTSB
PURPOSE
GENERAL
I/O’S
EXTINT8
EXTINT7
EXTINT6
EXTINT0
INTERRUPTS
EXTINT11
EXTINT4 EXTINT5
EXTINT10
EXTINT9
EXTINT3
EXTINT2
EXTINT1
AUD_DTO
AUD_DTI AUD_SYNC
MOD_DTO
AUD_BITCLK AUD_CLKOUT
IICCLK_2
MOD_SYNC
MOD_DTI
MOD_CLKOUT
IICDATA_2
MOD_BITCLK
IIC
AUDIO/I2S
CLOCKS
XTAL_OUT
PROCSLEEPREQ PENDPROCINT
XTAL_IN
SS_REF_CLK_IN
BUF_REF_CLK_OUT
STOPXTAL
WATCHDOG
PCI_
PCI_
PCI_
VSSU_1
PCI_
USB_VD0_P USB_VD0_N
USB_VD1_P USB_VD1_N
USB_VD2_N
USB_VD2_P
USB_PWRFLT0
USB_PRTPWR0
USB_VD3_N
USB_VD3_P
USB
USB_PRTPWR1 USB_PWRFLT1
USB_VD4_N
USB_VD4_P
USB_VD5_N
USB_VD5_P
USB_PRTPWR2 USB_PWRFLT2
ADJ
BYP GND
OUT
NC
NC
SHDN
IN
CPU0
VDDA
VDD0
VDD1
VDDC
VDDQ
VSS1
VSS0
VSSA
VSSC
VSSQ
LOCK ODSEL
PD*
SDATA
SCLK
FSEL
CLKIN
RESET*
ADDRSEL
TABLE_5_ITEM
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
TABLE_11_HEAD
REFERENCE DESIGNATOR(S)
BOM OPTION
QTY
DESCRIPTION
VALUE VOLT. WATT.
TOL.PART #
PACKAGE
DEVICE
TABLE_11_HEAD
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
INTERNAL 250K PULL-UP
NC NC
NC NC
MISO
ACK* SCK
MOSI
REQ*
NC
NC
NC
NC
PCI INTERRUPTS
-> 1.55V OUTPUT
GPIO/EXTINT PULLUPS
EXTINT11
EXTINT12
OPEN DRAIN OUTPUT
INTERNAL 250K PULL-UP
OUTPUT IMPEDANCE ~18-20 OHMS
INTERNAL 250K PULL-DOWN
PLACE NEAR INTREPID TO MINIMIZE OVERSHOOT
CRYSTAL LOAD CAPACITANCE IS 16PF
HWPLL_
TESTMUXSEL
SIGNAL NAME
MOD_BITCLK_B_H MOD_CLKOUT_B_H MOD_DTO_B_H MOD_SYNC_B_H MOD_DTI_B_H JTG_TDO_H
0
1
2
3
4
5
POWERBOOK SPARE
CBUS_REG_L CBUS_IREQ_L
(SIGNAL FROM MODEM)
VCORE A/B SEL
PORT F/TRACKPAD
PORT E/BLUETOOTH
PORT A B C D/UNUSED
USB PORT ASSIGNMENTS
VIA
INT - USB/GPIOS/I2S
+3V_MAIN
2
1
C256
10uF
6.3V CERM 805
20%
21
R166
100K
5%
1/16W
MF
402
+3V_MAIN
2
1
C246
0.1uF
20% 10V CERM 402
2
1
C235
0.01uF
CERM
16V
20%
402
21
R179
402
MF
1/16W
5%
22
21
R174
402
MF
1/16W
5%
22
54
RP13
47
5%
1/16W
SM1
63
RP13
47
5%
1/16W
SM1
81
RP13
1/16W
SM1
5%
47
72
RP13
SM1
1/16W
5%
47
V15
U4
AT7
R8
R9
AH29
AK18
AJ16
AJ13
AA15
U8
T8
AG29
P8 N8
K5 L5
M7 M8
H2 H1
G2 G1
L8 L7
N7
J1
K4
M5
J2
J4
AN7
K9
AR4
AF9
AM5
AT4
AG10
AG11
AL5
AN3
AP4
AG9
AF10
AT6
AN8
AJ18
AJ17
AJ12
AA16
AJ7
R1
R2 T4
P1
V8
AH8
AL4
H4
L9
H5
J8
F2
J7
K7
F1
K8
J5
E1
G5
C32
D31
G30
E31
A33
B33
D34
C33
G4
H7
E2
D1
F4
J9
E30
B32
E34
F33
D30
U15
T5
R4 R7
R5
P2
U51
CRITICAL
OMIT
INTREPID-REV2.1
BGA
+3V_SLEEP
2
1
C387
0.22uF
20%
6.3V CERM
402
21
R201
4.7
5%
1/16W
MF
402
2
1
C386
0.22uF
20%
6.3V CERM
402
21
R243
4.7
5%
1/16W
MF
402
2
1
C388
0.22uF
20%
6.3V CERM
402
21
R279
4.7
5%
1/16W
MF
402
2
1
C337
0.22uF
20%
6.3V CERM
402
2
1
C389
402
CERM
6.3V
20%
0.22uF
21
R240
4.7
402
MF
1/16W
5%
21
R280
4.7
1/16W
5% MF
402
2 1
R144
NO STUFF
5%
1/16W
MF
402
10M
2
1
C151
402
CERM
50V
5%
22pF
2
1
C152
22pF
5%
50V
CERM
402
21
R134
0
NO STUFF
5%
1/16W
MF
402
1
2
3
J9
NO STUFF
U.FL-R_SMT
F-ST-SM
2
1
R113
NO STUFF
51
5% 1/16W MF 402
2
1
R143
0
5% 1/16W MF 402
2
1
C721
1uF
20% 10V
CERM
603
2
1
R567
68.1K
402
MF
1/16W
1%
2
1
R574
18.7K
1%
1/16W
402
MF
2
1
C723
10uF
20%
6.3V CERM 805
21
R568
NO STUFF
0
5%
1/16W
MF
603
21
R565
5%
1/16W
MF
603
0
+2_5V_MAIN
+1_8V_MAIN
5
1
7
6
8
4
3
2
U49
LT1962-ADJ
MSOP
2
1
C392
0.01uF
20% 16V
CERM
402
12
R187
10K
5%
1/16W
MF
402
12
R191
10K
5%
1/16W
MF
402
1
2
R258
1K
5% 1/16W MF 402
1
2
R241
1K
5% 1/16W MF 402
45
RP8
10K
5%
1/16W
SM1
18
RP8
10K
5%
1/16W
SM1
63
RP5
10K
5%
1/16W
SM1
54
RP6
10K
5%
1/16W
SM1
63
RP6
10K
5%
SM1
1/16W
72
RP6
10K
5%
1/16W
SM1
36
RP8
10K
5%
1/16W
SM1
27
RP7
10K
5%
1/16W
SM1
36
RP7
10K
1/16W
SM1
5%
45
RP4
10K
5%
1/16W
SM1
81
RP5
10K
1/16W
SM1
5%
81
RP6
10K
5%
1/16W
SM1
36
RP4
10K
5%
1/16W
SM1
27
RP8
10K
5%
1/16W
SM1
2
1
L13
FERR-EMI-100-OHM
SM
+2_5V_MAIN
+3V_MAIN
2
1
L14
SSCG
400-OHM-EMI
SM-1
2
1
C394
SSCG
0.1uF
20% 10V CERM 402
2
1
L15
SSCG
400-OHM-EMI
SM-1
2
1
C399
402
CERM
10V
20%
0.1uF
SSCG
2
1
C402
SSCG
1uF
20% 10V CERM 603
21
R293
SSCG
33
5%
1/16W
402
MF
1
2
R292
SSCG
402
MF
1/16W
5%
75
2
1
C400
SSCG
0.1uF
10V
20% CERM
402
2
1
R288
SSCG
10K
5%
1/16W
MF
402
21
R284
SSCG
0
5%
1/16W
MF
402
2
1
R178
15K
5%
1/16W
MF
402
2
1
R175
5% 1/16W MF 402
15K
21
R142
SSCG
0
5%
1/16W
MF
402
2 1
R164
402
MF
1/16W
5%
10K
2 1
R165
402
MF
1/16W
5%
10K
2 1
R182
402
MF
1/16W
5%
10K
2 1
R180
402
MF
1/16W
5%
10K
2 1
R183
10K
5%
1/16W
MF
402
2 1
R181
10K
5%
1/16W
MF
402
21
R250
10K
MF
402
1/16W
5%
45
RP11
10K
5%
1/16W
SM1
36
RP11
10K
5%
1/16W
SM1
27
RP11
10K
5%
1/16W
SM1
18
RP11
10K
5%
1/16W
SM1
1
2
R295
5%
1/16W
MF 402
10K
NO STUFF
1
2
R296
10K
5% 1/16W MF 402
NO STUFF
21
R153
10K
5%
1/16W
MF
402
2
1
R287
SSCG
5% 1/16W MF 402
10K
2
1
R286
NO STUFF
0
5%
1/16W
MF
402
21
R218
0
5%
1/16W
402
MF
+3V_SLEEP
21
R746
402
MF
1/16W
5%
10K
21
R158
10K
5%
1/16W
MF
402
21
R148
10K
5%
1/16W
MF
402
+3V_MAIN
15
6
11
19
7
18
5
12
10
1
8
9
17 13
4
2
3
16
20
14
U31
CRITICAL
CY28512D
TSSOP
OMIT
81
RP47
SM1
1/16W
5%
0K
SOFT_MODEM
63
RP47
SM1
1/16W
5%
0K
SOFT_MODEM
54
RP47
0K
5%
1/16W
SM1
SOFT_MODEM
72
RP47
SM1
1/16W
5%
0K
SOFT_MODEM
21
R206
USB_MODEM
10K
5%
1/16W
MF
402
72
RP15
USB_MODEM
10K
5%
1/16W
SM1
63
RP15
USB_MODEM
10K
5%
1/16W
SM1
54
RP15
USB_MODEM
10K
5%
1/16W
SM1
81
RP15
USB_MODEM
10K
5%
1/16W
SM1
21
Y2
CRITICAL
OMIT
18.432M
8X4.5MM-SM
21
R450
SSCG
5%
0
1/16W
MF
402
21
R467
NO STUFF
0
5% MF
1/16W
402
21
R457
0
5%
1/16W
MF
402
2
1
R125
15K
5% 1/16W MF 402
2
1
R129
5%
1/16W
402
MF
15K
21
R635
22
5%
1/16W
MF
402
21
R603
22
5%
1/16W
MF
402
21
R121
402
MF
1/16W
5%
10K
21
R123
10K
5%
1/16W
MF
402
+3V_MAIN
21
R801
NO STUFF
10K
5%
1/16W
MF 402
21
R802
10K
NO STUFF
5%
1/16W
MF
402
?1
197S0090
XTAL,CER,LOW PROF,18,432MHZ,8X4.5MM,SMD
CRITICAL
Y2
1
116S1104
RES
RES-0402-V2
RESISTOR
10K
1/16W
5%
R292
NO_SSCG
1
359S0086
IC,CY28512-2
U31
CRITICAL
SSCG
A
051-6680
14 46
INT_I2C_DATA2
INT_I2S0_SND_MCLK_UF
INT_MOD_BITCLK_UF
USB_DAP
USB_DAP
USB_DBM
USB_DCM
USB_DCP
LTC1962_INT_VIN
PMU_REQ_L
INT_GPIO12_PU
AIRPORT_PCI_INT_L
PMU_REQ_L
COMM_TRXC
+1_5V_INTREPID_PLL3
+1_5V_INTREPID_PLL1
+1_5V_INTREPID_PLL
INT_MOD_DTO_UF
CLK18M_INT_XIN
MMM_FFIRQ_L
PMU_CLK
PMU_ACK_L
INT_GPIO1_PU
INT_MOD_CLKOUT_UF
MMM_SIRQ_L
CLK18M_INT_EXT
INT_EXTINT16_PU
PMU_INT_NMI
INT_EXTINT13_PU
PMU_INT_L
INT_EXTINT10_PU
INT_EXTINT8_PU
COMM_RING_DET_L
INT_EXTINT14_PU
USB_OC_AB_L
USB_PWREN_AB_L
USB_PWREN_CD_L
USB_OC_CD_L
INT_GPIO15_PU
VCORE_VGATE
INT_I2C_DATA1
CG_LOCK
CG_SYSCLK_EN
INT_I2C_CLK1
CG_ADDRSEL
CG_FSEL
MAIN_RESET_L
INT_REF_CLK_OUT
INT_TDO
INT_PROC_SLEEP_REQ_L
PMU_PME_L
MPIC_CPU_INT_L
NEC_PCI_INT_L
INT_PEND_PROC_INT
INT_WATCHDOG_L
INT_REF_CLK_IN
INT_REF_CLK_OUT_UF
INT_REF_CLK_IN
+2_5V_CG_MAIN
CG_FSEL
SND_HP_SENSE_L
INT_EXTINT13_PU
MMM_SIRQ_L
MMM_FFIRQ_L
PMU_INT_NMI
AGP_ATI_INT_L INT_EXTINT3_PU
COMM_RING_DET_L
INT_ENET_RST_L
INT_GPIO12_PU
INT_EXTINT16_PU
PMU_INT_L
INT_EXTINT14_PU
INT_GPIO15_PU
CBUS_INT_L INT_EXTINT8_PU
INT_EXTINT10_PU
ENET_ENERGY_DET
SND_LIN_SENSE_L
SND_HW_RESET_L
INT_GPIO9_PU
SND_AMP_MUTE_L
SND_HP_MUTE_L
FW_PHY_PD
COMM_RESET_L
CG_FSEL_INT INT_GPIO1_PU
USB_OC_EF_L
USB_PWREN_EF_L
NEC_PCI_INT_L
CBUS_INT_L
AIRPORT_PCI_INT_L
LT1962_INT_BYP
LT1962_INT_ADJ
INT_I2S0_SND_FROM_ADC
INT_MOD_DTI
USB_DEM
USB_DFM
USB_DDP
USB_DCM
USB_OC_CD_L
USB_OC_EF_L
USB_DFP
USB_DCP
USB_PWREN_EF_L
USB_OC_AB_L
USB_DEP
USB_PWREN_CD_L
USB_DDM
USB_DBP
USB_PWREN_AB_L
USB_DBM
COMM_RXD
COMM_TXD_L
PMU_FROM_INT
PMU_TO_INT
USB_DAM
COMM_DTR_L
COMM_GPIO_L
COMM_RTS_L
INT_I2C_CLK2
INT_MOD_CLKOUT_UF
INT_MOD_DTO
INT_MOD_BITCLK
INT_MOD_CLKOUT
INT_I2S0_SND_SCLK
INT_I2S0_SND_LRCLK
USB_DFP
USB_DEP
USB_DFM
INT_I2S0_SND_MCLK
USB_TPAD_N
USB_TPAD_P
BT_USB_DM
BT_USB_DP
+1_5V_INTREPID_PLL4
+1_5V_INTREPID_PLL2
+3V_INTREPID_USB
USB_DDM
USB_DBP
USB_DAM
USB_DDP
INT_MOD_BITCLK_UF
INT_MOD_DTI
INT_MOD_SYNC_UF
INT_GPIO9_PU
INT_EXTINT3_PU
INT_REF_CLK_OUT
VCORE_VGATE
CG_SYSCLK_EN
SYSTEM_CLK_EN
INT_I2S0_SND_TO_DAC_UF
INT_I2S0_SND_LRCLK_UF INT_I2S0_SND_SCLK_UF
INT_MOD_SYNC_UF
INT_MOD_SYNC
INT_MOD_DTO_UF
INT_I2S0_SND_TO_DAC
USB_DEM
+1_5V_INTREPID_PLL8
+3V_CG_PLL_MAIN
CG_RESET_L
CG_CLKOUT
SYSTEM_CLK_EN
CLK18M_INT_XOUT
CLK18M_XTAL_IN
SND_HW_RESET_L
41 31
41
41
26
41
27
27
20
41
41
41
40
31
40
25
25
19
31
31
41
41
41
41
41
41
41
40
41
41
31
26
31
41
12
25
35
25
31
31
27
35
24
24
18
37
28 26
17
37
37
41
25
25
31
27
31
18
41
27
41
41
35
17
18
26
41
27
39
39
39
39
41
41
41
41
41
41
41
41
39
39
39
37
39
39
39
39
27
37
35
31
41
39
31
27
27
14
14
14
14
14
14
40
14
14
14
14
27
40
40
8
14
37
14
31
31
14
14
14
37
14
14
14
14
14
14
14
14
14
14
14
14
14
14
13
14
13
14
17
14
13
31
17
5
14
31
31
14
37
14
14
27
14
14
14
14
19 14
14
28
14
14
14
14
14
14 14
14
28
27
14
14
27
27
29
27
14
14
14
14
14
14
27
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
27
27
31
31
14
27
27
27
27
14
27
27
27
27
27
14
14
14
27
24
24
27
27
40
40
40
14
14
14
14
14
14
14
14
14
14
14
14
14
14
27
14
27
14
40
14
37
37
14
POWER/GROUND
VSS
(8 OF 9)
VDD2.5
VSS
VDD1.8/CPUVIO
GROUND
POWER
(9 OF 9)
VDD1.5
AGP_IO_VDD
VDD3.3
AGP_IO_VSS
VSS
VSS
VDD3.3
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
Intrepid Power
M34
M32
M31
M3
M28
M24
M21
M20
M18
M17
M14
L24
J6
J34
J31
J3
G7
F6
F34
F31F3F28
F25
F22
F19
F16
F13
F10D4D33C7C36
C34
C31
C3
C28
C25
C22
C19
C16
C13
C10
C1
B35
B2
AT34
AT3
AR35
AR2
AP9
AP6
AP36
AP34
AP33
AP30
AP3
AP27
AP24
AP21
AP18
AP15
AP12
AP1
AN4
AN33
U16
U10
T27
T24
T23
T14
T11
R6
R34
R31
R3
R29
R26
R24
R23
R21
R19
R18
R16
R14
P4
P29
P22
P17
P12
N25
N15
M9
M6
AE31
AC28
AC27
AC25
AB34
E33
Y29
Y27
W34
AB31
W31
W25
V29
V25
U28
U25
T34
T31
T29
T28
AB27
T25
R27
R25
P28
P25
N36
N34
N31
N28
K34
AB25
K31
G34
G31
C35
AP35
AK34
AH34
AH30
AF28
AE34
AA29
AA25
F12
C9
C30
C27
C24
C21
C18
P19
P16
N23
N21
N18
C15
M23
M22
M19
M16
M15
F27
F24
F21
F18
F15
C12
U51
OMIT
INTREPID-REV2.1
BGA
CRITICAL
AE21
AE19
AE18
AE16
AE14
AD6
AL9
AL6
AL34
AL31
AL27
AD34
AL21
AL18
AL15
AL12
AK7
AK3
AH27
AH23
AH21
AD31
AH20
AG6
AG34
AG30
Y25
Y24
Y23
Y19
Y16
AG3
Y14
Y12
Y11
W26
W23
W14
W11
V6
V34
V31
AG24
V3
V24
V21
V18
V17
V12
V10
U29
U27
U22
AG23
U19
AG21
AE28
AE22
AD3
AD28
G3F9F7
F30
E4
B34
D5
D32
C6
C2
B3
AR3
AC13
AP7
AP2
W6
W3
W13
W12
U12
T6
T3
T18
AC12
T12
R22
P14
P13
N6
N3
N24
K6
K3
AP16
AB6
AP13
AP10
AN5
AM4
AL7
AL3
AL16
AL13
AL10
AK6
AB3
AH6
AH3
AF25
AE6
AE3
AE17
AE15
AD21
AC14
G6
AA12
AA11
AD13
AC23
AC19
AC17
AB19
AB17
AB15
Y18
Y13
W24
W16
V22
V20
V19
V16
U24
U18
AB13
U17
T13
R20
R17
P21
P20
P18
P15
AD22
AD15
AA24
AA21
AA6
AA34
AA31
AA3
AA27
AA20
A34
AD25
AD23
AD12
AC26
AC22
AC20
AC18
AC16A3AC15
AC11
AB29
AB28
AB24
AB18
AB16
AB14
AB12
AB11
AL19
AJ23
AJ21
AH28
AH22
AH19
AF22
AR34
AE23
AR33
AP31
AP28
AP25
AP22
AP19
AN32
AL30
AL28
AL22
AE20
AD20
U51
OMIT
INTREPID-REV2.1
BGA
CRITICAL
+1_5V_MAIN
+3V_MAIN
2
1
R276
INT_2_5V_COLD
0
5%
1/10W
FF
805
2
1
R274
INT_2_5V_HOT
0
5%
1/10W
FF
805
+2_5V_MAIN
+2_5V_SLEEP
?
1
IC,ASIC,INTREPID,REV2.1,974 BGA,FAST
343S0305 CRITICAL
U51
A
051-6680
15 46
+1_5V_AGP
MAXBUS_SLEEP
+2_5V_INTREPID
40
40
35
22
16
21 8 19 7 16 6 12
5
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
INTREPID MAXBUS DECOUPLING
24 Balls 4 X 10UF (0805) 28 X 0.22UF (0402)
INTREPID AGP I/O DECOUPLING
21 X 0.22UF (0402)
4 X 10UF (0805)
21 Balls
INTREPID DDR DECOUPLING
44 Balls 4 X 10UF (0805) 46 X 0.22UF (0402)
INTREPID CORE DECOUPLING
4 X 10UF (0805)
30 Balls 29 X 0.22UF (0402)
INTREPID 3.3V DECOUPLING
57 Balls 4 X 10UF (0805) 40 X 0.22UF (0402)
INTREPID/MAIN 2.5V DECOUPLING
10 X 0.22UF (0402)
Place these 2.5V Decoupling Caps near the Edge of +2.5V_MAIN and +2.5V_INTREPID split
Intrepid Decoupling
2
1
C178
0.22uF
20%
6.3V CERM 402
2
1
C182
0.22uF
20%
6.3V CERM 402
2
1
C204
0.22uF
20%
6.3V CERM 402
2
1
C166
402
CERM
6.3V
20%
0.22uF
2
1
C142
10uF
20%
6.3V CERM
805
2
1
C148
10uF
6.3V CERM
805
20%
2
1
C141
0.22uF
20%
6.3V CERM 402
2
1
C205
0.22uF
20%
6.3V CERM 402
2
1
C145
0.22uF
20%
6.3V CERM 402
2
1
C223
0.22uF
20%
6.3V CERM 402
2
1
C214
0.22uF
20%
6.3V CERM 402
2
1
C229
402
CERM
6.3V
20%
0.22uF
2
1
C163
0.22uF
20%
6.3V CERM 402
2
1
C181
0.22uF
20%
6.3V CERM 402
2
1
C164
0.22uF
20%
6.3V CERM 402
2
1
C207
0.22uF
20%
6.3V CERM 402
2
1
C225
0.22uF
20%
6.3V CERM 402
2
1
C208
0.22uF
20%
6.3V CERM 402
2
1
C149
0.22uF
20%
6.3V CERM 402
2
1
C147
0.22uF
20%
6.3V CERM 402
2
1
C206
0.22uF
20%
6.3V CERM 402
2
1
C165
0.22uF
20%
6.3V CERM 402
2
1
C146
20%
6.3V CERM
805
10uF
2
1
C144
10uF
20%
6.3V CERM
805
2
1
C241
0.22uF
20%
6.3V CERM 402
2
1
C334
0.22uF
20%
6.3V CERM 402
2
1
C369
0.22uF
6.3V
20% CERM
402
2
1
C315
0.22uF
20%
6.3V CERM 402
2
1
C274
0.22uF
20%
6.3V CERM 402
2
1
C219
0.22uF
20%
6.3V CERM 402
2
1
C253
0.22uF
20%
6.3V CERM 402
2
1
C218
0.22uF
20%
6.3V CERM 402
2
1
C186
0.22uF
20%
6.3V CERM 402
2
1
C243
0.22uF
20%
6.3V CERM 402
2
1
C281
0.22uF
20%
6.3V CERM 402
2
1
C240
0.22uF
20%
6.3V CERM 402
2
1
C305
0.22uF
20%
6.3V CERM 402
2
1
C297
0.22uF
20%
6.3V CERM 402
2
1
C254
0.22uF
20%
6.3V
CERM 402
2
1
C172
0.22uF
20%
6.3V CERM 402
2
1
C266
0.22uF
402
CERM
6.3V
20%
2
1
C275
0.22uF
20%
6.3V CERM 402
2
1
C216
0.22uF
20%
6.3V CERM 402
2
1
C252
0.22uF
20%
6.3V CERM 402
2
1
C251
0.22uF
20%
6.3V CERM 402
2
1
C304
0.22uF
20%
6.3V CERM 402
2
1
C306
0.22uF
20%
6.3V CERM 402
2
1
C265
402
CERM
6.3V
20%
0.22uF
2
1
C322
10uF
20%
6.3V CERM
805
2
1
C202
10uF
805
CERM
6.3V
20%
2
1
C314
10uF
20%
6.3V CERM
805
2
1
C191
805
CERM
6.3V
20%
10uF
2
1
C293
0.22uF
20%
6.3V CERM 402
2
1
C230
0.22uF
20%
6.3V CERM 402
2
1
C217
0.22uF
20%
6.3V CERM 402
2
1
C333
0.22uF
402
CERM
6.3V
20%
2
1
C203
402
CERM
6.3V
20%
0.22uF
2
1
C282
0.22uF
20%
6.3V CERM 402
2
1
C242
0.22uF
6.3V 402
CERM
20%
2
1
C185
0.22uF
6.3V
20% CERM
402
2
1
C273
402
CERM
6.3V
20%
0.22uF
2
1
C316
0.22uF
20%
6.3V CERM 402
2
1
C323
402
CERM
6.3V
20%
0.22uF
2
1
C239
0.22uF
20%
6.3V CERM 402
2
1
C320
0.22uF
6.3V
20% CERM
402
2
1
C361
0.22uF
20%
402
CERM
6.3V
2
1
C312
0.22uF
20%
6.3V CERM 402
2
1
C331
0.22uF
20%
6.3V CERM 402
2
1
C332
0.22uF
CERM 402
6.3V
20%
2
1
C344
0.22uF
20% CERM
6.3V 402
2
1
C366
0.22uF
20%
6.3V CERM 402
2
1
C363
0.22uF
20% CERM
6.3V 402
2
1
C373
0.22uF
20%
6.3V CERM 402
2
1
C346
0.22uF
20%
6.3V CERM 402
2
1
C330
0.22uF
20%
6.3V CERM 402
2
1
C319
0.22uF
20%
6.3V CERM 402
2
1
C345
0.22uF
20%
6.3V CERM 402
2
1
C329
0.22uF
20%
6.3V CERM 402
2
1
C367
0.22uF
20%
6.3V CERM 402
2
1
C365
0.22uF
20%
6.3V CERM 402
2
1
C321
0.22uF
20%
6.3V CERM 402
2
1
C380
10uF
6.3V
20%
CERM
805
2
1
C379
10uF
20%
805
6.3V CERM
2
1
C381
10uF
6.3V
20%
CERM
805
2
1
C382
10uF
20%
6.3V CERM
805
2
1
C290
0.22uF
20%
6.3V CERM 402
2
1
C300
0.22uF
20%
6.3V CERM 402
2
1
C222
0.22uF
20%
6.3V CERM 402
2
1
C236
0.22uF
20%
6.3V CERM 402
2
1
C224
0.22uF
20%
6.3V CERM 402
2
1
C258
402
CERM
20%
6.3V
0.22uF
2
1
C302
0.22uF
20%
6.3V CERM 402
2
1
C263
0.22uF
20%
6.3V CERM 402
2
1
C287
0.22uF
20%
6.3V CERM 402
2
1
C248
0.22uF
402
CERM
6.3V
20%
2
1
C292
0.22uF
20%
6.3V CERM 402
2
1
C250
0.22uF
20%
6.3V CERM 402
2
1
C303
0.22uF
6.3V 402
CERM
20%
2
1
C238
0.22uF
402
CERM
6.3V
20%
2
1
C260
0.22uF
20%
6.3V CERM 402
2
1
C262
0.22uF
20%
6.3V CERM 402
2
1
C279
0.22uF
20%
6.3V CERM 402
2
1
C226
0.22uF
20%
6.3V CERM 402
2
1
C288
0.22uF
20%
6.3V CERM 402
2
1
C278
0.22uF
20%
6.3V CERM 402
2
1
C310
0.22uF
20%
6.3V CERM 402
2
1
C299
0.22uF
20%
6.3V CERM 402
2
1
C301
0.22uF
20%
6.3V CERM 402
2
1
C271
0.22uF
20%
6.3V CERM 402
2
1
C325
10uF
20%
6.3V CERM
805
2
1
C200
10uF
20%
6.3V CERM
805
2
1
C324
10uF
20%
805
CERM
6.3V
2
1
C201
10uF
20%
6.3V CERM
805
2
1
C171
0.22uF
20%
6.3V CERM 402
2
1
C352
6.3V
20% CERM
402
0.22uF
2
1
C215
0.22uF
402
CERM
6.3V
20%
2
1
C342
0.22uF
20%
6.3V CERM 402
2
1
C327
0.22uF
20%
6.3V CERM 402
2
1
C268
0.22uF
20%
6.3V CERM 402
2
1
C358
402
CERM
6.3V
20%
0.22uF
2
1
C167
0.22uF
20%
6.3V CERM 402
2
1
C189
0.22uF
20%
6.3V CERM 402
2
1
C343
0.22uF
20%
6.3V CERM 402
2
1
C212
0.22uF
20%
6.3V CERM 402
2
1
C257
0.22uF
20%
6.3V CERM 402
2
1
C177
0.22uF
20%
6.3V CERM 402
2
1
C176
0.22uF
20%
6.3V CERM 402
2
1
C247
0.22uF
20%
6.3V CERM 402
2
1
C341
0.22uF
20%
6.3V CERM 402
2
1
C286
0.22uF
20%
6.3V CERM 402
2
1
C350
0.22uF
20%
6.3V CERM 402
2
1
C234
0.22uF
20%
6.3V CERM 402
2
1
C317
0.22uF
20%
6.3V CERM 402
2
1
C221
0.22uF
20% CERM
6.3V 402
2
1
C237
0.22uF
20%
6.3V CERM 402
2
1
C351
0.22uF
20%
6.3V CERM 402
2
1
C357
0.22uF
20%
6.3V CERM 402
2
1
C269
402
CERM
6.3V
20%
0.22uF
2
1
C318
402
CERM
6.3V
20%
0.22uF
2
1
C283
0.22uF
20%
6.3V CERM 402
2
1
C308
0.22uF
20%
6.3V CERM 402
2
1
C170
20%
6.3V CERM 402
0.22uF
2
1
C376
10uF
20%
6.3V CERM
805
2
1
C378
10uF
20%
6.3V CERM
805
2
1
C175
0.22uF
20%
6.3V CERM 402
2
1
C285
0.22uF
20%
6.3V CERM 402
2
1
C360
0.22uF
20%
6.3V CERM 402
2
1
C375
10uF
20%
6.3V CERM
805
2
1
C377
10uF
20%
6.3V CERM
805
2
1
C289
0.22uF
20%
6.3V CERM 402
2
1
C261
0.22uF
6.3V
20% CERM
402
2
1
C272
0.22uF
20%
6.3V CERM 402
2
1
C227
0.22uF
20%
6.3V CERM 402
2
1
C259
0.22uF
20%
6.3V CERM 402
2
1
C309
0.22uF
20%
6.3V CERM 402
2
1
C158
0.22uF
20%
6.3V CERM 402
2
1
C359
0.22uF
20%
6.3V CERM 402
2
1
C371
0.22uF
20%
6.3V CERM 402
2
1
C228
0.22uF
20%
6.3V CERM 402
2
1
C313
0.22uF
20%
6.3V CERM 402
2
1
C184
0.22uF
20%
6.3V CERM 402
2
1
C349
0.22uF
20%
6.3V CERM 402
2
1
C192
0.22uF
20%
6.3V CERM 402
2
1
C348
0.22uF
6.3V
20% CERM
402
2
1
C168
0.22uF
402
CERM
6.3V
20%
2
1
C368
0.22uF
20%
6.3V CERM 402
2
1
C294
0.22uF
20%
6.3V CERM 402
2
1
C264
0.22uF
20%
6.3V CERM 402
2
1
C296
0.22uF
20%
6.3V CERM 402
2
1
C231
0.22uF
20%
6.3V CERM 402
2
1
C280
0.22uF
20%
6.3V 402
CERM
2
1
C295
0.22uF
20%
6.3V CERM 402
2
1
C364
0.22uF
20%
6.3V CERM 402
2
1
C328
0.22uF
20%
6.3V CERM 402
2
1
C347
0.22uF
20%
6.3V CERM 402
2
1
C354
0.22uF
402
CERM
6.3V
20%
2
1
C159
0.22uF
20%
6.3V CERM 402
2
1
C160
0.22uF
20%
6.3V CERM 402
2
1
C180
0.22uF
20%
6.3V CERM 402
2
1
C183
0.22uF
402
CERM
6.3V
20%
2
1
C213
0.22uF
20%
6.3V CERM 402
2
1
C161
0.22uF
20%
6.3V CERM 402
2
1
C162
0.22uF
20%
6.3V CERM 402
2
1
C179
0.22uF
20%
6.3V CERM 402
+1_5V_MAIN
+3V_MAIN
2
1
C385
0.22uF
20%
6.3V CERM 402
2
1
C374
0.22uF
20%
6.3V CERM 402
2
1
C395
0.22uF
20%
6.3V CERM 402
2
1
C739
0.22uF
20%
6.3V CERM 402
2
1
C736
0.22uF
20% CERM
6.3V 402
2
1
C245
20%
0.22uF
6.3V CERM 402
2
1
C735
0.22uF
20%
6.3V CERM 402
2
1
C335
0.22uF
20%
6.3V CERM 402
2
1
C139
0.22uF
20%
6.3V CERM 402
2
1
C770
0.22uF
20%
6.3V CERM 402
+2_5V_MAIN
A
051-6680
4616
+1_5V_AGP
+2_5V_INTREPID
MAXBUS_SLEEP
40
40
35
22
15
21
40
8
19
15
7
15
10
6
12
9
5
AVDD
VDD
VDD_PCI
AD3 AD4 AD5
AD2
AD0 AD1
VSS
AD6 AD7
AD17
AD16
AD15
AD8 AD9 AD10 AD11 AD12 AD13 AD14
AD27
AD26
AD25
AD18 AD19 AD20 AD21 AD22 AD23 AD24
AD28 AD29 AD30 AD31
CBE0 CBE1 CBE2 CBE3
PAR
PERR
GNT
DEVSEL
IDSEL
FRAME IRDY TRDY STOP
REQ
SERR
CRUN
SMI
VBBRST
VCCRST
INTA INTB INTC PCLK
PME
LEGC
XT2
DM1 DP1
DM2 DP2
DM3 DP3
RSDM4
RSDM2
RSDP2
RSDM3
RSDP3
RSDP1
XT1/SCLK
RSDM1
DM4 DP4
DM5 DP5
RREF
OCI1 OCI2
OCI4
OCI3
OCI5
RSDP4
RSDM5
RSDP5
PPON1
NC1 NC2
SMC
TEB
NTEST1
PPON2 PPON3 PPON4 PPON5
AVSS(R)
AVSS
SRCLK SRDTA SRMOD
NANDTEST
AMC
TEST
TABLE_5_ITEM
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
NC
Tie to GND (NEC_AVSS_F) at ball N11
(NEC_USB_DBM)
Low/Full/High Speed (External)
NC
Low/Full/High Speed (External)
(NEC_USB_DAM) (NEC_USB_DAP)
(NEC_USB_DBP)
facilitate NAND-tree testing
Series Rpaks required to
(PCI_AD<27>)
OD
OD
OD
OD
OD
OD
IPD
IPD
IPD
IPD
NC
NC
NC
NC
IPD
NC
IPD
NC
NEC documentation indicates that NCs must be tied high.
OUT OUT OUT OUT OUT
NC
NC
NC
NC
NC
NC
Y1’s LOAD CAPACITANCE = 16 pF
USB 2.0
2
1
R636
22
5%
1/16W
MF
402
+3V_MAIN
21
R614
9.09K
1/16W
1% MF
402
21
L7
FERR-EMI-100-OHM
SM
2
1
C759
27pF
5% 50V CERM 402
2
1
C136
402
50V CERM
5%
27pF
2
1
R124
100
5%
1/16W
402
MF
P8
L9
N2
B2
A2
B14
H14
N14
P10
N1
D8
F11
J11
G4
D12
H12
L12
M11
B13
N13
B1
C8M4H3
L13
N8E2A3
A12
A13
P12
P3
D7
H4
G12
D13
F13
H13
J13
P2
C9
B8
G1
L8
N7
G3
P9
N9
M9
L6
M7
H1
C14
E14
G14
J12
K13
E13
F12
H11
K14
M14
P11
C6
A9
C10
C11
A11
C12
D9
H2
A8
J4
B9
A10
B10
B11
B12
M8
M6
P6
M10
L7
F4
A7
B7
C7
B3
D6
F3
C13
E12
G13
J14
L14
D14
F14
G11
K12
M13
G2
N6
C3
F1
J3
M2
N11
M12
P13
N12
N10
P7
L1
L2
M1
N3
M3
N4
A6
B6
P4
C5
A5
C4
B5
A4
B4
C1
C2
D2
D1
N5
D3
E1
E3
F2
J1
J2
K3
K1
L3
K2
P5
M5
U17
CRITICAL
NEC_uPD720101_USB2
FBGA
21
R606
10K
5%
1/16W
MF
402
+3V_MAIN
2
1
C744
NO STUFF
402
CERM
10V
20%
0.1uF
21
R607
0
5%
1/16W
MF
402
2
1
C743
NO STUFF
0.1uF
20% 10V CERM 402
63
RP43
10K
5%
1/16W
SM1
54
RP43
10K
5%
1/16W
SM1
7
2
RP43
10K
5% 1/16W SM1
8
1
RP43
10K
SM1
1/16W
5%
5
6
7
8
4
3
2
1
RP45
1/16W
5%
47
SM1
5
6
7
8
4
3
2
1
RP44
5%
1/16W
47
SM1
21
R608
0
5%
1/16W
MF
402
2 1
R615
1K
5%
1/16W
MF
402
2 1
R632
1K
5%
1/16W
MF
402
2
1
R172
0
603
MF
1/16W
5%
21
R613
402
MF
1/16W
1%
43.2
21
R612
43.2
1/16W
1% MF
402
21
R610
43.2
402
MF
1/16W
1%
21
R609
43.2
1%
1/16W
MF
402
21
R798
0
603
MF
1/16W
5%
21
Y1
OMIT
CRITICAL
30.0000M
8X4.5MM-SM
2
1
C749
402
CERM
10V
20%
0.1uF
2
1
C750
0.1uF
20% 10V CERM 402
2
1
C761
0.1uF
20% 10V CERM 402
2
1
C752
0.1uF
20% 10V CERM 402
2
1
C769
0.1uF
20% 10V CERM 402
2
1
C748
0.1uF
20% 10V CERM 402
2
1
C756
0.1uF
20% 10V CERM 402
2
1
C747
0.1uF
20% 10V CERM 402
2
1
C746
0.1uF
20% 10V CERM 402
2
1
C765
10V CERM 402
20%
0.1uF
2
1
C768
0.1uF
20% 10V CERM 402
C197
10uF
20%
6.3V CERM 805
2
1
R617
4.7K
402
MF
1/16W
5%
2
1
C173
10uF
20%
6.3V CERM
805
2
1
C751
0.1uF
402
CERM
10V
20%
2
1
C760
0.1uF
20% 10V
CERM
402
?
197S0087
1 Y1
CRITICAL
XTAL,CER,LW PROF,30.0000MHZ,8X4.5MM,SMD
051-6680
A
4617
+3V_NEC_VDD
NEC_USB_RSDM1
NEC_USB_RSDP1
NEC_USB_DAM
+3V_NEC_VDD
NEC_NC<2>
NEC_NANDTESTOUT_TP
NEC_USB_DBM
NEC_AVSS_F
NEC_OCI<3>
NEC_PCI_INTA_L NEC_PCI_INTB_L
NEC_PME_L
NEC_LEGC
NEC_PCI_INT_L
NEC_MAIN_RESET_L
PCI_AD<4>
PCI_AD<3>
PCI_AD<1>
NEC_USB_RSDM2
NEC_USB_RSDP2
NEC_USB_DAP
NEC_LUSB_OCI
NEC_LUSB_OCI_UF
NEC_XT2_R
PCI_AD<27>
PCI_AD<17>
PCI_AD<24>
NEC_LUSB_OCI NEC_RUSB_OCI
NEC_PPON4_TP
NEC_LUSB_PPON NEC_RUSB_PPON NEC_PPON3_TP
NEC_PPON5_TP NEC_NC<1>
NEC_AVDD
PCI_AD<0>
PCI_AD<2>
PCI_AD<9> PCI_AD<10> PCI_AD<11> PCI_AD<12> PCI_AD<13> PCI_AD<14> PCI_AD<15> PCI_AD<16>
PCI_AD<18> PCI_AD<19>
PCI_AD<21> PCI_AD<22>
PCI_AD<20>
PCI_AD<23>
PCI_AD<26>
PCI_AD<25>
PCI_AD<29>
PCI_AD<28>
PCI_AD<30> PCI_AD<31>
PCI_CBE<0> PCI_CBE<1> PCI_CBE<2> PCI_CBE<3>
PCI_PAR PCI_FRAME_L PCI_IRDY_L PCI_TRDY_L PCI_STOP_L
NEC_PCI_REQ_L NEC_PCI_GNT_L PCI_PERR_L PCI_SERR_L
NEC_SMI_L_TP
NEC_OCI<5>
NEC_AMC_TP
NEC_IO_RESET_L
NEC_MAIN_RESET_L
CLK33M_NEC
NEC_CRUN_L
NEC_PCI_INTC_L
IO_RESET_L PMU_PME_L
NEC_IO_RESET_L
NEC_PME_L MAIN_RESET_L NEC_LEGC
NEC_OCI<4>
NEC_NANDTESTEN_TP
NEC_AVSS_F
NEC_XT1
NEC_RREF
NEC_XT2
PCI_AD<8>
PCI_AD<5>
NEC_RUSB_OCI
NEC_RUSB_OCI_UF
NEC_USB_DBP
PCI_DEVSEL_L
NEC_IDSEL
+3V_NEC_VDD
PCI_AD<7>
PCI_AD<6>
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
31
41
41
41
41
39
39
39
39
39
39
39
39
39 39
39
39 39
39
39 39
39 39
41
41
39
41
39
39
39
39
39
39
41
41
41 41
41
26
39
39
41
39
39
26
26
26
26
26
26
26
26
26 26
26
26 26
26
26 26
26 26
39
39
26
39
26
26
26
26
26
26
39
39 39
39
39
39
39 39
39
31 41
20
26
26
39
26
26
41
41 18
18
18
41
18
18
18
18
18
18 18
18
18 18
18
18 18
18 18
26
26
18
26
18
18
18
18
18
18
26
26 26
26
26
26
26 26
26
28 31
19
18
18
41
26
18
18
40
39
40
39 12
12
12
39
41
12
12
12
41 41
12
12
12 12
12
12 12
12
12 12
12 12
18
18
12
18
12
12
12
12
12
12
18
18 18
18
18
18
18 18
18
37
25 26
18
12
12
41
39
18
40
12
12
17
27
17
27
17
17
17
14
17
9
9
9
27
17 27
9
9
9
17 17
27 27
40
9
9
9 9
9
9 9
9
9 9
9 9
12
12
9
12
9
9
9
9
9
9
12
12 12
12
12
12
12 12
12
12 12
18
18
17
17
12
24 14
17 17
14 17
9
9
17 27
27
12
17
9
9
C/BE3*
C/BE2*
C/BE1*
C/BE0*
VR_EN* VR_PORT
VCCCB
VCCP
GND
VCC
GRST
MFUNC4 MFUNC5 MFUNC6
MFUNC3
MFUNC0
SUSPEND
MFUNC1 MFUNC2
PCLK
SPKROUT
GNT
TRDY
STOP
FRAME
PRST REQ
DEVSEL
PERR
IDSEL
SERR
IRDY
AD31
PAR
AD30
AD29
AD28
AD27
AD20 AD21
AD18 AD19
AD26
AD25
AD24
AD23
AD22
AD17
AD10 AD11
AD9
AD8
AD16
AD15
AD14
AD13
AD12
AD7
AD0
AD2 AD3 AD4 AD5 AD6
AD1
D14/RSVD
D13/CAD6
D12/CAD4
D11/CAD2
D10/CAD31
D15/CAD8
D9/CAD30
D8/CAD28
D7/CAD7
D6/CAD5
D5/CAD3
D4/CAD1
D3/CAD0
D2/RSVD
D1/CAD29
D0/CAD27
A22/CTRDY*
A20/CSTOP*
A23/CFRAME*
A21/CDEVSEL*
A19/CBLOCK*
A15/CIRDY*
A14/CPERR*
A12/CC/BE2*
A8/CC/BE1*
A25/CAD19
A24/CAD17
A18/RSVD
A17/CAD16
A16/CCLK
A13/CPAR
A11/CAD12
A10/CAD9
A9/CAD14
A7/CAD18
A6/CAD20
A5/CAD21
CE2/CAD10*
INPACK/CREQ*
WAIT/CSERR*
A4/CAD22
A3/CAD23
A2/CAD24
A1/CAD25
A0/CAD26
VPPD1
VPPD0
VCCD0* VCCD1*
IORD*/CAD13 IOWR*/CAD15
OE*/CAD11
WE*/CGNT*
CD2*/CCD2*
CD1*/CCD1*
CE1*/CC/BE0*
RDY/IREQ*/CINT*
VS1*/CVS1 VS2*/CVS2
REG*/CC/BE3*
RESET/CRST*
BVD1/CSTSCHG/STSCHG*/RI*
BVD2/SPKR*/CAUDIO
WP/IOIS16*/CCLKRUN*
RI_OUT/PME
CLK_48_RSVD/NC
TPS2211
OC
AVPP
AVCC2
AVCC1
AVCC0
GND
SHTDWN
VCCD0 VCCD1 VPPD0 VPPD1
V_5_2
V_5_1
V_3_2
V_3_1
V_12
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
(PCI_AD<19>)
NC
TI REFERENCE SCHEMATIC DID NOT HAVE BULK ON +VCC_CBUS_SW
NC
NC
NC
NC
NC
NC
PCI1510 PULL-UPS
INTEGRATED PULL-UP
CLAMP FOR PC-CARD CLAMP FOR PCI
MAKE SURE VCC AND VPP ARE WIDE PLANE/TRACES TO MINIMIZE INDUCTANCE!
0.1UF ARE USED TO INCREASE ESD DISCHARGES OF UP TO 10KV
PC CARD/CARDBUS CONNECTOR
CARDBUS
+3V_MAIN
+5V_MAIN
2
1
C37
0.1uF
20% 10V CERM 402
21
R718
10K
5%
1/16W
MF
402
21
R714
5%
1/16W
MF
402
10K
21
R722
5%
1/16W
MF
402
10K
1
2
8
9
3
7
4
6
10
5
RP1
SM
10K
5%
1/32W
25V
2
1
C776
10uF
20%
6.3V CERM 805
A5
D13
B6
A9
B2
L8
D4
M11
K9
L3
L12
N13
B11
N11
N7M1E1D5
C13
A7
J3
N10
L1
M9
L2
M8
D8
C2
A8
A6
G3
K3
G1
N1
G10
L10
N12
M10
K10
L9
N9
K7
K1
C11
F12
B8
F2
L11
C1
N2
M13
K8H4
F13
D1
A11
A2
J1
K2
B4
C5
H12
J10
J13
K12
K11
A3
H11
J12
K13
J11
M12
B3
C4
A4
H10
G13
H13
B5
L13
A1
J2
M3
K6
D6
C6
M2
N4
N5
L6
M6
K4
E3
D3
N6
E4
D2
B1
F4
E2
F3
C3
F1
G4
G2
L7
H2
H3
H1
J4
M4
L5
K5
N3
L4
M5
M7
N8
F11
E11
A12
C9
C8
B12
D10
B9
B10
A10
C12
D11
E10
B7
A13
E13
F10
B13
C10
D12
E12
D9
G12
G11
D7
C7
U8
CRITICAL
PCI1510GGU
BGA
+2_5V_SLEEP
2
1
R721
10K
402
MF
1/16W
5%
2
1
C796
2.2uF
20% 10V CERM 805
2
1
C800
2.2uF
20% 10V CERM 805
2
1
C787
4.7uF
805
CERM
6.3V
20%
2
1
C60
10uF
20%
6.3V CERM 805
+3V_SLEEP
+3V_SLEEP_PCCARD
9
84
83 82
81
80879
78 77
76 75
74 73
72 71
70769
68 67
66 65
64 63
62 61
60
6
59
58 57
56 55
54 53
52 51
50
5
49
48 47
46 45
44 43
42 41
40
4
39
38 37
36 35
34 33
32 31
30
3
29
28 27
26 25
24 23
22 21
20
2
19
18 17
16 15
14 13
12 11
10
1
J5
CRITICAL
QT500806-L111
M-ST-SM1
2
1
R756
0
5% 1/16W
603
MF
2
1
R726
0
5%
1/16W
MF
402
2
1
C786
0.22uF
20%
6.3V CERM 402
6
5
4
3
9
14
15
2
1
16
87
10
13
12
11
U4
SSOI
2
1
C775
0.22uF
20%
6.3V CERM 402
2
1
C778
0.22uF
20%
6.3V CERM 402
2
1
C784
0.22uF
20%
6.3V CERM 402
2
1
C783
0.22uF
20%
6.3V CERM 402
2
1
C791
0.22uF
20%
6.3V CERM 402
21
R724
47
5%
1/16W
MF
402
2
1
C789
0.22uF
20%
6.3V CERM 402
2
1
C782
0.22uF
20%
6.3V CERM 402
2
1
C40
0.1uF
20% 10V
CERM
402
2
1
R719
22
5%
1/16W
MF
402
21
R723
47
5%
1/16W
MF
402
A
051-6680
46
18
CBUS_DATA<11>
CBUS_DET_1_L
+3V_SLEEP_PCCARD
PCI_SERR_L
CBUS_PCI_IDSEL
CBUS_MFUNC1_PD CBUS_MFUNC2_PD
CBUS_BVD2_L
PCI_IRDY_L PCI_SERR_L
CBUS_MFUNC6_PD
CBUS_MFUNC4_PD CBUS_MFUNC5_PD
MAIN_RESET_L
TPS2211_SHTDWN_L
+VPP_CBUS_SW
PCI1510_VR_EN_L
CBUS_MFUNC3_PD
CBUS_SUSPEND_PU
PCI_PERR_L
CBUS_BVD1_L
CBUS_DET_1_L CBUS_DET_2_L CBUS_IORD_L CBUS_IOWR_L CBUS_OE_L CBUS_CE1_L
CBUS_WE_L CBUS_READY CBUS_RESET_L CBUS_REG_L
CBUS_WP_L CBUS_CE2_L CBUS_INPACK_L CBUS_WAIT_L
CBUS_DATA<14>
CBUS_DATA<13>
CBUS_DATA<12>
CBUS_DATA<11>
CBUS_DATA<10>
CBUS_DATA<9>
CBUS_DATA<8>
CBUS_DATA<6>
CBUS_DATA<5>
CBUS_DATA<4>
CBUS_DATA<3>
CBUS_DATA<2>
CBUS_DATA<1>
CBUS_DATA<0>
CBUS_ADDR<25>
CBUS_ADDR<24>
CBUS_ADDR<23>
CBUS_ADDR<22>
CBUS_ADDR<21>
CBUS_ADDR<20>
CBUS_ADDR<19>
CBUS_ADDR<18>
CBUS_ADDR<17>
CBUS_ADDR_16_UF
CBUS_ADDR<15>
CBUS_ADDR<14>
CBUS_ADDR<13>
CBUS_ADDR<12>
CBUS_ADDR<11>
CBUS_ADDR<10>
CBUS_ADDR<9>
CBUS_ADDR<8>
CBUS_ADDR<7>
CBUS_ADDR<6>
CBUS_ADDR<5>
CBUS_ADDR<4>
CBUS_ADDR<3>
CBUS_ADDR<2>
CBUS_ADDR<1>
CBUS_ADDR<0>
CBUS_DATA<15>
CBUS_VS1 CBUS_VS2
CBUS_ADDR<16>
PCI_PERR_L PCI_FRAME_L
PCI_PAR
CBUS_MFUNC1_PD CBUS_MFUNC2_PD CBUS_MFUNC3_PD CBUS_MFUNC4_PD CBUS_MFUNC5_PD CBUS_MFUNC6_PD
PCI_DEVSEL_L
PCI_TRDY_L
PCI_STOP_L
PCI_AD<0> PCI_AD<1>
PCI_CBE<3>
PCI_CBE<2>
PCI_CBE<1>
PCI_CBE<0>
PCI_AD<10> PCI_AD<11> PCI_AD<12> PCI_AD<13> PCI_AD<14> PCI_AD<15> PCI_AD<16> PCI_AD<17> PCI_AD<18>
PCI_AD<2>
PCI_AD<20> PCI_AD<21> PCI_AD<22> PCI_AD<23> PCI_AD<24> PCI_AD<25>
PCI_AD<9>
PCI_AD<8>
PCI_AD<7>
PCI_AD<6>
PCI_AD<5>
PCI_AD<4>
PCI_AD<31>
PCI_AD<30>
PCI_AD<3>
PCI_AD<29>
PCI_AD<28>
PCI_AD<27>
PCI_AD<26>
CBUS_VPPD0
CBUS_VCCD1_L
CBUS_VCCD0_L
PCI_AD<19>
CBUS_DATA<3> CBUS_DATA<4> CBUS_DATA<5>
CBUS_DATA<7> CBUS_CE1_L CBUS_ADDR<10> CBUS_OE_L
CBUS_ADDR<11> CBUS_ADDR<9>
CBUS_ADDR<13>
CBUS_ADDR<14> CBUS_WE_L CBUS_READY +VCC_CBUS_SW
+VPP_CBUS_SW
CBUS_ADDR<7> CBUS_ADDR<6> CBUS_ADDR<5> CBUS_ADDR<4>
CBUS_ADDR<3> CBUS_ADDR<2> CBUS_ADDR<1> CBUS_ADDR<0>
CBUS_DATA<0> CBUS_DATA<1> CBUS_DATA<2> CBUS_WP_L
CBUS_ADDR<8>
CBUS_ADDR<25>
CBUS_DATA<12> CBUS_DATA<13>
CBUS_DATA<14> CBUS_DATA<15> CBUS_CE2_L CBUS_VS1
CBUS_IORD_L CBUS_IOWR_L CBUS_ADDR<17> CBUS_ADDR<18>
CBUS_ADDR<19> CBUS_ADDR<20> CBUS_ADDR<21> +VCC_CBUS_SW
+VPP_CBUS_SW CBUS_ADDR<22> CBUS_ADDR<23> CBUS_ADDR<24>
CBUS_VS2 CBUS_RESET_L CBUS_WAIT_L
CBUS_INPACK_L CBUS_REG_L CBUS_BVD2_L CBUS_BVD1_L
CBUS_DATA<8>
CBUS_DATA<10> CBUS_DET_2_L
SLEEP_L_LS5
CBUS_VPPD1
+VCC_CBUS_SW
CBUS_DATA<6>
CBUS_ADDR<16> CBUS_ADDR<15> CBUS_ADDR<12>
CBUS_DATA<9>
CBUS_DATA<7>
CBUS_PCI_RESET_L
CBUS_INT_L
CBUS_SUSPEND_PU
CBUS_PCI_REQ_L CBUS_PCI_GNT_L CLK33M_CBUS
41 31
41
41
41
41
41 41
41
41 41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
26
41
41
41
41
41
39
39
39
39
39 39
39
39 39
39
39
39
39 41
41
41
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
36
39
20
39
39
39
39
39
26
26
39
39
39
39
26
26
26 26
26
26 26
26
26
26
26 39
39
39
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
35
26
19
26
26
26
26
26
17
17
26
26
26
26
17
17
17 17
17
17 17
17
17
17
17 26
26
26
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
34
41
18
17
18
17
40
18
41
41
18
17
17
17
17
17
12
12
17
17
17
17
12
12
12 12
12
12 12
12
12
12
12 17
17
17
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
40
40
40
40
41
28
40
37
18
18
40
17
18
18
18
12
17
18
18
18
14
18
18
18
17
18
18
18
18 18
18
18
18
18
18 18
18
18
18 18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
17
12
12
18 18
18
18 18
18
12
12
12
9
9
12
12
12
12
9
9
9 9
9
9 9
9
9
9
9 12
12
12
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
18
18 18
18
18
18
18
18
18
18
18 18
18
18
18
18
18 18
18
18
18
18 18
18
18
18 18
18
18
18
18
18
18 18
18
18
18 18
18
18
18
18 18
18 18
18 18
18
18
18
18
18 18
18
18
18
18
21
18
18
18
18
18
18
18
14
18
12
12 12
MVREF
VSS
VSS
(1 OF 6)
RAGE_MOBILITY
AGP_BUSYB
AD_STBB1
AD_STBB0
AD_STB0
AGPREF
AD_STB1
AD30
AD31
AD29 AD28 AD27 AD26 AD25 AD24
AD17
AD14
AD15
AD23 AD22
AD19
AD20
AD21
AD16
AD18
AD6 AD5 AD4
AD13
AD11
AD12
AD10 AD9 AD8 AD7
AD3
CBEB1
CBEB2
CBEB3
AD0
AD1
AD2
CBEB0 PCICLK
FRAMEB
PAR
IRDYB TRDYB
RSTB
INTAB
GNTB
REQB
DEVSELB
STOPB
MEMVMODE1
MEMVMODE0
TEST_YCLK TEST_MLCK
D+ D-
VREFG
MEMTEST PLLTEST
WBF
ST0 ST1 ST2
SBA5
SBA6
SBA3
SBA4
SBA7
SBA2
STP_AGPB
RBFB
SB_STB
SBA1 SBA0
SUS_STAT
AGPTEST
AGP8X_DETB
RSTB_MSK
DBI_LO DBI_HI
SB_STBS
(2 OF 6)
RAGE_MOBILITY
VSS VSS
VSSVSS
RAGE_MOBILITY
(6 OF 6)
VSS
VDDCI
OE
GND
OUT
VCC
OSC
XIN/CLKIN
SSCLK
VSS
S0
S1
FRSEL
XOUT
VDD
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
NC
NC
NC
MAIN_RESET_L IS TOGGLED FOR SLEEP
PLACE VERF VOLTAGE DIVIDER CLOSE TO ATI M11 VREF PIN
FOR 2.5 VDDR1
MEMVMODE0=1.8V MEMVMODE1=GND
FOR 1.8 VDDR1
MEMVMODE0=GND MEMVMODE1=1.8V
(PLACE C408 CLOSE TO AGPREF PIN)
(PULL-UP to GPU_MEM_IO)
PLACE NEAR M11
27M OSC
(PLACE THE OSCILLATOR AND R304 AND R305
CLOSE TO ATI PIN AJ29)
(PLACE R315 CLOSE TO OSC)
SPREAD SPECTRUM SUPPORT
S0=1;S1=M => -1.5% DOWN-SPREAD
M11 AGP INTERFACE
21
R309
47
5%
1/16W
MF
402
2
1
R337
10K
5%
1/16W
MF
402
21
L22
60-OHM-EMI
SM
2
1
C457
0.01uF
20% 16V CERM 402
2
1
C458
10uF
20%
6.3V CERM 805
2
1
R338
20K
5% 1/16W MF 402
2
1
R335
20K
5% 1/16W MF 402
2
1
R372
45.3
1% 1/16W MF 402
21
R336
0
5%
1/16W
MF
402
2
1
R323
10K
5%
1/16W
MF
402
2
1
R371
4.7K
5% 1/16W
402
MF
ATI_MEMIO_HI
2
1
R375
ATI_MEMIO_HI
4.7K
5%
1/16W
MF
402
2
1
R388
1K
1%
1/16W
MF
402
2
1
R397
1K
1%
1/16W
MF
402
2
1
R373
402
MF
1/16W
1%
1K
2
1
R365
1K
1%
1/16W
402
MF 2
1
C516
0.1uF
10V
20%
CERM
402
2
1
C508
10uF
20%
6.3V CERM
805
2
1
R313
47
1%
1/16W
MF
402
2
1
R324
47K
5% 1/16W MF 402
2
1
R325
402
MF
1/16W
5%
47K
2
1
R376
4.7K
5% 1/16W MF 402
ATI_MEMIO_LO
2
1
R370
ATI_MEMIO_LO
4.7K
5%
1/16W
MF
402
2
1
C412
0.01uF
20% 16V
CERM
402
2
1
C476
0.01uF
20% 16V CERM 402
2
1
C490
0.01uF
20% 16V CERM 402
2
1
C442
0.01uF
20% 16V CERM 402
2
1
C530
0.01uF
20% 16V CERM 402
2
1
C408
0.1uF
20% 10V CERM 402
AE27
L1
A22
L2
B22
K1
A23
K2
B23
AC4
AB2
V4
U2
E2
G4
A3
C5
A10
C11
A15
C16
C26
B29
G27
G29
P1
D19
R4
A18
R3
A19
P4
B18
P2
C19
AK3
T28
E8 J6
AJ28
AG29
T27
AE29
AF28
AF30
AC28 AB29 AC27 AC30 AD27 AD30 AE28 AD29
AD28
AC29
AD24
AH30
AF29
AE30
AC22
AG30
R28
D8
B6
B7 C8
T30
AH29
AF27
U27
T29
Y25 Y27
AC11
AC10
W28 U29 R30 N27
K29
K30
AG28
U25
Y29
W29
M28
N29
N28 N30 M30 M27 M29 L28
AB30 AB27
L30
AA29 AB28 AA30 AA27
Y30
AA28
W30 W27 V30 V28
L27
V29 V27 U30 U28 R27 R29 P28 P30 P27 P29
L29 K28
U47
CRITICAL
M11-CSP64
64MB
BGA
OMIT
G30
N3
N4
N1
N2
M4
L3
M3
L4
K3
K4
J1
J2
H1
H2
B27
A27
D23
C23
D22
C20
D20
C21
D21
C22
A25
B25
A26
B26
AE4
AE3
AD4
AD3
AB4
AB3
AA4
AA3
AD2
AD1
AC2
AC1
AA2
AA1
Y2
Y1
Y4
Y3
W4
W3
U4
U3
T4
T3
W2
W1
V2
V1
T2
T1
R2
R1
G2
G1
F2
F1
D2
D1
C2
C1
J4
J3
H4
H3
F4
F3
E3
E4
B1
A1
B2
A2
B4
A4
B5
A5
D3
C3
D4
C4
D6
C6
D7
C7
A8
B8
A9
B9
A11
B11
A12
B12
C9
D9
C10
D10
C12
D12
C13
D13
A13
B13
A14
B14
A16
B16
A17
B17
C14
D14
C15
D15
C17
D17
C18
D18
C24
D24
C25
D25
C27
D27
C28
D28
B28
A28
A29
A30
C29
C30
D29
D30
E27
E28
F27
F28
H27
H28
J27
J28
E29
E30
F29
F30
H29
H30
J29
J30
AC3
AB1
V3
U1
E1
G3
B3
D5
B10
D11
B15
D16
D26
B30
G28
U47
CRITICAL
M11-CSP64
64MB
BGA
OMIT
R19
R18
R17
R16
T16
U16
V16
W16
T14
T13
T12
T15
R15
P15
N15
M15
B19
A21
P3
M2
P25
F18
AE15
U6
U47
CRITICAL
OMIT
M11-CSP64
64MB
BGA
2
1
C401
4.7uF
20%
6.3V CERM 805
2
1
C409
0.1uF
20% 10V
CERM
402
2
1
R315
287
1% MF
402
1/16W
14
81
7
G1
SM
CRITICAL
27MHZ
2
1
R304
NO STUFF
100K
5%
1/16W
MF
402
21
L16
FERR-EMI-100-OHM
SM
21
R305
GPU_SS
0
5%
1/16W
MF
402
2
1
R320
162
1%
1/16W
MF
402
+3V_SLEEP
2
1
C390
0.1uF
20% 10V CERM 402
GPU_SS
2
1
C384
GPU_SS
10uF
20%
6.3V 805
CERM
8
1
2
7
5
3 4
6
U30
GPU_SS
CRITICAL
CY25811
SOI
2
1
R297
GPU_SS
0
5% 1/16W MF 402
2
1
R289
NO STUFF
0
5%
1/16W
MF
402
2
1
R298
NO STUFF
0
5% 1/16W MF 402
2
1
R290
NO STUFF
402
MF
1/16W
5%
0
2
1
R285
GPU_SS
33
5% 1/16W MF 402
21
L66
GPU_SS
FERR-EMI-100-OHM
SM
+3V_SLEEP
21
R597
10
1%
1/16W
MF
402
EXT_TMDS
21
R192
EXT_TMDS
10
1%
1/16W
MF
402
21
R193
10
EXT_TMDS
1%
1/16W
MF
402
A
051-6680
4619
+1_5V_AGP
+3V_GPU
AGP_AD<14>
AGP_AD<15>
AGP_AD<16>
AGP_AD<17>
AGP_AD<18>
AGP_AD<19>
AGP_AD<20>
AGP_AD<22>
AGP_AD<23>
AGP_AD<11> AGP_AD<10>
AGP_CBE<2> AGP_CBE<1> AGP_CBE<0>
CLK66M_GPU_AGP AGP_FRAME_L
AGP_ATI_VREF
AGP_ATI_VREFG
AGP_WBF_L
AGP_ATI_RESET_L
AGP_GNT_L
AGP_REQ_L
AGP_AD<9>
AGP_AD<13>
AGP_AD<21>
AGP_AD<24>
AGP_AD<25>
AGP_AD<26>
AGP_AD<27>
AGP_AD<28>
AGP_AD<29>
AGP_AD<31>
GPU_VCORE
GPU_VCORE_VDDCI
ATI_DVO_CLKP
GPU_DVO_CLKP_R2
GPU_DVO_CLKP_R1
GPU_DVO_CLKP
AGP8X_DET_PU
INT_AGP_VREF
ATI_CLK27M_IN
ATI_CLK27M_OSC
AGP_AD_STB_L<0>
AGP_ST<0>
AGP_AD<30>
AGP_SBA<4>
AGP_BUSY_L
AGP_AD_STB<1>
ATI_SSCLK_UF
ATI_SSCLK_IN
AGP_AD<6>
AGP_AD<4>
GPU_MEM_IO
AGP_PAR
MAIN_RESET_L
+1_8V_GPU
+3V_GPU
+3V_GPU
GPU_VCORE_VDDCI
AGP_SB_STB_L
AGP_SB_STB
AGP_STP_L
AGP_RBF_L
AGP_SBA<5>
ATI_MEMTEST
GPU_THERM_DM
GPU_THERM_DP
GPU_MEM_IO
ATI_MEMVMODE1
ATI_MEMVMODE0
AGP_ATI_INT_L
AGP_STOP_L AGP_DEVSEL_L
AGP_IRDY_L AGP_TRDY_L
AGP_AD<0> AGP_CBE<3>
AGP_AD<1>
AGP_AD<3> AGP_AD<2>
AGP_AD<5>
AGP_AD<7>
AGP_AD<8>
AGP_AD<12>
AGP_AD_STB_L<1>
GPU_AGP_TEST
AGP_AD_STB<0>
AGP_ST<1>
AGP_SBA<6>
AGP_ST<2> AGP_SBA<7>
AGP_SBA<2> AGP_SBA<1>
ATI_DBI_LO_PU
ATI_RSTB_MSK
ATI_OSC_OE
+3V_GPU
AGP_SBA<0>
ATI_DBI_HI_PU
+3V_ATI_OSC_SLEEP
+1_5V_AGP
ATI_CLK27M_OSC_SS
CY25811_S1 CY25811_S0
+3V_ATI_SS
AGP_SBA<3>
AGP_SUS_STAT_L_PU
ATI_CLK27M_OSC_SS
40
41
40
22
31
22
21
40
26
40
40
40
21
19
22
20
40
22
22
22
19
16
21
41
40
18
22
21
21
40
21
16
15
19
39
39
39
39
39
39
39
39
39
39
39
39
39 39
37
39
39
39
39
39
39
39
39
39
39
39
39
39
40
40
38
38
38
40
37
39
39
39
39
37
39
39
22
39
17
21
19
19
40
39
39
39
39
22
39 39
39 39
39
39
39
39 39
39
39
39
39
39
39
39
39
39 39
19
39
15
37
39
37
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12 12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
21
19
21
20
20
12
21
37
12
12
12
12
12
12
37
21
12
12
19
12
14
20
12
12
19
12
12
12
12
27
27
19
14
12 12
12 12
12
12
12
12 12
12
12
12
12
12
12
12
12
12
12
12 12
12
12
40
12
19
40
12
19
D0 D1 D2
D4
D3
D5 D6 D7
D9
D8
D10
D12/DUAL
D11
D15
D13/MAST D14/SYNCO
D16 D17 D18
D20
D19
D22
D21
D23
HSYNC/SYNCI
VREF
VSYNC
IDCK-
IDCK+
DE
BSEL/SCL DSEL/SDA
ISEL/RST*
PD*
MSEN
DK1 DK3
EXT_SWING
EDGE/HTPLG
TX0+ TX0-
TX1-
TX1+
TX2+ TX2-
TXC+ TXC-
NC
GND
PGND1
AGND
PGND2
RSVD
PVCC2
AVCC
PVCC1
VCC
D0 D1 D2
D4
D3
D5 D6 D7
D9
D8
D10
D12/DUAL
D11
D15
D13/MAST D14/SYNCO
D16 D17 D18
D20
D19
D22
D21
D23
HSYNC/SYNCI
VREF
VSYNC
IDCK-
IDCK+
DE
BSEL/SCL DSEL/SDA
ISEL/RST*
PD*
MSEN
DK1 DK3
EXT_SWING
EDGE/HTPLG
TX0+ TX0-
TX1-
TX1+
TX2+ TX2-
TXC+ TXC-
NC
GND
PGND1
AGND
PGND2
RSVD
PVCC2
AVCC
PVCC1
VCC
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_5_ITEM
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
NC NC
INT/EXT TMDS D<0:2> TERMINATION
EXT TMDS D<3:5> TERMINATION
ATI INTERNAL TMDS
SERIES TERMINATION
SILICON IMAGE TMDS SERIES TERMINATION
INT/EXT TMDS
2
1
R867
EXT_TMDS
10K
5% 1/16W MF 402
5
3
3312
1
21
22
30
31
27
28
24
25
34
4918
4817
10
7
11
13
56
57
4
643516
19
9
14
6
8
2
52
53
54
55
58
59
60
36
37
38
39
61
40
41
42
43
44
45
46
47
50
51
62
63 15
2923
322620
U24
EXT_TMDS CRITICAL
TQFP
SIL178
21
R300
4.99K
NO STUFF
1%
1/16W
MF
402
21
R671
NO STUFF
4.99K
1%
1/16W
MF
402
2
1
C909
EXT_TMDS
0.1uF
20% 10V
CERM
402
31
D34
1N914
SOT23
NO STUFF
21
R675
0
5%
1/16W
MF 402
EXT_TMDS
21
R676
EXT_TMDS
0
5%
1/16W
MF
402
21
R769
EXT_TMDS
0
5%
1/16W
MF 402
21
R776
EXT_TMDS
0
1/16W
MF
402
5%
21
R780
EXT_TMDS
0
5%
1/16W
MF
402
21
R781
EXT_TMDS
0
5%
1/16W
MF
402
21
R782
EXT_TMDS
0
5%
1/16W
MF
402
21
R783
EXT_TMDS
0
5%
1/16W
MF
402
3
4
2
1
RP70
EXT_TMDS
0
1/16W
SM1
5%
3
4
2
1
RP61
EXT_TMDS
0
SM1
1/16W
5%
21
R828
0
EXT_TMDS
5%
1/16W
MF
402
3
4
2
1
RP72
EXT_TMDS
0
SM1
1/16W
5%
21
R869
357
EXT_TMDS
1%
1/16W
MF
402
21
R876
357
EXT_TMDS
1%
1/16W
MF 402
2 1
R765
INT_TMDS
0
5%
1/16W
MF
402
2 1
R767
INT_TMDS
0
5%
1/16W
MF
402
2 1
R760
INT_TMDS
0
5%
1/16W
MF
402
2 1
R762
INT_TMDS
0
5%
1/16W
MF
402
2 1
R764
INT_TMDS
0
5%
1/16W
MF
402
2 1
R766
INT_TMDS
0
5%
1/16W
MF
402
2 1
R761
INT_TMDS
0
5%
1/16W
MF
402
2 1
R763
INT_TMDS
0
5%
1/16W
MF
402
2 1
R377
INT_TMDS
49.9
1%
1/16W
MF
402
2 1
R374
402
MF
1/16W
1%
49.9
INT_TMDS
2
1
C536
0.001UF
10% 50V CERM 402
2 1
R369
INT_TMDS
75
1%
1/16W
MF
402
2 1
R355
INT_TMDS
75
1%
1/16W
MF
402
2 1
R340
INT_TMDS
75
1%
1/16W
MF
402
2 1
R367
INT_TMDS
75
1%
1/16W
MF
402
2
1
C515
0.001UF
50V CERM 402
10%
2 1
R362
INT_TMDS
75
1%
1/16W
MF
402
2
1
C487
0.001UF
10% 50V CERM 402
2 1
R350
402
MF
1/16W
1%
75
INT_TMDS
2
1
C479
0.001UF
10% 50V CERM 402
21
R850
EXT_TMDS
82.5
402
MF
1/16W
1%
21
R851
EXT_TMDS
82.5
1%
1/16W
MF
402
21
R852
EXT_TMDS
82.5
1%
1/16W
MF
402
21
R859
EXT_TMDS
82.5
1%
1/16W
MF
402
21
R858
EXT_TMDS
82.5
402
MF
1/16W
1%
21
R857
EXT_TMDS
82.5
1%
1/16W
MF
402
2
1
C889
EXT_TMDS
10uF
20%
6.3V CERM 805
21
R647
10K
EXT_TMDS
5%
1/16W
MF
402
2
1
C210
EXT_TMDS
100pF
5% 50V CERM 402
2
1
C887
EXT_TMDS
100pF
5% 50V CERM 402
2
1
C885
EXT_TMDS
100pF
5% 50V CERM 402
2
1
C913
EXT_TMDS
10uF
20%
6.3V CERM 805
2
1
C912
EXT_TMDS
10uF
20%
6.3V CERM 805
2
1
C911
EXT_TMDS
100pF
5% 50V CERM 402
2
1
C890
EXT_TMDS
100pF
5% 50V CERM 402
2
1
C910
EXT_TMDS
100pF
5% CERM
402
50V
2
1
C886
EXT_TMDS
402
CERM
50V
5%
100pF
2
1
C892
EXT_TMDS
10% 50V CERM 402
0.001UF
2
1
C891
EXT_TMDS
0.001UF
10% 50V CERM 402
2
1
C893
EXT_TMDS
0.001UF
10% 50V CERM 402
2
1
R596
402
MF
1/16W
5%
10K
EXT_TMDS
5
3
3312
1
21
22
30
31
27
28
24
25
34
4918
4817
10
7
11
13
56
57
4
643516
19
9
14
6
8
2
52
53
54
55
58
59
60
36
37
38
39
61
40
41
42
43
44
45
46
47
50
51
62
63 15
2923
322620
U25
EXT_TMDS CRITICAL
SIL178
TQFP
21
L86
EXT_TMDS
400-OHM-EMI
SM-1
+3V_SLEEP+3V_SLEEP
3
4
2
1
RP74
5%
EXT_TMDS
10K
1/16W
SM1
21
R223
10K
5%
1/16W
MF
402
EXT_TMDS
3
4
2
1
RP75
5%
10K
1/16W
SM1
EXT_TMDS
21
L50
EXT_TMDS
400-OHM-EMI
SM-1
21
L90
EXT_TMDS
400-OHM-EMI
SM-1
21
L91
EXT_TMDS
400-OHM-EMI
SM-1
+3V_SLEEP+3V_SLEEP
+3V_SLEEP+3V_SLEEP
21
L82
EXT_TMDS
400-OHM-EMI
SM-1
21
L84
EXT_TMDS
400-OHM-EMI
SM-1
21
R832
NO STUFF
10K
5%
1/16W
MF
402
2
1
C883
EXT_TMDS
5% 50V CERM 402
100pF
2
1
C870
EXT_TMDS
100pF
5% 50V CERM 402
2
1
C130
EXT_TMDS
100pF
5% 50V CERM 402
2
1
C836
EXT_TMDS
10uF
20%
6.3V CERM 805
2
1
C908
EXT_TMDS
100pF
402
CERM
50V
5%
2
1
C907
EXT_TMDS
100pF
5% 50V CERM 402
2
1
C882
EXT_TMDS
100pF
5% 50V CERM 402
2
1
C837
EXT_TMDS
100pF
5% 50V CERM 402
2
1
C906
EXT_TMDS
20%
6.3V CERM 805
10uF
2
1
C905
EXT_TMDS
10uF
20%
6.3V CERM 805
2
1
R871
402
MF
1/16W
1%
1K
EXT_TMDS
2
1
C497
0.1uF
EXT_TMDS
402
CERM
10V
20%
2
1
R872
1%
1K
402
MF
1/16W
EXT_TMDS
RES, MF, 1/16W, 75 OHM, 1%, 0402, SMD
114S7501
2
R374, R377
EXT_TMDS
051-6680
A
4620
RES, MF, 1/16W, 82.5 OHM, 1%, 0402, SMD
114S8251
6
R340, R350, R355, R362, R367, R369
EXT_TMDS
PP3V3_SI_VCC1
TMDS_CLKP
PP3V3_SI_PVCC2
MIN_LINE_WIDTH=15 MIL MIN_NECK_WIDTH=10 MIL
TMDS_D2_CMF
TMDS_D1_CMF
TMDS_D0_CMF
TMDS_DP<0>
TMDS_DN<1>
PP3V3_SI_VCC2
SI_TMDS_DN<1>
SI_TMDS_DP<1>
SI_TMDS_CLKP
SI_TMDS_CLKN
MIN_LINE_WIDTH=15 MIL MIN_NECK_WIDTH=10 MIL
PP3V3_SI_VCC2
SI_I2C_CLK SI_I2S_DATA
ATI_TMDS_DN<2>
ATI_TMDS_DP<2>
ATI_TMDS_CLKN
SI_TMDS_DP<4>
SI_TMDS_DP<3>
MASTER_SWING
SI_SECONDARY
SLAVE_SWING
MSEN_S
PP3V3_SI_AVCC2
PP3V3_SI_AVCC1
TMDS_DP<2> TMDS_DN<2>
ATI_DVOD<13>
TMDS_CLK_CMF
TMDS_DN<0>
TMDS_CLKN
MSEN_M
SI_RESET_L_R
SI_I2C_CLK
SI_I2S_DATA
TMDS_MASTER
SI_DUAL_MODE
PP3V3_SI_AVCC2
MIN_LINE_WIDTH=15 MIL MIN_NECK_WIDTH=10 MIL
ATI_TMDS_CLKP
TMDS_CLKP
TMDS_CLKN
TMDS_DP<2>
TMDS_DN<2>
TMDS_DP<1>
TMDS_DN<1>
ATI_TMDS_DP<1>
ATI_TMDS_DN<1>
ATI_TMDS_DN<0>
ATI_TMDS_DP<0>
TMDS_DP<0>
TMDS_DN<0>
TMDS_CLKN
TMDS_CLKP
SI_TMDS_DN<0>
TMDS_DN<0>
SI_TMDS_DP<0>
TMDS_DP<0>
TMDS_DP<1>
TMDS_DN<1>
SI_TMDS_DP<2>
TMDS_DP<2>
SI_TMDS_DN<2>
TMDS_DN<2>
SI_TMDS_DN<3>
TMDS_DN<3>
TMDS_DP<3>
SI_TMDS_DN<4>
TMDS_DN<4>
TMDS_DP<4>
SI_TMDS_DN<5>
SI_TMDS_DP<5>
TMDS_DN<5>
TMDS_DP<5>
ATI_DVOD<22>
SI_TMDS_DN<5>
MAIN_RESET_L
+1_8V_GPU
PP3V3_SI_AVCC1
MIN_LINE_WIDTH=15 MIL MIN_NECK_WIDTH=10 MIL
MIN_LINE_WIDTH=15 MIL MIN_NECK_WIDTH=10 MIL
PP3V3_SI_VCC1
SI_RESET_L
SI_RESET_L_R
SI_TMDS_DN<0>
SI_TMDS_DN<1>
ATI_DVO_VSYNC
TMDS_SYNC
SI_M_HTPLG
MASTER_SWING
SI_TMDS_DP<0>
SI_VREF ATI_DVO_HSYNC
SI_DUAL_MODE TMDS_MASTER
ATI_DVOD_DE
SI_VREF TMDS_SYNC
SI_TMDS_CLKP
ATI_DVOD<11>
GPU_DVO_CLKP_R1
ATI_DVOD<6>
ATI_DVOD<17>
SI_I2S_DATA
ATI_DVOD<20>
ATI_DVOD<12>
ATI_DVOD<14>
ATI_DVOD<16>
ATI_DVOD<21>
SI_SECONDARY
ATI_DVOD<23>
ATI_DVOD_DE
ATI_DVOD<1> ATI_DVOD<2>
ATI_DVOD<4>
ATI_DVOD<3>
ATI_DVOD<5>
ATI_DVOD<9>
ATI_DVOD<8>
ATI_DVOD<10>
SI_TMDS_DP<1>
SI_TMDS_DP<2>
SI_TMDS_CLKN
ATI_DVOD<0>
ATI_DVOD<7>
GPU_DVO_CLKP_R2
SI_TMDS_DN<2>
ATI_DVO_VSYNC
ATI_DVOD<19>
ATI_DVOD<18>
MSEN_M
SI_I2C_CLK
ATI_DVOD<15>
SI_RESET_L_R
PP3V3_SI_PVCC1
MIN_NECK_WIDTH=10 MIL
MIN_LINE_WIDTH=15 MIL
TMDS_DP<1>
MSEN_S
TMDS_DP<3>
SI_TMDS_DN<3>
SLAVE_SWING
SI_TMDS_DP<4>
SI_TMDS_DP<5>
SI_TMDS_DN<4>
SI_S_HTPLG
SI_TMDS_DP<3>
TMDS_DP<4>
TMDS_DP<5>
EXT_TMDS_D3_CMF
TMDS_DN<3>
EXT_TMDS_D4_CMF
EXT_TMDS_D5_CMF
TMDS_DN<5>
TMDS_DN<4>
41
31 26
41
41
41 41
41
41
41
41
41
41
41
41
41
41
41
41
41
19
40
41
39
39
39
39 39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
38
38
38
38
38
38
18
22
38
38 38
38
39
38
38
38
38
38
38
23
23
23
38
38
38
38
21
21
39
39
39
38
38
23 23
38
23
23
21
21
39 23
23
23
23
23
23
39
39
39
39 23
23
23
23
38 23
38 23
23
23
38 23
38 23
38 23
23
38 23
23
38
38
23
23
38
38
17
21
38
38
21
38
38
21
38
38
38
38
38
38
38
38
38
38
38
21
38 38
38
38
38
38
38
38
38
38
38
38
38
38
38
21
38
38
38
23
23
38
38
38
38
38
23
23
23
23
23
20
20
20
20
20
20
20
20
20
20
20
20
21
21
21
20
20
20
20
20
20
20
20
20 20
21
20
20
20
20
20
20
20
20
20
21 20
20
20
20
20
20
21
21
21
21 20
20
20
20
20 20
20 20
20
20
20 20
20 20
20 20
20
20 20
20
20
20
20
20
21
20
14
19
20
20
21
20
20
20
20
20
20
20
20 21
20 20
20
20
20
20
21
19
21
21
21
21
21
21
21
20
21
20
21 21
21
21
21
21
21
21
20
20
20
21
21
19
20
20
21
21
20
21
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
B00ST
SW
TG
EXT VCC VCC
INT
VIN
SGND PGND
RUN/SS
BG
VFB
ITH
ION
PGOOD
VRNG FCB
G
D
S
G
D
S
VDD15
VSS
RAGE_MOBILITY
(5 OF 6)
VDDC
ZV_LCDDATA11 ZV_LCDDATA12
VSS
VSS
VSS
VSS
VSS
(3 OF 6)
RAGE_MOBILITY
ZV_LCDDATA0 ZV_LCDDATA1
ROMCSB
SSIN
TESTEN
XTALOUT
SSOUT
TXCLK_LP
TXCLK_LN
TXOUT_L3P
XTALIN
TXCP
TX0P TX1M
TXCM
TX2M
TX1P
TX2P
TX0M
GPIO13 GPIO14
GPIO9
GPIO11
GPIO10
GPIO12
GPIO8
TXOUT_U1N
TXOUT_U0N TXOUT_U0P
TXOUT_U1P TXOUT_U2N
TXCLK_UP
TXOUT_U3N
TXOUT_L1P
TXOUT_L1N
TXOUT_L0P
TXOUT_L0N
TXOUT_U2P
TXCLK_UN
TXOUT_U3P
TXOUT_L2N TXOUT_L2P TXOUT_L3N
GPIO4
GPIO3
GPIO2
GPIO6 GPIO7
GPIO5
GPIO1
GPIO0
ZV_LCDCNTL3
ZV_LCDCNTL2
ZV_LCDDATA19
ZV_LCDDATA18
ZV_LCDDATA17
ZV_LCDDATA23
ZV_LCDDATA22
ZV_LCDCNTL1
ZV_LCDCNTL0
ZV_LCDDATA20 ZV_LCDDATA21
AUXWIN
COMP_B
DIGON
C_R
ZV_LCDDATA16
ZV_LCDDATA10
ZV_LCDDATA9
ZV_LCDDATA8
ZV_LCDDATA7
ZV_LCDDATA13 ZV_LCDDATA14 ZV_LCDDATA15
ZV_LCDDATA6
ZV_LCDDATA2 ZV_LCDDATA3 ZV_LCDDATA4 ZV_LCDDATA5
VSYNC
V2SYNC
HSYNC
H2SYNC
RSET
R2SET
Y_G
B
R G
GPIO15 GPIO16
BLON
DDC2DATA
DDC2CLK
DDC1DATA
DDC1CLK
DDC3DATA
DDC3CLK
HPD1
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
(500mA)
(NO ICT TEST) (NO ICT TEST)
GPU VCORE - 1.2V
(PUT ALL CAPs BELOW ATI ASIC)
M10 Power Shut down Sequencing
(GPIO0) (GPIO1) (GPIO2) (GPIO3) (GPIO4) (GPIO5) (GPIO6)
close to GPU
PLACE ALL TMDS 0 OHMS
GPU VCORE SUPPLY
WHEN VCORE_CNTL HIGH => 1.2V
1.2V = 0.8V * (1 + R329 / (R328//R330))
WHEN VCORE_CNTL LOW => 1.0V
1.0V = 0.8V * (1 + R329 / R330)
M11 CORE PWR/LVDS/TMDS
2
1
C440
0.22uF
20%
6.3V CERM 402
2
1
C484
10uF
20%
6.3V CERM 805
2
1
C485
10uF
20%
6.3V CERM 805
2
1
C441
0.22uF
20%
6.3V CERM 402
2
1
C445
0.22uF
20%
6.3V CERM 402
2
1
C446
0.22uF
20% CERM
6.3V 402
2
1
C449
0.22uF
20%
6.3V CERM 402
2
1
C434
20%
6.3V CERM 402
0.22uF
2
1
C452
0.22uF
20%
6.3V CERM 402
2
1
C451
0.22uF
20%
6.3V CERM 402
2
1
C494
0.22uF
20%
6.3V CERM 402
2
1
C498
0.22uF
20%
6.3V CERM 402
2
1
C509
0.22uF
20%
6.3V CERM 402
2
1
C510
0.22uF
20%
6.3V CERM 402
2
1
C512
0.22uF
20%
6.3V CERM 402
2
1
C513
0.22uF
20%
6.3V CERM 402
2
1
C524
0.22uF
20%
6.3V CERM 402
2
1
C525
0.22uF
20%
6.3V CERM 402
2
1
C528
0.22uF
20%
6.3V 402
CERM
2
1
C531
0.22uF
20%
6.3V CERM 402
2
1
C533
0.22uF
CERM 402
6.3V
20%
2
1
C477
0.22uF
20%
6.3V CERM 402
2
1
C486
402
CERM
6.3V
20%
0.22uF
2
1
C495
0.22uF
20%
6.3V CERM 402
2
1
C704
22uF
20% 10V CERM 1210
2
1
D29
SM
MBRS130LT3
3
1
D12
1N914
SOT23
2
1
C481
0.1uF
20% 25V
CERM
603
21
R358
2.2
5%
1/16W
MF
603
2
1
C431
0.1uF
20% 25V
CERM
603
2
1
R331
1
5% 1/16W MF 603
2
1
R326
576K
1% 1/16W MF 402
+5V_MAIN
2
1
R343
0
5% 1/16W MF 402
2
1
R330
20K
1%
1/16W
MF
402
2
1
C712
NO STUFF
0.1uF
20% 10V
CERM
402
21
R549
GPU_PWRMSR
10K
5%
1/16W
MF
402
21
XW6
OMIT SM
3
10
8
15 14
6
1
2
13
5
7
1149
16
12
U32
LTC1778
SSOP
CRITICAL
2
1
R344
402
MF
1/16W
5%
0
NO STUFF
2
1
C465
220pF
5% 25V CERM 402
2
1
C708
4.7uF
25V CERM 1206
20%
+PBUS
2
1
R327
1M
5% 1/16W MF 402
2
1
C480
0.1uF
20% 10V CERM 402
2
1
C455
10% 50V
CERM
402
470pF
2
1
R339
1% MF
1/16W
402
20K
2
1
R352
402
1/16W MF
1%
NO STUFF
63.4K
2
1
R353
0
5% 1/16W MF 402
2
1
R380
NO STUFF
10K
402
MF
1/16W
5%
2
1
C706
4.7uF
20%
25V CERM 1206
2
1
R556
100K
402
MF
1/16W
5%
2
1
R559
100K
5%
1/16W
MF
402
6 1
DP7
BAS16TW
SOT-363
2
3
1
Q51
2N3904
SM
2
3
1
Q52
2N3904
SM
2
1
R558
10K
5%
1/16W
MF
402
52
DP7
BAS16TW
SOT-363
43
DP7
BAS16TW
SOT-363
+5V_MAIN
2
1
R366
402
MF
1/16W
5%
10K
2
1
R368
10K
402
MF
1/16W
5%
2
1
R359
402
MF
1/16W
1%
75
2
1
R341
402
MF
1/16W
1%
75
2
1
R342
75
1% 1/16W MF 402
2
1
R346
75
1/16W MF 402
1%
2
1
R356
1% 1/16W
402
MF
75
2
1
R360
75
1% 1/16W MF 402
2
1
R333
499
1% 1/16W
402
MF
2
1
R332
402
MF
1/16W
1%
715
2
1
R387
10K
5% 1/16W MF 402
2
1
R396
NO STUFF
10K
5% 1/16W MF 402
2
1
R386
NO STUFF
10K
5% 1/16W MF 402
2
1
R382
NO STUFF
10K
5% 1/16W MF 402
2
1
R391
NO STUFF
5%
10K
1/16W MF 402
2
1
R383
NO STUFF
10K
5% 1/16W MF 402
2
1
R392
NO STUFF
10K
5%
402
MF
1/16W
2
1
R385
NO STUFF
10K
5% 1/16W MF 402
2
1
R394
NO STUFF
5% 1/16W
402
MF
10K
2
1
R384
10K
5% 1/16W MF 402
2
1
R393
NO STUFF
402
MF
5% 1/16W
10K
2
1
R381
NO STUFF
10K
5% 1/16W MF 402
2
1
R390
NO STUFF
10K
5% 1/16W MF 402
2
1
R395
NO STUFF
10K
5% 1/16W MF 402
2 1
R351
1K
5%
1/16W
MF
402
2
1
C411
10uF
20%
6.3V CERM 805
2
1
C482
0.01uF
20% 16V CERM 402
2
1
C435
0.01uF
20% 16V CERM 402
2
1
C443
0.01uF
20% 16V CERM 402
2
1
C448
0.01uF
20% 16V CERM 402
2
1
C526
0.01uF
20% 16V CERM 402
2
1
C529
0.01uF
20% 16V CERM 402
2
1
C532
0.01uF
20% 16V CERM 402
2
1
C505
0.01uF
20%
16V CERM 402
2
1
R329
4.99K
1%
1/16W
MF
402
2
1
R389
INT_TMDS
5%
1/16W
MF
402
10K
21
L17
FERR-220-OHM
0805
2
1
R357
100K
5% 1/16W MF 402
2
1
R555
33K
5%
1/16W
MF
402
4
36
5
2
1
Q23
CRITICAL
SI3446DV
TSOP
2
1
C407
1000pF
402
X7R
25V
10%
52
DP5
BAS16TW
SOT-363
43
DP5
BAS16TW
SOT-363
61
DP5
BAS16TW
SOT-363
+2_5V_SLEEP
21
XW11
SM
21
XW12
SM
21
XW5
SM
2
1
XW9
SM
21
XW4
SM
21
R378
1K
402
MF
1/16W
5%
2
1
R779
5% 1/16W MF 402
10K
4
5
3
Q25
2N7002DW
SOT-363
1
2
6
Q25
2N7002DW
SOT-363
2
1
R786
100K
5%
1/16W
MF
402
+5V_MAIN
321
4
8765
Q49
CRITICAL
IRF7832
SO-8
321
4
5
Q48
CRITICAL
SI7860DP
SO-8-PWRPK
2
1
C838
NO STUFF
0.001uF
20% 50V
402
CERM
2
1
R328
GPU_PWRMSR
18.2K
1% 1/16W MF 402
2
1
R361
402
MF
1/16W
1%
GPU_PWRMSR
1.82K
2
1
C846
GPU_PWRMSR
0.1uF
20% 10V
CERM
402
2
1
C705
CRITICAL
330uF
20%
6.3V TANT CASE-D4
2
1
C707
CRITICAL
330uF
20%
6.3V TANT
CASE-D4
2
1
C711
CRITICAL
330uF
20%
6.3V TANT
CASE-D4
2
1
R840
EXT_TMDS
10K
5% 1/16W MF 402
3
2
1
L64
CRITICAL
2.1uH-11A
SM
G16
G15
AD23
G14
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
G13
AD12
AD11
AD10
AD9
AD8
AD7
AC24
AC23
AC8
AC7
G12
AB24
AB7
AA24
AA7
Y24
Y7
W24
W7
V24
V7
G11
U24
U7
T24
T7
R24
R7
P24
P7
N24
N7
G10
M24
M7
L24
L7
K24
K7
J24
J7
H24
H23
G9
H8
H7
G24
G23
G22
G21
G20
G19
G18
G17
G8
G7
AD26
P6
H6
G6
F6
AF5
V25
W25
N25
M25
F25
AE24
F24
AH4
F23
AE18
AC25
AE17
AF15
W26
AF14
AE14
F14
F13
AG4
AE11
F11
AE10
F10
F7
AE6
AD6
AC6
W6
V6
AF25
AJ3
AB25
R25
G25
F17
AB6
T6
L6
F12
U47
CRITICAL
OMIT
M11-CSP64
64MB
BGA
AK7
AJ7
AH7
AG7
AK6
AJ6
AH6
AH11
AG11
AK10
AJ10
AG6
AH10
AG10
AK9
AJ9
AH9
AG9
AK8
AJ8
AH8
AG8
AK5
AJ5
AG5
AH5
AK4
AJ4
AK23
AJ30
AJ29
AG27
B21
A20
A24
B20
B24
AG25
AG22
AH22
AG20
AH20
AG19
AH19
AG18
AH18
AJ20
AK20
AJ18
AK18
AJ17
AK17
AJ16
AK16
AK12
AJ12
AG21
AH21
AJ19
AK19
AK15
AJ15
AK14
AJ14
AK13
AJ13
AH24
AJ25AJ26
AK25
AE5
AJ24
AK28
AG26
AF11
AG24
AF3
AG3
AH1
AF4
AJ1
AH2
AH3
AK1
M1
AE1
AE2
AF1
AG1
AF2
AG2
AK2
AJ2
AK27
AE13
AH26 AH25
AE12 AF12
AH28 AH27
AK22
AK24
AF13
AK26
AJ27
U47
CRITICAL
OMIT
M11-CSP64
64MB
BGA
2
1
C466
4.7UF
20% 10V CERM 1206
A
051-6680
4621
GPU_VCORE
HIGH_VCORE_DIVD
1778_VFB
ATI_GPIO12_SPN
GPU_VCORE_PWR_SEQ
GPU_VCORE_SEQ_L
FP_PWR_EN
GPU_Y
+3V_GPU
ATI_DVOD<0>
ATI_DVOD<2> ATI_DVOD<3>
+3V_GPU
ATI_DVOD<11>
ATI_DVOD<9> ATI_DVOD<10>
+3V_GPU
ATI_X1CLK_SKEW<1>
ATI_AGP_FBSKEW<1>
ATI_AGP_FBSKEW<0>
ATI_RSET
ATI_VSYNC
ATI_DVOD<8>
+1_8V_GPU
GPU_DVI_DDC_DATA
+1_8V_PVDD_NECK
+1_5V_AGP_NECK
1778_VCC
1778_SHDN_L
1778_ION
GPU_VCORE_SW
GPU_VCORE
ATI_BUS_CFG<1>
+1_8V_ATI_PVDD
ATI_R2SET
ATI_DVOD<14>
ATI_DVOD<16>
ATI_DVOD<19>
ATI_AGP_FBSKEW<0>
ATI_X1CLK_SKEW<0>
ATI_GPIO9_SPN
ATI_GPIO13_SPN
GPU_VCORE_CNTL_L ATI_SSCLK_IN
ATI_TMDS_DN<2> ATI_TMDS_DP<2> ATI_TMDS_CLKN
ATI_CLK27M_IN
ATI_DVOD<5>
ATI_TESTEN
CLKLVDS_LN
LVDS_L3P_TP
LVDS_L3N_TP
LVDS_L2P
LVDS_L2N
LVDS_L1P
LVDS_L1N
LVDS_DDC_CLK
LVDS_DDC_DATA
GPU_COMP
GPU_B
GPU_R
ATI_DVOD<20>
1778_BST_RC
1778_VIN
ATI_BUS_CFG<2>
ATI_BUS_CFG<0> ATI_BUS_CFG<1>
+1_5V_GPU_VDD15
ATI_TMDS_CLKP
+1_5V_AGP
GPU_DVI_DDC_CLK
ATI_DVO_VSYNC
LVDS_L0P
ATI_X1CLK_SKEW<1>
ATI_DVO_CLKP
ATI_DVO_HSYNC
ATI_DVOD<15>
ATI_DVOD_DE
ATI_TMDS_DP<0>
LVDS_L0N
ATI_X1CLK_SKEW<0>
ATI_DVOD<6>
ATI_DVOD<17>
GPU_HPD
GPU_VCORE
GPU_VCORE_NECK
+GPU_VDD15_NECK
CLKLVDS_LP
ATI_TMDS_DN<0>
+1_5V_AGP
1778_BG
+3V_GPU
DCDC_EN
GPU_VCORE_SEQ
+1_5V_AGP
1778_GND
GPU_CORE_OK
1778_VRNG
+GPU_VDD15_UF
GPU_VCORE_CNTL_L
HIGH_VCORE
1778_VFB
GPU_CORE_OK
GPU_C
INV_ON_PWM
ATI_AGP_FBSKEW<1>
ATI_HSYNC
SI_I2S_DATA
+2_5V_SLEEP_NECK1
SI_I2C_CLK
ATI_BUS_CFG<2>
ATI_BUS_CFG<0>
+GPU_VDD15_UF
SLEEP_L_LS5
GPU_VCORE_CNTL
GPU_VCORE_CNTL_RC
1778_TG
1778_BST
1778_GND
1778_FCB
1778_ITH
1778_ITH_RC
ATI_TMDS_DP<1>
ATI_TMDS_DN<1>
HPD_PWR_SNS_EN
ATI_GPIO11_SPN
ATI_GPIO10_SPN
ATI_GPIO8_PD
SI_RESET_L
ATI_DVOD<23>
ATI_DVOD<22>
ATI_DVOD<21>
ATI_DVOD<18>
ATI_DVOD<13>
ATI_DVOD<12>
ATI_DVOD<7>
AUXWIN_PU
ATI_DVOD<4>
GPU_G
ATI_DVOD<1>
40
40
40
22
22
22
40
40
40
21
21
40
21
36
22
22
22
40
41
19
41
19
22
19
35
41
21
21
21
22
40
41
41
41
41
41
16
41
41
40
41
16
21
35
16
41
34
40
19
38
38 38
19
38
38
38
19
38
20
21
40
38
38
37
39 39
39
37
38
39
39
39
39
39
41
41
38
38
38
39
15
38
39
38
38
38
39
39
38
38
21
39
39
15
19
34
15
40
22
40
40
22
40
28
40
39
39
38
38
38
38
38
38
38
38
38
40
21
23
23
12
20
20 20
12
20
20
20
12
21
21
21
23
20
19
23
40
40
40
40
40
19
21
22
20
20
21
21
21
19
20 20
20
19
20
23
23
23
23
23
23
23
23
23
23
20
40
40
21
21
21
40
20
12
23
20
23
21
19
20
20
20
23
21
20
20
23
19
40
40
23
20
12
40
12
30
12
21
21
40
21
21
21
21
23
23
21
23
20
40
20
21
21
21
18
40
40
21
40
40
40
20
20
23
20
20
20
20
20
20
20
20
23
20
CONT
NOISE
VIN
VOUT
GND
CONT
NOISE
VIN
VOUT
GND
VDDR4
VDDR3
TXVSSR1 TXVSSR2 TXVSSR3
TXVDDR2
TXVDDR1
TXVDDR0
TXVDDR3
MPVDD
TPVDD
LPVDD
LVDDR_18 LVDDR_18
VDDM
LVSSR3
LVSSR2
LVSSR1
LVSSR0
MPVSS
TPVSS
LPVSS
VDDP
VDDRH1
VDDRH0
A2VDDQ
AVDD0 AVDD1
PVDD
A2VDD1
A2VDD0
VDDR1
VSSRH1
VSSRH0
A2VSSN1
A2VSSN0
A2VSSQ AVSSN0 AVSSN1
AVSSQ
PVSS
RAGE_MOBILITY
(4 OF 6)
VDD1DI VDD2DI
VSS1DI VSS2DI
LVDDR_25 LVDDR_25
DVOVMODE
VDDR1
TABLE_5_ITEM
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
(180mA)
(350mA)
(40mA)
(20mA)
(1200mA)
(20mA)
(AVDD+VDDDI=75mA)
(140mA)
(2mA)
1.5V
1.8V
1.8V 2.5V
3.3V
GPU POWER SOURCES - 1.5V, 1.8V, 2.5V & 3.3V
(150mA MAX)
GPU PLL - 1.8V
(21mA)
(AVDD+VDDDI=75mA)
LVDS - 2.5V
3.3V IO SUPPLY
(Max Current varies, depends on usage)
1.8V DVO POWER (EXT.TMDS)
MEMORY I/O
(150mA MAX)
M11 POWER
LVDS PLL - 1.8V
MEMORY PLL - 1.8V
AGP 4X I/O - 1.5V
(1800mA)
MEMORY CORE - 2.5V
LVDS/TMDS - 1.8V
2
1
C488
0.1uF
20% 10V CERM 402
2
1
C456
0.1uF
20% 10V CERM 402
2
1
C421
0.1uF
20% 10V CERM 402
2
1
C544
0.1uF
20% CERM
10V 402
2
1
C545
0.1uF
20% 10V CERM 402
2
1
C551
10uF
20%
6.3V CERM 805
2
1
C546
0.1uF
20% 10V CERM 402
2
1
C422
10uF
20%
6.3V CERM 805
2
1
C424
0.1uF
20% 10V CERM 402
2
1
C417
0.01uF
20% 16V CERM 402
2
1
C547
0.1uF
20% 10V CERM 402
2
1
C540
0.1uF
20% 10V CERM 402
2
1
C437
0.1uF
20% 10V CERM 402
2
1
C436
0.1uF
20% 10V
402
CERM
2
1
C423
0.1uF
20% 10V CERM 402
2
1
C444
0.1uF
20% 10V CERM 402
2
1
C425
0.01uF
20% 16V CERM 402
2
1
C447
402
CERM
16V
20%
0.01uF
2
1
C438
0.1uF
20% 10V CERM 402
2
1
C439
0.01uF
20% 16V CERM 402
2
1
C517
0.1uF
20% 10V CERM 402
2
1
C543
0.1uF
20% 10V CERM 402
2
1
C541
0.1uF
20%
10V CERM 402
2
1
C542
0.01uF
20% 16V CERM 402
2
1
C483
10uF
20%
6.3V CERM 805
2
1
C419
0.1uF
20% 10V CERM 402
2
1
C420
0.01uF
20% 16V CERM 402
2
1
C475
0.1uF
20% 10V CERM 402
2
1
C504
0.01uF
20% 16V CERM 402
2
1
C538
0.01uF
20% 16V CERM 402
2
1
C539
0.1uF
20% 10V CERM 402
2
1
C470
0.1uF
10V CERM 402
20%
2
1
C471
0.01uF
20% 16V CERM 402
2
1
C489
0.1uF
20% 10V CERM 402
2
1
C496
0.1uF
20% 10V CERM 402
2
1
C506
0.01uF
20% 16V CERM 402
2
1
C492
0.1uF
20% 10V CERM 402
2
1
C501
0.01uF
20% 16V CERM 402
2
1
C450
20% 16V CERM 402
0.01uF
2
1
C453
0.01uF
16V
20%
CERM 402
2
1
C473
0.01uF
20% 16V CERM 402
2
1
C500
0.01uF
20% 16V CERM 402
2
1
C430
0.1uF
20% 10V CERM 402
2
1
C460
0.01uF
20% 16V CERM 402
2
1
C463
0.01uF
20% 16V CERM 402
2
1
C462
0.01uF
20% 16V CERM 402
2
1
C454
0.01uF
20% 16V CERM 402
2
1
C472
20% 16V CERM 402
0.01uF
2
1
C527
20% 16V CERM 402
0.01uF
+1_5V_SLEEP
2
1
R275
0
5% 1/10W FF 805
+2_5V_SLEEP
2
1
R319
805
FF
1/10W
5%
0
ATI_MEMIO_HI
+3V_SLEEP
2
1
R379
0
5%
805
FF
1/10W
+1_8V_SLEEP
2
1
R312
ATI_MEMIO_LO
0
5%
1/10W
FF
805
2
1
C468
0.01uF
20% 16V CERM 402
2
1
C523
0.01uF
20% 16V CERM 402
2
1
R363
0
805
FF
1/10W
5%
+1_8V_SLEEP
+2_5V_SLEEP
2
1
C413
0.01uF
20% 16V CERM 402
2
1
C464
10uF
20%
6.3V CERM 805
2
1
C478
10uF
20% CERM
6.3V 805
2
1
C461
0.01uF
16V
20% CERM
402
2
1
C459
10uF
6.3V
20% CERM
805
2
1
C511
10uF
20%
6.3V CERM 805
2
1
C427
10uF
20%
6.3V CERM 805
2
1
C493
10uF
20%
6.3V CERM 805
2
1
C537
10uF
20%
6.3V CERM 805
2
1
C499
10uF
6.3V CERM 805
20%
2
1
C414
0.1uF
20% 10V CERM 402
2
1
C418
10uF
20%
6.3V CERM 805
2
1
C514
10uF
20%
6.3V CERM 805
2
1
C491
0.1uF
CERM 402
20% 10V
21
L23
0402
FERR-220-OHM
21
L21
FERR-220-OHM
0402
21
L24
FERR-220-OHM
0402
21
L28
FERR-220-OHM
0402
21
L20
FERR-220-OHM
0402
21
L19
FERR-220-OHM
0402
21
L32
FERR-220-OHM
0402
21
L30
FERR-220-OHM
0402
21
L29
FERR-220-OHM
0402
2
1
C552
10uF
20%
6.3V CERM 805
21
L25
FERR-220-OHM
0805
21
L26
FERR-10-OHM-500MA
SM
21
L31
FERR-220-OHM
0805
21
L18
FERR-10-OHM-500MA
SM
51 4
2
3
U34
MM1571J SOT-25A
CRITICAL
2
1
C553
0.01uF
20% 16V CERM 402
2
1
C830
1uF
20% 10V
CERM
603
+2_5V_SLEEP
51 4
2
3
U60
MM1571J SOT-25A
CRITICAL
2
1
C833
1uF
20% 10V
CERM
603
2
1
C834
0.01uF
20% 16V CERM 402
2
1
C835
10uF
20%
6.3V CERM 805
21
L75
0402
FERR-220-OHM
2
1
C831
10uF
20%
6.3V CERM 805
2
1
C832
0.01uF
20% 16V CERM 402
2
1
R787
0
5% 1/16W MF 402
2
1
R788
0
5%
1/16W MF 402
2
1
C519
0.1uF
20% 10V CERM 402
2
1
C534
0.1uF
20% 10V CERM 402
2
1
C535
10uF
20%
6.3V CERM 805
2
1
C521
0.1uF
20% 10V CERM 402
2
1
C550
10uF
20%
6.3V CERM 805
2
1
C518
0.1uF
20% 10V CERM 402
2
1
C520
0.1uF
20% 10V CERM 402
2 1
L33
FERR-10-OHM-500MA
SM
21
L81
EXT_TMDS
FERR-10-OHM-500MA
SM
21
R842
EXT_TMDS
0
5%
1/16W
MF
402
2
1
C881
0.1uF
20% 10V CERM 402
2
1
C880
0.1uF
20% 10V CERM 402
2
1
C426
0.1uF
20% 10V CERM 402
2
1
R841
INT_TMDS
0
5%
1/16W
402
MF
2
1
R843
INT_TMDS
0
5% 1/16W
603
MF
M6
F20
AF19
AG23
AE8
AF7
AE7
AF6
AE25
AD25
AF10
AF9
AE9
AF8
AF26
AE26
R5
P5
N5
M5
L5
E25
E24
E23
E22
E21
E17
E16
K5
E15
E14
E11
E10
E9
H26
E7
J26
J25
H25
J5
F22
F21
F16
F15
F9
F8
AA6
Y6
R6
K6
H5
G26
AD5
AC5
AB5
AA5
Y5
W5
V5
U5
T5
G5
F5
N26
M26
L26
K26
AA25
K27
Y28
T25
AC26
AB26
AA26
Y26
V26
U26
T26
R26
P26
L25
K25
F26
E26
E20
E19
E18
E13
E12
E6
E5
AF20
AH23
AH15
AH14
AH13
AG15
AG14
AG13
AG12
AJ11AK11
AK30AK29
A6A7
AF18
AH17
AG17
AH16
AF17
AG16
AF16
AE16
AJ21AK21
AH12
AF22
AE23
AE22
AF24
AF23
AJ22
AE20
AE19
U47
OMIT
CRITICAL
M11-CSP64
64MB
BGA
+2_5V_SLEEP
+2_5V_SLEEP
+2_5V_SLEEP
+2_5V_SLEEP
1
338S0214
IC,ATI,M11-CSP128,GRAPHICTLR,667BGA,HYNIX GC
U47
CRITICAL
ATI_128MB
1
338S0207
IC,ATI,M11-CSP64,GRAPHICTLR,667BGA,HYNIX MEM
U47
CRITICAL ATI_64MB
A
051-6680
4622
+2_5V_GPU_PNLIO
+1_8V_GPU_AVDDQ
+2_5V_GPU_A2VDD
+2_5V_GPU_MEMCORE
+1_5V_AGP_GPU
GPU_MEM_IO_FLT
+1_8V_GPU_PNLPLL
+1_8V_GPU
+1_8V_GPU_AVDD
+1_8V_GPU_VDDDI
GPU_MEM_IO
+2_5V_GPU_MCLK
GPU_CORE_OK
+3V_GPU_FLT
+1_8V_GPU_DVO
+1_8V_GPU
+1_8V_ATI_PVDD
+1_8V_GPU_AVDDQ
+1_8V_GPU_VDDDI
GPU_MEM_IO
+1_8V_GPU_MEMPLL +1_8V_GPU_TP_PLL
+3V_GPU
1_8V_TPVDD_STD
+1_8V_ATI_TPVDD
1_8V_PVDD_STD
ATI_TPVDD_BYP
+1_8V_GPU_TP_PLL
GPU_CORE_OK
ATI_PVDD_BYP
+1_8V_ATI_PVDD
+1_8V_GPU
+1_8V_ATI_PVDD
+1_8V_GPU
ATI_DVOVMODE
GPU_MEM_IO
+1_8V_GPU
+1_8V_GPU
+1_5V_AGP
+1_8V_GPU_PLL
+2_5V_GPU_A2VDD
+1_8V_GPU_PNLIO
+1_5V_AGP
+1_8V_GPU
+3V_GPU
+2_5V_GPU_MCLK
40
40
22
22
40
40
40
40
40
40
40
21
21
40
40
22
22
22
22
22
22
22
19
19
22
22
21
40
21
40
40
21
40
21
40
21
40
21
21
16
16
21
21
40
40
20
40
22
40
22
20
22
40
40
22
40
19
40
22
22
20
22
20
22
20
20
15
40
15
20
19
40
40
22
22
40
40
40
40
19
40
22
19
22
21
40
19
21
22
22
19
40
22
12
40
22
21
21
19
21
19
19
19
19
12
40
22
40
12
19
12
22
G2
D2
S2
G1
S1
D1
G
SD
G
SD
G
SD
V-
V+
G
D
S
G
DS
MINIDIN
G
D
S
A
B
Y
32
32
SYM_VER-1
SYM_VER-1
LCFILTER
LCFILTER
LCFILTER
SYM_VER-1
SYM_VER-1
SYM_VER-1
SYM_VER-1
SYM_VER-1
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
INVERTER EXPECTS ACTIVE HIGH SIGNAL
(+5V_DDC SLEEP)
NC
NC
NC NC
NC
NC NC
NC
NC
Isolation required for DVI power switch
VGA SYNC BUFFERS
PLACE L1002 & L1003 CLOSE TO DVI CONNECTOR
TMDS FILTERING
PLACE CLOSE TO CONNECTOR
ANALOG FILTERING
PLACE CLOSE TO CONNECTOR
S-VIDEO/COMP OUT INTERFACE
Place GND shorts at graphics controller
Place GND shorts at graphics controller
Panel has 2K pull-ups
no-panel case (development)
100K pull-ups are for
(LVDS DDC POWER)
EXTERNAL VIDEO (DVI) INTERFACE
DVI DDC CURRENT LIMIT
(55mA requirement per DVI spec)
3V LEVEL SHIFTERS
PLACE NEAR 3, 11 & 19
PLACE NEAR C5A & C5B
LCD INTERFACE
LVDS INTERFACE
LCD POWER SWITCH
NOTE: Pulldown for DVI_HPD provided by DVI power switch interface
Power key detect path when system is shutdown or asleep.. DDC_CLK is isolated from
power key on remote device
NV17M DURING SHUTDOWN. WHEN is pressed, 5V will be driven
into DDC_CLK. Since host rails on, driving SOFT_PWR_ON_L low.
will be low, TP0610 will turn As host rails rise, TP0610
will turn off, as will remote device path into DDC_CLK. Isolation will be disabled as well.
DVI POWER SWITCH
Pulldown prevents has active, self-
powered DDC clock pullup.
3904 from turning on when DVI monitor
COMPARATOR ENABLED BY NV17MAP
HPD will be driven to 5V.
on remote device pressed,
3.3V. When power key
HPD normally driven to
when system is running.
Power key detect path
GPIO.
INVERTER INTERFACE
VIDEO CONNECTORS
+5V_MAIN
2
1
R750
100K
1/16W
5% MF
402
2
1
C816
0.001uF
20% 50V
CERM
402
CHGND3
2
1
C815
0.001uF
20% 50V CERM 402
2
1
C812
0.001uF
50V
20% CERM
402
2
1
C813
10uF
20%
6.3V CERM 805
12
L73
FERR-1K-OHM-EMI
SM
21
L72
400-OHM-EMI
SM-1
+PBUS
+3V_MAIN
2
1
C22
0.1uF
20% 10V
CERM
402
4
3 2
6
Q76
FDG6324L
SC70-6
1
5
6
Q76
SC70-6
FDG6324L
2
1
R474
10K
5% 1/16W MF 402
2
1
R480
10K
5% 1/16W MF 402
1
2
6
Q39
SOT-363
2N7002DW
+3V_SLEEP
4
5
3
Q39
2N7002DW
SOT-363
2
1
R481
402
MF
1/16W
5%
100K
2
1
C655
100pF
5% 25V CERM 201
2
1
R476
5%
4.7K
1/16W 402
MF
2
1
R478
4.7K
1/16W
5%
402
MF
2
1
C654
100pF
5% CERM
25V 201
2
1
C667
0.01uF
20% 50V
CERM
603
21
L42
400-OHM-EMI
SM-1
4
5
3
Q40
SOT-363
2N7002DW
21
F2
0.5AMP-13.2V
CRITICAL
SM
21
D19
SM
MBR0530
2
1
C653
100pF
5% 25V CERM 201
21
R475
10K
5%
1/16W
MF
402
2
1
C668
0.1uF
20% 10V CERM 402
2
1
R485
68.1K
1%
1/16W
MF
402
2
5
1
3
4
U42
LMC7211
SM
21
R472
10K
1% MF
1/16W
402
2
1
R484
100K
1%
1/16W
MF
402
2
1
R482
10K
1%
1/16W
MF
402
1
2
6
Q40
2N7002DW
SOT-363
2
1
R483
470K
5%
1/16W
MF
402
21
R460
10K
5%
1/16W
MF
402
2
1
R459
330
5%
1/16W
MF
402
2
1
3
Q38
SM
TP0610
2
1
C657
0.01uF
20% 50V
CERM
603
CHGND1
CHGND1
2
1
C656
560pF
10% 50V
402
CERM
21
L54
FERR-10-OHM-500MA
SM
21
L53
3.3uH
0603
21
L57
3.3uH
0603
2
1
C660
560pF
10% 50V
CERM
402
2
1
C658
560pF
10% 50V
CERM
402
2
1
C659
0.01uF
20% 50V
CERM
603
21
L55
3.3uH
0603
21
L56
FERR-10-OHM-500MA
SM
2
1
C663
560pF
10% 50V
CERM
402
2
1
C661
560pF
10% 50V
CERM
402
2
1
C664
560pF
10%
CERM
50V 402
+3V_SLEEP
+5V_SLEEP
21
XW15
SM
21
XW14
SM
21
R479
100
5%
1/16W
MF
402
21
R477
100
5%
1/16W
MF
402
21
R469
402
MF
1/16W
5%
100
4
3
2
1
6
5
J4
CRITICAL
SM-2MT
21
L74
400-OHM-EMI
SM-1
5
4 3 2 1
1110
98
J21
CRITICAL
RT-TH
MH11773-WMR8A
CHGND4
2
1
C548
0.001uF
20%
CERM
50V 402
2
1
R543
100K
5%
1/16W
MF
402
2
1
C701
0.001uF
20% 50V
CERM
402
CHGND4
+3V_SLEEP
2
1
R544
402
MF
1/16W
5%
100K
CHGND4
2 1
C549
402
CERM
50V
20%
0.001uF
CHGND4
2
1
C503
0.001uF
20% 50V
CERM
402
21
L27
SM
FERR-250-OHM
+3V_MAIN
21
C474
2200pF
5%
50V
CERM
603
4
3 6
5 2 1
Q29
SI3443DV
TSOP
21
R354
402
MF
1/16W
5%
100K
2
1
R347
402
MF
1/16W
5%
100K
2
1
3
Q28
2N7002
SM
2 1
R473
680
5%
1/16W
MF
402
CHGND1
CHGND3
21
C819
0.01uF
50V
20%
CERM
603
9
8
7
6
5
4
3
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
36
35
34
33
32
31
C5B C5A
C4
C3
C2
C1
J22
CRITICAL
QH1112
F-RT-TH
21
R753
0
5%
1/16W
MF
402
9
8
7
6
5
4
30
3
29
28
27
26
25
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
34
33
J14
CRITICAL
G-501973
F-RT-SM
4
5
3
2
1
U2
NC7S32
SC70
2
1
C702
NO STUFF
0.001uF
20% 50V
CERM
402
2
1
R470
330
5% MF
1/16W 402
21
L36
OMIT
FERR-60-OHM-0.1A
0402
21
L38
OMIT
FERR-60-OHM-0.1A
0402
+3V_MAIN
5
4
2
1
3
U40
74AHC1G32
SM
+3V_MAIN
5
4
2
1
3
U39
74AHC1G32
SM
2
1
L1
FERR-250-OHM
SM
2
1
C19
0.001uF
20% 50V CERM 402
CHGND2
CHGND1
CHGND2
2 1
R464
0
5%
1/16W
MF
402
2 1
R463
0
5%
1/16W
MF
402
1
6
2
Q35
MMDT3904
SOT-363
4
3
5
Q35
MMDT3904
SOT-363
4
32
1
L37
370-OHM
SM
4
32
1
L45
90-OHM-300mA
2012H
CRITICAL
2
1
C634
0.25% 50V
402
CERM
3.3pF
2
1
R456
75
NO STUFF
1/16W
1% 402
MF
2
1
R462
75
1% 1/16W MF 402
NO STUFF
2
1
R458
75
1/16W
1% MF
402
NO STUFF
2
1
C631
402
CERM
0.25% 50V
3.3pF
2
1
C641
402
CERM
50V
0.25%
3.3pF
43
21
FL1
CRITICAL
SM-220MHZ
43
21
FL2
CRITICAL
SM-220MHZ
43
21
FL3
CRITICAL
SM-220MHZ
4
32
1
L47
CRITICAL
90-OHM-300mA
2012H
4
32
1
L46
CRITICAL
90-OHM-300mA
2012H
4
32
1
L44
CRITICAL
90-OHM-300mA
2012H
EXT_TMDS
4
32
1
L49
CRITICAL
EXT_TMDS
2012H
90-OHM-300mA
4
32
1
L85
CRITICAL
EXT_TMDS
90-OHM-300mA
2012H
051-6680
A
4623
2
116S1331
DISCRETE,RES,33OHM,0402
L36,L38 VGA_BUFFER_RES
ATI_VSYNC
+5V_DDC_SLEEP
DVI_DDC_CLK_UF
DVI_DDC_DATA_UF
GPU_DVI_DDC_CLK
DDC_CLK_ISO
VGA_B
VGA_G
TV_GND1
TV_Y
TV_COMP
TV_C
INV_ON_PWM
BRIGHT_PWM
TMDS_DP<5>
TMDS_DP<4>
HPD_4V_REF
DVI_TURN_ON
DVI_TURN_ON_ILIM
GPU_C
GPU_Y
VGA_G
+5V_DDC_SLEEP_UF
TMDS_CONN_DP<0>
TMDS_CONN_DN<0>
TMDS_CONN_DP<5>
TMDS_DP<1>
GPU_TV_GND2
LCD_DIGON_L
VGA_VSYNC
TMDS_CONN_DP<1>
TMDS_CONN_DN<4>
DVI_HPD_UF
TMDS_CONN_DP<3>
VGA_VSYNC
TMDS_CONN_DN<1>
VGA_RVGA_B
VGA_HSYNC
DVI_TURN_ON_BASE
+14V_INV
BRIGHT_PWM_UF
LVDS_L2N
LVDS_L0N
LVDS_DDC_DATA
TMDS_DP<3>
+5V_DDC_SLEEP
DVI_HPD_DIV
HPD_REF_EN_L
CLKLVDS_LN
LCD_PWREN_L
DVI_HPD
+3V_LCD_SW
TMDS_CONN_DP<3>
TMDS_CONN_DN<3>
TMDS_DN<3>
SOFT_PWR_ON_L
TMDS_CONN_DN<5>
TMDS_CONN_CLKN
TMDS_CONN_CLKP
VGA_HSYNC
TMDS_CLKN
TMDS_CLKP
ATI_VSYNC_BUF
TMDS_DN<5>
TMDS_CONN_DN<5>
TMDS_CONN_DP<4>
GPU_HPD
+5V_INV_SW
TMDS_DN<4>
TMDS_CONN_DN<4>
HPD_PWR_SNS_EN
HPD_PWR_SW
HPD_PWR_SW_BASE
LVDS_DDC_CLK
LVDS_L2P
LVDS_DDC_DATA
+5V_INV_UF_SW
DVI_DDC_CLK_UF
LVDS_DDC_CLK
CLKLVDS_LP
LVDS_L1P
LVDS_L1N
ATI_HSYNC
ATI_HSYNC_BUF
INV_GND
FP_PWR_EN
DVI_DDC_CLK
GPU_B
GPU_R
LVDS_L0P
TMDS_DN<0>
TMDS_CONN_DP<5>
TMDS_CONN_CLKN
TMDS_CONN_DP<4>
TMDS_CONN_DN<2>
TMDS_DN<1>
FP_PWR_EN_L
FP_PWR_EN
GPU_G
TMDS_DP<0>
TMDS_DP<2>
TMDS_DN<2>
TMDS_CONN_DP<2>
TMDS_CONN_DP<1>
TMDS_CONN_DN<1>
TMDS_CONN_DN<2>
+3V_LCD
TMDS_CONN_DP<2>
TMDS_CONN_DN<3>
TMDS_CONN_CLKP
DVI_HPD_UF
GPU_COMP
TV_GND2
GPU_DVI_DDC_DATA
DVI_DDC_DATA
VGA_R
GPU_TV_GND1
41
41
41
41
41
41
41
41
35
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
40
41
41
41
41
38
38
41
38
39
41
38
38
41
38
41
38
41 41
41
41
39
39
23
38
40
39
38
38 38
31
38
38
38
41
39
39
38 38
38
41
38 38
23
39
23
41
23
39
39
39
23
38
38
39
39
38
38
38
38
39
23
38
39
39
39
38
38
38
38
41
38
38
38
41
41
41
21
23
23
41
21
23
23
40
41
41
41
21
41
20
20
21
21
23
40
38
38
23
20
40
23
23
23
23
23
23
23
23 23
23
40
21
21
21
20
23
21
40
23
23 20
24
23
23
23
23
20
20
20 23
23
21
40
20 23
21
21
21
21
40
23
21
21
21
21
21
41
21
21
21
21
20
23
23
23
23
20
21
21
20
20
20
23
23
23
23
40
23
23
23
23
21
40
21
23
40
G
D
S
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
NC
Connect caps, DZ1 to pin 6 via trace
LMU/RIGHT SENSOR CONNECTOR
LEFT LIGHT SENSOR CONNECTOR
DEBUG HELPERS
PLACE "POWER BUTTON" IN SILK NEAR RESISTOR
PLACE ON TOP SIDE NEAR FRONT EDGE OF BOARD
PLACE "PMU RESET" IN SILK NEAR RESISTOR
SLEEP LED
NOTE: KEEP FERRITE CLOSE TO CAP
KEYBOARD PULLUPS
USB Trackpad Connector
NC
KEYBOARD/TPAD/SLEEP LED
+3V_PMU
21
R569
100K
5%
1/16W
MF
402
9
8
7
6
4
3
2
1
10
5
RP42
10K
5%
1/32W
25V
SM
9
8
7
6
4
3
2
1
10
5
RP40
10K
5%
1/32W
25V
SM
+5V_MAIN
2
1
R611
402
MF
1/16W
5%
100
2
1
R616
402
MF
1/16W
5%
2.2K
21
R154
4.7K
5%
1/16W
MF
402
2
1
4
3
J8
CRITICAL
SM-2MT
2
3
1
Q58
2N3906
SM
2
1
L68
SM
400-OHM-EMI
2
1
C766
470pF
10% 50V
CERM
603
4
5
3
Q18
SOT-363
2N7002DW
+3V_MAIN
2
1
R173
10K
5%
1/16W
MF
402
1
2
6
Q18
2N7002DW
SOT-363
21
R185
NO STUFF
470K
5%
1/16W
MF
603
21
R190
NO STUFF
470K
5%
1/16W
MF
603
2
1
R138
402
MF
1/16W
5%
0
4
3
2
1
6
5
J2
SM-2MT
CRITICAL
5
13
42
U21
SOT23-5
74LVC1G125
CRITICAL
2
1
R198
100K
5%
1/16W
MF
402
+3V_MAIN
+3V_MAIN
2 1
R228
5%
1/16W
MF
402
NO STUFF
0
9
87
65
43
20
2
19
1817
1615
1413
1211
10
1
J19
CRITICAL
54102
F-ST-SM
2
1
R754
100K
5%
1/16W
MF
402
+3V_PMU
CHGND5
2
1
R789
0
5% 1/16W MF 402
2
1
R758
603
0
5% 1/16W MF
21
R577
0
603
MF
1/16W
5%
+5V_SLEEP
9
87
65
43
2
1615
1413
1211
10
1
J10
QT500166-L010
M-ST-SM1
CRITICAL
+3V_PMU
2 1
R163
402
5% MF
1/16W
22
2
1
C188
0.001uF
20% 50V
CERM
402
21
L11
400-OHM-EMI
SM-1
2
1
C220
0.001uF
20% 50V
CERM
402
21
L9
400-OHM-EMI
SM-1
2
1
C198
0.001uF
20% 50V
CERM
402
12
L8
400-OHM-EMI
SM-1
2
1
C199
0.001uF
402
CERM
50V
20%
3
2
1
D9
15V
NO STUFF
SOT23
+5V_MAIN
2
1
3
Q22
2N7002
SM
4
3 6
5 2 1
Q36
+5V_TPAD
SI3443DV
TSOP
+3V_MAIN
2
1
C698
0.001uF
20% 50V CERM 402
2
1
R672
100K
5%
1/16W
MF
402
2 1
R809
0
1/16W
402
MF
5%
21
R784
402
MF
1/16W
5%
470K
2
1
C507
20% 10V CERM 402
0.1UF
051-6680
A
46
24
+3V_MAIN_LMU
KBDLED_ANODE
+5V_SLEEP_LMU
KBD_ID
KBD_OPTION_L
KBD_SHIFT_L
3V_5V_OK_L
LID_CLOSED_L
KBDLED_RETURN
KBDLED_ANODE
PWR_BUTTON_L
INT_I2C_CLK1
PMU_LID_CLOSED_L
+3V_HALL_EFFECT
INT_I2C_DATA1
3V_5V_OK_G
3V_5V_OK
ST7_SLEEP_LED_H
KBD_FUNCTION_L
KBD_COMMAND_L
USB_TPAD_P USB_TPAD_N
+3V_SENSOR
KBD_CONTROL_L
KBD_X<8> KBD_X<9>
KBD_X<1>
KBD_X<0>
KBD_X<3> KBD_X<5> KBD_X<7> KBD_X<6>
PMU_SLEEP_LED
LMU_DETECT
KBDLED_RETURN
SLEEP
LUX_ALS_OUT +5V_SLEEP_LMU
PMU_LID_CLOSED_L
SLEEP_LED_DGND
SLEEP_LED_I
SLEEP_LED_UF
SLEEP_LED
PMU_SLEEP_LED
LUX_ALS_GAIN_SW
LMU_DETECT
ST7_SLEEP_LED_H
PMU_SLEEP_LED_L
+3V_MAIN
PMU_RESET_BUTTON_L
SOFT_PWR_ON_L
KBD_X<4>
KBD_X<2>
ST7_SLEEP_LED_H
SLEEP_LED_SW_L
LUX_ALS_GAIN_SW LUX_ALS_OUT
PWR_BUTTON_L
INT_I2C_DATA0
IO_RESET_L
INT_I2C_CLK0
ADT7467_THERM_L
+5V_TPAD_FB
SLEEP_LED_L
41
41
41
27
27
36
41
41
31
41
25
41
25
41
41
34
41
35
13
28
13
41
41
41
14
31
41
14
36
41
41
41
39
39
41
41 41
41
41
41 41
41
41
41
41
31
31
41
41
41
41
31
41
41
41
11
25
11
40
24
24
31
31
31
41
24
24
24
13
24
40
13
34
24
31
31
14
14
31
31 31
31
31
31 31
31
31
24
24
24
27
24
24
24
41
24
24
24
24
31
40
31
23
31
31
24
24
24
24
6
17
6
27
VDD
NC
RA7/OSC1/CLKI
RB4/SCK/SCL
RA3/AN3/VREF+ RA4/AN4/T0CKI
THM PADGND
RA5/MCLR*/VPP
RA1/AN1
RA0/AN0
RA2/AN2/VREF-
RA6/OSC2/CLKO
RB0/INT
RB1/SDI/SDA
RB3/CCP1/PGM
RB6/T1OSO/T1CKI/PGC
RB7/T1OSI/PGD
RB5/SS*
RB2/SDO/CCP1
GND
OUT
VIN+ VIN-
V+
THM
GND PAD
NC
FS
PWRDWN
SELFTEST
RSVD
VDD
VOUTY
VOUTZ
VOUTX
OUTPUTY
OUTPUTZ
DNC
RSVD
TEST
SELF
PS
PARITY
RSVD
RSVD
RSVD
GND PAD
THRML
OUTPUTX
VDD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC NC
NC
NC
NC NC NC NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
MMM
I2C Wr: 0xB0, Rd: 0xB1
BATTERY CURRENT SENSE
NC
MMM & BATTERY CURRENT SENSOR
NC
2
1
C696
MMM
20% 10V
CERM
402
0.1UF
2
1
C635
OMIT
0.0047UF
10% 25V CERM 402
2
1
R797
MMM
10K
402
MF
1/16W
5%
2
1
C632
MMM
0.1UF
20% 10V CERM 402
2
1
C522
MMM
0.1UF
20% 10V
CERM
402
5
3
19
17
29
16
15
13
12
10
9
8
7
21
20
1
28
27
26
24
23
25
22
18
14
11
6
4
2
U15
OMIT
CRITICAL
16F818
QFN
MMM_PIC_SIRQ_L
MMM_PIC_FFIRQ_L
2
1
R796
MMM
10K
5%
1/16W
MF
402
21
R795
MMM
0
5%
1/16W
MF
402
21
R800
MMM
0
5%
1/16W
MF
402
2
1
C821
10UF
20% 4V X5R 603
21
R812
49.9K
1%
1/16W
MF
402
+BATT
21
XW37
OMIT
SM
43
5 1
2
U41
SOT23-5
CRITICAL
INA138
2
1
R811
150K
1%
1/16W
MF
402
21
XW36
OMIT
SM
21
R810
0.010
1% 1W MF
2512
21
XW35
OMIT
SM
21
R799
MMM
402
MF
1/16W
5%
0
2
1
C820
0.1UF
20% 10V CERM 402
+3V_SLEEP
2
1
R794
KIONIX_ACCEL
10K
402
MF
1/16W
5%
2
1
R822
NO STUFF
10K
5%
1/16W
MF
402
2
1
R823
NO STUFF
402
MF
1/16W
5%
10K
2
1
C643
KIONIX_ACCEL
0.1UF
20% 10V
CERM
402
21
R818
MMM
0
5%
402
1/16W
MF
21
R785
MMM
5%
1/16W
MF
402
0
+3V_MAIN
+3V_PMU
21
R793
NO STUFF
5%
1/16W
MF
402
0
+BATT_ISNS
2
1
C823
ST_ACCEL
0.1UF
402
CERM
10V
20%
2
1
R805
NO STUFF
402
MF
1/16W
5%
10K
2
1
R824
ST_ACCEL
10K
402
MF
1/16W
5%
15
6
8
5
45
7
28
27
26
23
22
20
18
17
14
9
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
3
29
25
24
21
2
19
13
12
11
10
1
4
16
U58
LIS3L02AQ
QFN
ST_ACCEL
2
1
R827
ST_ACCEL
10K
5%
1/16W
MF
402
8
15
10
11
7
6
4
9
5
14
13
2
12
3
1
U20
KXM52-2050
QFN
2
1
R813
MMM
10K
5% 1/16W MF 402
2
1
R820
KIONIX_ACCEL
5%
MF
402
1/16W
10K
2
1
C642
OMIT
0.0047UF
10% 25V CERM 402
2
1
C636
OMIT
0.0047UF
25V
10% CERM
402
CAP CER .0015UF, 10%, 25V, X7R, 0402, SMD
ST_ACCEL
3
132S0072
C635, C636, C642
IC,UCTLR,MMM,PIC16F818,SMD, W/PROGRAM
CRITICAL
MMM
1
341S1630
U15
KIONIX_ACCEL
CAP CER .0047UF, 10%, 25V, X7R, 0402, SMD
3
132S4733
C635, C636, C642
A051-6680
25 46
MIN_NECK_WIDTH=10MIL
MIN_LINE_WIDTH=25MIL
PP3V3_MMM
VOLTAGE=3.3V MIN_LINE_WIDTH=0.25 MIL MIN_NECK_WIDTH=0.2 MIL
MMM_ACC_DETECT
MMM_ACC_PWRDOWN
PP3V3_MMM
MMM_ACC_X_AXIS MMM_ACC_Y_AXIS
MMM_PIC_AN2_PD MMM_PIC_AN3_PU
MMM_ACC_Z_AXIS
MMM_RESET_L
PP3V3_MMM_PIC
VOLTAGE=3.3V MIN_LINE_WIDTH=0.25 MIL MIN_NECK_WIDTH=0.2 MIL
MMM_ACC_Z_AXIS
MMM_ACC_SELFTEST
MMM_ACC_PWRDOWN
MMM_ACC_SELFTEST
TP_MMM_ICSP_PGM
INT_I2C_CLK1
MMM_PIC_AAC_PWRDOWN
PP3V3_MMM_PIC
MMM_ACC_Y_AXIS
MMM_ACC_X_AXIS
+PPBATT_ISNS_N
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
SYS_BATT_ISNS
TP_MMM_ICSP_PGD
MMM_ACC_SELFTEST
MMM_ACC_PWRDOWN
MMM_FFIRQ_L
MMM_SIRQ_L
IO_RESET_L
TP_MMM_ICSP_PGC
MMM_RESET_L
BATT_ISNS_OUT
BATT_ISNS_R
MIN_LINE_WIDTH=25MIL MIN_NECK_WIDTH=10MIL
+BATT_ISNS_P
MMM_ACC_DETECT
INT_I2C_DATA1
MMM_ACC_Y_AXIS MMM_ACC_Z_AXIS
MMM_ACC_X_AXIS
41
41
27
31
27
24
28
24
41
41
41
41
41
41
14
41
41
41
24
14
41
41
41
25
25
25
25
25
25
25
25
25
25
25
25
25
13
25
25
25
41
31
25
25
14
14
17
25
41
25
13
25
25
25
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
INTERNAL I/O CONNECTORS
+5V_HD_SLEEP AND +3V_SLEEP
ANY SEQUENCING REQUIREMENT BETWEEN
HARD DRIVE INTERFACE (UATA100)
IOCHRDY - UATA100 REQUIRES PULL-UP TO 3.3V
PLACE PULLUP RESISTORS CLOSE TO INTREPID
PLACE SERIES R CLOSE TO INTERPID
NC
OPTICAL DRIVE INTERFACE (EIDE)
WIRELESS INTERFACE
PLACE TERMINATORS NEAR INTREPID
EIDE SERIES TERMINATION
NC
NC
NC
NC NC
NC
2
1
R203
402
MF
1/16W
5%
10K
21
R199
402
MF
1/16W
5%
33
2
1
R196
402
MF
1/16W
5%
10K
21
R215
5%
1/16W
MF
402
22
21
R200
402
MF
1/16W
5%
22
21
R229
MF
402
1/16W
5%
22
12
R214
402
MF
1/16W
5%
33
+5V_SLEEP
2
1
R546
402
1/16W MF
5%
10K
NO STUFF
2
1
R540
402
MF
1/16W
5%
10K
2
1
R542
10K
5% 1/16W MF 402
2
1
R541
402
MF
1/16W
5%
100K
NO STUFF
2
1
R545
20K
5%
1/16W
MF
402
2
1
R234
402
MF
1/16W
5%
10K
21
R268
MF
402
1/16W
5%
22
21
R251
402
MF
1/16W
5%
82
21
R217
402
MF
1/16W
5%
82
2
1
R213
402
MF
1/16W
5%
10K
21
R262
402
MF
1/16W
5%
22
21
R237
MF
402
1/16W
5%
82
21
R238
MF
402
1/16W
5%
22
21
R266
402
MF
1/16W
5%
33
21
R242
402
MF
1/16W
5%
33
+3V_SLEEP
2
1
R204
5%
1/16W
MF
402
10K
21
R216
402
MF
1/16W
5%
82
2
1
C284
402
CERM
50V
5%
10pF
54
RP19
SM1
1/16W
5%
33
72
RP18
SM1
1/16W
5%
33
81
RP18
SM1
1/16W
5%
33
54
RP18
SM1
1/16W
5%
33
63
RP18
SM1
1/16W
5%
33
72
RP19
SM1
1/16W
5%
33
63
RP19
SM1
1/16W
5%
33
81
RP19
SM1
1/16W
5%
33
72
RP21
SM1
1/16W
5%
33
63
RP23
33
5%
1/16W
SM1
81
RP21
SM1
1/16W
5%
33
63
RP21
1/16W
SM1
5%
33
72
RP23
SM1
1/16W
5%
33
72
RP25
SM1
1/16W
5%
33
54
RP25
SM1
33
5%
1/16W
81
RP25
SM1
1/16W
5%
33
54
RP23
SM1
1/16W
5%
33
63
RP25
SM1
1/16W
5%
33
54
RP21
33
5%
1/16W
SM1
81
RP23
33
5%
1/16W
SM1
81
RP26
SM1
1/16W
5%
33
72
RP26
SM1
1/16W
5%
33
72
RP24
SM1
1/16W
5%
33
54
RP27
SM1
1/16W
5%
33
72
RP30
SM1
1/16W
5%
33
63
RP30
SM1
1/16W
5%
33
81
RP27
SM1
1/16W
5%
33
54
RP30
SM1
1/16W
5%
33
54
RP28
SM1
1/16W
5%
33
81
RP28
SM1
1/16W
5%
33
63
RP28
SM1
1/16W
5%
33
72
RP28
SM1
1/16W
5%
33
1
2
R737
22
5% 1/16W MF 402
+3V_SLEEP
2
1
R573
402
MF
1/16W
5%
0
3V_HD_LOGIC
2
1
R570
402
MF
1/16W
5%
0
5V_HD_LOGIC
81
RP24
SM1
1/16W
5%
33
63
RP24
33
SM1
1/16W
5%
54
RP24
33
SM1
1/16W
5%
63
RP26
SM1
1/16W
5%
33
54
RP26
SM1
1/16W
5%
33
81
RP30
SM1
1/16W
5%
33
63
RP27
SM1
1/16W
5%
33
72
RP27
SM1
1/16W
5%
33
2
1
R739
5%
1/16W
MF
402
10K
NO STUFF
2
1
R747
5%
402
MF
1/16W
10K
2
1
C808
100pF
5%
50V
CERM
402
NO STUFF
2
1
C805
402
CERM
50V
5%
100pF
NO STUFF
+3V_SLEEP
9
84
83 82
81
80879
78 77
76 75
74 73
72 71
70769
68 67
66 65
64 63
62 61
60659
58 57
56 55
54 53
52 51
50549
48 47
46 45
44 43
42 41
40439
38 37
36 35
34 33
32 31
30329
28 27
26 25
24 23
22 21
20219
18 17
16 15
14 13
12 11
10
1
J6
F-ST-SM1
QT510806-L111
CRITICAL
9
8
7
6
50
5
49 48 47 46 45 44 43 42 41 40
4
39 38 37 36 35 34 33 32 31 30
3
29 28 27 2625
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
J12
M-SM
CRITICAL
9
8
7
6
50
5
49 48 47 46 45 44 43 42 41 40
4
39 38 37 36 35 34 33 32 31 30
3
29 28 27 2625
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
J13
M-SM
CRITICAL
2
1
R759
805
FF
1/10W
5%
0
+5V_SLEEP
2
1
R579
402
MF
1/16W
5%
20K
2
1
R578
10K
5% 1/16W MF 402
26 46
A
051-6680
MAIN_RESET_L RF_DISABLE_L
PCI_AD<29>
PCI_AD<31>
AIRPORT_IDSEL
PCI_AD<22>
PCI_AD<23>
AIRPORT_PCI_REQ_L
CLK33M_AIRPORT
PMU_PME_L
AIRPORT_PCI_INT_L
AIRPORT_PCI_GNT_L
UIDE_DATA<1>
UIDE_DATA<3>
UIDE_DATA<11>
HD_DATA<1>
HD_DATA<3>
HD_DATA<2>
HD_DATA<2>
HD_DATA<0>
HD_DMARQ HD_DIOR_L
HD_DMACK_L HD_ADDR<1>
HD_ADDR<0> HD_CS0_L
HD_CS0_L
EIDE_OPTICAL_DATA<10>
+5V_SLEEP_OPT
EIDE_OPTICAL_RST_L
EIDE_OPTICAL_DATA<0>
EIDE_OPTICAL_DATA<13>
EIDE_OPTICAL_DATA<7>
EIDE_OPTICAL_IOCHRDY
EIDE_OPTICAL_WR_L
EIDE_OPTICAL_INT EIDE_OPTICAL_ADDR<1> EIDE_OPTICAL_ADDR<0>
EIDE_OPTICAL_DMA_RQ
EIDE_OPTICAL_ADDR<2>
EIDE_OPTICAL_READ_L
EIDE_OPTICAL_DATA<13>
EIDE_OPTICAL_DMAACK_L
EIDE_OPTICAL_DATA<10>
UIDE_ADDR<1>
UIDE_DATA<14>
PCI_AD<17>
PCI_CBE<2> PCI_IRDY_L
PCI_AD<11>
UIDE_ADDR<2>
UIDE_DATA<13>
EIDE_OPTICAL_DATA<11>
EIDE_OPTICAL_DATA<15>
EIDE_OPTICAL_DATA<12>
EIDE_OPTICAL_DATA<11>
EIDE_OPTICAL_CS0_L
EIDE_OPTICAL_DATA<0>
EIDE_OPTICAL_DATA<1>
EIDE_OPTICAL_DATA<2>
EIDE_OPTICAL_DATA<3>
EIDE_OPTICAL_DATA<4>
EIDE_OPTICAL_DATA<5>
EIDE_OPTICAL_DATA<6>
EIDE_OPTICAL_CS1_L
EIDE_OPTICAL_DATA<14>
EIDE_OPTICAL_DATA<9>
EIDE_OPTICAL_DATA<8>
HD_CS1_L
HD_ADDR<2>
HD_INTRQ
HD_IOCHRDY
HD_DIOW_L
HD_DATA<15>
HD_DATA<14>
HD_DATA<13>
HD_DATA<12>
HD_DATA<11>
HD_DATA<10>
HD_DATA<8>
HD_DATA<1>
HD_DATA<3>
PCI_FRAME_L
PCI_TRDY_L PCI_STOP_L
PCI_DEVSEL_L
PCI_AD<15> PCI_AD<13>
PCI_CBE<0>
PCI_AD<4>
EIDE_OPTICAL_DATA<7>
EIDE_OPTICAL_DATA<3>
EIDE_OPTICAL_DATA<6>
PCI_AD<18>
PCI_PAR
PCI_AD<20>
PCI_AD<16>
PCI_AD<21> PCI_AD<19>
UIDE_IOCHRDY
UIDE_DIOW_L
HD_DIOR_L
HD_DATA<10>
UIDE_CS0_L
EIDE_OPTICAL_DATA<15>
EIDE_OPTICAL_DATA<12>
PCI_CBE<3>
PCI_AD<30>
PCI_AD<26> PCI_AD<24>
PCI_AD<27>
EIDE_OPTICAL_DATA<8>
EIDE_ADDR<0>
EIDE_ADDR<2>
EIDE_CS0_L
EIDE_DATA<15>
EIDE_DATA<14>
EIDE_DATA<11>
EIDE_DATA<10>
EIDE_DATA<12>
EIDE_DATA<9>
EIDE_DATA<8>
HD_CS1_L
UIDE_CS1_L
HD_DMACK_L
HD_DIOW_L
UIDE_DIOR_L
UIDE_DATA<12>
UIDE_DATA<10>
UIDE_DATA<8>
UIDE_DATA<9>
UIDE_DATA<5>
HD_DATA<7>
HD_DATA<4>
HD_ADDR<0>
HD_DATA<13>
HD_ADDR<1>
HD_ADDR<2>
HD_DATA<15>
HD_DATA<12>
HD_DATA<6>
HD_DATA<9>
HD_DATA<14>
HD_DATA<5>
HD_DATA<0>
HD_DATA<11>
EIDE_OPTICAL_ADDR<0>
EIDE_OPTICAL_ADDR<1>
EIDE_OPTICAL_ADDR<2>
EIDE_OPTICAL_CS0_L
EIDE_OPTICAL_DATA<14>
EIDE_OPTICAL_DATA<9>
EIDE_DATA<13>
EIDE_DATA<2>
EIDE_OPTICAL_DATA<2>
EIDE_DATA<1>
EIDE_OPTICAL_DATA<1>
EIDE_DATA<0>
EIDE_DATA<6>
EIDE_DATA<3>
EIDE_DATA<4>
EIDE_OPTICAL_DATA<4>
EIDE_DATA<5>
EIDE_OPTICAL_DATA<5>
EIDE_OPTICAL_CS1_L
EIDE_CS1_L
EIDE_DMARQ
EIDE_RD_L
EIDE_DMACK_L
EIDE_IOCHRDY
EIDE_OPTICAL_RST_L
EIDE_RST_L
EIDE_OPTICAL_WR_L
EIDE_WR_L
EIDE_OPTICAL_INTEIDE_INT
EIDE_DATA<7>
EIDE_OPTICAL_IOCHRDY
EIDE_OPTICAL_DMA_RQ
EIDE_OPTICAL_DMAACK_L
EIDE_OPTICAL_READ_L
HD_IOCHRDY
HD_RESET_L
UIDE_DATA<15>
PCI_AD<7>
ROM_ONBOARD_CS_TP_L
PCI_AD<2>
PCI_AD<6>
ROM_OE_TP_L
PCI_AD<9>
PCI_AD<0>
PCI_AD<10>
AIRPORT_CLKRUN_L
PCI_AD<25>
PCI_CBE<1> PCI_AD<14>
PCI_AD<12>
ROM_RW_TP_L PCI_AD<8>
PCI_AD<5>
PCI_AD<3>
ROM_CS_TP_L
PCI_AD<1>
UIDE_ADDR<0>
EIDE_ADDR<1>
UIDE_DATA<2>
UIDE_DMACK_L
UIDE_RST_L
HD_DATA<8>
UIDE_DATA<6>
UIDE_DATA<4>
PCI_AD<28>
UIDE_DATA<7>
PCI_AD<18>
UIDE_DATA<0>
HD_DATA<7> HD_DATA<6>
HD_DATA<5> HD_DATA<4>
HD_DATA<9>
HD_RESET_L
+HD_LOGIC_SLEEP
+5V_HD_SLEEP
41
41
41
31
41
41
41
41 41
41
39
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
39
20
39
41
41
39
41
39
41 41
41 41
39 39
39
26
41
39
39
41
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
26
19
18
39
39
41
18
39
39
18
39 39
39 39
18 18
39
18
18
39
18
18
39
18
39
18
18
18
18
18
18
18
18
18
18
18
39
18
18
18
18
18
18
18
18
18
17
18
18
41
31
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
17
18
18
17
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
18 18
18 18
17 17
18
17
41
41
41
17
18
17
17
18
17
41
41
18
17
17
17
17
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41
17
17
17
17
17
17
17
18
17
17
17
17
17
17
17
17
17
12
17
17
37
17
41
41
39
39
39
39
39
39
39
39
39 39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
12
17
17
12
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
17 17
17 17
12 12
17
12
39
39
39
12
17
12
12
17
12
39
39
39
39
39
39
39
17
12
12
12
12
39
39
39
39
39
39
39
39
39
39
39
39 39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39 39
39 39
39
39
39
39 39
39 39
39 39
39
39
39
39
39 39
39 39
39 39
39
39
39
39
39
39
39
39
12
12
12
12
12
12
12
17
12
12
12
12
12
12
39
39
39
39
39
39
39
39
12
39
12
39
39
39
39 39
39
39
40
14 41
9
12
12
12
14
14
12
13
13
13
26
26
26
26
26
13 26
26
26
26
26
26
26
40
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
13
13
9
12
12
9
13
13
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
13
26
26
26
26
26
26
26
26
26
26
26
12 12
12 12
9 9
12
9
26
26
26
9
12
9
9
12
9
13
13
26
26
13
26
26
12
9
9
9
9
26
13
13
13
13
13
13
13
13
13
13
26 13
26
26
13
13
13
13
13
13
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
13
13 26
13 26
13
13
13
13 26
13 26
26 13
13
13
13
13
26 13
26 13
26 13
13
26
26
26
26
26
26
13
9
9
9
9
9
9
9
9
41
9
12
9
9
9
9
9
9
9
9
13
13
13
13
13
26
13
13
9
13
9
13
26
26
26 26
26
26
40
34
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
VER 1
VCCP
TACH3
THERM#/
SMBALERT#/GPIO
D1-
D1+
D2-
D2+
SCL
VCC
XTO
TACH1
SMBALERT#
TACH2
TACH4/
PWM2/
PWM1/
GND
SDA
PWM3
TABLE_5_ITEM
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
FAN CONTROLLER
FAN INTERFACE
SERIAL DEBUG INTERFACE
PLACE NEAR CONNECTOR PINS 1
LEFT I/O & AUDIO BOARD (LIO)
Place it near J3
PLACE CLOSE TO CPU
MAIN1
PLACE IN BETWEEN 3/5/1.5/2.5V PWR SUPPLY
MAIN2
PLACE UNDERNEATH UPPER RAM
ALTERNATE1
PLACE CLOSE TO BATTERY CHARGER/VCORE
ALTERNATE2
KEEP STUFFING RESISTORS CLOSE TO ADT7460 CONTROLLER
KEEP STUFFING RESISTORS CLOSE TO ADT7460 CONTROLLER
PREVENTS POWER-ON POP AND
GENERATES ACTIVE HIGH SPKR MUTE
PREVENTS POWER-ON POP AND PROPAGATES ACTIVE LOW HP MUTE
SOFT MODEM CONN
RIGHT USB BOARD
CPU FAN
GPU FAN
FAN/MODEM/SOUND/BACKUP BATT.
2
1
C763
402
CERM
10V
20%
0.1uF
2
1
R749
10K
5%
1/16W
MF
402
+5V_SLEEP
2
3
1
Q59
2N3904
SM
2
3
1
Q46
2N3904
SM
2
1
R454
10K
5% 1/16W MF 402
2
3
1
Q67
2N3904
SM
2
3
1
Q61
2N3904
SM
21
R686
0
5%
1/16W
MF
402
21
R687
0
5%
1/16W
MF
402
21
R703
402
MF
1/16W
5%
0
21
R704
0
5%
1/16W
MF
402
21
R701
NO STUFF
0
5%
1/16W
MF
402
21
R702
NO STUFF
0
5%
1/16W
MF
402
21
R688
NO STUFF
0
5%
1/16W
402
MF
21
R689
NO STUFF
0
5%
1/16W
MF
402
+5V_MAIN
2
1
R547
0
5% 1/10W FF 805
+3V_SLEEP
2
1
C669
4.7uF
20%
6.3V CERM 805
+5V_MAIN
+3V_MAIN
2
1
R633
10K
5%
1/16W
MF
402
21
R659
NO STUFF
0
5%
1/16W
MF
402
21
R661
NO STUFF
0
5%
1/16W
MF
402
2
1
C818
NO STUFF
0.001uF
20% 50V CERM 402
2
1
C817
NO STUFF
0.001uF
20% 50V
CERM
402
21
R700
NO STUFF
0
5% MF
1/16W
402
21
R705
NO STUFF
0
5%
1/16W
402
MF
2
1
C814
4.7uF
6.3V
20% CERM
805
2
1
R752
100K
5% 1/16W MF 402
4
5
3
Q77
2N7002DW
SOT-363
1
2
6
Q77
2N7002DW
SOT-363
+5V_MAIN
2
1
R751
100K
5% 1/16W MF 402
4
3
2
1
6
5
J1
CRITICAL
SM04B-SSR
M-RT-SM
4
3
2
1
6
5
J18
CRITICAL
SM04B-SSR
M-RT-SM
21
XW30
OMIT
SM
2
1
C829
0.1uF
20% 10V CERM 402
2
1
C828
0.1uF
20% 10V
CERM
402
1
2
6
Q78
2N7002DW
SOT-363
4
5
3
Q78
2N7002DW
SOT-363
2
1
R156
100K
5% 1/16W MF 402
2
1
R768
100K
5% 1/16W MF 402
+3V_MAIN
2
1
R770
100K
5% 1/16W MF 402
2
1
R774
ADT7460
10K
5%
1/16W
MF
402
2
1
R773
ADT7460
10K
5% 1/16W MF 402
4
5
3
Q79
2N7002DW
SOT-363
ADT7460
2
1
R772
402
MF
5% 1/16W
10K
1
2
6
Q79
ADT7460
2N7002DW
SOT-363
2
1
R771
10K
5% 1/16W MF 402
9 8 7 65
4
3
2
101
J28
M-ST-5087
CRITICAL
SM
NO STUFF
+5V_MAIN
+5V_SLEEP
+5V_SLEEP
1
2
6
Q83
2N7002DW
SOT-363
4
5
3
Q83
2N7002DW
SOT-363
2
1
C850
0.1uF
20% 10V CERM 402
2
1
R817
5% 1/16W MF 402
100K
2
1
R808
100K
402
MF
1/16W
5%
2
1
R807
100K
402
MF
1/16W
5%
+3V_MAIN
2
1
C848
150uF
20%
6.3V TANT SMD-1
2
1
C849
1uF
603
CERM
6.3V
10%
21
R806
10
5%
1/16W
MF
402
+3V_MAIN
2
1
C868
1000pF
10% 25V X7R 402
2
1
C869
1000pF
10% 25V X7R 402
9
8 7
6 5
4 3
2
16 15
14 13
12 11
10
1
J17
CRITICAL
QT500166-L010
M-ST-SM1
9
87
65
40
4
39
3837
3635
3433
3231
30
3
29
2827
2625
2423
2221
20
2
19
1817
1615
1413
1211
10
1
4443
4241
J3
CRITICAL
QT500406-L111
M-ST-SM1
+3V_MAIN
2
1
C689
10uF
20%
6.3V CERM 805
2
1
R530
10K
5% 1/16W MF 402
2
1
R778
10K
5%
1/16W
MF
402
9
8
7
6
5
4
3
2
10
1
12
11
J15
FF14-10A
F-RT-SM
21
R135
ADT7467
0
5%
1/16W
MF
402
21
R189
1/16W
MF
402
5%
ADT7467
0
14
3
9
4
7
6
16
1
8
5
15
2
10
11
12
13
U53
ADT7467
QSOP
ADT7467
CRITICAL
2
1
R848
NO STUFF
10K
5%
1/16W
MF
402
2
1
R849
10K
5%
1/16W
MF
402
NO STUFF
+5V_SLEEP
+3V_SLEEP
1
IC,ADT7460,FAN CTLR,16P QSOP
353S0608
U53
CRITICAL
ADT7460
A
051-6680
4627
FAN2_PWM_L
FAN2_TACH
FAN1_TACH
FAN1_PWM_L
ADT7467_TACH3_TP
ADT7467_ADR_ENABLE_L
FAN2_PWM_L
FAN2_PWM
FAN1_TACH
FAN1_PWM
FAN1_PWM_L
ADT7467_THERM_L
COMM_TRXC
COMM_TXD_L
ADT7467_THERM_L
THERM_INV
THERM_L_OC
+3V_PMU_AVCC
+FAN_PWR FAN2_TACH
COMM_GPIO_L
INT_I2C_CLK1
THERM1_DM
THERM2_DM
ADT7467_VCORE_MON
THERM1_DM
CPU_THERM_DP
THERM1_A_DP
THERM2_M_DM
THERM2_M_DP
THERM1_M_DM
AUD_GND
SND_HP_MUTE_LO
+5V_MAIN_AUD
INT_I2C_DATA2
SND_AMP_MUTE
+3V_MAIN_AUD
ADAPTER_DET
THERM2_M_DP
INT_I2S0_SND_SCLK INT_I2S0_SND_FROM_ADC
INT_MOD_CLKOUT INT_MOD_DTO INT_MOD_BITCLK
SND_AMP_MUTE_L
BT_USB_DM
NEC_LUSB_PPON
CHARGE_LED_L
NEC_USB_DAM
INT_I2S0_SND_MCLK
SND_HP_SENSE_L
NEC_USB_DAP
THERM1_DM
SND_AMP_MUTE
CPU_THERM_DM
THERM1_DP
THERM1_M_DM
THERM2_DP
THERM2_M_DM
THERM2_DM
NEC_RUSB_OCI_UF NEC_RUSB_PPON
SND_HP_MUTE_LO
THERM2_A_DM
THERM1_A_DM
THERM2_A_DP
THERM1_DP
THERM2_DP
THERM2_DM
THERM1_DP
THERM2_A_DP
THERM1_A_DM
THERM2_A_DM
THERM1_A_DP
THERM1_DM
SND_LIN_SENSE_L
INT_I2S0_SND_TO_DAC
INT_I2S0_SND_LRCLK
BT_USB_DP
NEC_LUSB_OCI_UF
THERM2_DM
INT_I2C_CLK2
SLEEP
SND_HW_RESET_L
SND_AMP_MUTE_CTRL
SND_HP_MUTE_L
THERM2_DP
GPU_THERM_DM
GPU_THERM_DP
INT_PU_RESET_L
THERM1_M_DP
THERM1_M_DP
INT_MOD_SYNC
SND_HP_MUTE
COMM_RING_DET_L SOFTMODEM_FC_RGDT COMM_RESET_L
THERM1_DP
SND_AMP_MUTE_CTRL
ADT7467_VCC
NEC_USB_DBM NEC_USB_DBP
COMM_RXD
COMM_RTS_L
COMM_DTR_L
INT_MOD_DTI
THERM2_DP
INT_I2C_DATA1
+FAN_PWR
41
41
41
25
36
25
41
24
41
41
41
41
41
34
41
41
41
24
41
41
41
41
27
41
41
27
40
40
41
41
14
39
39
39
39
39
39
39
40
41
41
40
41
39
41
41
39
41
41
39
37
41
39
39
41
39
39
39 39
41
41
39
39
39
39
39
39
39
39
39
39
39
39
41
41
41
39
41
39
41
31
41
41
39
31
39
39
31
41
39
39
39
41
41
41
39
14
40
27
27
27
27
27
27
27
24
14
14
24
31
31
27
27
14
13
27
27
5
27
6
27
27
27
27
40
27
34
14
27
34
31
27
14
14
14 14
14
14
14
17
31
17
14
14
17
27
27
6
27
27
27 27
17
17
27
27
27
27
27
27
27
27
27
27
27
27
27
14
14
14
14
17
27
14
24
14
27
14
27
19
19
13
27
27
14
14
14
27
27
17
17
14
14
14
14
27
13
27
VFB
SW
MODE
RUN
VIN
GND
G
D
S
G
D
S
TX_EN
TXD7
TXD6
TXD5
TXD4
TX_ER
GTX_CLK
125CLK
RX_CLK
TXD0
TXD3
TXD2
TXD1
TX_CLK
VDDOX
VDDOH
VDDO
DVDD
CTRL10
MDC
CRS COL
RX_ER
RX_DV
RXD7
RXD1 RXD2 RXD3 RXD4 RXD5 RXD6
RXD0
MDI1­MDI2+ MDI2­MDI3+
MDI1+
MDI0-
MDI0+
AVDD
VSSC
XTAL2
HSDAC-
HSDAC+
S_CLK-
S_CLK+
XTAL1
S_OUT-
S_OUT+
S_IN-
S_IN+
COMA
RESET
INT+
INT-/
MDIO
LED_LINK1000
LED_LINK100
GND
SEL_2.5V
SEL_OSC
TRST
RSET
TDO
TDI
TCK TMS
CONFIG5 CONFIG6
CONFIG4
CONFIG0 CONFIG1 CONFIG2 CONFIG3
LED_TX
LED_RX
LED_DUPLEX
LED_LINK10
MDI3-
1000PF, 2000VSHIELD
PRIMARY
ENET_CTAP
MDI_2-
MDI_3-
MDI_3+
MDI_1-
MDI_1+
MDI_0-
MDI_0+
MDI_2+
ENET_CTAP
CHIP SIDE
RJ45
75 OHM
1CT:1CT
J3
J2
J1
J5 J6 J7 J8
J4
SECONDARY
CABLE SIDE
RJ45
75 OHM
75 OHM
75 OHM
1CT:1CT
1CT:1CT
1CT:1CT
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
PLACES PHY IN "COMA" MODE WHEN
NC
Y6 LOAD CAPACITANCE IS 16PF
PUT CRYSTAL CIRCUIT CLOSE TO PHY
NC NC
NC NC
NC NC
NC
NC
NC
NC
ASLEEP ON BATTERY (SAVES POWER)
PLACE ALL SERIES RES CLOSE TO PHY
Keep C851 & C852 Stubs short
(000) (000) (111) (110) (111) (101) (000)
(BELOW)
SEE CONFIG TABLES
VOUT = 0.8V*(1+R2EQV/R1)
R2EQV = R2A||R2B
R2A
R2B
R1
PLACE CAPS (IN ORDER) ON PINS 1, 6, 10/15, 57/62, 67/71, 85
PLACE CAPS AT CONNECTOR PINS 5 & 6
PLACE CAPS (IN ORDER) ON PINS 5, 21/26, 48/52, 66/72, 88, 96
PLACE CAPS (IN ORDER) ON PINS 32/35, 36/40, 45 & 78
Ethernet routing priority:
1. Decoupling caps
2. TX SERIES TERMINATION - LOCATE NEAR LINK
3. RX SERIES TERMINATION - LOCATE NEAR PHY
All differential signals should be close, parallel, matched lengths, with minimum via count, and short if possible
Must maintain 50-ohms trace impedance on all MDI pairs and all RJ45 pairs
Sandwich each RJ54 pair between chassis grounds
PLACE RESISTORS CLOSE TO PHY
CONFIG DEFINITIONS
BIT[2:0]
PIN
VDDO LED_LINK10 LED_LINK100 LED_LINK1000 LED_DUPLEX LED_RX LED_TX VSS 000
001
010
011
100
101
110
111
CONFIG INPUTS
PIN
BIT[2] BIT[1] BIT[0]
CONFIG<0> PHYADR[2] PHYADR[1] PHYADR[0]
PHYADR[3] ANEG[1] DIS_125 MODE[0] MODE[3] 75/50 OHM
INT_POL
DIS_SLEEP
MODE[1]
ENA_XC
ANEG[2]
PHYADR[4]ENA_PAUSE ANEG[3] ANEG[0] MODE[2] DIS_FC SEL_BDT
CONFIG<6>
CONFIG<5>
CONFIG<4>
CONFIG<3>
CONFIG<2>
CONFIG<1>
MARVELL 88E1111
10/100/1000 ETHERNET
2
1
R435
49.9
1%
1/16W
MF
402
2
1
R436
49.9
1% 1/16W MF 402
2
1
R433
49.9
402
MF
1/16W
1%
2
1
R434
49.9
1% 1/16W MF 402
2
1
C604
27pF
5%
50V
CERM
402
2
1
C624
27pF
5%
50V
CERM
402
21
R421
0
5%
1/16W
MF
402
2
1
R430
10K
5%
1/16W
MF
402
CHGND1
2
1
R439
49.9
1%
1/16W
MF
402
2
1
R437
49.9
1%
1/16W
MF
402
2
1
R440
49.9
1% 1/16W MF 402
2
1
R438
49.9
1% 1/16W MF 402
2
1
C622
0.01uF
20% 16V
402
CERM
2
1
C615
0.01uF
20% 16V CERM 402
2
1
C617
0.01uF
20% 16V
402
CERM
2
1
C647
402
CERM
10V
20%
0.1uF
2
1
C645
402
CERM
10V
20%
0.1uF
2
1
C648
0.1uF
20% 10V CERM 402
2
1
C646
0.1uF
10V
20% CERM
402
2
1
R424
NO STUFF
49.9
1%
1/16W
MF
402
2
1
R429
NO STUFF
49.9
1%
1/16W
MF
402
21
R423
0
5%
402
MF
1/16W
2
1
R428
10K
5% 1/16W MF 402
21
R445
0
5%
1/16W
MF
402
2
1
R432
1.5K
5%
1/16W
MF
402
2
1
R427
4.99K
1% 1/16W MF 402
2
1
C611
2.2uF
20% 10V
CERM
805
2
1
C616
0.01uF
20% 16V CERM 402
2
1
C614
0.1uF
20% 10V CERM 402
2
1
C602
0.01uF
16V
20% CERM
402
2
1
C618
0.1uF
20% 10V CERM 402
2
1
C592
10uF
20%
6.3V CERM 805
2
1
C598
0.1uF
20% 10V CERM 402
2
1
C600
0.01uF
20% 16V CERM 402
2
1
C623
0.1uF
10V
20% CERM
402
2
1
C612
0.01uF
20% 16V CERM 402
2
1
C597
0.1uF
20% CERM
402
10V
2
1
C595
10uF
20%
6.3V CERM 805
12
L35
FERR-EMI-600-OHM
SM
+2_5V_MAIN
4
5
31
6
2
U45
LTC3405
SOT23-6
CRITICAL
21
L60
CRITICAL
3.3uH
SM1
2
1
R506
665K
1%
402
MF
1/16W
2
1
C675
22pF
5%
50V
CERM
402
2
1
R504
49.9K
402
MF
1/16W
1%
2
1
R503
182K
402
MF
1/16W
1%
2
1
R513
NO STUFF
0
5%
1/16W
402
MF
2
1
C619
0.01uF
20% 16V CERM 402
2
1
C608
0.1uF
20% 10V CERM 402
2
1
C601
0.01uF
20% CERM
16V 402
2
1
C594
0.1uF
20% 10V CERM 402
2
1
C599
0.01uF
20% 16V CERM 402
2
1
C603
0.1uF
20% 10V CERM 402
2
1
R507
0
5%
1/16W
MF
402
3 1
D15
1N914
SOT23
+3V_MAIN
2
1
C674
10uF
805
CERM
6.3V
20%
2
1
C680
10uF
20%
6.3V CERM
805
4
5
3
Q32
2N7002DW
SOT-363
1
2
6
Q32
2N7002DW
SOT-363
54
55
53
48
26
72
66
52
96
88
21
5
7
9
4
20
19
18
17
16
14
12
11
47
46
50
44
49
75
77
81
82
80
79
56 13
3
94
2
86
87
89
90
91
93
92
95
30
28
24 43
42
41
39
34
33
31
29
25
68
69
73
74
76
70
23
38
37
8
97
85
71
67
62
57
15
10
6
1
51
84
58
59
60
61
63
64
65
27
83
78
45
40
36
35
32
22
U43
88E1111
CRITICAL
BCC
21
R425
NO STUFF
20K
5%
1/16W
MF
402
2
1
R441
0
5% 1/16W MF 402
2
1
R431
10K
5%
1/16W
MF
402
2
1
C613
0.01uF
20% 16V CERM 402
31
Y5
CRITICAL
SM-3
25.0000M
2
1
C852
10pF
5%
50V
CERM
402
2
1
C851
NO STUFF
10pF
5%
50V
CERM
402
9
8
7
6
5
4
3
2
10
1
14
13
12
11
J23
MJ-R0076
F-RT-TH
21
R422
1K
5%
1/16W
MF
402
2 1
R442
5%
1/10W
FF
805
0
2 1
R814
0
1/10W
5% FF
805
051-6680
A
4628
338S0223
MARVELL 88E1111 B1 DIE
U43
338S0079
LTC3405_SW
+2_5V_MARVELL_CONN
ENET_MDIO
INT_ENET_RST_L
ENET_CRS
LED_LINK10
SLEEP_L_LS5
+2_5V_MARVELL
ENET_COL
ENET_ENERGY_DET
ENET_RX_ER
ENET_RX_DV
ENET_LINK_RXD<5> ENET_LINK_RXD<6> ENET_LINK_RXD<7>
LED_LINK100
INT_TDO
JTAG_ASIC_TDO_TP
JTAG_ASIC_TMS
JTAG_ASIC_TRST_L
CLK25M_XTAL_IN
LED_RX_SPN
ENET_HSDACM
ENET_MDC
ENET_PHY_TXD<3> ENET_PHY_TXD<4> ENET_PHY_TXD<5>
ENET_PHY_TXD<7>
ENET_PHY_TX_EN
CLKENET_PHY_GTX
ENET_PHY_TXD<1> ENET_PHY_TXD<2>
ENET_PHY_TXD<0>
ENET_LINK_RXD<4>
ENET_LINK_RXD<3>
ENET_LINK_RXD<2>
ENET_LINK_RXD<1>
ENET_LINK_RXD<0>
AC_IN
MDI0_PD MDI1_PD
CLKENET_LINK_GBE_REF
CLKENET_LINK_RX
MDI3_PD
CLKENET_LINK_TX
3405_MODE
MDI_P<0>
MDI_P<1>
MDI_M<2>
MDI_M<1> MDI_P<2>
MDI_M<3>
MDI2_PD
JTAG_ASIC_TCK
ENET_RSET
ENET_HSDACP
CLK25M_ENET_XOUT
CLK25M_ENET_XIN
IO_RESET_L ENET_RST_L
ENET_PHY_TX_ER
CLKENET_PHY_GBE_REF
CLKENET_PHY_TX
MDI_M<0>
ENET_PHY_TXD<6>
MDI_P<3>
+2_5V_MARVELL_AVDD
CLKENET_PHY_RX
+1_0V_MARVELL
3405_VFB
ENET_COMA
ENET_VSSC
+2_5V_MARVELL
36 35
31
34
32
25
39
39
21
40
39
39
39
39 39
39
14
41
41
39
39
39 39
39
39
37
39 39
39
39
39
39
39
39
31
37
37
37
41
41
41
41
41
41
41
24
39
41
39
41
40
40
13
14
13
18
28
13
14
13
13
13 13
13
13
41
13
13
13
13
13 13
13
13
13
13 13
13
13
13
13
13
13
30
13
13
13
39
39
39
39
39
39
13
17
13
37
37
39
13
39
40
37
40
28
OE
GND
OUT
VCC
OSC
SYM_VER2
GND
OUTIN
BYP ADJ
ADJ
BYP GND
OUT
NC
NC
SHDN
IN
(SYM_VER1)
VREG_PD
PAD
THRML
AGND
SM
TESTM
SE
D5 D6
RESETZ
D7
DGND
PLL VDD
1.8
3.3
DVDD
PLLGND
PLL
3.3
VDD
D3 D4
D1 D2
BMODE
PC2
PD
PC1
CPS
PC0
D0
LREQ
LPS
LCLK
3.3
AVDD DVDD
1.8
TPA1+ TPA1-
PCLK
TPA0-
TPA0+
TPA2+ TPA2-
C/LKON
CTL0 CTL1
CNA
PINT
TPBIAS0 TPBIAS1
XO
XI
TPBIAS2
R1
R0
TPB2-
TPB2+
TPB1-
TPB1+
TPB0-
TPB0+
DS0 DS1
ON/OFF
GND
VOUT
FB
VIN
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
(FWB-TX)
(FW_TPA0P)
(FW_TPB0P)
(FW_TPA0N)
(FW_TPA1P) (FW_TPA1N)
(FW_TPB0N)
(FW_TPB1P) (FW_TPB1N)
NC
NC
NC
(FWB-RX)
(FWA-RX)
(FWA-TX)
165MA MAX LOAD
R1
R2
IADJ = 30NA AT 25C
VOUT = 1.22*(1+R2/R1)+ IADJ*R2
R2
R1
PHY PIN 50
PHY PIN 61
PHY PIN 64
PHY PIN 40
PHY PIN 21
PWR CLASS = 100
MAY REQUIRE UP TO 3W)
(MAY PROVIDE POWER, OR
(PC0 IS MSB, PC2 IS LSB)
PHY PINS 72,76
PHY PIN 28
PHY PIN 25
PHY PIN 38
CAPACITOR IN CONJUCTION WITH INTERNAL PULLUP PROVIDES RESET PULSE WHEN PHY FIRST RECEIVES POWER
PHY PINS 4,14
DSx Strap Options
0 = Bilingual port 1 = A-only port
FIREWIRE PHY
PHY PIN 38
TX0
RX0
NC
NC
NC NC
SN0201029PFP
1MA (MAX) BUS HOLDERS
(DS2)
2
1
R514
1K
402
MF
1/16W
5%
2
1
C679
20%
6.3V CERM
402
0.22uF
5
6
7
8
4
3
2
1
RP38
22
SM1
1/16W
5%
5
6
7
8
4
3
2
1
RP37
22
SM1
1/16W
5%
21
R519
5%
1/16W
MF
402
22
21
R520
402
MF
1/16W
5%
22
2
1
C683
402
CERM
20% 10V
0.1uF
2
1
C610
402
CERM
16V
20%
0.01uF
4
3
1
2
G2
SM-A
98.304MHZ
CRITICAL
2
1
R508
402
MF
1/16W
5%
0
2
1
R412
5%
1/16W
MF
402
100K
NO STUFF
21
R510
5%
1/16W
MF
402
47
2
1
R511
1/16W
MF 402
5%
100
2
1
C583
402
CERM
6.3V
20%
0.22uF
12
C584
603
CERM
10V
20%
1uF
21
C596
603
CERM
10V
20%
1uF
21
C606
603
CERM
10V
20%
1uF
21
C593
603
CERM
10V
20%
1uF
21
R413
1
5%
1/16W
603
MF
21
R420
603
MF
1/16W
5%
1
21
R426
603
MF
1/16W
5%
1
21
R418
5%
1/16W
MF
603
1
51
2
3 4
U44
CRITICAL
SOT-23-1
LTC1761ES5-BYP
2
1
C671
805
CERM
10V
20%
2.2uF
2
1
R496
402
MF
1/16W
1%
16.2K
21
R495
402
MF
1/16W
1%
27.4K
2
1
R443
1% 1/16W MF 402
16.2K
2
1
R444
1% 1/16W MF 402
27.4K
2
1
C625
805
CERM
10V
20%
2.2uF
21
R419
603
MF
1/16W
5%
1
21
C586
1uF
20% 10V
CERM
603
21
C678
CERM
20% 10V
603
1uF
2
1
R416
1/16W MF 603
5%
3.3
2
1
R415
5%
1/16W
MF
603
3.3
2
1
C585
805
CERM
10V
20%
2.2uF
2
1
C588
805
20% 10V CERM
2.2uF
2
1
R414
5% 1/16W MF 603
10
2
1
L34
400-OHM-EMI
SM-1
5
1
7
6
8
4
3
2
U38
MSOP
LT1962-ADJ
CRITICAL
2
1
C590
402
CERM
10V
20%
0.1uF
21
R417
603
MF
1/16W
5%
1
21
C591
402
CERM
10V
20%
0.1uF
2
1
R501
402
MF
1/16W
5%
1K
3
2
1
D25
SDM20E40C
SC-59
+5V_SLEEP
2
1
R505
402
MF
1/16W
5%
1K
26
27
73
60
54
47
55
56
48
49
41
42
58
59
52
53
45
46
81
78
36
35
75
22
23
31
30
29
28
25
1
77
5
68
67
66
3
80
7
70
69186
71
65
37
8
32
33
767264
38
14
4
20
19
17
16
15
13
12
11
2
10
9
34
79
74
63
575144
39
24
62
61
504340
21
U36
PQFP
TSB81BA3A
CRITICAL
2
1
C670
100UF
CASE-B-3528
POLY
6.3V
20%
2
1
C677
402
CERM
10V
20%
0.1uF
2
1
C620
20%
6.3V CERM 805
10uF
2
1
R491
1% 1/16W MF 402
56.2
2
1
R492
1%
1/16W
MF
402
56.2
2
1
R487
1% 1/16W MF 402
56.2
2
1
C676
20% 10V CERM 402
0.1uF
2
1
R488
1%
1/16W
MF
402
56.2
2
1
C607
603
CERM
10V
20%
1uF
2
1
C605
603
CERM
10V
20%
1uF
2
1
R489
56.2
1% 1/16W MF 402
2
1
R498
MF 402
1/16W
1%
4.99K
2
1
R490
1%
1/16W
MF
402
56.2
C672
402
CERM
25V
5%
220pF
2
1
R493
402
MF
1/16W
1%
56.2
2
1
R499
4.99K
1%
1/16W MF 402
2
1
R494
402
MF
1/16W
1%
56.2
C673
402
CERM
25V
5%
220pF
2
1
R486
5%
1/16W
MF
402
1K
2
1
C682
20% 10V CERM 402
0.1uF
2
1
C681
805
CERM
6.3V
20%
10uF
2
1
C621
20%
16V CERM 402
0.01uF
2
1
C609
805
CERM
6.3V
20%
10uF
2
1
C587
0.1uF
20% CERM
10V 402
21
L59
SM-3
CRITICAL
220uH
2
1
D16
MBR0540
SM
8
7
56
4
U37
SM
LM2594
CRITICAL
2
1
C665
2320
CERM
50V
N20P20%
10uF
2
1
R502
1%
1/16W
MF
402
402K
2
1
C589
20%
0.1uF
10V CERM 402
21
R518
5%
1/16W
MF
402
22
2
1
C684
20% 10V CERM 402
0.1uF
12
R512
1%
1/16W
MF
402
6.34K
1
2
R516
5% 1/16W MF 402
10K
2
1
R497
402
MF
1/16W
5%
1K
2
1
R509
402
MF
5% 1/16W
1K
2
1
R515
1/16W
402
MF
5%
1K
2
1
R500
402
MF
1/16W
5%
470
2
1
R517
5% 1/16W MF 402
1K
29 46
A
051-6680
G2
Alt. for Siward Part
197S0052197S0011
+1_95V_FW_DVDD
+3V_FW
+1_95V_FW_DVDD_TX0
FW_LKON
FW_PINT
+3V_FW_AVDD
+3V_FW_AVDD_PORT1
+1_95V_FW_DVDD_RX0
+1_95V_FW_DVDD_PORT1
+1_95V_FW_PLL400VDD
LM2594_IN
+3V_FW_UF
+FW_PWR_OR
+1_95V_FW_PLLVDD
+3V_FW_AVDD_PORT2
+3V_FW_AVDD_PORT0
FW_TPB1N
+3V_FW
FW_TPI0N
FW_TPI0P
FW_TPA1N
FW_TPA1P
FW_TPO0N
FW_TPO0P
FW_BIAS1
FW_BIAS0
+1_95V_FW_PLL500VDD
FW_PHY_CNTL<1>
CLKFW_PHY_PCLK
+1_95V_FW_PLLVDD
CLKFW_PHY_PCLK
+1_95V_FW_DVDD
+1_95V_FW_DVDD
FW_CORE_ADJ
FW_CORE_BYP
CLKFW_LINK_PCLK
FWB_TPB1FWB_TPB0
FW_OSC
FW_LINK_DATA<2> FW_LINK_DATA<3> FW_LINK_DATA<4> FW_LINK_DATA<5> FW_LINK_DATA<6> FW_LINK_DATA<7>
+FW_PWR_OR
FW_LINK_CNTL<0>
FW_LINK_CNTL<1>
FW_PHY_CNTL<0>
FW_PHY_RESET_L
FW_PHY_DATA<7>
FW_PHY_DATA<6>
FW_PHY_DATA<5>
FW_PHY_DATA<3>
FW_PHY_DATA<2>
FW_PHY_DATA<1>
FW_PHY_DATA<4>
FW_BMODE
FW_CPS
FW_PHY_DATA<0>
FW_PHY_LPS
CLKFW_PHY_LCLK
FW_PHY_CNTL<1>
FW_XI
FW_R0 FW_R1
FW_TPB2_PD
FW_PORT1_SEL
FW_OSC_EN
FW_PHY_CNTL<0>
FW_TPB1P
FWPLL_BYP
FW_PLL_ADJ
FW_LINK_DATA<1>
FW_LINK_DATA<0>
FW_PHY_PD
FW_PHY_LREQ
FW_TESTM
FW_INPUT_PD
FW_VREG_PD
FW_PC_PD
FW_PC_PU
40
40
40
41
41
41
41
40
40
30
39
30
40
39
30
39
39
39
39
39
39
39
37
40
37
40
40
37
39
39 39
39
39 39
30
39
39
39
37
39
39
39
39
39
39
29
29
40
13
13
40
40
40
40
40
40
29
29
40
40
30
29
30
30
30
30
30
30
40
29
29
29
29
29
29
13
37
13
13 13
13
13 13
29
13
13
29
39
39
39
39
39
39
39
39
13
13
29
37
29
30
13
13
14
13
SYM_VER-1
SYM_VER-1
G
D
S
G
D
S
V-
V+
SYM_VER-2
SYM_VER-2
VP VGND
TPI#
TPO
TPI
TPO#
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PORT POWER SWITCH
ENABLES PORT POWER WHEN
PLACE NEAR D24
2.5V REG: 2.50V - 2.15V 200MS - 500MS
CLEAR OUT ALL PLANES UNDER TRANSFORMERS
PORT 1
1394a ONLY
514-0057
(TPI0R)
(AREF)
(BREF)
NC
PORT 0
1394a/b
(BILINGUAL)
514S0058
INT-SHIELD
TPA TPA(R) TPA* VG SC VP TPB TPB(R) TPB*
INT-SHIELD
AREF NEEDS TO BE ISOLATED FROM ALL LOCAL GROUNDS PER 1394B SPEC
PLUGGED TO A BETA-ONLY DEVICE,
SO WHEN A BILINGUAL DEVICE IS
THERE’S NO DC PATH BETWEEN THEM (TO AVOID GROUND OFFSET ISSUE)
BREF SHOULD BE HARD CONNECTED TO LOGIC GROUND FOR SPEED SIGNALING AND CONNECTION DETECTION CURRENTS PER 1394B V1.33
FIREWIRE PORTS
MACHINE IS RUNNING OR WHEN ASLEEP ON AC
PLACE NEAR D23
2.5V REG
2
1
R465
1M
402
MF
1/16W
5%
CHGND1
2
1
R448
470K
5%
1/16W
MF
402
2
1
R461
330K
402
MF
1/16W
5%
2
1
C639
0.01UF
402
CERM
16V
20%
2
1
C651
NO STUFF
20% 16V CERM 402
0.01uF
61
DP6
BAS16TW
SOT-363
21
D24
CRITICAL
SMB
B340B
2
1
R777
402
MF
1/16W
5%
470K
2
1
C650
402
CERM
16V
20%
0.01uF
9
8
7
6
5
4
3
2
15
14
13
12
11
10
1
J20
CRITICAL
1394B
F-RT-SM
4
3 2
1
L76
90-OHM-300mA
2012H
CRITICAL
4
3 2
1
L77
90-OHM-300mA
2012H
CRITICAL
3 2 1
4
8 7 6 5
Q34
CRITICAL
SOI
NDS9407
1
2
R466
0
805
FF
1/10W
5%
1
2
6
Q33
2N7002DW
SOT-363
21
R803
0
402
MF
1/16W
5%
CHGND1
21
R816
EMI
402
MF
1/16W
5%
0
2
1
C822
0.1UF
20% 10V
CERM
402
NO STUFF
21
R834
402
MF
1/16W
5%
10K
NO STUFF
21
R831
649K
1%
1/16W
MF
402
NO STUFF
21
R829
470K
5%
1/16W
MF
402
NO STUFF
2
1
3
Q73
2N7002
SM
NO STUFF
21
R830
470K
402
MF
1/16W
5%
NO STUFF
2
1
C826
0.01UF
16V CERM 402
NO STUFF
20%
2
1
C825
0.1UF
20% 10V
402
NO STUFF
CERM
21
D35
SM
NO STUFF
MBR0540
2
1
C824
1UF
20% 10V CERM 603
NO STUFF
6
2
1
D18
BAV99DW
SOT-363
2
1
3
Q37
SI2319DS
SOT23
NO STUFF
21
R837
5%
1/16W
MF
603
0
21
R835
1%
1/16W
MF
402
NO STUFF
102K
21
R833
604K
1/16W
1% MF
NO STUFF
402
2
5
1
3
4
U59
LMC7211
SM
NO STUFF
21
R836
332K
1/16W
MF
402
1%
NO STUFF
2 1
R451
402
10K
5% MF
1/16W
3
1
D21
SOT23
1N5227B
3
5
4
D22
BAV99DW
SOT-363
3
5
4
D18
BAV99DW
SOT-363
3
21
4
L52
SM1
260-OHM-330MA
3
21
4
L48
SM1
260-OHM-330MA
6
2
1
D22
BAV99DW
SOT-363
1
2
5
6
3
4
10987
J24
CRITICAL
1394A
F-RT-TH
2
1
C666
20% 16V
CERM
402
0.01uF
CHGND1
2
1
C662
CERM 402
16V
20%
0.01uF
2
1
C649
805
CERM
50V
20%
0.1uF
2
1
R471
0
805
FF
1/10W
5%
6
2
1
D23
BAV99DW
SOT-363
+3V_PMU
2
1
R447
100K
5%
1/16W
MF
402
4 3
DP6
BAS16TW
SOT-363
3
5
4
D23
BAV99DW
SOT-363
52
DP6
BAS16TW
SOT-363
4
5
3
Q33
2N7002DW
SOT-363
2 1
R446
10K
402
MF
1/16W
5%
CHGND1
2
1
C652
0.01uF
20% 16V
CERM
402
NO STUFF
3
5
4
D20
BAV99DW
SOT-363
2
1
L58
FERR-250-OHM
SM
21
L51
SM
FERR-250-OHM
6
2
1
D20
SOT-363
BAV99DW
21
L39
400-OHM-EMI
SM-1
2
1
C630
20% 10V
CERM
402
0.1UF
2
1
C638
20% 16V
CERM
402
0.01UF
2
1
C637
0.001UF
402
CERM
50V
20%
1
2
C640
402
CERM
16V
20%
0.01UF
2
1
F1
1.5AMP-33V
SM
2
1
C633
402
CERM
16V
20%
0.01UF
2
1
C644
0.01UF
20% 16V CERM 402
21
F3
1.5A-24V
SM
+PBUS
30 46
A
051-6680
+3V_FW_ESD
+3V_FW_ESD_ILIM
+3V_FW
+FW_PWR_OR
+2_5V_REG
+FW_PWR_CTRL
+FW_PWR_OR_GATE
+FW_PWR_OR_GATE_L
+FW_PWR_OR_F
+3V_FW_ESD
FW_POWER_UP
FW_TPI0N
FW_TPI0P
+FW_SW
+FW_PBUS
FW_GATE_EN
POWER_UP
PMU_POWER_UP_L
FW_TPBI0P
FW_TPO0R
FW_TPAO0P
AC_IN
DCDC_EN
FW_VGND0
FW_TPBI0N
DCDC_EN_CTRL
FW_VGND1
FW_TPI1P
FW_TPI1N
AC_IN_FW_CNTL
FW_TPO1P
FW_TPO1N
+FW_VP1
FW_TPA1N
FW_TPB1P
FW_TPB1N
FW_TPA1P
+3V_FW_ESD
+FW_VP0
FW_TPO0P
FW_TPO0N
+FW_PWR1
FW_TPAO0N
FW_GATE_EN_RC
+2_5V_REG_F
+3V_FW
+3V_FW_ESD_R
40
41
41
32
35
41
41
40
30
40
39
39
34
31
34
41
41
41
41
41
39
39
39
39
41
39
39
30
30
29
29
30
29
29
40
40
31
39
41
39
28
21
40
39
40
39
39
39
39
40
29
29
29
29
30
40
29
29
40
39
29
G
D
S
G
D
S
G
D
S
RSET*
MR*
GND
VCC
P86_XCOUT
AVSS
VSS
XIN RESET
VREF
CNVSS
BYTE XOUT
AVCC
P50_WRL_WR
P51_WRH_BHE
P52_RD
P65_CLK1 P66_RXD1 P67_TXD1
P74_TA2OUT_W
P75_TA2IN_W
P60_CTS0_RTS0
P57_RDY_CLKOUT
P56_ALE
P55_HOLD
P54_HLDA
P53_BCLK
P61_CLK0 P62_RXD0 P63_TXD0
P70_TXD2_SDA_TA0OUT
P72_CLK2_TA1OUT_V
P73_CTS2_RTS2_TA1IN_V
P100_AN0
P90_TB0IN_CLK3 P91_TB1IN_SIN3
P92_TB2IN_SOUT3
P93_DA0_TB3IN P94_DA1_TB4IN
P95_ANEX0_CLK4
P96_ANEX1_SOUT4
P97_ADTRG_SIN4
P87_XCIN
P85_NMI
P84_INT2
P83_INT1
P82_INT0
P81_TA4IN_U
P80_TA4OUT_U
P77_TA3IN
P76_TA3OUT
P107_AN7_KI3
P106_AN6_KI2
P105_AN5_KI1
P104_AN4_KI0
P103_AN3
P102_AN2
P101_AN1
P64_CTS1_RTS1_CTS0_CLKS1
P71_RXD2_SCL_TA0IN_TB5IN
VCC
P01_D1
P00_D0
P02_D2 P03_D3 P04_D4 P05_D5 P06_D6 P07_D7
P10_D8
P11_D9 P12_D10 P13_D11
P21_A1_D1_D0
P22_A2_D2_D1
P23_A3_D3_D2
P24_A4_D4_D3
P25_A5_D5_D4
P14_D12
P17_D15_INT5
P15_D13_INT3 P16_D14_INT4
P20_A0_D0
P27_A7_D7_D6
P26_A6_D6_D5
P30_A8_D7
P31_A9 P32_A10 P33_A11 P34_A12 P35_A13 P36_A14 P37_A15
P45_CS1 P46_CS2 P47_CS3
P44_CS0
P43_A19
P40_A16 P41_A17 P42_A18
V-
V+
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
Keep crystal subcircuit close to PMU.
PMU KEYBOARD RESET CIRCUIT
NC NC NC NC NC NC NC NC
NC NC
Keep crystal subcircuit close to PMU.
Y5’S LOAD CAPACITANCE IS 12PF
CPU_VCORE_HI_OC/PMU_AP should reset. MLB will have a pull-up
have a pulldown for coming out of
to +3V_MAIN or +3V_SLEEP, which
will act as our pulldown since both are off during PMU reset.
(PMU_AP)
NC
NC NC
(CHARGE_I)
NC NC
ADAPTER IDs
ADAPTER
ID RANGE
PIN VOLTAGE
2.007-2.066V
2.558-2.661V
0.589-0.663V
0.33-0.99V
AIRLINE
A29 (45W)
Q11 (65W)
1.65-2.31V
2.31-2.97V
A29 ADAPTER DETECTION
Y3’S LOAD CAPACITANCE IS 12.5PF
NC
PMU
+3V_PMU
+3V_SLEEP
+3V_PMU
2
1
3
Q30
2N7002
SM
21
Y4
OMIT
CRITICAL
10.0000M
8X4.5MM-SM
+5V_SLEEP
21
R188
100K
402
MF
1/16W
5%
6 1
DP8
BAS16TW
SOT-363
5 2
DP8
BAS16TW
SOT-363
12
R564
10K
5%
1/16W
MF
402
4
5
3
Q19
2N7002DW
SOT-363
1
2
6
Q19
2N7002DW
SOT-363
4
23
1
U26
MAX6804
SOT143
2
1
R267
1K
5% 1/16W MF 402
+3V_PMU
2
1
C370
0.1uF
402
CERM
10V
20%
12
R157
402
MF
1/16W
5%
100K
+3V_MAIN
+3V_PMU
21
R815
0
NO STUFF
5%
1/16W
MF
402
21
R819
0
5%
1/16W
MF
402
21
R821
10K
5%
1/16W
MF
402
21
R825
10K
402
MF
1/16W
5%
21
R826
NO STUFF
10K
5%
1/16W
MF
402
+3V_PMU
12
R575
10K
5%
1/16W
MF
402
12
R599
10K
5%
1/16W
MF
402
12
R598
10K
5%
1/16W
MF
402
12
R563
10K
5%
1/16W
MF
402
12
R576
100K
5%
1/16W
MF
402
12
R562
100K
1/16W
5% MF
402
21
R561
100K
5%
1/16W
MF
402
21
R594
10K
402
MF
1/16W
5%
2
1
C731
0.1uF
20% 10V
CERM
402
11 13
6212
96
6014
10
98
99
100
1
2
3
4
5
8
9
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
61
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
87
88
89
90
91
92
93
95
79
80
81
82
83
84
85
86
7
6
94
97
U29
OMIT
M16C62
FLAS
21
R602
4.7
5%
1/16W
MF
402
12
R589
470K
5%
1/16W
MF
402
2
1
C724
0.1uF
20%
CERM
10V 402
2
1
C729
0.1uF
20% 10V
CERM
402
2
1
R249
0
5% 1/16W MF 402
21
R248
NO STUFF
10M
5%
1/16W
MF
402
2
1
C340
12pF
5% 50V CERM 402
2
1
C339
12pF
5% 50V CERM 402
21
R588
1K
5%
1/16W
MF
402
21
R600
1K
5%
1/16W
MF
402
12
R261
100K
5%
1/16W
MF
402
+3V_PMU
2
1
C255
10uF
20%
6.3V CERM
805
21
R595
470K
5%
1/16W
MF
402
+3V_PMU
21
R582
10K
5%
1/16W
MF
402
21
R560
100K
5%
1/16W
MF
402
1
2
R592
100K
1% 1/16W MF 402
21
R583
10K
5%
1/16W
MF
402
63
RP39
100K
5%
1/16W
SM1
54
RP39
SM1
1/16W
5%
100K
81
RP39
SM1
1/16W
5%
100K
+3V_PMU
12
R591
470K
1/16W
5% MF
402
21
R580
NO STUFF
402
MF
1/16W
5%
10M
2
1
C728
12pF
5%
50V
CERM
402
2
1
R581
0
5%
1/16W
MF
402
2
1
C406
12pF
5%
CERM
402
50V
12
R586
402
MF
1/16W
5%
10K
72
RP39
100K
5%
1/16W
SM1
72
RP41
10K
5%
1/16W
SM1
12
R587
402
MF
1/16W
5%
1K
2
1
R593
100K
1% 1/16W MF 402
2
1
R590
402K
1% 1/16W MF 402
31
42
Y3
CRITICAL
SM-2
32.768K
12
R584
7.15K
402
1/16W
MF
1%
12
R585
7.15K
1/16W
1% MF
402
54
RP41
10K
5%
1/16W
SM1
81
RP41
10K
5%
1/16W
SM1
63
RP41
10K
5%
1/16W
SM1
2
5
1
3
4
U33
SM
LMC7211
2
1
R348
52.3K
1% 1/16W MF 402
2
1
R349
127K
1% 1/16W MF 402
21
R345
4.7M
5%
1/16W
402
MF
2
1
R364
100K
5% 1/16W MF 402
2
1
C467
0.1uF
20% 10V CERM 402
U29
IC,PMU,V81B
1
341S1008
?1
XTAL,10.0000MHZ,.01%,12PF,8X4.5MM,SMD
CRITICAL
Y4
197S0088
051-6680
A
46
31
CHARGE_LED_L
CLK32K_PMU_XOUT CLK32K_PMU_XIN
PMU_BATT0_DET_L
THERM_L_OC
PMU_OOPS
SYS_BATT_ISNS1
PMU_BATT1_DET_L_PU
PMU_SELECT
INT_WATCHDOG_L
KBD_X<4>
KBD_X<6> KBD_X<7>
KBD_X<8>
PMU_NMI_L
PMU_CPU_HRESET_L
PMU_EPM
CHARGE_LED_L
SOFT_PWR_ON_L
+3V_PMU_AVCC
PMU_TO_INT PMU_REQ_L
CLK10M_PMU_XOUT_UF
PMU_RESET_L +3V_PMU_AVCC
PMU_AC_DET
AC_IN
CPU_SMI_L POWER_VALID
PMU_BATT_DET_L
SYS_BATT_ISNS
INT_PEND_PROC_INT
PMU_AC_DET
PMU_AC_IN
INT_PROC_SLEEP_REQ_L
PMU_PME_L
CLK32K_PMU_XOUT_UF
PMU_CHRG_BATT_0
CPU_VCORE_HI_OC
A29_DET_REF
KBD_SHIFT_L
INT_PU_RESET_L
PMU_PME_L
TPAD_TXD
PMU_SMB_CLK
PMU_NMI_L
PMU_BATT_DET_L
PMU_I2C_DATA
PMU_BATT_DET_L
PMU_CUSTOM_RESET
+3V_PMU_RESET
INT_SUSPEND_REQ_L
INT_RESET_L
SLEEP
IO_RESET_L
PMU_POWER_UP_L
PMU_CUSTOM_RESET
KBD_ID CPU_PLL_STOP_OC
SOFT_PWR_ON_L
AC_IN_L
KBD_COMMAND_L
IO_RESET_L
KBD_X<3>
INT_RESET_L
A29_DETECT
A29_DET_L
PMU_SMB_DATA
PMU_RESET_BUTTON_L
PMU_POWERUP_OK
PMU_BATT1_DET_L_PU
PMU_NMI_BUTTON_L
PMU_I2C_CLK
PMU_LID_CLOSED_L
PMU_OOPS
KBD_OPTION_L
TPAD_RXD
POWER_VALID
KBD_X<5>
KBD_X<2>
KBD_X<1>
KBD_X<0>
MAIN_RESET_L
PMU_EPM
PMU_BYTE
KBD_CONTROL_L
SLEEP
INT_SUSPEND_ACK_L
PMU_CUSTOM_RESET_L
PMU_CHARGE_V
PMU_SLEEP_LED_L
PMU_POWERUP_OK
INT_PU_RESET_L
TPAD_RXD
MAIN_RESET_L
CPU_CLK_EN
SYSTEM_CLK_EN
TPAD_TXD
SYS_BATT_ISNS1
PMU_I2C_CLK
PMU_FROM_INT
PMU_CLK
PMU_ACK_L
KBD_FUNCTION_L
PMU_INT_L
SYS_BATT_ISNS2
PMU_NMI_BUTTON_L
PMU_RESET_BUTTON_L
PMU_LID_CLOSED_L
PMU_I2C_DATA PMU_SMB_CLK PMU_SMB_DATA
CLK10M_PMU_XIN
INT_SUSPEND_REQ_L
PMU_RESET_L
PMU_CNVSS
PMU_BYTE
KBD_X<9>
SYS_BATT_ISNS2
PMU_INT_NMI
COMM_RING_DET_L
SOFT_PWR_ON_L
PMU_POWER_UP_L
PMU_CNVSS
CLK10M_PMU_XOUT
AC_DET
ADAPTER_DET
+4_85V_RAW
41
41
31
31
41
26
41
26
41
41
41
36
31
41
31
20
36
20
41
35
31
31
34
28
35
28
19
34
19
35
41
41
31
40
40
32
41
26
31
26
41
41
31
31
25
34
31
25
31
41
18
31
31
18
41
41
31
34
31
41
41
41
41
41
31
24
31
31
30
32
17
35
41
27
17
32
32
32
41
31
13
27
24
31
41
24
41
24
41
13
32
31
31
41
41
41
41
41
17
41
27
27
17
41
31
31
32
32
31
41
27
24
31
41
40
27
27
31
31
31
14
24
24
24
24
31
6
31
27
23
27
14 14
31 27
31
28
5
31
31
25
14
31
14
14
32
7
24
13
14
31
31
31
31
31
31
31
35
8
9
24
17
30
31
24
7
23
32
24
17
24
9
32
31
24
31
31
31
31
24
31
24
31
31
24
24
24
24
14
31
31
24
24
8
32
24
31
13
31
14
8
14
31
31
31
14
14
14
24
14
31
31
24
24
31 31
31
8
31
31
31
24
31
14
14
23
30
31
27
33
CSIP CSIN
BATT
PGND
DLO
LX
DHI
BST
DLOV
LDO
CELLS
GND
CSSNCSSP
REF
CCS
CCI
CCV
IINP
ICHG
ICTL
VCTL
RFIN
ACOK
ACIN
DCIN
CLS
S2
GATE
S1
S3 D4
D3 D2
D1
S2
GATE
S1
S3 D4
D3 D2
D1
S2
GATE
S1
S3D4
D3 D2
D1
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
V-
V+
GND
OUT
PG
RS-
V+
RS+
NC2
NC1
G
D
S
G
D
S
G
D
S
G
D
S
S
D
G
V-
V+
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
(+3V_PMU)
(BATT_IN_PD)
(GND)
NC
NC
NC
DC POWER INPUT
(POWER JACK, ETC. ON SEPARATE BOARD)
BACKFEED
PROTECTION
DC INRUSH LIMITER
GREATER THAN 13.1V DETECT
PLACE U24 NEXT TO R382
Place close to RS-
+PBUS CURRENT LIMIT
BATTERY SWITCH-OVER CIRCUIT
ROUTE LTC1625_ITH CAREFULLY
PLACE R383 CLOSE TO LTC1625
WHEN AC IS IN, P-CHANNEL FETS ARE QUICKLY (DIODE) TURNED OFF WHEN AC IS NOT PLUGGED, P-CHANNEL FETS ARE ON
RC TIME IS 480K*10UF @ +3V_PMU
PMU SELECTS BETWEEN TWO VOLTAGES
SWITCHER VOLTAGE CONTROL SWITCHER CURRENT CONTROL
CHARGE DISABLED BY PMU OR INPUT VOLTAGE <18V CHARGE THROTTLED BY LOW BATTERY VOLTAGE
I = (0.2048/R ) * (V / V )
CHG _62
ICTL
REFIN
For 4.20V cells, VCTL = 0.245 REFIN
For 4.15V cells, VCTL = 0.123 REFIN
REFIN
VCTL
BATT
V = CELLS X (4.096 + (0.4096 * V / V ))
OD OUTPUT LOW - WHEN AC GREATER THAN 18V
BATTERY CONNECTOR
BATTERY CHARGER
15
13
4
20
23
2
28
14 10
98
22
21
24
1
27 26
19 18
3
16
7
5
6
25
17
12
11
U6
MAX1772
QSOP
CRITICAL
2
1
C41
603
CERM
10V
20%
1uF
2
1
R716
47K
5%
1/16W
MF
402
2
1
R717
402
MF
1/16W
5%
10K
3 2 1
4
8 7 6 5
Q6
CRITICAL
SI4435DY
SOI
2
1
F5
5AMP-125V
SM-2
2
1
F4
5AMP-125V
SM-2
2
1
R83
1K
402
MF
1/16W
1%
2
1
R56
402
MF
1/16W
1%
1K
+24V_PBUS
21
R725
33
5%
1/8W
FF
1206
+BATT
+3V_PMU
2
1
C36
0.01uF
20% 50V CERM 603
3 2 1
4
8 7 6 5
Q68
SI4435DY
SOI
1
2
R29
470K
5% 1/16W MF 402
2
1
R52
100K
5%
1/16W
MF
402
1
2
C11
0.1uF
20% 50V
CERM
805
1
2
R21
330K
5%
1/16W
MF
402
2
1
C801
0.01uF
20% 16V
CERM
402
21
R41
1M
5%
1/16W
MF
402
+3V_PMU
1
2
R51
20K
402
MF
1/16W
1%
2
1
R16
100K
1%
1/16W
MF
402
1
2
R40
97.6K
1%
1/16W
MF
402
1
2
R30
57.6K
1%
1/16W
MF
402
1
2
R42
402
MF
1/16W
1%
10K
3 2 1
4
8 7 6 5
Q69
SI4435DY
SOI
4
5
3
Q9
SOT-363
2N7002DW
2
1
R102
158K
1/16W
1% MF
402
31
D6
1N914
SOT23
2
1
R710
402
MF
1/16W
5%
47K
2
1
R711
402
MF
1/16W
5%
10K
2
1
R720
603
MF
1/16W
5%
1
1
2
6
Q4
2N7002DW
SOT-363
4
5
3
Q4
2N7002DW
SOT-363
2
1
C97
0.1uF
20% 25V
CERM
603
2
1
R59
100K
402
MF
1/16W
5%
2
1
C118
10uF
805
CERM
6.3V
20%
1
2
6
Q71
SOT-363
2N7002DW
2
1
R15
10K
5% 1/16W MF 402
1
2
R22
470K
5% 1/16W MF 402
4
5
3
Q1
2N7002DW
SOT-363
1
2
6
Q1
2N7002DW
SOT-363
1
2
6
Q9
2N7002DW
SOT-363
2
1
R58
10K
1% 1/16W MF 402
4
5
3
Q71
2N7002DW
SOT-363
1
2
6
Q72
SOT-363
2N7002DW
2
1
R741
100K
MF
1/16W
5%
402
4
5
3
Q72
2N7002DW
SOT-363
+3V_PMU
2
1
C96
805
CERM
50V
20%
0.1uF
2
1
R77
CRITICAL
2.21K
0.1%
1/16W
MF
603
2 1
R119
150
402
MF
1/16W
1%
2
5
1
3
4
U1
LMC7211
SM
5 2
DP1
BAS16TW
SOT-363
43
DP1
BAS16TW
SOT-363
2
1
C780
1206
CERM
25V
20%
4.7uF
2
1
R94
100K
MF
402
5%
1/16W
2
1
C777
1206
CERM
25V
20%
4.7uF
2
1
C792
1206
CERM
25V
20%
4.7uF
2
1
C795
1206
CERM
25V
20%
4.7uF
2
1
R53
4.12K
402
MF
1/16W
1%
2
1
R54
10K
402
MF
1/16W
1%
21
L6
SM
FERR-50-OHM
21
L4
FERR-EMI-100-OHM
SM
21
L3
FERR-EMI-100-OHM
SM
21
L2
FERR-50-OHM
SM
1
2
L5
FERR-EMI-100-OHM
SM
21
R61
0.025
1% 1W MF
2512
CRITICAL
+PBUS
8
7
6
5
4
3
2
1
J26
87438-0833
M-RT-SM
CRITICAL
4
3
2
1
J27
CRITICAL
87438-0433
M-RT-SM
321
4
8765
Q64
SO-8
IRF7811W
CRITICAL
+24V_PBUS
8
21
7
64
3
5
U3
CRITICAL
MAX4172
TSSOP
+24V_PBUS
2
1
R82
4.7
5% MF
1/16W
402
2
5
1
3
4
U55
LMC7111 SOT23-5
1
2
6
Q74
2N7002DW
SOT-363
4
5
3
Q74
SOT-363
2N7002DW
2
1
C794
0.1uF
402
CERM
10V
20%
2
1
R744
100K
5% 1/16W MF 402
2
1
R87
4.7
402
MF
1/16W
5%
+3V_PMU
2 1
R727
10K
402
MF
1/16W
1%
2
1
R745
42.2K
CRITICAL
603
FF
1/16W
0.1%
2 1
R728
1K
402
MF
1/16W
1%
21
C798
0.1uF
402
CERM
10V
20%
6 1
DP1
BAS16TW
SOT-363
2
1
C809
1uF
20% 10V
CERM
603
2
1
C71
0.47uF
20%
50V CERM 1206
2
1
R736
CRITICAL
42.2K
0.1%
1/16W
FF
603
2
1
R738
FF 603
1/16W
0.1%
82.5K
CRITICAL
2
1
R47
402
MF
1/16W
1%
6.34K
2
1
C35
0.1uF
10% 50V X7R 603-1
2
1
D36
SM
MBRS140T3
2
1
C95
0.47uF
20% 50V CERM 1206
1
2
6
Q2
2N7002DW
SOT-363
4
5
3
Q2
2N7002DW
SOT-363
3
1
4
Q7
TO-252
SUD45P03
CRITICAL
2
1
C853
402
X7R
25V
10%
1000pF
NO STUFF
2
1
C112
1206
X7R
50V
10%
2.2UF
2
1
C117
1206
X7R
50V
10%
2.2UF
2
1
C116
2.2UF
50V
10%
1206
X7R
2
1
C113
1206
X7R
50V
10%
2.2UF
2
1
C115
1206
X7R
50V
10%
2.2UF
2
1
C233
0.1UF
10% 50V X7R 603-1
2
1
C803
0.01UF
20% 50V CERM 603
+BATT_ISNS
2
1
R742
FF
1/16W
CRITICAL
603
0.1%
51.1K
2
1
C23
1uF
20% 10V
CERM
603
2
1
R57
100K
1%
1/16W
MF
402
2
1
R49
12.7K
1/16W
1% MF
402
2
1
C67
1uF
20% 50V CERM 1210
21
L70
CRITICAL
10uH
SM1
21
R715
2512
MF
1W
1%
0.05
2
1
R713
603
MF
1/16W
5%
1
2
1
C42
0.01uF
20% 16V CERM 402
2
1
C98
0.1uF
20% 25V
CERM
603
2
1
C99
0.1uF
20% 25V CERM 603
+3V_PMU
2
1
R73
27.4K
402
MF
1/16W
1%
2
1
R74
4.12K
1%
1/16W
402
MF
2
1
R62
402
MF
1/16W
1%
10K
2
1
R733
1%
1/16W
MF
402
20K
2
1
R75
5.23K
402
MF
1/16W
1%
2
1
C43
0.01uF
402
CERM
16V
20%
2
1
R731
1K
1/16W
402
MF
1%
321
4
8765
Q70
CRITICAL
IRF7805
SM
2
5
1
3
4
U57
SM
LMC7211
+3V_PMU
2
1
R55
1K
402
MF
1/16W
1%
2
1
R729
1%
1/16W
MF
402
100K
2
1
R730
100K
402
MF
1/16W
1%
2
1
R740
1/16W MF 402
1%
499K
2
1
R735
100K
1% 1/16W MF 402
2
1
C807
0.047uF
10% 16V CERM 402
2
1
C799
0.1uF
20% 10V CERM 402
3
1
D4
1N914
SOT23
2
1
C24
0.1uF
20% 10V CERM 402
2
1
C790
1206
CERM
25V
20%
4.7uF
2
1
C785
1206
CERM
25V
20%
4.7uF
2
1
C779
SM1
ELEC
25V
20%
33uF
21
XW1
SM
2
1
R96
4.7
603
MF
1/16W
5%
2
1
R732
5%
1/16W
MF
402
47K
2
1
R734
68K
402
MF
1/16W
5%
A
051-6680
46
32
+ADAPTER
1772_DCIN
AC_IN_L_RC
+BATT_24V_FUSE
1772_CSIP
BATT_DIV 1V65_REF
BATTV_HIGH
AC_IN_L
LTC1625_ITH
A29_DETECT
+ADAPTER_SENSE
AC_DIV
1V20_REF
AC_IN
AC_ENABLE_L
AC_ENABLE_GATE
MAX4172_OUT
1772_LDO
1772_DLOV
1772_BST_ESR
1772_BST
1772_GND
+ADAPTER_SW
IAC_FB
A29_CURRENT_ADJ
AC_GTR_18V
+BATT_24V_FUSE
BATT_14V_GATE
1772_DHI
1772_LX
1772_CSIN
1772_CELLS
1772_CSSP
BKFD_PROT_EN_L
1772_REF
1772_CLS
1772_CCS
AC_IN
1772_ACOK_L
+BATT_14V_FUSE
+BATT_RSNS
PMU_CHARGE_V
BATTV_LOW
PMU_CHRG_BATT_0
CHARGE_DISABLE
BATT_LOW_L
1772_CCV_RC
1772_CCI
BATT_24PBUS_EN
IAC_RC_COMP
PMU_BATT_DET_L
BATT_NEG
BATT_14PBUS_EN
A29_DETECT
A29_CLS_ADJ
1625_COMP
BATT_24V_GATE
1772_DLO
PMU_SMB_CLK
BKFD_PROT_GATE
AC_IN_L
CURRENT_THRESHOLD
OVER_18V_ADJ
ADAPTER_I_REG
1772_ICHG
1772_CCV
1772_IINP
1772_CSSN
+BATT_VSNS
PMU_SMB_DATA
+BATT_POS
BATT_CLK BATT_DATA
BATT_LOW
1772_VCTL 1772_ICTL
1772_ACOK_L
1772_ACIN
32
32
41
31
31
40
40
32
32
40
30
40
30
41
41
32
32
41
33
40
32
39
31
31
40
33
28
40
40
40
32
40
39
39
28
32
40
40
31
31
31
40
31
33
31
31
39
40
31
40
41 41
32
V-
V+
G1
S1
D1
G2
D2
S2
VTAP
IN OUT SENSE
GND
FDBK
ERR
LP2951
SHUT
SHUT
PLUS5VTAP
LP2951
ERR
FDBK
GND
SENSE
OUTIN
BOOST
SW
SGND PGND
TK
VIN
SYNC RUN/SS
VPROG
ITH FCB
INTVCC
TG
VOSENSE
BG
LTC1625
EXTVCC
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_5_ITEM
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
3V_PMU_SENSE
NC
WHEN +24V_PBUS IS BELOW ~13.1V, 1625 IS SHUT-OFF
NC
NC
NC
NC
CONNECT LTC1625 TK PIN AT TOP-SIDE FET
KEEP VIN/TK LOOP SHORT
12.8V PBUS SUPPLY
PBUS HOLD-UP CAPS
BACKUP
BATTERY
OUTPUT FROM BATTERY
FROM BATTERY
INPUT TO AND OUTPUT
BOOTSTRAP SYSTEM FROM
ADAPTER OR BATTERY
NC
NC
PMU SUPPLY
IF SUPERCAP BOM OPTION IS CHOSEN: OUTPUT AT U23.1 IS 5.65V
OUTPUT AT U22.8 IS 5.4V
12.8V REGULATOR
1
2
R127
1
5%
1/16W
MF
603
+PBUS
1
2
R107
4.99K
1%
1/16W
MF
402
321
4
8765
Q17
IRF7805
SM
CRITICAL
+24V_PBUS
3 1
D8
1N914
SOT23
2
1
C804
SM-1
ELEC
35V
20%
100uF
2
1
C806
20% 25V
ELEC
SM
220uF
2
1
C134
402
CERM
10V
20%
0.1uF
2
1
R108
158K
1% 1/16W MF 402
2
1
R109
402
MF
1/16W
1%
16.2K
2
5
1
3
4
U14
SM
LMC7211
+3V_PMU
2
1
C772
402
CERM
10V
20%
0.1uF
2
1
R690
1%
1/16W
402
MF
97.6K
2
1
R673
10K
1/16W
MF
402
1%
21
R663
1M
402
MF
1/16W
1%
1
5
6
Q15
SC70-6
FDG6324L
CRITICAL
4
3 2
6
Q15
CRITICAL
FDG6324L
SC70-6
+5V_MAIN
2
1
R130
470K
5%
1/16W
MF
402
2
1
R122
603
MF
1/16W
5%
2.2
2
1
C119
4.7uF
1206
CERM
10V
20%
2
1
R120
NO STUFF
0
5% 1/16W MF 402
2
1
R118
402
MF
1/16W
5%
0
21
XW3
OMIT
SM
21
D1
SM
MBR0540
21
R39
1210
FF
1/4W
5%
390
+BATT
+PBUS
21
D2
SM
MBR0540
+3V_PMU
2
1
R231
1
5% 1/16W MF 603
2
1
C326
10uF
20%
805
CERM
6.3V
6
3
2
18
4
7
5
U22
SOI-3.3V
21
D10
SM
MBR0520LT
BACKUP_BATT
21
D11
MBR0520LT
SM
2
1
C740
0.1uF
20% 10V CERM 402
+5V_MAIN
2
1
R233
BACKUP_BATT
1
5% 1/16W MF 603
2
1
C336
BACKUP_BATT
2.2uF
20% 10V CERM 805
2
1
C276
470pF
10% 50V CERM 603
2
1
R604
BACKUP_BATT
294K
1% MF
1/16W
402
2
1
R605
100K
1%
1/16W
MF
402
2
1
C737
0.1uF
20% 10V
402
CERM
3
2
6
18
4
7
5
U23
SOI
2
1
C244
0.1uF
20% 50V CERM 805
2
1
C138
402
CERM
25V
10%
0.0047uF
NO STUFF
321
4
8765
Q16
CRITICAL
IRF7811W
SO-8
3
2
1
5
4
J16
BACKUP_BATT
CRITICAL
SM-2MT
+24V_PBUS
+PBUS
2
1
D32
SM MBRS140T3
31
D3
1N914
SOT23
3
2
1
L69
CRITICAL
8.0uH-6.8A
SM1
2
1
C754
1206
X7R
50V
10%
2.2UF
2
1
C154
10%
1206
X7R
50V
2.2UF
2
1
C155
1206
X7R
50V
10%
2.2UF
2
1
C755
2.2UF
10% 50V X7R 1206
2
1
C153
2.2UF
10% 50V X7R 1206
2
1
C753
2.2UF
10% 50V X7R 1206
2
1
C692
TH
ELEC
5.5V
N20P80%
SUPERCAP
0.33F
21
R804
SUPERCAP
100
5%
1/10W
FF
805
2
1
C135
805
CERM
25V
20%
0.22uF
2
1
C767
4.7uF
20%
25V CERM 1206
2
1
C771
4.7uF
20%
CERM 1206
25V
21
D7
MBR0540
SM
8
7
16 15 13
2
14
639
5
11
4
1
12
10
U13
CRITICAL
SSOP
2
1
C131
4700pF
5%
25V
CERM
603
2
1
C124
603
CERM
50V
10%
470pF
2
1
C137
0.1uF
20% 50V
CERM
805
2
1
C121
603
CERM
25V
5%
4700pF
A
051-6680
33 46
?
SUPERCAP
1
RES,MF,1/16W,357K OHM,1%,0402,SMD
114S3575
R604
1625_BST_ESR
1625_VFB
1625_TG
1625_BG
1625_ENABLE_L
+4_6V_BU
+4_85V_RAW
FB_4_85V_BU
+4_85V_ESR
+ADAPTER_OR_BATT
3V_PMU_VTAP
1625_VSW
1625_DIV
1625_ENABLE
1625_RUNSS
1625_VIN
+3V_PMU_ESR
+ADAPTER
+ADAPTER_ILIM
1625_BST
1V20_REF
1625_FCB
1625_SGND
+PWR_SUPERCAP
COMP_RC
1625_EXTVCC
1625_INTVCC
1625_COMP
41
40 40
40
40
34 31
40
40
40
40
40
32
40
32
40
41
40
40
32
SGND PGND
STBYMD
FCB FREQSET
SNS1-
PGOOD
VOSNS2
VOUT
3.3
VCCVCC
EXT INT VIN
TG2
SW2
SNS2-
BG2
SNS2+
BOOST2
ITH2 RUN/
SS2SS1
SNS1+
BG1
SW1
BOOST1
TG1
VOSNS1 ITH1 RUN/
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
3.3V/5V REGULATOR
DCDC_EN TRUTH TABLE
DCDC_EN
1
+3V_PMU
+4_6V_BU
0
1
+3V_PMU
+5V_SLEEP LOADS
0
DCDC_EN_L
Shutdown
SLEEP
+3V_PMU
THIS SIGNAL IS OPEN COLLECTOR TO GND WHEN POWER IS NOT GOOD
220PF IS USED TO QUIET NOISE ON PGOOD ONCE INTERNAL OPEN DRAIN IS DISENGAGED
DISTRIBUTE CAPS ALONG TOP EDGE AND FAN CUT-OUT
3.3V/5V MAIN SUPPLY
DISTRIBUTE CAPS ALONG TOP EDGE AND FAN CUT-OUT
State Run Sleep
VOLTAGE
10) PMU - I2C PULLUPS
9) WIRELESS
8) HARD DRIVE (IF USING 3V LOGIC)
7) BOOT BANGER
6) DVI LEVEL SHIFTERS & PULLUPS & HPD
5) LVDS DDC PULL-UPS
4) GRAPHIC CHIP SPREAD SPECTRUM CHIP
3) MAP31 - 3V RAIL (IF USING D3COLD)
2) INTREPID - I2C PULLUPS & OSCILLATOR
1) CPU PLL CONFIG CONTROL
+3V_SLEEP LOADS
1
0
0
0
1
0
1
1 (2.99V)
1) FAN
NC
5V START TO TURN ON ~12.5MS AFTER DCDC_EN_L
3V START TO TURN ON ~25MS AFTER DCDC_EN_L
DIODE WILL ENSURE DCDC_EN_L IS QUICKLY DISCHARGED DURING SHUT-DOWN
POWERDOWN DELAY IS AROUND 4MS-15.6MS
PMU_POWER_UP_L
2) Headphone amplifier
3) OPTICAL DRIVE
4) DVI
5) TRACKPAD
SLEEP LEVEL SHIFTER (3V -> 5V)
124
24
1627
1726
6
9
13
14
3
2
151
28
20
118
21
5
7
22
1825
1923
10
U35
SSOP
CRITICAL
LTC3707
2
1
R521
10
5% 1/16W MF 402
2
1
R533
470K
5% MF
402
1/16W
1
2
6
Q44
SOT-363
2N7002DW
2
1
C694
20% 16V CERM 402
0.01uF
4
5
3
Q44
2N7002DW
SOT-363
21
R534
100K
5%
1/16W
MF
402
21
R538
0.005
CRITICAL
1% FF
1/4W 1206
+5V_SLEEP
2
1
C575
0.22uF
20% 25V
CERM
805
21
C432
0.01uF
20% 16V
CERM
402
+5V_MAIN
4
3 6
5 2 1
Q26
TSOP
SI3443DV
4
3 6
5 2 1
Q27
TSOP
SI3443DV
21
C433
0.1uF
10V
20%
CERM
402
2
1
C429
10uF
20%
6.3V CERM 805
21
R321
100K
5%
1/16W
MF
402
21
R322
5%
1/16W
MF
402
100K
2
1
R409
4.7
5% MF
603
1/16W
2
1
R307
100K
1/16W
5% MF
402
4
5
3
Q24
2N7002DW
SOT-363
2
1
C410
0.01uF
20% 16V
402
CERM
21
R310
5%
1/16W
MF
402
100K
+5V_MAIN
2
1
R306
1/16W
100K
5%
402
MF
1
2
6
Q24
SOT-363
2N7002DW
+3V_SLEEP
+3V_MAIN
21
C576
0.001uF
20% 50V
CERM
402
4
3 6
5 2 1
Q21
SI3443DV
TSOP
12
C398
2200pF
5%
50V
CERM
603
21
R311
100K
5%
1/16W
402
MF
21
R294
5%
1/16W
MF
402
100K
2
1
R408
113K
1%
1/16W
MF
402
2
1
D14
MBR0540
SM
2
1
D13
SM
MBR0540
2
1
R402
4.7
MF
5%
1/16W
603
3 1
D27
1N914
SOT23
21
R524
1M
5%
1/16W
MF
402
2
1
C688
0.01uF
CERM 402
20% 16V
2
1
C428
10uF
20%
6.3V CERM 805
2
1
R410
1/16W
21.5K
1% MF
402
2
1
C578
220pF
5% 25V CERM 402
2
1
3
Q43
2N7002
SM
2
1
C8
0.1uF
20%
CERM
10V 402
2
1
C114
0.1uF
20% 10V
CERM
402
2
1
C415
0.1uF
20% 10V
CERM
402
2
1
C123
0.1uF
20% 10V
402
CERM
2
1
C554
0.1uF
20% 10V
CERM
402
2
1
C7
0.1uF
10V
20% 402
CERM
2
1
C573
NO STUFF
180pF
5% 50V CERM 402
2
1
C557
20% 10V
CERM
402
0.1uF
2
1
C562
0.1uF
20% 402
CERM
10V
2
1
C629
0.1uF
20% 10V
CERM
402
+5V_MAIN
2
1
C353
0.1uF
10V
20%
CERM
402
2
1
C143
0.1uF
20% 10V
CERM
402
2
1
C628
0.1uF
20% 10V
CERM
402
2
1
C416
402
CERM
10V
20%
0.1uF
2
1
C574
20%
4.7uF
10V CERM 1206
2
1
C126
402
CERM
10V
20%
0.1uF
2
1
C555
20% 10V
CERM
402
0.1uF
2
1
C627
0.1uF
20% 10V
CERM
402
+3V_MAIN
2
1
C563
402
CERM
10V
20%
0.1uF
2
1
C556
0.1uF
20% 10V
CERM
402
4
5
3
Q20
NO STUFF
2N7002DW
SOT-363
1
2
6
Q20
NO STUFF
2N7002DW
SOT-363
+5V_MAIN
2
1
R301
100K
5%
1/16W
MF
402
21
R291
402
1/16W
100K
5% MF
2
1
R572
NO STUFF
402
MF
1/16W
5%
100K
4
5
3
Q50
2N7002DW
SOT-363
NO STUFF
2
1
R548
100K
1/16W
NO STUFF
5% MF
402
2
1
R551
NO STUFF
402
MF
1/16W
5%
100K
2
1
C566
0.1uF
20% 10V CERM 402
2
1
R550
NO STUFF
470K
5% 1/16W
402
MF
+5V_MAIN
1
2
6
Q50
SOT-363
2N7002DW
NO STUFF
+3V_SLEEP
2
1
D28
MBRS140T3
SM
2
1
D26
SM
MBRS140T3
21
XW32
OMIT
SM
2
1
C577
0.047uF
10% 16V
CERM
402
21
XW31
SM
OMIT
2 1
L61
4.7uH
CRITICAL
IHLP-5050
21
L62
IHLP-5050
4.7uH
CRITICAL
2
1
C469
402
CERM
50V
20%
0.001uF
NO STUFF
2
1
C277
NO STUFF
0.001uF
20% 50V
CERM
402
2
1
C703
CASE-D4
330uF
CRITICAL
20%
6.3V TANT
2
1
C685
20%
6.3V TANT
CASE-D4
330uF
CRITICAL
3 2 1
4
8 7 6 5
Q41
CRITICAL
IRF7805
SM
321
4
8765
Q45
IRF7805
CRITICAL
SM
3 2 1
4
8 7 6 5
Q42
IRF7811W
SO-8
CRITICAL
321
4
8765
Q47
IRF7811W
SO-8
CRITICAL
2
1
C582
2.2UF
10% 50V X7R 1206
2
1
C581
10% 1206
50V
2.2UF
X7R
2
1
C580
2.2UF
10% 50V X7R 1206
2
1
C579
1206
2.2UF
10% 50V X7R
2
1
C561
2.2UF
10% 50V X7R 1206
2
1
C560
50V
2.2UF
10% X7R
1206
2
1
C559
2.2UF
10% 50V X7R 1206
2
1
C558
2.2UF
10% 50V X7R 1206
2
1
C564
0.22uF
20% 25V CERM 805
2
1
C709
POLY
CASE-B-3528
100UF
20%
6.3V
2
1
C710
100UF
20%
6.3V POLY CASE-B-3528
2
1
C713
100UF
6.3V POLY
CASE-B-3528
20%
2
1
C568
NO STUFF
5%
CERM
402
50V
180pF
2
1
R401
63.4K
1% 1/16W MF 402
2
1
R400
20K
1% 1/16W MF 402
2
1
C572
0.01uF
20% 16V
CERM
402
2
1
R405
0
5%
1/16W
MF
402
2
1
R406
100K
1% 1/16W
402
MF
2
1
R407
100K
1% 1/16W MF 402
2
1
C569
402
CERM
50V
0.0022uF
10%
2
1
C567
50V
100pF
5%
CERM
402
2
1
R403
402
1/16W
5%
12K
MF
2
1
C571
0.0022uF
50V
CERM
10% 402
2
1
C570
100pF
5% 50V CERM 402
2
1
R404
15K
1/16W
1% MF
402
+5V_MAIN
2
1
C699
22uF
20%
10V CERM 1210
2
1
C700
22uF
20% 10V CERM 1210
2
1
C686
22uF
20% 10V CERM 1210
2
1
C687
20% 10V
CERM
22uF
1210
2
1
XW13
SM
2
1
R523
10
5% 1/16W MF 402
2
1
R539
10
5%
1/16W
MF
402
2
1
R537
10
5%
1/16W
MF
402
21
R522
0.005
1206
1/4W
1%
CRITICAL
FF
+24V_PBUS
21
C565
0.001uF
20% 50V
CERM
402
2
1
R411
1/16W
1M
402
5% MF
2
1
R399
1M
5% 1/16W MF 402
+5V_MAIN
+3V_MAIN
A
46
34
051-6680
3V_RUNSS
3V_RSNS
SLEEP_NET
3V_SLEEP_PWREN_L
+3V_SLP_ON
SLEEP_LS5
SLEEP_L_LS5
5V_VOSNS
5V_SW
3707_FSET
+4_6V_BU
3V_5V_OK
5V_RSNS
SLEEP
3V_SNSM
3V_SNSP
3V_VOSNS
+5V_HD_SLEEP
SLEEP_LS5
5V_HD_PWREN
3V_BOOST
5V_BG
3V_TG
3707_STBY
SLEEP_L_LS5_NET
+5V_MAIN_AUD
SLEEP_NET_INV
SLEEP
PMU_POWER_UP_L
DCDC_EN_L
DCDC_EN
SLEEP
5V_SLEEP_PWREN
5V_ITH_RC 3V_ITH_RC
+3V_SLP_OK_L
5V_ITH
+3V_MAIN_AUD
3707_FCB
5V_BOOST
SLEEP_LS5_EN_L
3V_SW 3V_BG
3V_BOOST_ESR
5V_BOOST_ESR
3707_INTVCC
3V_ITH
SLEEP_L_LS5_EN_L
SLEEP
LTC3707_START_RC
DCDC_EN_L
3707_SGND
5V_SNSP
5V_TG
5V_RUNSS
5V_SNSM
41
41
41
41
36
36
36
36
36
35
34
34
34
34
28
31
31
35
31
31
21
40
36
27
40
40
27
31
36
30
27
40
27
36
40
34
18
40
33
24
40
24
39
39
26
34
36
27
24
30
34
21
24
27
40
40
24
34
40
39
39
D0 D1 D2 D3 D4
SKP/SDN
VCC VDD
V+
ILIM
FBS
GNDS A/B
REF
TON CC
BST
DH
LX DL
GND
VGATE
FB
TIME
G
D
S
G
D
S
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
(1.28VCORE)
1.67GHZ
(1.26VCORE)
(VALUE WITHOUT OFFSET)
1.67GHZ
1.300V->0.975V
1.300V->0.975V
VCORE POWER SEQUENCING
Fmax Test Connections
ROUTE AS DIFFERENTIAL PAIR
1.67GHZ(1.26VCORE)
1.67GHZ
1.300V->0.990V
(CPU SPEC: 1.260V -> 0.980V)
(CPU SPEC: 1.200V -> 0.980V)
1.240V->0.990V
1.50GHZ
(CPU SPEC: 1.280V -> 0.980V)
1.320V->0.990V
A
(VCORE_VPLUS)
0
1
1
0
Hi/Fast
0
0
1
1
D<4..0>
<= 1K PD
>= 100K PD
>= 100K PU
<= 1K PU
Lo/Slow
Keep trace fat and short!!
NC (RFU)
A/B_ =
CPU core follows CPU I/O voltage (approx. 7ms delay)
1.200V->0.975V
1.50GHZ
MAX1717 VID INPUTS ARE 3.3-5V TOLERANT
<D0>
(VCORE_SNS)
(VCORE_GNDSNS)
(R93 CPU_BTR BOM OPTION SEE BOM TABLE)
Note:No stuff R67 to set skip mode of VCore
(R93&R97 CPU_BTR BOM OPTION SEE BOM TABLE)
(Rb)
(Ra)
OUTPUT VOLTAGE
V
DAC
D4=0 D4=1
D3 D2 D1 D0
0 1 0 1 0 1 0 1 0 1
1
0 0
1 0 1111
NO CPUNO CPU
1.30
1.35
1.40
1.45
1.50
1.55
1.60
1.65
1.70
1.75
1.80
1.85
1.90
1.95
2.00
1.275
1.250
1.225
1.200
1.175
1.150
1.125
1.100
1.075
1.050
1.025
1.000
0.975
0.950
0.925
1 1 1
0
0
1
1
0
0
1
1
0
0
1
1
0
000 0 0 0 0 0 0 0 1 1 1 1 1 1 1
1
0
0
0
0
1
1
1
1
0
0
0
FOR V-STEP:
When A/B_ is high (fast): D4-D0 read as-is When A/B_ is low (slow): <=1K-ohm -> 0 >=100K-ohm -> 1
If all pull-ups are >=100K and all
B
pull-downs are <=1K, V = V .
CLOSEST TO CPU
PIN OF 1000uF CAP
PLACE THIS SHORT AT
Keep trace fat and short!!
(CPU Vcore value with offset)
GROUND SENSE VOLTAGE DIVIDER
This allows for an offset to the ground sense to adjust the output voltage. VREF = 2.0V, HENCE VOFFSET = 2.0V*0.85*(Rb / Ra) AND VCORE = VDAC + VOFFSET.
NOTE: Ra NO STUFFED FOR NO OFFSET CASE
to GND at bottom-side FET
Connect MAX1717 GND pin 13
VGATE PULLUP PROVIDED BY INTREPID
<D1><D2><D3><D4>
TO PINS 15 & 13!!
PLACE C423 CLOSE
Keep trace fat (40-100 mils) and short!!
Keep trace fat and short!!
(VCORE=1.385V for EVTB)
VCORE SUPPLY
2
1
R106
100K
5%
1/16W
MF
402
+5V_MAIN
2
1
R101
100K
5%
1/16W
MF
402
2
3
1
Q8
2N3904
SM
2
3
1
Q5
2N3904
SM
2
1
R99
10K
5%
1/16W
MF
402
21
XW29
SM
21
XW27
SM
+PBUS
2
1
D5
MBR0530
SM
CRITICAL
2
1
C93
1uF
20% 10V CERM 603
+5V_MAIN
2
1
R86
20
5%
1/16W
MF
402
2
1
C64
20% 25V CERM 603
0.1uF
12
157
1
8
3
2
9
23
10 11
13
5
4
14
24
17
18
19
20
21
6
22
16
U7
MAX1717
QSOP
CRITICAL
21
R72
402
MF
1/16W
5%
100
21
XW2
SM
2
1
C70
402
CERM
50V
20%
0.001uF
2
1
R69
390K
5%
1/16W
MF
402
2
1
C84
1uF
20% 10V
CERM
603
2
1
R85
0
5%
1/16W
MF
402
2
1
C80
220pF
5%
25V
CERM
402
2
1
R91
27.4K
402
MF
1/16W
1%
2
1
C94
1uF
603
CERM
10V
20%
2
1
R95
12.7K
402
MF
1/16W
1%
2
1
C66
0.01uF
20% 16V
CERM
402
2
1
R66
CPU_BTR
0
5% 1/16W MF 402
21
XW28
SM
2
1
R98
402
MF
1/16W
1%
158K
5 2
DP2
BAS16TW
SOT-363
4 3
DP2
BAS16TW
SOT-363
6 1
DP2
BAS16TW
SOT-363
2
1
R67
178K
1%
1/16W
MF
402
2
1
C65
NO STUFF
0.0047uF
10% 25V CERM 402
2
1
R90
NO STUFF
1210
MF
1/4W
5%
2.2
2 1
R71
2.2
5%
1/16W
MF
603
2
1
C12
10uF
20%
805
CERM
6.3V
2
1
C74
10uF
20%
6.3V CERM
805
2
1
C100
10uF
20%
6.3V CERM
805
2
1
C16
10uF
20%
6.3V CERM
805
2
1
C101
10uF
20%
6.3V CERM
805
2
1
C15
10uF
20%
6.3V CERM
805
2
1
C6
10uF
20%
6.3V CERM
805
2
1
C21
10uF
20%
CERM
805
6.3V
2
1
C57
10uF
20%
6.3V CERM
805
2
1
C90
10uF
20%
6.3V CERM
805
2
1
C14
10uF
20%
6.3V CERM
805
2
1
C5
10uF
6.3V
20%
CERM
805
2
1
C3
10uF
20%
6.3V CERM
805
2
1
C63
10uF
6.3V CERM
805
20%
2
1
C83
805
CERM
6.3V
20%
10uF
2
1
C13
10uF
20%
6.3V CERM
805
2
1
C4
10uF
20%
6.3V CERM
805
2
1
C105
805
CERM
6.3V
20%
10uF
2
1
C106
10uF
20%
6.3V CERM
805
2
1
C76
805
CERM
6.3V
20%
10uF
3
2
1
7
8
9
10
11
6
5
4
12
J7
NO STUFF
M-ST-SM-52465-1217
21
R706
NO STUFF
2.05K
1%
1/16W
MF
402
21
R708
NO STUFF
100
1%
1/16W
MF
402
2
1
C79
603
CERM
50V
10%
0.0022uF
NO STUFF
2
1
D33
CRITICAL
B540C
SM
+3V_MAIN
2
1
R662
0
402
MF
1/16W
5%
2
1
R137
470K
5% 1/16W MF 402
CPU_BST&CPU_BST_VCORE126
2
1
R660
NO STUFF
0
402
MF
1/16W
5%
2
1
R634
CPU_BTR
402
MF
1/16W
5%
470K
2
1
R139
CPU_BTR
470K
5% 1/16W MF 402
2
1
R126
402
MF
1/16W
5%
470K
CPU_BST&CPU_BST_VCORE126
+3V_MAIN
21
R81
0
5%
1/16W
MF
402
21
R80
NO STUFF
0
5%
1/16W
MF
402
2
1
C77
OMIT
CRITICAL
10uF
CASE-D
TANT
16V
20%
2
1
C52
OMIT
CRITICAL
10uF
20% 16V
TANT
CASE-D
2
1
C92
OMIT
CRITICAL
10uF
CASE-D
TANT
16V
20%
2
1
C111
CRITICAL
OMIT
10uF
CASE-D
TANT
16V
20%
2
1
C51
OMIT
10uF
CASE-D
TANT
16V
20%
CRITICAL
2
1
C78
OMIT
CRITICAL
10uF
TANT
16V
20%
CASE-D
2
1
C91
OMIT
CRITICAL
10uF
TANT
16V
20%
CASE-D
2
1
R757
CPU_BTR
470K
5% MF
402
1/16W
C797
CRITICAL
330uF
20%
2.5V-ESR9V
POLY CASE-D2E
C774
CRITICAL
330uF
CASE-D2E
POLY
2.5V-ESR9V
20%
3
2
1
L71
CRITICAL
OMIT
1.2uH-18.3A
SM1
R743
0.001
1% 1W MF
2512
321
4
5
Q62
SI7860DP
SO-8-PWRPK
CRITICAL
321
4
5
Q65
CRITICAL
SO-8-PWRPK
SI7860DP
321
4
8765
Q60
SO-8
IRF7832
CRITICAL
321
4
8765
Q63
SO-8
IRF7832
CRITICAL
321
4
8765
Q66
SO-8
IRF7832
CRITICAL
2
1
C843
402
CERM
50V
20%
0.001uF
2
1
C842
402
CERM
50V
20%
0.001uF
2
1
C841
0.001uF
402
CERM
50V
20%
2
1
R790
100K
1/16W
5% MF
402
CPU_BST&CPU_BTR
+3V_MAIN
21
R791
0
5%
1/16W
MF
402
CPU_BST&CPU_BTR
21
R792
0
1/16W
MF 402
5%
CPU_BST_VCORE126
1
2
6
Q82
2N7002DW
SOT-363
4
5
3
Q82
SOT-363
2N7002DW
C802
CRITICAL
330uF
20%
2.5V-ESR9V POLY CASE-D2E
C788
CRITICAL
330uF
20%
POLY
2.5V-ESR9V CASE-D2E
C781
CASE-D2E
POLY
2.5V-ESR9V
20%
330uF
CRITICAL
C793
CASE-D2E
POLY
2.5V-ESR9V
20%
330uF
CRITICAL
2
1
R631
470K
402
MF
1/16W
5%
CPU_BST&CPU_BST_VCORE126
2
1
R65
0
402
1/16W
5%
MF
CPU_BST&CPU_BST_VCORE126
21
R93
1/16W MF
402
1%
6.04K
CPU_BST
21
R97
2K
1%
MF
1/16W
402
CPU_BST
2
1
R111
100K
1%
1/16W MF 402
051-6680
A
4635
1 ?
R97
CPU_BST_VCORE126
RES,MF,1/16W,1.5K OHM,1%,0402,SMD
114S1503
1
R93
CPU_BTR
?
RES,MF,1/16W,2.49K OHM,1%,0402,SMD
114S2493
1 ?
CPU_BTR
RES,MF,1/16W,4.02K OHM,1%,0402,SMD
R97
114S4023
1
R93
?
RES,MF,1/16W,0 OHM,5%,0402,SMD
CPU_BST_VCORE126
116S1000
CRITICAL
7
126S0036
CAP,AL,POLY,8.2uF,20%,16V,V CASE,SMD
C51,C52,C77,C78,C91,C92,C111
CRITICAL
1
152S0242
IND,PWR,1.0UH,20,20.5A,SMD
L71
MAXBUS_SLEEP
VCORE_VID<3>
VCORE_CC
VCORE_VID<1>
VCORE_SNS
VCORE_VID<2>
VCORE_VID<0>
VCORE_GNDA
VCORE_TON
VCORE_REF
VCORE_AB_SEL
VCORE_VID<1>
VCORE_SHDN_L
VCORE_DL
VCORE_GNDDIV
VCORE_LX
VCORE_BOOST
VCORE_GNDDIV
VCORE_VID<4>
CPU_VCORE_SLEEP
VCORE_FB
CPU_VCORE_SLEEP
VCORE_AB_SEL
VCORE_OFFSET_DIV
CPU_VCORE_SNUB
VCORE_D0
VCORE_TIME
VCORE_DH
+3V_PMU_RESET
VCORE_D4
VCORE_GND
VCORE_AB_SEL_OPT
VCORE_BST
CPU_VCORE_SEQ
CPU_VCORE_HI_OC
CPU_VCORE_PWR_SEQ
CPU_VCORE_SEQ_L
VCORE_D1 VCORE_D2 VCORE_D3
VCORE_GNDSNS
VCORE_VSENSE
VCORE_VGATE
SOFT_PWR_ON_L
VCORE_GNDSNS_TEST
INT_GPIO1_PU
VCORE_AB_SEL_INV
SLEEP_L_LS5
DCDC_EN
VCORE_GNDDIV_TEST
VCORE_ILIM
VCORE_GNDSNS
VCORE_VCC
VCORE_VID<3> VCORE_VID<4>
VCORE_VID<2>
40 16 15
41
41
36
8
40
40
41
34
7
35
35
31
28
34
6
40
40
6
41
6
41
31
40
40
24
21
30
40
5
35
40
35
40
35
40
40
40
35
35
5
40
35
40
40
35
35
5
40
5
35
40
40
31
40
7
35
14
23
14
18
21
40
35
40
35
35
35
AGND
THRML
NC_28
NC_23
NC_15
BST2
OUT1
TON
PGOOD REF
DL1
LX1
DH1
VCC
BST1
ON2
ON1
ILIM2
ILIM1
OUT2
SKIP
DL2
LX2
PGND
DH2
VDD
V+
FB1
FB2
PVINSVIN
SHDN/RT SYNC/MODE
SW VFB ITH
PGOOD
PGND SGND
G
D
S
G
D
S
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
3) CPU PLL Config Straps
2) CPU JTAG & MaxBus Pull-ups
1) MPC7447 - MAXBUS I/O - IF 1.8V INTERFACE
+1_8V_SLEEP LOADS
1.5V/1.8V/2.5V SUPPLIES
M11 Power Shut down Sequencing
1) FBCORE/FBIO IF USING D3COLD
+2_5V_SLEEP LOADS
DIODE PROVIDE PROVIDE QUICK SHUT-DOWN
POWER DOWN DELAY 1.5MS TO 3.5MS
1.5V/2.5V SWITCHER
1) INTREPID CORE
+1_5V_MAIN LOADS
2) MAXBUS I/O - IF 1.5V INTERFACE
1) AGP I/O - IF USING D3COLD
+1_5V_SLEEP LOADS
1.8V SWITCHER
+1_8V_MAIN LOADS
+2_5V_MAIN LOADS
1) MAP31 - FBCORE/FBIO IF USING D3HOT
2) GIGABIT ETHERNET - AVDDL
3) DDR SODIMMS - CORE/IO
(CONTINUOUS MODE)
MAX1715_GND
NC
4) DDR MUXES
1) INTREPID PLLS
(PULSE MODE)
(BURST MODE)
NC
NC
. .
NC
21
L63
CRITICAL
2.2uH
SM1
+2_5V_MAIN
2
1
C298
603
CERM
10V
20%
1uF
2 1
R177
5%
1/16W
MF
402
20
+1_8V_SLEEP
+1_8V_MAIN
2
1
C719
805
CERM
6.3V
20%
10uF
21
R566
100K
402
MF
1/16W
5%
4
3 6
5 2 1
U50
SI3447DV
TSOP
2
1
C715
805
CERM
6.3V
20%
10uF
21
C716
1000pF
10% 25V X7R 402
21
R557
5% MF
402
1/16W
100K
+2_5V_MAIN
+2_5V_SLEEP
2
1
C693
10pF
5%
50V
CERM
402
2021
4
5
29
69
7
22
141
11
10
28
23
15
1627
12
3
132
1924
1726
1825
8
U19
QSOP
MAX1715
CRITICAL
21
L67
SM4
CRITICAL
4.7uH
3 2 1
4
8 7 6 5
Q56
CRITICAL
IRF7805
SM
321
4
8765
Q55
SM
IRF7805
CRITICAL
2
1
R211
158K
1% 1/16W MF 402
2
1
R210
1/16W
402
MF
1%
158K
5 2
DP3
SOT-363
BAS16TW
21
R171
5%
1/16W
MF
603
4.7
21
R170
4.7
5%
1/16W
MF
603
2
1
C196
0.1uF
20% 25V CERM 603
2
1
D31
SM
MBRS130LT3
2
1
R212
402
MF
1/16W
1%
5.11K
2
1
R222
402
MF
1% 1/16W
10K
+1_5V_MAIN
+5V_MAIN
4 3
DP3
SOT-363
BAS16TW
2
1
C193
0.1uF
20% 25V CERM 603
2
1
C307
150uF
20%
6.3V TANT SMD-1
21
L65
CRITICAL
4.7uH
SM4
2
1
R220
0
5%
1/16W
MF
402
2
1
R226
NO STUFF
402
1/16W MF
5%
0
+PBUS
+PBUS
+PBUS
2
1
C267
SMD-1
TANT
6.3V
20%
150uF
2
1
C393
SMD-1
TANT
6.3V
20%
150uF
2
1
C405
150uF
20%
6.3V TANT SMD-1
2
1
C396
150uF
20%
6.3V TANT SMD-1
2
1
C338
1206
CERM
25V
20%
4.7uF
CRITICAL
2
1
C355
CRITICAL
1206
CERM
25V
20%
4.7uF
2
1
C209
CRITICAL
20%
25V CERM 1206
4.7uF
2
1
C232
CRITICAL
20%
25V CERM 1206
4.7uF
2
1
R227
NO STUFF
0
402
MF
1/16W
5%
2
1
R221
0
5%
1/16W
MF
402
NO STUFF
2
1
D30
MBRS130LT3
SM
2
1
C697
22uF
20% 10V CERM 1210
2
1
R525
1M
5% 1/16W MF 402
2
1
R526
NO STUFF
5% 1/16W MF 402
10K
2
1
R536
NO STUFF
10K
5% 1/16W MF 402
2
1
R532
402
1% 1/16W MF
16.2K
2
1
C691
1000pF
5% 25V CERM 603
9
2
4
7
1
3
6
8
5
10
U46
MSOP
LTC3411
CRITICAL
21
XW17
OMIT
SM
21
XW25
SM
OMIT
+1_5V_SLEEP
+1_5V_MAIN
2
1
C717
805
CERM
6.3V
20%
10uF
2
1
C725
10uF
20%
6.3V CERM 805
2
1
C738
20%
6.3V CERM 805
10uF
2
1
C194
805
CERM
10V
20%
2.2uF
2
1
C195
2.2uF
20% CERM
10V 805
6 1
DP3
SOT-363
BAS16TW
21
R184
402
MF
1/16W
5%
330K
2
1
C133
402
CERM
16V
20%
0.01uF
4
36
5
2
1
Q53
TSOP
SI3446DV
2
1
3
Q10
SM
2N7002
2
1
R117
402
MF
1/16W
5%
100K
321
4
8765
Q54
CRITICAL
SO-8
IRF7811W
3 2 1
4
8 7 6 5
Q57
SO-8
IRF7811W
CRITICAL
2
1
3
Q31
SM
2N7002
2 1
R535
1%
1/16W
MF
402
324K
2
1
R398
5% 1/16W MF 402
1M
+2_5V_SLEEP
+1_8V_SLEEP
+1_5V_SLEEP
+3V_SLEEP
61
DP4
SOT-363
BAS16TW
52
DP4
SOT-363
BAS16TW
43
DP4
SOT-363
BAS16TW
2 1
C722
402
X7R
10% 25V
1000pF
1
2
6
Q11
2N7002DW
SOT-363
4
5
3
Q11
SOT-363
2N7002DW
2
1
R115
402
MF
1/16W
5%
100K
+5V_MAIN
2
1
R116
402
MF
1/16W
5%
100K
21
R114
100K
5%
1/16W
MF
402
2
1
C129
402
X7R
10% 25V
1000pF
2
1
C718
1000pF
10% 25V X7R 402
2
1
C720
10% 25V X7R 402
NO STUFF
1000pF
21
R571
NO STUFF
100K
5%
1/16W
MF
402
2
1
C714
1000pF
10% 25V X7R 402
NO STUFF
21
R554
5%
1/16W
MF
402
100K
NO STUFF
21
XW21
SM
21
XW8
SM
21
XW10
SM
21
XW23
SM
2
1
C845
50V
402
CERM
20%
NO STUFF
0.001uF
2
1
C844
0.001uF
402
CERM
50V
20%
NO STUFF
7632
4
851
U48
SI6467BDQ
TSSOP
2
1
R468
1% 1/16W MF 402
15.4K
2
1
R601
402
10K
1% 1/16W MF
2
1
C695
10uF
20% 805
CERM
6.3V
2
1
R529
887K
402
1%
1/16W
MF
2
1
R528
698K
1%
1/16W
MF
402
21
R531
10
5% MF
1/16W
402
2
1
C690
CERM
603
10V
1uF
20%
2
1
R527
1M
5% 1/16W MF 402
+1_8V_MAIN
+3V_MAIN
4636
051-6680
A
SLEEP_L_LS5_INV
+1_8V_SLEEP_NECK
3V_5V_OK
LTC3411_VCC
SLEEP_L_LS5_INV
+2_5V_SLEEP_NECK2
1_5V_FB
LTC3411_GND
LTC3411_ITH_RC
SLEEP
LTC3411_ITH
1_5V_FB
LTC3411_SYNC
LTC3411_SHDN
LTC3411_EN_L
LTC3411_VCC
1_5V_SLEEP_EN_L
+1_5V_SLEEP_NECK
+3V_SLEEP_NECK
SLEEP_L_LS5
MAX1715_GND
2_5V_ILIM
1_5V_BST
1_5V_DL
+1_5V_MAIN
2_5V_FB
SLEEP
SLEEP_L_LS5_INV
1_8V_SW
2_5V_DH
2_5V_BST
2_5V_BOOST
2_5V_LX
SLEEP_L_LS5_NET
MAX1715_VCC
MAX1715_REF
1_8V_SLEEP_PWREN_L
MAX1715_SKIP
+2_5V_MAIN
MAX1715_GND
2_5V_DL
1_5V_ILIM
2_5V_SLEEP_PWREN_L
1_8V_VFB
DCDC_EN_L
MAX1715_TON
1_5V_SLEEP_EN_L
MAX1715_ON_RC
3V_5V_OK
1_5V_BOOST
1_5V_DH
1_5V_LX
41
41
36
35
36
34
34
34
36
31
28
31
36
34
40
40
27
40
40
21
40
40
27
40
40
34
36
40
24
36
36
40
36
40
40
24
40
36
40
40
36
36
40
18
36
40
40
40
36
24
36
40
40
40 40
40
34
40
40
40
36
36
40
40
40
34
40
36
24
40
40
40
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
SIGNAL CONSTRAINTS - PAGE 1
SECONDARY LAYERS: 2,9 GOAL: MINIMIZE EXPOSURE ON LONG NETS
PRIORITY: 2 PRIMARY LAYERS: 4,7
SECONDARY LAYERS: 2,9 GOAL: MINIMIZE
EXPOSED ROUTES MINIMIZE VIAS
GROUP
SIG_NAME
MATCHED_DELAY
PRIMARY LAYERS: 4,7
PRIORITY: 1
(200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200)
(200) (200) (200) (200) (200) (200)
(200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200)
(200)
(200)
(200)
(200)
(200) (200) (200) (200) (200) (200) (200) (200) (200) (200)
(200) (200)
(200)
(200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200)
(200)
(200)
(200) (200) (200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
(200)
(200)
(200) (200)
(200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200)
(200) (200)
(200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200) (200)
(200)
(200)
(200)
(200)
(200)
(200)
(200) (200) (200) (200) (200) (200) (200)
(200) (200) (200) (200) (200) (200)
(200)
(200)
(200)
(200)
STUB_LENGTH OF 200 MILS NEEDED WHEN WE CONVERT TO 14.2
FIREWIRE
ETHERNET
SOUND
CRYSTALS
OSC
&
M11
CLOCKS
INTREPID
MAX EXPOSED LENGTHMAX VIAS STUB_LENGTH NET_SPACING_TYPE PULSE PARAM
CLOCK LINE CONSTRAINTS
PROPAGATION_DELAY
PULSE_PARAMNO_TESTNET_SPACING_TYPESTUB_LENGTHMAX_VIASPROPAGATION_DELAYSIG_NAMEGROUP MAX_EXPOSED_LENGTH
DIGITAL SIGNALS
GROUP 0
GROUP 1
GROUP 2
GROUP 3
GROUP 4
DDR RAM
GROUP 5
GROUP 6
GROUP 7
ADDR
CONTROL
I256 I257
I258
I259
I260
I261 I262 I263 I264 I265 I266 I267 I268 I269
I270 I271 I272
I273
I274
I275
I276
I277
I278
I279 I280
051-6680
A
4637
25.00 MHz:::L:S::300 MIL
CLKENET_PHY_TX
25.00 MHz:::
L:S:8000 MIL:9000 MIL
500.0000
10 MIL SPACING
6
CLKENET_LINK_TX
125.0 MHz:::L:S::300 MIL
CLKENET_LINK_GTX
125.0 MHz:::
L:S:8000 MIL:9000 MIL
600.0000
10 MIL SPACING
6
CLKENET_PHY_GTX
49.15 MHz:::L:S::300 MIL
CLKFW_PHY_PCLK
49.15 MHz:::
L:S:7500 MIL:8000 MIL
10 MIL SPACING
500.0000
5
CLKFW_LINK_PCLK
49.15 MHz:::
L:S:7500 MIL:8000 MIL
10 MIL SPACING
500.0000
5
CLKFW_PHY_LCLK
98.03 MHz:::L:S::500 MIL
10 MIL SPACING
FW_XI
L:S::500
4
MEM_CKE<3..0>
L:S:2500:3200
7
RAM_CS_L<3..0>
L:S:2500:3200
7
RAM_CKE<3..0>
L:S::500 MIL
4
MEM_RAS_L
L:S:2000 MIL:4100 MIL
7
RAM_RAS_L
L:S::500 MIL
4
MEM_CAS_L
L:S::500
4
MEM_BA<1..0>
L:S::500
4
83 MHZ
MEM_ADDR<12..0>
L:S:1809 MIL:1887 MIL
500.0000
7
167.0 MHz:::
RAM_DQS_B<7>
L:S:1809 MIL:1887 MIL
500.0000
7
167.0 MHz:::
RAM_DQM_B<7>
L:S:1809:1887
500
7
167 MHZ
RAM_DATA_B<63..56>
L:S:1611 MIL:1696 MIL
7
500.0000
167.0 MHz:::
RAM_DQM_A<7>
L:S:1611:1696
500
7
167 MHZ
RAM_DATA_A<63..56>
L:S:1903 MIL:2000 MIL
500.0000
7
167.0 MHz:::
MEM_DQS<7>
L:S:1204 MIL:1357 MIL
500.0000
7
167.0 MHz:::
RAM_DQS_A<6>
L:S:2101 MIL:2170 MIL
500.0000
7
167.0 MHz:::
MEM_DQS<6>
L:S:2101:2170
500
7
167 MHZ
MEM_DATA<55..48>
L:S:1716 MIL:2102 MIL
500.0000
7
167.0 MHz:::
RAM_DQS_B<5>
L:S:1716 MIL:2102 MIL
500.0000
7
167.0 MHz:::
RAM_DQM_B<5>
7
L:S:1607:1898
500
167 MHZ
RAM_DATA_A<47..40>
L:S:1915 MIL:2000 MIL
500.0000
7
167.0 MHz:::
MEM_DQM<4>
L:S:1907 MIL:2356 MIL
500.0000
7
167.0 MHz:::
RAM_DQM_B<3>
L:S:1907:2356
500
7
167 MHZ
RAM_DATA_B<31..27>
L:S:1907 MIL:2356 MIL
7
167.0 MHz:::
RAM_DATA_B<26>
L:S:1907:2356
500
7
167 MHZ
RAM_DATA_B<25..24>
L:S:1700 MIL:2165 MIL
500.0000
7
167.0 MHz:::
RAM_DQM_A<3>
L:S:1707 MIL:1800 MIL
500.0000
7
167.0 MHz:::
RAM_DQM_A<2>
L:S:1435 MIL:1500 MIL
500.0000
7
167.0 MHz:::
MEM_DQS<2>
L:S:1435 MIL:1500 MIL
500.0000
7
167.0 MHz:::
MEM_DQM<2>
L:S:2004 MIL:2412 MIL
500.0000
7
167.0 MHz:::
RAM_DQM_B<1>
L:S:2004:2412
7
500
167 MHZ
RAM_DATA_B<15..8>
L:S:1905 MIL:2000 MIL
500.0000
7
167.0 MHz:::
RAM_DQS_A<1>
L:S:1435:1500
500
7
167 MHZ
MEM_DATA<23..16>
L:S:2004 MIL:2412 MIL
500.0000
7
167.0 MHz:::
RAM_DQS_B<1>
L:S:1905 MIL:2000 MIL
500.0000
7
167.0 MHz:::
RAM_DQM_A<1>
L:S:1905:2000
500
7
167 MHZ
RAM_DATA_A<15..8>
L:S:1344 MIL:1660 MIL
500.0000
7
167.0 MHz:::
MEM_DQS<1>
7
500.0000
L:S:1344 MIL:1660 MIL
167.0 MHz:::
MEM_DQM<1>
L:S:1344:1660
500
7
167 MHZ
MEM_DATA<15..8>
L:S:2000:2100
500
7
167 MHZ
RAM_DATA_B<7..0>
L:S:1903 MIL:2000 MIL
500.0000
7
167.0 MHz:::
RAM_DQS_A<0>
L:S:1903 MIL:2000 MIL
500.0000
7
167.0 MHz:::
RAM_DQM_A<0>
L:S:1903:2000
500
7
167 MHZ
RAM_DATA_A<7..0>
L:S:2000 MIL:2100 MIL
500.0000
7
167.0 MHz:::
RAM_DQM_B<0>
L:S:2000 MIL:2100 MIL
500.0000
7
167.0 MHz:::
RAM_DQS_B<0>
167.0 MHz:::
L:S:500 MIL:600 MIL
250.0000
10 MIL SPACING
5
INT_CPUFB_OUT_NORM
10 MIL SPACING
167.0 MHz:::
L:S:500 MIL:600 MIL
250.0000
5
INT_CPUFB_IN_NORM
167.0 MHz:::
L:S:700 MIL:800 MIL
10 MIL SPACING
250.0000
5
INT_CPUFB_IN
167.0 MHz:::
SYSCLK_DDRCLK_B1_UF:G:L:S:0 MIL:25 MIL
DDRCLK_B1_UFL:S:300 MIL:350 MIL
10 MIL SPACING
4
SYSCLK_DDRCLK_B1_L_UF
167.0 MHz:::
SYSCLK_DDRCLK_A0:G:L:S:0 MIL:25 MIL
L:S:2900 MIL:3000 MILDDRCLK_A0
10 MIL SPACING
250.0000
7
SYSCLK_DDRCLK_A0
250.0000
167.0 MHz:::
SYSCLK_DDRCLK_A0:G:L:S:0 MIL:25 MIL
L:S:2900 MIL:3000 MILDDRCLK_A0
10 MIL SPACING
7
SYSCLK_DDRCLK_A0_L
250.0000
167.0 MHz:::
SYSCLK_DDRCLK_A1:G:L:S:0 MIL:25 MIL
DDRCLK_A1L:S:2900 MIL:3000 MIL
10 MIL SPACING
7
SYSCLK_DDRCLK_A1
L:S::1800 MIL
10 MIL SPACING
500.0000
5
ATI_SSCLK_IN
L:S::200 MIL
10 MIL SPACING
5
ATI_SSCLK_UF
L:S::200 MIL
10 MIL SPACING
5
ATI_CLK27M_IN
33.00 MHz:::L:S::250 MIL
10 MIL SPACING
CLK33M_AIRPORT_UF
66.00 MHz:::
L:S:1450 MIL:1550 MIL
10 MIL SPACING
6
500.0000
INT_AGP_FB_IN
66.00 MHz:::L:S::150 MIL
10 MIL SPACING
INT_AGP_FB_OUT
66.00 MHz:::
L:S:1800 MIL:1900 MIL
10 MIL SPACING
400.0000
6
CLK66M_GPU_AGP
167.0 MHz:::
L:S:1900 MIL:2000 MIL
10 MIL SPACING
250.0000
5
INT_REF_CLK_IN
167.0 MHz:::
SYSCLK_DDRCLK_B0:G:L:S:0 MIL:25 MIL
L:S:3100 MIL:3200 MILDDRCLK_B0
7
250.0000
10 MIL SPACING
SYSCLK_DDRCLK_B0_L
SYSCLK_DDRCLK_B1_UF:G:L:S:0 MIL:25 MIL
L:S:300 MIL:350 MILDDRCLK_B1_UF
10 MIL SPACING
4
SYSCLK_DDRCLK_B1_UF
SYSCLK_DDRCLK_A1_UF:G:L:S:0 MIL:25 MIL
167.0 MHz:::
DDRCLK_A1_UFL:S:300 MIL:350 MIL
10 MIL SPACING
4
SYSCLK_DDRCLK_A1_UF
SYSCLK_DDRCLK_A0_UF:G:L:S:0 MIL:25 MIL
167.0 MHz:::
DDRCLK_A0_UFL:S:300 MIL:350 MIL
10 MIL SPACING
4
SYSCLK_DDRCLK_A0_L_UF
10 MIL SPACING
DDRCLK_A0_UFL:S:300 MIL:350 MIL
167.0 MHz:::
SYSCLK_DDRCLK_A0_UF:G:L:S:0 MIL:25 MIL
4
SYSCLK_DDRCLK_A0_UF
167.0 MHz:::
L:S:1050 MIL:1150 MIL
10 MIL SPACING
250.0000
5
INT_CPUFB_LONG
250.0000
167.0 MHz:::L:S::150 MIL
10 MIL SPACING
5
INT_CPUFB_OUT
250.0000
167.0 MHz:::
L:S:2650 MIL:2750 MIL
10 MIL SPACING
5
SYSCLK_CPU
L:S:1602:1700
7
500
167 MHZ
MEM_DATA<7..0>
L:S:1700:2165
500
7
167 MHZ
RAM_DATA_A<31..24>
L:S:1602 MIL:1700 MIL
7
500.0000
167.0 MHz:::
MEM_DQS<0>
L:S:1602 MIL:1700 MIL
7
500.0000
167.0 MHz:::
MEM_DQM<0>
L:S:1611 MIL:1696 MIL
500.0000
7
167.0 MHz:::
RAM_DQS_A<7>
33.00 MHz:::L:S::250 MIL
10 MIL SPACING
CLK33M_CBUS_UF
L:S::300 MIL
10 MIL SPACING
CLK18M_XTAL_IN
7
L:S:1903 MIL:2000 MIL
500.0000
167.0 MHz:::
MEM_DQM<7>
L:S:1400 MIL:1546 MIL
500.0000
7
167.0 MHz:::
RAM_DQM_B<6>
7
L:S:1400 MIL:1546 MIL
500.0000
167.0 MHz:::
RAM_DQS_B<6>
500
L:S:1400:1546
7
167 MHZ
RAM_DATA_B<55..48>
L:S:1607 MIL:1898 MIL
500.0000
7
167.0 MHz:::
RAM_DQS_A<5>
7
L:S:1607 MIL:1898 MIL
500.0000
167.0 MHz:::
RAM_DQM_A<5>
500.0000
L:S:1719 MIL:1893 MIL
7
167.0 MHz:::
MEM_DQS<5>
500.0000
L:S:1719 MIL:1893 MIL
7
167.0 MHz:::
MEM_DQM<5>
L:S:1719:1893
500
7
167 MHZ
MEM_DATA<47..40>
L:S:1404 MIL:1686 MIL
500.0000
7
167.0 MHz:::
RAM_DQS_B<4>
L:S:1404 MIL:1686 MIL
500.0000
7
167.0 MHz:::
RAM_DQM_B<4>
L:S:1404:1686
500
7
167 MHZ
RAM_DATA_B<39..32>
L:S:1707:1800
500
7
167 MHZ
RAM_DATA_A<23..16>
L:S:1707 MIL:1800 MIL
500.0000
7
167.0 MHz:::
RAM_DQS_A<2>
L:S:1900:2000
500
7
167 MHZ
RAM_DATA_B<23..16>
L:S:1900 MIL:2000 MIL
500.0000
7
167.0 MHz:::
RAM_DQM_B<2>
L:S:1900 MIL:2000 MIL
500.0000
7
167.0 MHz:::
RAM_DQS_B<2>
L:S:1233 MIL:1485 MIL
500.0000
7
167.0 MHz:::
MEM_DQM<3>
L:S:1700 MIL:2165 MIL
500.0000
7
167.0 MHz:::
RAM_DQS_A<3>
L:S:1915:2000
500
7
167 MHZ
MEM_DATA<39..32>
L:S:1205 MIL:1387 MIL
500.0000
7
167.0 MHz:::
RAM_DQM_A<4>
L:S:2101 MIL:2170 MIL
500.0000
7
167.0 MHz:::
MEM_DQM<6>
L:S:1204:1357
500
7
167 MHZ
RAM_DATA_A<55..48>
L:S:1204 MIL:1357 MIL
500.0000
7
167.0 MHz:::
RAM_DQM_A<6>
7
L:S:1903:2000
500
167 MHZ
MEM_DATA<63..56>
L:S:2000:3000
10
RAM_ADDR<12..0>
L:S:2000:3300
8
RAM_BA<1..0>
L:S::500
4
MEM_CS_L<3..0>
7
L:S:2000 MIL:4100 MIL
RAM_CAS_L
L:S::500 MIL
4
MEM_WE_L
8
L:S:2000 MIL:3100 MIL
RAM_WE_L
L:S:1233 MIL:1485 MIL
500.0000
7
167.0 MHz:::
MEM_DQS<3>
L:S:1233:1485
500
7
167 MHZ
MEM_DATA<31..24>
L:S:1205 MIL:1387 MIL
500.0000
7
167.0 MHz:::
RAM_DQS_A<4>
L:S:1907 MIL:2356 MIL
500.0000
7
167.0 MHz:::
RAM_DQS_B<3>
L:S:1205:1387
500
7
167 MHZ
RAM_DATA_A<39..32>
L:S:1915 MIL:2000 MIL
500.0000
7
167.0 MHz:::
MEM_DQS<4>
7
L:S:1700 MIL:3000 MIL
MEM_MUXSEL_LSB
8
L:S:1700 MIL:3000 MIL
MEM_MUXSEL_MSB
33.00 MHz:::L:S::250 MIL
10 MIL SPACING
CLK33M_NEC_UF
7
33.00 MHz:::
L:S:6500 MIL:7500 MIL
10 MIL SPACING
500.0000
INT_PCI_FB_IN
L:S:1716:2102
500
7
167 MHZ
RAM_DATA_B<47..40>
49.15 MHz:::L:S::300 MIL
CLKFW_LINK_LCLK
125.0 MHz:::
L:S:8000 MIL:9000 MIL
10 MIL SPACING
500.0000
6
CLKENET_LINK_GBE_REF
10 MIL SPACING
6
500.0000
INT_I2S0_SND_MCLK
125.0 MHz:::L:S::300 MIL
CLKENET_PHY_RX
125.0 MHz:::
L:S:8000 MIL:9000 MIL
10 MIL SPACING
6
800.0000
CLKENET_LINK_RX
33.00 MHz:::L:S::300 MIL
10 MIL SPACING
INT_PCI_FB_OUT
SYSCLK_DDRCLK_A1_UF:G:L:S:0 MIL:25 MIL
167.0 MHz:::
L:S:300 MIL:350 MILDDRCLK_A1_UF
10 MIL SPACING
4
SYSCLK_DDRCLK_A1_L_UF
167.0 MHz:::
SYSCLK_DDRCLK_B0_UF:G:L:S:0 MIL:25 MIL
DDRCLK_B0_UFL:S:300 MIL:350 MIL
10 MIL SPACING
4
SYSCLK_DDRCLK_B0_UF
167.0 MHz:::
167.0 MHz:::
SYSCLK_DDRCLK_B0_UF:G:L:S:0 MIL:25 MIL
L:S:300 MIL:350 MILDDRCLK_B0_UF
10 MIL SPACING
4
SYSCLK_DDRCLK_B0_L_UF
250.0000
167.0 MHz:::
SYSCLK_DDRCLK_A1:G:L:S:0 MIL:25 MIL
DDRCLK_A1L:S:2900 MIL:3000 MIL
10 MIL SPACING
7
SYSCLK_DDRCLK_A1_L
167.0 MHz:::
SYSCLK_DDRCLK_B0:G:L:S:0 MIL:25 MIL
L:S:3100 MIL:3200 MILDDRCLK_B0
10 MIL SPACING
250.0000
7
SYSCLK_DDRCLK_B0
167.0 MHz:::
SYSCLK_DDRCLK_B1:G:L:S:0 MIL:25 MIL
DDRCLK_B1L:S:3100 MIL:3200 MIL
10 MIL SPACING
250.0000
7
SYSCLK_DDRCLK_B1
167.0 MHz:::
SYSCLK_DDRCLK_B1:G:L:S:0 MIL:25 MIL
L:S:3100 MIL:3200 MILDDRCLK_B1
10 MIL SPACING
250.0000
7
SYSCLK_DDRCLK_B1_L
49.92 MHz:::L:S::400 MIL
10 MIL SPACING
INT_REF_CLK_OUT_UF
49.92 MHz:::
L:S:1000 MIL:1150 MIL
10 MIL SPACING
250.0000
5
INT_REF_CLK_OUT
66.00 MHz:::L:S::150 MIL
10 MIL SPACING
CLK66M_GPU_AGP_UF
33.00 MHz:::
L:S:9500 MIL:10500 MIL
10 MIL SPACING
500.0000
6
CLK33M_AIRPORT
33.00 MHz:::
L:S:4000 MIL:6000 MIL
10 MIL SPACING
7
500.0000
CLK33M_NEC
L:S::400 MIL
10 MIL SPACING
5
ATI_CLK27M_OSC
L:S::400 MIL
10 MIL SPACING
5
ATI_CLK27M_OSC_SS
L:S:1400 MIL:1500 MIL
10 MIL SPACING
CLK18M_INT_XIN
L:S:1250 MIL:1350 MIL
10 MIL SPACING
CLK18M_INT_XOUT
125.0 MHz:::L:S::300 MIL
CLKENET_PHY_GBE_REF
98.03 MHz:::L:S::300 MIL
10 MIL SPACING
FW_OSC
L:S::400 MIL
10 MIL SPACING
CLK18M_INT_EXT
33.00 MHz:::
L:S:5000 MIL:6000 MIL
10 MIL SPACING
9
500.0000
CLK33M_CBUS
250.0000
167.0 MHz:::
L:S:700 MIL:850 MIL
10 MIL SPACING
5
INT_CPUFB_OUT_SHORT
167.0 MHz:::L:S::150 MIL
10 MIL SPACING
SYSCLK_CPU_UF
41
41
28
28
29 29
11
11
11
11
11
11
11
11
10
11
10
10
11
11
11
10
11
11
11
11
11
11
10
10
11
11
11
10
11
11
11
10
10
10
11
11
11
11
11
11
11
11 11
21
21
19
11
8
10
11
10
10
11
10
11
11
11
11
11
10
10
10
11
11
11
11
11 11
11 11
10
11
10
11
10
11
11
10
11
11
11
11
10
10
11
11
11
10
10
10
11
28
27
28
11
11
11
11
26
17
18
28
13 13
13
29
13 13
29
9
9
9
9
9 9
9
9
10
10
10
10
10
9
10
9
9
10
10
10
9
10
10
10
10
10
10
9
9
10
10
10
9
10
10
10
9
9
9
10
10
10
10
10
10
8 8
8
9 9
9 9
19
19
19
12
12
12
12
14
9
9
9
9
9
8
8
5
9
10
9
9
10
12
14
9
10
10
10
10
10
9
9
9
10
10
10
10
10 10
10 10
9
10
9
10
9
10
10
9
9
9
9
9
9 9
9
9
10
10
10
9
9
9
12
12
10
13
13
14
28
13
12
9
9 9
9
9
9
9
14 14
12
12
12
19
19
14
14
28
29
14
12
8
8
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
(250) (250) (250) (250) (250) (250) (250) (250) (250) (250) (250) (250) (250)
(250)
(250)
(250) (250) (250) (250) (250) (250) (250)
STUB_LENGTH OF 250 MILS NEEDED WHEN DESIGN SWITCHED TO 14.2
MAXBUS
SIG_NAME
NET_SPACING_TYPESTUB_LENGTH
SECONDARY LAYERS: 4,7
GROUP
PRIORITY: 4 PRIMARY LAYERS: 9
GOAL: MINIMIZE TH VIAS
MAX_EXPOSED_LENGTH
MAX_VIAS
PROPAGATION_DELAY NO_TEST PULSE_PARAM
SIGNAL CONSTRAINTS - PAGE 1
ALL THE DVOD GROUP SIGNALS ROUTE AT LAYER 4 OR 7 AND ROUTE AS STANDARD 50OHM SIGNALS AT 4 MILS
ALL TMDS GROUP SIGNALS ROUTE AT LAYER 4 OR 7 AND HAVE SAME WIDTH SPACING RULE AS OTHER TMDS SIGNALES
TMDS/DVO SIGNAL CONSTRAINTS
DIGITAL SIGNALS
I239
I240
I241
I242
I243
I244
I245
I246
I263
I264
I265
I266
I267
I268 I269
I270
I271
I272 I273 I274 I275
I276 I277
I278
I279
I280 I281
I282 I283
I284
I285
I286 I287
I294
I295
I296
I297
I298
I299
I300 I301
I302 I303 I304
051-6680
A
4638
L:S:1500 MIL:3100 MIL
7
CPU_WT_L
100 OHM SPACING FOR TMDS
100 OHM SPACING FOR TMDS
8
SI_TMDS_DP<5>
SI_TMDS_D5
100 OHM SPACING FOR TMDS
100 OHM SPACING FOR TMDS
8
SI_TMDS_DN<5>
SI_TMDS_D5
100 OHM SPACING FOR TMDS
100 OHM SPACING FOR TMDS
8
SI_TMDS_DP<4>
SI_TMDS_D4
100 OHM SPACING FOR TMDS
100 OHM SPACING FOR TMDS
SI_TMDS_D3
8
SI_TMDS_DN<3>
100 OHM SPACING FOR TMDS
100 OHM SPACING FOR TMDS
SI_TMDS_D2
8
SI_TMDS_DP<2>
100 OHM SPACING FOR TMDS
100 OHM SPACING FOR TMDS
8
SI_TMDS_D2
SI_TMDS_DN<2>
100 OHM SPACING FOR TMDS
100 OHM SPACING FOR TMDS
8
SI_TMDS_D1
SI_TMDS_DN<1>
100 OHM SPACING FOR TMDS
100 OHM SPACING FOR TMDS
SI_TMDS_D0
8
SI_TMDS_DP<0>
100 OHM SPACING FOR TMDS
100 OHM SPACING FOR TMDS
SI_TMDS_D0
8
SI_TMDS_DN<0>
100 OHM SPACING FOR TMDS
100 OHM SPACING FOR TMDS
8
SI_TMDS_D1
SI_TMDS_DP<1>
L:S:1500 MIL:2700 MIL
7
CPU_GBL_L
L:S:1500 MIL:2800 MIL
7
CPU_HIT_L
L:S:1500 MIL:2700 MIL
7
CPU_QACK_L
L:S:1500 MIL:2700 MIL
7
CPU_TBST_L
TMDS_CONN_DP<1>
100 OHM SPACING FOR TMDS
500.0000
CONN_TMDS_D1
100 OHM SPACING FOR TMDS
4
TMDS_CONN_DN<1>
100 OHM SPACING FOR TMDS
500.0000
CONN_TMDS_D1
100 OHM SPACING FOR TMDS
4
L:S:1500:3500
7
CPU_TSIZ<0..2>
L:S:1100:2700
8
83 MHZ
CPU_DATA<32..63>
L:S:1500 MIL:2700 MIL
7
CPU_CI_L
L:S:1500:3100
7
83 MHZ
TRUE
CPU_ADDR<0..31>
L:S:1500 MIL:2700 MIL
7
CPU_AACK_L
L:S:1500 MIL:3000 MIL
7
CPU_TEA_L
L:S:1500 MIL:2700 MIL
7
CPU_TS_L
L:S:1500 MIL:2700 MIL
7
CPU_QREQ_L
L:S:1500:3400
7
CPU_TT<0..4>
L:S:1500 MIL:2700 MIL
7
CPU_TA_L
L:S:1500 MIL:2700 MIL
7
CPU_DBG_L
100 OHM SPACING FOR TMDS
100 OHM SPACING FOR TMDS
SITMDS:G:L:S:0 MIL:300 MIL
SI_CLKTMDS
5
SI_TMDS_CLKP
100 OHM SPACING FOR TMDS
100 OHM SPACING FOR TMDS
SITMDS:G:L:S:0 MIL:300 MIL
SI_CLKTMDS
5
SI_TMDS_CLKN
610.0000
ATIDVOD:G:L:S:1600 MIL:1700 MIL
6
ATI_DVO_HSYNC
TMDS_CONN_CLKP
100 OHM SPACING FOR TMDS
500.0000
TMDS_CONN:G:L:S:0 MIL:50 MIL
CLKCONN_TMDS
100 OHM SPACING FOR TMDS
4
TMDS_CONN_DN<0>
100 OHM SPACING FOR TMDS
500.0000CONN_TMDS_D0
100 OHM SPACING FOR TMDS
4
TMDS_CONN_DP<0>
100 OHM SPACING FOR TMDS
500.0000CONN_TMDS_D0
100 OHM SPACING FOR TMDS
4
TMDS_CONN_DN<2>
100 OHM SPACING FOR TMDS
500.0000
CONN_TMDS_D2
100 OHM SPACING FOR TMDS
4
TMDS_DN<3>
100 OHM SPACING FOR TMDS
500.0000
100 OHM SPACING FOR TMDS
8
TMDS_D3
TMDS_DN<4>
100 OHM SPACING FOR TMDS
500.0000
100 OHM SPACING FOR TMDS
TMDS_D4
8
TMDS_DP<4>
100 OHM SPACING FOR TMDS
500.0000
100 OHM SPACING FOR TMDS
TMDS_D4
8
TMDS_DP<5>
100 OHM SPACING FOR TMDS
500.0000
100 OHM SPACING FOR TMDS
TMDS_D5
8
TMDS_CONN_DP<5>
100 OHM SPACING FOR TMDS
500.0000
100 OHM SPACING FOR TMDS
4
CONN_TMDS_D5
500.0000
100 OHM SPACING
100 OHM SPACING
8
GPU_B
GPU_B
500.0000
100 OHM SPACING
100 OHM SPACING
8
GPU_G
GPU_G
500.0000
100 OHM SPACING
100 OHM SPACING
8
GPU_R
GPU_R
TMDS_CONN_DN<4>
100 OHM SPACING FOR TMDS
500.0000
100 OHM SPACING FOR TMDS
4
CONN_TMDS_D4
L:S:1500 MIL:2700 MIL
7
CPU_BR_L
L:S:1500 MIL:2700 MIL
7
CPU_ARTRY_L
L:S:1500 MIL:3200 MIL
7
CPU_DRDY_L
L:S:1500:2950
7
CPU_DTI<0..2>
L:S:1100:2700
83 MHZ
TRUE
7
CPU_DATA<0..31>
L:S:1500 MIL:2700 MIL
7
CPU_BG_L
TMDS_DP<3>
100 OHM SPACING FOR TMDS
500.0000
100 OHM SPACING FOR TMDS
TMDS_D3
8
TMDS_CONN_DP<3>
100 OHM SPACING FOR TMDS
500.0000
100 OHM SPACING FOR TMDS
4
CONN_TMDS_D3
TMDS_CONN_DN<3>
100 OHM SPACING FOR TMDS
500.0000
100 OHM SPACING FOR TMDS
4
CONN_TMDS_D3
TMDS_DN<5>
100 OHM SPACING FOR TMDS
500.0000
100 OHM SPACING FOR TMDS
TMDS_D5
8
610.0000
ATIDVOD:G:L:S:1600 MIL:1700 MIL
6
ATI_DVOD_DE
610
ATIDVOD:G:L:S:1600 MIL:1700 MIL
6
ATI_DVOD<23..0>
610.0000
6
ATI_DVO_VSYNC
ATIDVOD:G:L:S:1600 MIL:1700 MIL
100 OHM SPACING FOR TMDS
100 OHM SPACING FOR TMDS
SI_TMDS_D3
8
SI_TMDS_DP<3>
100 OHM SPACING FOR TMDS
100 OHM SPACING FOR TMDS
SI_TMDS_D4
8
SI_TMDS_DN<4>
610.0000
ATIDVOD:G:L:S:0 MIL:1100 MIL
6
165.0 MHz:::
GPU_DVO_CLKP_R1
TMDS_CONN_DP<2>
100 OHM SPACING FOR TMDS
500.0000
CONN_TMDS_D2
100 OHM SPACING FOR TMDS
4
610.0000
ATIDVOD:G:L:S:0 MIL:500 MIL
6
165.0 MHz:::
ATI_DVO_CLKP
610.0000
ATIDVOD:G:L:S:0 MIL:1100 MIL
6
165.0 MHz:::
GPU_DVO_CLKP_R2
TMDS_CONN_CLKN
100 OHM SPACING FOR TMDS
500.0000
TMDS_CONN:G:L:S:0 MIL:50 MIL
CLKCONN_TMDS
100 OHM SPACING FOR TMDS
4
TMDS_CONN_DP<4>
100 OHM SPACING FOR TMDS
500.0000
100 OHM SPACING FOR TMDS
4
CONN_TMDS_D4
TMDS_CONN_DN<5>
100 OHM SPACING FOR TMDS
500.0000
100 OHM SPACING FOR TMDS
4
CONN_TMDS_D5
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
21
41
23
23
23
23
23
23
23
8
8
8
8
8
8
23
23
21
21
21
20
21
20
41
5
20
20
20
20
20
20
20
20
20
20
5
5
5
5
23
23
5
6
5
5
5
5
5
5
5
5
5
20
20
20
23
23
23
23
20
20
20
20
23
21
21
21
23
5
5
5
5
6
5
20
23
23
20
20
20
20
20
20
19
23
19
19
23
23 23
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PRIMARY LAYERS: 4,7 FOR CONTROLLED IMPEDANCE DIFF PAIRS SECONDARY LAYERS: 2,9 FOR UNCONTROLLED IMPEDANCE DIFF PAIRS
PRIORITY: 3
MAX_VIASMAX_EXPOSED_LENGTHDIFFERENTIAL_PAIRSIG_NAMEGROUP
(400)
(400)
(400)
(400)
TOTAL UIDE+HD SKEW <500MIL
(200)
(200) (200) (200) (200) (200) (200) (200)
(400)
(400)
(400) (400)
NEED TO MATCH DELAY TO 250
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(250) (250)
(250)
(350) (350)
(250)
REMOVE CONSTRAIN TO AVOID DRC OCCUR
NET_SPACING_TYPE
RELATIVE_PROPAGATION_DELAY
Digital Signals (cont’d)
Differential Signals
PROPAGATION_DELAY
MAX_VIAS
MAX_EXPOSED_LENGTH
STUB_LENGTH
NET_SPACING_TYPE
NO_TEST
PULSE_PARAM
SIG_NAMEGROUP
AGP
AGP BYTES 0-1
AGP BYTES 2-3
AGP SIDEBAND
AGP CONTROL
PCI
ULTRA ATA-100
EIDE
INTREPID
OPTICAL
ETHERNET MII
FIREWIRE MII
THERMOSTAT
Zo = 90
USB 2.0
Zo = 90
USB 1.1
Zo = 100
TMDS
UPPER
LOWER
Zo = 100
LVDS
Zo = 100
ETHERNET
Zo = 110
FIREWIRE
GOAL: MINIMIZE TH VIAS
SECONDARY LAYERS: 4,7
PRIMARY LAYERS: 9
PRIORITY: 4
PRIORITY: 7 PRIMARY
LAYERS: 4,7 SECONDARY
LAYERS: 2,9
PRIORITY: 6 PRIMARY
LAYERS: 4,7 SECONDARY
LAYERS: 2,9
PRIORITY: 8 PRIMARY
LAYERS: 4,7 SECONDARY
LAYERS: 2,9
PRIORITY: 5 PRIMARY
LAYERS: 4,7
LAYERS: 2,9
SECONDARY
PRIORITY: 5 PRIMARY
LAYERS: 4,7 SECONDARY
LAYERS: 2,9
SIGNAL CONSTRAINTS - PAGE 2
LAYERS 2 OR 9
Zo(single) = 46.6 OHMS
Zo(diff) = 89.8 OHMS
T = 0.6MIL (TRACE THICKNESS)
H = 9.6MIL (DIST BETW PLANES)
S = 5.6MIL (TRACE SEPERATION)
W = 3.9MIL (TRACE WIDTH)
Er = 4.3 (DIELECTRIC CONSTANT)
LAYERS 4 OR 7
Zo(single) = 50 OHMS
Zo(diff) = 94 OHMS
T = 0.6MIL (TRACE THICKNESS)
H = 9.6MIL (DIST BETW PLANES)
S = 4.9MIL (TRACE SEPERATION)
W = 3.1MIL (TRACE WIDTH)
Er = 4.3 (DIELECTRIC CONSTANT)
LAYERS 4 OR 7
asymmetric stackup.
Zo will be lower due to
Clear adjacent power plane!
Zo(single) = 55.4 OHMS
Zo(diff) = 106.2 OHMS
T = 0.6MIL (TRACE THICKNESS)
H = 16.8MIL (DIST BETW PLANES)
S = 11MIL (TRACE SEPERATION)
W = 3MIL (TRACE WIDTH)
Er = 4.3 (DIELECTRIC CONSTANT)
LAYERS 4 OR 7
I233 I234 I235 I236 I237 I238
I239
I240
I241 I242
I243
I244
051-6680
A
4639
TMDS_CLKN
500.0000
5
CLKTMDS
100 OHM SPACING
TMDS:G:L:S:0 MIL:50 MIL
100 OHM SPACING
TMDS_DP<0>
TMDS_D0
8
500.0000
100 OHM SPACING
100 OHM SPACING
33.00 MHz:::
L:S::850 MIL
EIDE_CS1_L
33.00 MHz:::
L:S::500 MIL
EIDE_IOCHRDY
33.00 MHz:::
L:S::500 MIL
EIDE_INT
33.00 MHz:::
L:S::500 MIL
EIDE_RST_L
FW_TPI0N
500.0000
FW_TPI0
110 OHM SPACINGFW_TPI0:G:L:S:0 MIL:5 MIL
500.0000
FW_TPB1
FW_TPB1P
110 OHM SPACINGFW_TPB1:G:L:S:0 MIL:4%
500.0000
FW_TPI1N
FW_TPI1
110 OHM SPACINGFW_TPI1:G:L:S:0 MIL:4%
500.0000
FW_TPI1P
FW_TPI1
110 OHM SPACINGFW_TPI1:G:L:S:0 MIL:4%
500.0000
FW_TPO1
FW_TPO1P
110 OHM SPACINGFW_TPO1:G:L:S:0 MIL:4%
ENET_MDI0
ENET 11 MIL SPACING
ENET_MDI0:G:U43.31:J23.2:0 MIL:100 MIL
ENET 11 MIL SPACING
MDI_M<0>
CLKLVDS_LN
CLKLVDS_L
500.0000
4
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
5V_SNSM 5V_SNSP
1772_CSIP
1772_CSIN
1772_CSSP
THERM2_DP
THERM2:G:L:S:0 MIL:100 MIL
THERM2_DM
THERM2:G:L:S:0 MIL:100 MIL
THERM1_DP
THERM1:G:L:S:0 MIL:100 MIL
THERM1:G:L:S:0 MIL:100 MIL
THERM1_DM
NEC_USB_DBP
USB_D2
500.0000
USB_D2:G:L:S:0 MIL:20 MIL
90 OHM SPACING
USB_D2
NEC_USB_DBM
500.0000
USB_D2:G:L:S:0 MIL:20 MIL
90 OHM SPACING
NEC_USB_DAP
USB_D1
500.0000
USB_D1:G:L:S:0 MIL:20 MIL
90 OHM SPACING
USB_TPAD_P
USB_TPAD_P
TPAD_USB:G:L:S:0 MIL:200 MIL
5.6 MIL SPACING
USB_TPAD_N
USB_TPAD_N
TPAD_USB:G:L:S:0 MIL:200 MIL
5.6 MIL SPACING
BT_USB_DP
BT_USB_D
BT_USB:G:L:S:0 MIL:200 MIL
5.6 MIL SPACING
BT_USB_DM
BT_USB_D
BT_USB:G:L:S:0 MIL:200 MIL
5.6 MIL SPACING
8
TMDS_DP<1>
500.0000
TMDS_D1
100 OHM SPACING
100 OHM SPACING
ENET_MDI0
MDI_P<0>
ENET_MDI0:G:U43.29:J23.1:0 MIL:100 MIL
ENET 11 MIL SPACING
ENET 11 MIL SPACING
FW_TPB1N
500.0000
FW_TPB1
110 OHM SPACINGFW_TPB1:G:L:S:0 MIL:4%
FW_TPA1P
500.0000
FW_TPA1
110 OHM SPACINGFW_TPA1:G:L:S:0 MIL:4%
FW_TPA1
500.0000
FW_TPA1N
110 OHM SPACINGFW_TPA1:G:L:S:0 MIL:4%
FW_TPO0
500.0000
FW_TPO0N
110 OHM SPACINGFW_TPO0:G:L:S:0 MIL:5 MIL
FW_TPI0
FW_TPI0P
500.0000
110 OHM SPACINGFW_TPI0:G:L:S:0 MIL:5 MIL
500.0000
FW_TPO0
FW_TPO0P
110 OHM SPACINGFW_TPO0:G:L:S:0 MIL:5 MIL
FW_TPAO0 500.0000
FW_TPAO0N
110 OHM SPACING
FW_TPAO0:G:L:S:0 MIL:5 MIL
FW_TPAO0P
FW_TPAO0 500.0000
110 OHM SPACING
FW_TPAO0:G:L:S:0 MIL:5 MIL
ENET_MDI1
MDI_P<1>
ENET 11 MIL SPACING
ENET_MDI1:G:U43.33:J23.3:0 MIL:100 MIL
ENET 11 MIL SPACING
MDI_M<1>
ENET_MDI1
ENET 11 MIL SPACING
ENET_MDI1:G:U43.34:J23.4:0 MIL:100 MIL
ENET 11 MIL SPACING
ENET_MDI2
ENET 11 MIL SPACING
ENET_MDI2:G:U43.41:J23.8:0 MIL:100 MIL
ENET 11 MIL SPACING
MDI_M<2> MDI_P<3>
ENET_MDI3
ENET_MDI3:G:U43.42:J23.9:0 MIL:100 MIL
ENET 11 MIL SPACING
ENET 11 MIL SPACING
LVDS_L0
LVDS_L0P
500.0000
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
LVDS_L1N
500.0000
LVDS_L1
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
LVDS_L1
500.0000
LVDS_L1P
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
CLKLVDS_U
CLKLVDS_UN
500.0000
4
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
LVDS_U0
500.0000
LVDS_U0N
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
LVDS_U2P
500.0000
LVDS_U2
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
TMDS_DN<0>
TMDS_D0
8
500.0000
100 OHM SPACING
100 OHM SPACING
ATI_CLKTMDS
ATI_TMDS_CLKN
5
200.0000
100 OHM SPACING
ATITMDS:G:L:S:0 MIL:50 MIL
100 OHM SPACING
ATI_TMDS_CLKP
ATI_CLKTMDS
5
200.0000
100 OHM SPACING
ATITMDS:G:L:S:0 MIL:50 MIL
100 OHM SPACING
ATI_TMDS_DN<0>
ATI_TMDS_D0
8
200.0000
100 OHM SPACING
100 OHM SPACING
ATI_TMDS_DP<1>
ATI_TMDS_D1
8
200.0000
100 OHM SPACING
100 OHM SPACING
USB_DFM
USB_DF
USB_DF:G:L:S:0 MIL:200 MIL
5.6 MIL SPACING
USB_DEP
USB_DE
USB_DE:G:L:S:0 MIL:200 MIL
5.6 MIL SPACING
USB_DF
USB_DFP
USB_DF:G:L:S:0 MIL:200 MIL
5.6 MIL SPACING
1772_CSSN
3V_SNSM 3V_SNSP
THERM2_M_DM THERM2_M_DP THERM1_A_DM THERM1_A_DP THERM2_A_DM THERM2_A_DP
7
FW_PHY_DATA<7..0>
L:S:4700:5500
FW_PINT
L:S:8500 MIL:9500 MIL
FW_LINK_CNTL<1..0>
L:S:9000:10000
7
FW_LINK_DATA<7..0>
L:S:2700:3500
ENET_CRS
L:S:8000 MIL:9000 MIL
ENET_COL
L:S:8000 MIL:9000 MIL
ENET_MDC
L:S:8000 MIL:9000 MIL
ENET_MDIO
L:S:8000 MIL:9000 MIL
ENET_LINK_TX_EN
L:S::400 MIL
ENET_LINK_TXD<7..0>
L:S::600
7
ENET_PHY_TXD<7..0>
L:S:8000:9000
7
ENET_LINK_RXD<7..0>
L:S:8000:9000
33.00 MHz:::
L:S:4500 MIL:6500 MIL
EIDE_OPTICAL_DMA_RQ
33.00 MHz:::
L:S:4500 MIL:6500 MIL
EIDE_OPTICAL_WR_L
33.00 MHz:::
L:S:4500 MIL:6500 MIL
EIDE_OPTICAL_CS0_L
33.00 MHz:::
L:S:4500 MIL:6500 MIL
EIDE_OPTICAL_CS1_L
33 MHZ
L:S:4000:6000
EIDE_OPTICAL_DATA<15..0>
33.00 MHz:::
L:S::500 MIL
EIDE_DMACK_L
33.00 MHz:::
L:S::500 MIL
EIDE_RD_L
33.00 MHz:::
L:S::850 MIL
EIDE_CS0_L
7
100.0 MHz:::
10 MIL SPACING
L:S:6200 MIL:6300 MIL
HD_IOCHRDY
7
100.0 MHz:::
10 MIL SPACING
L:S:6100 MIL:6150 MIL
HD_DIOR_L
7
100 MHZ
L:S:5000:6500
HD_ADDR<2..0>
100 MHZ
L:S::600
UIDE_DATA<6..0>
MIN_DAISY_CHAIN
33.00 MHz:::L:S:6000 MIL:12500 MIL
PCI_STOP_L
MIN_DAISY_CHAIN
33 MHzL:S:6000:12500
PCI_CBE<3..0>
MIN_DAISY_CHAIN
33 MHzL:S:6000:12500
PCI_AD<31..0>
6
66.00 MHz:::L:S:1250 MIL:1950 MIL
AGP_RBF_L
6
66.00 MHz:::L:S:1250 MIL:1950 MIL
AGP_PAR
7
66.00 MHz:::L:S:1250 MIL:1950 MIL
AGP_DEVSEL_L
6
66.00 MHz:::L:S:1250 MIL:1950 MIL
AGP_TRDY_L
6
66.00 MHz:::L:S:1250 MIL:1950 MIL
AGP_IRDY_L
6
66.00 MHz:::L:S:1250 MIL:1950 MIL
AGP_FRAME_L
7
66 MHzL:S:1050:1450
AGP_SBA<7..0>
7
66 MHzL:S:1050:1450
AGP_CBE<3..2>
7
66 MHzL:S:1050:1450
AGP_AD<31..16>
6
8 MIL SPACING
133.0 MHz:::L:S:1050 MIL:1450 MIL
AGP_AD_STB_L<0>
6
8 MIL SPACING
133.0 MHz:::L:S:1050 MIL:1450 MIL
AGP_AD_STB<0>
7
66 MHzL:S:1050:1450
AGP_CBE<1..0>
6
8 MIL SPACING
133.0 MHz:::L:S:1050 MIL:1450 MIL
AGP_AD_STB_L<1>
6
8 MIL SPACING
66.00 MHz:::L:S:1050 MIL:1450 MIL
AGP_SB_STB_L
6
66.00 MHz:::L:S:1250 MIL:1950 MIL
AGP_GNT_L
MIN_DAISY_CHAIN
33.00 MHz:::L:S:6000 MIL:12500 MIL
PCI_FRAME_L
MIN_DAISY_CHAIN
33.00 MHz:::L:S:6000 MIL:12500 MIL
PCI_IRDY_L
7
66 MHzL:S:1050:1450
AGP_AD<15..0>
6
8 MIL SPACING
133.0 MHz:::L:S:1050 MIL:1450 MIL
AGP_AD_STB<1>
MIN_DAISY_CHAIN
33.00 MHz:::L:S:6000 MIL:12500 MIL
PCI_PAR
100 MHZ
L:S::710
UIDE_DATA<15..8>
100 MHZ
L:S::650
UIDE_ADDR<2..0>
100.0 MHz:::
10 MIL SPACING
L:S::600 MIL
UIDE_IOCHRDY
100.0 MHz:::
L:S::400 MIL
UIDE_INTRQ
7
100 MHZ
L:S:5000:6500
HD_DATA<15..0>
33 MHZ
L:S:4000:6000
EIDE_OPTICAL_ADDR<2..0>
33.00 MHz:::
L:S:4500 MIL:6500 MIL
EIDE_OPTICAL_DMAACK_L
ENET_RX_DV
L:S:8000 MIL:9000 MIL
FW_LINK_LREQ
L:S::300 MIL
MIN_DAISY_CHAIN
33.00 MHz:::L:S:6000 MIL:12500 MIL
PCI_TRDY_L
MIN_DAISY_CHAIN
33.00 MHz:::L:S:6000 MIL:12500 MIL
PCI_DEVSEL_L
7
100.0 MHz:::
L:S:3000 MIL:6000 MIL
HD_CS0_L
7
100.0 MHz:::
L:S:3000 MIL:6000 MIL
HD_CS1_L
7
ENET_PHY_TX_EN
L:S:8000 MIL:9000 MIL
ENET_LINK_TX_ER
L:S::400 MIL
7
ENET_PHY_TX_ER
L:S:8000 MIL:9000 MIL
7
100.0 MHz:::
L:S:4500 MIL:6000 MIL
HD_DMACK_L
7
100.0 MHz:::
L:S:3000 MIL:5200 MIL
HD_DIOW_L
7
100.0 MHz:::
L:S:4000 MIL:6000 MIL
HD_RESET_L
100.0 MHz:::
L:S::400 MIL
UIDE_DMARQ
100.0 MHz:::
L:S::400 MIL
UIDE_DMACK_L
100.0 MHz:::
L:S::400 MIL
UIDE_RST_L
100.0 MHz:::
U51.V1:RP19.3::600 MIL
UIDE_DATA<7>
6
8 MIL SPACING
66.00 MHz:::L:S:1050 MIL:1450 MIL
AGP_SB_STB
USB_DE
USB_DEM
USB_DE:G:L:S:0 MIL:200 MIL
5.6 MIL SPACING
ATI_TMDS_D2
ATI_TMDS_DP<2>
500.0000
8
100 OHM SPACING
100 OHM SPACING
ATI_TMDS_DN<2>
ATI_TMDS_D2
500.0000
8
100 OHM SPACING
100 OHM SPACING
8
TMDS_D2
TMDS_DN<2>
500.0000
100 OHM SPACING
100 OHM SPACING
8
TMDS_D1
TMDS_DN<1>
500.0000
100 OHM SPACING
100 OHM SPACING
500.0000
LVDS_U0
LVDS_U0P
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
MDI_M<3>
ENET_MDI3
ENET 11 MIL SPACING
ENET_MDI3:G:U43.43:J23.10:0 MIL:100 MIL
ENET 11 MIL SPACING
500.0000
LVDS_L0
LVDS_L0N
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
500.0000
LVDS_L2
LVDS_L2P
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
CLKLVDS_UP
500.0000
4
CLKLVDS_U
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
6
66.00 MHz:::L:S:1250 MIL:1950 MIL
AGP_REQ_L
MDI_P<2>
ENET_MDI2
ENET 11 MIL SPACING
ENET_MDI2:G:U43.39:J23.7:0 MIL:100 MIL
ENET 11 MIL SPACING
CLKLVDS_LP
CLKLVDS_L
500.0000
4
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
33.00 MHz:::
L:S:4500 MIL:6500 MIL
EIDE_OPTICAL_READ_L
7
100.0 MHz:::
L:S:4500 MIL:6000 MIL
HD_DMARQ
33.00 MHz:::
L:S:4500 MIL:6500 MIL
EIDE_OPTICAL_RST_L
33.00 MHz:::
L:S:5000 MIL:7000 MIL
EIDE_OPTICAL_INT
33.00 MHz:::
L:S:4500 MIL:6500 MIL
EIDE_OPTICAL_IOCHRDY
100.0 MHz:::
L:S::400 MIL
UIDE_DIOW_L
100.0 MHz:::
10 MIL SPACING
L:S::600 MIL
UIDE_DIOR_L
6
66.00 MHz:::L:S:1250 MIL:1950 MIL
AGP_STOP_L
100.0 MHz:::
L:S::500 MIL
UIDE_CS0_L
FW_PHY_LREQ
L:S:8500 MIL:9500 MIL
ENET_RX_ER
L:S:8000 MIL:9000 MIL
33.00 MHz:::
L:S::500 MIL
EIDE_DMARQ
FW_PHY_CNTL<1..0>
L:S::300
100.0 MHz:::
L:S::500 MIL
UIDE_CS1_L
33 MHZ
L:S::850
EIDE_DATA<15..0>
7
100.0 MHz:::
L:S:3000 MIL:5000 MIL
HD_INTRQ
LVDS_U1N
500.0000
LVDS_U1
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
LVDS_L2
500.0000
LVDS_L2N
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
33.00 MHz:::
L:S::500 MIL
EIDE_WR_L
33 MHZ
L:S::850
EIDE_ADDR<2..0>
ATI_TMDS_D0
ATI_TMDS_DP<0>
8
200.0000
100 OHM SPACING
100 OHM SPACING
LVDS_U1P
500.0000
LVDS_U1
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
500.0000
LVDS_U2N
LVDS_U2
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
NEC_USB_DAM
USB_D1
500.0000
USB_D1:G:L:S:0 MIL:20 MIL
90 OHM SPACING
FW_TPO1N
500.0000
FW_TPO1
110 OHM SPACINGFW_TPO1:G:L:S:0 MIL:4%
FW_TPBI0P
FW_TPBI0 500.0000
110 OHM SPACING
FW_TPBI0:G:L:S:0 MIL:5 MIL
FW_TPBI0 500.0000
FW_TPBI0N
110 OHM SPACING
FW_TPBI0:G:L:S:0 MIL:5 MIL
ATI_TMDS_DN<1>
ATI_TMDS_D1
8
200.0000
100 OHM SPACING
100 OHM SPACING
TMDS_CLKP
500.0000
CLKTMDS
5
TMDS:G:L:S:0 MIL:50 MIL
100 OHM SPACING
100 OHM SPACING
THERM1_M_DP
THERM1_M_DM
TMDS_D2
TMDS_DP<2>
8
500.0000
100 OHM SPACING
100 OHM SPACING
41
41
26
41
41
41
41 41
26
26
18
26
26
26
26 26
41
41
41
41
41
41
41
41
41
41
41
41
41
41
41 41
41
41
18
18
17
18
18
18
18 18
41
41
41
41
41
41
41
41
23
23
26
26
26 26
30
30
41 41
41
41
23
27
27
27
24
24
27
27
23
41
30
30
30
30
30
30
41 41
41 41
23 23
23
23
21
21
21
21
29
29
29
28
28
28
28
28
28
41
41
41
41
41
26
26
26
26
17
17
12
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
17
17
19
19
17
26
26
26
41
41
28
17 17
28
28
26
26
26
19
21
21
23
23
41
23
23
19
41
23
41
26
41
41
41
26 26
19
26
29
28
26
26
26
26
23
26
26
21
27
41
21
23
23
20
20
13
13
13 13
29
29
30 30
30
28
21
34
34
32
32
32
27
27
27
27
17
17
17
14
14
14
14
20
28
29
29
29
29
29
29
30 30
28 28
28 28
21 21
21
20
20
20
20
20
14
14
14
32
34 34
27 27
27
27 27
27
29
13
13
13
13
13
13
13
13
13
13
13
26
26
26
26
26
13
13
13
26
26
26
13
12
12
9
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
13
13
13 13
26
26
26
13
13
12 12
26 26
13
13
13
26
26
26
13
13
13
13
12
14
20
20
20
20
28
21
21
12
28
21
26
13
26
26
26
13 13
12
13
13
13
13
29
13
13
13
21
13
13
20
17
30
30
30
20
20
27
27
20
IN
IN
IN
IN
IN
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
OPT DRIVER
LMU CONN
CY28512D
INT PLLS
LTC1962
LTC3411
LTC1778
MAX1717
CONTROL
1.65V SWITCHER
2.5V SWITCHER
MAX1715
3V SWITCHER
5V SWITCHER
LTC3707
14V SWITCHER
LTC1625
INTREPID
PLLS
REFERENCE
AIRPORT
CARDBUS ATI M11
ETHERNET
SIG_NAME
VOLTAGE
TRACKPAD
MIN_LINE_WIDTH
GROUP
MIN_NECK_WIDTHMIN_LINE_WIDTHVOLTAGE
GROUP
MIN_NECK_WIDTHMIN_LINE_WIDTHVOLTAGE
SIG_NAME
MIN_NECK_WIDTH
MAIN/SLEEP
ADAPTER
BATTERY CHARGER
PMU
MISC
HALL EFFECT
TRACKPAD
HD
VIDEO
AUDIO
FAN
I/O AREA INVERTER
LVDS
FW
DDR RAM
CPU
GROUP
88E1111
NEC USB2.0
SIG_NAME
POWER NET CONSTRAINTS
SIGNAL CONSTRAINTS - PAGE 3
I308
I310
I311
I312
I314
I315
I316
I317
CHGND1
CHGND2
CHGND3
CHGND4
I332
I333
I345
I346
I347 I348
I349
I350 I351
I352
I353 I354
I355
I356
I357
I358
I359
I360 I361
I362 I363
I364
I365
I366
I367
051-6680
A
4640
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=6
VOLTAGE=0V
MIN_LINE_WIDTH=25MIN_NECK_WIDTH=12
VOLTAGE=0V
VOLTAGE=0V
MIN_LINE_WIDTH=25MIN_NECK_WIDTH=12
VOLTAGE=0V
MIN_NECK_WIDTH=12MIN_LINE_WIDTH=25
VOLTAGE=0V
MIN_LINE_WIDTH=25MIN_NECK_WIDTH=12
VOLTAGE=0V
MIN_LINE_WIDTH=10
INT_MEM_REF_H
MIN_LINE_WIDTH=8
1_8V_VFB
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=1.3V
CPU_AVDD_VOUT
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=3.3V
CPU_AVDD_VIN
VOLTAGE=1.3V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
CPU_VCORE_SLEEP
VOLTAGE=1.3V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
CPU_AVDD
VOLTAGE=2.5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
+2_5V_MARVELL
VOLTAGE=1.0V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
LTC3405_SW
VOLTAGE=12.8V
MIN_NECK_WIDTH=12
MIN_LINE_WIDTH=100
+FW_AMP_SENSE
VOLTAGE=33V
MIN_NECK_WIDTH=12
MIN_LINE_WIDTH=100
+FW_PWR_OR
VOLTAGE=3.3V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+3V_FW_AVDD_PORT1
VOLTAGE=3.3V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+3V_FW_AVDD_PORT2
VOLTAGE=3.3V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+3V_FW_UF
VOLTAGE=3.3V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
+3V_FW
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=0V
FAN2_GND
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=0V
FAN1_GND
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=5V
+FAN_PWR
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=3.3V
+3V_MAIN_AUD
MIN_LINE_WIDTH=25
VOLTAGE=0V
GPU_TV_GND2
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=15
VOLTAGE=5V
+5V_DDC_SLEEP
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=14V
+14V_INV
MIN_LINE_WIDTH=10
VOLTAGE=5V
+5V_TPAD_SLEEP
MIN_LINE_WIDTH=10
VOLTAGE=4.85V
+4_85V_ESR
MIN_LINE_WIDTH=10
VOLTAGE=4.6V
+4_6V_BU
MIN_LINE_WIDTH=10
VOLTAGE=4.85V
+4_85V_RAW
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=0V
BATT_NEG
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=16.8V
+BATT_POS
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=50
VOLTAGE=24V
+ADAPTER_SENSE
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=50
VOLTAGE=24V
+ADAPTER_SW
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=50
VOLTAGE=24V
+ADAPTER
MIN_NECK_WIDTH=6
MIN_LINE_WIDTH=25
VOLTAGE=1.8V
+1_8V_MAIN
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=2.5V
+2_5V_SLEEP
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
VOLTAGE=2.5V
+2_5V_MAIN
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=3.3V
+3V_PMU
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=5V
+5V_MAIN
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=12.8V
+PBUS
MIN_NECK_WIDTH=25MIL
MIN_LINE_WIDTH=10MIL
VOLTAGE=12.8V
+BATT
VOLTAGE=1.8V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
+1_8V_GPU_PNLPLL
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=1.5V
+1_5V_LDO
VOLTAGE=1.5V
MIN_NECK_WIDTH=6
MIN_LINE_WIDTH=15
+1_5V_INTREPID_PLL8
VOLTAGE=5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
VCORE_VCC
VOLTAGE=1.4V
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=200
VCORE_LX
MIN_LINE_WIDTH=25
VOLTAGE=0V
TV_GND2
VOLTAGE=1.25V
MIN_LINE_WIDTH=10
INT_MEM_VREF
VOLTAGE=3.3V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+3V_GPU_FLT
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=12.6V
1772_LX
MIN_LINE_WIDTH=10
VOLTAGE=24V
1772_DCIN
VOLTAGE=1.8V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
+1_8V_ATI_TPVDD
VOLTAGE=1.8V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=10
+1_8V_GPU_MEMPLL
VOLTAGE=2.5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
+2_5V_GPU_PNLIO
VOLTAGE=1.8V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
+1_8V_GPU
VOLTAGE=2.5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
GPU_MEM_IO_FLT
MIN_LINE_WIDTH=25
VOLTAGE=0V
GPU_TV_GND1
MIN_LINE_WIDTH=25
VOLTAGE=5V
MIN_NECK_WIDTH=10
+5V_SLEEP_OPT
MIN_LINE_WIDTH=8
1778_VRNG
MIN_LINE_WIDTH=8
1778_ITH_RC
MIN_LINE_WIDTH=8
1778_ION
VOLTAGE=1.2V
MIN_LINE_WIDTH=50 MIN_NECK_WIDTH=10
GPU_VCORE_SW
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
1778_TG
MIN_NECK_WIDTH=10
VOLTAGE=5V
MIN_LINE_WIDTH=15
1778_BST_RC
MIN_LINE_WIDTH=8
VOLTAGE=0V
VCORE_GNDSNS
VOLTAGE=2.5V
MIN_LINE_WIDTH=30 MIN_NECK_WIDTH=10
+2_5V_GPU
VOLTAGE=2.5V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
GPU_MEM_IO
VOLTAGE=2.5V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+2_5V_GPU_MEMCORE
VOLTAGE=1.5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
+1_5V_AGP
VOLTAGE=1.8V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
+1_8V_ATI_PVDD
VOLTAGE=1.5V
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10
+1_5V_AGP_GPU
VOLTAGE=1.5V
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10
+1_5V_GPU_VDD15
VOLTAGE=1.8V
MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10
+1_8V_GPU_VDDDI
VOLTAGE=1.2V
MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10
GPU_VCORE_VDDCI
VOLTAGE=2.5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
+2_5V_GPU_A2VDD
VOLTAGE=1.8V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
+1_8V_GPU_AVDD
VOLTAGE=1.8V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
+1_8V_GPU_PNLIO
VOLTAGE=2.5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=10
+2_5V_GPU_MCLK
MIN_NECK_WIDTH=10
VOLTAGE=1.8V
MIN_LINE_WIDTH=10
+1_8V_GPU_AVDDQ
VOLTAGE=3.3V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=10
+3V_ATI_OSC_SLEEP
VOLTAGE=3.3V
MIN_LINE_WIDTH=10 MIN_NECK_WIDTH=10
+3V_ATI_SS
VOLTAGE=1.5V
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10
+GPU_VDD15_UF
VOLTAGE=2.5V
MIN_LINE_WIDTH=10
+2_5V_SLEEP_NECK1
VOLTAGE=1.5V
MIN_LINE_WIDTH=10
+1_5V_AGP_NECK
VOLTAGE=1.2V
MIN_LINE_WIDTH=10
GPU_VCORE_NECK
VOLTAGE=2.5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
+2_5V_MARVELL_AVDD
VOLTAGE=1.0V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
+1_0V_MARVELL
MIN_LINE_WIDTH=30 MIN_NECK_WIDTH=10
VOLTAGE=1.8V
1_8V_SW_F
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
VOLTAGE=14V
1778_VIN
MIN_LINE_WIDTH=10
VOLTAGE=0V
VCORE_GNDA
VOLTAGE=1.25V
MIN_LINE_WIDTH=10
INT_AGP_VREF
ENET_CTAP_CHGND
MIN_NECK_WIDTH=12MIN_LINE_WIDTH=25
VOLTAGE=0V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
VOLTAGE=2.5V
2_5V_DH
MIN_LINE_WIDTH=10
VOLTAGE=0V
1772_GND
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
VOLTAGE=5V
2_5V_BST
VOLTAGE=1.5V
MIN_NECK_WIDTH=6
MIN_LINE_WIDTH=15
+1_5V_INTREPID_PLL1
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=14V
1625_VSW
MIN_LINE_WIDTH=10
VOLTAGE=24V
1625_VIN
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
VOLTAGE=5V
2_5V_BOOST
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=50
VOLTAGE=2.5V
2_5V_LX_F
VOLTAGE=1.5V
MIN_NECK_WIDTH=6
MIN_LINE_WIDTH=15
+1_5V_INTREPID_PLL6
VOLTAGE=1.5V
MIN_NECK_WIDTH=6
MIN_LINE_WIDTH=10
+1_5V_INTREPID_PLL4
VOLTAGE=1.5V
MIN_NECK_WIDTH=6
MIN_LINE_WIDTH=15
+1_5V_INTREPID_PLL7
MIN_LINE_WIDTH=10
VOLTAGE=14V
+PBUS_JUMPER
MIN_LINE_WIDTH=10
VOLTAGE=5V
1625_EXTVCC
MIN_LINE_WIDTH=10
VOLTAGE=5V
1625_INTVCC
MIN_LINE_WIDTH=10
VOLTAGE=0V
1625_SGND
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
VOLTAGE=1.2V
1V20_REF
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=10
VOLTAGE=5V
3707_INTVCC
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=5V
5V_SW
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=3.3V
3V_SW
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=3.3V
+3V_MAIN_JUMPER
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=50
VOLTAGE=1.5V
1_5V_LX
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=50
VOLTAGE=1.5V
1_5V_LX_F
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
VOLTAGE=5V
1_5V_BST
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
VOLTAGE=5V
1_5V_BOOST
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
VOLTAGE=1.5V
1_5V_DH
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
VOLTAGE=1.5V
1_5V_DL
MIN_LINE_WIDTH=8
1_5V_ILIM
MIN_LINE_WIDTH=8
MAX1715_TON
VOLTAGE=2.0V
MIN_LINE_WIDTH=8
MAX1715_REF
VOLTAGE=5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
MAX1715_VCC
VOLTAGE=0V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=30
MAX1715_GND
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
VCORE_DH
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=3.3V
+HD_LOGIC_SLEEP
MIN_LINE_WIDTH=10
VOLTAGE=3.3V
+3V_PMU_ESR
MIN_LINE_WIDTH=10
VOLTAGE=3.3V
+3V_PMU_AVCC
VOLTAGE=12.8V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
FW_VDD_ON
VOLTAGE=0V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
FW_VGND1
VOLTAGE=0V
MIN_LINE_WIDTH=100
MIN_NECK_WIDTH=12
FW_VGND0
VOLTAGE=1.95V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+1_95V_FW_PLL500VDD
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=5V
+5V_INV_SW
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=5V
+5V_INV_UF_SW
VOLTAGE=5V
MIN_LINE_WIDTH=8
VCORE_TON
VOLTAGE=1.8V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
+1_8V_GPU_TP_PLL
MIN_LINE_WIDTH=10
VOLTAGE=24V
+ADAPTER_OR_BATT
MIN_LINE_WIDTH=8
VCORE_ILIM
MIN_LINE_WIDTH=8
VOLTAGE=1.4V
VCORE_FB
VOLTAGE=5V
MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10
VCORE_BOOST
VOLTAGE=0V
MIN_LINE_WIDTH=8
UIDE_REF
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=3.3V
+VCC_CBUS_SW
VOLTAGE=1.2V
MIN_LINE_WIDTH=30 MIN_NECK_WIDTH=10
GPU_VCORE
VOLTAGE=3.3V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+3V_GPU
VOLTAGE=3V
MIN_LINE_WIDTH=10
+3V_SLEEP_NECK
VOLTAGE=1.8V
MIN_LINE_WIDTH=10
+1_8V_PVDD_NECK
VOLTAGE=1.5V
MIN_LINE_WIDTH=10
+GPU_VDD15_NECK
VOLTAGE=2.5V
MIN_LINE_WIDTH=10
+2_5V_SLEEP_NECK2
VOLTAGE=1.8V
MIN_LINE_WIDTH=10
+1_8V_SLEEP_NECK
VOLTAGE=1.5V
MIN_LINE_WIDTH=10
+1_5V_SLEEP_NECK
VOLTAGE=1.95V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+1_95V_FW_PLL400VDD
VOLTAGE=1.95V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+1_95V_FW_PLLVDD
VOLTAGE=1.95V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+1_95V_FW_DVDD_PORT1
VOLTAGE=1.95V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+1_95V_FW_DVDD_TX0
MIN_LINE_WIDTH=30 MIN_NECK_WIDTH=10
VOLTAGE=1.8V
1_8V_SW
MIN_LINE_WIDTH=8
1778_VFB
MIN_LINE_WIDTH=8
VOLTAGE=0V
VCORE_GNDDIV
MIN_LINE_WIDTH=8
VOLTAGE=1.4V
VCORE_SNS
MIN_LINE_WIDTH=8
VOLTAGE=1.5V
1_5V_FB
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
VOLTAGE=2.5V
2_5V_DL
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=3.3V
3V_RSNS
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=5V
+5V_MAIN_JUMPER
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=5V
5V_RSNS
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=24V
+24V_PBUS
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=12.6V
+BATT_24V_FUSE
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=12
VOLTAGE=3.3V
+3V_LCD
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=3.3V
+3V_LCD_SW
VOLTAGE=3.3V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+3V_FW_AVDD
VOLTAGE=33V
MIN_NECK_WIDTH=12
MIN_LINE_WIDTH=100
+FW_VP1
VOLTAGE=12.8V
MIN_NECK_WIDTH=12
MIN_LINE_WIDTH=100
+FW_SW
VOLTAGE=1.95V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+1_95V_FW_DVDD_RX0
VOLTAGE=1.95V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+1_95V_FW_DVDD
VOLTAGE=12.8V
MIN_NECK_WIDTH=12
MIN_LINE_WIDTH=100
+FW_PBUS
VOLTAGE=3.3V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
+3V_NEC_VDD
VOLTAGE=3.3V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
NEC_AVDD
VOLTAGE=33V
MIN_NECK_WIDTH=12MIN_LINE_WIDTH=40
LM2594_IN
VOLTAGE=3.3V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+3V_FW_AVDD_PORT0
VOLTAGE=1.25V
MIN_LINE_WIDTH=10
DDR_VREF
VOLTAGE=1.5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
+1_5V_INTREPID_PLL
MIN_NECK_WIDTH=6
MIN_LINE_WIDTH=10
VOLTAGE=1.5V
+1_5V_INTREPID_PLL3
VOLTAGE=1.5V
MIN_LINE_WIDTH=15
MIN_NECK_WIDTH=6
+1_5V_INTREPID_PLL2
MIN_LINE_WIDTH=10
VOLTAGE=0V
3707_SGND
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=50
VOLTAGE=2.5V
2_5V_LX
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
LTC1962_INT_VIN
VOLTAGE=1.8V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
MAXBUS_SLEEP
MIN_LINE_WIDTH=10
VOLTAGE=24V
+ADAPTER_ILIM
MIN_LINE_WIDTH=10
VOLTAGE=5.4V
1772_DLOV
MIN_LINE_WIDTH=10
VOLTAGE=5.4V
1772_LDO
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=10
VOLTAGE=12.6V
+BATT_VSNS
MIN_NECK_WIDTH=6
MIN_LINE_WIDTH=25
VOLTAGE=3.3V
+3V_SLEEP
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=3.3V
+3V_MAIN
MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10
VOLTAGE=5V
+5V_SLEEP
VOLTAGE=3.3V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
+3V_AIRPORT
VOLTAGE=5V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+VPP_CBUS_SW
MIN_LINE_WIDTH=8
2_5V_ILIM
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
VOLTAGE=5V
1778_BST
MIN_LINE_WIDTH=8
1778_ITH
MIN_LINE_WIDTH=8
1778_FCB
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10
VOLTAGE=3.3V
LTC3411_VCC
MIN_LINE_WIDTH=30 MIN_NECK_WIDTH=10
VOLTAGE=0V
LTC3411_GND
MIN_LINE_WIDTH=8
LTC3411_ITH_RC
MIN_LINE_WIDTH=8
LTC3411_ITH
MIN_LINE_WIDTH=8
LTC3411_SYNC
MIN_LINE_WIDTH=8
LTC3411_SHDN
VOLTAGE=3.3V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+3V_MAIN_SSCG
MIN_LINE_WIDTH=25
VOLTAGE=3.3V
MIN_NECK_WIDTH=10
+3V_MAIN_LMU
MIN_LINE_WIDTH=8
VCORE_VGATE
MIN_LINE_WIDTH=8
VCORE_TIME
MIN_LINE_WIDTH=8
VCORE_CC
MIN_LINE_WIDTH=8
VCORE_REF
VOLTAGE=5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
VCORE_BST
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
VCORE_DL
MIN_LINE_WIDTH=8
MAX1715_SKIP
MIN_LINE_WIDTH=25
VOLTAGE=3.3V
MIN_NECK_WIDTH=10
+3V_SLEEP_PCCARD
MIN_LINE_WIDTH=30
VOLTAGE=0V
VCORE_GND
VOLTAGE=1.2V
MIN_LINE_WIDTH=50 MIN_NECK_WIDTH=10
GPU_VCORE_SW_F
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
1778_BG
MIN_LINE_WIDTH=30
VOLTAGE=0V
MIN_NECK_WIDTH=10
1778_GND
MIN_NECK_WIDTH=10
VOLTAGE=5V
MIN_LINE_WIDTH=20
1778_VCC
MIN_NECK_WIDTH=6
MIN_LINE_WIDTH=15
VOLTAGE=1.5V
+1_5V_INTREPID_PLL5
VOLTAGE=1.8V
MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10
+1_8V_GPU_PLL
VOLTAGE=3.3V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
+3V_INTREPID_USB
VOLTAGE=2.5V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+2_5V_INTREPID
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=1.8V
+1_8V_SLEEP
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=1.5V
+1_5V_MAIN
MIN_LINE_WIDTH=25
VOLTAGE=1.5V
MIN_NECK_WIDTH=10
+1_5V_SLEEP
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=1.5V
+1_5V_SLEEP_VIN
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=50
VOLTAGE=24V
+ADAPTER_SW
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=12.6V
+BATT_14V_FUSE
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=12.6V
+BATT_RSNS
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=5V
+5V_HD_SLEEP
MIN_LINE_WIDTH=10
VOLTAGE=3.3V
+3V_HALL_EFFECT
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=15
VOLTAGE=5V
+5V_DDC_SLEEP_UF
MIN_LINE_WIDTH=25
VOLTAGE=0V
TV_GND1
MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25
VOLTAGE=5V
+5V_MAIN_AUD
MIN_LINE_WIDTH=50
VOLTAGE=0V
AUD_GND
VOLTAGE=33V
MIN_NECK_WIDTH=12
MIN_LINE_WIDTH=100
+FW_VP0
VOLTAGE=33V
MIN_NECK_WIDTH=12
MIN_LINE_WIDTH=100
+FW_PWR1
35
22
16
21
15
41
22
19
22
8
16
35
41
21
16
41
21
14
7
15
6
30
30
41
34
41
41
34
33
41
41
40
33
41
20
22
15
22
19
33
31
41
41
21
19
41
41
41
12
6
41
35
10
40
34
41
41
34
41
9
36
5
5
5
5
28
28
29
29
29
29
29
41
41
27
27
23
23
23
41
33
33
31
32
32
32
32
32
41
41
41
41
41
22
14
35 35
23
9
22
32
32
22
22
22
19
22
23
26
21
21
21
21
21
21
35
22
19
22
12
21
22
21
22
19 22
22
22
22 22
19 19
21
21
21
21
28 28
36
21
35
12
36
32
36
14
33
33
36
36
12
14
8
33 33
33
33 32
34
34
34
34
36
36
36 36
36
36 36
36
36 36
36
35
26
33
27
30
30
29
23
23
35
22
33
35
35
35
13
18
19
12
36
21
21 36
36
36
29
29
29
29
36
21
35
35
36
36
34
34
34
41
32
23
23
29
30
30
29
29
30
17 17
29
29
11
8
14
14
34
36
14
5
33
32
32
32
41
24
41
41
18
36
21
21
21
36
36
36
36
36 36
24
14
35
35
35
35
35
36
18
35
21
21
21
21
12
22
14
9
32
32
32
26
24
23
23
27
27
30
30
IN
IN
IN
IN IN
IN IN
IN
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
FUNC_DIST IS SIMILARLY USED TO DEFINE MAXIMUM DISTANCE FROM A CONNECTOR.
LISTS THE NUMBER OF TEST POINTS ON THAT NET AND WITHIN THAT GROUP/CONNECTOR.
FUNC_TEST IS ONLY PROPERTY USED BY THE TOOLS. FUNC_QTY IS FOR REFERENCE AND
PROBES ARE ON BOTTOM SIDE. MINIMUM PAD/HOLE SIZE IS 25 MIL.
FUNCTIONAL TEST POINTS
SCAN/TEST
BATTERY
LIO
S-VIDEO
INVERTER
USB
RT. USB WIRELESS
OPTICAL
TRACKPAD
SERIAL
FANS
ETHERNET
FIREWIRE
LMU/ALS
SIG_NAME
DVI
CARDBUS
PWR/GND
INT I2C
FUNC_DIST
GROUP
SIG_NAME
FUNC_TEST
SIG_NAME
GROUP
FUNC_QTY
FUNC_DIST FUNC_DIST
FUNC_QTY
FUNC_TEST
GROUP
FUNC_TEST
FUNC_QTY
KEYBOARD
LVDS
MODEM/
REMOVE CONSTRAIN FOR UNUSED FUNCTIONAL TP
(CONT.)
MISC.
FIREWIRE
DC PWR IN
(100 MIL PROBE PREFERRED) (100 MIL PROBE PREFERRED)
(100 MIL PROBE PREFERRED)
(100 MIL PROBE PREFERRED)
I1
I10
I100
I101
I102
I103
I104
I105
I106
I107
I108
I109
I11
I110
I111
I112
I113
I114
I115
I116
I117
I118
I119
I12
I120
I121
I123
I124
I125
I126
I127
I128 I129
I13
I130
I131
I132
I133
I134
I135
I136
I139
I14
I140
I141
I142
I143
I144
I145
I146
I147
I148
I149
I15
I150
I151
I152
I153
I154
I155
I156
I157
I158
I159
I16
I160
I161
I162
I163
I164
I166
I167
I168 I169
I17
I170
I171
I173
I174
I176
I177
I178
I179
I18
I180
I181
I182
I183
I184
I185
I186 I187
I188
I189
I19
I192
I195 I196
I197
I198
I2
I20
CHGND1
I21
I215 I216
I217
I218
I219 I220
I221
I222
I223
I224
I225 I226
I229
I230
I24
CHGND4
I248
I249
I25
I250
I251
I252
I253
I254 I255
I256
I257 I258
I259
I26
I260
I261 I262 I263 I264
I27
I3
I35
I36
I39
I4
I40
I41
I42
I43
I44
I45
I46
I47 I48 I49
I5
I51
I52
I53
I54
I55
I56
I57
I58 I59
I6
I60 I62
I66
I67
I68
I7
I70
I71
I72
I73 I74
I75
I76
I77
I78
I79
I8
I80
I81
I82
I83
I84 I85 I86
I87 I88 I89
I9
I90
I94
I95
I96
I97 I98 I99
46
A
051-6680
41
TRUE
1000
6
2
2000
TRUE
TRUE 1000
6
1000
TRUE
1000
6
TRUE
1000
TRUE
2
2000
TRUE TRUE
1000
6
TRUE
3000
+5V_TPAD_SLEEP
TRUE
3000
TPAD_F_TXD
2000
TRUE
EIDE_OPTICAL_CS1_L
2000
TRUE
EIDE_OPTICAL_RST_L
2000
TRUE
EIDE_OPTICAL_DATA<0..15>
4
TRUE
2000
+3V_AIRPORT
1000
TRUE
AIRPORT_CLKRUN_L
1000
TRUE
RF_DISABLE_L
2000
TRUE
EIDE_OPTICAL_DMA_RQ
2000
TRUE
EIDE_OPTICAL_READ_L
TRUE
2000
EIDE_OPTICAL_DMAACK_L
TRUE
2000
EIDE_OPTICAL_ADDR<0..2>
TRUE
1000
ROM_RW_L
1000
TRUE
AIRPORT_PCI_INT_L
1000
TRUE
AIRPORT_PCI_REQ_L
1000
TRUE
PCI_STOP_L
1000
TRUE
PCI_DEVSEL_L
1000
PCI_IRDY_L
TRUE
PCI_AD<0..31>
TRUE
1000
USB_TPAD_P
TRUE
USB_TPAD_N
TRUE
BT_USB_DP
TRUE
1000
TRUE
PCI_PAR
1000
TRUE
CLK33M_AIRPORT
1000
TRUE
ROM_ONBOARD_CS_L
TRUE
3000
TPAD_F_RXD
TRUE
2000
EIDE_OPTICAL_IOCHRDY
TRUE
ROM_CS_L
1000
TRUE
ROM_OE_L
1000
1000
TRUE
PMU_PME_L
1000
TRUE
MAIN_RESET_L
1000
PCI_TRDY_L
TRUE
TRUE
NEC_RUSB_OCI_UF
TRUE
NEC_RUSB_PPON
PMU_SLEEP_LED
TRUE TRUE
PMU_LID_CLOSED_L LMU_DETECT
TRUE
1000
TRUE
AIRPORT_PCI_GNT_L
1000
TRUE
FW_VGND
ST7_SLEEP_LED_H
TRUE
NEC_USB_DAP
TRUE
NEC_USB_DBM
TRUE
BT_USB_DM
TRUE
NEC_USB_DAM
TRUE
COMM_TRXC
4000
TRUE
TRUE
INT_I2C_CLK1
TRUE
+3V_PMU_RESET
TRUE
MMM_ACC_X_AXIS
TRUE
MMM_ACC_Z_AXIS
TRUE
+BATT_ISNS_P
TRUE
MMM_ACC_Y_AXIS
1000
TRUE
VGA_R
TRUE
2000
CBUS_DET_2_L
2000
TRUE
+5V_DDC_SLEEP
2000
TRUE
+5V_INV_SW
2000
TRUE
+14V_INV
3000
TRUE
SOFT_PWR_ON_L
COMM_SHUTDOWN
TRUE
4000
COMM_RING_DET_L
TRUE
4000
4000
TRUE
COMM_GPIO_L
4000
COMM_TXD_L
TRUE
2000
TRUE
EIDE_OPTICAL_CS0_L
4000
TRUE
COMM_DTR_L
KBD_ID
TRUE
3000
3000
KBD_JIS
TRUE
3000
KBD_CAPSLOCK_LED
TRUE
3000
KBD_NUMLOCK_LED
TRUE
TRUE
3000
+FAN_PWR
1000
TRUE
TMDS_CONN_CLKN
4
TRUE
+3V_MAIN
1000
TRUE
DVI_DDC_CLK_UF
TRUE
2000
2
+3V_LCD
TRUE
2000
+3V_SLEEP
1000
TRUE
LVDS_DDC_DATA
TRUE
1000
INT_I2S0_SND_LRCLK
1000
TMDS_CONN_CLKP
TRUE
TRUE
VGA_B
1000 1000
TRUE
VGA_HSYNC
1000
TRUE
VGA_VSYNC
1000
TRUE
SND_AMP_MUTE
1000
TRUE
SND_HP_SENSE_L
1000
TRUE
INT_I2C_CLK2
TRUE
1000
ADAPTER_DET
TRUE
1000
SND_LIN_SENSE_L
1000
TRUE
INT_I2S0_SND_FROM_ADC
1000
TRUE
SND_HP_MUTE_L
TRUE
1000
INT_I2S0_SND_MCLK
TRUE
SLEEP
TRUE
SLEEP_LED
1000
TRUE
+FW_VP1
1000
3
+ADAPTER
TRUE
TRUE
1000
FW_TPI1N
TRUE
1000
FW_TPI1P
MMM_ACC_SELFTEST
TRUE
TRUE
PMU_KB_RESET_L
TRUE
PMU_CPU_HRESET_L
TRUE
BB_RESET_L
NEC_USB_DBP
TRUE
1000
PCI_FRAME_L
TRUE
TRUE
1000
MDI_P<0..3>
TRUE
1000
MDI_M<0..3>
FW_TPO0P
TRUE
1000
FW_TPI0N
TRUE
1000
NEC_LUSB_PPON
TRUE
1000
+5V_MAIN
TRUE
2000
2
+5V_SLEEP
TRUE
2
3000
1000
TRUE
INT_I2C_DATA2
TRUE
1000
SND_HW_RESET_L
TRUE
1000
CHARGE_LED_L
+3V_SLEEP
TRUE
2000
3000
FAN2_GND
TRUE
FW_TPO0N
TRUE
1000
FW_TPI0P
TRUE
1000
TRUE
1000
FW_TPO0R
+FW_VP0
TRUE
1000
FW_VGND
TRUE
1000
TRUE
1000
NEC_LUSB_OCI_UF
TRUE
JTAG_ASIC_TMS
TRUE
CPU_SRESET_L
TRUE
INT_TST_MONIN_PD
TRUE
INT_I2C_DATA1
TRUE
JTAG_CPU_TMS
TRUE
1000
FW_TPO1P
TRUE
CPU_CHKSTP_OUT_L
FW_TPO1N
TRUE
1000
COMM_RESET_L
TRUE
4000
4000
TRUE
COMM_RXD
TRUE
CPU_VCORE_SLEEP
TMDS_DP<0..2>
TMDS_DN<0..2>
LID_CLOSED_L
+3V_HALL_EFFECT
TRUE
+PWR_SUPERCAP
TRUE
+PPBATT_ISNS_N
2000
TRUE
EIDE_OPTICAL_INT
2000
TRUE
EIDE_OPTICAL_WR_L
COMM_RTS_L
TRUE
4000
3000
KBD_INTL
TRUE
KBD_CONTROL_L
3000
3000
KBD_OPTION_L
3000
KBD_COMMAND_L
3000
KBD_FUNCTION_L
3000
TRUE
KBD_Y<0..7>
KBD_SHIFT_L
3000
FAN1_GND
TRUE
3000
TRUE
PMU_BATT_DET_L
1000
1000
TRUE
+BATT_POS
3000
KBD_X<0..9>
TRUE
FAN2_TACH
3000
FAN1_TACH
TRUE
3000
1000
TRUE
BATT_DATA
1000
BATT_CLK
TRUE
TRUE
BATT_NEG
1000
+1_8V_MAIN
TRUE
TRUE
1000
DVI_DDC_DATA_UF
1000
TRUE
DVI_HPD_UF
1000
LVDS_L0N
1000
LVDS_L1N
1000
LVDS_L1P
1000
TRUE
LVDS_DDC_CLK
TRUE
2000
BRIGHT_PWM
TRUE
2000
INV_GND
TRUE
TV_C
2000
2000
TRUE
TV_GND1
1000
TRUE
INT_I2S0_SND_SCLK
1000
TRUE
INT_I2S0_SND_TO_DAC
2000
TV_GND2
TRUE
2000
TRUE
TV_COMP
2000
TRUE
TV_Y
TRUE
2
+5V_SLEEP
TRUE
+2_5V_MAIN
TRUE
1778_VFB
TRUE
GPU_VCORE
TRUE
+PBUS
TRUE
INT_I2C_DATA0
TRUE
INT_JTAG_TEI
TRUE
INT_TST_MONOUT_TP
TRUE
CPU_HRESET_L
TRUE
JTAG_ASIC_TRST_L
TRUE
JTAG_ASIC_TCK
TRUE
JTAG_ASIC_TDO_TP
TRUE
JTAG_ASIC_TDI
TRUE
JTAG_CPU_TDI
TRUE
JTAG_CPU_TDO_TP
TRUE
JTAG_CPU_TCK
TRUE
JTAG_CPU_TRST_L
TRUE
INT_TST_PLLEN_PD
TRUE
INT_I2C_CLK0
TRUE
+24V_PBUS
TRUE
VCORE_FB
+5V_MAIN
2
TRUE
TRUE
+3V_PMU
TRUE
2000
CBUS_DET_1_L
1000
TRUE
VGA_G
1000
LVDS_L0P
1000
LVDS_L2N
1000
LVDS_L2P
1000
TRUE
CLKLVDS_LN
1000
TRUE
CLKLVDS_LP
31
39
26
39
39
39
26
39
20
39
27
36
39
27
26
26
26
18
26
31
19
26
25
35
34
26
25
40
24
24
18
18
18
17
39
39
39
18
37
26
18
18
39
39
39
39
24
31
31
37
31
40
39
18
39
39
39
39
24
35
39
39
39
39
39
40
13
7
13
39
39
39
39
39
39
39
39
39
39
39
39
12
26
26
17
17
17
12
24
24
27
17
26
39
12
12
17
17
17
27
27
31
26
27
27
27
27
27
14
35
40
40
40
24
27
27
27
39
27
31
40
38
40
40
41
23
27
38
27
27
31
27
27
27
27
27
40
33
39
39
31
27
17
39
39
30
30
27
41
41
27
27
31
41
30
30
40
27
28
14
6
39
39
27
27
6
23
23
40
39
39
27
31
31
31
31
31
32
40
31
40
23
23
23
23
40
27
27
40
41
40
21
11
6
28
28
6
6
6
11
40
41
23
23
23
23
23
40
26
26
26
40
26
26
26
26
26
26
9
14
12
12
12
12
9
14
14
14
12
12
9
26
9
9
14
14
12
17
17
24
24
24
12
41
24
17
17
14
17
14
13
31
25
25
25
25
23
18
23
23
23
23
14
14
14
26
14
24
27
23
24
23
23
40
21
14
23
23
23
23
27
14
14
27
14
14
14
14
24
24
30
32
30
30
25
6
6
17
12
28
28
29
29
17
40
40
14
14
27
40
40
29
29
30
30
41
17
13
5
13
13
5
30
5
30
14
14
5
20
20
24
24
33
25
26
26
14
24
24
24
24
24
40
31
32
24
27
27
32
32
32
40
23
23
21
21
21
21
23
23
23
23
14
14
23
23
23
40
40
21
19
40
6
13
13
5
13
13
28
13
5
5
5
5
13
6
40
35
40
40
18
23
21
21
21
21
21
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
09/01/04 - 1. CHANGE ALL FONTS INTO SMALL ONES
4. CHANGE 2 CAPS (C233, C803) TO IMPROVE FEEDBACK PROTECTION AND PBUS CURRENT LIMIT CIRCUIT
08/16/04 - 1. MODIFY CPU_AVDD SETTING
5. MODIFY CPU_VCORE VID AND CPU_VCORE SETTING
3. ADD 2 RESISTORS (NO STUFF) BETWEEN FAN_PWM AND FAN_PWM_L OF FAN1 AND FAN2
2. MODIFY CPU_AVDD SEETING AGAIN
08/13/04 - 1. CHANGE EXT TMDS SWING RESISTORS TO 510 OHM (R869, R876), REMOVE SI_RESET PULL HIGH
08/20/04 - 1. ADD TRACKPAD POWER +5V_TPAD CONTROL CIRCUIT
EVT2 RELEASE
REVISION HISTORY
09/03/04 - 1. ADD MMM CIRCUIT, ARRANGE 2 INTREPID GPIOS FOR MM_FFIRQ_L, MM_SIRQ_L AND PULL UP RESISTORS R801, R802
2. ADD R803 BETWEEN DP6 AND DCDC_IN
3. CHANGE INT TMDS DAMPING RESISTERS (R760-R767) TO 0 OHM
4. CHANGE TRACKPAD CONNECTOR J10 AND PIN OUT 09/06/04 - 1. ADD EMI SOLUTION L12
2. ADD PULL UP AND PULL DOWN RESISTORS FOR MMM SENSOR
09/13/04 - 1. ADD CURRENT LIMITER R821 BETWEEN PMU(U29) AND U33
09/10/04 - 1. MODIFY FIREWIRE PORT0 POWER CIRCUIT
09/07/04 - 1. CHANGE TRACKPAD CONNECTOR PIN OUT
09/27/04 - 1. ADD ST MMM SENSOR CIRCUIT
DVT RELEASE
2. CHANGE RGB SIGNAL INPEDENCE (R341, R342, R346, R456, R458, R462)
09/02/04 - 1. MODIFT CPU_VCORE VID AND CPU_VCORE SEETING AGAIN
3. ADD R804 AND SUPERCAP C692 ON +4_6V_BU
09/08/04 - 1. ADD BATTERY CURRENT SENSOR CIRCUIT
2. ADD NET FROM BATTERY CURRENT SENSOR CIRCUIT TO PMU
09/09/04 - 1. ADD EMI SOLUTION R816; ADD MMM RESET CIRCUIT
PVT RELEASE
12/17/04 - 1. REMOVE ALL OPEN JUMPER 12/17/04 - 2. SCHEMATIC RELEASE FOR PRODUCTION
10/14/04 - 2. ADD FIREWIRE POWER PROTECT CIRCUIT 10/15/04 - 3. CHANGE EXT_TMDS TERMINAL RESISTERS AND V SWINING RESISTOR 10/22/04 - 4. CHANGE FAN CONTROLLER FROM ADT7460 TO ADT7467 11/02/04 - 5. CHANGE BBANG IC TO ATTINY2313
42 46
A
051-6680
A
D
C
B
A
D
C
B
8 7
6
5
4
3
2 1
8
7 6
5
4
3
2
1
43
*** Signal Cross-Reference for the entire design ***
+1_0V_MARVELL 28D2< 40B3> +1_5V_AGP 12B5< 12D1< 12D4< 15D6< 16C8<
19C6< 19D6< 21A8< 21B4<> 21D5<>
22B8< 22D6< 40C3> +1_5V_AGP_GPU 22C5< 40C3> +1_5V_AGP_NECK 21B4<> 40B3> +1_5V_GPU_VDD15 21D3< 40C3> +1_5V_INTREPID_PLL 8D6< 12D4< 12D8< 14D6<> 40D3> +1_5V_INTREPID_PLL1 14C3< 40D3> +1_5V_INTREPID_PLL2 14D3< 40D3> +1_5V_INTREPID_PLL3 14D3< 40D3> +1_5V_INTREPID_PLL4 14D3< 40D3> +1_5V_INTREPID_PLL5 12D3< 40D3> +1_5V_INTREPID_PLL6 12D6< 40D3> +1_5V_INTREPID_PLL7 8D5< 40D3> +1_5V_INTREPID_PLL8 14D3< 40C3> +1_5V_LDO 40D6> +1_5V_MAIN 40D6> +1_5V_SLEEP 40D6> +1_5V_SLEEP_NECK 36D2<> 40B3> +1_5V_SLEEP_VIN 40D6> +1_8V_ATI_PVDD 21C5<> 22B6< 22B6< 22D6<> 40C3> +1_8V_ATI_TPVDD 22D2<> 40B3> +1_8V_GPU 19A8< 20A6< 21D7< 22A2< 22A6<
22B1< 22B6< 22C8< 22D6< 22D8< 40C3> +1_8V_GPU_AVDD 22D5< 40B3> +1_8V_GPU_AVDDQ 22D4< 22D7< 40B3> +1_8V_GPU_DVO 22B2< +1_8V_GPU_MEMPLL 22B5< 40B3> +1_8V_GPU_PLL 22D5< 40C3> +1_8V_GPU_PNLIO 22A5< 40B3> +1_8V_GPU_PNLPLL 22B5< 40B3> +1_8V_GPU_TP_PLL 22B5< 22D1< 40B3> +1_8V_GPU_VDDDI 22C7< 22D4< 40C3> +1_8V_MAIN 40D6> 41C6> +1_8V_PVDD_NECK 21B5<> 40B3> +1_8V_SLEEP 40D6> +1_8V_SLEEP_NECK 36D2<> 40B3> +1_95V_FW_DVDD 29C4< 29C7<> 29D5< 40A3> +1_95V_FW_DVDD_PORT1 29D6< 40A3> +1_95V_FW_DVDD_RX0 29C5< 40A3> +1_95V_FW_DVDD_TX0 29C5< 40A3> +1_95V_FW_PLL400VDD 29C4< 40A3> +1_95V_FW_PLL500VDD 29D4< 40A3> +1_95V_FW_PLLVDD 29D4< 29D6<> 40A3> +2_5V_CG_MAIN 14C6< +2_5V_GPU 22A7<> 40C3> +2_5V_GPU_A2VDD 22D4< 22D7< 40B3> +2_5V_GPU_MCLK 22C7< 22D4< 40B3> +2_5V_GPU_MEMCORE 22C5< 40C3> +2_5V_GPU_PNLIO 22A5< 40C3> +2_5V_INTREPID 9A7< 10D3< 10D5< 10D6< 10D8< 15D6<
16B8< 40D3> +2_5V_MAIN 40D6> 41C6> +2_5V_MARVELL 28B8< 28C4< 40B3> +2_5V_MARVELL_AVDD 28C4< 40B3> +2_5V_MARVELL_CONN 28B3<> +2_5V_REG 30A6< +2_5V_REG_F 30A7<> +2_5V_SLEEP 40D6> +2_5V_SLEEP_NECK1 21C4<> 40B3> +2_5V_SLEEP_NECK2 36D2<> 40B3> +3V_AIRPORT 40C3> 41C3> +3V_ATI_OSC_SLEEP 19B2< 40B3> +3V_ATI_SS 19A3< 40B3> +3V_CG_PLL_MAIN 14C6< +3V_FW 29A3< 29D7<> 30B7<> 30D5< 40A3> +3V_FW_AVDD 29C6< 40A3> +3V_FW_AVDD_PORT0 29C6< 40A3> +3V_FW_AVDD_PORT1 29C6< 40A3> +3V_FW_AVDD_PORT2 29D6< 40A3> +3V_FW_ESD 30A5< 30B4<> 30D3<> +3V_FW_ESD_ILIM 30D4< +3V_FW_ESD_R 30A6< +3V_FW_UF 29D7<> 40A3> +3V_GPU 12D1< 19B8< 19C6< 19C8< 19D6<
21C4< 21C5< 21C7< 21D7< 22A6< 22B1<
40C3> +3V_GPU_FLT 22B2< 40C3> +3V_HALL_EFFECT 24B2<> 40B6> 41C1> +3V_INTREPID_USB 14C3< 40D3> +3V_LCD 23B4<> 40B6> 41B6> +3V_LCD_SW 23B4<> 40B6> +3V_MAIN 24B8<> 40D6> 41C6> +3V_MAIN_AUD 27C6<> 34C1<> 40B6> +3V_MAIN_JUMPER 34D2<> 40D1> +3V_MAIN_LMU 24D7<> 40A1> +3V_MAIN_SSCG 40A1> +3V_NEC_VDD 17B3< 17D7< 17D7< 40A3> +3V_PMU 40D6> 41C6> +3V_PMU_AVCC 27B1< 31B6< 31D5<> 40C6> +3V_PMU_ESR 33A2< 40C6> +3V_PMU_RESET 31C7< 35A4<> 41C1> +3V_SENSOR 24B4<> +3V_SLEEP 40D6> 41A6> 41B6> +3V_SLEEP_NECK 36D1<> 40B3> +3V_SLEEP_PCCARD 18D7< 40C3> +3V_SLP_OK_L 34B4<> +3V_SLP_ON 34A5<> +4_6V_BU 33B3<> 34B7< 40C6> +4_85V_ESR 33A4< 40C6> +4_85V_RAW 31A4< 33B4<> 40C6> +5V_DDC_SLEEP 23D3<> 23D5<> 40B6> 41B6> +5V_DDC_SLEEP_UF 23D6< 40B6> +5V_HDD 26D1<> +5V_HD_SLEEP 26D1<> 34A7<> 40C6> +5V_INV_SW 23B2<> 40B6> 41A6> +5V_INV_UF_SW 23B2<> 40B6> +5V_MAIN 40D6> 41A6> 41C6> +5V_MAIN_AUD 27C6<> 34C8<> 40B6> +5V_MAIN_JUMPER 34D8<> 40D1> +5V_SLEEP 40D6> 41A6> 41C6> +5V_SLEEP_LMU 24C6<> 24C7<> +5V_SLEEP_OPT 26B5<> 40A1> +5V_TPAD 24B5<> +5V_TPAD_FB 24B4<> +5V_TPAD_SLEEP 40B6> 41B3> +14V_INV 23B2<> 40B6> 41B6> +24V_PBUS 40D6> 41C6> +ADAPTER 32D8<> 33A7< 40C6> 41D1> +ADAPTER_ILIM 33A6<> 40C6> +ADAPTER_OR_BATT 33A5<> 40C6> +ADAPTER_SENSE 32D4<> 40C6> +ADAPTER_SW 32D5<> 40C6> 40C6> +BATT 40D6> +BATT_14V_FUSE 32D1<> 40C6> +BATT_24V_FUSE 32B1< 32D2<> 40C6> +BATT_ISNS_P 25A5<> 41C1> +BATT_POS 32A4<> 40C6> 41A3> +BATT_RSNS 32B2< 40C6> +BATT_VSNS 32A4< 40C6> +FAN_PWR 27A3< 27A4< 40B6> 41A3> +FW_AMP_SENSE 40A3> +FW_PBUS 30D7<> 40A3> +FW_PWR1 30B5< 40A3> +FW_PWR_CTRL 30A7<> +FW_PWR_OR 29B8< 29D8<> 30D5<> 40A3> +FW_PWR_OR_F 30B7<> +FW_PWR_OR_GATE 30B8<> +FW_PWR_OR_GATE_L 30A8< +FW_SW 30D5<> 40A3> +FW_VP0 30C1<> 40A3> 41A3> +FW_VP1 30A3<> 40A3> 41D1> +GPU_VDD15_NECK 21B5<> 40B3> +GPU_VDD15_UF 21B5<> 21D4<> 40B3> +HD_LOGIC_SLEEP 26C2<> 40C6> +PBUS 40D6> 41C6> +PBUS_JUMPER 33C3<> 40D1> +PPBATT_ISNS_N 25A4<> 41C1> +PWR_SUPERCAP 33A4< 41C1> +VCC_CBUS_SW 18B1< 18B2< 18D2<> 40C3> +VPP_CBUS_SW 18B1< 18B2< 18D2<> 40C3> 1V20_REF 32C7< 33C8< 40D1> 1V65_REF 32A5< 1_5V_BOOST 36C6<> 40C1> 1_5V_BST 36C5<> 40C1> 1_5V_DH 36C5<> 40C1> 1_5V_DL 36B5<> 40C1> 1_5V_FB 36B5< 36B7< 40C1> 1_5V_ILIM 36C5<> 40C1> 1_5V_LX 36B5<> 40C1> 1_5V_LX_F 36B7<> 36C5> 40C1> 1_5V_SLEEP_EN_L 36C7<> 36D7<> 1_8V_PVDD_STD 22D6< 1_8V_SLEEP_PWREN_L 36A3<> 1_8V_SW 36A5<> 40A1>
1_8V_SW_F 36A4<> 40A1> 1_8V_TPVDD_STD 22D1< 1_8V_VFB 36A5<> 40A1> 2_5V_BOOST 36C4<> 40D1> 2_5V_BST 36C4<> 40D1> 2_5V_DH 36C3<> 40D1> 2_5V_DL 36B3<> 40C1> 2_5V_FB 36B4< 2_5V_ILIM 36C5<> 40C1> 2_5V_LX 36B3<> 40D1> 2_5V_LX_F 36B2<> 36C4<> 40D1> 2_5V_SLEEP_PWREN_L 36C2<> 3V_5V_OK 24A6< 34B4<> 36A8< 36D6< 3V_5V_OK_G 24A6< 3V_5V_OK_L 24B5<> 3V_BG 34C4<> 3V_BOOST 34C4<> 3V_BOOST_ESR 34D3<> 3V_ITH 34C4<> 3V_ITH_RC 34C3< 3V_PMU_VTAP 33B3< 3V_RSNS 34D2< 40D1> 3V_RUNSS 34C4< 3V_SLEEP_PWREN_L 34B3<> 3V_SNSM 34C4< 39A2> 3V_SNSP 34C4< 39A2> 3V_SW 34C4<> 40D1> 3V_TG 34D4<> 3V_VOSNS 34C4<> 5V_BG 34C5<> 5V_BOOST 34C5<> 5V_BOOST_ESR 34D6<> 5V_HD_PWREN 34A8<> 5V_ITH 34C5<> 5V_ITH_RC 34C6< 5V_RSNS 34D7< 40D1> 5V_RUNSS 34C5< 5V_SLEEP_PWREN 34A8<> 5V_SNSM 34C5< 39A2> 5V_SNSP 34C5< 39A2> 5V_SW 34C5<> 40D1> 5V_TG 34C5<> 5V_VOSNS 34C5<> 1625_BG 33C5<> 1625_BST 33C5< 1625_BST_ESR 33C5<> 1625_COMP 32D2< 33C6< 1625_DIV 33C8< 1625_ENABLE 33D7<> 1625_ENABLE_L 33D6<> 1625_EXTVCC 33D5<> 40D1> 1625_FCB 33C6< 1625_INTVCC 33C5<> 40D1> 1625_RUNSS 33C6< 1625_SGND 33B7<> 40D1> 1625_TG 33C5<> 1625_VFB 33B5<> 1625_VIN 33C6< 40D1> 1625_VSW 33C4<> 40D1> 1772_ACIN 32B5< 1772_ACOK_L 32B5<> 32C4<> 1772_BST 32B4<> 1772_BST_ESR 32C3< 1772_CCI 32B5<> 1772_CCS 32B5< 1772_CCV 32B5<> 1772_CCV_RC 32B5< 1772_CELLS 32B4< 1772_CLS 32A4< 1772_CSIN 32B4<> 39A2> 1772_CSIP 32B4<> 39A2> 1772_CSSN 32C5< 39A2> 1772_CSSP 32C5< 39A2> 1772_DCIN 32B5< 40C6> 1772_DHI 32B4<> 1772_DLO 32B4<> 1772_DLOV 32B4<> 40C6> 1772_GND 32A5<> 40C6> 1772_ICHG 32B5<> 1772_ICTL 32B5<> 1772_IINP 32B5< 1772_LDO 32C4<> 40C6> 1772_LX 32B4<> 40C6> 1772_REF 32B5<> 1772_VCTL 32B5< 1778_BG 21A5<> 40B1> 1778_BST 21A5<> 40B1> 1778_BST_RC 21A5< 40B1> 1778_FCB 21A6< 40B1> 1778_GND 21A6< 21A7<> 40B1> 1778_ION 21A5< 40B1> 1778_ITH 21A6<> 40B1> 1778_ITH_RC 21A7< 40B1> 1778_SHDN_L 21A6<> 1778_TG 21A5<> 40B1> 1778_VCC 21A5< 40B1> 1778_VFB 21A2< 21A5< 40B1> 41C6> 1778_VIN 21A5< 40B1> 1778_VRNG 21A6< 40B1> 3405_MODE 28D5< 3405_VFB 28D4<> 3707_FCB 34C5< 3707_FSET 34C5< 3707_INTVCC 34D4<> 40D1> 3707_SGND 34B5<> 40D1> 3707_STBY 34C5<> A29_CLS_ADJ 32A5<> A29_CURRENT_ADJ 32C4<> A29_DETECT 31A2< 32A5<> 32C4<> A29_DET_L 31A3< A29_DET_REF 31A4< AC_DET 31A4< AC_DIV 32C7< AC_ENABLE_GATE 32D6<> AC_ENABLE_L 32C5<> AC_GTR_18V 32C3<> AC_IN 28B8<> 30C8< 31B3< 32C5<> 32C6<> AC_IN_FW_CNTL 30C7<> AC_IN_L 31A8<> 32C2<> 32C6<> AC_IN_L_RC 32C2<> ADAPTER_DET 27D8<> 31A4< 41A6> ADAPTER_I_REG 32D3<> ADT7467_ADR_ENABLE_L 27B3<> ADT7467_TACH3_TP 27B3< ADT7467_THERM_L 24B4<> 27A2<> 27B3< ADT7467_VCC 27C4< ADT7467_VCORE_MON 5C8<> 27B4< AGP8X_DET_PU 19C6<> AGP_AD<0> 12D2<> 19C7<> AGP_AD<15..0> 39D5> AGP_AD<1> 12C2<> 19C7<> AGP_AD<2> 12C2<> 19C7<> AGP_AD<3> 12C2<> 19C7<> AGP_AD<4> 12C2<> 19C7<> AGP_AD<5> 12C2<> 19C7<> AGP_AD<6> 12C2<> 19C7<> AGP_AD<7> 12C2<> 19C7<> AGP_AD<8> 12C2<> 19C7<> AGP_AD<9> 12C2<> 19C7<> AGP_AD<10> 12C2<> 19C7<> AGP_AD<11> 12C2<> 19C7<> AGP_AD<12> 12C2<> 19C7<> AGP_AD<13> 12C2<> 19C7<> AGP_AD<14> 12C2<> 19C7<> AGP_AD<15> 12C2<> 19C7<> AGP_AD<16> 12C2<> 19C7<> AGP_AD<31..16> 39D5> AGP_AD<17> 12C2<> 19C7<> AGP_AD<18> 12C2<> 19C7<> AGP_AD<19> 12C2<> 19C7<> AGP_AD<20> 12C2<> 19C7<> AGP_AD<21> 12C2<> 19C7<> AGP_AD<22> 12C2<> 19C7<> AGP_AD<23> 12C2<> 19C7<> AGP_AD<24> 12C2<> 19C7<> AGP_AD<25> 12C2<> 19C7<> AGP_AD<26> 12C2<> 19D7<> AGP_AD<27> 12B2<> 19D7<> AGP_AD<28> 12B2<> 19D7<> AGP_AD<29> 12B2<> 19D7<> AGP_AD<30> 12B2<> 19D7<> AGP_AD<31> 12B2<> 19D7<> AGP_AD_STB<0> 12A2<> 12B2< 19D6<> 39D5> AGP_AD_STB<1> 12A2<> 12B2< 19D6<> 39D5> AGP_AD_STB_L<0> 12A2<> 12B2< 19D6<> 39D5> AGP_AD_STB_L<1> 12A2<> 12A2< 19D6<> 39D5> AGP_ATI_INT_L 14B5<> 19B7<> AGP_ATI_RESET_L 19B7<
AGP_ATI_VREF 19B7< AGP_ATI_VREFG 19B7< AGP_BUSY_L 12C4<> 12D2< 19D6> AGP_CBE<0> 12B2<> 19B7<> AGP_CBE<1..0> 39D5> AGP_CBE<1> 12B2<> 19B7<> AGP_CBE<2> 12B2<> 19B7<> AGP_CBE<3..2> 39D5> AGP_CBE<3> 12B2<> 19B7<> AGP_DEVSEL_L 12B2<> 12C2< 19B7<> 39D5> AGP_FRAME_L 12B2<> 12C2< 19B7<> 39D5> AGP_GNT_L 12C2< 12D2<> 19B7< 39D5> AGP_IRDY_L 12B2<> 12C2< 19B7<> 39D5> AGP_PAR 12B2<> 19B7> 39D5> AGP_PIPE_L 12A2<> 12B2< AGP_RBF_L 12A2<> 12C2< 19C6> 39C5> AGP_REQ_L 12C2< 12D2<> 19B7<> 39D5> AGP_SBA<0> 12B2< 19C6> AGP_SBA<7..0> 39D5> AGP_SBA<1> 12B2<> 19C6> AGP_SBA<2> 12B2<> 19C6> AGP_SBA<3> 12B2<> 19C6> AGP_SBA<4> 12B2<> 19C6> AGP_SBA<5> 12B2<> 19C6> AGP_SBA<6> 12B2<> 19C6> AGP_SBA<7> 12B2<> 19C6<> AGP_SB_STB 12B2<> 12B2< 19C6<> 39D5> AGP_SB_STB_L 12A2< 12A2<> 19C6<> 39D5> AGP_ST<0> 12A2<> 19C6< AGP_ST<1> 12A2<> 19C6< AGP_ST<2> 12A2<> 19C6< AGP_STOP_L 12B2<> 12C2< 19B7<> 39D5> AGP_STP_L 19C6< AGP_SUS_STAT_L_PU 19C6< AGP_TRDY_L 12B2<> 12C2< 19B7<> 39D5> AGP_WBF_L 12A4<> 12B2< 19B7> AIRPORT_CLKRUN_L 26C6<> 41C3> AIRPORT_IDSEL 26C5<> AIRPORT_PCI_GNT_L 12D7<> 26D5<> 41C3> AIRPORT_PCI_INT_L 14B5<> 14D7< 26D5<> 41C3> AIRPORT_PCI_REQ_L 12A7< 12D7<> 26D6<> 41C3> ATI_AGP_FBSKEW<0> 21C2< 21C7<> ATI_AGP_FBSKEW<1> 21C2< 21C7<> ATI_BUS_CFG<0> 21B2< 21C7<> ATI_BUS_CFG<1> 21B2< 21C7<> ATI_BUS_CFG<2> 21B2< 21C7<> ATI_CLK27M_IN 19A1< 21B7< 37B1> ATI_CLK27M_OSC 19B2< 37B1> ATI_CLK27M_OSC_SS 19A3< 19B1< 37B1> ATI_DBI_HI_PU 19C6<> ATI_DBI_LO_PU 19C6<> ATI_DVOD<0> 20B8< 21D7<> ATI_DVOD<23..0> 38C1> ATI_DVOD<1> 20B8< 21D7<> ATI_DVOD<2> 20B8< 21D7<> ATI_DVOD<3> 20B8< 21D7<> ATI_DVOD<4> 20B8< 21D7<> ATI_DVOD<5> 20B8< 21D7<> ATI_DVOD<6> 20B8< 21D7<> ATI_DVOD<7> 20B8< 21D7<> ATI_DVOD<8> 20B8< 21D7<> ATI_DVOD<9> 20B8< 21D7<> ATI_DVOD<10> 20B8< 21D7<> ATI_DVOD<11> 20A8< 21D7<> ATI_DVOD<12> 20B6< 21D7<> ATI_DVOD<13> 20B6< 21D7<> ATI_DVOD<14> 20B6< 21D7<> ATI_DVOD<15> 20B6< 21D7<> ATI_DVOD<16> 20B6< 21D7<> ATI_DVOD<17> 20B6< 21D7<> ATI_DVOD<18> 20B6< 21C7<> ATI_DVOD<19> 20B6< 21C7<> ATI_DVOD<20> 20B6< 21C7<> ATI_DVOD<21> 20B6< 21C7<> ATI_DVOD<22> 20B6< 21C7<> ATI_DVOD<23> 20A6< 21C7<> ATI_DVOD_DE 20A6< 20A8< 21C7<> 38C1> ATI_DVOVMODE 22A3< ATI_DVO_CLKP 19B4< 21C7<> 38C1> ATI_DVO_HSYNC 20A8< 21C7<> 38C1> ATI_DVO_VSYNC 20A6< 20A8< 21C7<> 38C1> ATI_GPIO8_PD 21C7<> ATI_GPIO9_SPN 21C7<> ATI_GPIO10_SPN 21C7<> ATI_GPIO11_SPN 21C7<> ATI_GPIO12_SPN 21C7<> ATI_GPIO13_SPN 21C7<> ATI_HSYNC 21D5<> 23D8< ATI_HSYNC_BUF 23D8<> ATI_MEMTEST 19A6<> ATI_MEMVMODE0 19A7< ATI_MEMVMODE1 19A7< ATI_OSC_OE 19B3< ATI_PVDD_BYP 22D6<> ATI_R2SET 21D6<> ATI_RSET 21D6<> ATI_RSTB_MSK 19C6<> ATI_SSCLK_IN 19A2< 21B7<> 37B1> ATI_SSCLK_UF 19A2<> 37B1> ATI_TESTEN 21B7< ATI_TMDS_CLKN 20C2< 21B7> 39B2> ATI_TMDS_CLKP 20C2< 21B7> 39B2> ATI_TMDS_DN<0> 20D2< 21B7> 39B2> ATI_TMDS_DN<1> 20D2< 21B7> 39B2> ATI_TMDS_DN<2> 20C2< 21B7> 39B2> ATI_TMDS_DP<0> 20D2< 21B7> 39B2> ATI_TMDS_DP<1> 20D2< 21B7> 39B2> ATI_TMDS_DP<2> 20C2< 21B7> 39B2> ATI_TPVDD_BYP 22D1<> ATI_VSYNC 21D5<> 23D8< ATI_VSYNC_BUF 23D8<> ATI_X1CLK_SKEW<0> 21C2< 21C7<> ATI_X1CLK_SKEW<1> 21B2< 21C7<> AUD_GND 27C8<> 40B6> AUXWIN_PU 21C6<> BATTV_HIGH 32B7<> BATTV_LOW 32B8<> BATT_14PBUS_EN 32C1<> BATT_14V_GATE 32C1<> BATT_24PBUS_EN 32C2<> BATT_24V_GATE 32C1<> BATT_CLK 32A4<> 41A3> BATT_DATA 32A4<> 41A3> BATT_DIV 32A5< BATT_ISNS_OUT 25A4<> BATT_ISNS_R 25A3<> BATT_LOW 32A6<> BATT_LOW_L 32B6<> BATT_NEG 32A4<> 40C6> 41A3> BBANG_HRESET_L 6A2< 6B3<> BBANG_JTAG_TCK 6A4< 6B2<> 6C2< BBANG_TCK_EN 6A4< BB_EEPR_ADDR0 6D3< BB_EEPR_ADDR1 6D3< BB_EEPR_ADDR2 6D3< BB_EEPR_WP_PD 6D2<> BB_MISO 6B3<> 6C2< BB_MOSI 6B3<> 6C2< BB_RESET_L 6C3< 41C1> BB_SCK 6B3<> 6C2< BFR_TDO 6C2< 6C2<> BKFD_PROT_EN_L 32C5<> BKFD_PROT_GATE 32D5<> BRIGHT_PWM 23A2<> 41A6> BRIGHT_PWM_UF 23A2<> BT_USB_DM 14C1< 27D8<> 39B2> 41D3> BT_USB_DP 14C1< 27D8<> 39B2> 41D3> CBUS_ADDR<0> 18B1< 18B4> CBUS_ADDR<1> 18B1< 18B4> CBUS_ADDR<2> 18B1< 18B4> CBUS_ADDR<3> 18B1< 18B4> CBUS_ADDR<4> 18B1< 18B4> CBUS_ADDR<5> 18B1< 18B4> CBUS_ADDR<6> 18B1< 18B4> CBUS_ADDR<7> 18B1< 18B4> CBUS_ADDR<8> 18B1< 18B4> CBUS_ADDR<9> 18B1< 18B4> CBUS_ADDR<10> 18B4> 18C1< CBUS_ADDR<11> 18B1< 18B4> CBUS_ADDR<12> 18B1< 18B4> CBUS_ADDR<13> 18B1< 18B4> CBUS_ADDR<14> 18B1< 18B4> CBUS_ADDR<15> 18B1< 18B4> CBUS_ADDR<16> 18B1< 18B4< CBUS_ADDR<17> 18B2< 18B4> CBUS_ADDR<18> 18B2< 18B4> CBUS_ADDR<19> 18B2< 18B4> CBUS_ADDR<20> 18B2< 18B4>
CBUS_ADDR<21> 18B2< 18B4> CBUS_ADDR<22> 18A4> 18B2< CBUS_ADDR<23> 18A4> 18B2< CBUS_ADDR<24> 18A4> 18B2< CBUS_ADDR<25> 18A4> 18B2< CBUS_ADDR_16_UF 18B5<> CBUS_BVD1_L 18A2< 18C4< CBUS_BVD2_L 18B2< 18C4< CBUS_CE1_L 18C1< 18C4> CBUS_CE2_L 18B2< 18B4> CBUS_DATA<0> 18A1< 18A4<> CBUS_DATA<1> 18A1< 18A4<> CBUS_DATA<2> 18A1< 18A4<> CBUS_DATA<3> 18A4<> 18C1< CBUS_DATA<4> 18A4<> 18C1< CBUS_DATA<5> 18A4<> 18C1< CBUS_DATA<6> 18A4<> 18C1< CBUS_DATA<7> 18A4<> 18C1< CBUS_DATA<8> 18A2< 18A4<> CBUS_DATA<9> 18A2< 18A4<> CBUS_DATA<10> 18A2< 18A4<> CBUS_DATA<11> 18A4<> 18C2< CBUS_DATA<12> 18A4<> 18C2< CBUS_DATA<13> 18A4<> 18C2< CBUS_DATA<14> 18A4<> 18C2< CBUS_DATA<15> 18A4<> 18C2< CBUS_DET_1_L 18C2< 18C4< 41C6> CBUS_DET_2_L 18A2< 18C4< 41C6> CBUS_INPACK_L 18B2< 18B4< CBUS_INT_L 14B5<> 14D7< 18A7<> CBUS_IORD_L 18B2< 18C4> CBUS_IOWR_L 18B2< 18C4> CBUS_MFUNC1_PD 18A7< 18A7<> CBUS_MFUNC2_PD 18A7< 18A7<> CBUS_MFUNC3_PD 18A7< 18A7<> CBUS_MFUNC4_PD 18A7< 18A7<> CBUS_MFUNC5_PD 18A7< 18A7<> CBUS_MFUNC6_PD 18A7< 18A7<> CBUS_OE_L 18B1< 18C4> CBUS_PCI_GNT_L 12D7<> 18A7< CBUS_PCI_IDSEL 18B7< CBUS_PCI_REQ_L 12A7< 12D7<> 18A7> CBUS_PCI_RESET_L 18A7< CBUS_READY 18B1< 18C4< CBUS_REG_L 18B2< 18C4> CBUS_RESET_L 18B2< 18C4> CBUS_SUSPEND_PU 18A7< 18D7< CBUS_VCCD0_L 18C4<> CBUS_VCCD1_L 18C4<> CBUS_VPPD0 18C4<> CBUS_VPPD1 18C5<> CBUS_VS1 18B2< 18C4<> CBUS_VS2 18B2< 18C4<> CBUS_WAIT_L 18B2< 18B4< CBUS_WE_L 18B1< 18C4> CBUS_WP_L 18A1< 18B4< CG_ADDRSEL 14B7< CG_CLKOUT 14B6<> CG_FSEL 14B7< 14C5< CG_FSEL_INT 14C5<> CG_LOCK 14B7<> CG_RESET_L 14B7< CG_SYSCLK_EN 14B5< 14B7< CHARGE_DISABLE 32A7<> CHARGE_LED_L 27D8<> 31C6<> 31D7< 41A6> CLK10M_PMU_XIN 31B6< CLK10M_PMU_XOUT 31B6< CLK10M_PMU_XOUT_UF 31B7< CLK18M_INT_EXT 14B6<> 37B1> CLK18M_INT_XIN 14A5< 37B1> CLK18M_INT_XOUT 14A5<> 37B1> CLK18M_XTAL_IN 14A5< 37B1> CLK25M_ENET_XIN 28A7<> CLK25M_ENET_XOUT 28A7<> CLK25M_XTAL_IN 28A7<> CLK32K_PMU_XIN 31B3<> CLK32K_PMU_XOUT 31B3<> CLK32K_PMU_XOUT_UF 31B2<> CLK33M_AIRPORT 12D8< 26D5<> 37C1> 41C3> CLK33M_AIRPORT_UF 12C7<> 37C1> CLK33M_CBUS 12D8< 18A7< 37C1> CLK33M_CBUS_UF 12C7<> 37C1> CLK33M_NEC 12C8< 17B7< 37C1> CLK33M_NEC_UF 12C7<> 37C1> CLK66M_AGP_1_5V_TP 12C4> CLK66M_GPU_AGP 12C8< 19B7< 37C1> CLK66M_GPU_AGP_UF 12C7<> 37C1> CLKENET_LINK_GBE_REF 13C5< 28C8< 37B1> CLKENET_LINK_GTX 13C5<> 37A1> CLKENET_LINK_RX 13D5< 28C8< 37B1> CLKENET_LINK_TX 13D5< 28D8< 37A1> CLKENET_PHY_GBE_REF 28C7<> 37B1> CLKENET_PHY_GTX 13C6< 28C7< 37A1> CLKENET_PHY_RX 28C7<> 37B1> CLKENET_PHY_TX 28D7<> 37A1> CLKFW_LINK_LCLK 13C3<> 37A1> CLKFW_LINK_PCLK 13C3<> 29C3< 37A1> CLKFW_PHY_LCLK 13C2< 29B7< 37A1> CLKFW_PHY_PCLK 29B4> 29C4< 37A1> CLKLVDS_LN 21B5> 23A4<> 39C2> 41B6> CLKLVDS_LP 21B5> 23A4<> 39C2> 41B6> CLKLVDS_UN 39C2> CLKLVDS_UP 39C2> COMM_DTR_L 14C2> 27C1<> 41B3> COMM_GPIO_L 14C2<> 27C2<> 41B3> COMM_RESET_L 14C5<> 27D3< 41B3> COMM_RING_DET_L 14B5<> 14C7< 27D3< 31C6<> 41B3> COMM_RTS_L 14C2> 27C1<> 41B3> COMM_RXD 14C2<> 27C1<> 41B3> COMM_SHUTDOWN 41B3> COMM_TRXC 14C2<> 27C2<> 41B3> COMM_TXD_L 14C2<> 27C2<> 41B3> COMP_RC 33C6< CPU_AACK_L 5A7< 8B5<> 8C2< 38D5> CPU_ADDR<0> 5C7<> 8D5<> CPU_ADDR<0..31> 38D5> CPU_ADDR<1> 5C7<> 8D5<> CPU_ADDR<2> 5C7<> 8D5<> CPU_ADDR<3> 5C7<> 8D5<> CPU_ADDR<4> 5C7<> 8D5<> CPU_ADDR<5> 5C7<> 8C5<> CPU_ADDR<6> 5C7<> 8C5<> CPU_ADDR<7> 5C7<> 8C5<> CPU_ADDR<8> 5C7<> 8C5<> CPU_ADDR<9> 5C7<> 8C5<> CPU_ADDR<10> 5B7<> 8C5<> CPU_ADDR<11> 5B7<> 8C5<> CPU_ADDR<12> 5B7<> 8C5<> CPU_ADDR<13> 5B7<> 8C5<> CPU_ADDR<14> 5B7<> 8C5<> CPU_ADDR<15> 5B7<> 8C5<> CPU_ADDR<16> 5B7<> 8C5<> CPU_ADDR<17> 5B7<> 8C5<> CPU_ADDR<18> 5B7<> 8C5<> CPU_ADDR<19> 5B7<> 8C5<> CPU_ADDR<20> 5B7<> 8C5<> CPU_ADDR<21> 5B7<> 8C5<> CPU_ADDR<22> 5B7<> 8C5<> CPU_ADDR<23> 5B7<> 8C5<> CPU_ADDR<24> 5B7<> 8C5<> CPU_ADDR<25> 5B7<> 8C5<> CPU_ADDR<26> 5B7<> 8C5<> CPU_ADDR<27> 5B7<> 8C5<> CPU_ADDR<28> 5B7<> 8C5<> CPU_ADDR<29> 5B7<> 8C5<> CPU_ADDR<30> 5B7<> 8C5<> CPU_ADDR<31> 5B7<> 8C5<> CPU_ARTRY_L 5A7<> 8B5<> 8D2< 38D5> CPU_AVDD 5C3< 40D3> CPU_AVDD_ADJ 5C2<> CPU_AVDD_SHDN_L 5C3<> CPU_AVDD_VIN 5C3< 40D3> CPU_AVDD_VOUT 5C2<> 40D3> CPU_BG_L 5C7< 8C2< 8D5<> 38D5> CPU_BR_L 5C7> 8D2< 8D5< 38D5> CPU_BUS_VSEL 5C3< 7A6< CPU_CHKSTP_OUT_L 5B3<> 5C2< 41D6> CPU_CHKS_L 5A3< 5D2< CPU_CI_L 5A7> 8B5<> 38D5> CPU_CLKOUT_SPN 5C3> CPU_CLK_EN 8A5< 31C4<> CPU_DATA<0> 6D8<> 8D3<> CPU_DATA<0..31> 38D5> CPU_DATA<1> 6D8<> 8D3<> CPU_DATA<2> 6D8<> 8D3<> CPU_DATA<3> 6D8<> 8D3<> CPU_DATA<4> 6D8<> 8D3<> CPU_DATA<5> 6D8<> 8D3<>
CPU_DATA<6> 6D8<> 8D3<> CPU_DATA<7> 6D8<> 8D3<> CPU_DATA<8> 6D8<> 8D3<> CPU_DATA<9> 6C8<> 8D3<> CPU_DATA<10> 6C8<> 8D3<> CPU_DATA<11> 6C8<> 8D3<> CPU_DATA<12> 6C8<> 8C3<> CPU_DATA<13> 6C8<> 8C3<> CPU_DATA<14> 6C8<> 8C3<> CPU_DATA<15> 6C8<> 8C3<> CPU_DATA<16> 6C8<> 8C3<> CPU_DATA<17> 6C8<> 8C3<> CPU_DATA<18> 6C8<> 8C3<> CPU_DATA<19> 6C8<> 8C3<> CPU_DATA<20> 6C8<> 8C3<> CPU_DATA<21> 6C8<> 8C3<> CPU_DATA<22> 6C8<> 8C3<> CPU_DATA<23> 6C8<> 8C3<> CPU_DATA<24> 6C8<> 8C3<> CPU_DATA<25> 6C8<> 8C3<> CPU_DATA<26> 6C8<> 8C3<> CPU_DATA<27> 6C8<> 8C3<> CPU_DATA<28> 6C8<> 8C3<> CPU_DATA<29> 6C8<> 8C3<> CPU_DATA<30> 6C8<> 8C3<> CPU_DATA<31> 6C8<> 8C3<> CPU_DATA<32> 6C8<> 8C3<> 8D8< CPU_DATA<32..63> 38D5> CPU_DATA<33> 6C8<> 8C3<> 8D8< CPU_DATA<34> 6C8<> 8C3<> 8D8< CPU_DATA<35> 6C8<> 8C3<> 8D8< CPU_DATA<36> 6B8<> 8C3<> 8D8< CPU_DATA<37> 6B8<> 8C3<> 8D8< CPU_DATA<38> 6B8<> 8C3<> 8D8< CPU_DATA<39> 6B8<> 8B3<> 8D8< CPU_DATA<40> 6B8<> 8B3<> 8C8< CPU_DATA<41> 6B8<> 8B3<> 8C8< CPU_DATA<42> 6B8<> 8B3<> 8C8< CPU_DATA<43> 6B8<> 8B3<> 8C8< CPU_DATA<44> 6B8<> 8B3<> 8C8< CPU_DATA<45> 6B8<> 8B3<> 8C8< CPU_DATA<46> 6B8<> 8B3<> 8B8< CPU_DATA<47> 6B8<> 8B3<> 8B8< CPU_DATA<48> 6B8<> 8A8< 8B3<> CPU_DATA<49> 6B8<> 8A8< 8B3<> CPU_DATA<50> 6B8<> 8A8< 8B3<> CPU_DATA<51> 6B8<> 8A8< 8B3<> CPU_DATA<52> 6B8<> 8A8< 8B3<> CPU_DATA<53> 6B8<> 8A8< 8B3<> CPU_DATA<54> 6B8<> 8A8< 8B3<> CPU_DATA<55> 6B8<> 8A8< 8B3<> CPU_DATA<56> 6B8<> 8B3< 8B3<> CPU_DATA<57> 6B8<> 8B3< 8B3<> CPU_DATA<58> 6B8<> 8B3< 8B3<> CPU_DATA<59> 6B8<> 8B3< 8B3<> CPU_DATA<60> 6B8<> 8B3< 8B3<> CPU_DATA<61> 6B8<> 8B3< 8B3<> CPU_DATA<62> 6A8<> 8B3< 8B3<> CPU_DATA<63> 6A8<> 8B3< 8B3<> CPU_DBG_L 5C3< 8A3<> 8C2< 38D5> CPU_DRDY_L 5C3> 8A3< 8C2< 38D5> CPU_DTI<0> 5C3< 8A3<> CPU_DTI<0..2> 38D5> CPU_DTI<1> 5C3< 8A3<> CPU_DTI<2> 5C3< 8A3<> CPU_EDTI 5A2< 5C3< CPU_EMODE0_L 5A3< 7A4< CPU_EMODE1_L 5A3< 5C2< CPU_GBL_L 5A7<> 8B5<> 38D5> CPU_HIT_L 5A7> 8B5< 8D2< 38D5> CPU_HRESET_INV 7A7<> CPU_HRESET_L 5B3< 5C2< 6A1<> 7A5< 7A8< 41D6> CPU_L1TSTCLK 5B2< 5B3< CPU_L2TSTCLK 5B3< 5C2< CPU_LSSD_MODE 5B3< 5C2< CPU_MCP_L 5B3< 5D2< CPU_PLL_CFG<0> 5C3< 7D3< CPU_PLL_CFG<1> 5C3< 7D3< CPU_PLL_CFG<2> 5C3< 7D3< CPU_PLL_CFG<3> 5C3< 7D3< CPU_PLL_CFG<4> 5C3< 7D3<> CPU_PLL_CFGEXT 7D4<> CPU_PLL_FS00 7C4<> CPU_PLL_FS01 7C4< CPU_PLL_FS10 7C4< CPU_PLL_STOP_BASE 7C7< CPU_PLL_STOP_OC 7C4<> 7C8<> 31B6<> CPU_PMONIN_L 5A3< 5C2< CPU_PULLDOWN 5A2< 5A3< 5A3< 5C7<> CPU_PULLUP 5A3< 5C2< CPU_QACK_L 5B3< 8B5<> 38D5> CPU_QREQ_L 5B3> 8B5< 8C2< 38D5> CPU_SHD0_L 5A7<> 5D2< CPU_SHD1_L 5A7<> 5D2< CPU_SMI_L 5B3< 5C2< 31C4<> CPU_SRESET_L 5B2< 5B3< 41D6> CPU_SRWX_L 5A3< 5C2< CPU_TA_L 5B3< 8A3<> 8D2< 38D5> CPU_TBEN 5B3< 5D2< 8A5<> CPU_TBST_L 5A7> 8B5<> 38D5> CPU_TEA_L 5B3< 8A3<> 8C2< 38D5> CPU_THERM_DM 6A6<> 27A6< CPU_THERM_DP 6A6<> 27A6< CPU_TSIZ<0> 5A7> 8B5<> CPU_TSIZ<0..2> 38D5> CPU_TSIZ<1> 5A7> 8B5<> CPU_TSIZ<2> 5A7> 8B5<> CPU_TS_L 5C7<> 8D2< 8D5<> 38D5> CPU_TT<0> 5A7<> 8B5<> CPU_TT<0..4> 38D5> CPU_TT<1> 5A7<> 8B5<> CPU_TT<2> 5A7<> 8B5<> CPU_TT<3> 5A7<> 8B5<> CPU_TT<4> 5A7<> 8B5<> CPU_VCORE_HI_OC 7B8< 31D4<> 35C8< CPU_VCORE_PWR_SEQ 35D8<> CPU_VCORE_SEQ 35D8< CPU_VCORE_SEQ_L 35D8< CPU_VCORE_SLEEP 5D2< 5D8<> 6C6<> 35C1< 35D2< 40D3>
41C6> CPU_VCORE_SNUB 35B3< CPU_WT_L 5A7> 8B5<> 38C5> CSLOT_ADDR3_SPN 13B7> CSLOT_ADDR4_SPN 13B7> CSLOT_ADDR5_SPN 13B7> CSLOT_ADDR6_SPN 13B7> CSLOT_ADDR7_SPN 13B7> CSLOT_ADDR8_SPN 13B7> CSLOT_ADDR9_SPN 13B7> CSLOT_CE1_L_SPN 13C7> CSLOT_CE2_L_SPN 13C7> CSLOT_IORD_L_SPN 13C7> CSLOT_IOWAIT_L_PU 13C7< CSLOT_IOWR_L_SPN 13C7> CSLOT_OE_L_SPN 13C7> CSLOT_WE_L_SPN 13C7> CURRENT_THRESHOLD 32C3< CY25811_S0 19A3< CY25811_S1 19A3< DCDC_EN 21A7<> 30C8< 34B7<> 35C7<> DCDC_EN_CTRL 30C7<> DCDC_EN_L 34B6< 34B7<> 36C7<> DDC_CLK_ISO 23D4<> DDR_VREF 11D1< 11D3<> 11D5<> 11D6<> 11D8<>
40D3> DVI_DDC_CLK 23D4<> DVI_DDC_CLK_UF 23C5<> 23D3<> 41B6> DVI_DDC_DATA 23C4<> DVI_DDC_DATA_UF 23C5<> 41B6> DVI_HPD 23C4<> DVI_HPD_DIV 23C2< DVI_HPD_UF 23C3< 23C5<> 41B6> DVI_TURN_ON 23D3<> DVI_TURN_ON_BASE 23D2<> DVI_TURN_ON_ILIM 23D2< EIDE_ADDR<0> 13B7> 26B8< EIDE_ADDR<2..0> 39B5> EIDE_ADDR<1> 13B7> 26B8< EIDE_ADDR<2> 13B7> 26B8< EIDE_CS0_L 13B7> 26B8< 39B5> EIDE_CS1_L 13B7> 26A8< 39B5> EIDE_DATA<0> 13C7<> 26C8< EIDE_DATA<15..0> 39B5> EIDE_DATA<1> 13C7<> 26C8< EIDE_DATA<2> 13C7<> 26C8< EIDE_DATA<3> 13C7<> 26C8< EIDE_DATA<4> 13C7<> 26B8< EIDE_DATA<5> 13B7<> 26B8<
EIDE_DATA<6> 13B7<> 26B8< EIDE_DATA<7> 13B7<> 26B8< EIDE_DATA<8> 13B7<> 26D8< EIDE_DATA<9> 13B7<> 26C8< EIDE_DATA<10> 13B7<> 26D8< EIDE_DATA<11> 13B7<> 26C8< EIDE_DATA<12> 13B7<> 26C8< EIDE_DATA<13> 13B7<> 26C8< EIDE_DATA<14> 13B7<> 26C8< EIDE_DATA<15> 13B7<> 26C8< EIDE_DMACK_L 13A7<> 26A8< 39B5> EIDE_DMARQ 13A7< 26A8< 39B5> EIDE_INT 13A7< 26A8< 39B5> EIDE_IOCHRDY 13B7< 26A8< 39B5> EIDE_OPTICAL_ADDR<0> 26A5<> 26B7< EIDE_OPTICAL_ADDR<2..0> 39B5> 41C3> EIDE_OPTICAL_ADDR<1> 26A5<> 26B7< EIDE_OPTICAL_ADDR<2> 26A6<> 26B7< EIDE_OPTICAL_CS0_L 26A5<> 26B7< 39B5> 41C3> EIDE_OPTICAL_CS1_L 26A6<> 26A7< 39B5> 41C3> EIDE_OPTICAL_DATA<0> 26A5<> 26C7< EIDE_OPTICAL_DATA<15..0> 39B5> 41C3> EIDE_OPTICAL_DATA<1> 26A5<> 26C7< EIDE_OPTICAL_DATA<2> 26A5<> 26C7< EIDE_OPTICAL_DATA<3> 26A5<> 26C7< EIDE_OPTICAL_DATA<4> 26A5<> 26B7< EIDE_OPTICAL_DATA<5> 26A5<> 26B7< EIDE_OPTICAL_DATA<6> 26A5<> 26B7< EIDE_OPTICAL_DATA<7> 26A5<> 26B7< EIDE_OPTICAL_DATA<8> 26A6<> 26D7< EIDE_OPTICAL_DATA<9> 26A6<> 26C7< EIDE_OPTICAL_DATA<10> 26A6<> 26D7< EIDE_OPTICAL_DATA<11> 26A6<> 26C7< EIDE_OPTICAL_DATA<12> 26A6<> 26C7< EIDE_OPTICAL_DATA<13> 26A6<> 26C7< EIDE_OPTICAL_DATA<14> 26A6<> 26C7< EIDE_OPTICAL_DATA<15> 26A6<> 26C7< EIDE_OPTICAL_DMAACK_L 26A6<> 26A7< 39A5> 41C3> EIDE_OPTICAL_DMA_RQ 26A6<> 26A7< 39A5> 41C3> EIDE_OPTICAL_INT 26A5<> 26A7< 39A5> 41B3> EIDE_OPTICAL_IOCHRDY 26A5<> 26A7< 39A5> 41B3> EIDE_OPTICAL_READ_L 26A6<> 26A7< 39B5> 41C3> EIDE_OPTICAL_RST_L 26A7< 26B5<> 39A5> 41C3> EIDE_OPTICAL_WR_L 26A5<> 26A7< 39B5> 41B3> EIDE_RD_L 13A7> 26A8< 39B5> EIDE_RST_L 13B7> 26A8< 39B5> EIDE_WR_L 13A7> 26A8< 39B5> ENET_COL 13C5< 28B7> 39A5> ENET_COMA 28B7<> ENET_CRS 13C5< 28B7> 39A5> ENET_CTAP_CHGND 40A6> ENET_ENERGY_DET 14B5<> 28B7<> ENET_HSDACM 28A7<> ENET_HSDACP 28A7<> ENET_LINK_RXD<0> 13C5< 28C7> ENET_LINK_RXD<7..0> 39A5> ENET_LINK_RXD<1> 13C5< 28C7> ENET_LINK_RXD<2> 13C5< 28C7> ENET_LINK_RXD<3> 13C5< 28B7> ENET_LINK_RXD<4> 13C5< 28B7> ENET_LINK_RXD<5> 13C5< 28B7> ENET_LINK_RXD<6> 13C5< 28B7> ENET_LINK_RXD<7> 13C5< 28B7> ENET_LINK_TXD<0> 13B4< 13D5> ENET_LINK_TXD<7..0> 39A5> ENET_LINK_TXD<1> 13B4< 13D5> ENET_LINK_TXD<2> 13B4< 13D5> ENET_LINK_TXD<3> 13B4< 13D5> ENET_LINK_TXD<4> 13B4< 13D5> ENET_LINK_TXD<5> 13B4< 13D5> ENET_LINK_TXD<6> 13A4< 13D5> ENET_LINK_TXD<7> 13A4< 13D5> ENET_LINK_TX_EN 13D5<> 39A5> ENET_LINK_TX_ER 13D5<> 39A5> ENET_MDC 13C5> 28B7< 39A5> ENET_MDIO 13C5<> 28B7<> 39A5> ENET_PHY_TXD<0> 13B5< 28C7< ENET_PHY_TXD<7..0> 39A5> ENET_PHY_TXD<1> 13B5< 28C7< ENET_PHY_TXD<2> 13B5< 28C7< ENET_PHY_TXD<3> 13B5< 28C7< ENET_PHY_TXD<4> 13B5< 28C7< ENET_PHY_TXD<5> 13B5< 28C7< ENET_PHY_TXD<6> 13A5< 28C7< ENET_PHY_TXD<7> 13A5< 28C7< ENET_PHY_TX_EN 13D6< 28C7< 39A5> ENET_PHY_TX_ER 13D6< 28C7< 39A5> ENET_RSET 28A5< ENET_RST_L 28B7< ENET_RX_DV 13D5< 28B7> 39A5> ENET_RX_ER 13C5< 28B7> 39A5> ENET_VSSC 28A7<> ESP_EN_L 6C2<> 6C2< EXT_TMDS_D3_CMF 20B3< EXT_TMDS_D4_CMF 20A3< EXT_TMDS_D5_CMF 20A3< FAN1_GND 40B6> 41A3> FAN1_PWM 27A4<> FAN1_PWM_L 27A5<> 27B2<> FAN1_TACH 27A4< 27B2< 41A3> FAN2_GND 40B6> 41A3> FAN2_PWM 27A3<> FAN2_PWM_L 27A3<> 27B2<> FAN2_TACH 27A3< 27B2< 41A3> FB_4_85V_BU 33A5< FP_PWR_EN 21C6<> 23A5< 23B3<> FP_PWR_EN_L 23B3<> FWB_TPB0 29A3< FWB_TPB1 29A3< FWPLL_BYP 29D8<> FW_BIAS0 29A4<> FW_BIAS1 29A4<> FW_BMODE 29B6< FW_CORE_ADJ 29C7< FW_CORE_BYP 29C7<> FW_CPS 29B6< FW_GATE_EN 30D6<> FW_GATE_EN_RC 30C6<> FW_INPUT_PD 29A6< FW_LINK_CNTL<0> 13C3<> 29C3< FW_LINK_CNTL<1..0> 39A5> FW_LINK_CNTL<1> 13C3<> 29C3< FW_LINK_DATA<0> 13D3<> 29B7< FW_LINK_DATA<7..0> 39A5> FW_LINK_DATA<1> 13D3<> 29B7< FW_LINK_DATA<2> 13D3<> 29B7< FW_LINK_DATA<3> 13D3<> 29B7< FW_LINK_DATA<4> 13C3<> 29B7< FW_LINK_DATA<5> 13C3<> 29A7< FW_LINK_DATA<6> 13C3<> 29A7< FW_LINK_DATA<7> 13C3<> 29A7< FW_LINK_LREQ 13C3<> 39A5> FW_LKON 13C3<> 29B4<> FW_OSC 29A4< 37A1> FW_OSC_EN 29A3< FW_PC_PD 29B6< FW_PC_PU 29B6< FW_PHY_CNTL<0> 29B4<> 29C4< FW_PHY_CNTL<1..0> 39A5> FW_PHY_CNTL<1> 29B4<> 29C4< FW_PHY_DATA<0> 29B7<> FW_PHY_DATA<7..0> 39A5> FW_PHY_DATA<1> 29B7<> FW_PHY_DATA<2> 29B7<> FW_PHY_DATA<3> 29B7<> FW_PHY_DATA<4> 29B7<> FW_PHY_DATA<5> 29A7<> FW_PHY_DATA<6> 29A7<> FW_PHY_DATA<7> 29A7<> FW_PHY_LPS 13C3<> 29B7< FW_PHY_LREQ 13C2< 29B7< 39A5> FW_PHY_PD 14C5<> 29B7< FW_PHY_RESET_L 29A7< FW_PINT 13C3<> 29B4> 39A5> FW_PLL_ADJ 29C7< FW_PORT1_SEL 29B6< FW_POWER_UP 30C7<> FW_R0 29A4<> FW_R1 29A4<> FW_TESTM 29A6< FW_TPA1N 29B2<> 30A4<> 39D2> FW_TPA1P 29B2<> 30A4<> 39D2> FW_TPAO0N 30C2<> 39D2> FW_TPAO0P 30C2<> 39D2> FW_TPB1N 29A2<> 30A4<> 39D2> FW_TPB1P 29B2<> 30A4<> 39D2> FW_TPB2_PD 29A4<> FW_TPBI0N 30C2<> 39D2>
FW_TPBI0P 30C2<> 39D2> FW_TPI0N 29B2<> 30C3<> 39D2> 41A3> FW_TPI0P 29B2<> 30C3<> 39D2> 41A3> FW_TPI1N 30A3<> 39D2> 41D1> FW_TPI1P 30A3<> 39D2> 41D1> FW_TPO0N 29B2<> 30C3<> 39D2> 41A3> FW_TPO0P 29B2<> 30C3<> 39D2> 41A3> FW_TPO0R 30C1<> 41A3> FW_TPO1N 30A3<> 39D2> 41D1> FW_TPO1P 30A3<> 39D2> 41D1> FW_VDD_ON 40A3> FW_VGND 41A3> 41D1> FW_VGND0 30C1<> 40A3> FW_VGND1 30A3<> 40A3> FW_VREG_PD 29A6< FW_XI 29A4<> 37A1> GPU_AGP_TEST 19C6< GPU_B 21D6<> 23C8< 38A1> GPU_C 21D6<> 23A8< GPU_COMP 21D6<> 23A8< GPU_CORE_OK 21A6<> 21D4<> 22D2<> 22D7<> GPU_DVI_DDC_CLK 21C5<> 23D3<> GPU_DVI_DDC_DATA 21C5<> 23C3<> GPU_DVO_CLKP 19B3< GPU_DVO_CLKP_R1 19B2< 20A8< 38C1> GPU_DVO_CLKP_R2 19B2< 20A6< 38C1> GPU_G 21D6<> 23C8< 38B1> GPU_HPD 21C5< 23C3<> GPU_MEM_IO 19A6<> 19B8< 22A7< 22B4< 22D2<
40C3> GPU_MEM_IO_FLT 22C2< 40C3> GPU_R 21D6<> 23B8< 38B1> GPU_THERM_DM 19A6<> 27A6< GPU_THERM_DP 19A6<> 27A6< GPU_TV_GND1 23B8<> 40B6> GPU_TV_GND2 23A8<> 40B6> GPU_VCORE 19D8< 21B3<> 21B5<> 21D4< 40C3>
41C6> GPU_VCORE_CNTL 21A3<> GPU_VCORE_CNTL_L 21A4< 21B7<> GPU_VCORE_CNTL_RC 21A3<> GPU_VCORE_NECK 21B5<> 40B3> GPU_VCORE_PWR_SEQ 21A8<> GPU_VCORE_SEQ 21A8< GPU_VCORE_SEQ_L 21A8< GPU_VCORE_SW 21A4<> 40B1> GPU_VCORE_SW_F 21A3<> 40B1> GPU_VCORE_VDDCI 19C8< 19D6< 40B3> GPU_Y 21D6<> 23B8< HD_ADDR<0> 26C2<> 26C3< HD_ADDR<2..0> 39C5> HD_ADDR<1> 26C2<> 26C3< HD_ADDR<2> 26B3< 26C1<> HD_CS0_L 26C2<> 26C3< 39B5> HD_CS1_L 26B3< 26C1<> 39B5> HD_DATA<0> 26C2<> 26D3< HD_DATA<15..0> 39C5> HD_DATA<1> 26C2<> 26D3< HD_DATA<2> 26D2<> 26D3< HD_DATA<3> 26D2<> 26D3< HD_DATA<4> 26C3< 26D2<> HD_DATA<5> 26C3< 26D2<> HD_DATA<6> 26C3< 26D2<> HD_DATA<7> 26C3< 26D2<> HD_DATA<8> 26C3< 26D1<> HD_DATA<9> 26C3< 26D1<> HD_DATA<10> 26C3< 26D1<> HD_DATA<11> 26D1<> 26D3< HD_DATA<12> 26B3< 26D1<> HD_DATA<13> 26B3< 26D1<> HD_DATA<14> 26C1<> 26C3< HD_DATA<15> 26B3< 26C1<> HD_DIOR_L 26A3< 26C2<> 39B5> HD_DIOW_L 26A3< 26C1<> 39B5> HD_DMACK_L 26A3< 26C2<> 39B5> HD_DMARQ 13C6< 26C2<> 39B5> HD_INTRQ 13C6< 26C1<> 39B5> HD_IOCHRDY 26A3< 26C1<> 39B5> HD_RESET_L 26A3< 26D2<> 39C5> HIGH_VCORE 21A2<> HIGH_VCORE_DIVD 21A3< HPD_4V_REF 23C2< HPD_PWR_SNS_EN 21C7<> 23C3<> HPD_PWR_SW 23C1< HPD_PWR_SW_BASE 23C2<> HPD_REF_EN_L 23C2<> IAC_FB 32D4< IAC_RC_COMP 32D3< ICT_TRST_L 6B2<> 6C2< INTREPID_ACS_REF 8A5< INT_AGPPVT 12D4<> INT_AGP_FB_IN 12C4< 37C1> INT_AGP_FB_OUT 12C4<> 37C1> INT_AGP_VREF 12B5< 12D4<> 19D6< 40C3> INT_CPUFB_IN 8A5< 8B5< 37D1> INT_CPUFB_IN_NORM 8A4< 37D1> INT_CPUFB_LONG 8A3< 37D1> INT_CPUFB_OUT 8A5<> 8A5< 37D1> INT_CPUFB_OUT_NORM 8A4< 37D1> INT_CPUFB_OUT_SHORT 8A5< 37D1> INT_DDRCLK2_N_TP 9B6<> INT_DDRCLK2_P_TP 9B6<> INT_DDRCLK5_N_TP 9B6<> INT_DDRCLK5_P_TP 9B6<> INT_ENET_RST_L 14B5<> 28B8< INT_EXTINT3_PU 14A7< 14B5<> INT_EXTINT8_PU 14B5<> 14C7< INT_EXTINT10_PU 14B5<> 14B7< INT_EXTINT13_PU 14B5<> 14B7< INT_EXTINT14_PU 14B5<> 14C7< INT_EXTINT16_PU 14B5<> 14B7< INT_GPIO1_PU 14B7< 14C5<> 35C8< INT_GPIO9_PU 14B5<> 14B7< INT_GPIO12_PU 14B5<> 14B7< INT_GPIO15_PU 14B5<> 14B7< INT_I2C_CLK0 6B3<> 6D2< 11A5<> 11A8<> 13C2<
13C3<> 24D7<> 41C6> INT_I2C_CLK1 13C2< 13C3<> 14B7< 24B3<> 25C2<>
27B4< 41C6> INT_I2C_CLK2 14A2<> 27D7<> 41A6> INT_I2C_DATA0 6B3<> 6D2<> 11A5<> 11A8<> 13C2<
13C3<> 24D7<> 41C6> INT_I2C_DATA1 13B2< 13C3<> 14B7< 24B3<> 25C2<>
27B4<> 41C6> INT_I2C_DATA2 14A2<> 27D7<> 41A6> INT_I2S0_SND_FROM_ADC 14B2< 27D7<> 41A6> INT_I2S0_SND_LRCLK 14B1< 27D8<> 41A6> INT_I2S0_SND_LRCLK_UF 14A3<> INT_I2S0_SND_MCLK 14B1< 27D8<> 37B1> 41A6> INT_I2S0_SND_MCLK_UF 14A3<> INT_I2S0_SND_SCLK 14B1< 27D7<> 41A6> INT_I2S0_SND_SCLK_UF 14A3<> INT_I2S0_SND_TO_DAC 14B1< 27D8<> 41A6> INT_I2S0_SND_TO_DAC_UF 14B3<> INT_JTAG_TEI 13C2< 13C5< 41D6> INT_MEM_REF_H 9B6< 40C3> INT_MEM_VREF 9A7< 9B6<> 40C3> INT_MOD_BITCLK 14A1< 27C3< INT_MOD_BITCLK_UF 14A3<> 14A7< INT_MOD_CLKOUT 14A1< 27C3< INT_MOD_CLKOUT_UF 14A3<> 14A7< INT_MOD_DTI 14A2< 14A7< 27C3< INT_MOD_DTO 14B1< 27C3< INT_MOD_DTO_UF 14A3<> 14A7< INT_MOD_SYNC 14A1< 27C3< INT_MOD_SYNC_UF 14A3<> 14A7< INT_PCI_FB_IN 12C7< 37C1> INT_PCI_FB_OUT 12C7<> 37C1> INT_PEND_PROC_INT 14A5> 31C4<> INT_PROC_SLEEP_REQ_L 14A5< 31B4<> INT_PU_RESET_L 13D3< 27D5<> 31A2< 31C4<> INT_REF_CLK_IN 14A5< 14B5< 37C1> INT_REF_CLK_OUT 14A5< 14B7< 37C1> INT_REF_CLK_OUT_UF 14A5<> 37C1> INT_RESET_L 9B3< 13D3< 31C7< 31D4<> INT_ROM_CS_L 12A5< 12C7> INT_ROM_OE_L 12A5< 12C7> INT_ROM_RW_L 12A5< 12C7> INT_SUSPEND_ACK_L 8B5> 31B6<> INT_SUSPEND_REQ_L 8B5< 31B6<> 31C7< INT_TDO 13C5> 13D2< 14A6< 28A5< INT_TST_MONIN_PD 13C2< 13C5< 41C6> INT_TST_MONOUT_TP 13C5> 41C6> INT_TST_PLLEN_PD 13C5< 13D2< 41C6> INT_WATCHDOG_L 14A5> 31C6<> INV_GND 23A1<> 41A6> INV_ON_PWM 21C6<> 23A3<
IO_RESET_L 17A8< 24D7<> 25C2< 28B8< 31C6<>
31D7< JTAG_ASIC_TCK 13C5< 13D2< 28A5< 41D6> JTAG_ASIC_TDI 13C5< 13D2< 41D6> JTAG_ASIC_TDO_TP 28A5> 41D6> JTAG_ASIC_TMS 13C5< 13D2< 28A5< 41D6> JTAG_ASIC_TRST_L 13C2< 13C5< 28A5< 41D6> JTAG_CPU_TCK 5A2< 5B3< 6A3> 41D6> JTAG_CPU_TDI 5B2< 5C3< 6B2<> 41D6> JTAG_CPU_TDO_TP 5C3> 41D6> JTAG_CPU_TMS 5B2< 5B3< 6B2<> 41D6> JTAG_CPU_TRST_L 5B3< 6A4< 6B2<> 41D6> KBDLED_ANODE 24B3<> 24D7<> KBDLED_RETURN 24B3<> 24D7<> KBD_CAPSLOCK_LED 41B3> KBD_COMMAND_L 24C2< 31C6<> 41B3> KBD_CONTROL_L 24C2< 31C6<> 41A3> KBD_FUNCTION_L 24C2< 31B6<> 41B3> KBD_ID 24D2< 31B6<> 41B3> KBD_INTL 41B3> KBD_JIS 41B3> KBD_NUMLOCK_LED 41B3> KBD_OPTION_L 24C2< 31B6<> 41B3> KBD_SHIFT_L 24C2< 31C6<> 41A3> KBD_X<0> 24D2< 31C6<> KBD_X<0..9> 41A3> KBD_X<1> 24D2< 31C6<> KBD_X<2> 24C2< 31C6<> KBD_X<3> 24C2< 31C6<> KBD_X<4> 24C2< 31C6<> KBD_X<5> 24C2< 31C6<> KBD_X<6> 24C2< 31C6<> KBD_X<7> 24C2< 31C6<> KBD_X<8> 24C2< 31C6<> KBD_X<9> 24C2< 31C6<> KBD_Y<0..7> 41A3> LCD_DIGON_L 23B6< LCD_PWREN_L 23B5<> LED_LINK10 28B5<> LED_LINK100 28B5<> LED_RX_SPN 28B5> LID_CLOSED_L 24A3<> 41C1> LM2594_IN 29D8<> 40A3> LMU_DETECT 24C7< 24D6<> 41D1> LT1962_INT_ADJ 14D7< LT1962_INT_BYP 14D7<> LTC1625_ITH 32D2<> LTC1962_INT_VIN 14D8<> 40A1> LTC3405_SW 28D4<> 40A3> LTC3411_EN_L 36A7< LTC3411_GND 36A5<> 40A1> LTC3411_ITH 36A5<> 40A1> LTC3411_ITH_RC 36A5< 40A1> LTC3411_SHDN 36A6<> 40A1> LTC3411_SYNC 36A6<> 40A1> LTC3411_VCC 36A6< 36A7< 40B1> LTC3707_START_RC 34B6< LUX_ALS_GAIN_SW 24B8<> 24D6<> LUX_ALS_OUT 24B8<> 24D6<> LVDS_DDC_CLK 21C5<> 23A4< 23B4<> 41B6> LVDS_DDC_DATA 21C5<> 23A4< 23B4<> 41B6> LVDS_L0N 21B5> 23B4<> 39C2> 41B6> LVDS_L0P 21B5> 23B4<> 39C2> 41B6> LVDS_L1N 21B5> 23B4<> 39C2> 41B6> LVDS_L1P 21B5> 23B4<> 39C2> 41B6> LVDS_L2N 21B5> 23A4<> 39C2> 41B6> LVDS_L2P 21B5> 23A4<> 39C2> 41B6> LVDS_L3N_TP 21B5> LVDS_L3P_TP 21B5> LVDS_U0N 39C2> LVDS_U0P 39C2> LVDS_U1N 39C2> LVDS_U1P 39C2> LVDS_U2N 39C2> LVDS_U2P 39C2> MAIN_RESET_L 14C7< 17A8< 18A7< 19B8< 20B6<
26D6<> 31D4<> 31D7< 41C3> MASTER_SWING 20B7< 20D6< MAX1715_GND 36B5<> 36C5< 40C1> MAX1715_ON_RC 36C7<> MAX1715_REF 36B5<> 40C1> MAX1715_SKIP 36C4< 40C1> MAX1715_TON 36C5< 40C1> MAX1715_VCC 36D5< 40C1> MAX4172_OUT 32D4<> MAXBUS_SLEEP 5D2< 5D5< 6A3< 6B2< 6B4< 7B7< 7D8<
8B3< 8B8< 8C8< 8D1< 8D8< 15D8< 16D8<
35D8< 40D3> MDI0_PD 28B4< MDI1_PD 28B4< MDI2_PD 28B4< MDI3_PD 28B3< MDI_M<0> 28B5<> 39D2> MDI_M<0..3> 41A3> MDI_M<1> 28B5<> 39D2> MDI_M<2> 28B5<> 39C2> MDI_M<3> 28B5<> 39C2> MDI_P<0> 28B5<> 39D2> MDI_P<0..3> 41A3> MDI_P<1> 28B5<> 39D2> MDI_P<2> 28B5<> 39C2> MDI_P<3> 28B5<> 39C2> MEM_ADDR<0> 9B5< 9D6<> MEM_ADDR<12..0> 37A5> MEM_ADDR<1> 9B5< 9D6<> MEM_ADDR<2> 9B5< 9D6<> MEM_ADDR<3> 9B5< 9D6<> MEM_ADDR<4> 9B5< 9D6<> MEM_ADDR<5> 9B5< 9D6<> MEM_ADDR<6> 9B5< 9D6<> MEM_ADDR<7> 9B5< 9D6<> MEM_ADDR<8> 9B5< 9D6<> MEM_ADDR<9> 9A5< 9D6<> MEM_ADDR<10> 9A5< 9D6<> MEM_ADDR<11> 9A5< 9D6<> MEM_ADDR<12> 9A5< 9D6<> MEM_BA<0> 9A5< 9D6<> MEM_BA<1..0> 37A5> MEM_BA<1> 9A5< 9C6<> MEM_CAS_L 9A5< 9C6<> 37A5> MEM_CKE<0> 9B6<> 9C5< MEM_CKE<3..0> 37A5> MEM_CKE<1> 9B6<> 9C5< MEM_CKE<2> 9B6<> 9C5< MEM_CKE<3> 9B6<> 9C5< MEM_CS_L<0> 9C5< 9C6<> MEM_CS_L<3..0> 37A5> MEM_CS_L<1> 9C5< 9C6<> MEM_CS_L<2> 9C5< 9C6<> MEM_CS_L<3> 9C5< 9C6<> MEM_DATA<0> 9D8<> 10C7<> MEM_DATA<7..0> 37D5> MEM_DATA<1> 9D8<> 10C7<> MEM_DATA<2> 9D8<> 10C7<> MEM_DATA<3> 9D8<> 10C7<> MEM_DATA<4> 9D8<> 10C7<> MEM_DATA<5> 9D8<> 10C7<> MEM_DATA<6> 9D8<> 10C7<> MEM_DATA<7> 9D8<> 10C7<> MEM_DATA<8> 9D8<> 10C7<> MEM_DATA<15..8> 37D5> MEM_DATA<9> 9D8<> 10C7<> MEM_DATA<10> 9D8<> 10C7<> MEM_DATA<11> 9D8<> 10C7<> MEM_DATA<12> 9D8<> 10B7<> MEM_DATA<13> 9C8<> 10B7<> MEM_DATA<14> 9C8<> 10B7<> MEM_DATA<15> 9C8<> 10B7<> MEM_DATA<16> 9C8<> 10C5<> MEM_DATA<23..16> 37C5> MEM_DATA<17> 9C8<> 10C5<> MEM_DATA<18> 9C8<> 10C5<> MEM_DATA<19> 9C8<> 10C5<> MEM_DATA<20> 9C8<> 10C5<> MEM_DATA<21> 9C8<> 10C5<> MEM_DATA<22> 9C8<> 10C5<> MEM_DATA<23> 9C8<> 10C5<> MEM_DATA<24> 9C8<> 10C5<> MEM_DATA<31..24> 37C5> MEM_DATA<25> 9C8<> 10C5<> MEM_DATA<26> 9C8<> 10C5<> MEM_DATA<27> 9C8<> 10C5<> MEM_DATA<28> 9C8<> 10C5<> MEM_DATA<29> 9C8<> 10B5<> MEM_DATA<30> 9C8<> 10B5<> MEM_DATA<31> 9C8<> 10B5<> MEM_DATA<32> 9C8<> 10C3<> MEM_DATA<39..32> 37C5>
MEM_DATA<33> 9C8<> 10C3<> MEM_DATA<34> 9C8<> 10C3<> MEM_DATA<35> 9C8<> 10C3<> MEM_DATA<36> 9C8<> 10C3<> MEM_DATA<37> 9C8<> 10C3<> MEM_DATA<38> 9C8<> 10C3<> MEM_DATA<39> 9B8<> 10C3<> MEM_DATA<40> 9B8<> 10C3<> MEM_DATA<47..40> 37B5> MEM_DATA<41> 9B8<> 10C3<> MEM_DATA<42> 9B8<> 10C3<> MEM_DATA<43> 9B8<> 10C3<> MEM_DATA<44> 9B8<> 10C3<> MEM_DATA<45> 9B8<> 10B3<> MEM_DATA<46> 9B8<> 10B3<> MEM_DATA<47> 9B8<> 10B3<> MEM_DATA<48> 9B8<> 10C1<> MEM_DATA<55..48> 37B5> MEM_DATA<49> 9B8<> 10C1<> MEM_DATA<50> 9B8<> 10C1<> MEM_DATA<51> 9B8<> 10C1<> MEM_DATA<52> 9B8<> 10C1<> MEM_DATA<53> 9B8<> 10C1<> MEM_DATA<54> 9B8<> 10C1<> MEM_DATA<55> 9B8<> 10C1<> MEM_DATA<56> 9B8<> 10C1<> MEM_DATA<63..56> 37A5> MEM_DATA<57> 9B8<> 10C1<> MEM_DATA<58> 9B8<> 10C1<> MEM_DATA<59> 9B8<> 10C1<> MEM_DATA<60> 9B8<> 10C1<> MEM_DATA<61> 9B8<> 10B1<> MEM_DATA<62> 9B8<> 10B1<> MEM_DATA<63> 9B8<> 10B1<> MEM_DQM<0> 9C6<> 10C7<> 37D5> MEM_DQM<1> 9C6<> 10B7<> 37D5> MEM_DQM<2> 9C6<> 10C5<> 37C5> MEM_DQM<3> 9C6<> 10B5<> 37C5> MEM_DQM<4> 9C6<> 10C3<> 37B5> MEM_DQM<5> 9C6<> 10B3<> 37B5> MEM_DQM<6> 9C6<> 10C1<> 37B5> MEM_DQM<7> 9C6<> 10B1<> 37A5> MEM_DQS<0> 9C6<> 10C7<> 37D5> MEM_DQS<1> 9C6<> 10B7<> 37D5> MEM_DQS<2> 9C6<> 10C5<> 37C5> MEM_DQS<3> 9C6<> 10B5<> 37C5> MEM_DQS<4> 9C6<> 10C3<> 37B5> MEM_DQS<5> 9C6<> 10B3<> 37B5> MEM_DQS<6> 9C6<> 10C1<> 37B5> MEM_DQS<7> 9C6<> 10B1<> 37A5> MEM_MUXSEL_LSB 9B6<> 10B5<> 10B7<> 37A5> MEM_MUXSEL_LSB_L_TP 9B6<> MEM_MUXSEL_MSB 9B6<> 10B1<> 10B3<> 37A5> MEM_MUXSEL_MSB_L_TP 9B6<> MEM_RAS_L 9A5< 9C6<> 37A5> MEM_WE_L 9A5< 9C6<> 37A5> MMM_ACC_DETECT 25B8<> 25C2<> MMM_ACC_PWRDOWN 25B8<> 25C1< 25C7<> MMM_ACC_SELFTEST 25B8<> 25C2<> 25C7<> 41C1> MMM_ACC_X_AXIS 25C5> 25C6< 25D2<> 41C1> MMM_ACC_Y_AXIS 25B6< 25C2<> 25C5> 41C1> MMM_ACC_Z_AXIS 25B6< 25C2<> 25C5> 41C1> MMM_FFIRQ_L 14A6< 14B5<> 25C1< MMM_PIC_AAC_PWRDOWN 25C2<> MMM_PIC_AN2_PD 25C4<> MMM_PIC_AN3_PU 25C4<> MMM_PIC_FFIRQ_L 25C2<> MMM_PIC_SIRQ_L 25C2<> MMM_RESET_L 25C1< 25C2<> MMM_SIRQ_L 14A6< 14B5<> 25C1< MPIC_CPU_INT_L 5B2< 5B3< 14B5> MSEN_M 20B7> 20D7< MSEN_S 20B4> 20D6< NEC_AMC_TP 17A5< NEC_AVDD 17D6< 40A3> NEC_AVSS_F 17A5< 17B4< NEC_CRUN_L 17A7<> NEC_IDSEL 17B7< NEC_IO_RESET_L 17A7< 17B7< NEC_LEGC 17A7< 17A8< NEC_LUSB_OCI 17B3< 17B5< NEC_LUSB_OCI_UF 17B1< 27D8<> 41A6> NEC_LUSB_PPON 17B5> 27D8<> 41A6> NEC_MAIN_RESET_L 17A7< 17A7< NEC_NANDTESTEN_TP 17A4< NEC_NANDTESTOUT_TP 17A4<> NEC_NC<1> 17B5<> NEC_NC<2> 17B5<> NEC_OCI<3> 17B5< NEC_OCI<4> 17B5< NEC_OCI<5> 17B5< NEC_PCI_GNT_L 12C7<> 17B7< NEC_PCI_INTA_L 17B7<> NEC_PCI_INTB_L 17B7<> NEC_PCI_INTC_L 17B7<> NEC_PCI_INT_L 14B5<> 14D7< 17B8< NEC_PCI_REQ_L 12A7< 12D7<> 17B7> NEC_PME_L 17A7> 17A7< NEC_PPON3_TP 17B5> NEC_PPON4_TP 17B5> NEC_PPON5_TP 17B5> NEC_RREF 17B5<> NEC_RUSB_OCI 17B3< 17B5< NEC_RUSB_OCI_UF 17B1< 27D1<> 41D3> NEC_RUSB_PPON 17B5> 27D1<> 41D3> NEC_SMI_L_TP 17A7> NEC_USB_DAM 17D2<> 27D7<> 39B2> 41D3> NEC_USB_DAP 17D2<> 27D7<> 39B2> 41D3> NEC_USB_DBM 17C2<> 27D2<> 39B2> 41D3> NEC_USB_DBP 17C2<> 27D2<> 39B2> 41D3> NEC_USB_RSDM1 17C5<> NEC_USB_RSDM2 17C5<> NEC_USB_RSDP1 17C5<> NEC_USB_RSDP2 17C5<> NEC_XT1 17D5< NEC_XT2 17D5<> NEC_XT2_R 17D4< OVER_18V_ADJ 32C3<> PCI1510_VR_EN_L 18C7< PCI_AD<0> 9C3< 12D6<> 17D7<> 18C7<> 26B5<> PCI_AD<31..0> 39C5> 41D3> PCI_AD<1> 9C3< 12D6<> 17D7<> 18C7<> 26B6<> PCI_AD<2> 9C3< 12D6<> 17D7<> 18C7<> 26C5<> PCI_AD<3> 9C3< 12D6<> 17C7<> 18C7<> 26C6<> PCI_AD<4> 9C3< 12D6<> 17C7<> 18C7<> 26C5<> PCI_AD<5> 9C3< 12D6<> 17C7<> 18C7<> 26C6<> PCI_AD<6> 9C3< 12C6<> 17C7<> 18C7<> 26C5<> PCI_AD<7> 9C3< 12C6<> 17C7<> 18C7<> 26C6<> PCI_AD<8> 9C3< 12C6<> 17C7<> 18C7<> 26C6<> PCI_AD<9> 9C3< 12C6<> 17C7<> 18C7<> 26C5<> PCI_AD<10> 9C3< 12C6<> 17C7<> 18C7<> 26C6<> PCI_AD<11> 9C3< 12C6<> 17C7<> 18C7<> 26C5<> PCI_AD<12> 9C3< 12C6<> 17C7<> 18C7<> 26C6<> PCI_AD<13> 9C3< 12C6<> 17C7<> 18C7<> 26C5<> PCI_AD<14> 9C3< 12C6<> 17C7<> 18C7<> 26C6<> PCI_AD<15> 9C3< 12C6<> 17C7<> 18C7<> 26C5<> PCI_AD<16> 9C3< 12C6<> 17C7<> 18C7<> 26C5<> PCI_AD<17> 9C3< 12C6<> 17C7<> 18C7<> 26C6<> PCI_AD<18> 9C3< 12C6<> 17C7<> 18B7<> 26C5<>
26D4< PCI_AD<19> 9B3< 12C6<> 17C7<> 18B7<> 26C6<> PCI_AD<20> 9B3< 12C6<> 17C7<> 18B7<> 26C5<> PCI_AD<21> 12C6<> 17C7<> 18B7<> 26C6<> PCI_AD<22> 12C6<> 17C7<> 18B7<> 26C5<> PCI_AD<23> 12C6<> 17C7<> 18B7<> 26C6<> PCI_AD<24> 9C1<> 12C6<> 17C7<> 18B7<> 26C5<> PCI_AD<25> 9C1<> 12C6<> 17C7<> 18B7<> 26C6<> PCI_AD<26> 9C1<> 12C6<> 17C7<> 18B7<> 26C5<> PCI_AD<27> 9C1<> 12C6<> 17C8<> 18B7<> 26D6<> PCI_AD<28> 9C1<> 12C6<> 17C7<> 18B7<> 26C5<> PCI_AD<29> 9C1<> 12C6<> 17B7<> 18B7<> 26D6<> PCI_AD<30> 9C1<> 12C6<> 17B7<> 18B7<> 26D5<> PCI_AD<31> 9C1<> 12C6<> 17B7<> 18B7<> 26D6<> PCI_CBE<0> 12C7<> 17B7<> 18B7<> 26C5<> PCI_CBE<3..0> 39C5> PCI_CBE<1> 12C7<> 17B7<> 18B7<> 26C6<> PCI_CBE<2> 12C7<> 17B7<> 18B7<> 26C6<> PCI_CBE<3> 12C7<> 17B7<> 18B7<> 26C6<> PCI_DEVSEL_L 12B7< 12C7<> 17B7<> 18A7<> 26C5<>
39C5> 41C3> PCI_FRAME_L 12B7< 12C7<> 17B7<> 18B7<> 26C5<>
39C5> 41D3> PCI_IRDY_L 12B7< 12C7<> 17B7<> 18B7<> 26C6<>
39C5> 41D3> PCI_PAR 12C7<> 17B7<> 18B7<> 26C5<> 39C5>
41C3> PCI_PERR_L 17B7<> 18B7<> 18D7< PCI_SERR_L 17B7> 18B7> 18D7<
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
44
PCI_STOP_L 12A7< 12C7<> 17B7<> 18B7<> 26C5<>
39C5> 41C3>
PCI_TRDY_L 12B7< 12C7<> 17B7<> 18A7<> 26C5<>
39C5> 41D3> PLL_STOP_L 7C4<> 7C8<> PMU_ACK_L 14C2< 31C4<> PMU_AC_DET 31A5< 31B4<> PMU_AC_IN 31B4<> PMU_BATT0_DET_L 31B4<> PMU_BATT1_DET_L_PU 31B4<> 31D2< PMU_BATT_DET_L 31A8<> 31B3< 31D2< 32A4<> 41A3> PMU_BYTE 31B6< 31C7< PMU_CHARGE_V 31C4<> 32B8<> PMU_CHRG_BATT_0 31C4<> 32A8<> PMU_CLK 14C2<> 31C4<> PMU_CNVSS 31B6< 31C7< PMU_CPU_HRESET_L 6A2< 6C3<> 31C4<> 41C1> PMU_CUSTOM_RESET 31A7<> 31B8< PMU_CUSTOM_RESET_L 31A8<> PMU_EPM 31C4<> 31D2< PMU_FROM_INT 14C2<> 31C4<> PMU_I2C_CLK 31B4<> 31C2< PMU_I2C_DATA 31B4<> 31C2< PMU_INT_L 14B5<> 14B7< 31B6<> PMU_INT_NMI 14B5<> 14B7< 31D4<> PMU_KB_RESET_L 41C1> PMU_LID_CLOSED_L 24A1< 24D6<> 31B2< 31C4<> 41D1> PMU_NMI_BUTTON_L 31C2< 31C4<> PMU_NMI_L 31C2< 31C4<> PMU_OOPS 31B2< 31B4<> PMU_PME_L 14A5<> 17A8< 26D5<> 31B2< 31C4<>
41C3> PMU_POWERUP_OK 31B4<> 31D2< PMU_POWER_UP_L 30C8<> 31C6<> 31D7< 34B8< PMU_REQ_L 14B7< 14C2> 31C4<> PMU_RESET_BUTTON_L 24A7< 31C4<> 31D2< PMU_RESET_L 31B6< 31B7> PMU_SELECT 31C6<> PMU_SLEEP_LED 24C7<> 24D6<> 41D1> PMU_SLEEP_LED_L 24C8<> 31C4<> PMU_SMB_CLK 31B4<> 31C2< 32A3< PMU_SMB_DATA 31B4<> 31C2< 32A2< PMU_TO_INT 14C2<> 31C4<> POWER_UP 30D7<> POWER_VALID 31B2< 31C4<> PP3V3_MMM 25C8< 25D5< PP3V3_MMM_PIC 25C1< 25D5< PP3V3_SI_AVCC1 20C7< 20D7< PP3V3_SI_AVCC2 20C5< 20D7< PP3V3_SI_PVCC1 20C7< PP3V3_SI_PVCC2 20C5< PP3V3_SI_VCC1 20C7< 20D8< PP3V3_SI_VCC2 20C5< 20D7< PWR_BUTTON_L 24A7< 24B3<> RAM_ADDR<0> 9B4< 11B3<> 11B6<> RAM_ADDR<12..0> 37A5> RAM_ADDR<1> 9B4< 11B5<> 11B8<> RAM_ADDR<2> 9B4< 11B3<> 11B6<> RAM_ADDR<3> 9B4< 11B5<> 11B8<> RAM_ADDR<4> 9B4< 11B3<> 11B6<> RAM_ADDR<5> 9B4< 11B5<> 11B8<> RAM_ADDR<6> 9B4< 11B3<> 11B6<> RAM_ADDR<7> 9B4< 11B5<> 11B8<> RAM_ADDR<8> 9B4< 11B3<> 11B6<> RAM_ADDR<9> 9A4< 11B5<> 11B8<> RAM_ADDR<10> 9A4< 11B5<> 11B8<> RAM_ADDR<11> 9A4< 11B3<> 11B6<> RAM_ADDR<12> 9A4< 11B5<> 11B8<> RAM_BA<0> 9A4< 11B5<> 11B8<> RAM_BA<1..0> 37A5> RAM_BA<1> 9A4< 11B3<> 11B6<> RAM_CAS_L 9A4< 11B3<> 11B6<> 37A5> RAM_CKE<0> 9A4< 9C4< 11C6<> RAM_CKE<3..0> 37A5> RAM_CKE<1> 9A4< 9C4< 11C8<> RAM_CKE<2> 9A4< 9C4< 11C3<> RAM_CKE<3> 9A4< 9C4< 11C5<> RAM_CS_L<0> 9C4< 11B8<> RAM_CS_L<3..0> 37A5> RAM_CS_L<1> 9C4< 11B6<> RAM_CS_L<2> 9C4< 11B5<> RAM_CS_L<3> 9C4< 11B3<> RAM_DATA_A<0> 10C8<> 11D8<> RAM_DATA_A<7..0> 37D5> RAM_DATA_A<1> 10C8<> 11D8<> RAM_DATA_A<2> 10C8<> 11D8<> RAM_DATA_A<3> 10B8<> 11D8<> RAM_DATA_A<4> 10B8<> 11D6<> RAM_DATA_A<5> 10B8<> 11D6<> RAM_DATA_A<6> 10B8<> 11D6<> RAM_DATA_A<7> 10B8<> 11D6<> RAM_DATA_A<8> 10B8<> 11D8<> RAM_DATA_A<15..8> 37C5> RAM_DATA_A<9> 10C7<> 11D8<> RAM_DATA_A<10> 10C7<> 11D8<> RAM_DATA_A<11> 10C7<> 11D8<> RAM_DATA_A<12> 10C7<> 11D6<> RAM_DATA_A<13> 10C7<> 11D6<> RAM_DATA_A<14> 10C7<> 11D6<> RAM_DATA_A<15> 10C7<> 11D6<> RAM_DATA_A<16> 10C6<> 11D8<> RAM_DATA_A<23..16> 37C5> RAM_DATA_A<17> 10C6<> 11C8<> RAM_DATA_A<18> 10C6<> 11C8<> RAM_DATA_A<19> 10B6<> 11C8<> RAM_DATA_A<20> 10B6<> 11D6<> RAM_DATA_A<21> 10B6<> 11C6<> RAM_DATA_A<22> 10B6<> 11C6<> RAM_DATA_A<23> 10B6<> 11C6<> RAM_DATA_A<24> 10B6<> 11C8<> RAM_DATA_A<31..24> 37C5> RAM_DATA_A<25> 10C5<> 11C8<> RAM_DATA_A<26> 10C5<> 11C8<> RAM_DATA_A<27> 10C5<> 11C8<> RAM_DATA_A<28> 10C5<> 11C6<> RAM_DATA_A<29> 10C5<> 11C6<> RAM_DATA_A<30> 10C5<> 11C6<> RAM_DATA_A<31> 10C5<> 11C6<> RAM_DATA_A<32> 10C4<> 11B8<> RAM_DATA_A<39..32> 37B5> RAM_DATA_A<33> 10C4<> 11B8<> RAM_DATA_A<34> 10C4<> 11B8<> RAM_DATA_A<35> 10C4<> 11B8<> RAM_DATA_A<36> 10B4<> 11B6<> RAM_DATA_A<37> 10B4<> 11B6<> RAM_DATA_A<38> 10B4<> 11B6<> RAM_DATA_A<39> 10B4<> 11B6<> RAM_DATA_A<40> 10B4<> 11B8<> RAM_DATA_A<47..40> 37B5> RAM_DATA_A<41> 10D3<> 11B8<> RAM_DATA_A<42> 10C3<> 11A8<> RAM_DATA_A<43> 10C3<> 11A8<> RAM_DATA_A<44> 10C3<> 11B6<> RAM_DATA_A<45> 10C3<> 11B6<> RAM_DATA_A<46> 10C3<> 11A6<> RAM_DATA_A<47> 10C3<> 11A6<> RAM_DATA_A<48> 10C2<> 11A8<> RAM_DATA_A<55..48> 37B5> RAM_DATA_A<49> 10C2<> 11A8<> RAM_DATA_A<50> 10C2<> 11A8<> RAM_DATA_A<51> 10C2<> 11A8<> RAM_DATA_A<52> 10B2<> 11A6<> RAM_DATA_A<53> 10B2<> 11A6<> RAM_DATA_A<54> 10B2<> 11A6<> RAM_DATA_A<55> 10B2<> 11A6<> RAM_DATA_A<56> 10B2<> 11A8<> RAM_DATA_A<63..56> 37A5> RAM_DATA_A<57> 10D1<> 11A8<> RAM_DATA_A<58> 10C1<> 11A8<> RAM_DATA_A<59> 10C1<> 11A8<> RAM_DATA_A<60> 10C1<> 11A6<> RAM_DATA_A<61> 10C1<> 11A6<> RAM_DATA_A<62> 10C1<> 11A6<> RAM_DATA_A<63> 10C1<> 11A6<> RAM_DATA_B<0> 10C8<> 11D5<> RAM_DATA_B<7..0> 37D5> RAM_DATA_B<1> 10C8<> 11D5<> RAM_DATA_B<2> 10C8<> 11D5<> RAM_DATA_B<3> 10C8<> 11D5<> RAM_DATA_B<4> 10C8<> 11D3<> RAM_DATA_B<5> 10C8<> 11D3<> RAM_DATA_B<6> 10C8<> 11D3<> RAM_DATA_B<7> 10C8<> 11D3<> RAM_DATA_B<8> 10C8<> 11D5<> RAM_DATA_B<15..8> 37C5> RAM_DATA_B<9> 10C8<> 11D5<> RAM_DATA_B<10> 10C8<> 11D5<> RAM_DATA_B<11> 10C8<> 11D5<>
RAM_DATA_B<12> 10C8<> 11D3<> RAM_DATA_B<13> 10C8<> 11D3<> RAM_DATA_B<14> 10C8<> 11D3<> RAM_DATA_B<15> 10C8<> 11D3<> RAM_DATA_B<16> 10C6<> 11D5<> RAM_DATA_B<23..16> 37C5> RAM_DATA_B<17> 10C6<> 11C5<> RAM_DATA_B<18> 10C6<> 11C5<> RAM_DATA_B<19> 10C6<> 11C5<> RAM_DATA_B<20> 10C6<> 11D3<> RAM_DATA_B<21> 10C6<> 11C3<> RAM_DATA_B<22> 10C6<> 11C3<> RAM_DATA_B<23> 10C6<> 11C3<> RAM_DATA_B<24> 10C6<> 11C5<> RAM_DATA_B<25..24> 37C5> RAM_DATA_B<25> 10C6<> 11C5<> RAM_DATA_B<26> 10C6<> 11C5<> 37C5> RAM_DATA_B<27> 10C6<> 11C5<> RAM_DATA_B<31..27> 37C5> RAM_DATA_B<28> 10C6<> 11C3<> RAM_DATA_B<29> 10C6<> 11C3<> RAM_DATA_B<30> 10C6<> 11C3<> RAM_DATA_B<31> 10C6<> 11C3<> RAM_DATA_B<32> 10D4<> 11B5<> RAM_DATA_B<39..32> 37B5> RAM_DATA_B<33> 10C4<> 11B5<> RAM_DATA_B<34> 10C4<> 11B5<> RAM_DATA_B<35> 10C4<> 11B5<> RAM_DATA_B<36> 10C4<> 11B3<> RAM_DATA_B<37> 10C4<> 11B3<> RAM_DATA_B<38> 10C4<> 11B3<> RAM_DATA_B<39> 10C4<> 11B3<> RAM_DATA_B<40> 10C4<> 11B5<> RAM_DATA_B<47..40> 37B5> RAM_DATA_B<41> 10C4<> 11B5<> RAM_DATA_B<42> 10C4<> 11A5<> RAM_DATA_B<43> 10C4<> 11A5<> RAM_DATA_B<44> 10C4<> 11B3<> RAM_DATA_B<45> 10C4<> 11B3<> RAM_DATA_B<46> 10C4<> 11A3<> RAM_DATA_B<47> 10C4<> 11A3<> RAM_DATA_B<48> 10D2<> 11A5<> RAM_DATA_B<55..48> 37B5> RAM_DATA_B<49> 10C2<> 11A5<> RAM_DATA_B<50> 10C2<> 11A5<> RAM_DATA_B<51> 10C2<> 11A5<> RAM_DATA_B<52> 10C2<> 11A3<> RAM_DATA_B<53> 10C2<> 11A3<> RAM_DATA_B<54> 10C2<> 11A3<> RAM_DATA_B<55> 10C2<> 11A3<> RAM_DATA_B<56> 10C2<> 11A5<> RAM_DATA_B<63..56> 37A5> RAM_DATA_B<57> 10C2<> 11A5<> RAM_DATA_B<58> 10C2<> 11A5<> RAM_DATA_B<59> 10C2<> 11A5<> RAM_DATA_B<60> 10C2<> 11A3<> RAM_DATA_B<61> 10C2<> 11A3<> RAM_DATA_B<62> 10C2<> 11A3<> RAM_DATA_B<63> 10C2<> 11A3<> RAM_DQM_A<0> 10B8<> 11D6<> 37D5> RAM_DQM_A<1> 10C7<> 11D6<> 37C5> RAM_DQM_A<2> 10B6<> 11C6<> 37C5> RAM_DQM_A<3> 10C5<> 11C6<> 37C5> RAM_DQM_A<4> 10B4<> 11B6<> 37B5> RAM_DQM_A<5> 10C3<> 11B6<> 37B5> RAM_DQM_A<6> 10B2<> 11A6<> 37B5> RAM_DQM_A<7> 10C1<> 11A6<> 37A5> RAM_DQM_B<0> 10C8<> 11D3<> 37D5> RAM_DQM_B<1> 10C8<> 11D3<> 37C5> RAM_DQM_B<2> 10C6<> 11C3<> 37C5> RAM_DQM_B<3> 10C6<> 11C3<> 37C5> RAM_DQM_B<4> 10C4<> 11B3<> 37B5> RAM_DQM_B<5> 10C4<> 11B3<> 37B5> RAM_DQM_B<6> 10C2<> 11A3<> 37B5> RAM_DQM_B<7> 10C2<> 11A3<> 37A5> RAM_DQS_A<0> 10B8<> 11D8<> 37D5> RAM_DQS_A<1> 10C7<> 11D8<> 37C5> RAM_DQS_A<2> 10B6<> 11C8<> 37C5> RAM_DQS_A<3> 10C5<> 11C8<> 37C5> RAM_DQS_A<4> 10B4<> 11B8<> 37B5> RAM_DQS_A<5> 10C3<> 11B8<> 37B5> RAM_DQS_A<6> 10B2<> 11A8<> 37B5> RAM_DQS_A<7> 10C1<> 11A8<> 37A5> RAM_DQS_B<0> 10C8<> 11D5<> 37D5> RAM_DQS_B<1> 10C8<> 11D5<> 37C5> RAM_DQS_B<2> 10C6<> 11C5<> 37C5> RAM_DQS_B<3> 10C6<> 11C5<> 37C5> RAM_DQS_B<4> 10C4<> 11B5<> 37B5> RAM_DQS_B<5> 10C4<> 11B5<> 37B5> RAM_DQS_B<6> 10C2<> 11A5<> 37B5> RAM_DQS_B<7> 10C2<> 11A5<> 37A5> RAM_RAS_L 9A4< 11B3<> 11B6<> 37A5> RAM_WE_L 9A4< 11B5<> 11B8<> 37A5> RESET_VREF 6C3<> RF_DISABLE_L 26D6<> 41C3> ROM_CS_L 9B3< 12A4< 41C3> ROM_CS_TP_L 9C4< 26B6<> ROM_OE_L 9B3< 12A4< 41C3> ROM_OE_TP_L 9B3< 26C5<> ROM_ONBOARD_CS_L 9B3< 41C3> ROM_ONBOARD_CS_TP_L 9B3< 26C6<> ROM_RW_L 9B3< 12A4< 41C3> ROM_RW_TP_L 9B3< 26C6<> ROM_WP_L 9B3< SI_DUAL_MODE 20A8< 20D7< SI_I2C_CLK 20B4< 20B7< 20D7< 21C5<> SI_I2S_DATA 20B4<> 20B7<> 20D7< 21C5<> SI_M_HTPLG 20B7< SI_RESET_L 20B6< 21C7<> SI_RESET_L_R 20B4< 20B7< 20D7< SI_SECONDARY 20A6< 20D6< SI_S_HTPLG 20B4< SI_TMDS_CLKN 20A7< 20C2< 38D1> SI_TMDS_CLKP 20A7< 20C2< 38D1> SI_TMDS_DN<0> 20A7< 20B2< 38D1> SI_TMDS_DN<1> 20A7< 20B2< 38D1> SI_TMDS_DN<2> 20A7< 20B2< 38D1> SI_TMDS_DN<3> 20A4< 20B2< 38D1> SI_TMDS_DN<4> 20A2< 20A4< 38D1> SI_TMDS_DN<5> 20A2< 20A4< 38D1> SI_TMDS_DP<0> 20A7< 20B2< 38D1> SI_TMDS_DP<1> 20A7< 20B2< 38D1> SI_TMDS_DP<2> 20A7< 20B2< 38D1> SI_TMDS_DP<3> 20A4< 20B2< 38D1> SI_TMDS_DP<4> 20A2< 20A4< 38D1> SI_TMDS_DP<5> 20A2< 20A4< 38C1> SI_VREF 20A6< 20A8< SLAVE_SWING 20B4< 20D6< SLEEP 24D7<> 27D7<> 31B6<> 31D7< 34A4<
34A6< 34B3< 34B8<> 36B3< 36C2< 41C1>
SLEEP_LED 24C3<> 41C1> SLEEP_LED_DGND 24C3<> SLEEP_LED_I 24D3< SLEEP_LED_L 24D4< SLEEP_LED_SW_L 24D4<> SLEEP_LED_UF 24D3< SLEEP_LS5 34A4<> 34A8< SLEEP_LS5_EN_L 34A5<> SLEEP_L_LS5 18D5< 21A7<> 28A8<> 34A5<> 35C7<>
36C8< SLEEP_L_LS5_EN_L 34A6<> SLEEP_L_LS5_INV 36A3< 36C2< 36C8<> SLEEP_L_LS5_NET 34B3<> 36C8<> SLEEP_NET 34A3<> SLEEP_NET_INV 34A3<> SND_AMP_MUTE 27C7<> 27D6<> 41A6> SND_AMP_MUTE_CTRL 27B5<> 27D6<> SND_AMP_MUTE_L 14B5<> 27D5<> SND_HP_MUTE 27C5<> SND_HP_MUTE_L 14C5<> 27C5<> 41A6> SND_HP_MUTE_LO 27C6<> 27C7<> SND_HP_SENSE_L 14B5<> 27C8<> 41A6> SND_HW_RESET_L 14A8< 14B5<> 27D7<> 41A6> SND_LIN_SENSE_L 14B5<> 27C8<> 41A6> SOFTMODEM_FC_RGDT 27D3< SOFT_PWR_ON_L 23D1<> 24B1< 31A8<> 31C6<> 31D7<
35A4<> 41B3> ST7_SLEEP_LED_H 24C5<> 24C6<> 24D6<> 41D1> STOP_AGP_L 12D2< 12D4<> SYSCLK_CPU 5C3< 8A6< 37D1> SYSCLK_CPU_UF 8A5<> 37D1> SYSCLK_DDRCLK_A0 9D4< 11D8<> 37D1> SYSCLK_DDRCLK_A0_L 9D4< 11D8<> 37C1> SYSCLK_DDRCLK_A0_L_UF 9B6<> 9D5< 37D1> SYSCLK_DDRCLK_A0_UF 9B6<> 9D5< 37D1> SYSCLK_DDRCLK_A1 9D4< 11A6<> 37C1> SYSCLK_DDRCLK_A1_L 9D4< 11A6<> 37C1>
SYSCLK_DDRCLK_A1_L_UF 9B6<> 9D5< 37D1> SYSCLK_DDRCLK_A1_UF 9B6<> 9D5< 37D1> SYSCLK_DDRCLK_B0 9D4< 11D5<> 37C1> SYSCLK_DDRCLK_B0_L 9C4< 11D5<> 37C1> SYSCLK_DDRCLK_B0_L_UF 9B6<> 9C5< 37D1> SYSCLK_DDRCLK_B0_UF 9B6<> 9D5< 37D1> SYSCLK_DDRCLK_B1 9D4< 11A3<> 37C1> SYSCLK_DDRCLK_B1_L 9D4< 11A3<> 37C1> SYSCLK_DDRCLK_B1_L_UF 9B6<> 9D5< 37D1> SYSCLK_DDRCLK_B1_UF 9B6<> 9D5< 37D1> SYSCLK_LA_TP 8A5<> SYSTEM_CLK_EN 14A5< 14B6< 31C4<> SYS_BATT_ISNS 25A2< 31C2< SYS_BATT_ISNS1 31B4<> 31C3< SYS_BATT_ISNS2 31B4<> 31C3< THERM1_A_DM 27A7< 27A8< 39A2> THERM1_A_DP 27A7< 27A8< 39A2> THERM1_DM 27A5< 27A6< 27B5<> 27B6< 39B2> THERM1_DP 27A5< 27A6< 27B5<> 27B6< 39A2> THERM1_M_DM 27B7< 27B8< 39A2> THERM1_M_DP 27B7< 27B8< 39A2> THERM2_A_DM 27A7< 27A8< 39A2> THERM2_A_DP 27A7< 27A8< 39A2> THERM2_DM 27A5< 27A6< 27B5<> 27B6< 39A2> THERM2_DP 27A5< 27A6< 27B5<> 27B6< 39A2> THERM2_M_DM 27B7< 27B8< 39A2> THERM2_M_DP 27B7< 27B8< 39A2> THERM_INV 27B1<> THERM_L_OC 27B1<> 31B4<> TMDS_CLKN 20C1< 20C1< 20D3< 23C8<> 39C2> TMDS_CLKP 20C1< 20C1< 20D4< 23C8<> 39C2> TMDS_CLK_CMF 20D3< TMDS_CONN_CLKN 23C6<> 23C7<> 38C1> 41C6> TMDS_CONN_CLKP 23C6<> 23C7<> 38C1> 41C6> TMDS_CONN_DN<0> 23D6<> 38C1> TMDS_CONN_DN<1> 23C4<> 23D5<> 38C1> TMDS_CONN_DN<2> 23C4<> 23D5<> 38C1> TMDS_CONN_DN<3> 23B3<> 23C5<> 38B1> TMDS_CONN_DN<4> 23C1<> 23C5<> 38B1> TMDS_CONN_DN<5> 23C1<> 23C6<> 38B1> TMDS_CONN_DP<0> 23D6<> 38C1> TMDS_CONN_DP<1> 23B4<> 23D5<> 38C1> TMDS_CONN_DP<2> 23C4<> 23D5<> 38B1> TMDS_CONN_DP<3> 23B3<> 23C5<> 38B1> TMDS_CONN_DP<4> 23C1<> 23C5<> 38B1> TMDS_CONN_DP<5> 23B1<> 23C6<> 38B1> TMDS_D0_CMF 20D3< TMDS_D1_CMF 20C3< TMDS_D2_CMF 20C3< TMDS_DN<0> 20B1< 20D1< 20D3< 23D7<> 39C2> TMDS_DN<0..2> 41C1> TMDS_DN<1> 20B1< 20C3< 20D1< 23C3<> 39C2> TMDS_DN<2> 20B1< 20C1< 20C3< 23C3<> 39B2> TMDS_DN<3> 20B1< 20B2< 23B4<> 38B1> TMDS_DN<4> 20A1< 20A2< 23C2<> 38B1> TMDS_DN<5> 20A1< 20A2< 23C2<> 38B1> TMDS_DP<0> 20B1< 20D1< 20D4< 23D7<> 39C2> TMDS_DP<0..2> 41C1> TMDS_DP<1> 20B1< 20C4< 20D1< 23B3<> 39B2> TMDS_DP<2> 20B1< 20C1< 20C4< 23C3<> 39B2> TMDS_DP<3> 20B1< 20B4< 23B4<> 38B1> TMDS_DP<4> 20A1< 20A4< 23C2<> 38B1> TMDS_DP<5> 20A1< 20A4< 23B2<> 38B1> TMDS_MASTER 20A8< 20D7< TMDS_SYNC 20A6< 20A8< TPAD_F_RXD 41B3> TPAD_F_TXD 41B3> TPAD_RXD 31C2< 31C4<> TPAD_TXD 31B2< 31C4<> TPS2211_SHTDWN_L 18C5< TP_BB_XTAL1 6C3<> TP_MMM_ICSP_PGC 25C3<> TP_MMM_ICSP_PGD 25C3<> TP_MMM_ICSP_PGM 25C3<> TV_C 23A6<> 41A6> TV_COMP 23A6<> 41A6> TV_GND1 23B6<> 40B6> 41A6> TV_GND2 23A6<> 40B6> 41A6> TV_Y 23A6<> 41A6> UIDE_ADDR<0> 13D7<> 26C4< UIDE_ADDR<2..0> 39C5> UIDE_ADDR<1> 13D7<> 26C4< UIDE_ADDR<2> 13D7<> 26B4< UIDE_CS0_L 13C7<> 26C4< 39C5> UIDE_CS1_L 13C7<> 26B4< 39C5> UIDE_DATA<0> 13D7<> 26D4< UIDE_DATA<6..0> 39C5> UIDE_DATA<1> 13D7<> 26D4< UIDE_DATA<2> 13D7<> 26D4< UIDE_DATA<3> 13D7<> 26D4< UIDE_DATA<4> 13D7<> 26C4< UIDE_DATA<5> 13D7<> 26C4< UIDE_DATA<6> 13D7<> 26C4< UIDE_DATA<7> 13D7<> 26C4< 39C5> UIDE_DATA<8> 13D7<> 26C4< UIDE_DATA<15..8> 39C5> UIDE_DATA<9> 13D7<> 26C4< UIDE_DATA<10> 13D7<> 26C4< UIDE_DATA<11> 13D7<> 26D4< UIDE_DATA<12> 13D7<> 26B4< UIDE_DATA<13> 13D7<> 26B4< UIDE_DATA<14> 13D7<> 26C4< UIDE_DATA<15> 13D7<> 26B4< UIDE_DIOR_L 13C7<> 26A4< 39C5> UIDE_DIOW_L 13C7<> 26A4< 39C5> UIDE_DMACK_L 13C7<> 26A4< 39C5> UIDE_DMARQ 13C7<> 39C5> UIDE_INTRQ 13C7< 39C5> UIDE_IOCHRDY 13C7< 26A4< 39C5> UIDE_REF 13C7<> 40C3> UIDE_RST_L 13C7<> 26A4< 39C5> USB_DAM 14B2<> 14D2< USB_DAP 14B2<> 14D2< USB_DBM 14B2<> 14D2< USB_DBP 14B2<> 14D2< USB_DCM 14B2<> 14D2< USB_DCP 14B2<> 14D2< USB_DDM 14B2<> 14C2< USB_DDP 14B2<> 14C2< USB_DEM 14B2<> 14C2< 39B2> USB_DEP 14B2<> 14C2< 39B2> USB_DFM 14B2<> 14B2< 39B2> USB_DFP 14B2<> 14C2< 39B2> USB_OC_AB_L 14B2< 14C7< USB_OC_CD_L 14B2< 14C7< USB_OC_EF_L 14B2< 14C7< USB_PWREN_AB_L 14B2<> 14C7< USB_PWREN_CD_L 14B2<> 14C7< USB_PWREN_EF_L 14B2<> 14C7< USB_TPAD_N 14B1< 24A4<> 39B2> 41D3> USB_TPAD_P 14C1< 24B4<> 39B2> 41D3> VCORE_AB_SEL 35A7<> 35C6< VCORE_AB_SEL_INV 35A7<> VCORE_AB_SEL_OPT 35A6<> VCORE_BOOST 35C4<> 40C1> VCORE_BST 35C5<> 40C1> VCORE_CC 35B6<> 40C1> VCORE_D0 35A3<> VCORE_D1 35A3<> VCORE_D2 35A3<> VCORE_D3 35A3<> VCORE_D4 35A3<> VCORE_DH 35B5<> 40C1> VCORE_DL 35B5<> 40C1> VCORE_FB 35B5< 40B1> 41C6> VCORE_GND 35B5<> 40B1> VCORE_GNDA 35B6<> 40B1> VCORE_GNDDIV 35A5< 35A5< 40B1> VCORE_GNDDIV_TEST 35A4<> VCORE_GNDSNS 35A1<> 35A5< 40B1> VCORE_GNDSNS_TEST 35A4<> VCORE_ILIM 35C6<> 40C1> VCORE_LX 35B5<> 40C1> VCORE_OFFSET_DIV 35B6<> VCORE_REF 35B6<> 40C1> VCORE_SHDN_L 5B3< 35C6<> VCORE_SHDN_L_3V 5B3<> VCORE_SNS 35A1<> 40B1> VCORE_TIME 35B4<> 40B1> VCORE_TON 35B6< 40C1> VCORE_VCC 35C6< 40C1> VCORE_VGATE 14B5< 14B7< 35B4> 40B1> VCORE_VID<0> 35B7< VCORE_VID<1> 35B7< 35D4< VCORE_VID<2> 35B7< 35D4< VCORE_VID<3> 35B7< 35D4< VCORE_VID<4> 35B7< 35D4< VCORE_VSENSE 35C2<>
VGA_B 23C6< 23C6<> 41B6> VGA_G 23C5<> 23C6< 41B6> VGA_HSYNC 23C6<> 23D7< 41B6> VGA_R 23B6< 23C5<> 41B6> VGA_VSYNC 23C5<> 23D7< 41B6> ZT10_SPN 4C2<> ZT301_SPN 4C2<> ZT302_SPN 4C2<>
051-6680
A
4644
A
D
C
B
A
D
C
B
8 7
6
5
4
3
2 1
8
7 6
5
4
3
2
1
R396 RES 21
R395 RES 21
R394 RES 21
R393 RES 21
R392 RES 21
R391 RES 21
R390 RES 21
R389 RES 21
R388 RES 19
R387 RES 21
R386 RES 21
R385 RES 21
R384 RES 21
R383 RES 21
R382 RES 21
R381 RES 21
R380 RES 21
R379 RES 22
R378 RES 21
R377 RES 20
R376 RES 19
R375 RES 19
R374 RES 20
R373 RES 19
R372 RES 19
R371 RES 19
R370 RES 19
R369 RES 20
R368 RES 21
R367 RES 20
R366 RES 21
R365 RES 19
R364 RES 31
R363 RES 22
R362 RES 20
R361 RES 21
R360 RES 21
R359 RES 21
R358 RES 21
R357 RES 21
R356 RES 21
R355 RES 20
R354 RES 23
R353 RES 21
R352 RES 21
R351 RES 21
R350 RES 20
R349 RES 31
R348 RES 31
R347 RES 23
R346 RES 21
R345 RES 31
R344 RES 21
R343 RES 21
R342 RES 21
R341 RES 21
R340 RES 20
R339 RES 21
R338 RES 19
R337 RES 19
R336 RES 19
R335 RES 19
R334 RES 12
R333 RES 21
R332 RES 21
R331 RES 21
R330 RES 21
R329 RES 21
R328 RES 21
R327 RES 21
R326 RES 21
R325 RES 19
R324 RES 19
R323 RES 19
R322 RES 34
R321 RES 34
R320 RES 19
R319 RES 22
R318 RES 12
R317 RES 12
R316 RES 12
R315 RES 19
R314 RES 12
R313 RES 19
R312 RES 22
R311 RES 34
R310 RES 34
R309 RES 19
R308 RES 12
R307 RES 34
R306 RES 34
R305 RES 19
R304 RES 19
R303 RES 11
R302 RES 5
R301 RES 34
R300 RES 20
R299 RES 11
R298 RES 19
R297 RES 19
R296 RES 14
R295 RES 14
R294 RES 34
R293 RES 14
R292 RES 14
R291 RES 34
R290 RES 19
R289 RES 19
R288 RES 14
R287 RES 14
R286 RES 14
R285 RES 19
R284 RES 14
R283 RES 5
R282 RES 12
R281 RES 5
R280 RES 14
R279 RES 14
R278 RES 12
R277 RES 12
R276 RES 15
R275 RES 22
R274 RES 15
R273 RES 12
R272 RES 12
R271 RES 9
R270 RES 13
R269 RES 13
R268 RES 26
R267 RES 31
R266 RES 26
R265 RES 9
R264 RES 12
R263 RES 13
R262 RES 26
R261 RES 31
R260 RES 9
R259 RES 13
R258 RES 14
R257 RES 9
R256 RES 12
R255 RES 12
R254 RES 12
R253 RES 12
R252 RES 12
R251 RES 26
R250 RES 14
R249 RES 31
R248 RES 31
R247 RES 9
R246 RES 12
R245 RES 12
R244 RES 12
R243 RES 14
R242 RES 26
R241 RES 14
R240 RES 14
R239 RES 12
R238 RES 26
R237 RES 26
R236 RES 9
R235 RES 12
R234 RES 26
R233 RES 33
R232 RES 13
R231 RES 33
R230 RES 12
R229 RES 26
R228 RES 24
R227 RES 36
R226 RES 36
R225 RES 12
R224 RES 13
R223 RES 20
R222 RES 36
R221 RES 36
R220 RES 36
R219 RES 12
R218 RES 14
R217 RES 26
R216 RES 26
R215 RES 26
R214 RES 26
R213 RES 26
R212 RES 36
R211 RES 36
R210 RES 36
R209 RES 9
R208 RES 9
R207 RES 13
R206 RES 14
R205 RES 13
R204 RES 26
R203 RES 26
R202 RES 9
R201 RES 14
R200 RES 26
R199 RES 26
R198 RES 24
R197 RES 12
R196 RES 26
R195 RES 13
R194 RES 9
R193 RES 19
R192 RES 19
R191 RES 14
R190 RES 24
R189 RES 27
R188 RES 31
R187 RES 14
R186 RES 13
R185 RES 24
R184 RES 36
R183 RES 14
R182 RES 14
R181 RES 14
R180 RES 14
R179 RES 14
R178 RES 14
R177 RES 36
R176 RES 9
R175 RES 14
R174 RES 14
R173 RES 24
R172 RES 17
R171 RES 36
R170 RES 36
R169 RES 8
R168 RES 8
R167 RES 12
R166 RES 14
R165 RES 14
R164 RES 14
R163 RES 24
R162 RES 9
R161 RES 8
R160 RES 13
R159 RES 8
R158 RES 14
R157 RES 31
R156 RES 27
R155 RES 8
R154 RES 24
R153 RES 14
R152 RES 8
R151 RES 8
R150 RES 8
R149 RES 13
R148 RES 14
R147 RES 8
R146 RES 8
R145 RES 13
R144 RES 14
R143 RES 14
R142 RES 14
R141 RES 8
R140 RES 8
R139 RES 35
R138 RES 24
R137 RES 35
R136 RES 8
R135 RES 27
R134 RES 14
R133 RES 7
R132 RES 7
R131 RES 7
R130 RES 33
R129 RES 14
R128 RES 8
R127 RES 33
R126 RES 35
R125 RES 14
R124 RES 17
R123 RES 14
R122 RES 33
R121 RES 14
R120 RES 33
R119 RES 32
R118 RES 33
R117 RES 36
R116 RES 36
R115 RES 36
R114 RES 36
R113 RES 14
R112 RES 9
R111 RES 35
R110 RES 7
R109 RES 33
R108 RES 33
R107 RES 33
R106 RES 35
R105 RES 6
R104 RES 6
R103 RES 6
R102 RES 32
R101 RES 35
R100 RES 6
R99 RES 35
R98 RES 35
R97 RES 35
R96 RES 32
R95 RES 35
R94 RES 32
R93 RES 35
R92 RES 7
R91 RES 35
R90 RES 35
R89 RES 5
R88 RES 7
R87 RES 32
R86 RES 35
R85 RES 35
R84 RES 7
R83 RES 32
R82 RES 32
R81 RES 35
R80 RES 35
R79 RES 7
R78 RES 7
R77 RES 32
R76 RES 7
R75 RES 32
R74 RES 32
R73 RES 32
R72 RES 35
R71 RES 35
R70 RES 7
R69 RES 35
R68 RES 7
R67 RES 35
R66 RES 35
R65 RES 35
R64 RES 7
R63 RES 7
R62 RES 32
R61 RES 32
R60 RES 7
R59 RES 32
R58 RES 32
R57 RES 32
R56 RES 32
R55 RES 32
R54 RES 32
R53 RES 32
R52 RES 32
R51 RES 32
R50 RES 7
R49 RES 32
R48 RES 7
R47 RES 32
R46 RES 5
R45 RES 5
R44 RES 7
R43 RES 7
R42 RES 32
R41 RES 32
R40 RES 32
R39 RES 33
R38 RES 5
R37 RES 5
R36 RES 5
R35 RES 7
R34 RES 5
R33 RES 5
R32 RES 5
R31 RES 7
R30 RES 32
R29 RES 32
R28 RES 5
R27 RES 5
R26 RES 5
R25 RES 5
R24 RES 5
R23 RES 7
R22 RES 32
R21 RES 32
R20 RES 5
R19 RES 5
R18 RES 7
R17 RES 7
R16 RES 32
R15 RES 32
R14 RES 7
R13 RES 5
R12 RES 7
R11 RES 5
R10 RES 6
R9 RES 6
R8 RES 5
R7 RES 5
R6 RES 5
R5 RES 7
R4 RES 5
R3 RES 5
R2 RES 5
R1 RES 9
Q83 TRA_2N7002DW 27
Q82 TRA_2N7002DW 35
Q79 TRA_2N7002DW 27
Q78 TRA_2N7002DW 27
Q77 TRA_2N7002DW 27
Q76 TRA_FDG6324L 23
Q74 TRA_2N7002DW 32
Q73 TRA_2N7002 30
Q72 TRA_2N7002DW 32
Q71 TRA_2N7002DW 32
Q70 TRA_IRF7805 32
Q69 TRA_SI4435DY 32
Q68 TRA_SI4435DY 32
Q67 TRA_2N3904 27
Q66 TRA_IRF7832 35
Q65 TRA_SI7860DP 35
Q64 TRA_IRF7811W 32
Q63 TRA_IRF7832 35
Q62 TRA_SI7860DP 35
Q61 TRA_2N3904 27
Q60 TRA_IRF7832 35
Q59 TRA_2N3904 27
Q58 TRA_2N3906 24
Q57 TRA_IRF7811W 36
Q56 TRA_IRF7805 36
Q55 TRA_IRF7805 36
Q54 TRA_IRF7811W 36
Q53 TRA_SI3446DV 36
Q52 TRA_2N3904 21
Q51 TRA_2N3904 21
Q50 TRA_2N7002DW 34
Q49 TRA_IRF7832 21
Q48 TRA_SI7860DP 21
Q47 TRA_IRF7811W 34
Q46 TRA_2N3904 27
Q45 TRA_IRF7805 34
Q44 TRA_2N7002DW 34
Q43 TRA_2N7002 34
Q42 TRA_IRF7811W 34
Q41 TRA_IRF7805 34
Q40 TRA_2N7002DW 23
Q39 TRA_2N7002DW 23
Q38 TRA_TP0610 23
Q37 TRA_SI2319DS 30
Q36 TRA_SI3443DV 24
Q35 TRA_DUAL_MMDT3904 23
Q34 TRA_NDS9407 30
Q33 TRA_2N7002DW 30
Q32 TRA_2N7002DW 28
Q31 TRA_2N7002 36
Q30 TRA_2N7002 31
Q29 TRA_SI3443DV 23
Q28 TRA_2N7002 23
Q27 TRA_SI3443DV 34
Q26 TRA_SI3443DV 34
Q25 TRA_2N7002DW 21
Q24 TRA_2N7002DW 34
Q23 TRA_SI3446DV 21
Q22 TRA_2N7002 24
Q21 TRA_SI3443DV 34
Q20 TRA_2N7002DW 34
Q19 TRA_2N7002DW 31
Q18 TRA_2N7002DW 24
Q17 TRA_IRF7805 33
Q16 TRA_IRF7811W 33
Q15 TRA_FDG6324L 33
Q14 TRA_2N7002DW 7
Q13 TRA_2N7002 7
Q12 TRA_2N3904 7
Q11 TRA_2N7002DW 36
Q10 TRA_2N7002 36
Q9 TRA_2N7002DW 32
Q8 TRA_2N3904 35
Q7 TRA_SUD45P03 32
Q6 TRA_SI4435DY 32
Q5 TRA_2N3904 35
Q4 TRA_2N7002DW 32
Q3 TRA_2N7002DW 7
Q2 TRA_2N7002DW 32
Q1 TRA_2N7002DW 32
L91 IND 20
L90 IND 20
L86 IND 20
L85 FILTER_4P 23
L84 IND 20
L82 IND 20
L81 IND 22
L77 FILTER_4P 30
L76 FILTER_4P 30
L75 IND 22
L74 IND 23
L73 IND 23
L72 IND 23
L71 IND_3P 35
L70 IND 32
L69 IND_3P 33
L68 IND 24
L67 IND 36
L66 IND 19
L65 IND 36
L64 IND_3P 21
L63 IND 36
L62 IND 34
L61 IND 34
L60 IND 28
L59 IND 29
L58 IND 30
L57 IND 23
L56 IND 23
L55 IND 23
L54 IND 23
L53 IND 23
L52 FILTER_4P 30
L51 IND 30
L50 IND 20
L49 FILTER_4P 23
L48 FILTER_4P 30
L47 FILTER_4P 23
L46 FILTER_4P 23
L45 FILTER_4P 23
L44 FILTER_4P 23
L42 IND 23
L39 IND 30
L38 IND 23
L37 FILTER_4P 23
L36 IND 23
L35 IND 28
L34 IND 29
L33 IND 22
L32 IND 22
L31 IND 22
L30 IND 22
L29 IND 22
L28 IND 22
L27 IND 23
L26 IND 22
L25 IND 22
L24 IND 22
L23 IND 22
L22 IND 19
L21 IND 22
L20 IND 22
L19 IND 22
L18 IND 22
L17 IND 21
L16 IND 19
L15 IND 14
L14 IND 14
L13 IND 14
L11 IND 24
L9 IND 24
L8 IND 24
L7 IND 17
L6 IND 32
L5 IND 32
L4 IND 32
L3 IND 32
L2 IND 32
L1 IND 23
J28 CON_10STSM_5087 27
J27 CON_M4RT_S_SM 32
J26 CON_M8RT_S_SM 32
J25 CON_F400RT_DDRDIMM_SM3 11
J24 CON_F6RT_S4MT_TH1 30
J23 CON_RJ45_10RT_S4MT_TH1 28
J22 CON_F30RT_T6MT_TH1 23
J21 CON_F5RT_MINIDIN_TH 23
J20 CON_F9RT_1394B_S6MT_SMA 30
J19 CON_F20ST_D_SM 24
J18 CON_M4RT_S2MT_SM 27
J17 CON_M16ST_D_SMA 27
J16 CON_3RTSM_125 33
J15 CON_F10RT_S2MT_SM 27
J14 CON_F30RT_S2MT_SM 23
J13 CON_M50SM_5MM 26
J12 CON_M50SM_5MM 26
J10 CON_M16ST_D_SMA 24
J9 CON_F1ST_S2MT_SM 14
J8 CON_2RTSM_125 24
J7 CON_12 35
J6 CON_F80ST_D4MT_SM 26
J5 CON_M80ST_D4MT_SM 18
J4 CON_4RT_WRIB 23
J3 CON_M40ST_D4MT_SM 27
J2 CON_4RT_WRIB 24
J1 CON_M4RT_S2MT_SM 27
G2 OSC 29
G1 OSC 19
FL3 FILTER_LC 23
FL2 FILTER_LC 23
FL1 FILTER_LC 23
F5 FUSE 32
F4 FUSE 32
F3 FUSE 30
F2 FUSE 23
F1 FUSE 30
DP8 DPAK3P 31
DP7 DPAK3P 21
DP6 DPAK3P 30
DP5 DPAK3P 21
DP4 DPAK3P 36
DP3 DPAK3P 36
DP2 DPAK3P 35
DP1 DPAK3P 32
D36 DIODE_SCHOT 32
D35 DIODE_SCHOT 30
D34 DIODE 20
D33 DIODE 35
D32 DIODE_SCHOT 33
D31 DIODE_SCHOT 36
D30 DIODE_SCHOT 36
D29 DIODE_SCHOT 21
D28 DIODE_SCHOT 34
D27 DIODE 34
D26 DIODE_SCHOT 34
D25 DIODE_SCHOT_3P2 29
D24 DIODE_SCHOT 30
D23 DIODE_DUAL_6P 30
D22 DIODE_DUAL_6P 30
D21 ZENER 30
D20 DIODE_DUAL_6P 30
D19 DIODE_SCHOT 23
D18 DIODE_DUAL_6P 30
D17 DIODE_SCHOT 5
D16 DIODE_SCHOT 29
D15 DIODE 28
D14 DIODE_SCHOT 34
D13 DIODE_SCHOT 34
D12 DIODE 21
D11 DIODE_SCHOT 33
D10 DIODE_SCHOT 33
D9 ZENER_MMBZ15VDLT1 24
D8 DIODE 33
D7 DIODE_SCHOT 33
D6 DIODE 32
D5 DIODE_SCHOT 35
D4 DIODE 32
D3 DIODE 33
D2 DIODE_SCHOT 33
D1 DIODE_SCHOT 33
C913 CAP 20
C912 CAP 20
C911 CAP 20
C910 CAP 20
C909 CAP 20
C908 CAP 20
C907 CAP 20
C906 CAP 20
C905 CAP 20
C893 CAP 20
C892 CAP 20
C891 CAP 20
C890 CAP 20
C889 CAP 20
C887 CAP 20
C886 CAP 20
C885 CAP 20
C883 CAP 20
C882 CAP 20
C881 CAP 22
C880 CAP 22
C870 CAP 20
C869 CAP 27
C868 CAP 27
C853 CAP 32
C852 CAP 28
C851 CAP 28
C850 CAP 27
C849 CAP 27
C848 CAP_P 27
C847 CAP 13
C846 CAP 21
C845 CAP 36
C844 CAP 36
C843 CAP 35
C842 CAP 35
C841 CAP 35
C838 CAP 21
C837 CAP 20
C836 CAP 20
C835 CAP 22
C834 CAP 22
C833 CAP 22
C832 CAP 22
C831 CAP 22
C830 CAP 22
C829 CAP 27
C828 CAP 27
C826 CAP 30
C825 CAP 30
C824 CAP 30
C823 CAP 25
C822 CAP 30
C821 CAP 25
C820 CAP 25
C819 CAP 23
C818 CAP 27
C817 CAP 27
C816 CAP 23
C815 CAP 23
C814 CAP 27
C813 CAP 23
C812 CAP 23
C811 CAP 5
C810 CAP 5
C809 CAP 32
C808 CAP 26
C807 CAP 32
C806 CAP_P 33
C805 CAP 26
C804 CAP_P 33
C803 CAP 32
C802 CAP_P 35
C801 CAP 32
C800 CAP 18
C799 CAP 32
C798 CAP 32
C797 CAP_P 35
C796 CAP 18
C795 CAP 32
C794 CAP 32
C793 CAP_P 35
C792 CAP 32
C791 CAP 18
C790 CAP 32
C789 CAP 18
C788 CAP_P 35
C787 CAP 18
C786 CAP 18
C785 CAP 32
C784 CAP 18
C783 CAP 18
C782 CAP 18
C781 CAP_P 35
C780 CAP 32
C779 CAP_P 32
C778 CAP 18
C777 CAP 32
C776 CAP 18
C775 CAP 18
C774 CAP_P 35
C773 CAP 9
C772 CAP 33
C771 CAP 33
C770 CAP 16
C769 CAP 17
C768 CAP 17
C767 CAP 33
C766 CAP 24
C765 CAP 17
C764 CAP 10
C763 CAP 27
C762 CAP 6
C761 CAP 17
C760 CAP 17
C759 CAP 17
C758 CAP 10
C757 CAP 10
C756 CAP 17
C755 CAP 33
C754 CAP 33
C753 CAP 33
C752 CAP 17
C751 CAP 17
C750 CAP 17
C749 CAP 17
C748 CAP 17
C747 CAP 17
C746 CAP 17
C745 CAP 10
C744 CAP 17
C743 CAP 17
C742 CAP 10
C741 CAP 10
C740 CAP 33
C739 CAP 16
C738 CAP 36
C737 CAP 33
C736 CAP 16
C735 CAP 16
C734 CAP 10
C733 CAP 10
C732 CAP 10
C731 CAP 31
C730 CAP 10
C729 CAP 31
C728 CAP 31
C727 CAP 10
C726 CAP 10
C725 CAP 36
C724 CAP 31
C723 CAP 14
C722 CAP 36
C721 CAP 14
C720 CAP 36
C719 CAP 36
C718 CAP 36
C717 CAP 36
C716 CAP 36
C715 CAP 36
C714 CAP 36
C713 CAP_P 34
C712 CAP 21
C711 CAP_P 21
C710 CAP_P 34
C709 CAP_P 34
C708 CAP 21
C707 CAP_P 21
C706 CAP 21
C705 CAP_P 21
C704 CAP 21
C703 CAP_P 34
C702 CAP 23
C701 CAP 23
C700 CAP 34
C699 CAP 34
C698 CAP 24
C697 CAP 36
C696 CAP 25
C695 CAP 36
C694 CAP 34
C693 CAP 36
C692 CAP_P 33
C691 CAP 36
C690 CAP 36
C689 CAP 27
C688 CAP 34
C687 CAP 34
C686 CAP 34
C685 CAP_P 34
C684 CAP 29
C683 CAP 29
C682 CAP 29
C681 CAP 29
C680 CAP 28
C679 CAP 29
C678 CAP 29
C677 CAP 29
C676 CAP 29
C675 CAP 28
C674 CAP 28
C673 CAP 29
C672 CAP 29
C671 CAP 29
C670 CAP_P 29
C669 CAP 27
C668 CAP 23
C667 CAP 23
C666 CAP 30
C665 CAP 29
C664 CAP 23
C663 CAP 23
C662 CAP 30
C661 CAP 23
C660 CAP 23
C659 CAP 23
C658 CAP 23
C657 CAP 23
C656 CAP 23
C655 CAP 23
C654 CAP 23
C653 CAP 23
C652 CAP 30
C651 CAP 30
C650 CAP 30
C649 CAP 30
C648 CAP 28
C647 CAP 28
C646 CAP 28
C645 CAP 28
C644 CAP 30
C643 CAP 25
C642 CAP 25
C641 CAP 23
C640 CAP 30
C639 CAP 30
C638 CAP 30
C637 CAP 30
C636 CAP 25
C635 CAP 25
C634 CAP 23
C633 CAP 30
C632 CAP 25
C631 CAP 23
C630 CAP 30
C629 CAP 34
C628 CAP 34
C627 CAP 34
C626 CAP 5
C625 CAP 29
C624 CAP 28
C623 CAP 28
C622 CAP 28
C621 CAP 29
C620 CAP 29
C619 CAP 28
C618 CAP 28
C617 CAP 28
C616 CAP 28
C615 CAP 28
C614 CAP 28
C613 CAP 28
C612 CAP 28
C611 CAP 28
C610 CAP 29
C609 CAP 29
C608 CAP 28
C607 CAP 29
C606 CAP 29
C605 CAP 29
C604 CAP 28
C603 CAP 28
C602 CAP 28
C601 CAP 28
C600 CAP 28
C599 CAP 28
C598 CAP 28
C597 CAP 28
C596 CAP 29
C595 CAP 28
C594 CAP 28
C593 CAP 29
C592 CAP 28
C591 CAP 29
C590 CAP 29
C589 CAP 29
C588 CAP 29
C587 CAP 29
C586 CAP 29
C585 CAP 29
C584 CAP 29
C583 CAP 29
C582 CAP 34
C581 CAP 34
C580 CAP 34
C579 CAP 34
C578 CAP 34
C577 CAP 34
C576 CAP 34
C575 CAP 34
C574 CAP 34
C573 CAP 34
C572 CAP 34
C571 CAP 34
C570 CAP 34
C569 CAP 34
C568 CAP 34
C567 CAP 34
C566 CAP 34
C565 CAP 34
C564 CAP 34
C563 CAP 34
C562 CAP 34
C561 CAP 34
C560 CAP 34
C559 CAP 34
C558 CAP 34
C557 CAP 34
C556 CAP 34
C555 CAP 34
C554 CAP 34
C553 CAP 22
C552 CAP 22
C551 CAP 22
C550 CAP 22
C549 CAP 23
C548 CAP 23
C547 CAP 22
C546 CAP 22
C545 CAP 22
C544 CAP 22
C543 CAP 22
C542 CAP 22
C541 CAP 22
C540 CAP 22
C539 CAP 22
C538 CAP 22
C537 CAP 22
C536 CAP 20
C535 CAP 22
C534 CAP 22
C533 CAP 21
C532 CAP 21
C531 CAP 21
C530 CAP 19
C529 CAP 21
C528 CAP 21
C527 CAP 22
C526 CAP 21
C525 CAP 21
C524 CAP 21
C523 CAP 22
C522 CAP 25
C521 CAP 22
C520 CAP 22
C519 CAP 22
C518 CAP 22
C517 CAP 22
C516 CAP 19
C515 CAP 20
C514 CAP 22
C513 CAP 21
C512 CAP 21
C511 CAP 22
C510 CAP 21
C509 CAP 21
C508 CAP 19
C507 CAP 24
C506 CAP 22
C505 CAP 21
C504 CAP 22
C503 CAP 23
C502 CAP 5
C501 CAP 22
C500 CAP 22
C499 CAP 22
C498 CAP 21
C497 CAP 20
C496 CAP 22
C495 CAP 21
C494 CAP 21
C493 CAP 22
C492 CAP 22
C491 CAP 22
C490 CAP 19
C489 CAP 22
C488 CAP 22
C487 CAP 20
C486 CAP 21
C485 CAP 21
C484 CAP 21
C483 CAP 22
C482 CAP 21
C481 CAP 21
C480 CAP 21
C479 CAP 20
C478 CAP 22
C477 CAP 21
C476 CAP 19
C475 CAP 22
C474 CAP 23
C473 CAP 22
C472 CAP 22
C471 CAP 22
C470 CAP 22
C469 CAP 34
C468 CAP 22
C467 CAP 31
C466 CAP 21
C465 CAP 21
C464 CAP 22
C463 CAP 22
C462 CAP 22
C461 CAP 22
C460 CAP 22
C459 CAP 22
C458 CAP 19
C457 CAP 19
C456 CAP 22
C455 CAP 21
C454 CAP 22
C453 CAP 22
C452 CAP 21
C451 CAP 21
C450 CAP 22
C449 CAP 21
C448 CAP 21
C447 CAP 22
C446 CAP 21
C445 CAP 21
C444 CAP 22
C443 CAP 21
C442 CAP 19
C441 CAP 21
C440 CAP 21
C439 CAP 22
C438 CAP 22
C437 CAP 22
C436 CAP 22
C435 CAP 21
C434 CAP 21
C433 CAP 34
C432 CAP 34
C431 CAP 21
C430 CAP 22
C429 CAP 34
C428 CAP 34
C427 CAP 22
C426 CAP 22
C425 CAP 22
C424 CAP 22
C423 CAP 22
C422 CAP 22
C421 CAP 22
C420 CAP 22
C419 CAP 22
C418 CAP 22
C417 CAP 22
C416 CAP 34
C415 CAP 34
C414 CAP 22
C413 CAP 22
C412 CAP 19
C411 CAP 21
C410 CAP 34
C409 CAP 19
C408 CAP 19
C407 CAP 21
C406 CAP 31
C405 CAP_P 36
C404 CAP 11
C403 CAP 11
C402 CAP 14
C401 CAP 19
C400 CAP 14
C399 CAP 14
C398 CAP 34
C397 CAP 11
C396 CAP_P 36
C395 CAP 16
C394 CAP 14
C393 CAP_P 36
C392 CAP 14
C391 CAP 11
C390 CAP 19
C389 CAP 14
C388 CAP 14
C387 CAP 14
C386 CAP 14
C385 CAP 16
C384 CAP 19
C383 CAP 11
C382 CAP 16
C381 CAP 16
C380 CAP 16
C379 CAP 16
C378 CAP 16
C377 CAP 16
C376 CAP 16
C375 CAP 16
C374 CAP 16
C373 CAP 16
C372 CAP 12
C371 CAP 16
C370 CAP 31
C369 CAP 16
C368 CAP 16
C367 CAP 16
C366 CAP 16
C365 CAP 16
C364 CAP 16
C363 CAP 16
C362 CAP 12
C361 CAP 16
C360 CAP 16
C359 CAP 16
C358 CAP 16
C357 CAP 16
C356 CAP 11
C355 CAP 36
C354 CAP 16
C353 CAP 34
C352 CAP 16
C351 CAP 16
C350 CAP 16
C349 CAP 16
C348 CAP 16
C347 CAP 16
C346 CAP 16
C345 CAP 16
C344 CAP 16
C343 CAP 16
C342 CAP 16
C341 CAP 16
C340 CAP 31
C339 CAP 31
C338 CAP 36
C337 CAP 14
C336 CAP 33
C335 CAP 16
C334 CAP 16
C333 CAP 16
C332 CAP 16
C331 CAP 16
C330 CAP 16
C329 CAP 16
C328 CAP 16
C327 CAP 16
C326 CAP 33
C325 CAP 16
C324 CAP 16
C323 CAP 16
C322 CAP 16
C321 CAP 16
C320 CAP 16
C319 CAP 16
C318 CAP 16
C317 CAP 16
C316 CAP 16
C315 CAP 16
C314 CAP 16
C313 CAP 16
C312 CAP 16
C311 CAP 12
C310 CAP 16
C309 CAP 16
C308 CAP 16
C307 CAP_P 36
C306 CAP 16
C305 CAP 16
C304 CAP 16
C303 CAP 16
C302 CAP 16
C301 CAP 16
C300 CAP 16
C299 CAP 16
C298 CAP 36
C297 CAP 16
C296 CAP 16
C295 CAP 16
C294 CAP 16
C293 CAP 16
C292 CAP 16
C291 CAP 12
C290 CAP 16
C289 CAP 16
C288 CAP 16
C287 CAP 16
C286 CAP 16
C285 CAP 16
C284 CAP 26
C283 CAP 16
C282 CAP 16
C281 CAP 16
C280 CAP 16
C279 CAP 16
C278 CAP 16
C277 CAP 34
C276 CAP 33
C275 CAP 16
C274 CAP 16
C273 CAP 16
C272 CAP 16
C271 CAP 16
C270 CAP 12
C269 CAP 16
C268 CAP 16
C267 CAP_P 36
C266 CAP 16
C265 CAP 16
C264 CAP 16
C263 CAP 16
C262 CAP 16
C261 CAP 16
C260 CAP 16
C259 CAP 16
C258 CAP 16
C257 CAP 16
C256 CAP 14
C255 CAP 31
C254 CAP 16
C253 CAP 16
C252 CAP 16
C251 CAP 16
C250 CAP 16
C249 CAP 9
C248 CAP 16
C247 CAP 16
C246 CAP 14
C245 CAP 16
C244 CAP 33
C243 CAP 16
C242 CAP 16
C241 CAP 16
C240 CAP 16
C239 CAP 16
C238 CAP 16
C237 CAP 16
C236 CAP 16
C235 CAP 14
C234 CAP 16
C233 CAP 32
C232 CAP 36
C231 CAP 16
C230 CAP 16
C229 CAP 16
C228 CAP 16
C227 CAP 16
C226 CAP 16
C225 CAP 16
C224 CAP 16
C223 CAP 16
C222 CAP 16
C221 CAP 16
C220 CAP 24
C219 CAP 16
C218 CAP 16
C217 CAP 16
C216 CAP 16
C215 CAP 16
C214 CAP 16
C213 CAP 16
C212 CAP 16
C211 CAP 11
C210 CAP 20
C209 CAP 36
C208 CAP 16
C207 CAP 16
C206 CAP 16
C205 CAP 16
C204 CAP 16
C203 CAP 16
C202 CAP 16
C201 CAP 16
C200 CAP 16
C199 CAP 24
C198 CAP 24
C197 CAP 17
C196 CAP 36
C195 CAP 36
C194 CAP 36
C193 CAP 36
C192 CAP 16
C191 CAP 16
C190 CAP 12
C189 CAP 16
C188 CAP 24
C187 CAP 8
C186 CAP 16
C185 CAP 16
C184 CAP 16
C183 CAP 16
C182 CAP 16
C181 CAP 16
C180 CAP 16
C179 CAP 16
C178 CAP 16
C177 CAP 16
C176 CAP 16
C175 CAP 16
C174 CAP 11
C173 CAP 17
C172 CAP 16
C171 CAP 16
C170 CAP 16
C169 CAP 11
C168 CAP 16
C167 CAP 16
C166 CAP 16
C165 CAP 16
C164 CAP 16
C163 CAP 16
C162 CAP 16
C161 CAP 16
C160 CAP 16
C159 CAP 16
C158 CAP 16
C157 CAP 11
C156 CAP 11
C155 CAP 33
C154 CAP 33
C153 CAP 33
C152 CAP 14
C151 CAP 14
C150 CAP 11
C149 CAP 16
C148 CAP 16
C147 CAP 16
C146 CAP 16
C145 CAP 16
C144 CAP 16
C143 CAP 34
C142 CAP 16
C141 CAP 16
C140 CAP 11
C139 CAP 16
C138 CAP 33
C137 CAP 33
C136 CAP 17
C135 CAP 33
C134 CAP 33
C133 CAP 36
C132 CAP 11
C131 CAP 33
C130 CAP 20
C129 CAP 36
C128 CAP 11
C127 CAP 11
C126 CAP 34
C125 CAP 9
C124 CAP 33
C123 CAP 34
C122 CAP 9
C121 CAP 33
C120 CAP 6
C119 CAP 33
C118 CAP 32
C117 CAP 32
C116 CAP 32
C115 CAP 32
C114 CAP 34
C113 CAP 32
C112 CAP 32
C111 CAP_P 35
C110 CAP 5
C109 CAP 5
C108 CAP 5
C107 CAP 5
C106 CAP 35
C105 CAP 35
C104 CAP 5
C103 CAP 5
C102 CAP 5
C101 CAP 35
C100 CAP 35
C99 CAP 32
C98 CAP 32
C97 CAP 32
C96 CAP 32
C95 CAP 32
C94 CAP 35
C93 CAP 35
C92 CAP_P 35
C91 CAP_P 35
C90 CAP 35
C89 CAP 5
C88 CAP 5
C87 CAP 5
C86 CAP 5
C85 CAP 5
C84 CAP 35
C83 CAP 35
C82 CAP 5
C81 CAP 5
C80 CAP 35
C79 CAP 35
C78 CAP_P 35
C77 CAP_P 35
C76 CAP 35
C75 CAP 5
C74 CAP 35
C73 CAP 5
C72 CAP 5
C71 CAP 32
C70 CAP 35
C69 CAP 5
C68 CAP 5
C67 CAP 32
C66 CAP 35
C65 CAP 35
C64 CAP 35
C63 CAP 35
C62 CAP 5
C61 CAP 5
C60 CAP 18
C59 CAP 5
C58 CAP 5
C57 CAP 35
C56 CAP 5
C55 CAP 5
C54 CAP 5
C53 CAP 5
C52 CAP_P 35
C51 CAP_P 35
C50 CAP 5
C49 CAP 5
C48 CAP 5
C47 CAP 5
C46 CAP 5
C45 CAP 5
C44 CAP 5
C43 CAP 32
C42 CAP 32
C41 CAP 32
C40 CAP 18
C39 CAP 5
C38 CAP 5
C37 CAP 18
C36 CAP 32
C35 CAP 32
C34 CAP 5
C33 CAP 5
C32 CAP 5
C31 CAP 5
C30 CAP 5
C29 CAP 5
C28 CAP 5
C27 CAP 5
C26 CAP 5
C25 CAP 5
C24 CAP 32
C23 CAP 32
C22 CAP 23
C21 CAP 35
C20 CAP 5
C19 CAP 23
C18 CAP 5
C17 CAP 5
C16 CAP 35
C15 CAP 35
C14 CAP 35
C13 CAP 35
C12 CAP 35
C11 CAP 32
C10 CAP 5
C9 CAP 5
C8 CAP 34
C7 CAP 34
C6 CAP 35
C5 CAP 35
C4 CAP 35
C3 CAP 35
C2 CAP 5
C1 CAP 5
*** Part Cross-Reference for the entire design ***
45
A
D
C
B
A
D
C
B
8 7
6
5
4
3
2 1
8
7 6
5
4
3
2
1
46
R397 RES 19 R398 RES 36 R399 RES 34 R400 RES 34 R401 RES 34 R402 RES 34 R403 RES 34 R404 RES 34 R405 RES 34 R406 RES 34 R407 RES 34 R408 RES 34 R409 RES 34 R410 RES 34 R411 RES 34 R412 RES 29 R413 RES 29 R414 RES 29 R415 RES 29 R416 RES 29 R417 RES 29 R418 RES 29 R419 RES 29 R420 RES 29 R421 RES 28 R422 RES 28 R423 RES 28 R424 RES 28 R425 RES 28 R426 RES 29 R427 RES 28 R428 RES 28 R429 RES 28 R430 RES 28 R431 RES 28 R432 RES 28 R433 RES 28 R434 RES 28 R435 RES 28 R436 RES 28 R437 RES 28 R438 RES 28 R439 RES 28 R440 RES 28 R441 RES 28 R442 RES 28 R443 RES 29 R444 RES 29 R445 RES 28 R446 RES 30 R447 RES 30 R448 RES 30 R449 RES 5 R450 RES 14 R451 RES 30 R452 RES 5 R453 RES 5 R454 RES 27 R455 RES 5 R456 RES 23 R457 RES 14 R458 RES 23 R459 RES 23 R460 RES 23 R461 RES 30 R462 RES 23 R463 RES 23 R464 RES 23 R465 RES 30 R466 RES 30 R467 RES 14 R468 RES 36 R469 RES 23 R470 RES 23 R471 RES 30 R472 RES 23 R473 RES 23 R474 RES 23 R475 RES 23 R476 RES 23 R477 RES 23 R478 RES 23 R479 RES 23 R480 RES 23 R481 RES 23 R482 RES 23 R483 RES 23 R484 RES 23 R485 RES 23 R486 RES 29 R487 RES 29 R488 RES 29 R489 RES 29 R490 RES 29 R491 RES 29 R492 RES 29 R493 RES 29 R494 RES 29 R495 RES 29 R496 RES 29 R497 RES 29 R498 RES 29 R499 RES 29 R500 RES 29 R501 RES 29 R502 RES 29 R503 RES 28 R504 RES 28 R505 RES 29 R506 RES 28 R507 RES 28 R508 RES 29 R509 RES 29 R510 RES 29 R511 RES 29 R512 RES 29 R513 RES 28 R514 RES 29 R515 RES 29 R516 RES 29 R517 RES 29 R518 RES 29 R519 RES 29 R520 RES 29 R521 RES 34 R522 RES 34 R523 RES 34 R524 RES 34 R525 RES 36 R526 RES 36 R527 RES 36 R528 RES 36 R529 RES 36 R530 RES 27 R531 RES 36 R532 RES 36 R533 RES 34 R534 RES 34 R535 RES 36 R536 RES 36 R537 RES 34 R538 RES 34 R539 RES 34 R540 RES 26 R541 RES 26 R542 RES 26 R543 RES 23 R544 RES 23 R545 RES 26 R546 RES 26 R547 RES 27 R548 RES 34 R549 RES 21 R550 RES 34 R551 RES 34 R552 RES 12 R553 RES 12 R554 RES 36 R555 RES 21 R556 RES 21 R557 RES 36 R558 RES 21 R559 RES 21 R560 RES 31 R561 RES 31 R562 RES 31 R563 RES 31 R564 RES 31
R565 RES 14 R566 RES 36 R567 RES 14 R568 RES 14 R569 RES 24 R570 RES 26 R571 RES 36 R572 RES 34 R573 RES 26 R574 RES 14 R575 RES 31 R576 RES 31 R577 RES 24 R578 RES 26 R579 RES 26 R580 RES 31 R581 RES 31 R582 RES 31 R583 RES 31 R584 RES 31 R585 RES 31 R586 RES 31 R587 RES 31 R588 RES 31 R589 RES 31 R590 RES 31 R591 RES 31 R592 RES 31 R593 RES 31 R594 RES 31 R595 RES 31 R596 RES 20 R597 RES 19 R598 RES 31 R599 RES 31 R600 RES 31 R601 RES 36 R602 RES 31 R603 RES 14 R604 RES 33 R605 RES 33 R606 RES 17 R607 RES 17 R608 RES 17 R609 RES 17 R610 RES 17 R611 RES 24 R612 RES 17 R613 RES 17 R614 RES 17 R615 RES 17 R616 RES 24 R617 RES 17 R618 RES 8 R619 RES 8 R620 RES 8 R621 RES 8 R622 RES 8 R623 RES 8 R624 RES 8 R625 RES 8 R626 RES 8 R627 RES 8 R628 RES 8 R629 RES 8 R630 RES 13 R631 RES 35 R632 RES 17 R633 RES 27 R634 RES 35 R635 RES 14 R636 RES 17 R637 RES 6 R638 RES 8 R639 RES 8 R640 RES 8 R641 RES 8 R642 RES 8 R643 RES 8 R644 RES 8 R645 RES 8 R646 RES 8 R647 RES 20 R648 RES 8 R649 RES 8 R650 RES 8 R651 RES 8 R652 RES 8 R653 RES 8 R654 RES 8 R655 RES 8 R656 RES 8 R657 RES 8 R658 RES 8 R659 RES 27 R660 RES 35 R661 RES 27 R662 RES 35 R663 RES 33 R664 RES 8 R665 RES 8 R666 RES 8 R667 RES 8 R668 RES 8 R669 RES 8 R670 RES 8 R671 RES 20 R672 RES 24 R673 RES 33 R674 RES 9 R675 RES 20 R676 RES 20 R677 RES 8 R678 RES 8 R679 RES 8 R680 RES 8 R681 RES 8 R682 RES 8 R683 RES 8 R684 RES 8 R685 RES 8 R686 RES 27 R687 RES 27 R688 RES 27 R689 RES 27 R690 RES 33 R691 RES 9 R692 RES 6 R693 RES 8 R694 RES 8 R695 RES 8 R696 RES 8 R697 RES 8 R698 RES 8 R699 RES 8 R700 RES 27 R701 RES 27 R702 RES 27 R703 RES 27 R704 RES 27 R705 RES 27 R706 RES 35 R707 RES 6 R708 RES 35 R709 RES 6 R710 RES 32 R711 RES 32 R712 RES 6 R713 RES 32 R714 RES 18 R715 RES 32 R716 RES 32 R717 RES 32 R718 RES 18 R719 RES 18 R720 RES 32 R721 RES 18 R722 RES 18 R723 RES 18 R724 RES 18 R725 RES 32 R726 RES 18 R727 RES 32 R728 RES 32 R729 RES 32 R730 RES 32 R731 RES 32 R732 RES 32
R733 RES 32 R734 RES 32 R735 RES 32 R736 RES 32 R737 RES 26 R738 RES 32 R739 RES 26 R740 RES 32 R741 RES 32 R742 RES 32 R743 RES 35 R744 RES 32 R745 RES 32 R746 RES 14 R747 RES 26 R748 RES 5 R749 RES 27 R750 RES 23 R751 RES 27 R752 RES 27 R753 RES 23 R754 RES 24 R755 RES 5 R756 RES 18 R757 RES 35 R758 RES 24 R759 RES 26 R760 RES 20 R761 RES 20 R762 RES 20 R763 RES 20 R764 RES 20 R765 RES 20 R766 RES 20 R767 RES 20 R768 RES 27 R769 RES 20 R770 RES 27 R771 RES 27 R772 RES 27 R773 RES 27 R774 RES 27 R775 RES 5 R776 RES 20 R777 RES 30 R778 RES 27 R779 RES 21 R780 RES 20 R781 RES 20 R782 RES 20 R783 RES 20 R784 RES 24 R785 RES 25 R786 RES 21 R787 RES 22 R788 RES 22 R789 RES 24 R790 RES 35 R791 RES 35 R792 RES 35 R793 RES 25 R794 RES 25 R795 RES 25 R796 RES 25 R797 RES 25 R798 RES 17 R799 RES 25 R800 RES 25 R801 RES 14 R802 RES 14 R803 RES 30 R804 RES 33 R805 RES 25 R806 RES 27 R807 RES 27 R808 RES 27 R809 RES 24 R810 RES 25 R811 RES 25 R812 RES 25 R813 RES 25 R814 RES 28 R815 RES 31 R816 RES 30 R817 RES 27 R818 RES 25 R819 RES 31 R820 RES 25 R821 RES 31 R822 RES 25 R823 RES 25 R824 RES 25 R825 RES 31 R826 RES 31 R827 RES 25 R828 RES 20 R829 RES 30 R830 RES 30 R831 RES 30 R832 RES 20 R833 RES 30 R834 RES 30 R835 RES 30 R836 RES 30 R837 RES 30 R838 RES 6 R839 RES 6 R840 RES 21 R841 RES 22 R842 RES 22 R843 RES 22 R844 RES 6 R845 RES 6 R846 RES 6 R847 RES 6 R848 RES 27 R849 RES 27 R850 RES 20 R851 RES 20 R852 RES 20 R857 RES 20 R858 RES 20 R859 RES 20 R867 RES 20 R869 RES 20 R871 RES 20 R872 RES 20 R876 RES 20 RP1 RPAK10P2C 18 RP2 RPAK4P 8 RP3 RPAK4P 8 RP4 RPAK4P 14 RP5 RPAK4P 14 RP6 RPAK4P 14 RP7 RPAK4P 14 RP8 RPAK4P 14 RP9 RPAK4P 9 RP10 RPAK4P 13 RP11 RPAK4P 14 RP12 RPAK4P 9 RP13 RPAK4P 14 RP14 RPAK4P 9 RP15 RPAK4P 14 RP16 RPAK4P 13 RP17 RPAK4P 9 RP18 RPAK4P 26 RP19 RPAK4P 26 RP20 RPAK4P 9 RP21 RPAK4P 26 RP22 RPAK4P 9 RP23 RPAK4P 26 RP24 RPAK4P 26 RP25 RPAK4P 26 RP26 RPAK4P 26 RP27 RPAK4P 26 RP28 RPAK4P 26 RP29 RPAK4P 9 RP30 RPAK4P 26 RP31 RPAK4P 9 RP32 RPAK4P 13 RP33 RPAK4P 12 RP34 RPAK4P 12 RP35 RPAK4P 13 RP36 RPAK4P 12 RP37 RPAK4P 29 RP38 RPAK4P 29 RP39 RPAK4P 31 RP40 RPAK10P2C 24
RP41 RPAK4P 31 RP42 RPAK10P2C 24 RP43 RPAK4P 17 RP44 RPAK4P 17 RP45 RPAK4P 17 RP46 RPAK10P2C 6 RP47 RPAK4P 14 RP61 RPAK2P 20 RP70 RPAK2P 20 RP72 RPAK2P 20 RP74 RPAK2P 20 RP75 RPAK2P 20 SH1 SHLD_3P_EMI 4 U1 COMPARATOR_LMC7211 32 U2 NC7S32 23 U3 AMP_MAX4172 32 U4 PWR_CNTRL_TPS2211 18 U5 FAN2558 5 U6 MAX1772 32 U7 MAX1717 35 U8 PCI1510GGU 18 U9 SN74AUC1G08 6 U10 SN74AUC1G08 6 U11 FEPR_1MX8 9 U12 SN74AUC1G04 7 U13 LTC1625 33 U14 COMPARATOR_LMC7211 33 U15 PIC16F818_QFN 25 U16 CBTV4020 10 U17 UPD720101_FBGA 17 U18 CBTV4020 10 U19 MAX1715 36 U20 KXM52 25 U21 741125 24 U22 VREG_LP2951 33 U23 VREG_LP2951 33 U24 SIL178 20 U25 SIL178 20 U26 MAX6804 31 U27 CBTV4020 10 U28 CBTV4020 10 U29 M16C62 31 U30 CLK_GEN_CY25811 19 U31 CLK_GEN_CY28512 14 U32 LTC1778 21 U33 COMPARATOR_LMC7211 31 U34 VREG_MM1571J 22 U35 LTC3707 34 U36 TSB81BA3A 29 U37 VREG_LM2594 29 U38 VREG_LT1962 29 U39 741G32 23 U40 741G32 23 U41 INA138 25 U42 COMPARATOR_LMC7211 23 U43 TRANSCEIVER_88E1111 28 U44 LTC1761 29 U45 LTC3405 28 U46 LTC3411 36 U47 RAGE_MBLTY_M11_CSP64_667 19 21 22 U48 TRA_SI6467BDQ 36 U49 VREG_LT1962 14 U50 TRA_SI3447DV 36 U51 INTREPID 8 9 12 13 14 15 U52 EEPROM_32KX8_M24256B 6 U53 ADT7467 27 U54 ATTINY2313 6 U55 OPAMP_LMC7111 32 U56 APOLLO_MPC7447A_360 5 6 U57 COMPARATOR_LMC7211 32 U58 LIS3L02AQ 25 U59 COMPARATOR_LMC7211 30 U60 VREG_MM1571J 22 XW1 SHORT 32 XW2 SHORT 35 XW3 SHORT 33 XW4 SHORT 21 XW5 SHORT 21 XW6 SHORT 21 XW7 JUMPER 21 XW8 SHORT 36 XW9 SHORT 21 XW10 SHORT 36 XW11 SHORT 21 XW12 SHORT 21 XW13 SHORT 34 XW14 SHORT 23 XW15 SHORT 23 XW16 JUMPER 22 XW17 SHORT 36 XW18 JUMPER 26 XW19 JUMPER 33 XW20 JUMPER 34 XW21 SHORT 36 XW22 JUMPER 34 XW23 SHORT 36 XW24 JUMPER 36 XW25 SHORT 36 XW26 JUMPER 36 XW27 SHORT 35 XW28 SHORT 35 XW29 SHORT 35 XW30 SHORT 27 XW31 SHORT 34 XW32 SHORT 34 XW33 JUMPER 36 XW34 SHORT 5 XW35 SHORT 25 XW36 SHORT 25 XW37 SHORT 25 Y1 CRYSTAL 17 Y2 CRYSTAL 14 Y3 CRYSTAL_4PIN 31 Y4 CRYSTAL 31 Y5 CRYSTAL_4PIN 28 ZT1 HOLE_VIA 4 ZT2 HOLE_VIA 4 ZT3 HOLE_VIA 4 ZT4 HOLE_VIA 4 ZT5 HOLE_VIA 4 ZT6 HOLE_VIA 4 ZT7 HOLE_VIA 4 ZT8 HOLE_VIA 4 ZT9 HOLE_VIA 4 ZT10 HOLE_VIA 4 ZT11 HOLE_VIA 4 ZT12 HOLE_VIA 4 ZT13 HOLE_VIA 4 ZT14 HOLE_VIA 4 ZT15 HOLE_VIA 4 ZT16 HOLE_VIA 4 ZT17 HOLE_VIA 4 ZT18 HOLE_VIA 4 ZT19 HOLE_VIA 4 ZT20 HOLE_VIA 4 ZT21 HOLE_VIA 4 ZT22 HOLE_VIA 4 ZT23 HOLE_VIA 4 ZT24 HOLE_VIA 4 ZT25 HOLE_VIA 4 ZT26 HOLE_VIA 4 ZT27 HOLE_VIA 4 ZT28 HOLE_VIA 4 ZT29 HOLE_VIA 4 ZT30 HOLE_VIA 4 ZT31 HOLE_VIA 4 ZT32 HOLE_VIA 4 ZT33 HOLE_VIA 4 ZT34 HOLE_VIA 4 ZT35 HOLE_VIA 4 ZT36 HOLE_VIA 4 ZT37 HOLE_VIA 4 ZT38 HOLE_VIA 4 ZT39 HOLE_VIA 4 ZT40 HOLE_VIA 4 ZT41 HOLE_VIA 4 ZT42 HOLE_VIA 4 ZT43 HOLE_VIA 4 ZT44 HOLE_VIA 4 ZT45 HOLE_VIA 4 ZT46 HOLE_VIA 4 ZT47 HOLE_VIA 4 ZT48 HOLE_VIA 4 ZT49 HOLE_VIA 4 ZT50 HOLE_VIA 4 ZT51 HOLE_VIA 4 ZT52 HOLE_VIA 4 ZT53 HOLE_VIA 4
ZT54 HOLE_VIA 4 ZT55 HOLE_VIA 4 ZT56 HOLE_VIA 4 ZT57 HOLE_VIA 4 ZT58 HOLE_VIA 4 ZT59 HOLE_VIA 4 ZT60 HOLE_VIA 4 ZT61 HOLE_VIA 4 ZT62 HOLE_VIA 4 ZT63 HOLE_VIA 4 ZT64 HOLE_VIA 4 ZT65 HOLE_VIA 4 ZT66 HOLE_VIA 4 ZT67 HOLE_VIA 4 ZT68 HOLE_VIA 4 ZT69 HOLE_VIA 4 ZT70 HOLE_VIA 4 ZT71 HOLE_VIA 4 ZT72 HOLE_VIA 4 ZT73 HOLE_VIA 4 ZT74 HOLE_VIA 4 ZT75 HOLE_VIA 4 ZT76 HOLE_VIA 4 ZT77 HOLE_VIA 4 ZT78 HOLE_VIA 4 ZT79 HOLE_VIA 4 ZT80 HOLE_VIA 4 ZT81 HOLE_VIA 4 ZT82 HOLE_VIA 4 ZT83 HOLE_VIA 4 ZT84 HOLE_VIA 4 ZT85 HOLE_VIA 4 ZT86 HOLE_VIA 4
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