Apple A1095 Schematic

ANGLES

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.

2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.

1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

DATE

APPD

ENG

DATE

APPD

CK

ECN

ZONE

REV

DO NOT SCALE DRAWING

X.XXX

X.XX

XX

DIMENSIONS ARE IN MILLIMETERS

THIRD ANGLE PROJECTION

D

SIZE

APPLICABLE

NOTED AS

MATERIAL/FINISH

NONE

SCALE

DESIGNER

MFG APPD

DESIGN CK

RELEASE

QA APPD

ENG APPD

DRAFTER

METRIC

OF

SHT

DRAWING NUMBER

TITLE

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

Apple Computer Inc.

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

DESCRIPTION OF CHANGE

TABLE_5_ITEM

REFERENCE DESIGNATOR(S)

BOM OPTION

TABLE_5_HEAD

QTY

DESCRIPTION

PART#

TABLE_5_ITEM

DRAWING

TABLE_5_ITEM

CPU PLL AND CONFIGURATION STRAPS

MPC7447A MAXBUS INTERFACE

PCB NOTES AND HOLES

POWER BLOCK DIAGRAM

TITLE PAGE AND CONTENTS

21

20

19

INTREPID ENET/FW/UATA/EIDE INTERFACES

INTREPID AGP 4X/PCI

INTREPID MEMORY INTERFACE / BOOT ROM

SIGNAL CONSTRAINTS (1 OF 4) - DDR MEM/CLK

SIGNAL CONSTRAINTS (3 OF 4) - DIGITAL/DIFF

CONTENTS

8

USB 2.0 INTERFACE (uPD720101)

M11 LVDS/TMDS/GPIO & GPU VCORE

M11 AGP INTERFACE & SPREAD SPECTRUM SUPPORT

CARDBUS INTERFACE (PCI1510)

35

1.5V/ 1.8V / 2.5V SYSTEM POWER SUPPLIES

CPU CORE VOLTAGE POWER SUPPLY

3.3V / 5V SYSTEM POWER SUPPLY

INTERNAL CONNECTORS - AIRPORT, HARD DRIVE,

KBD,TPAD,HALL EFFECT,PWR BUTTON,LMU/SENSOR

23

INTREPID GPIOS/SERIAL/USB INTERFACES/SSCG

400PIN STACKED DDR SODIMM CONNECTOR

22

PAGE PAGE

CONTENTS

25

SOUND/LEFT USB/BLUETOOTH, SERIAL DEBUG

INTREPID POWER RAILS/1.5V LDO

GPU_PWRMSR

EXT_TMDS

USB_MODEM

SOFT_MODEM

INT_TMDS

VGA_BUFFER_RES

ATI_MEMIO_LO

INT_2_5V_HOT

BBANG

1_8V_MAXBUS

M11 POWER

33

41

COMPONENT LOCATIONS (1 OF 2)

SIGNAL LOCATIONS

REVISION HISTORY

FUNCTIONAL TESTPOINTS

SIGNAL CONSTRAINTS (4 OF 4) - POWER NETS

PBUS SUPPLY / PMU SUPPLY / BACKUP BATTERY

BATTERY CHARGER AND CONNECTOR

External TMDS (DVI Transmitter SIL1162)

SYSTEM BLOCK DIAGRAM

ATI_MEMIO_HI

OPTICAL DRIVE

38

18

16

15

14

13

12

DDR MEMORY MUXES

INTREPID DECOUPLING

5V_HD_LOGIC NO_BBANG INT_2_5V_COLD

GPU_SS

STUFF

32

2

39 40

3

43

PMU

37

36

34

1

4 5 6 7

10

9

LVDS

29

NO STUFF

31

11

17

COMPONENT LOCATIONS (2 OF 2)

GIGABIT ETHERNET INTERFACE

VIDEO CONNECTORS - INVERTER, DVI, S-VIDEO,

3V_HD_LOGIC

1_5V_MAXBUS

BOM OPTIONS (IN COMMON PARTS)

NO_SSCG

SSCG

30

FAN CONTROLLER, USB MODEM/SOFT MODEM,

26

24

FIREWIRE PORTS

28

FIREWIRE PHY

42

27

SIGNAL CONSTRAINTS (2 OF 4) - CPU

INTREPID MAXBUS AND BOOT STRAPS

MPC7447A DATA / NC PINS / BOOTBANGER

LABEL,PCB,28MM x 6MM

LABEL_BST128

826-4393

EEE:SQG

1

SCHEM,MLB,PB15

Fri Aug 26 15:48:02 2005

SCHEM,MLB,PB15

1

SCH1051-6809

1

PCB1820-1600

PCBF,MLB,PB15

LABEL,PCB,28MM X 6MM

LABEL_BTR

EEE:SQE

826-4393

1

LABEL,PCB,28MM x 6MM

LABEL_BST64

EEE:SQF

826-4393

1

SCHEM,MLB,PB15

397429

PRODUCTION RELEASED

1

B

08/30/05

?

44

051-6809

B

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

TMDS

(VIA SIL1162)

Connector

J4

Connector

P.22

Connector

P.22P.22

2:1 DDR MUXES

64BITS

167MHZ

MEMORY BUS

2.5V

LVDS

EDID (I2C)

RGB

DDC

J22

DVI-I

PCI

MEMORY

U17

RIGHT USB

(VIA LIO)

LEFT USB

(INTERNAL MEM)

EHCI HC

NEC USB2.0

P.24

DC-In

NOT USED

BOOT ROM

(MPC7447)

P.25

3.3V/5V

16/32 BITS

33MHZ

I2C

PMU

167MHZ

1.8V

MAXBUS

32BIT ADDRESS 64BIT DATA

NOT USED

EIDE

UIDE

1394 OHCI

3.3V

50MHZ

8BIT TX/RX

P.24

@ 400MHZ

2 DATA PAIRS

P.27

PHY

FW - B

FW - A

125MHZ

8BIT RX

8BIT TX

G/MII

3.3V

10/100/1000

P.26

PHY

66MHZ

1.5V/3.3V

AGP BUS

32BITS

Connector

P.14

SCCA

I2C

P.25

Connector

Power Supply

& Charger

Connector

ULTRA ATA/100

P.18

P.22

S-VIDEO

LCD Panel

Connector

P.19-21

4X AGP

CPU

P.5-6

P.7

PCI BUS

32BITS 33MHZ

3.3V

CardBus

64MB

CH. B

CH. A

MEMORY MEMORY

I2S

CPU PLL

Config

USB PORT E

USB PORT D

10/100/1000

ETHERNET FIREWIRE

SO-DIMM Connector

DDR SDRAM DIMM 0 DDR SDRAM DIMM 1

DDR MEMORY

UATA 100

33MHZ

64BITS

CARDSLOT

VIA/PMU

SYSTEM BLOCK DIAGRAM

FireWire

USB PORT F

USB PORT C

P.25

Connector

Battery

SMBUS

3.3V

INTREPID

400 MB/S

APOLLO

Ethernet

Connector

USB PORT B

USB PORT A

@ 200MHz

Connector

P.28

INTREPID

P.28

P.13 P.13

P.13

P.14

P.8

P.9

P.10

J25

P.11

P.13 P.14

P.14

P.12

P.30

U28

P.29

P.9

Inverter

COMPOSITE

S-Video

P.30-34

P.30

U8

P.17

P.25

Fan

I2CI2S

Connector

LIO/Audio

P.25

NOT USED

EIDE

P.13

P.25

MAXBUS

(INTERNAL MEM)

Serial Debug

TI PCI1510 Controller

Connector

1M X 8

(VIA STATLER)

CH. D

(INTERNAL MEM)

MEMORY

ATI M10

P.12

(INTERNAL MEM)

BlueTooth (LIO)

4 DATA PAIRS

Ethernet

J23

J24

U43

U36

J20

J13

J12

J3

J28

U11

J26

J27

J6

U47

J3

J17

J21J14

U16/U18/U28/U27

U56

J15

J3

U51

J5

Connector

P.18

CARDBUS

PMU

AIRPORT

CH. C

TRACKPAD

J10

P.23

SERIAL

5V

Connector

LED

J8

P.23

SLEEP

U53/J1/J18

Circuit

BOOTROM

OPTICAL DRIVE

Connector

J11

Connector

P.23

Keyboard

I2C

2 DATA PAIRS

RUX Board

LMU LUX Board

P.23

J2

J19

Modem/SW Modem

Connector

442

B

051-6809

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

BACKUP

SLEEP: D3COLD

(+1.385V)

+1.2V

(LTC1778)

GPU_VCORE

CPU_VCORE

+3V_SLEEP

1_5V_2_5V_OK

+3V_MAIN

+2_5V_SLEEP

SLEEP_L_LS5

~2.23MS

SHUTDOWN: STOPPED

RUN: RUNNING

RUN/SS

SLEEP: RUNNING

DC/DC

(LTC3411)

SHUTDOWN: STOPPED

SLEEP: STOPPED

RUN: RUNNING

(MAX1772)

FEED-IN PATH

NO INRUSH PROTECTION

BATTERY

CHARGER

PG 30

WHEN ONLY BATTERY IS CONNECTED

+4_6V_BU

SHUTDOWN: RUNNING

AC: 12.8V

REGULATOR

(LTC1625)

MAIN 2.5V/1.5V

SHUTDOWN: STOPPED

+PBUS

INTREPID CORE

SHUT-DOWN

CHARGER INPUT

PG 20

PG 33

INTERNAL 1.2UA CURRENT SOURCE

TURNS ON AS LOW AS 0.8V/TYP 1.5V

PG 34

PG 32

PG 31

PG 30

PG 31

NO AC: BATTERY VOLTAGE

VCC

POWER SYSTEM ARCHITECTURE

MAP31 DDR I/O

MAP31 DDR CORE

AND PREVENTS +PBUS AND +24V_PBUS FROM DROPPING BELOW 6V

BACKUP BATTERY CIRCUIT CHARGES OFF +PBUS

+PBUS

BATTERY VOLTAGE

RUN/SS

STARTS ~4.25MSEC AFTER DCDC_EN_L BECOMES LOW

RC AT 1M*0.1UF @ 24V

STARTS 2.0MSEC AFTER DCDC_EN_L BECOMES LOW

RC AT 1M*0.047UF @ 24V

INTERNAL ZENER CLAMP TO 6V

<100UA ALLOWED

TURNS ON AT >1V

RUN/SS - 5V

<100UA ALLOWED

MAIN 3V/5V

(LTC3707)

DC/DC

TURNS ON AT >1V

VCC

DCDC_EN_L

AFTER PMU IS UP AND RUNNING DCDC_EN_L WILL PULL ON1/ON2 LOW IN SHUTDOWN

+5V_MAIN

+1.8V_MAIN

+5V_MAIN

VCC

1_5V_2_5V_OK

+BATT

+24V_PBUS

NO INRUSH PROTECTION

TURNS ON OUTPUT @ 2.4V

RUN: RUNNING

SHUTDOWN: STOPPED

RUN/SS - 3V

SLEEP: RUNNING

RUN: RUNNING

24V IS OUTPUT ONLY FROM

BATTERY

BACKUP BATTERY

1V20_REF

+

-

& BOOST OUTPUT

POWER BLOCK DIAGRAM

(UNTIL DRAINED)

AC

IN

ADAPTER

LIMITER

INRUSH

>~13.44V TURNS-ON <~13.44V SHUTS-OFF

BUCK

RUN: RUNNING

+3.3V_MAIN

STBYMD

+3V_PMU

LDO

+3V_PMU

14V_PBUS

+5V_MAIN

WHEN ONLY BATTERY IS CONNECTED

14V CHARGES BACKUP BATTERY

HOLDS BOTH RUN/SS AT GND WHEN IT’S CONNECTED TO GND

WHEN IT’S OPEN

TURNS CONTROL TO RUN/SS

INVERTER

BACKLIGHT

DC/DC

(MAX1715)

PGOOD

3V_5V_OK

PGOOD

1625 NOT RUNNING

ON1/ON2

+1.5V_MAIN

+2.5V_MAIN

DDR POWER

AGP I/O

MAXBUS

SLEEP: STOPPED

SHUTDOWN: STOPPED

RUN: RUNNING

DC/DC

(MAX1717)

+5V_MAIN

SHDN

VCC

SLEEP

DCDC_EN

MAXBUS

SEQUENCING

+5V_MAIN

DC/DC

EXT_VCC

VCC

D3_COLD

SLEEP

DCDC_EN

HOWEVER, 5V SHOULD TURN ON ~2.23MS AFTER

RC CHARGING AT INT_VCC (5V)

DCDC_EN_L OR PMU_POWERUP_L BECOMES ’1’; MUCH LESS THAN THE

+5V_MAIN TURNS ON

1_5V_2_5V_OK WILL NOT PULL LOW UNTIL

D3_HOT

1_5V_2_5V_OK

DCDC_EN_L

SEQUENCING

GPU_VCORE

~5.88MS TO START SWITCHER

1M & 0.1UF @14V, IT TAKES

DCDC_EN_L

DCDC_EN

+5V_MAIN

+5V_SLEEP

2.4V - ??? MS

3V_5V_OK

SLEEP

??? MS

+2_5V_MAIN

??? MS

+1_5V_MAIN

+1_5V_SLEEP

1_5V_2_5V_OK

(MAX1715 OUTPUT)

(AT LTC1778 RUN/SS)

GPU_VCORE

(D3HOT)

GPU_VCORE

(D3COLD)

~8.2MS

~7.36MS

SLEEPRUN

SHUT-DOWN

RUN

3S 2P 18650 CELLS

SLEEP: RUNNING

+5V_MAIN

INTERNAL ZENER CLAMP TO 6V

443

B

051-6809

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

MECH. HOLES

ASICS HEATSINK MOUNTS

CHASSIS MOUNTS

BATT. CHRGR

DVI

INVERTER

LWR RT GPU

LEFT CPU

UPPER RT GPU

LWR CPU

1.0 OZ CU THICKNESS: 1.4 MILS

SIGNAL (1/2 OZ)

GROUND (1/2 OZ)

SIGNAL (1/2 OZ)

1-8-1 BLIND MICROVIA/20R10 BURIED VIA/20R10 TH VIA

SIGNAL (1/2 OZ)

GROUND (1/2 OZ)

10

9

8

2

3

6

7

5

4

1

1394

I/O AREA

SIGNAL TRACE SPACING: 4 MILS PREPREG THICKNESS: 2-3 MILS

SIGNAL TRACE WIDTH: 4 MILS

BOARD STACK-UP AND CONSTRUCTION

LAYER COUNT: 10

DIELECTRIC: FR-4

1/2 OZ CU THICKNESS: 0.7 MILS

IMPEDANCE : 50 OHMS +/- 10%

SEE PCB CAD FILES FOR MORE SPECIFIC INFO.

BOARD INFORMATION

BOARD HOLES

SIGNAL (1/2 OZ + COPPER PLATING)

CUT POWER PLANE (1 OZ)

CORE (5 MIL)

PREPREG (5 MIL)

PREPREG (3 MIL)

CORE (3 MIL)

PREPREG (3 MIL)

THICKNESS : 1.2 MM / 0.047 IN

PCB SPECS

GROUND VIAS

1

ZT70

HOLE-VIA-20R10

1

ZT9

HOLE-VIA-20R10

1

ZT2

HOLE-VIA-20R10

1

ZT73

HOLE-VIA-20R10

1

ZT75

HOLE-VIA-20R10

1

ZT63

HOLE-VIA-20R10

1

ZT77

HOLE-VIA-20R10

1

ZT66

HOLE-VIA-20R10

1

ZT65

HOLE-VIA-20R10

1

ZT62

HOLE-VIA-20R10

1

ZT25

HOLE-VIA-20R10

1

ZT24

HOLE-VIA-20R10

1

ZT19

HOLE-VIA-20R10

1

ZT67

HOLE-VIA-20R10

1

ZT37

HOLE-VIA-20R10

1

ZT29

HOLE-VIA-20R10

1

ZT31

HOLE-VIA-20R10

1

ZT1

HOLE-VIA-20R10

1

ZT12

HOLE-VIA-20R10

1

ZT14

HOLE-VIA-20R10

1

ZT27

HOLE-VIA-20R10

1

ZT26

HOLE-VIA-20R10

1

ZT13

HOLE-VIA-20R10

1

ZT30

HOLE-VIA-20R10

1

ZT33

HOLE-VIA-20R10

1

ZT18

HOLE-VIA-20R10

3

2

1

SH1

SHLD-SM

OG-503040

CHGND5

1

ZT7

HOLE-VIA-20R10

1

ZT21

HOLE-VIA-20R10

1

ZT59

HOLE-VIA-20R10

1

ZT58

HOLE-VIA-20R10

1

ZT85

HOLE-VIA-20R10

1

ZT86

HOLE-VIA-20R10

1

ZT16

HOLE-VIA-20R10

1

ZT74

HOLE-VIA-20R10

1

ZT36

HOLE-VIA-20R10

1

ZT23

HOLE-VIA-20R10

1

ZT42

HOLE-VIA-20R10

CHGND2

CHGND1

CHGND3

1

ZT76

HOLE-VIA-20R10

1

ZT41

HOLE-VIA-20R10

1

ZT40

HOLE-VIA-20R10

1

ZT39

HOLE-VIA-20R10

1

ZT38

HOLE-VIA-20R10

1

ZT61

HOLE-VIA-20R10

1

ZT64

HOLE-VIA-20R10

1

ZT68

HOLE-VIA-20R10

1

ZT69

HOLE-VIA-20R10

1

ZT72

HOLE-VIA-20R10

1

ZT28

HOLE-VIA-20R10

1

ZT46

HOLE-VIA-20R10

1

ZT71

HOLE-VIA-20R10

1

ZT78

HOLE-VIA-20R10

1

ZT80

HOLE-VIA-20R10

1

ZT51

HOLE-VIA-20R10

1

ZT50

HOLE-VIA-20R10

1

ZT52

HOLE-VIA-20R10

1

ZT53

HOLE-VIA-20R10

1

ZT57

HOLE-VIA-20R10

1

ZT82

HOLE-VIA-20R10

1

ZT60

HOLE-VIA-20R10

1

ZT22

HOLE-VIA-20R10

1

ZT17

HOLE-VIA-20R10

1

ZT35

HOLE-VIA-20R10

1

ZT45

HOLE-VIA-20R10

1

ZT79

HOLE-VIA-20R10

1

ZT83

HOLE-VIA-20R10

1

ZT81

HOLE-VIA-20R10

1

ZT49

HOLE-VIA-20R10

1

ZT47

HOLE-VIA-20R10

1

ZT48

HOLE-VIA-20R10

1

ZT54

HOLE-VIA-20R10

1

ZT55

HOLE-VIA-20R10

1

ZT56

HOLE-VIA-20R10

1

ZT5

HOLE-VIA-20R10

1

ZT84

HOLE-VIA-20R10

1

ZT15

HOLE-VIA-20R10

1

ZT44

HOLE-VIA-20R10

1

ZT4

HOLE-VIA-20R10

1

ZT8

HOLE-VIA-20R10

1

ZT6

HOLE-VIA-20R10

1

ZT3

HOLE-VIA-20R10

1

ZT32

HOLE-VIA-20R10

1

ZT10

HOLE-VIA-20R10

1

ZT34

HOLE-VIA-20R10

1

ZT11

HOLE-VIA-20R10

1

ZT20

HOLE-VIA-20R10

1

ZT43

HOLE-VIA-20R10

444

B

051-6809

NO_TEST=TRUE

ZT301_SPN

ZT302_SPN NO_TEST=TRUE

ZT10_SPN NO_TEST=TRUE

PG EN

VIN

ADJ

VOUT

GND

QACK*

TEA*

A10

MCP*

A23

A28 A29

TRST*

PMON_OUT*

A7

SHD1* HIT*

SHD0*

ARTRY*

AACK*

CI*

WT*

GBL*

TBST*

TS*

BG*

BR*

GND

VDD

A1 A2

A11

A5

A4

A3

A6

A8 A9

A12

A22

A21

A20

A19

A18

A17

A16

A15

A14

A13

A32

A31

A30

A27

A24 A25

AP1

AP4

AP2 AP3

AP0

A35

A34

A33

TT0

TT4

TSIZ1 TSIZ2

TSIZ0

TT1 TT2 TT3

DTI3

DTI2

TDI TDO TMS TCK

A26

BMODE0*

PMON_IN*

BMODE1*

DTI1

A0

DTI0

LSSD_MODE*

TA*

L2_TSTCLK

L1_TSTCLK

EXT_QUAL

CHKS*

DX*

SRW0*

IARTRY0*

SRW1*

(1 OF 3)

HRESET*

SRESET*

TBEN

QREQ*

CKSTP_IN*

CKSTP_OUT*

SYSCLK

INT* SMI*

PLL_CFG1

CLK_OUT

OVDD

PLL_CFG0

PLL_CFG3

DRDY*

DBG*

PLL_CFG2

PLL_CFG4

BVSEL

AVDD

OVDDSENSE

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

Place R449 & R452 close to U5 pin 6&5

(R1)

For CPU DFS mode, Must stuff R748

Vout=0.59*(1+R1/R2)

R1

CPU_OVDD DECOUPLING NETWORK

CPU_VCORE DECOUPLING NETWORK

CPU INTERNAL PLL FILTERING

NC

NC NC NC NC NC

NC

MPC7447 MAXBUS

470OHM FOR BOOT BANGER

MPC7447 PULL-UPS

R2

MORE 0805 10UF CAPS ON VCORE POWER SUPPLY PAGE (PG 32)

470OHM FOR BOOT BANGER

(Nap Voltage=0.98V for both Config.)

21

R46

402

MF

1/16W

5%

10K

21

R13

10K

402

MF

1/16W

5%

21

R20

1/16W

402

MF

5%

10K

21

R32

402

MF

1/16W

5%

470

21

R11

5%

1/16W

MF

402

10K

2

1

R10

200

5% 1/16W MF

NO_BBANG

402

21

R4

5%

10K

1/16W

MF

402

21

R7

5%

402

MF

1/16W

1K

21

R24

10K

5%

402

MF

1/16W

21

R34

5%

402

MF

1/16W

10K

2

1

C89

20% CERM

10V

0.1uF

402

2

1

C73

0.1uF

CERM

10V

20%

402

2

1

C18

0.1uF

20%

402

10V CERM

2

1

C20

10V 402

CERM

20%

0.1uF

2

1

C75

CERM

20%

402

10V

0.1uF

2

1

C9

0.1uF

20% 10V

402

CERM

2

1

C49

10V CERM

0.1uF

402

20%

2

1

C46

0.1uF

10V

20%

402

CERM

2

1

C30

0.1uF

20% CERM

10V 402

2

1

C56

10V

0.1uF

20%

402

CERM

2

1

C45

0.1uF

20% 10V

402

CERM

2

1

C48

0.1uF

CERM

10V

20%

402

2

1

C44

0.1uF

20% 402

CERM

10V

2

1

C86

402

10V

20% CERM

0.1uF

2

1

C88

10V 402

CERM

20%

0.1uF

2

1

C10

20%

402

CERM

10V

0.1uF

2

1

C38

0.1uF

20% CERM

402

10V

2

1

C72

CERM 402

10V

20%

0.1uF

2

1

R89

MF

5%

470

1/16W

402

2

1

C50

10V

0.1uF

402

CERM

20%

2

1

C28

20% 10V

402

0.1uF

CERM

2

1

C39

402

20% 10V

0.1uF

CERM

2

1

C47

0.1uF

CERM 402

20% 10V

2

1

C26

20%

402

0.1uF

CERM

10V

2

1

C31

0.1uF

20% 10V

402

CERM

2

1

R38

470

5%

1/16W

MF

402

21

R36

10K

5%

1/16W

MF

402

21

R45

470

5%

1/16W

MF

402

21

R28

MF

1/16W

402

10K

5%

21

R3

1K

1/16W

MF

402

5%

C32

10uF

805

CERM

6.3V

20%

2

1

C33

10uF

805

CERM

20%

6.3V

C59

805

CERM

6.3V

20%

10uF

2

1

C58

6.3V

20% CERM

805

10uF

21

R27

10K

402

1/16W

5% MF

21

R33

10K

5% MF

402

1/16W

2

1

C62

2.2uF

10V 805

CERM

20%

2

1

C34

2.2uF

20%

805

10V CERM

21

R25

402

MF

1/16W

10K

5%

21

R8

402

MF

1/16W

5%

10K

21

R281

0

5%

1/16W

MF

603

1_5V_MAXBUS

21

R283

0

5%

1/16W

MF

603

1_8V_MAXBUS

+1_5V_SLEEP

+1_8V_SLEEP

2

1

R9

1/16W

470

5% MF

402

BBANG

21

R2

470

MF

402

5%

1/16W

2

1

C29

CERM

10V 402

20%

0.1uF

2

1

C27

402

10V CERM

20%

0.1uF

2

1

C25

20% CERM

10V 402

0.1uF

2

1

C54

CERM

10V 402

20%

0.1uF

2

1

C53

402

CERM

10V

0.1uF

20%

2

1

C55

20% 10V

402

CERM

0.1uF

2

1

C87

0.1uF

20% CERM

402

10V

2

1

C69

10V 402

CERM

0.1uF

20%

2

1

C17

20% CERM

402

10V

0.1uF

2

1

C82

0.1uF

10V 402

20% CERM

2

1

C81

0.1uF

20% 10V

402

CERM

2

1

C61

0.1uF

10V 402

20% CERM

21

R6

10K

402

MF

1/16W

5%

21

R37

1/16W

5% MF

402

10K

21

R19

10K

402

MF

1/16W

5%

21

R26

10K

402

MF

1/16W

5%

2

1

C2

10V

20% CERM

402

0.1uF

2

1

C103

20% CERM

402

0.1uF

10V

2

1

C68

CERM

0.1uF

10V

20%

402

2

1

C109

20% CERM

10V

0.1uF

402

2

1

C107

CERM

20%

0.1uF

10V 402

2

1

C104

10uF

805

CERM

20%

6.3V 2

1

C108

10V CERM

20%

0.1uF

402

2

1

C110

0.1uF

20% CERM

10V 402

2

1

C1

10V 402

0.1uF

20% CERM

21

XW34

SM

OMIT

61

4

2

3 5

U5

FAN2558

SOT23-6

2

1

R449

110K

CPU_BST

1% 1/16W

402

MF

2

1

R452

1% 1/16W

402

100K

MF

2

1

C102

1uF

10%

6.3V CERM 402

2

1

C85

CERM1

603

10%

2.2uF

6.3V

2

1

R302

1/16W

MF

603

0

5%

+3V_SLEEP

2 1

R748

1/16W

MF

1%

10

402

2 1

R453

10

1%

1/16W

NO STUFF

MF

402

R455

5%

1/16W

402

MF

100K

2 1

D17

SM

MBR0530

2

1

C502

10V CERM 402

20%

0.1uF

2

1

C626

0.001uF

10% 50V

402

CERM

2

1

R755

0

5% 1/16W MF 402

2

1

R775

NO STUFF

200K

5% 1/16W MF 402

D3

K10

K8

J13

J11

J9J7H12

H10

M12

M10

M8

L13

L11

L9L7K14

K12

H8

C5

E9

F6

E6

E5

E7

F7

G6

L4

A5

F1

L1

A4

B9

C6

F11

E1

K6

A10

E10

B10

A2

F9

H5

E4

P4 G5

A9

D9

A7

D7

C7

C8

B8

G18

E18

L5K2J5H3F2D5C12

V14

V10

V7V4U16

U12

U2C2T9T6R16

R13

R4

P11

P8P2N6

M3

B4

C9

E8

B3

G8

D4

B6

D8

B2

H7

H4

G17

F3

E17

V15

V11

V8

V5

U17

U13

U3

D13

T10

T7

R17

R14

R5

P12

P9P3N7

M13D6M11

M9M7M4

L12

L10

L8

L6

K13

K11

C3

K9K3K7

J12

J10

J8

J6

H13

H11

H9

B5

E2

A11

D10

N1

P1

K1

G1

R3

M2

H2

B1

A3

J1

A12

B7D2

F8

G9

M1

A8

N2

G7

F5

H6

E3

C1

R1

G2

C10

D1

D11

L2

F10

B11

G10

C4

B12

W1

N5

G3

U1

V2

T1

N3

P5

M5

J3

N4

K4

J2

C11

W2

K5

R2

J4

V1

F4

T2

G4

L3

D12

H1

E11

U56

APOLLO7-V1.1.1

OMIT

1.25GHZ-1.24V-20W-85C

BGA

2

1

C810

402

0.1uF

CERM

20% 10V

2

1

C811

6.3V

4.7uF

20% 805

CERM

CPU_BST_R12

337S2993

IC,A7PM,R1.2,1.5GHZ,1.24VCORE,85C

U56

CRITICAL

1

RES,MF,1/16W,100k ohm,1%,0402,SMD

114S1005

1

CPU_BTR

R449

CPU_BST_R111

IC,A7PM,R1.1.1,1.5GHZ,1.24VCORE,85C

337S2912

U56

CRITICAL

1

CPU_BTR_R111

U56

CRITICAL

IC,A7PM,R1.1.1,1.33GHZ,1.18VCORE,85C

1

337S2913

B

5 44

051-6809

VCORE_SHDN_L_3V

VCORE_SHDN_L

CPU_SRESET_L

CPU_AVDD_SHDN_L

JTAG_CPU_TMS

MPIC_CPU_INT_L

JTAG_CPU_TDI

CPU_SMI_L

CPU_EMODE1_L

CPU_PMONIN_L

CPU_CHKSTP_OUT_L

CPU_L2TSTCLK

CPU_MCP_L

CPU_LSSD_MODE

CPU_SHD0_L

CPU_SHD1_L

CPU_CHKS_L

CPU_TBEN

MAXBUS_SLEEP

ADT7460_VCORE_MON

JTAG_CPU_TRST_L

MAXBUS_SLEEP

CPU_VCORE_SLEEP

CPU_EDTI

CPU_L1TSTCLK

JTAG_CPU_TCK

CPU_PULLDOWN

CPU_HRESET_L

CPU_SRWX_L

CPU_AVDD_VIN

CPU_PULLUP

CPU_AVDD_ADJ

CPU_AVDD_VOUT

CPU_ADDR<1>

CPU_PLL_CFG<4>

CPU_PLL_CFG<1>

CPU_DBG_L

CPU_PLL_CFG<3>

CPU_DRDY_L CPU_EDTI CPU_DTI<0> CPU_DTI<1> CPU_DTI<2>

JTAG_CPU_TDI

JTAG_CPU_TMS

CPU_TBEN

CPU_MCP_L

CPU_CHKSTP_OUT_L

CPU_ADDR<18>

CPU_PLL_CFG<2>

CPU_ADDR<2>

CPU_ADDR<0>

CPU_CHKS_L

CPU_PULLDOWN

CPU_ADDR<16>

CPU_ADDR<21>

CPU_PMONIN_L

CPU_EMODE0_L

JTAG_CPU_TDO_TP

JTAG_CPU_TCK

CPU_ARTRY_L CPU_SHD0_L

CPU_HIT_L

CPU_SHD1_L

CPU_BR_L CPU_BG_L

CPU_TS_L

CPU_ADDR<3> CPU_ADDR<4>

CPU_ADDR<6>

CPU_ADDR<5>

CPU_ADDR<9>

CPU_ADDR<8>

CPU_ADDR<11>

CPU_ADDR<10>

CPU_ADDR<12>

CPU_ADDR<14>

CPU_ADDR<13>

CPU_ADDR<15>

CPU_ADDR<17>

CPU_ADDR<19> CPU_ADDR<20>

CPU_ADDR<22>

CPU_ADDR<24>

CPU_ADDR<23>

CPU_ADDR<25> CPU_ADDR<26> CPU_ADDR<27> CPU_ADDR<28> CPU_ADDR<29>

CPU_ADDR<31>

CPU_ADDR<30>

CPU_TT<0> CPU_TT<1>

CPU_TT<3>

CPU_TT<2>

CPU_TBST_L

CPU_TT<4>

CPU_TSIZ<0>

CPU_TSIZ<2>

CPU_TSIZ<1>

CPU_WT_L

CPU_GBL_L

CPU_CI_L CPU_AACK_L

CPU_ADDR<7>

CPU_QACK_L

CPU_TA_L

SYSCLK_CPU

CPU_PULLDOWN

CPU_EMODE1_L

CPU_CLKOUT_SPN

NO_TEST=TRUE

CPU_LSSD_MODE

JTAG_CPU_TRST_L

CPU_L2TSTCLK

CPU_L1TSTCLK

CPU_SRWX_L

CPU_PULLUP

CPU_PULLDOWN

CPU_TEA_L

CPU_HRESET_L

CPU_SRESET_L

CPU_VCORE_SLEEP

CPU_AVDD

MPIC_CPU_INT_L CPU_SMI_L

CPU_QREQ_L

CPU_PLL_CFG<0>

CPU_BUS_VSEL

MAXBUS_SLEEP

38

33

16

15

39

15

8

38

39

38

8

39

7

39

7

33

39

7

39

7

33

7

39

6

14

6

29

39

8

6

36

6

8

39

36

6

36

35

6

36

6

39

6

14

29

36

6

33

5

25

5

38

5

38

8

7

8

7

8

5

8

5

8

7

8

5

8

5

7

39

5

8

5

8

5

8

5

8

5

38

5

8

7

5

VCC

RESET* XTAL1 XTAL2 PB0

PD6

PD5

PD4

PD3

PD2

PD1

PD0

GND

PB1 PB2 PB3 PB4 PB5 PB6 PB7

SYM_VER2

WC*

VCC

VSS

SDA SCL

NC1 NC2 NC3

Y

B

A

Y

B

A

VDD

N/C_1

N/C_4

N/C_8

N/C_13

N/C_17

N/C_20

N/C_22 N/C_23

N/C_31

N/C_39

N/C_30

N/C_33

N/C_35 N/C_36

N/C_38

N/C_29

N/C_28

N/C_27

N/C_25

N/C_24

N/C_21

N/C_19

N/C_18

N/C_16

N/C_15

N/C_14

N/C_12

N/C_11

N/C_10

N/C_9

N/C_7

N/C_6

N/C_5

N/C_3

N/C_2

(3 OF 3)

N/C_26

N/C_32

N/C_34

N/C_37

SENSEVDD

GND

TEMP_CATHODE

TEMP_ANODE

SENSEGND

HPR*

D22

D3

D2

D1

D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21

D28

D27

D23 D24 D25 D26

D29

D32

D31

D30

D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44

D48

D47

D45 D46

D49

D51

D50

D52 D53 D54 D55

D58

D57

D56

D59

DP6

DP5

DP4

DP3

DP2

DP1

DP0

DP7

D63

D62

D61

D60

D0

(2 OF 3)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

REFERENCE DESIGNATOR(S)

BOM OPTION

TABLE_5_HEAD

QTY

DESCRIPTION

PART#

TABLE_5_ITEM

NC

(Rb)

NC

MPC7447/BBANG

NC

NC NC NC

NC

NC NC

NC

NC NC NC

NC

INPUTS ARE 3V TOLERANT

BOOT BANGER - TWEAK PROCESSOR BITS AFTER POWER-ON

(Ra)

NC

INPUTS ARE 3V TOLERANT

NC

009-6240 FW GT4 BBANGER

WILL DISABLE THE CONTROLLER

UNSTUFFING Ra AND STUFFING Rb

NC

+3V_SLEEP

9

8

7

6

4

3

2

1

10

5

RP46

BBANG

10K

5%

1/32W

25V

SM

2

1

C762

0.1uF

402

CERM

10V

20%

BBANG

2

1

R692

BBANG

603

MF

1/16W

1%

10K

2

1

R709

10K

603

MF

1/16W

1%

NO STUFF

2

1

R707

10K

1% 1/16W MF 603

BBANG

2

1

R712

10K

1% 1/16W

BBANG

603

MF

+3V_SLEEP

4

5

20

1

11

9

8

7

6

3

2

19

18

17

16

15

14

13

12

10

U54

AT90S1200A

SSOP

OMIT

2

1

C120

0.1uF

402

20% 10V CERM

BBANG

+3V_SLEEP

7

4

8

5 6

3

2

1

U52

32KX8_M24256B

SOI

BBANG

2

1

R100

10K

5%

1/16W

MF

402

BBANG

4

5

3

2

1

U9

BBANG

SC70-5

SN74AUC1G08

21

R104

402

MF

1/16W

5%

0

NO_BBANG

+3V_SLEEP

2

1

R103

10K

5%

1/16W

MF

402

BBANG

4

5

3

2

1

U10

BBANG

SN74AUC1G08

SC70-5

2

1

R105

BBANG

402

MF

1/16W

5%

10K

2

1

R637

10K

1% 1/16W MF 603

BBANG

P18

P16

N17

N15

M18

M16

M14

H19

H17

H14

G16

G11

F19

F17

F12

E16

E13

C13

B19

B17

A18

A16

A13

N19

N18

G13

N12

G12

N13

B15

A15

G14

F14

E14

D14

L19

K19

J19

L18

K18

J18

L17

K17

J17

L16

C14

K16

J16

H16

D19

C19

D18

C18

D17

C17

D16

B14

C16

L15

K15

J15

H15

G15

F15

E15

D15

C15

A14

A6

P19

P15

N16

N14

M19

M17

M15

L14

J14

H18

G19

F18

F16

F13

E19

E12

B18

B16

B13

A19

A17

U56

OMIT

APOLLO7-V1.1.1

BGA

1.25GHZ-1.24V-20W-85C

W6

N8

V3

M6

W9

T4

W4

T3

W13

V13

P14

T8

W8

R8

P6

U15

R7

U7

U8

U4

V17

W3

T17

T18

T16

W18

T15

W17

U18

W19

U19

T19

V19

R18

V18

R19

P17

W16

V6

P7

R6

W7

U5

T5

U6

W5

V9

U9

V16

W10

R9

U10

P10

N9

R10

T11

W11

U11

R11

T14

N10

N11

V12

W12

T12

R12

W14

U14

P13

T13

W15

R15

U56

OMIT

APOLLO7-V1.1.1

1.25GHZ-1.24V-20W-85C

BGA

446

B

051-6809

MCU,PROGRAMMED W/ BBANGER

341S1135

BBANG

U541

PMU_CPU_HRESET_L

RESET_VREF BBANG_HRESET_L INT_I2C_CLK0

BB_XTAL1_SPN

BFR_TDO

INT_I2C_DATA0

BBANG_HRESET_L

ICT_TRST_L

BFR_TDO

ESP_EN_L

BBANG_JTAG_TCK BB_MOSI BB_MISO BB_SCK BB_EEPR_ADDR

JTAG_CPU_TCK

BBANG_JTAG_TCK

BBANG_TCK_EN

MAXBUS_SLEEP

BB_RESET_L

ESP_EN_L

BBANG_JTAG_TCK

JTAG_CPU_TDI

BB_MOSI

BB_SCK

BB_EEPR_WP_PD

INT_I2C_CLK0

INT_I2C_DATA0

ICT_TRST_L

CPU_HRESET_L

MAXBUS_SLEEP

BB_MISO

JTAG_CPU_TMS

JTAG_CPU_TRST_L

PMU_CPU_HRESET_L

BB_EEPR_ADDR

CPU_VCORE_SLEEP

CPU_THERM_DP

CPU_THERM_DM

CPU_DATA<63>

CPU_DATA<62>

CPU_DATA<61>

CPU_DATA<60>

CPU_DATA<59>

CPU_DATA<58>

CPU_DATA<57>

CPU_DATA<56>

CPU_DATA<55>

CPU_DATA<53> CPU_DATA<54>

CPU_DATA<52>

CPU_DATA<51>

CPU_DATA<50>

CPU_DATA<49>

CPU_DATA<48>

CPU_DATA<46> CPU_DATA<47>

CPU_DATA<45>

CPU_DATA<44>

CPU_DATA<43>

CPU_DATA<41> CPU_DATA<42>

CPU_DATA<40>

CPU_DATA<38> CPU_DATA<39>

CPU_DATA<36> CPU_DATA<37>

CPU_DATA<35>

CPU_DATA<33> CPU_DATA<34>

CPU_DATA<32>

CPU_DATA<31>

CPU_DATA<30>

CPU_DATA<29>

CPU_DATA<28>

CPU_DATA<27>

CPU_DATA<26>

CPU_DATA<25>

CPU_DATA<24>

CPU_DATA<23>

CPU_DATA<22>

CPU_DATA<21>

CPU_DATA<20>

CPU_DATA<19>

CPU_DATA<18>

CPU_DATA<17>

CPU_DATA<16>

CPU_DATA<15>

CPU_DATA<14>

CPU_DATA<13>

CPU_DATA<12>

CPU_DATA<11>

CPU_DATA<10>

CPU_DATA<9>

CPU_DATA<7> CPU_DATA<8>

CPU_DATA<5> CPU_DATA<6>

CPU_DATA<4>

CPU_DATA<3>

CPU_DATA<2>

CPU_DATA<1>

CPU_DATA<0>

38

33

16

39

15

39

15

23

8

23

8

39

13

7

13

39

7

39

38

29

11

39

6

39

11

7

6

39

29

33

36

6

5

6

5

39

6

5 6

6

5

6

5

6

5

25

8

G

D

S

G

D

S

04

G

D

S

G

D

S

G

D

S

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

+5V_SLEEP NOW REQUIRED FOR PLL_STOP_L PULLUP TO ENSURE THAT Vgs OF PASS TRANSISTOR ON CPU_PLL_CFG<4> IS MET.

R10ER01ER00D

R10E, R01E, OR PULLUP STUFFED

STUFF PASS TRANSISTOR ONLY IF

R00AR01A R10D

7.0X 1250

1 0111 17 0 0111 07 1 1010 1A

0 0110 06

0 1100 0C

10671333

1000

4.0X

R10CR00CR01CR10BR00BR10A R00E

E ABCD HEX

4 0123

CPU CONFIGURATION

1 1110 1E

12671583

11331417

1500 1200

21.0X

20.0X

18.0X

17.0X

13.5X

13.0X

12.5X

11.5X

12.0X

11.0X

10.5X

10.0X

14.0X

15.0X

16.0X

28003500

2167 2250

2833 3000 3333

2000 2083

2667

2500

2333 1867

2000 2133

1733 1800

2267 2400 2667

1600 1667

1 0100 14

1 1111 1F

1 1011 1B

1 0011 13

1 0010 12

1 0000 10

0 1110 0E

1 0101 15

1 1101 1D

1 0001 11

1 1100 1C

1533

1400

1333

1467

1917

1750

1667

1833

1 1001 19

1 1000 18

0 0000 00

24.0X

28.0X 4667 3733

4000 3200

1 0110 16

1167

1083

1000

0 0001 01

0 0010 02

0 0101 05

0 1101 0D

0 1010 0A

0 1000 08

0 0100 04

0 0011 03PLL BYPASS

167MHZ

CORE FREQUENCY

(AT BUS FREQUENCY)

CPU_PLL_CFG

0 1111 0F

(Bus-to-Core)

133MHZ

PLL OFF

(MHZ)

CPU FREQUENCY CONFIGURATION

LOW SPEED 0 0 HIGH SPEED 0 1 PLL DISABLE 1 X

APOLLO 7

0.0X

1.0X

2.0X

3.0X

6.0X

6.5X

7.5X

9.0X

8.0X

8.5X

9.5X

667

500

333

5.5X

5.0X 833

917

0 1001 09

0 1011 0B

667 733 800 867

533

400

267

933

1.8V INTERFACE

NEED TO CHARACTERIZE

INVERTER TO INVERT HRESET_L

DESKTOP HAD PROBLEM USING

MAX BUS MODE

APPLICATION

60X BUS MODE

2.5V INTERFACE

1.5V INTERFACE

1.8V INTERFACE

LOW

HIGH

TIED

CPU_HRESET_L

CPU_HRESET_INV

CPU_HRESET_L

CPU_EMODE0_L (PROCESSOR)

SIGNAL

CPU_BUS_VSEL

(PROCESSOR)

APOLLO ONLY SUPPORTS MAXBUS

BUSTYPE SELECT

INVERTED HRESET_L

1.5V INTERFACE

MAXBUS VSEL

CPU CONFIGURATION

STATE ENCODING CPU_PLL_STOP_OC CPU_VCORE_HI_OC

MULTIPLIER

R01DR01B

CPU PLL CONFIG CIRCUITRY

2

1

R63

MF

1/16W

NO STUFF

0

5%

402

2

1

R92

1/16W

NO STUFF

402

MF

0

5%

2

1

R35

10K

1/16W 402

MF

5%

2

1

R50

10K

1/16W 402

MF

5%

2

1

R68

402

1/16W

5%

10K

MF

2

1

R79

10K

402

MF

1/16W

5%

2

1

R133

47K

MF

1/16W

5%

402

2

1

R132

10K

MF

1/16W

5%

402

2

1

R14

5%

1/16W

MF

402

82K

2

1

R31

0

5% 1/16W

402

MF

NO STUFF

2

1

R23

NO STUFF

5% 1/16W MF 402

0

4

5

3

Q14

2N7002DW

SOT-363

1

2

6

Q14

2N7002DW

SOT-363

4

5

3

2

U12

1_5V_MAXBUS

SN74AUC1G04

SC70-5

2

1

R12

CPU_BTR

5%

0

1/16W MF 402

1

2

6

Q3

CPU_BST

2N7002DW

SOT-363

4

5

3

Q3

SOT-363

2N7002DW

CPU_BST

+5V_SLEEP

1 2

R5

1_5V_MAXBUS

402

22

5% MF

1/16W

2

1

R70

5%

0

402

MF

1/16W

CPU_BTR

2

1

R18

402

10K

5% 1/16W MF

CPU_BST

1 2

R110

402

5% MF

1/16W

22

2

1

R17

1_8V_MAXBUS

402

1/16W

5% MF

10

2

1

3

Q13

SM

2N7002

2

3

1

Q12

2N3904

SM

21

R131

1%

1/16W

MF

402

249K

2

1

R43

0

CPU_BST

402

1/16W

5% MF

+3V_SLEEP

2

1

R44

NO STUFF

0

5% 1/16W MF 402

2

1

R48

NO STUFF

5% MF

1/16W

0

402

2

1

R60

NO STUFF

0

5% 1/16W MF 402

2

1

R64

NO STUFF

1/16W

5%

0

402

MF

2

1

R76

1/16W MF 402

NO STUFF

0

5%

2

1

R84

CPU_BTR

1/16W 402

0

5% MF

2

1

R78

NO STUFF

402

MF

1/16W

5%

0

2

1

R88

NO STUFF

402

1/16W

0

5% MF

44

7

B

051-6809

CPU_PLL_CFG<0>

CPU_EMODE0_LCPU_HRESET_L

CPU_HRESET_L

CPU_HRESET_INV

MAXBUS_SLEEP

CPU_BUS_VSEL

CPU_VCORE_HI_OC

CPU_PLL_STOP_OC

PLL_STOP_L

CPU_PLL_STOP_OC

CPU_PLL_STOP_BASE

CPU_PLL_FS00

CPU_PLL_FS10

CPU_PLL_CFG<4>

PLL_STOP_L

CPU_PLL_FS01

CPU_PLL_CFG<3>

CPU_PLL_CFG<2>

CPU_PLL_CFG<1>

CPU_PLL_CFGEXT

MAXBUS_SLEEP

38

33

16

15

39

8

7

6

33

29

6

5

5 5

5

29

7

5

7

5

(PLL6)

VSSA_7

(PLL6)

VDD15A_7

D_42

D_41

D_40

D_39

D_38

D_44

D_43

D_45 D_46 D_47 D_48

D_52

D_51

D_50

D_49

D_53

D_55

D_54

D_56 D_57 D_58

D_60

D_59

D_62

D_61

D_63

DBG

DRDY

DTI_0

TEA

TA

DTI_2

DTI_1

D_1

D_0

D_2

D_6

D_5

D_4

D_3

D_7

D_11

D_10

D_9

D_8

D_12

D_14

D_13

D_15 D_16 D_17

D_22

D_21

D_20

D_19

D_18

D_23 D_24 D_25 D_26 D_27

D_32

D_31

D_30

D_29

D_28

D_34

D_33

D_35 D_36 D_37

BR

(1 OF 9)

MAXBUS

INTERFACE

TS

BG

A_0 A_1 A_2 A_3 A_4 A_5

A_9

A_6 A_7 A_8

A_10

A_14

A_13

A_12

A_11

A_20

A_16 A_17 A_18 A_19

A_15

A_27

A_22

A_21

A_30

A_29

A_28

A_26

A_25

A_24

A_23

TT_2

TT_1

TT_0

A_31

TBST TSIZ_0 TSIZ_1 TSIZ_2

CI GBL

TT_4

AACK

QREQ

ARTRY

TT_3

WT

HIT

ANALYZER_CLK

SUSPENDACK

SUSPENDREQ

QACK

STOPCPUCLK

CPU_FB_OUT

CPU_FB_IN

CPU_CLK

TBEN

ACS_REF

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

Spare

2/ D46 - SELPCI1SPREADCLK - SLEEP/WAKE CYCLE REQUIRED

FB BUFFER HAS 50 OHM OUTPUT IMPEDANCE

1: PLL4

0: PLL5 (no spread)

1: PLL4

0: PLL5 (no spread)

PCI0 Source Clock

BIT 40 TO 47

0: Active high

INTREPID BOOT STRAPS

1: Active

OBSOLETE (Should remain high)

OBSOLETE

1: 0-1 IDE / 2-3 PCI1

0: 0 IDE / 1 PCI1

ROM_Ovrly_Rng

1: BootROM on PCI1

0: BootROM on IDE/CardSlot

En_PCI_ROM_P

1: External source

SelPLL4ExtSrc

1: TI PHY workaround

011: 33.3 ohm 101: 40 ohm

110: 66.6 ohm

0: PLL5

BUF_REF_CLK_OUTEnable_h

0: Inactive

1: Active

1/ D47 - SELAGPSPREADCLK - SLEEP/WAKE CYCLE REQUIRED 3/ D44 - PLL4MODESEL_NXT<0> - SLEEP/WAKE CYCLE REQUIRED

4/ D43 - PLL4MODESEL_NXT<1> - SLEEP/WAKE CYCLE REQUIRED 5/ D42 - PLL4MODESEL_NXT<2> - SLEEP/WAKE CYCLE REQUIRED 6/ D33 - ANALYZERCLK_EN_H - IMMEDIATE EFFECT

IF A STRAP IS NOT LISTED, THEN IT CANNOT BE CHANGED BY SOFTWARE

THE FOLLOWING STRAP BITS CAN BE CHANGED BY SOFTWARE:

LONG = 1" LONGER THAN MATCHED LENGTH

SHORT = 1" SHORTER THAN MATCHED LENGTH

NO BUS KEEPER - ?

INPUT - PU

INPUT - PD

NO BUS KEEPER - PU

NO BUS KEEPER - PU NO BUS KEEPER - PU

INPUT - PU

NO BUS KEEPER - PU

INPUT NO BUS KEEPER

NO BUS KEEPER

Vout = MaxBus rail (1.8V)

Vin = Intrepid Vcore (1.5V)

BIT2 BIT1 BIT0

BIT0BIT1

001: 50 ohm

010: 100 ohm 100: 200 ohm 000: 200 ohm

111: 28.6 ohm

MaxBus output impedance

100: 83.20MHZ

001: 149.76MHZ

INTREPID OUTPUTS HIGH BY DEFAULT

INTREPID BOOT STRAPS

0: TDI input (JTAG)

Spare

PCI1_REQ1_L / PCI1_GNT1_L

PCI1_REQ2_L / PCI1_GNT2_L

0: REQ/GNT

1: GPIOs

0: REQ/GNT

1: GPIOs

PCI1_REQ0_L / PCI1_GNT0_L

Processor Bus Mode

0: Legacy interface

1: B-mode interface

FireWire PHY interface

1: 60x bus (G3)

0: Max Bus (G4)

BIT 56 TO 63

0: Normal 1394b

TI 1394b workaround

Spare

BIT 48 TO 55

0: Inactive

Spare

PCI1 Source Clock

AnalyzerClk_En_h

1: Active

0: Inactive

DDR_TPDEn_Pol

1: Active low

0: Active high

ExtPLL_SDwn_Pol

1: Active low

Spare

Intrepid MaxBus

NO BUS KEEPER - PU

MAXBUS PULL-UPS

011: 99.84MHZ (1.5X)

MODE A (2.5X) IS FOR STATIC OPERATION

DDR_TPDModeEnable_h

1: TDI output

BIT2

PLL4MODESEL_NXT[2:0] 000: 166.4MHZ (2.5X)

010: 133.12MHZ (2.0X)

MODE C (2.0X) IS FOR CLOCK SLEW OPERATION

InternalSpreadEn

(SW CNTL ONLY)

BIT 32 TO 39

2

1

R161

1K

1%

1/16W

MF

402

2

1

C187

0.22uF

402

CERM

6.3V

20%

21

R159

402

MF

1/16W

5%

4.7

21

R168

0

5%

1/16W

MF

402

2 1

R155

0

402

MF

1/16W

5%

2

1

R169

511

402

1%

1/16W

MF

2

1

R666

5%

1/16W

MF

402

10K

2

1

R638

10K

402

MF

1/16W

5%

NO STUFF

2

1

R639

5% MF

402

10K

NO STUFF

1/16W

2

1

R650

MF

402

10K

5%

1/16W

2

1

R652

5%

1/16W

MF

402

10K

2

1

R620

10K

402

MF

1/16W

5%

2

1

R621

10K

402

MF

1/16W

5%

2

1

R653

5%

1/16W

MF

402

10K

NO STUFF

2

1

R618

10K

402

MF

1/16W

5%

2

1

R619

5%

1/16W

MF

402

10K

2

1

R640

NO STUFF

5%

1/16W

MF

402

10K

2

1

R622

5%

1/16W

MF

402

10K

2

1

R699

10K

402

MF

1/16W

5%

NO STUFF

2

1

R693

5%

1/16W

MF

402

10K

NO_SSCG

2

1

R694

5%

1/16W

MF

402

10K

NO STUFF

2

1

R664

NO STUFF

10K

402

MF

1/16W

5%

2

1

R665

10K

402

MF

1/16W

5%

SSCG

2

1

R641

NO STUFF

5%

1/16W

MF

402

10K

2

1

R684

MF

5%

1/16W

402

10K

2

1

R679

5%

1/16W

MF

402

10K

2

1

R678

5%

10K

MF

1/16W

402

SSCG

2

1

R649

10K

402

MF

5%

1/16W

2

1

R651

MF

5%

NO_SSCG

10K

1/16W

402

2

1

R623

402

MF

1/16W

5%

10K

2

1

R677

5%

1/16W

MF

402

10K

2

1

R648

5%

1/16W

MF

402

10K

2

1

R642

10K

402

MF

1/16W

5%

NO STUFF

2

1

R698

5%

1/16W

MF

402

10K

2

1

R643

NO STUFF

5%

1/16W

MF

402

10K

2

1

R668

NO STUFF

10K

402

MF

1/16W

5%

2

1

R667

5%

1/16W

MF

402

10K

2

1

R695

10K

402

MF

1/16W

5%

SSCG

2

1

R626

5%

1/16W

MF

402

10K

2

1

R683

10K

402

MF

1/16W

5%

NO STUFF

2

1

R624

10K

402

MF

1/16W

5%

2

1

R625

5%

1/16W

MF

402

10K

2

1

R655

10K

402

MF

5%

1/16W

2

1

R654

NO STUFF

5%

1/16W

MF

402

10K

2

1

R680

10K

402

MF

1/16W

5%

NO_SSCG

2

1

R696

5%

1/16W

MF

402

10K

SSCG

2

1

R681

5%

1/16W

MF

402

10K

NO_SSCG

2

1

R646

NO STUFF

10K

402

MF

1/16W

5%

2

1

R644

5%

1/16W

MF

402

10K

2

1

R670

NO STUFF

10K

402

MF

1/16W

5%

2

1

R697

NO STUFF

5%

1/16W

MF

402

10K

2

1

R645

NO STUFF

10K

402

MF

1/16W

5%

2

1

R669

5%

1/16W

MF

402

10K

NO STUFF

2

1

R629

5%

1/16W

MF

402

10K

2

1

R658

5%

1/16W

MF

402

10K

2

1

R627

10K

402

MF

1/16W

5%

NO STUFF

2

1

R682

10K

402

MF

1/16W

5%

2

1

R628

5%

1/16W

MF

402

10K

2

1

R657

10K

402

MF

1/16W

5%

2

1

R685

5%

1/16W

MF

402

10K

2

1

R656

10K

402

MF

1/16W

5%

2

1

R146

NO STUFF

0

5%

1/16W

MF

402

21

R140

402

MF

1/16W

5%

0

2

1

R141

0

5%

1/16W

MF

402

21

R128

402

MF

1/16W

5%

0

NO STUFF

21

R147

0

5%

1/16W

MF

402

21

R136

0

5%

1/16W

MF

402

NO STUFF

D28

H25

H26

J25

D27

B28

G25

E25

D26

H24

G24

B27

E28

A28

A31

E27

AK9 AM8

AH9

A32

G27

B31

A29

D11

E12

A8

G20

B20

G19

E19

A9

D19

A20

J19

B19

H19

A19

A18

D18

B18

E18

B8

B17

A17

G18

D17

H18

J18

A16

E17

B16

A15

B9

H17

B15

G17

E16

D16

A13

A14

D15

J16

E15

H11

G16

A12

B14

D14

H15

B13

G15

B12

E14

H14

E11

G14

A11

D13

B11

G13

E13

D12

A10

J13

B10

G12

D10

B30

D29

K25

G28

A30H16

J24

J15

G26

E29 E26

E23

A25

D23

A26

B26

G23

A21

D20

E24

B21

E20

A22

H21

B22

H20

A23

D21

A24

E21

A27

G21

J21

E22

B23

B24

D22

G22

H22

B25

J22

D25

D24

H23

G8

H13

B29

U51

OMIT

INTREPID-REV2.1

BGA

CRITCAL

21

R152

10K

402

MF

1/16W

5%

21

R150

5%

1/16W

MF

402

10K

21

R151

10K

402

MF

1/16W

5%

81

RP2

SM1

1/16W

5%

10K

54

RP2

SM1

1/16W

5%

10K

72

RP2

SM1

10K

5%

1/16W

72

RP3

SM1

10K

5%

1/16W

81

RP3

SM1

10K

5%

1/16W

63

RP3

SM1

10K

1/16W

5%

54

RP3

SM1

1/16W

5%

10K

63

RP2

SM1

10K

1/16W

5%

44

8

B

051-6809

+1_5V_INTREPID_PLL

CPU_ADDR<7>

CPU_ADDR<3>

MAXBUS_SLEEP

CPU_DATA<39>

CPU_DATA<40>

CPU_DATA<47>

MAXBUS_SLEEP

CPU_DATA<42>

CPU_DATA<50>

CPU_DATA<53>

CPU_DATA<55>

CPU_DATA<43> CPU_DATA<44>

CPU_DATA<46>

CPU_DATA<41>

CPU_DATA<38>

CPU_DATA<34>

CPU_TSIZ<0>

CPU_GBL_L

SYSCLK_CPU

CPU_QREQ_L

CPU_DBG_L

CPU_BG_L

CPU_AACK_L

CPU_TEA_L

CPU_DRDY_L

CPU_HIT_L

CPU_ARTRY_L

CPU_BR_L

CPU_TS_L

CPU_TA_L

MAXBUS_SLEEP

CPU_DATA<37>

CPU_DATA<36>

CPU_DATA<33>

CPU_DATA<54>

CPU_DATA<45>

CPU_DATA<52>

CPU_DATA<51>

CPU_DATA<49>

CPU_DATA<48>

CPU_DATA<63>

CPU_DATA<62>

CPU_DATA<61>

CPU_DATA<60>

CPU_DATA<59>

CPU_DATA<58>

CPU_DATA<57>

CPU_DATA<56>

CPU_DATA<32>

INT_CPUFB_OUT

INT_CPUFB_OUT_SHORT

INT_CPUFB_IN

INT_CPUFB_OUT_NORM

INT_CPUFB_IN_NORM

INT_CPUFB_LONG

MAXBUS_SLEEP

+1_5V_INTREPID_PLL7

CPU_TEA_L

CPU_TA_L

CPU_DTI<2>

CPU_DTI<1>

CPU_DTI<0>

CPU_DRDY_L

CPU_DBG_L

CPU_DATA<63>

CPU_DATA<61> CPU_DATA<62>

CPU_DATA<60>

CPU_DATA<58> CPU_DATA<59>

CPU_DATA<57>

CPU_DATA<56>

CPU_DATA<55>

CPU_DATA<53> CPU_DATA<54>

CPU_DATA<52>

CPU_DATA<51>

CPU_DATA<48>

CPU_DATA<50>

CPU_DATA<49>

CPU_DATA<47>

CPU_DATA<46>

CPU_DATA<44> CPU_DATA<45>

CPU_DATA<43>

CPU_DATA<41> CPU_DATA<42>

CPU_DATA<40>

CPU_DATA<39>

CPU_DATA<38>

CPU_DATA<37>

CPU_DATA<36>

CPU_DATA<35>

CPU_DATA<34>

CPU_DATA<33>

CPU_DATA<32>

CPU_DATA<30> CPU_DATA<31>

CPU_DATA<29>

CPU_DATA<28>

CPU_DATA<27>

CPU_DATA<25> CPU_DATA<26>

CPU_DATA<24>

CPU_DATA<23>

CPU_DATA<22>

CPU_DATA<20> CPU_DATA<21>

CPU_DATA<19>

CPU_DATA<17> CPU_DATA<18>

CPU_DATA<16>

CPU_DATA<15>

CPU_DATA<14>

CPU_DATA<12> CPU_DATA<13>

CPU_DATA<11>

CPU_DATA<10>

CPU_DATA<7>

CPU_DATA<9>

CPU_DATA<8>

CPU_DATA<6>

CPU_DATA<5>

CPU_DATA<2>

CPU_DATA<4>

CPU_DATA<3>

CPU_DATA<0> CPU_DATA<1>

CPU_BR_L CPU_BG_L

CPU_TS_L

CPU_ADDR<1>

CPU_ADDR<0>

CPU_ADDR<2>

CPU_ADDR<4> CPU_ADDR<5> CPU_ADDR<6>

CPU_ADDR<8> CPU_ADDR<9> CPU_ADDR<10>

CPU_ADDR<12>

CPU_ADDR<11>

CPU_ADDR<14>

CPU_ADDR<13>

CPU_ADDR<15> CPU_ADDR<16> CPU_ADDR<17>

CPU_ADDR<19>

CPU_ADDR<18>

CPU_ADDR<20>

CPU_ADDR<22>

CPU_ADDR<21>

CPU_ADDR<24>

CPU_ADDR<23>

CPU_ADDR<25> CPU_ADDR<26> CPU_ADDR<27>

CPU_ADDR<29>

CPU_ADDR<28>

CPU_ADDR<30> CPU_ADDR<31>

CPU_CI_L

CPU_TBST_L

CPU_TSIZ<2>

CPU_TSIZ<1>

CPU_TT<1>

CPU_TT<0>

CPU_TT<2>

CPU_TT<4>

CPU_TT<3>

CPU_WT_L

CPU_AACK_L

CPU_HIT_L

CPU_ARTRY_L

CPU_QREQ_L

CPU_QACK_L INT_SUSPEND_REQ_L INT_SUSPEND_ACK_L

INT_CPUFB_IN INT_CPUFB_OUT SYSCLK_LA_TP

CPU_CLK_EN

SYSCLK_CPU_UF

INTREPID_ACS_REF

CPU_TBEN

MAXBUS_SLEEP

CPU_DATA<35>

38

33

16

15

8

38

7

36

7

36

7

36

7

36

7

36

14

36

6

8

6

8

36

35

8

6

8

35

6

8

36

8

36

8

36

8

36

35

6

8

12

5

6

5

6

5

6

8

35

8

35

5

38

5

6

5

29

8

29

35

5

6

DQ1

VCCVPP

DQ7

DQ4

DQ3

DQ2

DQ5 DQ6

DQ0

GND

PWD

WP

WE

OE

CE

A19

A18

A17

A20

A16

A15

A14

A13

A12

A11

A10

A7 A8 A9

A5

A4

A3

A2

A6

A1

A0

(2 OF 9)

DDR_VREF_1

DDR_VREF_0

DDR_DATA_0 DDR_DATA_1 DDR_DATA_2 DDR_DATA_3 DDR_DATA_4 DDR_DATA_5 DDR_DATA_6 DDR_DATA_7 DDR_DATA_8 DDR_DATA_9 DDR_DATA_10 DDR_DATA_11 DDR_DATA_12 DDR_DATA_13 DDR_DATA_14 DDR_DATA_15 DDR_DATA_16 DDR_DATA_17 DDR_DATA_18 DDR_DATA_19 DDR_DATA_20 DDR_DATA_21

DDR_DATA_25 DDR_DATA_26 DDR_DATA_27 DDR_DATA_28 DDR_DATA_29 DDR_DATA_30

DDR_DATA_33 DDR_DATA_34 DDR_DATA_35 DDR_DATA_36 DDR_DATA_37 DDR_DATA_38 DDR_DATA_39 DDR_DATA_40 DDR_DATA_41 DDR_DATA_42 DDR_DATA_43 DDR_DATA_44 DDR_DATA_45 DDR_DATA_46 DDR_DATA_47 DDR_DATA_48 DDR_DATA_49 DDR_DATA_50 DDR_DATA_51 DDR_DATA_52 DDR_DATA_53 DDR_DATA_54 DDR_DATA_55 DDR_DATA_56 DDR_DATA_57 DDR_DATA_58 DDR_DATA_59 DDR_DATA_60 DDR_DATA_61 DDR_DATA_62 DDR_DATA_63

DDR_DATA_22 DDR_DATA_23 DDR_DATA_24

DDR_DATA_31 DDR_DATA_32

DDR_BA_0 DDR_BA_1

DDRCS_3

DDRCS_2

DDRCS_1

DDRCS_0

DDR_DQS_7

DDR_DQS_6

DDR_DQS_5

DDR_DQS_4

DDR_DQS_3

DDR_DQS_2

DDR_DQS_1

DDR_DQS_0

DDR_DM_7

DDR_DM_6

DDR_DM_5

DDR_DM_4

DDR_DM_3

DDR_DM_2

DDR_DM_1

DDR_DM_0

DDRRAS DDRCAS

DDRWE DDRCKE0 DDRCKE1 DDRCKE2 DDRCKE3

DDR_MCLK_0_P DDR_MCLK_0_N DDR_MCLK_1_P DDR_MCLK_1_N DDR_MCLK_2_P DDR_MCLK_2_N DDR_MCLK_3_P DDR_MCLK_3_N DDR_MCLK_4_P DDR_MCLK_4_N DDR_MCLK_5_P DDR_MCLK_5_N

DDR_REF

DDR_SELHI_0 DDR_SELHI_1 DDR_SELLO_0 DDR_SELLO_1

MEMORY

DDR

INTERFACE

DDR_A_10 DDR_A_11 DDR_A_12

DDR_A_9

DDR_A_8

DDR_A_7

DDR_A_6

DDR_A_5

DDR_A_4

DDR_A_3

DDR_A_2

DDR_A_1

DDR_A_0

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

TABLE_5_ITEM

PINS ARE SWAPABLE FOR RPAKS

1MB BOOT ROM

INT - DDR/BOOTROM

CS

CKE

ADDR

BA

CNTL

’0’S ARE SAME POLARITY (ACTIVE-LO) ’1’S ARE SAME POLARITY (ACTIVE-HI)

’0’ & ’1’ GO TO SLOT A ’2’ & ’3’ GO TO SLOT B

MEM_VREF

after 2.5V I/O to Intrepid shuts off.

Weak pulldowns ensure CKEs stay low

SERIES RESISTORS FOR CLOCK/CONTROL SIGNALS

CLOCKS

INTERCEPTS ROM CHIP SELECT

OVERRIDE ROM MODULE

2

1

R260

INT_2_5V_COLD

10K

5% 1/16W MF 402

2

1

R265

INT_2_5V_COLD

402

MF

1/16W

5%

10K

12

9

11 3130

10

24

3923

35

34

33

32

28

27

26

25

22

7

8

14

15

16

17

18

38

19

37

13

40

1

2

3

4

5

6

36

20

21

U11

TSOP

1MX8-3.3V

OMIT

21

R1

NO STUFF

5%

0

1/16W

402

MF

21

R271

NO STUFF

5%

1/16W

MF

402

0

21

R194

NO STUFF

MF

1/16W

5%

0

402

2

1

R236

5%

0

1/16W 402

MF

NO STUFF

21

R176

22

5%

1/16W

MF

402

2

1

R209

1K

1% MF

402

1/16W

2

1

R208

10K

1%

1/16W

MF

402

2

1

C249

0.1uF

20% 10V

CERM

402

2

1

R202

10K

402

MF

1/16W

1%

2

1

C125

2.2uF

20% 805

CERM

10V

2

1

C773

402

CERM

10V

20%

0.1uF

2

1

C122

402

CERM

10V

20%

0.1uF

2

1

R112

5%

10K

1/16W

MF

402

+3V_MAIN

T22

Y22

T32

N30

AE29

AB32

AA22

W35 W36

V33 V32

W32 W33

Y30 W30

Y35 Y36

Y32 Y33

L32

N29

P32

V30

AB30

AD32

AH31

AJ31

L33

N32

T33

T35

AC35

AD33

AH33

AJ33

AG35

AG33

AJ36

K35

K36

J36

K33

AJ35

K32

J35

J33

J32

M30

N33

L36

M33

M35

L35

AJ32

M36

N35

R32

R33

R35

R36

P36

P35

R30

P33

AK36

T36

U35

U36

T30

V35

U32

U33

V36

AB33

AA32

AK35

AC36

AB35

AB36

AA33

AA35

AA36

AD35

AD36

AE33

AE35

AK31

AE36

AF36

AF35

AE32

AG31

AG32

AH32

AH36

AG36

AH35

AK33

AK32

M29

L30

H36

D36

G32

E36

E35

F35

F36

G36

D35

H33

G33

G35

H35

K30

L29

AL33

AL35

AN36

AN34

AL36

AM36

AM35

AN35

H32

U51

CRITICAL

INTREPID-REV2.1

BGA

OMIT

2

1

R691

402

MF

10K

5% 1/16W

21

R674

5%

1K

402

MF

1/16W

54

RP20

22

5%

1/16W

SM1

63

RP20

SM1

5%

22

1/16W

81

RP22

22

5%

1/16W

SM1

72

RP22

SM1

22

5%

1/16W

72

RP20

SM1

1/16W

5%

22

63

RP22

SM1

1/16W

5%

22

21

R162

22

402

MF

1/16W

5%

81

RP20

SM1

1/16W

5%

22

54

RP22

SM1

1/16W

5%

22

63

RP31

22

1/16W

5%

SM1

63

RP29

1/16W

5%

22

SM1

72

RP31

1/16W

5%

22

SM1

81

RP31

22

5%

1/16W

SM1

54

RP31

22

5%

1/16W

SM1

54

RP29

1/16W

5%

22

SM1

81

RP29

22

5%

1/16W

SM1

72

RP29

22

5%

1/16W

SM1

63

RP14

1/16W

5%

22

SM1

72

RP12

1/16W

5%

22

SM1

81

RP12

1/16W

5%

22

SM1

63

RP12

22

5%

1/16W

SM1

54

RP12

SM1

1/16W

5%

22

72

RP9

22

5%

1/16W

SM1

81

RP9

22

5%

1/16W

SM1

72

RP14

22

5%

1/16W

SM1

54

RP9

22

5%

1/16W

SM1

81

RP14

22

5%

1/16W

SM1

54

RP14

22

5%

1/16W

SM1

54

RP17

22

5%

1/16W

SM1

63

RP9

SM1

1/16W

5%

22

81

RP17

SM1

5%

22

1/16W

72

RP17

22

5%

SM1

1/16W

63

RP17

SM1

1/16W

5%

22

+3V_MAIN

2

1

R247

INT_2_5V_COLD

402

MF

1/16W

5%

10K

2

1

R257

INT_2_5V_COLD

402

MF

1/16W

5%

10K

44

9

B

051-6809

341S1542

IC,BootRom Q16A

CRITICAL

U11

1 ?

RAM_CKE<0>

MEM_ADDR<8>

ROM_CS_L

ROM_ONBOARD_CS_L

ROM_WP_L

ROM_RW_L

PCI_AD<20>

PCI_AD<19>

PCI_AD<18>

ROM_RW_TP_L

INT_RESET_L

PCI_AD<1>

PCI_AD<31>

PCI_AD<0>

PCI_AD<4> PCI_AD<5> PCI_AD<6>

PCI_AD<2>

SYSCLK_DDRCLK_B0_L

PCI_AD<3>

SYSCLK_DDRCLK_B1_L

SYSCLK_DDRCLK_A0_L_UF

PCI_AD<24>

PCI_AD<9> PCI_AD<10>

PCI_AD<25>

RAM_CS_L<2>

RAM_CS_L<3>

MEM_CS_L<2>

MEM_ADDR<3>

SYSCLK_DDRCLK_B1_UF

SYSCLK_DDRCLK_B0_UF

MEM_ADDR<6> MEM_ADDR<7>

SYSCLK_DDRCLK_B1_L_UF

ROM_CS_TP_L

MEM_CKE<0>

MEM_CS_L<1>

MEM_ADDR<12>

ROM_ONBOARD_CS_TP_L

RAM_CKE<2>

MEM_CS_L<0>

SYSCLK_DDRCLK_A0_L

RAM_CKE<1>

RAM_CKE<3>

RAM_CKE<0>

+2_5V_INTREPID

MEM_DATA<52>

MEM_DATA<51>

MEM_DATA<50>

MEM_DATA<48>

MEM_DATA<46>

MEM_DATA<44>

MEM_DATA<39>

MEM_DATA<38>

MEM_DATA<37>

MEM_ADDR<9>

SYSCLK_DDRCLK_A1_UF

MEM_ADDR<0>

MEM_ADDR<2>

MEM_ADDR<6>

MEM_ADDR<8>

MEM_ADDR<9>

MEM_ADDR<10>

MEM_ADDR<12>

MEM_BA<0>

MEM_ADDR<11>

MEM_BA<1>

RAM_ADDR<7>

RAM_ADDR<6>

RAM_CS_L<0>

INT_MEM_VREF

MEM_ADDR<11>

MEM_ADDR<10>

MEM_ADDR<5>

MEM_ADDR<4>

MEM_ADDR<2>

MEM_ADDR<1>

MEM_ADDR<0>

MEM_MUXSEL_LSB

MEM_MUXSEL_MSB_L_TP

INT_MEM_REF_H

INT_DDRCLK5_P_TP INT_DDRCLK5_N_TP

SYSCLK_DDRCLK_B1_L_UF

SYSCLK_DDRCLK_B1_UF

SYSCLK_DDRCLK_B0_L_UF

INT_DDRCLK2_N_TP

SYSCLK_DDRCLK_B0_UF

INT_DDRCLK2_P_TP

SYSCLK_DDRCLK_A1_UF SYSCLK_DDRCLK_A1_L_UF

SYSCLK_DDRCLK_A0_L_UF

SYSCLK_DDRCLK_A0_UF

MEM_CKE<3>

MEM_CKE<2>

MEM_CKE<1>

MEM_CKE<0>

MEM_WE_L

MEM_CAS_L

MEM_RAS_L

MEM_DQM<7>

MEM_DQM<6>

MEM_DQM<5>

MEM_DQM<4>

MEM_DQM<3>

MEM_DQM<1>

MEM_DQM<0>

MEM_DQM<2>

MEM_DQS<7>

MEM_DQS<6>

MEM_DQS<5>

MEM_DQS<4>

MEM_DQS<3>

MEM_DQS<1>

MEM_DQS<0>

MEM_CS_L<2>

MEM_CS_L<0>

MEM_CS_L<3>

MEM_BA<1>

MEM_BA<0>

MEM_DATA<54>

MEM_DATA<31>

MEM_DATA<29>

MEM_DATA<25>

MEM_DATA<24>

MEM_DATA<15>

MEM_DATA<63>

MEM_DATA<62>

MEM_DATA<61>

MEM_DATA<60>

MEM_DATA<59>

MEM_DATA<58>

MEM_DATA<57>

MEM_DATA<56>

MEM_DATA<55>

MEM_DATA<53>

MEM_DATA<49>

MEM_DATA<47>

MEM_DATA<45>

MEM_DATA<43>

MEM_DATA<42>

MEM_DATA<41>

MEM_DATA<40>

MEM_DATA<36>

MEM_DATA<35>

MEM_DATA<34>

MEM_DATA<33>

MEM_DATA<32>

MEM_DATA<30>

MEM_DATA<28>

MEM_DATA<27>

MEM_DATA<26>

MEM_DATA<23>

MEM_DATA<22>

MEM_DATA<21>

MEM_DATA<20>

MEM_DATA<19>

MEM_DATA<18>

MEM_DATA<17>

MEM_DATA<16>

MEM_DATA<14>

MEM_DATA<13>

MEM_DATA<12>

MEM_DATA<11>

MEM_DATA<10>

MEM_DATA<9>

MEM_DATA<8>

MEM_DATA<7>

MEM_DATA<6>

MEM_DATA<5>

MEM_DATA<4>

MEM_DATA<3>

MEM_DATA<2>

MEM_DATA<1>

MEM_DATA<0>

MEM_MUXSEL_LSB_L_TP

MEM_MUXSEL_MSB

SYSCLK_DDRCLK_A1

SYSCLK_DDRCLK_A0_UF

SYSCLK_DDRCLK_A0

SYSCLK_DDRCLK_A1_L_UF

SYSCLK_DDRCLK_A1_L

SYSCLK_DDRCLK_B1

SYSCLK_DDRCLK_B0

MEM_CS_L<3>

MEM_CKE<1>

MEM_CKE<3>

RAM_ADDR<0>

MEM_ADDR<4> RAM_ADDR<4>

MEM_ADDR<1> RAM_ADDR<1>

MEM_ADDR<3>

MEM_ADDR<5> RAM_ADDR<5>

MEM_ADDR<7>

RAM_ADDR<8>

RAM_ADDR<10>

RAM_ADDR<12>

RAM_ADDR<9>

RAM_ADDR<11>

RAM_BA<0>

RAM_CAS_LMEM_CAS_L

MEM_WE_L RAM_WE_L

RAM_RAS_LMEM_RAS_L

RAM_BA<1>

MEM_DQS<2>

RAM_CKE<2>

RAM_CKE<1>

RAM_CKE<3>

RAM_ADDR<2>

RAM_ADDR<3>

PCI_AD<30>

PCI_AD<29>

PCI_AD<28>

PCI_AD<27>

PCI_AD<26>

PCI_AD<8>

PCI_AD<7>

PCI_AD<17>

PCI_AD<16>

PCI_AD<15>

PCI_AD<14>

PCI_AD<13>

PCI_AD<12>

PCI_AD<11>

SYSCLK_DDRCLK_B0_L_UF

INT_MEM_VREF

ROM_OE_TP_L

ROM_OE_L

RAM_CS_L<1>MEM_CS_L<1>

MEM_CKE<2>

39

37

24

38

24

35

18

35

16

35

18

11

35

39

17

29

17

35

17

35

17

35

11

35

11

15

35

38

35

35 35

35

35 35

35

35 35

35

35 35

35

11

35

17

35

38

39

35 35

35

9

12 39

12

24

13

12

11

12

11

9

12

11

9

24

9

24

9

11

9

10

9

11

9

10

38

9

10

9

10

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

10

9

11

12

9

24

12

11

9

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

GND

DA10

SEL

DH19

DH18

DH17

DH16

DH15

DH14

DH13

DH12

DH11

DH10

DH9

DH8

DH7

DH6

DH5

DH4

DH3

DH2

DH1

DH0

DA19

DA18

DA17

DA16

DA15

DA14

DA13

DA12

DA11DB0*

DA9

DA8

DA7

DA6

DA5

DA4

DA3

DA2

DA1

DA0

DB19*

DB18*

DB17*

DB16*

DB15*

DB14*

DB13*

DB12*

DB11*

DB10*

DB9*

DB8*

DB7*

DB6*

DB5*

DB4*

DB3*

DB2*

DB1*

VDD

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

SEL = HIGH; HOST = A PORT; B PORT = 100OHM TO GND

SEL = LOW; HOST = B PORT; A PORT = 100OHM TO GND

BIT 0..15

BIT 16..31

BIT 32..47 BIT 48..63

16BIT 2:1 DDR MUXES

2

1

C727

20% 10V CERM 402

0.1uF

2

1

C745

402

CERM

10V

20%

0.1uF

2

1

C742

20% 10V CERM 402

0.1uF

2

1

C732

20% 10V CERM 402

0.1uF

2

1

C733

402

CERM

10V

20%

0.1uF

2

1

C741

20% 10V CERM 402

0.1uF

2

1

C764

402

CERM

10V

20%

0.1uF

2

1

C734

20% 10V CERM 402

0.1uF

2

1

C726

402

CERM

10V

20%

0.1uF

2

1

C730

20% 10V CERM 402

0.1uF

2

1

C758

20% 10V CERM 402

0.1uF

2

1

C757

20% 10V CERM 402

0.1uF

F8F3E8

E3

H6H5G9G2D9D2C6

C5

E2

C2

B2

B3

B5

B6

B8

B9

C9

E9

F9

H9

J9

J8

J6

J5

J3

J2

H2

F2

E1

C1

A1

A3

A4

A6

B7

A9

B10

D10

F10

H10

K10

K8

K7

K5

J4

K2

J1

G1

D1

B1

A2

B4

A5

A7

A8

A10

C10

E10

G10

J10

K9

J7

K6

K4

K3

K1

H1

F1

U28

CRITICAL

BGA

CBTV4020

F8F3E8

E3

H6H5G9G2D9D2C6

C5

E2

C2

B2

B3

B5

B6

B8

B9

C9

E9

F9

H9

J9

J8

J6

J5

J3

J2

H2

F2

E1

C1

A1

A3

A4

A6

B7

A9

B10

D10

F10

H10

K10

K8

K7

K5

J4

K2

J1

G1

D1

B1

A2

B4

A5

A7

A8

A10

C10

E10

G10

J10

K9

J7

K6

K4

K3

K1

H1

F1

U27

CRITICAL

BGA

CBTV4020

F8F3E8

E3

H6H5G9G2D9D2C6

C5

E2

C2

B2

B3

B5

B6

B8

B9

C9

E9

F9

H9

J9

J8

J6

J5

J3

J2

H2

F2

E1

C1

A1

A3

A4

A6

B7

A9

B10

D10

F10

H10

K10

K8

K7

K5

J4

K2

J1

G1

D1

B1

A2

B4

A5

A7

A8

A10

C10

E10

G10

J10

K9

J7

K6

K4

K3

K1

H1

F1

U18

CBTV4020

BGA

CRITICAL

F8F3E8

E3

H6H5G9G2D9D2C6

C5

E2

C2

B2

B3

B5

B6

B8

B9

C9

E9

F9

H9

J9

J8

J6

J5

J3

J2

H2

F2

E1

C1

A1

A3

A4

A6

B7

A9

B10

D10

F10

H10

K10

K8

K7

K5

J4

K2

J1

G1

D1

B1

A2

B4

A5

A7

A8

A10

C10

E10

G10

J10

K9

J7

K6

K4

K3

K1

H1

F1

U16

CBTV4020

BGA

CRITICAL

4410

051-6809

B

RAM_DATA_B<0> RAM_DATA_B<1> RAM_DATA_B<2>

RAM_DATA_B<10>

RAM_DATA_B<9>

RAM_DATA_B<8>

RAM_DQM_B<0>

RAM_DQS_B<0>

RAM_DATA_B<4>

RAM_DATA_B<3>

RAM_DATA_B<7>

RAM_DATA_B<6>

RAM_DATA_B<5>

RAM_DQM_B<1>

RAM_DQS_B<1>

RAM_DATA_B<15>

RAM_DATA_B<14>

RAM_DATA_B<12>

RAM_DATA_B<11>

RAM_DATA_A<10> RAM_DATA_A<11>

RAM_DATA_A<13>

RAM_DATA_A<12>

RAM_DATA_A<15>

RAM_DATA_A<14>

RAM_DQS_A<1>

MEM_DATA<0>

RAM_DQM_A<1>

MEM_DATA<3>

MEM_DATA<1> MEM_DATA<2>

MEM_DATA<4>

MEM_DQS<0>

MEM_DATA<6>

MEM_DQM<0>

MEM_DATA<8>

MEM_DATA<11>

MEM_DATA<10>

MEM_DATA<9>

MEM_DATA<13>

MEM_DATA<12>

MEM_DATA<14>

MEM_DQS<1>

MEM_DATA<15>

MEM_MUXSEL_LSB

RAM_DQM_A<0>

RAM_DQS_A<0>

RAM_DATA_A<7>

RAM_DATA_A<6>

RAM_DATA_A<4> RAM_DATA_A<5>

RAM_DATA_A<1>

RAM_DATA_A<3>

RAM_DATA_A<2>

RAM_DATA_A<0>

RAM_DATA_A<8>

MEM_DQM<1>

RAM_DATA_A<9>

RAM_DATA_B<16> RAM_DATA_B<17> RAM_DATA_B<18>

RAM_DATA_B<26>

RAM_DATA_B<24>

RAM_DQM_B<2>

RAM_DQS_B<2>

RAM_DATA_B<20>

RAM_DATA_B<19>

RAM_DATA_B<23>

RAM_DATA_B<22>

RAM_DATA_B<21>

RAM_DQM_B<3>

RAM_DQS_B<3>

RAM_DATA_B<31>

RAM_DATA_B<30>

RAM_DATA_B<29>

RAM_DATA_B<28>

RAM_DATA_B<27>

RAM_DATA_A<26> RAM_DATA_A<27>

RAM_DATA_A<29>

RAM_DATA_A<28>

RAM_DATA_A<31>

RAM_DATA_A<30>

RAM_DQS_A<3>

MEM_DATA<16>

RAM_DQM_A<3>

MEM_DATA<19>

MEM_DATA<17> MEM_DATA<18>

MEM_DATA<21>

MEM_DATA<20>

MEM_DQS<2>

MEM_DATA<22> MEM_DATA<23>

MEM_DQM<2>

MEM_DATA<24>

MEM_DATA<27>

MEM_DATA<26>

MEM_DATA<25>

MEM_DATA<29>

MEM_DATA<28>

MEM_DATA<30>

MEM_MUXSEL_LSB

RAM_DQM_A<2>

RAM_DQS_A<2>

RAM_DATA_A<23>

RAM_DATA_A<22>

RAM_DATA_A<20> RAM_DATA_A<21>

RAM_DATA_A<17>

RAM_DATA_A<19>

RAM_DATA_A<18>

RAM_DATA_A<16>

RAM_DATA_A<24>

MEM_DQM<3>

RAM_DATA_A<25>

RAM_DATA_B<32> RAM_DATA_B<33> RAM_DATA_B<34>

RAM_DATA_B<42>

RAM_DATA_B<41>

RAM_DATA_B<40>

RAM_DQM_B<4>

RAM_DQS_B<4>

RAM_DATA_B<36>

RAM_DATA_B<35>

RAM_DATA_B<39>

RAM_DATA_B<38>

RAM_DATA_B<37>

RAM_DQM_B<5>

RAM_DQS_B<5>

RAM_DATA_B<46>

RAM_DATA_B<44>

RAM_DATA_B<43>

RAM_DATA_A<42> RAM_DATA_A<43>

RAM_DATA_A<45>

RAM_DATA_A<44>

RAM_DATA_A<47>

RAM_DATA_A<46>

RAM_DQS_A<5>

MEM_DATA<32>

RAM_DQM_A<5>

MEM_DATA<35>

MEM_DATA<33> MEM_DATA<34>

MEM_DATA<37>

MEM_DATA<36>

MEM_DQS<4>

MEM_DATA<38> MEM_DATA<39>

MEM_DQM<4>

MEM_DATA<40>

MEM_DATA<43>

MEM_DATA<42>

MEM_DATA<41>

MEM_DATA<45>

MEM_DATA<44>

MEM_DATA<46>

MEM_DQS<5>

MEM_DATA<47>

MEM_MUXSEL_MSB

RAM_DQM_A<4>

RAM_DQS_A<4>

RAM_DATA_A<39>

RAM_DATA_A<38>

RAM_DATA_A<36> RAM_DATA_A<37>

RAM_DATA_A<33>

RAM_DATA_A<35>

RAM_DATA_A<34>

RAM_DATA_A<32>

RAM_DATA_A<40>

MEM_DQM<5>

RAM_DATA_A<41> RAM_DATA_B<48>

RAM_DATA_B<49> RAM_DATA_B<50>

RAM_DATA_B<58>

RAM_DATA_B<57>

RAM_DATA_B<56>

RAM_DQM_B<6>

RAM_DQS_B<6>

RAM_DATA_B<52>

RAM_DATA_B<51>

RAM_DATA_B<55>

RAM_DATA_B<54>

RAM_DATA_B<53>

RAM_DQM_B<7>

RAM_DQS_B<7>

RAM_DATA_B<63>

RAM_DATA_B<62>

RAM_DATA_B<61>

RAM_DATA_B<60>

RAM_DATA_B<59>

RAM_DATA_A<58> RAM_DATA_A<59>

RAM_DATA_A<61>

RAM_DATA_A<60>

RAM_DATA_A<63>

RAM_DATA_A<62>

RAM_DQS_A<7>

MEM_DATA<48>

RAM_DQM_A<7>

MEM_DATA<51>

MEM_DATA<49> MEM_DATA<50>

MEM_DATA<53>

MEM_DATA<52>

MEM_DQS<6>

MEM_DATA<54> MEM_DATA<55>

MEM_DQM<6>

MEM_DATA<56>

MEM_DATA<59>

MEM_DATA<58>

MEM_DATA<57>

MEM_DATA<61>

MEM_DATA<60>

MEM_DATA<62>

MEM_DQS<7>

MEM_DATA<63>

MEM_MUXSEL_MSB

RAM_DQM_A<6>

RAM_DQS_A<6>

RAM_DATA_A<55>

RAM_DATA_A<54>

RAM_DATA_A<52> RAM_DATA_A<53>

RAM_DATA_A<49>

RAM_DATA_A<51>

RAM_DATA_A<50>

RAM_DATA_A<48>

RAM_DATA_A<56>

MEM_DQM<7>

RAM_DATA_A<57>

+2_5V_INTREPID

+2_5V_INTREPID+2_5V_INTREPID

MEM_DATA<7>

MEM_DATA<5>

RAM_DATA_B<47>

RAM_DATA_B<45>

RAM_DATA_B<25>

MEM_DATA<31>

MEM_DQS<3>

RAM_DATA_B<13>

38

38 38

16

16 16

35

35 35

15

15 15

35

10

35

10

35

10

35

35 35

35

10

35

10

10 10

35

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11

9

11 11

11

9

11

9

11

9

11

9

9 9

9

11

9

11

DQ58

RFU18

KEY

VDD6 VSS6 VSS8

VDD5

DQ15

DQ13

DQ14

VSS5

DM1

VDD3

VSS3

DQ7

DQ12

DQ6

DM0

DQ4 DQ5

VSS1

VREF1

VDD1

SA1 SA2

RFU19

SA0

VDD32

DQ63

DQ62

VSS32

DQ61

VDD30

DQ60

DQ55

DM7

VSS30

DQ54

DM6

VDD28

DQ53

DQ52

VDD25

CK1*

CK1

VSS28

DQ47

DQ46

VDD23

VSS25

DM5

DQ45

DQ44

DM4

DQ39

VSS23

DQ38

DQ37

RFU17

DQ36

VSS21

VDD21

VDD19

RAS*

BA1

CAS*

S1*

A6 A4 A2 A0

VSS19

A8

A11

VDD17

RFU15

CKE0

VDD15

VSS17

RFU11 VSS16

RFU9

VDD14

RFU3

VSS14

RFU5 RFU7

RFU1

VDD12

VSS12

DM3

DQ31

DQ30

DQ29

VSS10

VDD10

DQ28

DQ23

DM2

DQ20

VDD8

DQ21

DQ22

VDDSPD

SCL

SDA

VDD31

VSS31

DQ59

DQS7

DQ51

VDD29

DQ56

VSS29

DQ57

DQ48

DQS6

VDD27

DQ49

DQ50

DQ43

VSS26

VDD26

VDD24

VSS27

DQ41 DQS5 VSS24

VDD22

DQ42

DQ34 VSS22 DQ35

DQS4

DQ40

VDD20

RFU16

DQ32

VSS20

DQ33

S0*

VDD18

BA0

A10_AP

WE*

A1

A5 A3

A9

A7

VSS18

CKE1 RFU14

RFU13 VDD16

VDD13

VSS15

RFU10

RFU8

RFU12

RFU0

RFU4

VSS13

RFU2

RFU6

VSS11 DQ26 DQ27

DQS3

VDD11

DQ19 DQ24 VDD9

VSS9

DQ25

DQ18

DQ16

VDD7

DQ17

DQS2

DQ11 VDD4

VSS7

CK0*

CK0

DQS1 VSS4 DQ10

VDD2 DQ9

DQ2

DQS0

DQ8

DQ3

VSS2

VDD0

DQ0 DQ1

VSS0

VREF0

A12

(1 OF 2)(2 OF 2)

DQ58

RFU18

KEY

VDD6 VSS6 VSS8

VDD5

DQ15

DQ13

DQ14

VSS5

DM1

VDD3

VSS3

DQ7

DQ12

DQ6

DM0

DQ4 DQ5

VSS1

VREF1

VDD1

SA1 SA2

RFU19

SA0

VDD32

DQ63

DQ62

VSS32

DQ61

VDD30

DQ60

DQ55

DM7

VSS30

DQ54

DM6

VDD28

DQ53

DQ52

VDD25

CK1*

CK1

VSS28

DQ47

DQ46

VDD23

VSS25

DM5

DQ45

DQ44

DM4

DQ39

VSS23

DQ38

DQ37

RFU17

DQ36

VSS21

VDD21

VDD19

RAS*

BA1

CAS*

S1*

A6 A4 A2 A0

VSS19

A8

A11

VDD17

RFU15

CKE0

VDD15

VSS17

RFU11 VSS16

RFU9

VDD14

RFU3

VSS14

RFU5 RFU7

RFU1

VDD12

VSS12

DM3

DQ31

DQ30

DQ29

VSS10

VDD10

DQ28

DQ23

DM2

DQ20

VDD8

DQ21

DQ22

VDDSPD

SCL

SDA

VDD31

VSS31

DQ59

DQS7

DQ51

VDD29

DQ56

VSS29

DQ57

DQ48

DQS6

VDD27

DQ49

DQ50

DQ43

VSS26

VDD26

VDD24

VSS27

DQ41 DQS5 VSS24

VDD22

DQ42

DQ34 VSS22 DQ35

DQS4

DQ40

VDD20

RFU16

DQ32

VSS20

DQ33

S0*

VDD18

BA0

A10_AP

WE*

A1

A5 A3

A9

A7

VSS18

CKE1 RFU14

RFU13 VDD16

VDD13

VSS15

RFU10

RFU8

RFU12

RFU0

RFU4

VSS13

RFU2

RFU6

VSS11 DQ26 DQ27

DQS3

VDD11

DQ19 DQ24 VDD9

VSS9

DQ25

DQ18

DQ16

VDD7

DQ17

DQS2

DQ11 VDD4

VSS7

CK0*

CK0

DQS1 VSS4 DQ10

VDD2 DQ9

DQ2

DQS0

DQ8

DQ3

VSS2

VDD0

DQ0 DQ1

VSS0

VREF0

A12

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

NCNC

NC NC

NCNC

on the PCB for additional mounting

NOTE: The SODIMM connector footprint has a through-hole slot

NC NC

NC

ADDR=0XA0(WR)/0XA1(RD)

NC

NC NC

NC

SLOT "A" LOWER SLOT

FACTORY SLOT

NC

ADDR=0XA2(WR)/0XA3(RD)

SLOT "B" UPPER SLOT

CUSTOMER SLOT

NC

NC NC

NC

NC NC

NC

DDR SODIMM CONNS

SLOT "B"

SLOT "A"

DDR BYPASS

DDR VREF

ONE 0.1UF PER SLOT

2

1

C140

CERM 402

10V

20%

0.1uF

2

1

C156

CERM 402

10V

20%

0.1uF

2

1

C132

20% CERM

402

10V

0.1uF

119B

51B

40B39B

38B

28B27B

16B

186B185B

174B

15B

173B

162B161B

159B

150B149B

138B137B

126B125B

4B

104B103B

90B

88B87B

76B75B

64B63B

52B

3B

2B1B

197B

57B

46B45B

36B

34B33B

22B

192B191B

180B

21B

179B

168B167B

157B

156B155B

144B143B

132B131B

10B

114B113B

94B93B

92B

82B81B

70B69B

58B

9B

193B 195B

198B

196B

194B

122B121B

84B83B

80B79B

78B77B

74B73B

72B

200B199B

124B123B

98B97B

91B

89B

86B85B

71B

118B

402

401

183B

169B

147B

133B

61B

47B

25B

11B

23B

19B

18B

14B

190B

188B

182B

178B

8B

189B

187B

181B

177B

176B

172B

166B

164B

175B

171B

6B

165B

163B

154B

152B

146B

142B

153B

151B

145B

141B

17B

140B

136B

130B

128B

139B

135B

129B

127B

68B

66B

13B

60B

56B

67B

65B

59B

55B

54B

50B

44B

42B

7B

53B

49B

43B

41B

32B

30B

24B

20B

31B

29B

5B

184B

170B

148B

134B

62B

48B

26B

12B

95B 96B

158B 160B

37B

35B

120B

116B

117B

101B 102B

105B 106B 107B 108B 109B 110B 111B

99B

100B

115B

112B

J25

DDR-SO-DIMM-DUAL

F-RT-SM

CRITICAL

119A

51A

40A39A

38A

28A27A

16A

186A185A

174A

15A

173A

162A161A

159A

150A149A

138A137A

126A125A

4A

104A103A

90A

88A87A

76A75A

64A63A

52A

3A

2A1A

197A

57A

46A45A

36A

34A33A

22A

192A191A

180A

21A

179A

168A167A

157A

156A155A

144A143A

132A131A

10A

114A113A

94A93A

92A

82A81A

70A69A

58A

9A

193A 195A

198A

196A

194A

122A121A

84A83A

80A79A

78A77A

74A73A

72A

200A199A

124A123A

98A97A

91A

89A

86A85A

71A

118A

404

403

183A

169A

147A

133A

61A

47A

25A

11A

23A

19A

18A

14A

190A

188A

182A

178A

8A

189A

187A

181A

177A

176A

172A

166A

164A

175A

171A

6A

165A

163A

154A

152A

146A

142A

153A

151A

145A

141A

17A

140A

136A

130A

128A

139A

135A

129A

127A

68A

66A

13A

60A

56A

67A

65A

59A

55A

54A

50A

44A

42A

7A

53A

49A

43A

41A

32A

30A

24A

20A

31A

29A

5A

184A

170A

148A

134A

62A

48A

26A

12A

95A 96A

158A 160A

37A

35A

120A

116A

117A

101A 102A

105A 106A 107A 108A 109A 110A 111A

99A

100A

115A

112A

J25

DDR-SO-DIMM-DUAL

F-RT-SM

CRITICAL

2

1

C404

805

CERM

6.3V

20%

10uF

2

1

C128

805

CERM

6.3V

20%

10uF

2

1

R299

1K

1% 1/16W MF 402

2

1

R303

402

MF

1/16W

1%

1K

2

1

C397

20% 10V CERM 402

0.1uF

2

1

C403

402

CERM

10V

20%

0.1uF

+2_5V_MAIN+2_5V_MAIN

+2_5V_MAIN

+2_5V_MAIN+2_5V_MAIN

+3V_MAIN +3V_MAIN

+3V_MAIN

2

1

C169

0.1uF

20% 10V

402

CERM

2

1

C391

20% CERM

402

10V

0.1uF

2

1

C356

0.1uF

10V 402

CERM

20%

2

1

C211

CERM 402

10V

20%

0.1uF

2

1

C127

CERM 402

10V

20%

0.1uF

+2_5V_MAIN

2

1

C174

20%

6.3V CERM 805

10uF

2

1

C150

0.1uF

10V 402

CERM

20%

2

1

C157

20%

6.3V CERM 805

10uF

2

1

C383

CERM 402

10V

20%

0.1uF

4411

B

051-6809

RAM_DATA_B<37>

RAM_DATA_B<63>

RAM_DATA_B<62>

RAM_DQM_B<7>

RAM_DATA_B<61>

RAM_DATA_B<60>

RAM_DATA_B<55>

RAM_DATA_B<54>

RAM_DQM_B<6>

RAM_DATA_B<53>

RAM_DATA_B<52>

SYSCLK_DDRCLK_B1

SYSCLK_DDRCLK_B1_L

RAM_DATA_B<47>

RAM_DATA_B<46>

RAM_DQM_B<5>

RAM_DATA_B<45>

RAM_DATA_B<44>

RAM_DATA_B<39>

RAM_DATA_B<38>

RAM_DQM_B<4>

RAM_DATA_B<36>

RAM_CS_L<3>

RAM_CAS_L

RAM_RAS_L

RAM_BA<1>

RAM_ADDR<0>

RAM_ADDR<2>

RAM_ADDR<4>

RAM_ADDR<6>

RAM_ADDR<8>

RAM_ADDR<11>

RAM_CKE<2>

RAM_DATA_B<31>

RAM_DATA_B<30>

RAM_DQM_B<3>

RAM_DATA_B<29>

RAM_DATA_B<28>

RAM_DATA_B<22>

RAM_DQM_B<2>

RAM_DATA_B<21>

RAM_DATA_B<20>

RAM_DATA_B<15>

RAM_DATA_B<14>

RAM_DQM_B<1>

RAM_DATA_B<13>

RAM_DATA_B<12>

RAM_DATA_B<7>

RAM_DATA_B<6>

RAM_DQM_B<0>

RAM_DATA_B<5>

RAM_DATA_B<4>

DDR_VREF

INT_I2C_CLK0

INT_I2C_DATA0

RAM_DATA_B<59>

RAM_DATA_B<58>

RAM_DQS_B<7>

RAM_DATA_B<57>

RAM_DATA_B<56>

RAM_DATA_B<51>

RAM_DATA_B<50>

RAM_DQS_B<6>

RAM_DATA_B<49>

RAM_DATA_B<48>

RAM_DATA_B<43>

RAM_DATA_B<42>

RAM_DQS_B<5>

RAM_DATA_B<41>

RAM_DATA_B<40>

RAM_DATA_B<35>

RAM_DATA_B<34>

RAM_DQS_B<4>

RAM_DATA_B<33>

RAM_DATA_B<32>

RAM_CS_L<2>

RAM_WE_L

RAM_BA<0>

RAM_ADDR<10>

RAM_ADDR<1>

RAM_ADDR<3>

RAM_ADDR<5>

RAM_ADDR<7>

RAM_ADDR<9>

RAM_ADDR<12>

RAM_CKE<3>

RAM_DATA_B<27>

RAM_DATA_B<26>

RAM_DQS_B<3>

RAM_DATA_B<25>

RAM_DATA_B<24>

RAM_DATA_B<19>

RAM_DATA_B<18>

RAM_DQS_B<2>

RAM_DATA_B<17>

RAM_DATA_B<16>

SYSCLK_DDRCLK_B0_L

SYSCLK_DDRCLK_B0

RAM_DATA_B<11>

RAM_DATA_B<10>

RAM_DQS_B<1>

RAM_DATA_B<9>

RAM_DATA_B<8>

RAM_DATA_B<3>

RAM_DATA_B<2>

RAM_DQS_B<0>

RAM_DATA_B<1>

RAM_DATA_B<0>

DDR_VREF

RAM_DATA_B<23>

RAM_DATA_A<38>

RAM_DQM_A<4>

RAM_BA<1>

RAM_DATA_A<28>

RAM_DATA_A<15>

RAM_DATA_A<63>

RAM_DATA_A<62>

RAM_DQM_A<7>

RAM_DATA_A<61>

RAM_DATA_A<60>

RAM_DATA_A<55>

RAM_DATA_A<54>

RAM_DQM_A<6>

RAM_DATA_A<53>

RAM_DATA_A<52>

SYSCLK_DDRCLK_A1

SYSCLK_DDRCLK_A1_L

RAM_DATA_A<47>

RAM_DATA_A<46>

RAM_DQM_A<5>

RAM_DATA_A<45>

RAM_DATA_A<44>

RAM_DATA_A<39>

RAM_DATA_A<37>

RAM_DATA_A<36>

RAM_CS_L<1>

RAM_CAS_L

RAM_ADDR<0>

RAM_ADDR<2>

RAM_ADDR<4>

RAM_ADDR<6>

RAM_ADDR<8>

RAM_ADDR<11>

RAM_CKE<0>

RAM_DATA_A<31>

RAM_DATA_A<30>

RAM_DQM_A<3>

RAM_DATA_A<29>

RAM_DATA_A<23>

RAM_DQM_A<2>

RAM_DATA_A<21>

RAM_DATA_A<20>

RAM_DATA_A<14>

RAM_DQM_A<1>

RAM_DATA_A<13>

RAM_DATA_A<12>

RAM_DATA_A<7>

RAM_DATA_A<6>

RAM_DQM_A<0>

RAM_DATA_A<5>

RAM_DATA_A<4>

DDR_VREF

RAM_DATA_A<56>

RAM_DATA_A<50>

INT_I2C_CLK0

INT_I2C_DATA0

RAM_DATA_A<59>

RAM_DATA_A<58>

RAM_DQS_A<7>

RAM_DATA_A<57>

RAM_DATA_A<51>

RAM_DQS_A<6>

RAM_DATA_A<49>

RAM_DATA_A<48>

RAM_DATA_A<43>

RAM_DATA_A<42>

RAM_DQS_A<5>

RAM_DATA_A<41>

RAM_DATA_A<40>

RAM_DATA_A<35>

RAM_DATA_A<34>

RAM_DQS_A<4>

RAM_DATA_A<33>

RAM_DATA_A<32>

RAM_CS_L<0>

RAM_WE_L

RAM_BA<0>

RAM_ADDR<10>

RAM_ADDR<1>

RAM_ADDR<3>

RAM_ADDR<5>

RAM_ADDR<7>

RAM_ADDR<9>

RAM_ADDR<12>

RAM_CKE<1>

RAM_DATA_A<27>

RAM_DATA_A<26>

RAM_DQS_A<3>

RAM_DATA_A<25>

RAM_DATA_A<24>

RAM_DATA_A<19>

RAM_DATA_A<18>

RAM_DQS_A<2>

RAM_DATA_A<17>

RAM_DATA_A<16>

SYSCLK_DDRCLK_A0_L

SYSCLK_DDRCLK_A0

RAM_DATA_A<11>

RAM_DATA_A<10>

RAM_DQS_A<1>

RAM_DATA_A<9>

RAM_DATA_A<8>

RAM_DATA_A<3>

RAM_DATA_A<2>

RAM_DQS_A<0>

RAM_DATA_A<1>

RAM_DATA_A<0>

RAM_RAS_L

RAM_DATA_A<22>

DDR_VREF

39

23

35

13

35

13

35

11

35

38

11

35

11

35

38

35

11

35

11

35

38

35

11

35

11

35

11

35

38

10

9

10

9

10

11

6

10

9

10

9

10

11

10

9

10

9

10

9

10

11

10

6

10

9

10

9

10

9

10

11

(PLL4)

VDD15A_6

(PLL4) VSSA_6

ROM_WE

ROM_OE

PCI_STOP PCI_DEVSEL

PCI_CBE_3

PCI_CBE_2

PCI_CBE_1

PCI_CBE_0

ROM_CS

PCI_CLK_IN

PCI_CLK_OUT

PCI_CLK2

PCI_CLK1

PCI_CLK0

PCI_FRAME

PCI_PAR

PCI_TRDY PCI_IRDY

PCI_REQ_2

PCI_REQ_1

PCI_REQ_0

PCI_GNT_0 PCI_GNT_1 PCI_GNT_2

PCI/ROM

INTERFACE

PCIAD_31

PCIAD_30

PCIAD_28

PCIAD_27

PCIAD_26

PCIAD_25

PCIAD_29

PCIAD_19

PCIAD_18

PCIAD_17

PCIAD_16

PCIAD_15

PCIAD_23 PCIAD_24

PCIAD_20 PCIAD_21 PCIAD_22

PCIAD_14

(7 OF 9)

PCIAD_11

PCIAD_10

PCIAD_12 PCIAD_13

PCIAD_9

PCIAD_6

PCIAD_5

PCIAD_7 PCIAD_8

PCIAD_4

PCIAD_3

PCIAD_1 PCIAD_2

PCIAD_0

ROM_OVRLY_EN

VSSA_5 (PLL5)

(PLL5)

VDD15A_5

STP_AGP AGPPVT AGPVREF0 AGPVREF1

AGP_BUSY AGP_CLK AGP_FB_IN AGP_FB_OUT

AGPAD0

AGPREQ AGPGNT

AGP_SBA3

AGP_SBA2

AGP_SBA1

AGP_SBA0

AGPCBE_3

AGPFRAME

AGPTRDY AGPIRDY AGPSTOP

AGPDEVSEL

AGPPAR

AGPAD31

AGPAD30

AGPCBE_0 AGPCBE_1 AGPCBE_2

AGP_ST2

AGP_AD_STB0_P AGP_AD_STB0_N AGP_AD_STB1_P AGP_AD_STB1_N

AGPPIPE

AGPRBF

AGP_ST1

AGP_SBA7

AGP_SB_STB_P AGP_SB_STB_N

AGP_ST0

AGP_WBF

AGP

INTERFACES

AGP_SBA6

AGP_SBA5

AGP_SBA4

AGPAD29

AGPAD28

AGPAD27

AGPAD26

AGPAD25

AGPAD24

AGPAD23

AGPAD22

AGPAD21

AGPAD20

AGPAD19

AGPAD18

AGPAD17

AGPAD16

AGPAD15

AGPAD14

AGPAD13

AGPAD12

AGPAD11

AGPAD10

AGPAD9

AGPAD8

AGPAD7

AGPAD6

AGPAD5

AGPAD4

AGPAD3

AGPAD2

AGPAD1

(3 OF 9)

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

SIMPLY PROVIDING REFERENCE TO CHIP

NEC USB2 REQ REMAINS ON +3V_MAIN BECAUSE THIS CHIP IS POWERED DURING SLEEP

PCI FEEDBACK CLOCK MATCHES

PLACE NEAR INTREPID

LONGEST PCI CLOCK ROUTE

AGP_FB_CLK IS ROUTED THE SAME LENGTH AS CLK66M_GPU_AGP

Vout = AGPIO (1.5V)

INTREPID AGP/PCI

AGP PULL-UPS/PULL DOWNS

SERIES RESISTORS FOR BOOTROM CONTROL SIGNALS

PLACE CLOSE TO INTREPID SIDE

Vin = Vcore (1.5V)

AGP I/O REFERENCE

BECAUSE SINGLE AGP PWR PLANE AND CLOSE PROXIMITY OF CHIPS

NOTE: Designs using AGP slot should

PCI PULL-UPS

VOUT = 3.3V

VIN = 1.5V

(PLACE CLOSE TO INTREPID AGP BALLS)

use 52-ohm a resistor here.

21

R197

402

4.7

5%

1/16W

MF

21

R246

402

5%

1/16W

MF

0

2

1

R245

60.4

402

MF

1/16W

1%

63

RP34

SM1

1/16W

5%

10K

21

R167

MF

1/16W

5%

4.7

402

2

1

C190

CERM

6.3V

20%

402

0.22uF

J10

J11

AN9

AK17

AR7

AM9

AT15

AR15

AT17

AR16

AR17

AT14

AH16

AN17

AN18

AT16

AN16

AM17

AM18 AJ19

AT18

AH18

AR18

AJ15

AM16

AK16

AR14

AR9

AK13

AH13

AN11

AT8

AN10

AM15

AN15

AJ8

AK14

AT13

AN14

AH15

AK15

AR13

AM11

AT12

AJ11

AR12

AK12

AM13

AN13

AT10

AT11

AK11

AN12

AM12

AR11

AT9

AR10

AR8

AM10

U51

OMIT

INTREPID-REV2.1

BGA

CRITICAL

21

R272

33

402

MF

1/16W

5%

21

R230

33

5%

1/16W

MF

402

21

R264

402

5%

1/16W

MF

33

2

1

R244

47

5% 1/16W MF 402

+3V_SLEEP

72

RP33

SM1

10K

5%

1/16W

54

RP33

SM1

10K

5%

1/16W

54

RP36

SM1

5%

10K

1/16W

63

RP36

SM1

1/16W

5%

10K

81

RP36

SM1

10K

5%

1/16W

72

RP36

SM1

1/16W

5%

10K

63

RP33

10K

5%

1/16W

SM1

81

RP33

SM1

1/16W

5%

10K

21

R282

402

MF

1/16W

5%

22

21

R278

402

MF

1/16W

5%

22

21

R277

402

MF

1/16W

5%

22

21

R252

402

MF

1/16W

5%

33

21

R273

1/16W

5% MF

402

22

2

1

C311

NO STUFF

12PF

5%

50V

CERM

402

2

1

C362

NO STUFF

402

CERM

50V

5%

12PF

2

1

C372

NO STUFF

402

CERM

50V

5%

12PF

21

R553

10K

5%

1/16W

402

MF

21

R318

402

MF

1/16W

5%

10K

21

R316

10K

5%

1/16W

MF

402

21

R314

10K

5%

1/16W

MF

402

21

R317

10K

5%

1/16W

MF

402

21

R552

10K

5%

1/16W

MF

402

21

R334

10K

5%

1/16W

MF

402

21

R308

10K

5%

1/16W

MF

402

+3V_MAIN

21

R255

402

MF

1/16W

5%

10K

21

R239

402

MF

1/16W

10K

5%

21

R254

10K

5%

1/16W

MF

402

21

R256

402

MF

1/16W

5%

10K

21

R253

10K

5%

1/16W

MF

402

21

R235

402

MF

1/16W

10K

5%

2

1

R225

1K

402

MF

1/16W

1%

2

1

R219

1K

402

MF

1/16W

1%

2

1

C291

CERM 402

6.3V

20%

0.22uF

81

RP34

SM1

1/16W

10K

5%

54

RP34

SM1

1/16W

5%

10K

72

RP34

SM1

1/16W

5%

10K

V13

V14

AN19

AK30

AR30

AT30

AN29

AH25 AG25

AN30

AM30

AT31

AR31

AN31

AM31

AR32

AT32

AK25

AK27

AK28

AT19

AK21 AK22

AK20 AK19

AB21

AB20

AR29

AM28

AT33

AK24

AJ24

AJ29

AT29

AT28

AM29

AN28

AM27

AL25

AN24

AT23

AM20

AT22

AM21

AN21

AR21

AN20

AT21

AN27

AR28

AR20

AT27

AR27

AM26

AN26

AM25

AT26

AR26

AL24

AN25

AM24

AT20

AR25

AT25

AR24

AM23

AT24

AR23

AN23

AM22

AN22

AR22

AM19

AR19

U51

OMIT

INTREPID-REV2.1

BGA

CRITICAL

2

1

C270

402

20%

6.3V CERM

0.22uF

B

4412

051-6809

+1_5V_INTREPID_PLL

CLK33M_NEC

CLK33M_AIRPORT

INT_PCI_FB_OUT

INT_ROM_RW_L

INT_ROM_CS_L INT_ROM_OE_L

PCI_CBE<3>

PCI_CBE<2>

PCI_CBE<1>

PCI_CBE<0>

PCI_DEVSEL_L

PCI_STOP_L

PCI_TRDY_L

PCI_FRAME_L

PCI_IRDY_L

PCI_PAR

CBUS_PCI_GNT_L

AIRPORT_PCI_GNT_L

NEC_PCI_GNT_L

NEC_PCI_REQ_L

CBUS_PCI_REQ_L

AIRPORT_PCI_REQ_L

PCI_AD<30> PCI_AD<31>

PCI_AD<29>

PCI_AD<28>

PCI_AD<27>

PCI_AD<26>

PCI_AD<25>

PCI_AD<24>

PCI_AD<23>

PCI_AD<22>

PCI_AD<21>

PCI_AD<20>

PCI_AD<17> PCI_AD<18>

PCI_AD<15>

PCI_AD<14>

PCI_AD<16>

PCI_AD<12> PCI_AD<13>

PCI_AD<9>

PCI_AD<11>

PCI_AD<10>

PCI_AD<7> PCI_AD<8>

PCI_AD<6>

PCI_AD<5>

PCI_AD<4>

PCI_AD<2>

PCI_AD<1>

PCI_AD<3>

PCI_AD<0>

PCI_STOP_L

PCI_DEVSEL_L

PCI_FRAME_L

+1_5V_AGP

INT_AGPPVT

INT_AGP_VREF

+1_5V_AGP

+1_5V_INTREPID_PLL5

AGP_SBA<1>

AGP_REQ_L AGP_GNT_L

STOP_AGP_L

INT_AGP_VREF

AGP_AD<0> AGP_AD<1> AGP_AD<2> AGP_AD<3> AGP_AD<4>

AGP_AD<10> AGP_AD<11> AGP_AD<12>

AGP_AD<14> AGP_AD<15> AGP_AD<16>

AGP_AD<18> AGP_AD<19>

AGP_AD<22> AGP_AD<23> AGP_AD<24> AGP_AD<25> AGP_AD<26> AGP_AD<27>

AGP_AD<29> AGP_AD<30> AGP_AD<31>

AGP_CBE<0> AGP_CBE<1> AGP_CBE<2> AGP_CBE<3>

AGP_PAR AGP_FRAME_L AGP_TRDY_L AGP_IRDY_L AGP_STOP_L AGP_DEVSEL_L

AGP_SBA<0>

AGP_SBA<2> AGP_SBA<3> AGP_SBA<4> AGP_SBA<5> AGP_SBA<6> AGP_SBA<7>

AGP_SB_STB AGP_SB_STB_L

AGP_ST<0>

AGP_ST<2>

AGP_ST<1>

AGP_AD_STB<1> AGP_AD_STB_L<1>

AGP_AD_STB<0> AGP_AD_STB_L<0>

AGP_PIPE_L AGP_RBF_L

AGP_WBF_L

+1_5V_INTREPID_PLL

ROM_OE_LINT_ROM_OE_L

ROM_CS_LINT_ROM_CS_L

ROM_RW_LINT_ROM_RW_L

AGP_REQ_L

AGP_AD_STB<1>

AGP_AD_STB_L<0>

AGP_IRDY_L

AGP_WBF_L

AGP_AD_STB<0>

AGP_SB_STB

AGP_AD_STB_L<1>

AGP_SB_STB_L

INT_AGP_FB_OUT

INT_AGP_FB_IN

AGP_BUSY_L CLK66M_AGP_1_5V_TP

CLK66M_GPU_AGP

CLK66M_GPU_AGP_UF

INT_PCI_FB_IN

AGP_AD<5>

AGP_AD<8>

AGP_AD<7>

AGP_TRDY_L

AGP_AD<17>

AGP_STOP_L

AGP_PIPE_L

PCI_AD<19>

AGP_AD<28>

AGP_AD<6>

AGP_AD<9>

AGP_AD<13>

AGP_FRAME_L

AGP_DEVSEL_L

+1_5V_AGP

AGP_RBF_L

AGP_BUSY_L

+3V_GPU

STOP_AGP_L

+1_5V_INTREPID_PLL6

CLK33M_AIRPORT_UF CLK33M_CBUS_UF

CLK33M_CBUS

CLK33M_NEC_UF

AIRPORT_PCI_REQ_L

AGP_AD<21>

AGP_GNT_L

AGP_AD<20>

NEC_PCI_REQ_L

PCI_TRDY_L

CBUS_PCI_REQ_L

PCI_IRDY_L

38

39

21

39

21

39

37

39

37

39

37

20

37

20

37

38

37

24

37

24

37

24

19

38

24

19

38

24

14

39

24

18

24

39

18

24

18

16

38

16

37

38

37

14

37

18

37

16

37

21

39

37

18

12

35

18

17

18

39

17

18

24

17

18

17

15

19

15

37

19

37

19

37

19

12

39

19

35

37

19

37

19

17

37

19

15

19

20

35

24

37

19

37

17

18

17

8

17

24

35

12

17

12

17

18

24

17

12

9

17

9

12

38

19

12

19

12

19

12

19

12

8

9

12

9

12

9

12

35

12

19

35

19

12

19

12

9

19

12

19

12

38

35

18

35

12

19

12

19

12

CS_CE2

CS_CE1

CS_IORD CS_IOWR

ATA_CS1

ATA_CS0

IDE

IDEINTRQ

IDECHRDY

IDECS0

IDECS1

IDEDMACK IDEDMARQ

IDERD

IDEWR

IDERST

IDEA9

IDEA8

IDEA7

IDEA6

IDEA5

IDEA4

IDEA3

IDEA2

IDEA1

IDEA0

IDEDD15

IDEDD14

IDEDD13

IDEDD12

IDEDD11

IDEDD10

IDEDD9

IDEDD8

IDEDD7

IDEDD6

IDEDD5

IDEDD4

IDEDD3

IDEDD2

IDEDD1

IDEDD0

CARDSLOT

CS_WAIT

CS_OE CS_WE

ATA_INTRQ

ATA_DMARQ

ATA_CHRDY

ATA_DMACK

ATA_RD

ATA_WR

ATA_RST

ATA_VREF

UATA100

ATA_A1 ATA_A2

ATA_A0

ATA_D12

ATA_D11

ATA_D15

ATA_D14

ATA_D13

ATA_D10

ATA_D9

ATA_D3

ATA_D2

ATA_D1

ATA_D0

ATA_D4

ATA_D8

ATA_D7

ATA_D6

ATA_D5

(5 OF 9)

IICDATA_1

IICCLK_1

IICCLK_0 IICDATA_0

TST_PLLEN

TST_MONOUT

TST_MONIN

TEI

TRSTN

TMS

TCK

TDO

TDI

TEST

MDC

GBE_REFCLK

MDIO

COL

CRS

GTX_CLK

RXD_6

RXD_4 RXD_5

RXD_3

RXD_7

RXD_2

RXD_1

RX_ER

RX_DV

RX_CLK

RXD_0

FW_PINT

FW_LINKON

FWR_LCLK

TX_ER

TX_EN

TX_CLK

TXD_0

RESET

PURESET

PHY_LPS PHY_CTL0 PHY_CTL1 PHY_LREQ FWR_PCLK

(4 OF 9)

MISC

TXD_3

TXD_2

TXD_1

TXD_4 TXD_5 TXD_6 TXD_7

GB ETHERNET

FIREWIRE

PHY_DATA0 PHY_DATA1 PHY_DATA2 PHY_DATA3

PHY_DATA5

PHY_DATA7

PHY_DATA4

PHY_DATA6

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

HW_PLL<BIT 0>

ENET_TXD SERIES TERMINATION

Keep C847 stub short

TEST PULL-UPS/DOWNS

I2C PULL-UPS

I2C-0

J3000 - PG 23

(LMU on RUX Brd.)

AF-RD 84-WR

N/A

FAN CONTROLLER

A3-RD AC-WR AD-WR

I2C-1

5D-RD

N/A

U51 - PG 6

N/A N/A

J14 - PG 25

DASH MODEM

J25 - PG 11

RAM - LOWER

NOT USING CARDSLOT INTERFACE

POSTSCALAR BYPASS

POSTSCALAR BYPASS FUNCTIONAL TEST WITH

FUNCTIONAL TEST IDDQ

FUNCTIONAL TEST WITHOUT

VIEW PLLS (HARDWARE)

TEST TRI-STATE

ATPG IDDQ

ATPG NORMAL

JTAG MODE

NORMAL OPERATION VIEW PLLS (SOFTWARE)

DESCRIPTION

X(I)

1(I)

0 0

0 1

1 1

1(I) 1(I) 1(I)

0(I) 0(I)

1 X

0

0(I)

0

1(I)

0(I)

BYPASS

SYNC/MEM DATA

MEMWE

0(I)

0 1

PLL OUTPUTS

1

(INPUT)

00

(OUTPUT)

TESTSEL5

HWPLL_

X

1

(I/O) (I/O)

JTG_TDI_HJTG_TDO_H

(OUTPUT)

0

JTG_RSTN_L

1 1

TST_TEI_H

X 0 0

X

EXTPLL

SHUTDOWN

TPDENABLE

TST_PLLEN_H

X

(OUTPUT)

DDR_

ANALYZER_CLK

(OUTPUT)

X

INT - ENET/FW/UATA

EIDE/I2C

CS_WAIT IS AN INPUT

UDMA - DEVICEDMARDY/DSTROBE

UDMA - HOSTDMARDY/HSTROBE

UDMA - STOP

PLL OUTPUTS

SELECTED

PMU

(SLEEP)

N/A N/A

N/A

(SLEEP)

I2C-2

N/A

(MAIN)

N/A N/A

(MAIN)

A2-WR

A0-WR

BUS

A1-RD

ADDR

N/A

SNAPPER SOUND

N/AN/A

RAM - UPPER

6B-RD

5C-WR

N/A

J25 - PG 11

J2 - PG 25

6A-WR

BOOTBANG EEPROM

LMU

U52 - PG 25

N/A

U30 - PG 14

ADDR LSB INDICATES READ (’1’) OR WRITE (’0’) MODES

CLOCK SLEW SSCG

N/A

85-RD

AE-WR

D2-WR D3-RD

21

R259

402

MF

1/16W

5%

1K

81

RP35

SM1

1/16W

5%

10K

2

1

R232

10K

5% 1/16W MF 402

54

RP16

22

1/16W

5%

SM1

63

RP10

22

1/16W

5%

SM1

81

RP10

22

5%

1/16W

SM1

54

RP10

22

1/16W

5%

SM1

72

RP10

22

1/16W

5%

SM1

63

RP16

22

5%

1/16W

SM1

81

RP16

22

1/16W

5%

SM1

72

RP16

22

5%

1/16W

SM1

+3V_MAIN

12

R269

10K

5% MF

1/16W

402

21

R270

5%

1/16W

MF

402

10K

2

1

C847

5%

10pF

50V CERM 402

NO STUFF

21

R630

402

MF

1/16W

5%

10K

NO STUFF

+3V_MAIN

21

R263

402

MF

1/16W

5%

1K

72

RP32

SM1

1/16W

5%

2.2K

81

RP32

1/16W

SM1

5%

2.2K

54

RP32

5%

1/16W

SM1

2.2K

63

RP32

SM1

5%

1/16W

2.2K

72

RP35

10K

5%

1/16W

SM1

63

RP35

SM1

10K

5%

1/16W

54

RP35

1/16W

5%

10K

SM1

2

1

R207

402

MF

1/16W

1K

1%

AM2

AJ4

AL2

AA7

AH7

AG8

AE5

AE4

AG2

AD5

AH1

AF2

AG1

AF1

AJ2

AJ1

AG4

AD7

AH2

AF4

AD4

AC5

AM1

AB7

AK4

AG7

AF7

AH5

AK2

AL1

AH4

AG5

AK1

AE7

AF5

AE1 AE2

AC4

AD2

AB5

AB4

AD1

AA1

Y15

Y4

AA2

AA8

AC2

AC1

W8

W2

V1

W1

V2

V4

U2

U1

Y8

W7

Y1

Y2

W5

W4

T1

V5

AB2

AA4

AA5

Y7

AB1

Y5

U51

OMIT

CRITICAL

BGA

INTREPID-REV2.1

21

R224

82

MF

1/16W

5%

402

21

R205

5%

1/16W

MF

82

402

A5

A7

H9

E10

D9

G10

B7

A6

D8

E9

H10

AR6

AK10

AM7

AN6

AR5

AH10

AT5

AK8

AP5

D2

C4

J12

E8

G9

D7

A4

B4

D6

E7

D3

U5

T2

M2

M1

N4

L2

K2

K1

N5

P7

M4

L4

L1

P5

B5 B6

AM3

AN1

AK5

AN2

H12

L13

N1

N2

T7

U14 E6 C5

U51

OMIT

CRITICAL

INTREPID-REV2.1

BGA

21

R195

402

MF

1/16W

5%

22

21

R186

22

5%

1/16W

MF

402

21

R149

10

402

MF

1/16W

5%

21

R145

10

402

MF

1/16W

5%

21

R160

1/16W

402

MF

5%

10

B

4413

051-6809

UIDE_DATA<5>

ENET_LINK_TXD<0>

CLKENET_LINK_TX

HD_INTRQ

CLKENET_PHY_GTX

UIDE_REF

UIDE_CS1_L

UIDE_DIOR_L

EIDE_DATA<1> EIDE_DATA<2>

INT_TST_PLLEN_PD

ENET_PHY_TX_ER

CLKFW_LINK_PCLK

FW_LINK_CNTL<0> FW_LINK_CNTL<1>

FW_PHY_LPS

FW_LINK_DATA<7>

FW_LINK_DATA<0> FW_LINK_DATA<1>

ENET_LINK_TXD<7>

ENET_LINK_TXD<4>

ENET_LINK_TXD<2>

ENET_LINK_TXD<1>

FW_LKON FW_PINT

CLKFW_LINK_LCLK

CLKENET_LINK_RX ENET_RX_DV ENET_RX_ER

ENET_LINK_RXD<0>

ENET_LINK_RXD<3>

ENET_LINK_RXD<2>

ENET_LINK_RXD<4> ENET_LINK_RXD<5> ENET_LINK_RXD<6> ENET_LINK_RXD<7> CLKENET_LINK_GBE_REF

ENET_CRS

INT_TST_MONIN_PD INT_TST_MONOUT_TP

INT_I2C_CLK0 INT_I2C_DATA0

INT_I2C_DATA1

INT_I2C_CLK1

JTAG_ASIC_TCK

JTAG_ASIC_TDI

INT_RESET_L

INT_PU_RESET_L

ENET_PHY_TXD<1>

ENET_LINK_TXD<1>

ENET_PHY_TXD<0>

ENET_LINK_TXD<0>

ENET_PHY_TXD<3>

ENET_LINK_TXD<3>

ENET_PHY_TXD<4>

ENET_LINK_TXD<4>

ENET_PHY_TXD<2>

ENET_LINK_TXD<2>

ENET_PHY_TXD<5>

ENET_LINK_TXD<5>

ENET_PHY_TXD<7>

ENET_LINK_TXD<7>

ENET_PHY_TXD<6>

ENET_LINK_TXD<6>

INT_I2C_CLK0

INT_I2C_DATA1

INT_I2C_CLK1

CLKFW_PHY_LCLK

FW_PHY_LREQ

CSLOT_CE2_L_SPN

NO_TEST=TRUE

CSLOT_CE1_L_SPN

NO_TEST=TRUE

UIDE_CS0_L

CSLOT_IOWR_L_SPN

NO_TEST=TRUE

CSLOT_IORD_L_SPN

NO_TEST=TRUE

EIDE_INT

EIDE_DMACK_L EIDE_DMARQ

EIDE_WR_L EIDE_RD_L

EIDE_RST_L

EIDE_IOCHRDY

CSLOT_ADDR9_SPN

NO_TEST=TRUE

CSLOT_ADDR8_SPN

NO_TEST=TRUE

CSLOT_ADDR7_SPN

NO_TEST=TRUE

CSLOT_ADDR6_SPN

NO_TEST=TRUE

CSLOT_ADDR5_SPN

NO_TEST=TRUE

CSLOT_ADDR4_SPN

NO_TEST=TRUE

CSLOT_ADDR3_SPN

NO_TEST=TRUE

EIDE_ADDR<2>

EIDE_ADDR<1>

EIDE_ADDR<0>

EIDE_DATA<14> EIDE_DATA<15>

EIDE_DATA<13>

EIDE_DATA<11> EIDE_DATA<12>

EIDE_DATA<9> EIDE_DATA<10>

EIDE_DATA<8>

EIDE_DATA<6> EIDE_DATA<7>

EIDE_DATA<4> EIDE_DATA<5>

EIDE_DATA<3>

EIDE_DATA<0>

CSLOT_IOWAIT_L_PU

CSLOT_WE_L_SPN

NO_TEST=TRUE

CSLOT_OE_L_SPN

NO_TEST=TRUE

UIDE_INTRQ

UIDE_DMARQ

UIDE_IOCHRDY

UIDE_DMACK_L

UIDE_DIOW_L

UIDE_RST_L

UIDE_ADDR<2>

UIDE_ADDR<1>

UIDE_ADDR<0>

UIDE_DATA<15>

UIDE_DATA<14>

UIDE_DATA<13>

UIDE_DATA<12>

UIDE_DATA<10>

UIDE_DATA<9>

UIDE_DATA<8>

UIDE_DATA<7>

UIDE_DATA<6>

UIDE_DATA<3>

UIDE_DATA<2>

UIDE_DATA<1>

UIDE_DATA<0>

EIDE_CS0_L EIDE_CS1_L

INT_I2C_DATA0

ENET_LINK_TXD<3>

ENET_LINK_TXD<5>

HD_DMARQ

ENET_PHY_TX_EN

ENET_LINK_TX_ER

ENET_LINK_TXD<6>

INT_JTAG_TEI

ENET_COL ENET_MDIO ENET_MDC

ENET_LINK_RXD<1>

JTAG_ASIC_TDI

INT_TST_PLLEN_PD

JTAG_ASIC_TCK

JTAG_ASIC_TRST_L

INT_JTAG_TEI

INT_TST_MONIN_PD

FW_LINK_DATA<2> FW_LINK_DATA<3> FW_LINK_DATA<4> FW_LINK_DATA<5> FW_LINK_DATA<6>

INT_TDO

JTAG_ASIC_TRST_L

JTAG_ASIC_TMS

FW_LINK_LREQ

INT_TDO

JTAG_ASIC_TMS

ENET_LINK_TX_EN

UIDE_DATA<4>

UIDE_DATA<11>

CLKENET_LINK_GTX

39

23

39

23

39

23

13

25

39

13

25

13

39

26

39

26

39

37

35

37

35

37

39

37

35

37

35

37

35

37

39

11

14

26

39

29

37 37

11

14

35

37

11

37

39

37

39

26

39

37

14

26

14

26

37

24

13

26

24

26

38

24

13

26

27

13

27

35

26

13

39

6

13

9

25

26 13

6

13

27

24

37

24

6

13

24

26

37

13

26

13

27

13

37

13

37

24

35

(PLL9)

(PLL7)

(PLL3)

(PLL2)

(PLL1)

VSSA_8

VSSA4

VSSA3

VSSA2

VSSA1

(PLL9)

(PLL7)

(PLL3)

(PLL2)

(PLL1)

VDD15A_8

VDD15A_4

VDD15A_3

VDD15A_2

VDD15A_1

CPU_INT PCIPME

EXTINT12 EXTINT13 EXTINT14 EXTINT15 EXTINT16 EXTINT17

GPIO16

GPIO15

GPIO12

GPIO11

GPIO9

GPIO6

GPIO5

GPIO4

GPIO3

GPIO2

GPIO1

GPIO0

VSSU_2

VDDU33_2

VDDU33_1

(6 OF 9)

SCCRTSA

SCCTXDA

SCCDTRA

SCCRXDA SCCGPIOA SCCTRXCA

SCCTXDB

SCCGPIOB SCCTRXCB

SCCRXDB

SCCRTSB

PURPOSE

GENERAL

I/O’S

EXTINT8

EXTINT7

EXTINT6

EXTINT0

INTERRUPTS

EXTINT11

EXTINT4 EXTINT5

EXTINT10

EXTINT9

EXTINT3

EXTINT2

EXTINT1

AUD_DTO

AUD_DTI AUD_SYNC

MOD_DTO

AUD_BITCLK AUD_CLKOUT

IICCLK_2

MOD_SYNC

MOD_DTI

MOD_CLKOUT

IICDATA_2

MOD_BITCLK

IIC

AUDIO/I2S

CLOCKS

XTAL_OUT

PROCSLEEPREQ PENDPROCINT

XTAL_IN

SS_REF_CLK_IN

BUF_REF_CLK_OUT

STOPXTAL

WATCHDOG

PCI_

VSSU_1

PCI_

USB_VD0_P USB_VD0_N

USB_VD1_P USB_VD1_N

USB_VD2_N

USB_VD2_P

USB_PWRFLT0

USB_PRTPWR0

USB_VD3_N

USB_VD3_P

USB

USB_PRTPWR1 USB_PWRFLT1

USB_VD4_N

USB_VD4_P

USB_VD5_N

USB_VD5_P

USB_PRTPWR2 USB_PWRFLT2

ADJ

BYP GND

OUT

NC

SHDN

IN

CPU0

VDDA

VDD0

VDD1

VDDC

VDDQ

VSS1

VSS0

VSSA

VSSC

VSSQ

LOCK ODSEL

PD*

SDATA

SCLK

FSEL

CLKIN

RESET*

ADDRSEL

TABLE_ALT_ITEM

TABLE_5_ITEM

TABLE_11_HEAD

D

SIZE

OF

SHT

DRAWING NUMBER

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWING

PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR

THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

1

2

3

4

5

67

8

12

3

4

5

6

78

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.

SCALE

NONE

TABLE_11_HEAD

REFERENCE DESIGNATOR(S)

BOM OPTION

QTY

DESCRIPTION

VALUE VOLT. WATT.

TOL.PART #

PACKAGE

DEVICE

CRITICAL BOM OPTION

TABLE_5_HEAD

PART#

DESCRIPTION

QTY

REFERENCE DESIGNATOR(S)

PART NUMBER

ALTERNATE FOR

PART NUMBER

BOM OPTION

REF DES

COMMENTS:

TABLE_ALT_HEAD

GPIO/EXTINT PULLUPS

CRYSTAL LOAD CAPACITANCE IS 16PF

1

MOD_DTI_B_H JTG_TDO_H

2

INTERNAL 250K PULL-UP

INTERNAL 250K PULL-DOWN

OUTPUT IMPEDANCE ~18-20 OHMS

OPEN DRAIN OUTPUT

INTERNAL 250K PULL-UP

SCK

PCI INTERRUPTS

PORT F/MODEM

PORT A - PORT D/UNUSED

USB PORT ASSIGNMENTS

POWERBOOK SPARE

REQ* MOSI ACK*

VIA

NC

MISO

CBUS_REG_L CBUS_IREQ_L

(SIGNAL FROM MODEM)

SIGNAL NAME

HWPLL_

5

0

4 3

INT - USB/GPIOS/I2S

NC

MOD_SYNC_B_H

MOD_DTO_B_H

MOD_CLKOUT_B_H

MOD_BITCLK_B_H

TESTMUXSEL

PORT E/BLUETOOTH

MINIMIZE OVERSHOOT

PLACE NEAR INTREPID TO

-> 1.55V OUTPUT

VCORE A/B SEL

+3V_MAIN

2

1

C256

CERM 805

20%

6.3V

10uF

21

R166

5%

1/16W

MF

402

100K

+3V_MAIN

2

1

C246

CERM

20% 10V

402

0.1uF

2

1

C235

20% CERM

402

0.01uF

16V

21

R179

402

5% MF

1/16W

22

21

R174

1/16W

MF

5%

22

402

21

R192

402

22

5% MF

1/16W

54

RP13

1/16W

5%

47

SM1

63

RP13

47

5%

1/16W

SM1

81

RP13

1/16W

5%

SM1

47

72

RP13

47

5%

1/16W

SM1

21

R188

402

22

1/16W

MF

5%

V15

U4

AT7

R8

R9

AH29

AK18

AJ16

AJ13

AA15

U8

T8

AG29

P8 N8

K5 L5

M7 M8

H2 H1

G2 G1

L8 L7

N7

J1

K4

M5

J2

J4

AN7

K9

AR4

AF9

AM5

AT4

AG10

AG11

AL5

AN3

AP4

AG9

AF10

AT6

AN8

AJ18

AJ17

AJ12

AA16

AJ7

R1

R2 T4

P1

V8

AH8

AL4

H4

L9

H5

J8

F2

J7

K7

F1

K8

J5

E1

G5

C32

D31

G30

E31

A33

B33

D34

C33

G4

H7

E2

D1

F4

J9

E30

B32

E34

F33

D30

U15

T5

R4 R7

R5

P2

U51

OMIT

INTREPID-REV2.1

BGA

CRITICAL

+3V_SLEEP

2

1

R193

402

1/16W MF

5%

15K

2

1

C387

6.3V

20%

0.22uF

CERM

402

21

R201

402

4.7

5%

1/16W

MF

2

1

C386

0.22uF

CERM

6.3V

20%

402

21

R243

MF

1/16W

5%

4.7

402

2

1

C388

CERM

6.3V

20% 402

0.22uF

21

R279

5% MF

1/16W

4.7

402

2

1

C337

0.22uF

CERM

6.3V

20% 402

2

1

R189

15K

MF

1/16W

5%

402

2

1

C389

CERM

6.3V

20%

402

0.22uF

21

R240

MF

1/16W

5%

402

4.7

21

R280

MF

1/16W

5%

4.7

402

2 1

R144

10M

402

MF

5%

NO STUFF

1/16W

2

1

C151

CERM

22pF

5%

402

50V

2

1

C152

22pF

5%

50V

CERM

402

21

R134

0

NO STUFF

1/16W

5% MF

402

1

2

3

J9

F-ST-SM

NO STUFF

U.FL-R_SMT

2

1

R113

402

MF

1/16W

51

5%

NO STUFF

2

1

R143

402

MF

1/16W

5%

0

2

1

C721

1uF

10V 603

20%

CERM

2

1

R567

402

MF

68.1K

1%

1/16W

2

1

R574

1%

1/16W

402

18.7K

MF

2

1

C723

10uF

6.3V 805

CERM

20%

21

R568

NO STUFF

5%

1/16W

MF

0

603

21

R565

5%

1/16W

0

603

MF

+2_5V_MAIN

+1_8V_MAIN

5

1

7

6

8

4

3

2

U49

MSOP

LT1962-ADJ

2

1

C392

402

0.01uF

20%

CERM

16V

12

R187

402

5%

1/16W

MF

10K

12

R191

402

10K

MF

1/16W

5%

1

2

R258

5% 1/16W MF 402

1K

1

2

R241

1/16W MF

5%

402

1K

45

RP8

SM1

5%

10K

1/16W

18

RP8

SM1

10K

1/16W

5%

63

RP5

5%

1/16W

10K

SM1

54

RP6

SM1

10K

1/16W

5%

63

RP6

10K

1/16W

5%

SM1

72

RP6

10K

5%

SM1

1/16W

36

RP8

10K

5%

1/16W

SM1

27

RP7

5%

1/16W

10K

SM1

36

RP7

10K

1/16W

5%

SM1

45

RP4

SM1

1/16W

5%

10K

81

RP5

10K

1/16W

5%

SM1

81

RP6

1/16W

SM1

5%

10K

36

RP4

SM1

10K

1/16W

5%

27

RP8

SM1

10K

1/16W

5%

2

1

L13

FERR-EMI-100-OHM

SM

+2_5V_MAIN

+3V_MAIN

2

1

L14

SM-1

SSCG

400-OHM-EMI

2

1

C394

402

CERM

10V

20%

0.1uF

SSCG

2

1

L15

400-OHM-EMI

SM-1

SSCG

2

1

C399

SSCG

0.1uF

10V CERM

20% 402

2

1

C402

603

CERM

10V

20%

1uF

SSCG

21

R293

SSCG

5%

33

MF

1/16W

402

1

2

R292

SSCG

402

5% MF

75

1/16W

2

1

C400

20%

SSCG

402

CERM

10V

0.1uF

2

1

R288

1/16W

SSCG

10K

402

5% MF

21

R284

1/16W

MF

SSCG

0

402

5%

2

1

R178

15K

MF

1/16W

5%

402

2

1

R175

402

5% 1/16W MF

15K

21

R142

SSCG

MF

1/16W

0

402

5%

2 1

R156

5%

1/16W

MF

402

10K

2 1

R157

10K

402

MF

1/16W

5%

2 1

R164

5%

1/16W

MF

402

10K

2 1

R165

5%

1/16W

MF

402

10K

2 1

R182

5%

1/16W

MF

402

10K

2 1

R180

5%

1/16W

MF

402

10K

2 1

R183

10K

402

MF

1/16W

5%

2 1

R181

5%

1/16W

MF

402

10K

21

R250

10K

402

MF

5%

1/16W

45

RP11

SM1

5%

1/16W

10K

36

RP11

10K

SM1

5%

1/16W

27

RP11

5%

1/16W

10K

SM1

18

RP11

SM1

5%

1/16W

10K

1

2

R295

1/16W

10K

NO STUFF

402

5% MF

1

2

R296

402

10K

5% 1/16W MF

NO STUFF

21

R153

10K

402

MF

1/16W

5%

2

1

R287

10K

5% 1/16W MF 402

SSCG

2

1

R286

NO STUFF

5%

402

MF

1/16W

0

21

R218

MF

5%

402

1/16W

0

+3V_SLEEP

21

R746

10K

402

5%

1/16W

MF

21

R158

1/16W

MF

10K

5%

402

21

R148

10K

5% MF

1/16W

402

+3V_MAIN

15

6

11

19

7

18

5

12

10

1

8

9

17 13

4

2

3

16

20

14

U31

CRITICAL

CY28512D

OMIT

TSSOP

81

RP47

SOFT_MODEM

5%

1/16W

SM1

0K

63

RP47

SOFT_MODEM

5%

1/16W

SM1

0K

54

RP47

SOFT_MODEM

1/16W

5%

SM1

0K

72

RP47

SOFT_MODEM

5%

1/16W

SM1

0K

21

R206

5%

1/16W

MF

402

10K

USB_MODEM

72

RP15

10K

1/16W

5%

SM1

USB_MODEM

63

RP15

10K

1/16W

5%

SM1

USB_MODEM

54

RP15

SM1

10K

1/16W

5%

USB_MODEM

81

RP15

SM1

5%

1/16W

USB_MODEM

10K

21

Y2

18.432M

8X4.5MM-SM

CRITICAL

21

R450

MF

SSCG

0

402

1/16W

5%

21

R467

0

5%

1/16W

MF

402

NO STUFF

21

R457

0

5%

1/16W

MF

402

Alt. for Siward Part

Y2

197S0035197S0004

SSCGCRITICAL

U31

IC,CY28512-2

1

359S0086

116S1104

RES

RES-0402-V2

RESISTOR R292

NO_SSCG

5%

1/16W

1 10K

4414

B

051-6809

INT_REF_CLK_IN

LT1962_INT_ADJ

USB_DFM

INT_I2S0_SND_MCLK_UF

USB_DDP

USB_DCM

INT_I2S0_SND_SCLK_UF

COMM_RESET_L FW_PHY_PD SND_HP_MUTE_L

INT_GPIO9_PU

SND_AMP_MUTE_L

INT_GPIO1_PU

CG_FSEL_INT

NEC_PCI_INT_L

+1_5V_INTREPID_PLL2

COMM_SHUTDOWN

SND_HW_RESET_L INT_GPIO12_PU INT_GPIO15_PU INT_ENET_RST_L

LT1962_INT_BYP

CG_SYSCLK_EN

INT_REF_CLK_OUT

CLK18M_INT_XOUT

CG_FSEL

SYSTEM_CLK_EN

INT_TDO

INT_EXTINT13_PU

INT_GPIO12_PU

INT_MOD_DTI

INT_MOD_SYNC_UF

INT_MOD_SYNC

INT_GPIO9_PU

INT_MOD_BITCLK_UF

SND_HW_RESET_L

INT_MOD_BITCLK

INT_MOD_DTO

INT_MOD_CLKOUT

INT_EXTINT16_PU

INT_EXTINT12_PU

INT_EXTINT11_PU

PMU_REQ_L

PMU_INT_NMI

INT_I2S0_SND_TO_DAC

INT_I2S0_SND_LRCLK

INT_I2S0_SND_MCLK

INT_I2S0_SND_SCLK

CG_CLKOUT

LTC1962_INT_VIN

INT_EXTINT14_PU

USB_PWREN_EF_L

USB_OC_EF_L

USB_OC_AB_L

USB_PWREN_AB_L

INT_EXTINT8_PU

COMM_RING_DET_L

INT_GPIO15_PU

PMU_INT_L

CLK18M_INT_EXT

VCORE_VGATE

USB_DEP

BT_USB_DP

USB_DEM

BT_USB_DM

USB_DFP

MODEM_USB_DP

USB_DFM

MODEM_USB_DM

USB_DBP

USB_DBM

USB_DAP

USB_DAM

USB_DCM

USB_DCP

USB_DDM

USB_DDP

CBUS_INT_L

AIRPORT_PCI_INT_L

CLK18M_XTAL_IN

MPIC_CPU_INT_L

PMU_PME_L

NEC_PCI_INT_L

INT_EXTINT16_PU

SND_HP_SENSE_L

INT_EXTINT14_PU

INT_EXTINT12_PU

+3V_INTREPID_USB

PMU_ACK_L

PMU_REQ_L

PMU_INT_L

COMM_RING_DET_L

AGP_ATI_INT_L INT_EXTINT3_PU SND_LIN_SENSE_L

CBUS_INT_L

AIRPORT_PCI_INT_L

ENET_ENERGY_DET

INT_EXTINT8_PU PMU_INT_NMI INT_EXTINT10_PU INT_EXTINT11_PU

INT_I2S0_SND_TO_DAC_UF

INT_I2S0_SND_LRCLK_UF

INT_I2S0_SND_FROM_ADC

INT_MOD_DTO_UF INT_MOD_DTI INT_MOD_SYNC_UF

INT_MOD_CLKOUT_UF

INT_MOD_BITCLK_UF

INT_I2C_DATA2

INT_I2C_CLK2

INT_PROC_SLEEP_REQ_L INT_PEND_PROC_INT

SYSTEM_CLK_EN

INT_WATCHDOG_L

INT_REF_CLK_OUT_UF

PMU_CLK

PMU_TO_INT

+1_5V_INTREPID_PLL3

+1_5V_INTREPID_PLL4

+1_5V_INTREPID_PLL8

USB_DAM

USB_DAP

USB_DBP USB_DBM

USB_DCP

USB_PWREN_AB_L USB_OC_AB_L

USB_DDM

USB_PWREN_CD_L USB_OC_CD_L

USB_DEP USB_DEM

USB_OC_EF_L

USB_PWREN_EF_L

USB_DFP

INT_EXTINT13_PU

INT_REF_CLK_IN

CG_FSEL

CG_LOCK

CG_SYSCLK_EN

CG_ADDRSEL

INT_I2C_DATA1

INT_I2C_CLK1

INT_REF_CLK_OUT

CG_RESET_L

COMM_TXD_L COMM_RTS_L COMM_DTR_L COMM_RXD COMM_GPIO_L COMM_TRXC

PMU_FROM_INT

+1_5V_INTREPID_PLL1

+1_5V_INTREPID_PLL

CLK18M_INT_XIN

INT_MOD_CLKOUT_UF

INT_MOD_DTO_UF

INT_EXTINT3_PU

INT_GPIO1_PU

INT_EXTINT10_PU

USB_PWREN_CD_L

USB_OC_CD_L

MAIN_RESET_L

+3V_CG_PLL_MAIN

+2_5V_CG_MAIN

39 29

39

24

39

29

38

39

29

39

38

19

35

37

39

33

17

39

25

35

29

26

25

29

39

35

39

25

29

33

37 37

18

24

17

39

29

25

39

18

24

29

39

25

39

29

37

35

25

35

39

12

33

18

14

25

27

25

14

25

14

38

25

14

26

14

35

14

13

14

25

14

25

14

25

38

14

35

14

14 25

14

35

5

17

14

25

14

38

29

14

19

14

25

14

26

14

25

14

25

29

14

29

35

29

38

14

13

14

25

29

38

8

35

14

17