Apple A1095 Schematic

ANGLES
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
DATE
APPD
ENG
DATE
APPD
CK
ECN
ZONE
REV
X.XXX
X.XX
XX
DIMENSIONS ARE IN MILLIMETERS
THIRD ANGLE PROJECTION
D
SIZE
APPLICABLE
NOTED AS
MATERIAL/FINISH
NONE
SCALE
DESIGNER
MFG APPD
DESIGN CK
RELEASE
QA APPD
ENG APPD
DRAFTER
METRIC
OF
SHT
DRAWING NUMBER
TITLE
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
Apple Computer Inc.
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
DESCRIPTION OF CHANGE
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
TABLE_5_ITEM
DRAWING
TABLE_5_ITEM
CPU PLL AND CONFIGURATION STRAPS
MPC7447A MAXBUS INTERFACE
PCB NOTES AND HOLES
POWER BLOCK DIAGRAM
TITLE PAGE AND CONTENTS
21
20
19
INTREPID ENET/FW/UATA/EIDE INTERFACES
INTREPID AGP 4X/PCI
INTREPID MEMORY INTERFACE / BOOT ROM
SIGNAL CONSTRAINTS (1 OF 4) - DDR MEM/CLK
SIGNAL CONSTRAINTS (3 OF 4) - DIGITAL/DIFF
CONTENTS
8
USB 2.0 INTERFACE (uPD720101)
M11 LVDS/TMDS/GPIO & GPU VCORE
M11 AGP INTERFACE & SPREAD SPECTRUM SUPPORT
CARDBUS INTERFACE (PCI1510)
35
1.5V/ 1.8V / 2.5V SYSTEM POWER SUPPLIES
CPU CORE VOLTAGE POWER SUPPLY
3.3V / 5V SYSTEM POWER SUPPLY
INTERNAL CONNECTORS - AIRPORT, HARD DRIVE,
KBD,TPAD,HALL EFFECT,PWR BUTTON,LMU/SENSOR
23
INTREPID GPIOS/SERIAL/USB INTERFACES/SSCG
400PIN STACKED DDR SODIMM CONNECTOR
22
PAGE PAGE
CONTENTS
25
SOUND/LEFT USB/BLUETOOTH, SERIAL DEBUG
INTREPID POWER RAILS/1.5V LDO
GPU_PWRMSR
EXT_TMDS
USB_MODEM
SOFT_MODEM
INT_TMDS
VGA_BUFFER_RES
ATI_MEMIO_LO
INT_2_5V_HOT
BBANG
1_8V_MAXBUS
M11 POWER
33
41
COMPONENT LOCATIONS (1 OF 2)
SIGNAL LOCATIONS
REVISION HISTORY
FUNCTIONAL TESTPOINTS
SIGNAL CONSTRAINTS (4 OF 4) - POWER NETS
PBUS SUPPLY / PMU SUPPLY / BACKUP BATTERY
BATTERY CHARGER AND CONNECTOR
External TMDS (DVI Transmitter SIL1162)
SYSTEM BLOCK DIAGRAM
ATI_MEMIO_HI
OPTICAL DRIVE
38
18
16
15
14
13
12
DDR MEMORY MUXES
INTREPID DECOUPLING
5V_HD_LOGIC NO_BBANG INT_2_5V_COLD
GPU_SS
STUFF
32
2
39 40
3
43
PMU
37
36
34
1
4 5 6 7
10
9
LVDS
29
NO STUFF
31
11
17
COMPONENT LOCATIONS (2 OF 2)
GIGABIT ETHERNET INTERFACE
VIDEO CONNECTORS - INVERTER, DVI, S-VIDEO,
3V_HD_LOGIC
1_5V_MAXBUS
BOM OPTIONS (IN COMMON PARTS)
NO_SSCG
SSCG
30
FAN CONTROLLER, USB MODEM/SOFT MODEM,
26
24
FIREWIRE PORTS
28
FIREWIRE PHY
42
27
SIGNAL CONSTRAINTS (2 OF 4) - CPU
INTREPID MAXBUS AND BOOT STRAPS
MPC7447A DATA / NC PINS / BOOTBANGER
LABEL_BST128
826-4393
EEE:SQG
1
SCHEM,MLB,PB15
Fri Aug 26 15:48:02 2005
SCHEM,MLB,PB15
1
SCH1051-6809
1
PCB1820-1600
PCBF,MLB,PB15
LABEL_BTR
EEE:SQE
826-4393
1
LABEL_BST64
EEE:SQF
826-4393
1
SCHEM,MLB,PB15
397429
PRODUCTION RELEASED
1
B
08/30/05
?
44
051-6809
B
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TMDS
(VIA SIL1162)
Connector
J4
Connector
P.22
Connector
P.22P.22
2:1 DDR MUXES
64BITS
167MHZ
MEMORY BUS
2.5V
LVDS
EDID (I2C)
RGB
DDC
J22
DVI-I
PCI
MEMORY
U17
RIGHT USB
(VIA LIO)
LEFT USB
(INTERNAL MEM)
EHCI HC
NEC USB2.0
P.24
DC-In
NOT USED
NOT USED
NOT USED
BOOT ROM
(MPC7447)
P.25
3.3V/5V
16/32 BITS
33MHZ
I2C
PMU
167MHZ
1.8V
MAXBUS
32BIT ADDRESS 64BIT DATA
NOT USED
EIDE
UIDE
1394 OHCI
3.3V
50MHZ
8BIT TX/RX
P.24
P.24
@ 400MHZ
2 DATA PAIRS
P.27
PHY
FW - B
FW - A
125MHZ
8BIT RX
8BIT TX
G/MII
3.3V
10/100/1000
P.26
P.26
PHY
66MHZ
1.5V/3.3V
AGP BUS
32BITS
Connector
P.14
SCCA
I2C
P.25
Connector
Connector
Power Supply
& Charger
Connector
ULTRA ATA/100
P.18
P.22
S-VIDEO
LCD Panel
Connector
P.19-21
4X AGP
CPU
P.5-6
P.7
PCI BUS
32BITS 33MHZ
3.3V
CardBus
64MB
CH. B
CH. A
MEMORY MEMORY
I2S
CPU PLL
Config
USB PORT E
USB PORT D
10/100/1000
ETHERNET FIREWIRE
SO-DIMM Connector
DDR SDRAM DIMM 0 DDR SDRAM DIMM 1
DDR MEMORY
UATA 100
33MHZ
64BITS
CARDSLOT
VIA/PMU
SYSTEM BLOCK DIAGRAM
FireWire
USB PORT F
USB PORT C
P.25
Connector
Battery
SMBUS
3.3V
INTREPID
400 MB/S
APOLLO
Ethernet
Connector
USB PORT B
USB PORT A
@ 200MHz
Connector
P.28
INTREPID
P.28
P.13 P.13
P.13
P.14
P.14
P.14
P.14
P.14
P.14
P.8
P.9
P.10
J25
P.11
P.13 P.14
P.13 P.14
P.14
P.12
P.12
P.30
U28
P.29
P.9
Inverter
COMPOSITE
S-Video
P.30-34
P.30
U8
P.17
P.25
P.25
Fan
I2CI2S
Connector
LIO/Audio
P.25
NOT USED
EIDE
P.13
P.25
MAXBUS
(INTERNAL MEM)
Serial Debug
TI PCI1510 Controller
Connector
1M X 8
(VIA STATLER)
CH. D
(INTERNAL MEM)
MEMORY
ATI M10
P.12
(INTERNAL MEM)
BlueTooth (LIO)
4 DATA PAIRS
Ethernet
J23
J24
U43
U36
J20
J13
J12
J3
J28
U11
J26
J27
J6
U47
J3
J17
J21J14
U16/U18/U28/U27
U56
J15
J3
U51
J5
Connector
P.18
CARDBUS
PMU
AIRPORT
CH. C
TRACKPAD
J10
P.23
SERIAL
5V
Connector
Connector
LED
J8
P.23
SLEEP
U53/J1/J18
Circuit
BOOTROM
OPTICAL DRIVE
Connector
Connector
J11
Connector
P.23
Keyboard
I2C
2 DATA PAIRS
RUX Board
LMU LUX Board
P.23
P.23
J2
J19
Modem/SW Modem
Connector
442
B
051-6809
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
BACKUP
SLEEP: D3COLD
(+1.385V)
+1.2V
(LTC1778)
GPU_VCORE
CPU_VCORE
+3V_SLEEP
1_5V_2_5V_OK
+3V_MAIN
+2_5V_SLEEP
SLEEP_L_LS5
~2.23MS
SHUTDOWN: STOPPED
RUN: RUNNING
RUN/SS
SLEEP: RUNNING
DC/DC
(LTC3411)
SHUTDOWN: STOPPED
SLEEP: STOPPED
RUN: RUNNING
(MAX1772)
FEED-IN PATH
NO INRUSH PROTECTION
BATTERY
CHARGER
PG 30
WHEN ONLY BATTERY IS CONNECTED
+4_6V_BU
SHUTDOWN: RUNNING
AC: 12.8V
REGULATOR
(LTC1625)
MAIN 2.5V/1.5V
SHUTDOWN: STOPPED
+PBUS
INTREPID CORE
SHUT-DOWN
CHARGER INPUT
PG 20
PG 33
INTERNAL 1.2UA CURRENT SOURCE
TURNS ON AS LOW AS 0.8V/TYP 1.5V
PG 34
PG 34
PG 32
PG 31
PG 31
PG 30
PG 30
PG 30
PG 31
PG 31
NO AC: BATTERY VOLTAGE
VCC
POWER SYSTEM ARCHITECTURE
MAP31 DDR I/O
MAP31 DDR CORE
AND PREVENTS +PBUS AND +24V_PBUS FROM DROPPING BELOW 6V
BACKUP BATTERY CIRCUIT CHARGES OFF +PBUS
+PBUS
+PBUS
+PBUS
BATTERY VOLTAGE
RUN/SS
STARTS ~4.25MSEC AFTER DCDC_EN_L BECOMES LOW
RC AT 1M*0.1UF @ 24V
STARTS 2.0MSEC AFTER DCDC_EN_L BECOMES LOW
RC AT 1M*0.047UF @ 24V
INTERNAL ZENER CLAMP TO 6V
<100UA ALLOWED
TURNS ON AT >1V
RUN/SS - 5V
<100UA ALLOWED
MAIN 3V/5V
(LTC3707)
DC/DC
TURNS ON AT >1V
VCC
DCDC_EN_L
AFTER PMU IS UP AND RUNNING DCDC_EN_L WILL PULL ON1/ON2 LOW IN SHUTDOWN
+5V_MAIN
+1.8V_MAIN
+5V_MAIN
VCC
1_5V_2_5V_OK
+BATT
+BATT
+24V_PBUS
+24V_PBUS
NO INRUSH PROTECTION
TURNS ON OUTPUT @ 2.4V
RUN: RUNNING
SHUTDOWN: STOPPED
RUN/SS - 3V
SLEEP: RUNNING
RUN: RUNNING
24V IS OUTPUT ONLY FROM
BATTERY
BACKUP BATTERY
1V20_REF
+
-
& BOOST OUTPUT
POWER BLOCK DIAGRAM
(UNTIL DRAINED)
AC
IN
ADAPTER
LIMITER
INRUSH
BUCK
RUN: RUNNING
+3.3V_MAIN
STBYMD
+3V_PMU
LDO
+3V_PMU
14V_PBUS
14V_PBUS
+5V_MAIN
WHEN ONLY BATTERY IS CONNECTED
14V CHARGES BACKUP BATTERY
HOLDS BOTH RUN/SS AT GND WHEN IT’S CONNECTED TO GND
WHEN IT’S OPEN
TURNS CONTROL TO RUN/SS
INVERTER
BACKLIGHT
DC/DC
(MAX1715)
PGOOD
3V_5V_OK
PGOOD
1625 NOT RUNNING
ON1/ON2
+1.5V_MAIN
+2.5V_MAIN
DDR POWER
AGP I/O
MAXBUS
SLEEP: STOPPED
SHUTDOWN: STOPPED
RUN: RUNNING
DC/DC
(MAX1717)
+5V_MAIN
SHDN
VCC
SLEEP
DCDC_EN
MAXBUS
SEQUENCING
+5V_MAIN
DC/DC
EXT_VCC
VCC
D3_COLD
SLEEP
DCDC_EN
HOWEVER, 5V SHOULD TURN ON ~2.23MS AFTER
RC CHARGING AT INT_VCC (5V)
DCDC_EN_L OR PMU_POWERUP_L BECOMES ’1’; MUCH LESS THAN THE
1_5V_2_5V_OK WILL NOT PULL LOW UNTIL
D3_HOT
D3_HOT
1_5V_2_5V_OK
DCDC_EN_L
SEQUENCING
GPU_VCORE
~5.88MS TO START SWITCHER
1M & 0.1UF @14V, IT TAKES
DCDC_EN_L
DCDC_EN
+5V_MAIN
+5V_SLEEP
2.4V - ??? MS
3V_5V_OK
SLEEP
??? MS
+2_5V_MAIN
??? MS
+1_5V_MAIN
+1_5V_SLEEP
1_5V_2_5V_OK
(MAX1715 OUTPUT)
(AT LTC1778 RUN/SS)
GPU_VCORE
(D3HOT)
GPU_VCORE
(D3COLD)
~8.2MS
~7.36MS
SLEEPRUN
SHUT-DOWN
RUN
3S 2P 18650 CELLS
SLEEP: RUNNING
+5V_MAIN
INTERNAL ZENER CLAMP TO 6V
443
B
051-6809
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
MECH. HOLES
ASICS HEATSINK MOUNTS
CHASSIS MOUNTS
BATT. CHRGR
DVI
DVI
INVERTER
LWR RT GPU
LEFT CPU
UPPER RT GPU
LWR CPU
1.0 OZ CU THICKNESS: 1.4 MILS
SIGNAL (1/2 OZ)
GROUND (1/2 OZ)
SIGNAL (1/2 OZ)
1-8-1 BLIND MICROVIA/20R10 BURIED VIA/20R10 TH VIA
SIGNAL (1/2 OZ)
SIGNAL (1/2 OZ)
GROUND (1/2 OZ)
10
9
8
2
3
6
7
5
4
1
1394
I/O AREA
SIGNAL TRACE SPACING: 4 MILS PREPREG THICKNESS: 2-3 MILS
SIGNAL TRACE WIDTH: 4 MILS
BOARD STACK-UP AND CONSTRUCTION
LAYER COUNT: 10
DIELECTRIC: FR-4
1/2 OZ CU THICKNESS: 0.7 MILS
IMPEDANCE : 50 OHMS +/- 10%
SEE PCB CAD FILES FOR MORE SPECIFIC INFO.
BOARD INFORMATION
BOARD HOLES
SIGNAL (1/2 OZ + COPPER PLATING)
SIGNAL (1/2 OZ + COPPER PLATING)
CUT POWER PLANE (1 OZ)
CUT POWER PLANE (1 OZ)
CORE (5 MIL)
PREPREG (5 MIL)
PREPREG (5 MIL)
PREPREG (3 MIL)
PREPREG (3 MIL)
CORE (3 MIL)
CORE (3 MIL)
PREPREG (3 MIL)
PREPREG (3 MIL)
THICKNESS : 1.2 MM / 0.047 IN
PCB SPECS
GROUND VIAS
1
ZT70
HOLE-VIA-20R10
1
ZT9
HOLE-VIA-20R10
1
ZT2
HOLE-VIA-20R10
1
ZT73
HOLE-VIA-20R10
1
ZT75
HOLE-VIA-20R10
1
ZT63
HOLE-VIA-20R10
1
ZT77
HOLE-VIA-20R10
1
ZT66
HOLE-VIA-20R10
1
ZT65
HOLE-VIA-20R10
1
ZT62
HOLE-VIA-20R10
1
ZT25
HOLE-VIA-20R10
1
ZT24
HOLE-VIA-20R10
1
ZT19
HOLE-VIA-20R10
1
ZT67
HOLE-VIA-20R10
1
ZT37
HOLE-VIA-20R10
1
ZT29
HOLE-VIA-20R10
1
ZT31
HOLE-VIA-20R10
1
ZT1
HOLE-VIA-20R10
1
ZT12
HOLE-VIA-20R10
1
ZT14
HOLE-VIA-20R10
1
ZT27
HOLE-VIA-20R10
1
ZT26
HOLE-VIA-20R10
1
ZT13
HOLE-VIA-20R10
1
ZT30
HOLE-VIA-20R10
1
ZT33
HOLE-VIA-20R10
1
ZT18
HOLE-VIA-20R10
3
2
1
SH1
SHLD-SM
OG-503040
CHGND5
1
ZT7
HOLE-VIA-20R10
1
ZT21
HOLE-VIA-20R10
1
ZT59
HOLE-VIA-20R10
1
ZT58
HOLE-VIA-20R10
1
ZT85
HOLE-VIA-20R10
1
ZT86
HOLE-VIA-20R10
1
ZT16
HOLE-VIA-20R10
1
ZT74
HOLE-VIA-20R10
1
ZT36
HOLE-VIA-20R10
1
ZT23
HOLE-VIA-20R10
1
ZT42
HOLE-VIA-20R10
CHGND2
CHGND1
CHGND3
1
ZT76
HOLE-VIA-20R10
1
ZT41
HOLE-VIA-20R10
1
ZT40
HOLE-VIA-20R10
1
ZT39
HOLE-VIA-20R10
1
ZT38
HOLE-VIA-20R10
1
ZT61
HOLE-VIA-20R10
1
ZT64
HOLE-VIA-20R10
1
ZT68
HOLE-VIA-20R10
1
ZT69
HOLE-VIA-20R10
1
ZT72
HOLE-VIA-20R10
1
ZT28
HOLE-VIA-20R10
1
ZT46
HOLE-VIA-20R10
1
ZT71
HOLE-VIA-20R10
1
ZT78
HOLE-VIA-20R10
1
ZT80
HOLE-VIA-20R10
1
ZT51
HOLE-VIA-20R10
1
ZT50
HOLE-VIA-20R10
1
ZT52
HOLE-VIA-20R10
1
ZT53
HOLE-VIA-20R10
1
ZT57
HOLE-VIA-20R10
1
ZT82
HOLE-VIA-20R10
1
ZT60
HOLE-VIA-20R10
1
ZT22
HOLE-VIA-20R10
1
ZT17
HOLE-VIA-20R10
1
ZT35
HOLE-VIA-20R10
1
ZT45
HOLE-VIA-20R10
1
ZT79
HOLE-VIA-20R10
1
ZT83
HOLE-VIA-20R10
1
ZT81
HOLE-VIA-20R10
1
ZT49
HOLE-VIA-20R10
1
ZT47
HOLE-VIA-20R10
1
ZT48
HOLE-VIA-20R10
1
ZT54
HOLE-VIA-20R10
1
ZT55
HOLE-VIA-20R10
1
ZT56
HOLE-VIA-20R10
1
ZT5
HOLE-VIA-20R10
1
ZT84
HOLE-VIA-20R10
1
ZT15
HOLE-VIA-20R10
1
ZT44
HOLE-VIA-20R10
1
ZT4
HOLE-VIA-20R10
1
ZT8
HOLE-VIA-20R10
1
ZT6
HOLE-VIA-20R10
1
ZT3
HOLE-VIA-20R10
1
ZT32
HOLE-VIA-20R10
1
ZT10
HOLE-VIA-20R10
1
ZT34
HOLE-VIA-20R10
1
ZT11
HOLE-VIA-20R10
1
ZT20
HOLE-VIA-20R10
1
ZT43
HOLE-VIA-20R10
444
B
051-6809
NO_TEST=TRUE
ZT301_SPN
ZT302_SPN NO_TEST=TRUE
ZT10_SPN NO_TEST=TRUE
PG EN
VIN
ADJ
VOUT
GND
QACK*
TEA*
A10
MCP*
A23
A28 A29
TRST*
PMON_OUT*
A7
SHD1* HIT*
SHD0*
ARTRY*
AACK*
CI*
WT*
GBL*
TBST*
TS*
BG*
BR*
GND
VDD
A1 A2
A11
A5
A4
A3
A6
A8 A9
A12
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A32
A31
A30
A27
A24 A25
AP1
AP4
AP2 AP3
AP0
A35
A34
A33
TT0
TT4
TSIZ1 TSIZ2
TSIZ0
TT1 TT2 TT3
DTI3
DTI2
TDI TDO TMS TCK
A26
BMODE0*
PMON_IN*
BMODE1*
DTI1
A0
DTI0
LSSD_MODE*
TA*
L2_TSTCLK
L1_TSTCLK
EXT_QUAL
CHKS*
DX*
SRW0*
IARTRY0*
SRW1*
(1 OF 3)
HRESET*
SRESET*
TBEN
QREQ*
CKSTP_IN*
CKSTP_OUT*
SYSCLK
INT* SMI*
PLL_CFG1
CLK_OUT
OVDD
PLL_CFG0
PLL_CFG3
DRDY*
DBG*
PLL_CFG2
PLL_CFG4
BVSEL
AVDD
OVDDSENSE
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
Place R449 & R452 close to U5 pin 6&5
(R1)
For CPU DFS mode, Must stuff R748
Vout=0.59*(1+R1/R2)
R1
CPU_OVDD DECOUPLING NETWORK
CPU_VCORE DECOUPLING NETWORK
CPU INTERNAL PLL FILTERING
NC
NC NC NC NC NC
NC
MPC7447 MAXBUS
470OHM FOR BOOT BANGER
MPC7447 PULL-UPS
R2
MORE 0805 10UF CAPS ON VCORE POWER SUPPLY PAGE (PG 32)
470OHM FOR BOOT BANGER
470OHM FOR BOOT BANGER
(Nap Voltage=0.98V for both Config.)
21
R46
402
MF
1/16W
5%
10K
21
R13
10K
402
MF
1/16W
5%
21
R20
1/16W
402
MF
5%
10K
21
R32
402
MF
1/16W
5%
470
21
R11
5%
1/16W
MF
402
10K
2
1
R10
200
5% 1/16W MF
NO_BBANG
402
21
R4
5%
10K
1/16W
MF
402
21
R7
5%
402
MF
1/16W
1K
21
R24
10K
5%
402
MF
1/16W
21
R34
5%
402
MF
1/16W
10K
2
1
C89
20% CERM
10V
0.1uF
402
2
1
C73
0.1uF
CERM
10V
20%
402
2
1
C18
0.1uF
20%
402
10V CERM
2
1
C20
10V 402
CERM
20%
0.1uF
2
1
C75
CERM
20%
402
10V
0.1uF
2
1
C9
0.1uF
20% 10V
402
CERM
2
1
C49
10V CERM
0.1uF
402
20%
2
1
C46
0.1uF
10V
20%
402
CERM
2
1
C30
0.1uF
20% CERM
10V 402
2
1
C56
10V
0.1uF
20%
402
CERM
2
1
C45
0.1uF
20% 10V
402
CERM
2
1
C48
0.1uF
CERM
10V
20%
402
2
1
C44
0.1uF
20% 402
CERM
10V
2
1
C86
402
10V
20% CERM
0.1uF
2
1
C88
10V 402
CERM
20%
0.1uF
2
1
C10
20%
402
CERM
10V
0.1uF
2
1
C38
0.1uF
20% CERM
402
10V
2
1
C72
CERM 402
10V
20%
0.1uF
2
1
R89
MF
5%
470
1/16W
402
2
1
C50
10V
0.1uF
402
CERM
20%
2
1
C28
20% 10V
402
0.1uF
CERM
2
1
C39
402
20% 10V
0.1uF
CERM
2
1
C47
0.1uF
CERM 402
20% 10V
2
1
C26
20%
402
0.1uF
CERM
10V
2
1
C31
0.1uF
20% 10V
402
CERM
2
1
R38
470
5%
1/16W
MF
402
21
R36
10K
5%
1/16W
MF
402
21
R45
470
5%
1/16W
MF
402
21
R28
MF
1/16W
402
10K
5%
21
R3
1K
1/16W
MF
402
5%
C32
10uF
805
CERM
6.3V
20%
2
1
C33
10uF
805
CERM
20%
6.3V
C59
805
CERM
6.3V
20%
10uF
2
1
C58
6.3V
20% CERM
805
10uF
21
R27
10K
402
1/16W
5% MF
21
R33
10K
5% MF
402
1/16W
2
1
C62
2.2uF
10V 805
CERM
20%
2
1
C34
2.2uF
20%
805
10V CERM
21
R25
402
MF
1/16W
10K
5%
21
R8
402
MF
1/16W
5%
10K
21
R281
0
5%
1/16W
MF
603
1_5V_MAXBUS
21
R283
0
5%
1/16W
MF
603
1_8V_MAXBUS
+1_5V_SLEEP
+1_8V_SLEEP
2
1
R9
1/16W
470
5% MF
402
BBANG
21
R2
470
MF
402
5%
1/16W
2
1
C29
CERM
10V 402
20%
0.1uF
2
1
C27
402
10V CERM
20%
0.1uF
2
1
C25
20% CERM
10V 402
0.1uF
2
1
C54
CERM
10V 402
20%
0.1uF
2
1
C53
402
CERM
10V
0.1uF
20%
2
1
C55
20% 10V
402
CERM
0.1uF
2
1
C87
0.1uF
20% CERM
402
10V
2
1
C69
10V 402
CERM
0.1uF
20%
2
1
C17
20% CERM
402
10V
0.1uF
2
1
C82
0.1uF
10V 402
20% CERM
2
1
C81
0.1uF
20% 10V
402
CERM
2
1
C61
0.1uF
10V 402
20% CERM
21
R6
10K
402
MF
1/16W
5%
21
R37
1/16W
5% MF
402
10K
21
R19
10K
402
MF
1/16W
5%
21
R26
10K
402
MF
1/16W
5%
2
1
C2
10V
20% CERM
402
0.1uF
2
1
C103
20% CERM
402
0.1uF
10V
2
1
C68
CERM
0.1uF
10V
20%
402
2
1
C109
20% CERM
10V
0.1uF
402
2
1
C107
CERM
20%
0.1uF
10V 402
2
1
C104
10uF
805
CERM
20%
6.3V 2
1
C108
10V CERM
20%
0.1uF
402
2
1
C110
0.1uF
20% CERM
10V 402
2
1
C1
10V 402
0.1uF
20% CERM
21
XW34
SM
OMIT
61
4
2
3 5
U5
FAN2558
SOT23-6
2
1
R449
110K
CPU_BST
1% 1/16W
402
MF
2
1
R452
1% 1/16W
402
100K
MF
2
1
C102
1uF
10%
6.3V CERM 402
2
1
C85
CERM1
603
10%
2.2uF
6.3V
2
1
R302
1/16W
MF
603
0
5%
+3V_SLEEP
2 1
R748
1/16W
MF
1%
10
402
2 1
R453
10
1%
1/16W
NO STUFF
MF
402
R455
5%
1/16W
402
MF
100K
2 1
D17
SM
MBR0530
2
1
C502
10V CERM 402
20%
0.1uF
2
1
C626
0.001uF
10% 50V
402
CERM
2
1
R755
0
5% 1/16W MF 402
2
1
R775
NO STUFF
200K
5% 1/16W MF 402
D3
K10
K8
J13
J11
J9J7H12
H10
M12
M10
M8
L13
L11
L9L7K14
K12
H8
C5
E9
F6
E6
E5
E7
F7
G6
L4
A5
F1
L1
A4
B9
C6
F11
E1
K6
A10
E10
B10
A2
F9
H5
E4
P4 G5
A9
D9
A7
D7
C7
C8
B8
G18
E18
L5K2J5H3F2D5C12
V14
V10
V7V4U16
U12
U2C2T9T6R16
R13
R4
P11
P8P2N6
M3
B4
C9
E8
B3
G8
D4
B6
D8
B2
H7
H4
G17
F3
E17
V15
V11
V8
V5
U17
U13
U3
D13
T10
T7
R17
R14
R5
P12
P9P3N7
M13D6M11
M9M7M4
L12
L10
L8
L6
K13
K11
C3
K9K3K7
J12
J10
J8
J6
H13
H11
H9
B5
E2
A11
D10
N1
P1
K1
G1
R3
M2
H2
B1
A3
J1
A12
B7D2
F8
G9
M1
A8
N2
G7
F5
H6
E3
C1
R1
G2
C10
D1
D11
L2
F10
B11
G10
C4
B12
W1
N5
G3
U1
V2
T1
N3
P5
M5
J3
N4
K4
J2
C11
W2
K5
R2
J4
V1
F4
T2
G4
L3
D12
H1
E11
U56
APOLLO7-V1.1.1
OMIT
1.25GHZ-1.24V-20W-85C
BGA
2
1
C810
402
0.1uF
CERM
20% 10V
2
1
C811
6.3V
4.7uF
20% 805
CERM
CPU_BST_R12
337S2993
IC,A7PM,R1.2,1.5GHZ,1.24VCORE,85C
U56
CRITICAL
1
RES,MF,1/16W,100k ohm,1%,0402,SMD
114S1005
1
CPU_BTR
R449
CPU_BST_R111
IC,A7PM,R1.1.1,1.5GHZ,1.24VCORE,85C
337S2912
U56
CRITICAL
1
CPU_BTR_R111
U56
CRITICAL
IC,A7PM,R1.1.1,1.33GHZ,1.18VCORE,85C
1
337S2913
B
5 44
051-6809
VCORE_SHDN_L_3V
VCORE_SHDN_L
CPU_SRESET_L
CPU_AVDD_SHDN_L
JTAG_CPU_TMS
MPIC_CPU_INT_L
JTAG_CPU_TDI
CPU_SMI_L
CPU_EMODE1_L
CPU_PMONIN_L
CPU_CHKSTP_OUT_L
CPU_L2TSTCLK
CPU_MCP_L
CPU_LSSD_MODE
CPU_SHD0_L
CPU_SHD1_L
CPU_CHKS_L
CPU_TBEN
MAXBUS_SLEEP
JTAG_CPU_TRST_L
MAXBUS_SLEEP
CPU_VCORE_SLEEP
CPU_EDTI
CPU_L1TSTCLK
JTAG_CPU_TCK
CPU_PULLDOWN
CPU_HRESET_L
CPU_SRWX_L
CPU_AVDD_VIN
CPU_PULLUP
CPU_AVDD_ADJ
CPU_AVDD_VOUT
CPU_ADDR<1>
CPU_PLL_CFG<4>
CPU_PLL_CFG<1>
CPU_DBG_L
CPU_PLL_CFG<3>
CPU_DRDY_L CPU_EDTI CPU_DTI<0> CPU_DTI<1> CPU_DTI<2>
JTAG_CPU_TDI
JTAG_CPU_TMS
CPU_TBEN
CPU_MCP_L
CPU_CHKSTP_OUT_L
CPU_ADDR<18>
CPU_PLL_CFG<2>
CPU_ADDR<2>
CPU_ADDR<0>
CPU_CHKS_L
CPU_PULLDOWN
CPU_ADDR<16>
CPU_ADDR<21>
CPU_PMONIN_L
CPU_EMODE0_L
JTAG_CPU_TDO_TP
JTAG_CPU_TCK
CPU_ARTRY_L CPU_SHD0_L
CPU_HIT_L
CPU_SHD1_L
CPU_BR_L CPU_BG_L
CPU_TS_L
CPU_ADDR<3> CPU_ADDR<4>
CPU_ADDR<6>
CPU_ADDR<5>
CPU_ADDR<9>
CPU_ADDR<8>
CPU_ADDR<11>
CPU_ADDR<10>
CPU_ADDR<12>
CPU_ADDR<14>
CPU_ADDR<13>
CPU_ADDR<15>
CPU_ADDR<17>
CPU_ADDR<19> CPU_ADDR<20>
CPU_ADDR<22>
CPU_ADDR<24>
CPU_ADDR<23>
CPU_ADDR<25> CPU_ADDR<26> CPU_ADDR<27> CPU_ADDR<28> CPU_ADDR<29>
CPU_ADDR<31>
CPU_ADDR<30>
CPU_TT<0> CPU_TT<1>
CPU_TT<3>
CPU_TT<2>
CPU_TBST_L
CPU_TT<4>
CPU_TSIZ<0>
CPU_TSIZ<2>
CPU_TSIZ<1>
CPU_WT_L
CPU_GBL_L
CPU_CI_L CPU_AACK_L
CPU_ADDR<7>
CPU_QACK_L
CPU_TA_L
SYSCLK_CPU
CPU_PULLDOWN
CPU_EMODE1_L
CPU_CLKOUT_SPN
NO_TEST=TRUE
CPU_LSSD_MODE
JTAG_CPU_TRST_L
CPU_L2TSTCLK
CPU_L1TSTCLK
CPU_SRWX_L
CPU_PULLUP
CPU_PULLDOWN
CPU_TEA_L
CPU_HRESET_L
CPU_SRESET_L
CPU_VCORE_SLEEP
CPU_AVDD
MPIC_CPU_INT_L CPU_SMI_L
CPU_QREQ_L
CPU_PLL_CFG<0>
CPU_BUS_VSEL
MAXBUS_SLEEP
38
38
38
33
33
33
16
16
16
15
15
39
39
15
8
8
38
39
39
38
8
39
39
7
39
7
33
39
7
39
39
39
39
7
33
7
39
6
14
6
29
39
8
6
6
6
6
6
6
36
36
36
36
36
36
6
6
8
39
36
36
36
36
36
6
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
35
6
36
6
39
6
14
29
36
6
33
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
25
5
5
5
5
5
5
5
5
5
38
5
38
8
7
7
8
7
8
5
8
8
8
5
5
5
5
5
8
7
8
8
5
5
8
8
5
7
39
5
8
5
8
5
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
5
5
5
5
5
5
5
5
5
8
5
5
5
38
5
5
8
7
7
5
VCC
RESET* XTAL1 XTAL2 PB0
PD6
PD5
PD4
PD3
PD2
PD1
PD0
GND
PB1 PB2 PB3 PB4 PB5 PB6 PB7
SYM_VER2
WC*
VCC
VSS
SDA SCL
NC1 NC2 NC3
Y
B
A
Y
B
A
VDD
N/C_1
N/C_4
N/C_8
N/C_13
N/C_17
N/C_20
N/C_22 N/C_23
N/C_31
N/C_39
N/C_30
N/C_33
N/C_35 N/C_36
N/C_38
N/C_29
N/C_28
N/C_27
N/C_25
N/C_24
N/C_21
N/C_19
N/C_18
N/C_16
N/C_15
N/C_14
N/C_12
N/C_11
N/C_10
N/C_9
N/C_7
N/C_6
N/C_5
N/C_3
N/C_2
(3 OF 3)
N/C_26
N/C_32
N/C_34
N/C_37
SENSEVDD
GND
TEMP_CATHODE
TEMP_ANODE
SENSEGND
HPR*
D22
D3
D2
D1
D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21
D28
D27
D23 D24 D25 D26
D29
D32
D31
D30
D33 D34 D35 D36 D37 D38 D39 D40 D41 D42 D43 D44
D48
D47
D45 D46
D49
D51
D50
D52 D53 D54 D55
D58
D57
D56
D59
DP6
DP5
DP4
DP3
DP2
DP1
DP0
DP7
D63
D62
D61
D60
D0
(2 OF 3)
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
NC
(Rb)
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
MPC7447/BBANG
NC
NC
NC
NC NC NC
NC
NC
NC
NC NC
NC
NC
NC
NC
NC
NC
NC
NC
NC NC NC
NC
NC
NC
NC
INPUTS ARE 3V TOLERANT
BOOT BANGER - TWEAK PROCESSOR BITS AFTER POWER-ON
(Ra)
NC
INPUTS ARE 3V TOLERANT
NC
009-6240 FW GT4 BBANGER
WILL DISABLE THE CONTROLLER
UNSTUFFING Ra AND STUFFING Rb
NC
+3V_SLEEP
9
8
7
6
4
3
2
1
10
5
RP46
BBANG
10K
5%
1/32W
25V
SM
2
1
C762
0.1uF
402
CERM
10V
20%
BBANG
2
1
R692
BBANG
603
MF
1/16W
1%
10K
2
1
R709
10K
603
MF
1/16W
1%
NO STUFF
2
1
R707
10K
1% 1/16W MF 603
BBANG
2
1
R712
10K
1% 1/16W
BBANG
603
MF
+3V_SLEEP
4
5
20
1
11
9
8
7
6
3
2
19
18
17
16
15
14
13
12
10
U54
AT90S1200A
SSOP
OMIT
2
1
C120
0.1uF
402
20% 10V CERM
BBANG
+3V_SLEEP
7
4
8
5 6
3
2
1
U52
32KX8_M24256B
SOI
BBANG
2
1
R100
10K
5%
1/16W
MF
402
BBANG
4
5
3
2
1
U9
BBANG
SC70-5
SN74AUC1G08
21
R104
402
MF
1/16W
5%
0
NO_BBANG
+3V_SLEEP
2
1
R103
10K
5%
1/16W
MF
402
BBANG
4
5
3
2
1
U10
BBANG
SN74AUC1G08
SC70-5
2
1
R105
BBANG
402
MF
1/16W
5%
10K
2
1
R637
10K
1% 1/16W MF 603
BBANG
P18
P16
N17
N15
M18
M16
M14
H19
H17
H14
G16
G11
F19
F17
F12
E16
E13
C13
B19
B17
A18
A16
A13
N19
N18
G13
N12
G12
N13
B15
A15
G14
F14
E14
D14
L19
K19
J19
L18
K18
J18
L17
K17
J17
L16
C14
K16
J16
H16
D19
C19
D18
C18
D17
C17
D16
B14
C16
L15
K15
J15
H15
G15
F15
E15
D15
C15
A14
A6
P19
P15
N16
N14
M19
M17
M15
L14
J14
H18
G19
F18
F16
F13
E19
E12
B18
B16
B13
A19
A17
U56
OMIT
APOLLO7-V1.1.1
BGA
1.25GHZ-1.24V-20W-85C
W6
N8
V3
M6
W9
T4
W4
T3
W13
V13
P14
T8
W8
R8
P6
U15
R7
U7
U8
U4
V17
W3
T17
T18
T16
W18
T15
W17
U18
W19
U19
T19
V19
R18
V18
R19
P17
W16
V6
P7
R6
W7
U5
T5
U6
W5
V9
U9
V16
W10
R9
U10
P10
N9
R10
T11
W11
U11
R11
T14
N10
N11
V12
W12
T12
R12
W14
U14
P13
T13
W15
R15
U56
OMIT
APOLLO7-V1.1.1
1.25GHZ-1.24V-20W-85C
BGA
446
B
051-6809
MCU,PROGRAMMED W/ BBANGER
341S1135
BBANG
U541
PMU_CPU_HRESET_L
RESET_VREF BBANG_HRESET_L INT_I2C_CLK0
BB_XTAL1_SPN
BFR_TDO
INT_I2C_DATA0
BBANG_HRESET_L
ICT_TRST_L
BFR_TDO
ESP_EN_L
BBANG_JTAG_TCK BB_MOSI BB_MISO BB_SCK BB_EEPR_ADDR
JTAG_CPU_TCK
BBANG_JTAG_TCK
BBANG_TCK_EN
MAXBUS_SLEEP
BB_RESET_L
ESP_EN_L
BBANG_JTAG_TCK
JTAG_CPU_TDI
BB_MOSI
BB_SCK
BB_EEPR_WP_PD
INT_I2C_CLK0
INT_I2C_DATA0
ICT_TRST_L
CPU_HRESET_L
MAXBUS_SLEEP
BB_MISO
JTAG_CPU_TMS
JTAG_CPU_TRST_L
PMU_CPU_HRESET_L
BB_EEPR_ADDR
CPU_VCORE_SLEEP
CPU_THERM_DP
CPU_THERM_DM
CPU_DATA<63>
CPU_DATA<62>
CPU_DATA<61>
CPU_DATA<60>
CPU_DATA<59>
CPU_DATA<58>
CPU_DATA<57>
CPU_DATA<56>
CPU_DATA<55>
CPU_DATA<53> CPU_DATA<54>
CPU_DATA<52>
CPU_DATA<51>
CPU_DATA<50>
CPU_DATA<49>
CPU_DATA<48>
CPU_DATA<46> CPU_DATA<47>
CPU_DATA<45>
CPU_DATA<44>
CPU_DATA<43>
CPU_DATA<41> CPU_DATA<42>
CPU_DATA<40>
CPU_DATA<38> CPU_DATA<39>
CPU_DATA<36> CPU_DATA<37>
CPU_DATA<35>
CPU_DATA<33> CPU_DATA<34>
CPU_DATA<32>
CPU_DATA<31>
CPU_DATA<30>
CPU_DATA<29>
CPU_DATA<28>
CPU_DATA<27>
CPU_DATA<26>
CPU_DATA<25>
CPU_DATA<24>
CPU_DATA<23>
CPU_DATA<22>
CPU_DATA<21>
CPU_DATA<20>
CPU_DATA<19>
CPU_DATA<18>
CPU_DATA<17>
CPU_DATA<16>
CPU_DATA<15>
CPU_DATA<14>
CPU_DATA<13>
CPU_DATA<12>
CPU_DATA<11>
CPU_DATA<10>
CPU_DATA<9>
CPU_DATA<7> CPU_DATA<8>
CPU_DATA<5> CPU_DATA<6>
CPU_DATA<4>
CPU_DATA<3>
CPU_DATA<2>
CPU_DATA<1>
CPU_DATA<0>
38
38
33
33
16
16
39
39
15
39
39
15
23
23
8
23
23
8
39
39
13
13
7
13
13
39
7
39
38
29
11
11
39
6
39
11
11
7
6
39
39
29
33
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
6
6
6
6
6
6
6
6
6
6
6
6
6
6
5
6
5
39
6
6
5 6
6
6
6
6
5
5
6
5
5
6
6
5
25
25
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
G
D
S
G
D
S
04
G
D
S
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
+5V_SLEEP NOW REQUIRED FOR PLL_STOP_L PULLUP TO ENSURE THAT Vgs OF PASS TRANSISTOR ON CPU_PLL_CFG<4> IS MET.
R10ER01ER00D
R10E, R01E, OR PULLUP STUFFED
STUFF PASS TRANSISTOR ONLY IF
R00AR01A R10D
7.0X 1250
1 0111 17 0 0111 07 1 1010 1A
0 0110 06
0 1100 0C
10671333
1000
4.0X
R10CR00CR01CR10BR00BR10A R00E
E ABCD HEX
4 0123
CPU CONFIGURATION
1 1110 1E
12671583
11331417
1500 1200
21.0X
20.0X
18.0X
17.0X
13.5X
13.0X
12.5X
11.5X
12.0X
11.0X
10.5X
10.0X
14.0X
15.0X
16.0X
28003500
2167 2250
2833 3000 3333
2000 2083
2667
2500
2333 1867
2000 2133
1733 1800
2267 2400 2667
1600 1667
1 0100 14
1 1111 1F
1 1011 1B
1 0011 13
1 0010 12
1 0000 10
0 1110 0E
1 0101 15
1 1101 1D
1 0001 11
1 1100 1C
1533
1400
1333
1467
1917
1750
1667
1833
1 1001 19
1 1000 18
0 0000 00
24.0X
28.0X 4667 3733
4000 3200
1 0110 16
1167
1083
1000
0 0001 01
0 0010 02
0 0101 05
0 1101 0D
0 1010 0A
0 1000 08
0 0100 04
0 0011 03PLL BYPASS
167MHZ
CORE FREQUENCY
(AT BUS FREQUENCY)
CPU_PLL_CFG
0 1111 0F
(Bus-to-Core)
133MHZ
PLL OFF
(MHZ)
CPU FREQUENCY CONFIGURATION
LOW SPEED 0 0 HIGH SPEED 0 1 PLL DISABLE 1 X
APOLLO 7
0.0X
1.0X
2.0X
3.0X
6.0X
6.5X
7.5X
9.0X
8.0X
8.5X
9.5X
667
500
333
5.5X
5.0X 833
917
0 1001 09
0 1011 0B
667 733 800 867
533
400
267
933
1.8V INTERFACE
NEED TO CHARACTERIZE
INVERTER TO INVERT HRESET_L
DESKTOP HAD PROBLEM USING
MAX BUS MODE
APPLICATION
60X BUS MODE
2.5V INTERFACE
1.5V INTERFACE
1.8V INTERFACE
LOW
HIGH
TIED
CPU_HRESET_L
CPU_HRESET_INV
CPU_HRESET_L
CPU_EMODE0_L (PROCESSOR)
SIGNAL
CPU_BUS_VSEL
(PROCESSOR)
APOLLO ONLY SUPPORTS MAXBUS
BUSTYPE SELECT
INVERTED HRESET_L
1.5V INTERFACE
MAXBUS VSEL
CPU CONFIGURATION
STATE ENCODING CPU_PLL_STOP_OC CPU_VCORE_HI_OC
MULTIPLIER
R01DR01B
CPU PLL CONFIG CIRCUITRY
2
1
R63
MF
1/16W
NO STUFF
0
5%
402
2
1
R92
1/16W
NO STUFF
402
MF
0
5%
2
1
R35
10K
1/16W 402
MF
5%
2
1
R50
10K
1/16W 402
MF
5%
2
1
R68
402
1/16W
5%
10K
MF
2
1
R79
10K
402
MF
1/16W
5%
2
1
R133
47K
MF
1/16W
5%
402
2
1
R132
10K
MF
1/16W
5%
402
2
1
R14
5%
1/16W
MF
402
82K
2
1
R31
0
5% 1/16W
402
MF
NO STUFF
2
1
R23
NO STUFF
5% 1/16W MF 402
0
4
5
3
Q14
2N7002DW
SOT-363
1
2
6
Q14
2N7002DW
SOT-363
4
5
3
2
U12
1_5V_MAXBUS
SN74AUC1G04
SC70-5
2
1
R12
CPU_BTR
5%
0
1/16W MF 402
1
2
6
Q3
CPU_BST
2N7002DW
SOT-363
4
5
3
Q3
SOT-363
2N7002DW
CPU_BST
+5V_SLEEP
1 2
R5
1_5V_MAXBUS
402
22
5% MF
1/16W
2
1
R70
5%
0
402
MF
1/16W
CPU_BTR
2
1
R18
402
10K
5% 1/16W MF
CPU_BST
1 2
R110
402
5% MF
1/16W
22
2
1
R17
1_8V_MAXBUS
402
1/16W
5% MF
10
2
1
3
Q13
SM
2N7002
2
3
1
Q12
2N3904
SM
21
R131
1%
1/16W
MF
402
249K
2
1
R43
0
CPU_BST
402
1/16W
5% MF
+3V_SLEEP
2
1
R44
NO STUFF
0
5% 1/16W MF 402
2
1
R48
NO STUFF
5% MF
1/16W
0
402
2
1
R60
NO STUFF
0
5% 1/16W MF 402
2
1
R64
NO STUFF
1/16W
5%
0
402
MF
2
1
R76
1/16W MF 402
NO STUFF
0
5%
2
1
R84
CPU_BTR
1/16W 402
0
5% MF
2
1
R78
NO STUFF
402
MF
1/16W
5%
0
2
1
R88
NO STUFF
402
1/16W
0
5% MF
44
7
B
051-6809
CPU_PLL_CFG<0>
CPU_EMODE0_LCPU_HRESET_L
CPU_HRESET_L
CPU_HRESET_INV
MAXBUS_SLEEP
CPU_BUS_VSEL
CPU_VCORE_HI_OC
CPU_PLL_STOP_OC
PLL_STOP_L
CPU_PLL_STOP_OC
CPU_PLL_STOP_BASE
CPU_PLL_FS00
CPU_PLL_FS10
CPU_PLL_CFG<4>
PLL_STOP_L
CPU_PLL_FS01
CPU_PLL_CFG<3>
CPU_PLL_CFG<2>
CPU_PLL_CFG<1>
CPU_PLL_CFGEXT
MAXBUS_SLEEP
38
38
33
33
16
16
15
15
39
39
8
8
7
7
7
7
6
6
6
33
29
29
6
5
5 5
5
5
5
29
7
7
7
5
7
5
5
5
5
(PLL6)
VSSA_7
(PLL6)
VDD15A_7
D_42
D_41
D_40
D_39
D_38
D_44
D_43
D_45 D_46 D_47 D_48
D_52
D_51
D_50
D_49
D_53
D_55
D_54
D_56 D_57 D_58
D_60
D_59
D_62
D_61
D_63
DBG
DRDY
DTI_0
TEA
TA
DTI_2
DTI_1
D_1
D_0
D_2
D_6
D_5
D_4
D_3
D_7
D_11
D_10
D_9
D_8
D_12
D_14
D_13
D_15 D_16 D_17
D_22
D_21
D_20
D_19
D_18
D_23 D_24 D_25 D_26 D_27
D_32
D_31
D_30
D_29
D_28
D_34
D_33
D_35 D_36 D_37
BR
(1 OF 9)
MAXBUS
INTERFACE
TS
BG
A_0 A_1 A_2 A_3 A_4 A_5
A_9
A_6 A_7 A_8
A_10
A_14
A_13
A_12
A_11
A_20
A_16 A_17 A_18 A_19
A_15
A_27
A_22
A_21
A_30
A_29
A_28
A_26
A_25
A_24
A_23
TT_2
TT_1
TT_0
A_31
TBST TSIZ_0 TSIZ_1 TSIZ_2
CI GBL
TT_4
AACK
QREQ
ARTRY
TT_3
WT
HIT
ANALYZER_CLK
SUSPENDACK
SUSPENDREQ
QACK
STOPCPUCLK
CPU_FB_OUT
CPU_FB_IN
CPU_CLK
TBEN
ACS_REF
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
Spare
2/ D46 - SELPCI1SPREADCLK - SLEEP/WAKE CYCLE REQUIRED
FB BUFFER HAS 50 OHM OUTPUT IMPEDANCE
1: PLL4
0: PLL5 (no spread)
1: PLL4
0: PLL5 (no spread)
BIT 40 TO 47
0: Active high
INTREPID BOOT STRAPS
1: Active
OBSOLETE (Should remain high)
OBSOLETE
1: 0-1 IDE / 2-3 PCI1
ROM_Ovrly_Rng
1: BootROM on PCI1
0: BootROM on IDE/CardSlot
En_PCI_ROM_P
1: External source
SelPLL4ExtSrc
1: TI PHY workaround
011: 33.3 ohm 101: 40 ohm
110: 66.6 ohm
0: PLL5
BUF_REF_CLK_OUTEnable_h
0: Inactive
1: Active
1/ D47 - SELAGPSPREADCLK - SLEEP/WAKE CYCLE REQUIRED 3/ D44 - PLL4MODESEL_NXT<0> - SLEEP/WAKE CYCLE REQUIRED
4/ D43 - PLL4MODESEL_NXT<1> - SLEEP/WAKE CYCLE REQUIRED 5/ D42 - PLL4MODESEL_NXT<2> - SLEEP/WAKE CYCLE REQUIRED 6/ D33 - ANALYZERCLK_EN_H - IMMEDIATE EFFECT
IF A STRAP IS NOT LISTED, THEN IT CANNOT BE CHANGED BY SOFTWARE
THE FOLLOWING STRAP BITS CAN BE CHANGED BY SOFTWARE:
LONG = 1" LONGER THAN MATCHED LENGTH
SHORT = 1" SHORTER THAN MATCHED LENGTH
INPUT - PU
INPUT - PD
NO BUS KEEPER - PU
NO BUS KEEPER - PU NO BUS KEEPER - PU
INPUT - PU
NO BUS KEEPER - PU
NO BUS KEEPER - PU
INPUT NO BUS KEEPER
NO BUS KEEPER
Vout = MaxBus rail (1.8V)
Vin = Intrepid Vcore (1.5V)
BIT2 BIT1 BIT0
BIT0BIT1
001: 50 ohm
010: 100 ohm 100: 200 ohm 000: 200 ohm
111: 28.6 ohm
MaxBus output impedance
100: 83.20MHZ
001: 149.76MHZ
INTREPID OUTPUTS HIGH BY DEFAULT
INTREPID BOOT STRAPS
0: TDI input (JTAG)
Spare
Spare
PCI1_REQ1_L / PCI1_GNT1_L
PCI1_REQ2_L / PCI1_GNT2_L
0: REQ/GNT
1: GPIOs
1: GPIOs
0: REQ/GNT
0: REQ/GNT
1: GPIOs
PCI1_REQ0_L / PCI1_GNT0_L
Processor Bus Mode
0: Legacy interface
1: B-mode interface
FireWire PHY interface
1: 60x bus (G3)
0: Max Bus (G4)
BIT 56 TO 63
0: Normal 1394b
TI 1394b workaround
Spare
Spare
BIT 48 TO 55
0: Inactive
Spare
AnalyzerClk_En_h
1: Active
0: Inactive
DDR_TPDEn_Pol
1: Active low
0: Active high
ExtPLL_SDwn_Pol
1: Active low
Spare
Spare
Spare
Intrepid MaxBus
NO BUS KEEPER - PU
MAXBUS PULL-UPS
011: 99.84MHZ (1.5X)
MODE A (2.5X) IS FOR STATIC OPERATION
DDR_TPDModeEnable_h
1: TDI output
BIT2
PLL4MODESEL_NXT[2:0] 000: 166.4MHZ (2.5X)
010: 133.12MHZ (2.0X)
MODE C (2.0X) IS FOR CLOCK SLEW OPERATION
InternalSpreadEn
(SW CNTL ONLY)
BIT 32 TO 39
2
1
R161
1K
1%
1/16W
MF
402
2
1
C187
0.22uF
402
CERM
6.3V
20%
21
R159
402
MF
1/16W
5%
4.7
21
R168
0
5%
1/16W
MF
402
2 1
R155
0
402
MF
1/16W
5%
2
1
R169
511
402
1%
1/16W
MF
2
1
R666
5%
1/16W
MF
402
10K
2
1
R638
10K
402
MF
1/16W
5%
NO STUFF
2
1
R639
5% MF
402
10K
NO STUFF
1/16W
2
1
R650
MF
402
10K
5%
1/16W
2
1
R652
5%
1/16W
MF
402
10K
2
1
R620
10K
402
MF
1/16W
5%
2
1
R621
10K
402
MF
1/16W
5%
2
1
R653
5%
1/16W
MF
402
10K
NO STUFF
2
1
R618
10K
402
MF
1/16W
5%
2
1
R619
5%
1/16W
MF
402
10K
2
1
R640
NO STUFF
5%
1/16W
MF
402
10K
2
1
R622
5%
1/16W
MF
402
10K
2
1
R699
10K
402
MF
1/16W
5%
NO STUFF
2
1
R693
5%
1/16W
MF
402
10K
NO_SSCG
2
1
R694
5%
1/16W
MF
402
10K
NO STUFF
2
1
R664
NO STUFF
10K
402
MF
1/16W
5%
2
1
R665
10K
402
MF
1/16W
5%
SSCG
2
1
R641
NO STUFF
5%
1/16W
MF
402
10K
2
1
R684
MF
5%
1/16W
402
10K
2
1
R679
5%
1/16W
MF
402
10K
2
1
R678
5%
10K
MF
1/16W
402
SSCG
2
1
R649
10K
402
MF
5%
1/16W
2
1
R651
MF
5%
NO_SSCG
10K
1/16W
402
2
1
R623
402
MF
1/16W
5%
10K
2
1
R677
5%
1/16W
MF
402
10K
2
1
R648
5%
1/16W
MF
402
10K
2
1
R642
10K
402
MF
1/16W
5%
NO STUFF
2
1
R698
5%
1/16W
MF
402
10K
2
1
R643
NO STUFF
5%
1/16W
MF
402
10K
2
1
R668
NO STUFF
10K
402
MF
1/16W
5%
2
1
R667
5%
1/16W
MF
402
10K
2
1
R695
10K
402
MF
1/16W
5%
SSCG
2
1
R626
5%
1/16W
MF
402
10K
2
1
R683
10K
402
MF
1/16W
5%
NO STUFF
2
1
R624
10K
402
MF
1/16W
5%
2
1
R625
5%
1/16W
MF
402
10K
2
1
R655
10K
402
MF
5%
1/16W
2
1
R654
NO STUFF
5%
1/16W
MF
402
10K
2
1
R680
10K
402
MF
1/16W
5%
NO_SSCG
2
1
R696
5%
1/16W
MF
402
10K
SSCG
2
1
R681
5%
1/16W
MF
402
10K
NO_SSCG
2
1
R646
NO STUFF
10K
402
MF
1/16W
5%
2
1
R644
5%
1/16W
MF
402
10K
2
1
R670
NO STUFF
10K
402
MF
1/16W
5%
2
1
R697
NO STUFF
5%
1/16W
MF
402
10K
2
1
R645
NO STUFF
10K
402
MF
1/16W
5%
2
1
R669
5%
1/16W
MF
402
10K
NO STUFF
2
1
R629
5%
1/16W
MF
402
10K
2
1
R658
5%
1/16W
MF
402
10K
2
1
R627
10K
402
MF
1/16W
5%
NO STUFF
2
1
R682
10K
402
MF
1/16W
5%
2
1
R628
5%
1/16W
MF
402
10K
2
1
R657
10K
402
MF
1/16W
5%
2
1
R685
5%
1/16W
MF
402
10K
2
1
R656
10K
402
MF
1/16W
5%
2
1
R146
NO STUFF
0
5%
1/16W
MF
402
21
R140
402
MF
1/16W
5%
0
2
1
R141
0
5%
1/16W
MF
402
21
R128
402
MF
1/16W
5%
0
NO STUFF
21
R147
0
5%
1/16W
MF
402
21
R136
0
5%
1/16W
MF
402
NO STUFF
D28
H25
H26
J25
D27
B28
G25
E25
D26
H24
G24
B27
E28
A28
A31
E27
AK9 AM8
AH9
A32
G27
B31
A29
D11
E12
A8
G20
B20
G19
E19
A9
D19
A20
J19
B19
H19
A19
A18
D18
B18
E18
B8
B17
A17
G18
D17
H18
J18
A16
E17
B16
A15
B9
H17
B15
G17
E16
D16
A13
A14
D15
J16
E15
H11
G16
A12
B14
D14
H15
B13
G15
B12
E14
H14
E11
G14
A11
D13
B11
G13
E13
D12
A10
J13
B10
G12
D10
B30
D29
K25
G28
A30H16
J24
J15
G26
E29 E26
E23
A25
D23
A26
B26
G23
A21
D20
E24
B21
E20
A22
H21
B22
H20
A23
D21
A24
E21
A27
G21
J21
E22
B23
B24
D22
G22
H22
B25
J22
D25
D24
H23
G8
H13
B29
U51
OMIT
INTREPID-REV2.1
BGA
CRITCAL
21
R152
10K
402
MF
1/16W
5%
21
R150
5%
1/16W
MF
402
10K
21
R151
10K
402
MF
1/16W
5%
81
RP2
SM1
1/16W
5%
10K
54
RP2
SM1
1/16W
5%
10K
72
RP2
SM1
10K
5%
1/16W
72
RP3
SM1
10K
5%
1/16W
81
RP3
SM1
10K
5%
1/16W
63
RP3
SM1
10K
1/16W
5%
54
RP3
SM1
1/16W
5%
10K
63
RP2
SM1
10K
1/16W
5%
44
8
B
051-6809
+1_5V_INTREPID_PLL
CPU_ADDR<7>
CPU_ADDR<3>
MAXBUS_SLEEP
CPU_DATA<39>
CPU_DATA<40>
CPU_DATA<47>
MAXBUS_SLEEP
CPU_DATA<42>
CPU_DATA<50>
CPU_DATA<53>
CPU_DATA<55>
CPU_DATA<43> CPU_DATA<44>
CPU_DATA<46>
CPU_DATA<41>
CPU_DATA<38>
CPU_DATA<34>
CPU_TSIZ<0>
CPU_GBL_L
SYSCLK_CPU
CPU_QREQ_L
CPU_DBG_L
CPU_BG_L
CPU_AACK_L
CPU_TEA_L
CPU_DRDY_L
CPU_HIT_L
CPU_ARTRY_L
CPU_BR_L
CPU_TS_L
CPU_TA_L
MAXBUS_SLEEP
CPU_DATA<37>
CPU_DATA<36>
CPU_DATA<33>
CPU_DATA<54>
CPU_DATA<45>
CPU_DATA<52>
CPU_DATA<51>
CPU_DATA<49>
CPU_DATA<48>
CPU_DATA<63>
CPU_DATA<62>
CPU_DATA<61>
CPU_DATA<60>
CPU_DATA<59>
CPU_DATA<58>
CPU_DATA<57>
CPU_DATA<56>
CPU_DATA<32>
INT_CPUFB_OUT
INT_CPUFB_OUT_SHORT
INT_CPUFB_IN
INT_CPUFB_OUT_NORM
INT_CPUFB_LONG
MAXBUS_SLEEP
+1_5V_INTREPID_PLL7
CPU_TEA_L
CPU_TA_L
CPU_DTI<2>
CPU_DTI<1>
CPU_DTI<0>
CPU_DRDY_L
CPU_DBG_L
CPU_DATA<63>
CPU_DATA<61> CPU_DATA<62>
CPU_DATA<60>
CPU_DATA<58> CPU_DATA<59>
CPU_DATA<57>
CPU_DATA<56>
CPU_DATA<55>
CPU_DATA<53> CPU_DATA<54>
CPU_DATA<52>
CPU_DATA<51>
CPU_DATA<48>
CPU_DATA<50>
CPU_DATA<49>
CPU_DATA<47>
CPU_DATA<46>
CPU_DATA<44> CPU_DATA<45>
CPU_DATA<43>
CPU_DATA<41> CPU_DATA<42>
CPU_DATA<40>
CPU_DATA<39>
CPU_DATA<38>
CPU_DATA<37>
CPU_DATA<36>
CPU_DATA<35>
CPU_DATA<34>
CPU_DATA<33>
CPU_DATA<32>
CPU_DATA<30> CPU_DATA<31>
CPU_DATA<29>
CPU_DATA<28>
CPU_DATA<27>
CPU_DATA<25> CPU_DATA<26>
CPU_DATA<24>
CPU_DATA<23>
CPU_DATA<22>
CPU_DATA<20> CPU_DATA<21>
CPU_DATA<19>
CPU_DATA<17> CPU_DATA<18>
CPU_DATA<16>
CPU_DATA<15>
CPU_DATA<14>
CPU_DATA<12> CPU_DATA<13>
CPU_DATA<11>
CPU_DATA<10>
CPU_DATA<7>
CPU_DATA<9>
CPU_DATA<8>
CPU_DATA<6>
CPU_DATA<5>
CPU_DATA<2>
CPU_DATA<4>
CPU_DATA<3>
CPU_DATA<0> CPU_DATA<1>
CPU_BR_L CPU_BG_L
CPU_TS_L
CPU_ADDR<1>
CPU_ADDR<0>
CPU_ADDR<2>
CPU_ADDR<4> CPU_ADDR<5> CPU_ADDR<6>
CPU_ADDR<8> CPU_ADDR<9> CPU_ADDR<10>
CPU_ADDR<12>
CPU_ADDR<11>
CPU_ADDR<14>
CPU_ADDR<13>
CPU_ADDR<15> CPU_ADDR<16> CPU_ADDR<17>
CPU_ADDR<19>
CPU_ADDR<18>
CPU_ADDR<20>
CPU_ADDR<22>
CPU_ADDR<21>
CPU_ADDR<24>
CPU_ADDR<23>
CPU_ADDR<25> CPU_ADDR<26> CPU_ADDR<27>
CPU_ADDR<29>
CPU_ADDR<28>
CPU_ADDR<30> CPU_ADDR<31>
CPU_CI_L
CPU_TBST_L
CPU_TSIZ<2>
CPU_TSIZ<1>
CPU_TT<1>
CPU_TT<0>
CPU_TT<2>
CPU_TT<4>
CPU_TT<3>
CPU_WT_L
CPU_AACK_L
CPU_HIT_L
CPU_ARTRY_L
CPU_QREQ_L
CPU_QACK_L INT_SUSPEND_REQ_L INT_SUSPEND_ACK_L
INT_CPUFB_IN INT_CPUFB_OUT SYSCLK_LA_TP
CPU_CLK_EN
SYSCLK_CPU_UF
INTREPID_ACS_REF
CPU_TBEN
MAXBUS_SLEEP
CPU_DATA<35>
38
38
38
38
38
33
33
33
33
33
16
16
16
16
16
15
15
15
15
15
8
8
8
8
8
38
7
36
36
36
7
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
7
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
7
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
7
36
14
36
36
6
8
8
8
6
8
8
8
8
8
8
8
8
8
8
36
36
35
8
8
8
8
8
8
8
8
8
8
8
6
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
35
35
6
8
8
36
36
36
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
8
8
8
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
8
8
8
8
36
35
35
6
8
12
5
5
5
6
6
6
5
6
6
6
6
6
6
6
6
6
6
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
8
35
8
35
35
35
5
38
5
5
5
5
5
5
5
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
29
29
8
8
29
35
5
5
6
DQ1
VCCVPP
DQ7
DQ4
DQ3
DQ2
DQ5 DQ6
DQ0
GND
PWD
WP
WE
OE
CE
A19
A18
A17
A20
A16
A15
A14
A13
A12
A11
A10
A7 A8 A9
A5
A4
A3
A2
A6
A1
A0
(2 OF 9)
DDR_VREF_1
DDR_VREF_0
DDR_DATA_0 DDR_DATA_1 DDR_DATA_2 DDR_DATA_3 DDR_DATA_4 DDR_DATA_5 DDR_DATA_6 DDR_DATA_7 DDR_DATA_8 DDR_DATA_9 DDR_DATA_10 DDR_DATA_11 DDR_DATA_12 DDR_DATA_13 DDR_DATA_14 DDR_DATA_15 DDR_DATA_16 DDR_DATA_17 DDR_DATA_18 DDR_DATA_19 DDR_DATA_20 DDR_DATA_21
DDR_DATA_25 DDR_DATA_26 DDR_DATA_27 DDR_DATA_28 DDR_DATA_29 DDR_DATA_30
DDR_DATA_33 DDR_DATA_34 DDR_DATA_35 DDR_DATA_36 DDR_DATA_37 DDR_DATA_38 DDR_DATA_39 DDR_DATA_40 DDR_DATA_41 DDR_DATA_42 DDR_DATA_43 DDR_DATA_44 DDR_DATA_45 DDR_DATA_46 DDR_DATA_47 DDR_DATA_48 DDR_DATA_49 DDR_DATA_50 DDR_DATA_51 DDR_DATA_52 DDR_DATA_53 DDR_DATA_54 DDR_DATA_55 DDR_DATA_56 DDR_DATA_57 DDR_DATA_58 DDR_DATA_59 DDR_DATA_60 DDR_DATA_61 DDR_DATA_62 DDR_DATA_63
DDR_DATA_22 DDR_DATA_23 DDR_DATA_24
DDR_DATA_31 DDR_DATA_32
DDR_BA_0 DDR_BA_1
DDRCS_3
DDRCS_2
DDRCS_1
DDRCS_0
DDR_DQS_7
DDR_DQS_6
DDR_DQS_5
DDR_DQS_4
DDR_DQS_3
DDR_DQS_2
DDR_DQS_1
DDR_DQS_0
DDR_DM_7
DDR_DM_6
DDR_DM_5
DDR_DM_4
DDR_DM_3
DDR_DM_2
DDR_DM_1
DDR_DM_0
DDRRAS DDRCAS
DDRWE DDRCKE0 DDRCKE1 DDRCKE2 DDRCKE3
DDR_MCLK_0_P DDR_MCLK_0_N DDR_MCLK_1_P DDR_MCLK_1_N DDR_MCLK_2_P DDR_MCLK_2_N DDR_MCLK_3_P DDR_MCLK_3_N DDR_MCLK_4_P DDR_MCLK_4_N DDR_MCLK_5_P DDR_MCLK_5_N
DDR_REF
DDR_SELHI_0 DDR_SELHI_1 DDR_SELLO_0 DDR_SELLO_1
MEMORY
DDR
INTERFACE
DDR_A_10 DDR_A_11 DDR_A_12
DDR_A_9
DDR_A_8
DDR_A_7
DDR_A_6
DDR_A_5
DDR_A_4
DDR_A_3
DDR_A_2
DDR_A_1
DDR_A_0
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
PINS ARE SWAPABLE FOR RPAKS
1MB BOOT ROM
INT - DDR/BOOTROM
CS
CKE
ADDR
BA
CNTL
’0’S ARE SAME POLARITY (ACTIVE-LO) ’1’S ARE SAME POLARITY (ACTIVE-HI)
’0’ & ’1’ GO TO SLOT A ’2’ & ’3’ GO TO SLOT B
’0’ & ’1’ GO TO SLOT A ’2’ & ’3’ GO TO SLOT B
MEM_VREF
after 2.5V I/O to Intrepid shuts off.
Weak pulldowns ensure CKEs stay low
SERIES RESISTORS FOR CLOCK/CONTROL SIGNALS
CLOCKS
INTERCEPTS ROM CHIP SELECT
OVERRIDE ROM MODULE
2
1
R260
INT_2_5V_COLD
10K
5% 1/16W MF 402
2
1
R265
INT_2_5V_COLD
402
MF
1/16W
5%
10K
12
9
11 3130
10
24
3923
35
34
33
32
28
27
26
25
22
7
8
14
15
16
17
18
38
19
37
13
40
1
2
3
4
5
6
36
20
21
U11
TSOP
1MX8-3.3V
OMIT
21
R1
NO STUFF
5%
0
1/16W
402
MF
21
R271
NO STUFF
5%
1/16W
MF
402
0
21
R194
NO STUFF
MF
1/16W
5%
0
402
2
1
R236
5%
0
1/16W 402
MF
NO STUFF
21
R176
22
5%
1/16W
MF
402
2
1
R209
1K
1% MF
402
1/16W
2
1
R208
10K
1%
1/16W
MF
402
2
1
C249
0.1uF
20% 10V
CERM
402
2
1
R202
10K
402
MF
1/16W
1%
2
1
C125
2.2uF
20% 805
CERM
10V
2
1
C773
402
CERM
10V
20%
0.1uF
2
1
C122
402
CERM
10V
20%
0.1uF
2
1
R112
5%
10K
1/16W
MF
402
+3V_MAIN
T22
Y22
T32
N30
AE29
AB32
AA22
W35 W36
V33 V32
W32 W33
Y30 W30
Y35 Y36
Y32 Y33
L32
N29
P32
V30
AB30
AD32
AH31
AJ31
L33
N32
T33
T35
AC35
AD33
AH33
AJ33
AG35
AG33
AJ36
K35
K36
J36
K33
AJ35
K32
J35
J33
J32
M30
N33
L36
M33
M35
L35
AJ32
M36
N35
R32
R33
R35
R36
P36
P35
R30
P33
AK36
T36
U35
U36
T30
V35
U32
U33
V36
AB33
AA32
AK35
AC36
AB35
AB36
AA33
AA35
AA36
AD35
AD36
AE33
AE35
AK31
AE36
AF36
AF35
AE32
AG31
AG32
AH32
AH36
AG36
AH35
AK33
AK32
M29
L30
H36
D36
G32
E36
E35
F35
F36
G36
D35
H33
G33
G35
H35
K30
L29
AL33
AL35
AN36
AN34
AL36
AM36
AM35
AN35
H32
U51
CRITICAL
INTREPID-REV2.1
BGA
OMIT
2
1
R691
402
MF
10K
5% 1/16W
21
R674
5%
1K
402
MF
1/16W
54
RP20
22
5%
1/16W
SM1
63
RP20
SM1
5%
22
1/16W
81
RP22
22
5%
1/16W
SM1
72
RP22
SM1
22
5%
1/16W
72
RP20
SM1
1/16W
5%
22
63
RP22
SM1
1/16W
5%
22
21
R162
22
402
MF
1/16W
5%
81
RP20
SM1
1/16W
5%
22
54
RP22
SM1
1/16W
5%
22
63
RP31
22
1/16W
5%
SM1
63
RP29
1/16W
5%
22
SM1
72
RP31
1/16W
5%
22
SM1
81
RP31
22
5%
1/16W
SM1
54
RP31
22
5%
1/16W
SM1
54
RP29
1/16W
5%
22
SM1
81
RP29
22
5%
1/16W
SM1
72
RP29
22
5%
1/16W
SM1
63
RP14
1/16W
5%
22
SM1
72
RP12
1/16W
5%
22
SM1
81
RP12
1/16W
5%
22
SM1
63
RP12
22
5%
1/16W
SM1
54
RP12
SM1
1/16W
5%
22
72
RP9
22
5%
1/16W
SM1
81
RP9
22
5%
1/16W
SM1
72
RP14
22
5%
1/16W
SM1
54
RP9
22
5%
1/16W
SM1
81
RP14
22
5%
1/16W
SM1
54
RP14
22
5%
1/16W
SM1
54
RP17
22
5%
1/16W
SM1
63
RP9
SM1
1/16W
5%
22
81
RP17
SM1
5%
22
1/16W
72
RP17
22
5%
SM1
1/16W
63
RP17
SM1
1/16W
5%
22
+3V_MAIN
2
1
R247
INT_2_5V_COLD
402
MF
1/16W
5%
10K
2
1
R257
INT_2_5V_COLD
402
MF
1/16W
5%
10K
44
9
B
051-6809
341S1542
IC,BootRom Q16A
CRITICAL
U11
1 ?
RAM_CKE<0>
MEM_ADDR<8>
ROM_CS_L
ROM_ONBOARD_CS_L
ROM_WP_L
ROM_RW_L
PCI_AD<20>
PCI_AD<19>
PCI_AD<18>
ROM_RW_TP_L
INT_RESET_L
PCI_AD<1>
PCI_AD<31>
PCI_AD<0>
PCI_AD<4> PCI_AD<5> PCI_AD<6>
PCI_AD<2>
SYSCLK_DDRCLK_B0_L
PCI_AD<3>
SYSCLK_DDRCLK_B1_L
SYSCLK_DDRCLK_A0_L_UF
PCI_AD<24>
PCI_AD<9> PCI_AD<10>
PCI_AD<25>
RAM_CS_L<2>
RAM_CS_L<3>
MEM_CS_L<2>
MEM_ADDR<3>
SYSCLK_DDRCLK_B1_UF
SYSCLK_DDRCLK_B0_UF
MEM_ADDR<6> MEM_ADDR<7>
SYSCLK_DDRCLK_B1_L_UF
ROM_CS_TP_L
MEM_CKE<0>
MEM_CS_L<1>
MEM_ADDR<12>
ROM_ONBOARD_CS_TP_L
RAM_CKE<2>
MEM_CS_L<0>
SYSCLK_DDRCLK_A0_L
RAM_CKE<1>
RAM_CKE<3>
RAM_CKE<0>
+2_5V_INTREPID
MEM_DATA<52>
MEM_DATA<51>
MEM_DATA<50>
MEM_DATA<48>
MEM_DATA<46>
MEM_DATA<44>
MEM_DATA<39>
MEM_DATA<38>
MEM_DATA<37>
MEM_ADDR<9>
SYSCLK_DDRCLK_A1_UF
MEM_ADDR<0>
MEM_ADDR<2>
MEM_ADDR<6>
MEM_ADDR<8>
MEM_ADDR<9>
MEM_ADDR<10>
MEM_ADDR<12>
MEM_BA<0>
MEM_ADDR<11>
MEM_BA<1>
RAM_ADDR<7>
RAM_ADDR<6>
RAM_CS_L<0>
INT_MEM_VREF
MEM_ADDR<11>
MEM_ADDR<10>
MEM_ADDR<5>
MEM_ADDR<4>
MEM_ADDR<2>
MEM_ADDR<1>
MEM_ADDR<0>
MEM_MUXSEL_LSB
MEM_MUXSEL_MSB_L_TP
INT_MEM_REF_H
INT_DDRCLK5_P_TP INT_DDRCLK5_N_TP
SYSCLK_DDRCLK_B1_L_UF
SYSCLK_DDRCLK_B1_UF
SYSCLK_DDRCLK_B0_L_UF
INT_DDRCLK2_N_TP
SYSCLK_DDRCLK_B0_UF
INT_DDRCLK2_P_TP
SYSCLK_DDRCLK_A1_UF SYSCLK_DDRCLK_A1_L_UF
SYSCLK_DDRCLK_A0_L_UF
SYSCLK_DDRCLK_A0_UF
MEM_CKE<3>
MEM_CKE<2>
MEM_CKE<1>
MEM_CKE<0>
MEM_WE_L
MEM_CAS_L
MEM_RAS_L
MEM_DQM<7>
MEM_DQM<6>
MEM_DQM<5>
MEM_DQM<4>
MEM_DQM<3>
MEM_DQM<1>
MEM_DQM<0>
MEM_DQM<2>
MEM_DQS<7>
MEM_DQS<6>
MEM_DQS<5>
MEM_DQS<4>
MEM_DQS<3>
MEM_DQS<1>
MEM_DQS<0>
MEM_CS_L<2>
MEM_CS_L<0>
MEM_CS_L<3>
MEM_BA<1>
MEM_BA<0>
MEM_DATA<54>
MEM_DATA<31>
MEM_DATA<29>
MEM_DATA<25>
MEM_DATA<24>
MEM_DATA<15>
MEM_DATA<63>
MEM_DATA<62>
MEM_DATA<61>
MEM_DATA<60>
MEM_DATA<59>
MEM_DATA<58>
MEM_DATA<57>
MEM_DATA<56>
MEM_DATA<55>
MEM_DATA<53>
MEM_DATA<49>
MEM_DATA<47>
MEM_DATA<45>
MEM_DATA<43>
MEM_DATA<42>
MEM_DATA<41>
MEM_DATA<40>
MEM_DATA<36>
MEM_DATA<35>
MEM_DATA<34>
MEM_DATA<33>
MEM_DATA<32>
MEM_DATA<30>
MEM_DATA<28>
MEM_DATA<27>
MEM_DATA<26>
MEM_DATA<23>
MEM_DATA<22>
MEM_DATA<21>
MEM_DATA<20>
MEM_DATA<19>
MEM_DATA<18>
MEM_DATA<17>
MEM_DATA<16>
MEM_DATA<14>
MEM_DATA<13>
MEM_DATA<12>
MEM_DATA<11>
MEM_DATA<10>
MEM_DATA<9>
MEM_DATA<8>
MEM_DATA<7>
MEM_DATA<6>
MEM_DATA<5>
MEM_DATA<4>
MEM_DATA<3>
MEM_DATA<2>
MEM_DATA<1>
MEM_DATA<0>
MEM_MUXSEL_LSB_L_TP
MEM_MUXSEL_MSB
SYSCLK_DDRCLK_A1
SYSCLK_DDRCLK_A0_UF
SYSCLK_DDRCLK_A0
SYSCLK_DDRCLK_A1_L_UF
SYSCLK_DDRCLK_A1_L
SYSCLK_DDRCLK_B1
SYSCLK_DDRCLK_B0
MEM_CS_L<3>
MEM_CKE<1>
MEM_CKE<3>
RAM_ADDR<0>
MEM_ADDR<4> RAM_ADDR<4>
MEM_ADDR<1> RAM_ADDR<1>
MEM_ADDR<3>
MEM_ADDR<5> RAM_ADDR<5>
MEM_ADDR<7>
RAM_ADDR<8>
RAM_ADDR<10>
RAM_ADDR<12>
RAM_ADDR<9>
RAM_ADDR<11>
RAM_BA<0>
RAM_CAS_LMEM_CAS_L
MEM_WE_L RAM_WE_L
RAM_RAS_LMEM_RAS_L
RAM_BA<1>
MEM_DQS<2>
RAM_CKE<2>
RAM_CKE<1>
RAM_CKE<3>
RAM_ADDR<2>
RAM_ADDR<3>
PCI_AD<30>
PCI_AD<29>
PCI_AD<28>
PCI_AD<27>
PCI_AD<26>
PCI_AD<8>
PCI_AD<7>
PCI_AD<17>
PCI_AD<16>
PCI_AD<15>
PCI_AD<14>
PCI_AD<13>
PCI_AD<12>
PCI_AD<11>
SYSCLK_DDRCLK_B0_L_UF
INT_MEM_VREF
ROM_OE_TP_L
ROM_OE_L
RAM_CS_L<1>MEM_CS_L<1>
MEM_CKE<2>
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
38
24
24
24
24
24
24
24
24
24
24
24
24
24
24
35
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
35
35
35
35
16
35
35
35
18
18
18
18
18
18
18
18
18
18
18
18
18
18
11
35
39
39
17
17
17
29
17
17
17
17
17
17
17
35
17
35
35
17
17
17
17
35
35
35
35
35
35
35
35
35
35
35
35
11
35
35
11
11
11
15
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
38
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35 35
35
35
35
35
35
35
35
35
35 35
35 35
35
35 35
35
35
35
35
35
35
35
35 35
35 35
35 35
35
35
11
11
11
35
35
17
17
17
17
17
17
17
17
17
17
17
17
17
17
35
38
39
35 35
35
9
9
12 39
12
12
12
12
24
13
12
12
12
12
12
12
12
11
12
11
9
12
12
12
12
11
11
9
9
9
9
9
9
9
24
9
9
9
24
9
9
11
9
9
9
10
10
10
10
10
10
10
10
10
10
9
9
9
9
9
9
9
9
9
9
9
9
11
11
11
9
9
9
9
9
9
9
9
10
38
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
9
9
9
9
9
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
11
9
11
9
11
11
11
9
9
9
11
9
11
9
11
9
9
11
9
11
11
11
11
11
11
11
9
9
11
11
9
11
10
9
9
9
11
11
12
12
12
12
12
12
12
12
12
12
12
12
12
12
9
9
24
12
11
9
9
GND
DA10
SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
GND
DA10
SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
GND
DA10
SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
GND
DA10
SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
SEL = HIGH; HOST = A PORT; B PORT = 100OHM TO GND
SEL = LOW; HOST = B PORT; A PORT = 100OHM TO GND
BIT 0..15
BIT 16..31
BIT 32..47 BIT 48..63
16BIT 2:1 DDR MUXES
2
1
C727
20% 10V CERM 402
0.1uF
2
1
C745
402
CERM
10V
20%
0.1uF
2
1
C742
20% 10V CERM 402
0.1uF
2
1
C732
20% 10V CERM 402
0.1uF
2
1
C733
402
CERM
10V
20%
0.1uF
2
1
C741
20% 10V CERM 402
0.1uF
2
1
C764
402
CERM
10V
20%
0.1uF
2
1
C734
20% 10V CERM 402
0.1uF
2
1
C726
402
CERM
10V
20%
0.1uF
2
1
C730
20% 10V CERM 402
0.1uF
2
1
C758
20% 10V CERM 402
0.1uF
2
1
C757
20% 10V CERM 402
0.1uF
F8F3E8
E3
H6H5G9G2D9D2C6
C5
E2
C2
B2
B3
B5
B6
B8
B9
C9
E9
F9
H9
J9
J8
J6
J5
J3
J2
H2
F2
E1
C1
A1
A3
A4
A6
B7
A9
B10
D10
F10
H10
K10
K8
K7
K5
J4
K2
J1
G1
D1
B1
A2
B4
A5
A7
A8
A10
C10
E10
G10
J10
K9
J7
K6
K4
K3
K1
H1
F1
U28
CRITICAL
BGA
CBTV4020
F8F3E8
E3
H6H5G9G2D9D2C6
C5
E2
C2
B2
B3
B5
B6
B8
B9
C9
E9
F9
H9
J9
J8
J6
J5
J3
J2
H2
F2
E1
C1
A1
A3
A4
A6
B7
A9
B10
D10
F10
H10
K10
K8
K7
K5
J4
K2
J1
G1
D1
B1
A2
B4
A5
A7
A8
A10
C10
E10
G10
J10
K9
J7
K6
K4
K3
K1
H1
F1
U27
CRITICAL
BGA
CBTV4020
F8F3E8
E3
H6H5G9G2D9D2C6
C5
E2
C2
B2
B3
B5
B6
B8
B9
C9
E9
F9
H9
J9
J8
J6
J5
J3
J2
H2
F2
E1
C1
A1
A3
A4
A6
B7
A9
B10
D10
F10
H10
K10
K8
K7
K5
J4
K2
J1
G1
D1
B1
A2
B4
A5
A7
A8
A10
C10
E10
G10
J10
K9
J7
K6
K4
K3
K1
H1
F1
U18
CBTV4020
BGA
CRITICAL
F8F3E8
E3
H6H5G9G2D9D2C6
C5
E2
C2
B2
B3
B5
B6
B8
B9
C9
E9
F9
H9
J9
J8
J6
J5
J3
J2
H2
F2
E1
C1
A1
A3
A4
A6
B7
A9
B10
D10
F10
H10
K10
K8
K7
K5
J4
K2
J1
G1
D1
B1
A2
B4
A5
A7
A8
A10
C10
E10
G10
J10
K9
J7
K6
K4
K3
K1
H1
F1
U16
CBTV4020
BGA
CRITICAL
4410
051-6809
B
RAM_DATA_B<0> RAM_DATA_B<1> RAM_DATA_B<2>
RAM_DATA_B<10>
RAM_DATA_B<9>
RAM_DATA_B<8>
RAM_DQM_B<0>
RAM_DQS_B<0>
RAM_DATA_B<4>
RAM_DATA_B<3>
RAM_DATA_B<7>
RAM_DATA_B<6>
RAM_DATA_B<5>
RAM_DQM_B<1>
RAM_DQS_B<1>
RAM_DATA_B<15>
RAM_DATA_B<14>
RAM_DATA_B<12>
RAM_DATA_B<11>
RAM_DATA_A<10> RAM_DATA_A<11>
RAM_DATA_A<13>
RAM_DATA_A<12>
RAM_DATA_A<15>
RAM_DATA_A<14>
RAM_DQS_A<1>
MEM_DATA<0>
RAM_DQM_A<1>
MEM_DATA<3>
MEM_DATA<1> MEM_DATA<2>
MEM_DATA<4>
MEM_DQS<0>
MEM_DATA<6>
MEM_DQM<0>
MEM_DATA<8>
MEM_DATA<11>
MEM_DATA<10>
MEM_DATA<9>
MEM_DATA<13>
MEM_DATA<12>
MEM_DATA<14>
MEM_DQS<1>
MEM_DATA<15>
MEM_MUXSEL_LSB
RAM_DQM_A<0>
RAM_DQS_A<0>
RAM_DATA_A<7>
RAM_DATA_A<6>
RAM_DATA_A<4> RAM_DATA_A<5>
RAM_DATA_A<1>
RAM_DATA_A<3>
RAM_DATA_A<2>
RAM_DATA_A<0>
RAM_DATA_A<8>
MEM_DQM<1>
RAM_DATA_A<9>
RAM_DATA_B<16> RAM_DATA_B<17> RAM_DATA_B<18>
RAM_DATA_B<26>
RAM_DATA_B<24>
RAM_DQM_B<2>
RAM_DQS_B<2>
RAM_DATA_B<20>
RAM_DATA_B<19>
RAM_DATA_B<23>
RAM_DATA_B<22>
RAM_DATA_B<21>
RAM_DQM_B<3>
RAM_DQS_B<3>
RAM_DATA_B<31>
RAM_DATA_B<30>
RAM_DATA_B<29>
RAM_DATA_B<28>
RAM_DATA_B<27>
RAM_DATA_A<26> RAM_DATA_A<27>
RAM_DATA_A<29>
RAM_DATA_A<28>
RAM_DATA_A<31>
RAM_DATA_A<30>
RAM_DQS_A<3>
MEM_DATA<16>
RAM_DQM_A<3>
MEM_DATA<19>
MEM_DATA<17> MEM_DATA<18>
MEM_DATA<21>
MEM_DATA<20>
MEM_DQS<2>
MEM_DATA<22> MEM_DATA<23>
MEM_DQM<2>
MEM_DATA<24>
MEM_DATA<27>
MEM_DATA<26>
MEM_DATA<25>
MEM_DATA<29>
MEM_DATA<28>
MEM_DATA<30>
MEM_MUXSEL_LSB
RAM_DQM_A<2>
RAM_DQS_A<2>
RAM_DATA_A<23>
RAM_DATA_A<22>
RAM_DATA_A<20> RAM_DATA_A<21>
RAM_DATA_A<17>
RAM_DATA_A<19>
RAM_DATA_A<18>
RAM_DATA_A<16>
RAM_DATA_A<24>
MEM_DQM<3>
RAM_DATA_A<25>
RAM_DATA_B<32> RAM_DATA_B<33> RAM_DATA_B<34>
RAM_DATA_B<42>
RAM_DATA_B<41>
RAM_DATA_B<40>
RAM_DQM_B<4>
RAM_DQS_B<4>
RAM_DATA_B<36>
RAM_DATA_B<35>
RAM_DATA_B<39>
RAM_DATA_B<38>
RAM_DATA_B<37>
RAM_DQM_B<5>
RAM_DQS_B<5>
RAM_DATA_B<46>
RAM_DATA_B<44>
RAM_DATA_B<43>
RAM_DATA_A<42> RAM_DATA_A<43>
RAM_DATA_A<45>
RAM_DATA_A<44>
RAM_DATA_A<47>
RAM_DATA_A<46>
RAM_DQS_A<5>
MEM_DATA<32>
RAM_DQM_A<5>
MEM_DATA<35>
MEM_DATA<33> MEM_DATA<34>
MEM_DATA<37>
MEM_DATA<36>
MEM_DQS<4>
MEM_DATA<38> MEM_DATA<39>
MEM_DQM<4>
MEM_DATA<40>
MEM_DATA<43>
MEM_DATA<42>
MEM_DATA<41>
MEM_DATA<45>
MEM_DATA<44>
MEM_DATA<46>
MEM_DQS<5>
MEM_DATA<47>
MEM_MUXSEL_MSB
RAM_DQM_A<4>
RAM_DQS_A<4>
RAM_DATA_A<39>
RAM_DATA_A<38>
RAM_DATA_A<36> RAM_DATA_A<37>
RAM_DATA_A<33>
RAM_DATA_A<35>
RAM_DATA_A<34>
RAM_DATA_A<32>
RAM_DATA_A<40>
MEM_DQM<5>
RAM_DATA_A<41> RAM_DATA_B<48>
RAM_DATA_B<49> RAM_DATA_B<50>
RAM_DATA_B<58>
RAM_DATA_B<57>
RAM_DATA_B<56>
RAM_DQM_B<6>
RAM_DQS_B<6>
RAM_DATA_B<52>
RAM_DATA_B<51>
RAM_DATA_B<55>
RAM_DATA_B<54>
RAM_DATA_B<53>
RAM_DQM_B<7>
RAM_DQS_B<7>
RAM_DATA_B<63>
RAM_DATA_B<62>
RAM_DATA_B<61>
RAM_DATA_B<60>
RAM_DATA_B<59>
RAM_DATA_A<58> RAM_DATA_A<59>
RAM_DATA_A<61>
RAM_DATA_A<60>
RAM_DATA_A<63>
RAM_DATA_A<62>
RAM_DQS_A<7>
MEM_DATA<48>
RAM_DQM_A<7>
MEM_DATA<51>
MEM_DATA<49> MEM_DATA<50>
MEM_DATA<53>
MEM_DATA<52>
MEM_DQS<6>
MEM_DATA<54> MEM_DATA<55>
MEM_DQM<6>
MEM_DATA<56>
MEM_DATA<59>
MEM_DATA<58>
MEM_DATA<57>
MEM_DATA<61>
MEM_DATA<60>
MEM_DATA<62>
MEM_DQS<7>
MEM_DATA<63>
MEM_MUXSEL_MSB
RAM_DQM_A<6>
RAM_DQS_A<6>
RAM_DATA_A<55>
RAM_DATA_A<54>
RAM_DATA_A<52> RAM_DATA_A<53>
RAM_DATA_A<49>
RAM_DATA_A<51>
RAM_DATA_A<50>
RAM_DATA_A<48>
RAM_DATA_A<56>
MEM_DQM<7>
RAM_DATA_A<57>
+2_5V_INTREPID
+2_5V_INTREPID
+2_5V_INTREPID+2_5V_INTREPID
MEM_DATA<7>
MEM_DATA<5>
RAM_DATA_B<47>
RAM_DATA_B<45>
RAM_DATA_B<25>
MEM_DATA<31>
MEM_DQS<3>
RAM_DATA_B<13>
38
38
38 38
16
16
16 16
35
35
35 35
15
15
15 15
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
10
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
10
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
10
35
35
35
35
35
35
35
35
35
35
35
35
35 35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
10
35
35
35
35
35
35
35
35
35
35
35
35
35
10
10
10 10
35
35
35
35
35
35
35
35
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
9
11
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
11
11
11
11
11
11
11
11
11
11
11
9
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
9
11
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
11
11
11
11
11
11
11
11
11
11
11
9
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
9
11
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
11
11
11
11
11
11
11
11
11
11
11
9
11 11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
9
11
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
11
11
11
11
11
11
11
11
11
11
11
9
11
9
9
9 9
9
9
11
11
11
9
9
11
DQ58
RFU18
KEY
VDD6 VSS6 VSS8
VDD5
DQ15
DQ13
DQ14
VSS5
DM1
VDD3
VSS3
DQ7
DQ12
DQ6
DM0
DQ4 DQ5
VSS1
VREF1
VDD1
SA1 SA2
RFU19
SA0
VDD32
DQ63
DQ62
VSS32
DQ61
VDD30
DQ60
DQ55
DM7
VSS30
DQ54
DM6
VDD28
DQ53
DQ52
VDD25
CK1*
CK1
VSS28
DQ47
DQ46
VDD23
VSS25
DM5
DQ45
DQ44
DM4
DQ39
VSS23
DQ38
DQ37
RFU17
DQ36
VSS21
VDD21
VDD19
RAS*
BA1
CAS*
S1*
A6 A4 A2 A0
VSS19
A8
A11
VDD17
RFU15
CKE0
VDD15
VSS17
RFU11 VSS16
RFU9
VDD14
RFU3
VSS14
RFU5 RFU7
RFU1
VDD12
VSS12
DM3
DQ31
DQ30
DQ29
VSS10
VDD10
DQ28
DQ23
DM2
DQ20
VDD8
DQ21
DQ22
VDDSPD
SCL
SDA
VDD31
VSS31
DQ59
DQS7
DQ51
VDD29
DQ56
VSS29
DQ57
DQ48
DQS6
VDD27
DQ49
DQ50
DQ43
VSS26
VDD26
VDD24
VSS27
DQ41 DQS5 VSS24
VDD22
DQ42
DQ34 VSS22 DQ35
DQS4
DQ40
VDD20
RFU16
DQ32
VSS20
DQ33
S0*
VDD18
BA0
A10_AP
WE*
A1
A5 A3
A9
A7
VSS18
CKE1 RFU14
RFU13 VDD16
VDD13
VSS15
RFU10
RFU8
RFU12
RFU0
RFU4
VSS13
RFU2
RFU6
VSS11 DQ26 DQ27
DQS3
VDD11
DQ19 DQ24 VDD9
VSS9
DQ25
DQ18
DQ16
VDD7
DQ17
DQS2
DQ11 VDD4
VSS7
CK0*
CK0
DQS1 VSS4 DQ10
VDD2 DQ9
DQ2
DQS0
DQ8
DQ3
VSS2
VDD0
DQ0 DQ1
VSS0
VREF0
A12
(1 OF 2)(2 OF 2)
DQ58
RFU18
KEY
VDD6 VSS6 VSS8
VDD5
DQ15
DQ13
DQ14
VSS5
DM1
VDD3
VSS3
DQ7
DQ12
DQ6
DM0
DQ4 DQ5
VSS1
VREF1
VDD1
SA1 SA2
RFU19
SA0
VDD32
DQ63
DQ62
VSS32
DQ61
VDD30
DQ60
DQ55
DM7
VSS30
DQ54
DM6
VDD28
DQ53
DQ52
VDD25
CK1*
CK1
VSS28
DQ47
DQ46
VDD23
VSS25
DM5
DQ45
DQ44
DM4
DQ39
VSS23
DQ38
DQ37
RFU17
DQ36
VSS21
VDD21
VDD19
RAS*
BA1
CAS*
S1*
A6 A4 A2 A0
VSS19
A8
A11
VDD17
RFU15
CKE0
VDD15
VSS17
RFU11 VSS16
RFU9
VDD14
RFU3
VSS14
RFU5 RFU7
RFU1
VDD12
VSS12
DM3
DQ31
DQ30
DQ29
VSS10
VDD10
DQ28
DQ23
DM2
DQ20
VDD8
DQ21
DQ22
VDDSPD
SCL
SDA
VDD31
VSS31
DQ59
DQS7
DQ51
VDD29
DQ56
VSS29
DQ57
DQ48
DQS6
VDD27
DQ49
DQ50
DQ43
VSS26
VDD26
VDD24
VSS27
DQ41 DQS5 VSS24
VDD22
DQ42
DQ34 VSS22 DQ35
DQS4
DQ40
VDD20
RFU16
DQ32
VSS20
DQ33
S0*
VDD18
BA0
A10_AP
WE*
A1
A5 A3
A9
A7
VSS18
CKE1 RFU14
RFU13 VDD16
VDD13
VSS15
RFU10
RFU8
RFU12
RFU0
RFU4
VSS13
RFU2
RFU6
VSS11 DQ26 DQ27
DQS3
VDD11
DQ19 DQ24 VDD9
VSS9
DQ25
DQ18
DQ16
VDD7
DQ17
DQS2
DQ11 VDD4
VSS7
CK0*
CK0
DQS1 VSS4 DQ10
VDD2 DQ9
DQ2
DQS0
DQ8
DQ3
VSS2
VDD0
DQ0 DQ1
VSS0
VREF0
A12
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
NCNC
NC NC
NCNC
on the PCB for additional mounting
NOTE: The SODIMM connector footprint has a through-hole slot
NC NC
NC NC
NC
NC
NC
NC
ADDR=0XA0(WR)/0XA1(RD)
NC
NC
NC
NC
NC
NC NC
NC
NC
NC
NC
SLOT "A" LOWER SLOT
FACTORY SLOT
NC
ADDR=0XA2(WR)/0XA3(RD)
SLOT "B" UPPER SLOT
CUSTOMER SLOT
NC
NC
NC
NC
NC
NC
NC NC
NC
NC
NC
NC
NC
NC NC
NC
NC
NC
DDR SODIMM CONNS
SLOT "B"
SLOT "A"
DDR BYPASS
DDR VREF
ONE 0.1UF PER SLOT
2
1
C140
CERM 402
10V
20%
0.1uF
2
1
C156
CERM 402
10V
20%
0.1uF
2
1
C132
20% CERM
402
10V
0.1uF
119B
51B
40B39B
38B
28B27B
16B
186B185B
174B
15B
173B
162B161B
159B
150B149B
138B137B
126B125B
4B
104B103B
90B
88B87B
76B75B
64B63B
52B
3B
2B1B
197B
57B
46B45B
36B
34B33B
22B
192B191B
180B
21B
179B
168B167B
157B
156B155B
144B143B
132B131B
10B
114B113B
94B93B
92B
82B81B
70B69B
58B
9B
193B 195B
198B
196B
194B
122B121B
84B83B
80B79B
78B77B
74B73B
72B
200B199B
124B123B
98B97B
91B
89B
86B85B
71B
118B
402
401
183B
169B
147B
133B
61B
47B
25B
11B
23B
19B
18B
14B
190B
188B
182B
178B
8B
189B
187B
181B
177B
176B
172B
166B
164B
175B
171B
6B
165B
163B
154B
152B
146B
142B
153B
151B
145B
141B
17B
140B
136B
130B
128B
139B
135B
129B
127B
68B
66B
13B
60B
56B
67B
65B
59B
55B
54B
50B
44B
42B
7B
53B
49B
43B
41B
32B
30B
24B
20B
31B
29B
5B
184B
170B
148B
134B
62B
48B
26B
12B
95B 96B
158B 160B
37B
35B
120B
116B
117B
101B 102B
105B 106B 107B 108B 109B 110B 111B
99B
100B
115B
112B
J25
DDR-SO-DIMM-DUAL
F-RT-SM
CRITICAL
119A
51A
40A39A
38A
28A27A
16A
186A185A
174A
15A
173A
162A161A
159A
150A149A
138A137A
126A125A
4A
104A103A
90A
88A87A
76A75A
64A63A
52A
3A
2A1A
197A
57A
46A45A
36A
34A33A
22A
192A191A
180A
21A
179A
168A167A
157A
156A155A
144A143A
132A131A
10A
114A113A
94A93A
92A
82A81A
70A69A
58A
9A
193A 195A
198A
196A
194A
122A121A
84A83A
80A79A
78A77A
74A73A
72A
200A199A
124A123A
98A97A
91A
89A
86A85A
71A
118A
404
403
183A
169A
147A
133A
61A
47A
25A
11A
23A
19A
18A
14A
190A
188A
182A
178A
8A
189A
187A
181A
177A
176A
172A
166A
164A
175A
171A
6A
165A
163A
154A
152A
146A
142A
153A
151A
145A
141A
17A
140A
136A
130A
128A
139A
135A
129A
127A
68A
66A
13A
60A
56A
67A
65A
59A
55A
54A
50A
44A
42A
7A
53A
49A
43A
41A
32A
30A
24A
20A
31A
29A
5A
184A
170A
148A
134A
62A
48A
26A
12A
95A 96A
158A 160A
37A
35A
120A
116A
117A
101A 102A
105A 106A 107A 108A 109A 110A 111A
99A
100A
115A
112A
J25
DDR-SO-DIMM-DUAL
F-RT-SM
CRITICAL
2
1
C404
805
CERM
6.3V
20%
10uF
2
1
C128
805
CERM
6.3V
20%
10uF
2
1
R299
1K
1% 1/16W MF 402
2
1
R303
402
MF
1/16W
1%
1K
2
1
C397
20% 10V CERM 402
0.1uF
2
1
C403
402
CERM
10V
20%
0.1uF
+2_5V_MAIN+2_5V_MAIN
+2_5V_MAIN
+2_5V_MAIN
+2_5V_MAIN+2_5V_MAIN
+3V_MAIN +3V_MAIN
+3V_MAIN
2
1
C169
0.1uF
20% 10V
402
CERM
2
1
C391
20% CERM
402
10V
0.1uF
2
1
C356
0.1uF
10V 402
CERM
20%
2
1
C211
CERM 402
10V
20%
0.1uF
2
1
C127
CERM 402
10V
20%
0.1uF
+2_5V_MAIN
2
1
C174
20%
6.3V CERM 805
10uF
2
1
C150
0.1uF
10V 402
CERM
20%
2
1
C157
20%
6.3V CERM 805
10uF
2
1
C383
CERM 402
10V
20%
0.1uF
4411
B
051-6809
RAM_DATA_B<37>
RAM_DATA_B<63>
RAM_DATA_B<62>
RAM_DQM_B<7>
RAM_DATA_B<61>
RAM_DATA_B<60>
RAM_DATA_B<55>
RAM_DATA_B<54>
RAM_DQM_B<6>
RAM_DATA_B<53>
RAM_DATA_B<52>
SYSCLK_DDRCLK_B1
SYSCLK_DDRCLK_B1_L
RAM_DATA_B<47>
RAM_DATA_B<46>
RAM_DQM_B<5>
RAM_DATA_B<45>
RAM_DATA_B<44>
RAM_DATA_B<39>
RAM_DATA_B<38>
RAM_DQM_B<4>
RAM_DATA_B<36>
RAM_CS_L<3>
RAM_CAS_L
RAM_RAS_L
RAM_BA<1>
RAM_ADDR<0>
RAM_ADDR<2>
RAM_ADDR<4>
RAM_ADDR<6>
RAM_ADDR<8>
RAM_ADDR<11>
RAM_CKE<2>
RAM_DATA_B<31>
RAM_DATA_B<30>
RAM_DQM_B<3>
RAM_DATA_B<29>
RAM_DATA_B<28>
RAM_DATA_B<22>
RAM_DQM_B<2>
RAM_DATA_B<21>
RAM_DATA_B<20>
RAM_DATA_B<15>
RAM_DATA_B<14>
RAM_DQM_B<1>
RAM_DATA_B<13>
RAM_DATA_B<12>
RAM_DATA_B<7>
RAM_DATA_B<6>
RAM_DQM_B<0>
RAM_DATA_B<5>
RAM_DATA_B<4>
DDR_VREF
INT_I2C_CLK0
INT_I2C_DATA0
RAM_DATA_B<59>
RAM_DATA_B<58>
RAM_DQS_B<7>
RAM_DATA_B<57>
RAM_DATA_B<56>
RAM_DATA_B<51>
RAM_DATA_B<50>
RAM_DQS_B<6>
RAM_DATA_B<49>
RAM_DATA_B<48>
RAM_DATA_B<43>
RAM_DATA_B<42>
RAM_DQS_B<5>
RAM_DATA_B<41>
RAM_DATA_B<40>
RAM_DATA_B<35>
RAM_DATA_B<34>
RAM_DQS_B<4>
RAM_DATA_B<33>
RAM_DATA_B<32>
RAM_CS_L<2>
RAM_WE_L
RAM_BA<0>
RAM_ADDR<10>
RAM_ADDR<1>
RAM_ADDR<3>
RAM_ADDR<5>
RAM_ADDR<7>
RAM_ADDR<9>
RAM_ADDR<12>
RAM_CKE<3>
RAM_DATA_B<27>
RAM_DATA_B<26>
RAM_DQS_B<3>
RAM_DATA_B<25>
RAM_DATA_B<24>
RAM_DATA_B<19>
RAM_DATA_B<18>
RAM_DQS_B<2>
RAM_DATA_B<17>
RAM_DATA_B<16>
SYSCLK_DDRCLK_B0_L
SYSCLK_DDRCLK_B0
RAM_DATA_B<11>
RAM_DATA_B<10>
RAM_DQS_B<1>
RAM_DATA_B<9>
RAM_DATA_B<8>
RAM_DATA_B<3>
RAM_DATA_B<2>
RAM_DQS_B<0>
RAM_DATA_B<1>
RAM_DATA_B<0>
DDR_VREF
DDR_VREF
RAM_DATA_B<23>
RAM_DATA_A<38>
RAM_DQM_A<4>
RAM_BA<1>
RAM_DATA_A<28>
RAM_DATA_A<15>
RAM_DATA_A<63>
RAM_DATA_A<62>
RAM_DQM_A<7>
RAM_DATA_A<61>
RAM_DATA_A<60>
RAM_DATA_A<55>
RAM_DATA_A<54>
RAM_DQM_A<6>
RAM_DATA_A<53>
RAM_DATA_A<52>
SYSCLK_DDRCLK_A1
SYSCLK_DDRCLK_A1_L
RAM_DATA_A<47>
RAM_DATA_A<46>
RAM_DQM_A<5>
RAM_DATA_A<45>
RAM_DATA_A<44>
RAM_DATA_A<39>
RAM_DATA_A<37>
RAM_DATA_A<36>
RAM_CS_L<1>
RAM_CAS_L
RAM_ADDR<0>
RAM_ADDR<2>
RAM_ADDR<4>
RAM_ADDR<6>
RAM_ADDR<8>
RAM_ADDR<11>
RAM_CKE<0>
RAM_DATA_A<31>
RAM_DATA_A<30>
RAM_DQM_A<3>
RAM_DATA_A<29>
RAM_DATA_A<23>
RAM_DQM_A<2>
RAM_DATA_A<21>
RAM_DATA_A<20>
RAM_DATA_A<14>
RAM_DQM_A<1>
RAM_DATA_A<13>
RAM_DATA_A<12>
RAM_DATA_A<7>
RAM_DATA_A<6>
RAM_DQM_A<0>
RAM_DATA_A<5>
RAM_DATA_A<4>
DDR_VREF
RAM_DATA_A<56>
RAM_DATA_A<50>
INT_I2C_CLK0
INT_I2C_DATA0
RAM_DATA_A<59>
RAM_DATA_A<58>
RAM_DQS_A<7>
RAM_DATA_A<57>
RAM_DATA_A<51>
RAM_DQS_A<6>
RAM_DATA_A<49>
RAM_DATA_A<48>
RAM_DATA_A<43>
RAM_DATA_A<42>
RAM_DQS_A<5>
RAM_DATA_A<41>
RAM_DATA_A<40>
RAM_DATA_A<35>
RAM_DATA_A<34>
RAM_DQS_A<4>
RAM_DATA_A<33>
RAM_DATA_A<32>
RAM_CS_L<0>
RAM_WE_L
RAM_BA<0>
RAM_ADDR<10>
RAM_ADDR<1>
RAM_ADDR<3>
RAM_ADDR<5>
RAM_ADDR<7>
RAM_ADDR<9>
RAM_ADDR<12>
RAM_CKE<1>
RAM_DATA_A<27>
RAM_DATA_A<26>
RAM_DQS_A<3>
RAM_DATA_A<25>
RAM_DATA_A<24>
RAM_DATA_A<19>
RAM_DATA_A<18>
RAM_DQS_A<2>
RAM_DATA_A<17>
RAM_DATA_A<16>
SYSCLK_DDRCLK_A0_L
SYSCLK_DDRCLK_A0
RAM_DATA_A<11>
RAM_DATA_A<10>
RAM_DQS_A<1>
RAM_DATA_A<9>
RAM_DATA_A<8>
RAM_DATA_A<3>
RAM_DATA_A<2>
RAM_DQS_A<0>
RAM_DATA_A<1>
RAM_DATA_A<0>
RAM_RAS_L
RAM_DATA_A<22>
DDR_VREF
39
39
39
39
23
23
23
23
35
35
35
35
35
35
35
35
35
13
13
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
13
13
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
11
11
11
11
11
11
11
11
11
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
38
11
11
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
11
11
11
11
11
11
11
11
11
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
38
38
35
35
35
11
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
11
11
11
11
11
11
11
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
38
35
35
11
11
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
11
11
11
11
11
11
11
11
11
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
11
35
38
10
10
10
10
10
10
10
10
10
10
10
9
9
10
10
10
10
10
10
10
10
10
9
9
9
9
9
9
9
9
9
9
9
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
11
6
6
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
9
9
9
9
9
9
9
9
9
9
9
10
10
10
10
10
10
10
10
10
10
9
9
10
10
10
10
10
10
10
10
10
10
11
11
10
10
10
9
10
10
10
10
10
10
10
10
10
10
10
10
9
9
10
10
10
10
10
10
10
10
9
9
9
9
9
9
9
9
9
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
11
10
10
6
6
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
9
9
9
9
9
9
9
9
9
9
9
10
10
10
10
10
10
10
10
10
10
9
9
10
10
10
10
10
10
10
10
10
10
9
10
11
(PLL4)
VDD15A_6
(PLL4) VSSA_6
ROM_WE
ROM_OE
PCI_STOP PCI_DEVSEL
PCI_CBE_3
PCI_CBE_2
PCI_CBE_1
PCI_CBE_0
ROM_CS
PCI_CLK_IN
PCI_CLK_OUT
PCI_CLK2
PCI_CLK1
PCI_CLK0
PCI_FRAME
PCI_PAR
PCI_TRDY PCI_IRDY
PCI_REQ_2
PCI_REQ_1
PCI_REQ_0
PCI_GNT_0 PCI_GNT_1 PCI_GNT_2
PCI/ROM
INTERFACE
PCIAD_31
PCIAD_30
PCIAD_28
PCIAD_27
PCIAD_26
PCIAD_25
PCIAD_29
PCIAD_19
PCIAD_18
PCIAD_17
PCIAD_16
PCIAD_15
PCIAD_23 PCIAD_24
PCIAD_20 PCIAD_21 PCIAD_22
PCIAD_14
(7 OF 9)
PCIAD_11
PCIAD_10
PCIAD_12 PCIAD_13
PCIAD_9
PCIAD_6
PCIAD_5
PCIAD_7 PCIAD_8
PCIAD_4
PCIAD_3
PCIAD_1 PCIAD_2
PCIAD_0
ROM_OVRLY_EN
VSSA_5 (PLL5)
(PLL5)
VDD15A_5
STP_AGP AGPPVT AGPVREF0 AGPVREF1
AGP_BUSY AGP_CLK AGP_FB_IN AGP_FB_OUT
AGPAD0
AGPREQ AGPGNT
AGP_SBA3
AGP_SBA2
AGP_SBA1
AGP_SBA0
AGPCBE_3
AGPFRAME
AGPTRDY AGPIRDY AGPSTOP
AGPDEVSEL
AGPPAR
AGPAD31
AGPAD30
AGPCBE_0 AGPCBE_1 AGPCBE_2
AGP_ST2
AGP_AD_STB0_P AGP_AD_STB0_N AGP_AD_STB1_P AGP_AD_STB1_N
AGPPIPE
AGPRBF
AGP_ST1
AGP_SBA7
AGP_SB_STB_P AGP_SB_STB_N
AGP_ST0
AGP_WBF
AGP
INTERFACES
AGP_SBA6
AGP_SBA5
AGP_SBA4
AGPAD29
AGPAD28
AGPAD27
AGPAD26
AGPAD25
AGPAD24
AGPAD23
AGPAD22
AGPAD21
AGPAD20
AGPAD19
AGPAD18
AGPAD17
AGPAD16
AGPAD15
AGPAD14
AGPAD13
AGPAD12
AGPAD11
AGPAD10
AGPAD9
AGPAD8
AGPAD7
AGPAD6
AGPAD5
AGPAD4
AGPAD3
AGPAD2
AGPAD1
(3 OF 9)
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
SIMPLY PROVIDING REFERENCE TO CHIP
NEC USB2 REQ REMAINS ON +3V_MAIN BECAUSE THIS CHIP IS POWERED DURING SLEEP
PCI FEEDBACK CLOCK MATCHES
PLACE NEAR INTREPID
LONGEST PCI CLOCK ROUTE
AGP_FB_CLK IS ROUTED THE SAME LENGTH AS CLK66M_GPU_AGP
Vout = AGPIO (1.5V)
Vout = AGPIO (1.5V)
INTREPID AGP/PCI
AGP PULL-UPS/PULL DOWNS
SERIES RESISTORS FOR BOOTROM CONTROL SIGNALS
PLACE CLOSE TO INTREPID SIDE
Vin = Vcore (1.5V)
AGP I/O REFERENCE
BECAUSE SINGLE AGP PWR PLANE AND CLOSE PROXIMITY OF CHIPS
NOTE: Designs using AGP slot should
PCI PULL-UPS
VOUT = 3.3V
VIN = 1.5V
(PLACE CLOSE TO INTREPID AGP BALLS)
use 52-ohm a resistor here.
21
R197
402
4.7
5%
1/16W
MF
21
R246
402
5%
1/16W
MF
0
2
1
R245
60.4
402
MF
1/16W
1%
63
RP34
SM1
1/16W
5%
10K
21
R167
MF
1/16W
5%
4.7
402
2
1
C190
CERM
6.3V
20%
402
0.22uF
J10
J11
AN9
AK17
AR7
AM9
AT15
AR15
AT17
AR16
AR17
AT14
AH16
AN17
AN18
AT16
AN16
AM17
AM18 AJ19
AT18
AH18
AR18
AJ15
AM16
AK16
AR14
AR9
AK13
AH13
AN11
AT8
AN10
AM15
AN15
AJ8
AK14
AT13
AN14
AH15
AK15
AR13
AM11
AT12
AJ11
AR12
AK12
AM13
AN13
AT10
AT11
AK11
AN12
AM12
AR11
AT9
AR10
AR8
AM10
U51
OMIT
INTREPID-REV2.1
BGA
CRITICAL
21
R272
33
402
MF
1/16W
5%
21
R230
33
5%
1/16W
MF
402
21
R264
402
5%
1/16W
MF
33
2
1
R244
47
5% 1/16W MF 402
+3V_SLEEP
72
RP33
SM1
10K
5%
1/16W
54
RP33
SM1
10K
5%
1/16W
54
RP36
SM1
5%
10K
1/16W
63
RP36
SM1
1/16W
5%
10K
81
RP36
SM1
10K
5%
1/16W
72
RP36
SM1
1/16W
5%
10K
63
RP33
10K
5%
1/16W
SM1
81
RP33
SM1
1/16W
5%
10K
21
R282
402
MF
1/16W
5%
22
21
R278
402
MF
1/16W
5%
22
21
R277
402
MF
1/16W
5%
22
21
R252
402
MF
1/16W
5%
33
21
R273
1/16W
5% MF
402
22
2
1
C311
NO STUFF
12PF
5%
50V
CERM
402
2
1
C362
NO STUFF
402
CERM
50V
5%
12PF
2
1
C372
NO STUFF
402
CERM
50V
5%
12PF
21
R553
10K
5%
1/16W
402
MF
21
R318
402
MF
1/16W
5%
10K
21
R316
10K
5%
1/16W
MF
402
21
R314
10K
5%
1/16W
MF
402
21
R317
10K
5%
1/16W
MF
402
21
R552
10K
5%
1/16W
MF
402
21
R334
10K
5%
1/16W
MF
402
21
R308
10K
5%
1/16W
MF
402
+3V_MAIN
21
R255
402
MF
1/16W
5%
10K
21
R239
402
MF
1/16W
10K
5%
21
R254
10K
5%
1/16W
MF
402
21
R256
402
MF
1/16W
5%
10K
21
R253
10K
5%
1/16W
MF
402
21
R235
402
MF
1/16W
10K
5%
2
1
R225
1K
402
MF
1/16W
1%
2
1
R219
1K
402
MF
1/16W
1%
2
1
C291
CERM 402
6.3V
20%
0.22uF
81
RP34
SM1
1/16W
10K
5%
54
RP34
SM1
1/16W
5%
10K
72
RP34
SM1
1/16W
5%
10K
V13
V14
AN19
AK30
AR30
AT30
AN29
AH25 AG25
AN30
AM30
AT31
AR31
AN31
AM31
AR32
AT32
AK25
AK27
AK28
AT19
AK21 AK22
AK20 AK19
AB21
AB20
AR29
AM28
AT33
AK24
AJ24
AJ29
AT29
AT28
AM29
AN28
AM27
AL25
AN24
AT23
AM20
AT22
AM21
AN21
AR21
AN20
AT21
AN27
AR28
AR20
AT27
AR27
AM26
AN26
AM25
AT26
AR26
AL24
AN25
AM24
AT20
AR25
AT25
AR24
AM23
AT24
AR23
AN23
AM22
AN22
AR22
AM19
AR19
U51
OMIT
INTREPID-REV2.1
BGA
CRITICAL
2
1
C270
402
20%
6.3V CERM
0.22uF
B
4412
051-6809
+1_5V_INTREPID_PLL
CLK33M_NEC
CLK33M_AIRPORT
INT_PCI_FB_OUT
INT_ROM_RW_L
INT_ROM_CS_L INT_ROM_OE_L
PCI_CBE<3>
PCI_CBE<2>
PCI_CBE<1>
PCI_CBE<0>
PCI_DEVSEL_L
PCI_STOP_L
PCI_TRDY_L
PCI_FRAME_L
PCI_IRDY_L
PCI_PAR
CBUS_PCI_GNT_L
NEC_PCI_GNT_L
NEC_PCI_REQ_L
CBUS_PCI_REQ_L
PCI_AD<30> PCI_AD<31>
PCI_AD<29>
PCI_AD<28>
PCI_AD<27>
PCI_AD<26>
PCI_AD<25>
PCI_AD<24>
PCI_AD<23>
PCI_AD<22>
PCI_AD<21>
PCI_AD<20>
PCI_AD<17> PCI_AD<18>
PCI_AD<15>
PCI_AD<14>
PCI_AD<16>
PCI_AD<12> PCI_AD<13>
PCI_AD<9>
PCI_AD<11>
PCI_AD<10>
PCI_AD<7> PCI_AD<8>
PCI_AD<6>
PCI_AD<5>
PCI_AD<4>
PCI_AD<2>
PCI_AD<1>
PCI_AD<3>
PCI_AD<0>
PCI_STOP_L
PCI_DEVSEL_L
PCI_FRAME_L
+1_5V_AGP
INT_AGPPVT
INT_AGP_VREF
+1_5V_AGP
+1_5V_INTREPID_PLL5
AGP_SBA<1>
AGP_REQ_L AGP_GNT_L
STOP_AGP_L
INT_AGP_VREF
AGP_AD<0> AGP_AD<1> AGP_AD<2> AGP_AD<3> AGP_AD<4>
AGP_AD<10> AGP_AD<11> AGP_AD<12>
AGP_AD<14> AGP_AD<15> AGP_AD<16>
AGP_AD<18> AGP_AD<19>
AGP_AD<22> AGP_AD<23> AGP_AD<24> AGP_AD<25> AGP_AD<26> AGP_AD<27>
AGP_AD<29> AGP_AD<30> AGP_AD<31>
AGP_CBE<0> AGP_CBE<1> AGP_CBE<2> AGP_CBE<3>
AGP_PAR AGP_FRAME_L AGP_TRDY_L AGP_IRDY_L AGP_STOP_L AGP_DEVSEL_L
AGP_SBA<0>
AGP_SBA<2> AGP_SBA<3> AGP_SBA<4> AGP_SBA<5> AGP_SBA<6> AGP_SBA<7>
AGP_SB_STB AGP_SB_STB_L
AGP_ST<0>
AGP_ST<2>
AGP_ST<1>
AGP_AD_STB<1> AGP_AD_STB_L<1>
AGP_AD_STB<0> AGP_AD_STB_L<0>
AGP_PIPE_L AGP_RBF_L
AGP_WBF_L
+1_5V_INTREPID_PLL
ROM_OE_LINT_ROM_OE_L
ROM_CS_LINT_ROM_CS_L
ROM_RW_LINT_ROM_RW_L
AGP_REQ_L
AGP_AD_STB<1>
AGP_AD_STB_L<0>
AGP_IRDY_L
AGP_WBF_L
AGP_AD_STB<0>
AGP_SB_STB
AGP_AD_STB_L<1>
AGP_SB_STB_L
INT_AGP_FB_OUT
INT_AGP_FB_IN
AGP_BUSY_L CLK66M_AGP_1_5V_TP
CLK66M_GPU_AGP
INT_PCI_FB_IN
AGP_AD<5>
AGP_AD<8>
AGP_AD<7>
AGP_TRDY_L
AGP_AD<17>
AGP_STOP_L
AGP_PIPE_L
PCI_AD<19>
AGP_AD<28>
AGP_AD<6>
AGP_AD<9>
AGP_AD<13>
AGP_FRAME_L
AGP_DEVSEL_L
+1_5V_AGP
AGP_RBF_L
AGP_BUSY_L
+3V_GPU
STOP_AGP_L
+1_5V_INTREPID_PLL6
CLK33M_CBUS
CLK33M_NEC_UF
AGP_AD<21>
AGP_GNT_L
AGP_AD<20>
NEC_PCI_REQ_L
PCI_TRDY_L
CBUS_PCI_REQ_L
PCI_IRDY_L
38
38
38
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
21
21
39
21
39
39
37
37
37
37
37
39
37
37
37
37
37
37
37
37
39
39
39
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
20
20
37
20
37
37
38
37
37
37
37
24
24
24
24
24
37
24
24
24
24
24
24
24
24
37
37
37
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
19
19
38
24
19
38
24
24
14
39
24
24
24
24
18
18
18
18
18
24
39
18
18
18
18
18
18
18
18
24
24
24
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
16
38
16
37
37
38
37
37
37
37
37
37
37
37
37
37
37
37
14
37
37
37
37
37
37
37
37
37
37
18
37
37
16
37
21
39
37
18
18
12
35
35
18
18
18
18
17
17
17
17
17
18
39
17
18
24
17
17
17
17
17
17
17
17
18
18
18
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
15
19
15
37
19
19
19
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
19
19
19
19
19
37
37
37
37
37
37
37
19
19
19
19
19
19
19
19
12
39
39
39
19
19
19
19
19
19
19
19
19
19
35
37
37
37
19
37
19
17
37
37
37
37
19
19
15
19
19
20
35
24
37
19
37
17
17
18
17
8
17
24
35
12
12
12
17
17
17
17
12
12
12
12
12
17
18
24
17
12
12
12
9
9
9
9
9
9
9
9
17
17
17
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
12
12
12
12
12
12
38
19
12
12
12
12
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
12
12
12
12
12
19
19
19
19
19
19
19
12
12
19
19
19
12
12
12
12
12
12
12
8
9
12
9
12
9
12
12
12
12
12
12
12
12
12
12
35
35
12
19
35
35
19
19
19
12
19
12
12
9
19
19
19
19
12
12
12
12
12
19
12
38
35
35
18
35
12
19
12
19
12
12
12
12
CS_CE2
CS_CE1
CS_IORD CS_IOWR
ATA_CS1
ATA_CS0
IDE
IDEINTRQ
IDECHRDY
IDECS0
IDECS1
IDEDMACK IDEDMARQ
IDERD
IDEWR
IDERST
IDEA9
IDEA8
IDEA7
IDEA6
IDEA5
IDEA4
IDEA3
IDEA2
IDEA1
IDEA0
IDEDD15
IDEDD14
IDEDD13
IDEDD12
IDEDD11
IDEDD10
IDEDD9
IDEDD8
IDEDD7
IDEDD6
IDEDD5
IDEDD4
IDEDD3
IDEDD2
IDEDD1
IDEDD0
CARDSLOT
CS_WAIT
CS_OE CS_WE
ATA_INTRQ
ATA_DMARQ
ATA_CHRDY
ATA_DMACK
ATA_RD
ATA_WR
ATA_RST
ATA_VREF
UATA100
ATA_A1 ATA_A2
ATA_A0
ATA_D12
ATA_D11
ATA_D15
ATA_D14
ATA_D13
ATA_D10
ATA_D9
ATA_D3
ATA_D2
ATA_D1
ATA_D0
ATA_D4
ATA_D8
ATA_D7
ATA_D6
ATA_D5
(5 OF 9)
IICDATA_1
IICCLK_1
IICCLK_0 IICDATA_0
TST_PLLEN
TST_MONOUT
TST_MONIN
TEI
TRSTN
TMS
TCK
TDO
TDI
TEST
MDC
GBE_REFCLK
MDIO
COL
CRS
GTX_CLK
RXD_6
RXD_4 RXD_5
RXD_3
RXD_7
RXD_2
RXD_1
RX_ER
RX_DV
RX_CLK
RXD_0
FW_PINT
FW_LINKON
FWR_LCLK
TX_ER
TX_EN
TX_CLK
TXD_0
RESET
PURESET
PHY_LPS PHY_CTL0 PHY_CTL1 PHY_LREQ FWR_PCLK
(4 OF 9)
MISC
TXD_3
TXD_2
TXD_1
TXD_4 TXD_5 TXD_6 TXD_7
GB ETHERNET
FIREWIRE
PHY_DATA0 PHY_DATA1 PHY_DATA2 PHY_DATA3
PHY_DATA5
PHY_DATA7
PHY_DATA4
PHY_DATA6
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
HW_PLL<BIT 0>
ENET_TXD SERIES TERMINATION
Keep C847 stub short
TEST PULL-UPS/DOWNS
I2C PULL-UPS
I2C-0
J3000 - PG 23
AF-RD 84-WR
N/A
FAN CONTROLLER
A3-RD AC-WR AD-WR
I2C-1
5D-RD
N/A
N/A
N/A
U51 - PG 6
N/A N/A
J14 - PG 25
DASH MODEM
J25 - PG 11
RAM - LOWER
NOT USING CARDSLOT INTERFACE
POSTSCALAR BYPASS
POSTSCALAR BYPASS FUNCTIONAL TEST WITH
FUNCTIONAL TEST IDDQ
FUNCTIONAL TEST WITHOUT
VIEW PLLS (HARDWARE)
TEST TRI-STATE
ATPG IDDQ
ATPG NORMAL
JTAG MODE
NORMAL OPERATION VIEW PLLS (SOFTWARE)
DESCRIPTION
X(I)
X(I)
X(I)
X(I)
X(I)
1(I)
0 0
0 1
1 1
1(I) 1(I) 1(I)
0(I) 0(I)
1 X
0
0
0(I)
0
0
1(I)
1(I)
1(I)
0(I)
0(I)
BYPASS
SYNC/MEM DATA
MEMWE
0(I)
0(I)
0 1
PLL OUTPUTS
1
(INPUT)
00
(OUTPUT)
TESTSEL5
HWPLL_
X
1
1
1
(I/O) (I/O)
JTG_TDI_HJTG_TDO_H
(OUTPUT)
0
0
0
JTG_RSTN_L
1 1
TST_TEI_H
X 0 0
X
EXTPLL
SHUTDOWN
TPDENABLE
TST_PLLEN_H
X
(OUTPUT)
DDR_
ANALYZER_CLK
(OUTPUT)
X
INT - ENET/FW/UATA
EIDE/I2C
CS_WAIT IS AN INPUT
UDMA - DEVICEDMARDY/DSTROBE
UDMA - HOSTDMARDY/HSTROBE
UDMA - STOP
PLL OUTPUTS
SELECTED
SELECTED
PMU
(SLEEP)
N/A N/A
N/A
N/A
(SLEEP)
I2C-2
N/A
N/A
N/A
(MAIN)
N/A N/A
N/A N/A
(MAIN)
A2-WR
A0-WR
BUS
A1-RD
ADDR
N/A
SNAPPER SOUND
N/AN/A
RAM - UPPER
6B-RD
5C-WR
N/A
J25 - PG 11
J2 - PG 25
6A-WR
BOOTBANG EEPROM
LMU
U52 - PG 25
N/A
N/A
U30 - PG 14
ADDR LSB INDICATES READ (’1’) OR WRITE (’0’) MODES
CLOCK SLEW SSCG
N/A
85-RD
AE-WR
D2-WR D3-RD
21
R259
402
MF
1/16W
5%
1K
81
RP35
SM1
1/16W
5%
10K
2
1
R232
10K
5% 1/16W MF 402
54
RP16
22
1/16W
5%
SM1
63
RP10
22
1/16W
5%
SM1
81
RP10
22
5%
1/16W
SM1
54
RP10
22
1/16W
5%
SM1
72
RP10
22
1/16W
5%
SM1
63
RP16
22
5%
1/16W
SM1
81
RP16
22
1/16W
5%
SM1
72
RP16
22
5%
1/16W
SM1
+3V_MAIN
12
R269
10K
5% MF
1/16W
402
21
R270
5%
1/16W
MF
402
10K
2
1
C847
5%
10pF
50V CERM 402
NO STUFF
21
R630
402
MF
1/16W
5%
10K
NO STUFF
+3V_MAIN
+3V_MAIN
21
R263
402
MF
1/16W
5%
1K
72
RP32
SM1
1/16W
5%
2.2K
81
RP32
1/16W
SM1
5%
2.2K
54
RP32
5%
1/16W
SM1
2.2K
63
RP32
SM1
5%
1/16W
2.2K
72
RP35
10K
5%
1/16W
SM1
63
RP35
SM1
10K
5%
1/16W
54
RP35
1/16W
5%
10K
SM1
2
1
R207
402
MF
1/16W
1K
1%
AM2
AJ4
AL2
AA7
AH7
AG8
AE5
AE4
AG2
AD5
AH1
AF2
AG1
AF1
AJ2
AJ1
AG4
AD7
AH2
AF4
AD4
AC5
AM1
AB7
AK4
AG7
AF7
AH5
AK2
AL1
AH4
AG5
AK1
AE7
AF5
AE1 AE2
AC4
AD2
AB5
AB4
AD1
AA1
Y15
Y4
AA2
AA8
AC2
AC1
W8
W2
V1
W1
V2
V4
U2
U1
Y8
W7
Y1
Y2
W5
W4
T1
V5
AB2
AA4
AA5
Y7
AB1
Y5
U51
OMIT
CRITICAL
BGA
INTREPID-REV2.1
21
R224
82
MF
1/16W
5%
402
21
R205
5%
1/16W
MF
82
402
A5
A7
H9
E10
D9
G10
B7
A6
D8
E9
H10
AR6
AK10
AM7
AN6
AR5
AH10
AT5
AK8
AP5
D2
C4
J12
E8
G9
D7
A4
B4
D6
E7
D3
U5
T2
M2
M1
N4
L2
K2
K1
N5
P7
M4
L4
L1
P5
B5 B6
AM3
AN1
AK5
AN2
H12
L13
N1
N2
T7
U14 E6 C5
U51
OMIT
CRITICAL
INTREPID-REV2.1
BGA
21
R195
402
MF
1/16W
5%
22
21
R186
22
5%
1/16W
MF
402
21
R149
10
402
MF
1/16W
5%
21
R145
10
402
MF
1/16W
5%
21
R160
1/16W
402
MF
5%
10
B
4413
051-6809
UIDE_DATA<5>
ENET_LINK_TXD<0>
CLKENET_LINK_TX
HD_INTRQ
CLKENET_PHY_GTX
UIDE_REF
UIDE_CS1_L
UIDE_DIOR_L
EIDE_DATA<1> EIDE_DATA<2>
INT_TST_PLLEN_PD
ENET_PHY_TX_ER
CLKFW_LINK_PCLK
FW_LINK_CNTL<0> FW_LINK_CNTL<1>
FW_PHY_LPS
FW_LINK_DATA<7>
FW_LINK_DATA<0> FW_LINK_DATA<1>
ENET_LINK_TXD<7>
ENET_LINK_TXD<4>
ENET_LINK_TXD<2>
ENET_LINK_TXD<1>
FW_LKON FW_PINT
CLKFW_LINK_LCLK
CLKENET_LINK_RX ENET_RX_DV ENET_RX_ER
ENET_LINK_RXD<0>
ENET_LINK_RXD<3>
ENET_LINK_RXD<2>
ENET_LINK_RXD<4> ENET_LINK_RXD<5> ENET_LINK_RXD<6> ENET_LINK_RXD<7> CLKENET_LINK_GBE_REF
ENET_CRS
INT_TST_MONIN_PD INT_TST_MONOUT_TP
INT_I2C_CLK0 INT_I2C_DATA0
INT_I2C_DATA1
INT_I2C_CLK1
JTAG_ASIC_TCK
JTAG_ASIC_TDI
INT_RESET_L
INT_PU_RESET_L
ENET_PHY_TXD<1>
ENET_LINK_TXD<1>
ENET_PHY_TXD<0>
ENET_LINK_TXD<0>
ENET_PHY_TXD<3>
ENET_LINK_TXD<3>
ENET_PHY_TXD<4>
ENET_LINK_TXD<4>
ENET_PHY_TXD<2>
ENET_LINK_TXD<2>
ENET_PHY_TXD<5>
ENET_LINK_TXD<5>
ENET_PHY_TXD<7>
ENET_LINK_TXD<7>
ENET_PHY_TXD<6>
ENET_LINK_TXD<6>
INT_I2C_CLK0
INT_I2C_DATA1
INT_I2C_CLK1
CLKFW_PHY_LCLK
FW_PHY_LREQ
CSLOT_CE2_L_SPN
NO_TEST=TRUE
CSLOT_CE1_L_SPN
NO_TEST=TRUE
UIDE_CS0_L
CSLOT_IOWR_L_SPN
NO_TEST=TRUE
CSLOT_IORD_L_SPN
NO_TEST=TRUE
EIDE_INT
EIDE_DMACK_L EIDE_DMARQ
EIDE_WR_L EIDE_RD_L
EIDE_RST_L
EIDE_IOCHRDY
CSLOT_ADDR9_SPN
NO_TEST=TRUE
CSLOT_ADDR8_SPN
NO_TEST=TRUE
CSLOT_ADDR7_SPN
NO_TEST=TRUE
CSLOT_ADDR6_SPN
NO_TEST=TRUE
CSLOT_ADDR5_SPN
NO_TEST=TRUE
CSLOT_ADDR4_SPN
NO_TEST=TRUE
CSLOT_ADDR3_SPN
NO_TEST=TRUE
EIDE_ADDR<2>
EIDE_ADDR<1>
EIDE_ADDR<0>
EIDE_DATA<14> EIDE_DATA<15>
EIDE_DATA<13>
EIDE_DATA<11> EIDE_DATA<12>
EIDE_DATA<9> EIDE_DATA<10>
EIDE_DATA<8>
EIDE_DATA<6> EIDE_DATA<7>
EIDE_DATA<4> EIDE_DATA<5>
EIDE_DATA<3>
EIDE_DATA<0>
CSLOT_WE_L_SPN
NO_TEST=TRUE
CSLOT_OE_L_SPN
NO_TEST=TRUE
UIDE_INTRQ
UIDE_DMARQ
UIDE_IOCHRDY
UIDE_DMACK_L
UIDE_DIOW_L
UIDE_RST_L
UIDE_ADDR<2>
UIDE_ADDR<1>
UIDE_ADDR<0>
UIDE_DATA<15>
UIDE_DATA<14>
UIDE_DATA<13>
UIDE_DATA<12>
UIDE_DATA<10>
UIDE_DATA<9>
UIDE_DATA<8>
UIDE_DATA<7>
UIDE_DATA<6>
UIDE_DATA<3>
UIDE_DATA<2>
UIDE_DATA<1>
UIDE_DATA<0>
EIDE_CS0_L EIDE_CS1_L
INT_I2C_DATA0
ENET_LINK_TXD<3>
ENET_LINK_TXD<5>
HD_DMARQ
ENET_PHY_TX_EN
ENET_LINK_TX_ER
ENET_LINK_TXD<6>
INT_JTAG_TEI
ENET_COL ENET_MDIO ENET_MDC
ENET_LINK_RXD<1>
JTAG_ASIC_TDI
INT_TST_PLLEN_PD
JTAG_ASIC_TCK
JTAG_ASIC_TRST_L
INT_JTAG_TEI
INT_TST_MONIN_PD
FW_LINK_DATA<2> FW_LINK_DATA<3> FW_LINK_DATA<4> FW_LINK_DATA<5> FW_LINK_DATA<6>
INT_TDO
JTAG_ASIC_TRST_L
JTAG_ASIC_TMS
FW_LINK_LREQ
INT_TDO
JTAG_ASIC_TMS
ENET_LINK_TX_EN
UIDE_DATA<4>
UIDE_DATA<11>
CLKENET_LINK_GTX
39
39
39
39
23
23
39
39
23
39
39
23
13
13
25
25
39
13
25
25
13
39
39
26
39
39
26
39
37
37
35
37
35
37
37
37
37
39
37
35
37
37
37
37
37
37
37
37
37
37
35
37
37
37
37
37
37
37
37
37
35
37
39
11
11
14
14
26
39
29
29
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
11
14
14
35
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
11
37
37
37
37
37
39
37
37
37
37
39
39
26
26
39
39
37
37
37
37
37
14
26
26
14
26
37
37
24
13
26
24
26
38
24
24
24
24
13
26
27
27
27
27
27
27
27
13
13
13
13
27
27
35
26
26
26
26
26
26
26
26
26
26
26
26
13
39
6
6
13
13
13
13
9
25
26 13
26 13
26 13
26 13
26 13
26 13
26 13
26 13
6
13
13
27
27
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
37
37
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
6
13
13
24
26
37
13
13
26
26
26
26
13
13
13
13
13
13
27
27
27
27
27
13
13
13
37
13
13
37
24
24
35
(PLL9)
(PLL7)
(PLL3)
(PLL2)
(PLL1)
VSSA_8
VSSA4
VSSA3
VSSA2
VSSA1
(PLL9)
(PLL7)
(PLL3)
(PLL2)
(PLL1)
VDD15A_8
VDD15A_4
VDD15A_3
VDD15A_2
VDD15A_1
CPU_INT PCIPME
EXTINT12 EXTINT13 EXTINT14 EXTINT15 EXTINT16 EXTINT17
GPIO16
GPIO15
GPIO12
GPIO11
GPIO9
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
VSSU_2
VDDU33_2
VDDU33_1
(6 OF 9)
SCCRTSA
SCCTXDA
SCCDTRA
SCCRXDA SCCGPIOA SCCTRXCA
SCCTXDB
SCCGPIOB SCCTRXCB
SCCRXDB
SCCRTSB
PURPOSE
GENERAL
I/O’S
EXTINT8
EXTINT7
EXTINT6
EXTINT0
INTERRUPTS
EXTINT11
EXTINT4 EXTINT5
EXTINT10
EXTINT9
EXTINT3
EXTINT2
EXTINT1
AUD_DTO
AUD_DTI AUD_SYNC
MOD_DTO
AUD_BITCLK AUD_CLKOUT
IICCLK_2
MOD_SYNC
MOD_DTI
MOD_CLKOUT
IICDATA_2
MOD_BITCLK
IIC
AUDIO/I2S
CLOCKS
XTAL_OUT
PROCSLEEPREQ PENDPROCINT
XTAL_IN
SS_REF_CLK_IN
BUF_REF_CLK_OUT
STOPXTAL
WATCHDOG
PCI_
PCI_
PCI_
VSSU_1
PCI_
USB_VD0_P USB_VD0_N
USB_VD1_P USB_VD1_N
USB_VD2_N
USB_VD2_P
USB_PWRFLT0
USB_PRTPWR0
USB_VD3_N
USB_VD3_P
USB
USB_PRTPWR1 USB_PWRFLT1
USB_VD4_N
USB_VD4_P
USB_VD5_N
USB_VD5_P
USB_PRTPWR2 USB_PWRFLT2
ADJ
BYP GND
OUT
NC
NC
SHDN
IN
CPU0
VDDA
VDD0
VDD1
VDDC
VDDQ
VSS1
VSS0
VSSA
VSSC
VSSQ
LOCK ODSEL
PD*
SDATA
SCLK
FSEL
CLKIN
RESET*
ADDRSEL
TABLE_ALT_ITEM
TABLE_5_ITEM
TABLE_11_HEAD
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_11_HEAD
REFERENCE DESIGNATOR(S)
BOM OPTION
QTY
DESCRIPTION
VALUE VOLT. WATT.
TOL.PART #
PACKAGE
DEVICE
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
GPIO/EXTINT PULLUPS
CRYSTAL LOAD CAPACITANCE IS 16PF
1
MOD_DTI_B_H JTG_TDO_H
2
INTERNAL 250K PULL-UP
INTERNAL 250K PULL-DOWN
OUTPUT IMPEDANCE ~18-20 OHMS
INTERNAL 250K PULL-UP
SCK
PCI INTERRUPTS
PORT F/MODEM
PORT A - PORT D/UNUSED
USB PORT ASSIGNMENTS
POWERBOOK SPARE
REQ* MOSI ACK*
VIA
NC
NC
MISO
CBUS_REG_L CBUS_IREQ_L
(SIGNAL FROM MODEM)
SIGNAL NAME
HWPLL_
5
0
4 3
INT - USB/GPIOS/I2S
NC
MOD_SYNC_B_H
MOD_DTO_B_H
MOD_CLKOUT_B_H
MOD_BITCLK_B_H
TESTMUXSEL
PORT E/BLUETOOTH
MINIMIZE OVERSHOOT
PLACE NEAR INTREPID TO
-> 1.55V OUTPUT
VCORE A/B SEL
+3V_MAIN
2
1
C256
CERM 805
20%
6.3V
10uF
21
R166
5%
1/16W
MF
402
100K
+3V_MAIN
2
1
C246
CERM
20% 10V
402
0.1uF
2
1
C235
20% CERM
402
0.01uF
16V
21
R179
402
5% MF
1/16W
22
21
R174
1/16W
MF
5%
22
402
21
R192
402
22
5% MF
1/16W
54
RP13
1/16W
5%
47
SM1
63
RP13
47
5%
1/16W
SM1
81
RP13
1/16W
5%
SM1
47
72
RP13
47
5%
1/16W
SM1
21
R188
402
22
1/16W
MF
5%
V15
U4
AT7
R8
R9
AH29
AK18
AJ16
AJ13
AA15
U8
T8
AG29
P8 N8
K5 L5
M7 M8
H2 H1
G2 G1
L8 L7
N7
J1
K4
M5
J2
J4
AN7
K9
AR4
AF9
AM5
AT4
AG10
AG11
AL5
AN3
AP4
AG9
AF10
AT6
AN8
AJ18
AJ17
AJ12
AA16
AJ7
R1
R2 T4
P1
V8
AH8
AL4
H4
L9
H5
J8
F2
J7
K7
F1
K8
J5
E1
G5
C32
D31
G30
E31
A33
B33
D34
C33
G4
H7
E2
D1
F4
J9
E30
B32
E34
F33
D30
U15
T5
R4 R7
R5
P2
U51
OMIT
INTREPID-REV2.1
BGA
CRITICAL
+3V_SLEEP
2
1
R193
402
1/16W MF
5%
15K
2
1
C387
6.3V
20%
0.22uF
CERM
402
21
R201
402
4.7
5%
1/16W
MF
2
1
C386
0.22uF
CERM
6.3V
20%
402
21
R243
MF
1/16W
5%
4.7
402
2
1
C388
CERM
6.3V
20% 402
0.22uF
21
R279
5% MF
1/16W
4.7
402
2
1
C337
0.22uF
CERM
6.3V
20% 402
2
1
R189
15K
MF
1/16W
5%
402
2
1
C389
CERM
6.3V
20%
402
0.22uF
21
R240
MF
1/16W
5%
402
4.7
21
R280
MF
1/16W
5%
4.7
402
2 1
R144
10M
402
MF
5%
NO STUFF
1/16W
2
1
C151
CERM
22pF
5%
402
50V
2
1
C152
22pF
5%
50V
CERM
402
21
R134
0
NO STUFF
1/16W
5% MF
402
1
2
3
J9
F-ST-SM
NO STUFF
U.FL-R_SMT
2
1
R113
402
MF
1/16W
51
5%
NO STUFF
2
1
R143
402
MF
1/16W
5%
0
2
1
C721
1uF
10V 603
20%
CERM
2
1
R567
402
MF
68.1K
1%
1/16W
2
1
R574
1%
1/16W
402
18.7K
MF
2
1
C723
10uF
6.3V 805
CERM
20%
21
R568
NO STUFF
5%
1/16W
MF
0
603
21
R565
5%
1/16W
0
603
MF
+2_5V_MAIN
+1_8V_MAIN
5
1
7
6
8
4
3
2
U49
MSOP
LT1962-ADJ
2
1
C392
402
0.01uF
20%
CERM
16V
12
R187
402
5%
1/16W
MF
10K
12
R191
402
10K
MF
1/16W
5%
1
2
R258
5% 1/16W MF 402
1K
1
2
R241
1/16W MF
5%
402
1K
45
RP8
SM1
5%
10K
1/16W
18
RP8
SM1
10K
1/16W
5%
63
RP5
5%
1/16W
10K
SM1
54
RP6
SM1
10K
1/16W
5%
63
RP6
10K
1/16W
5%
SM1
72
RP6
10K
5%
SM1
1/16W
36
RP8
10K
5%
1/16W
SM1
27
RP7
5%
1/16W
10K
SM1
36
RP7
10K
1/16W
5%
SM1
45
RP4
SM1
1/16W
5%
10K
81
RP5
10K
1/16W
5%
SM1
81
RP6
1/16W
SM1
5%
10K
36
RP4
SM1
10K
1/16W
5%
27
RP8
SM1
10K
1/16W
5%
2
1
L13
FERR-EMI-100-OHM
SM
+2_5V_MAIN
+3V_MAIN
2
1
L14
SM-1
SSCG
400-OHM-EMI
2
1
C394
402
CERM
10V
20%
0.1uF
SSCG
2
1
L15
400-OHM-EMI
SM-1
SSCG
2
1
C399
SSCG
0.1uF
10V CERM
20% 402
2
1
C402
603
CERM
10V
20%
1uF
SSCG
21
R293
SSCG
5%
33
MF
1/16W
402
1
2
R292
SSCG
402
5% MF
75
1/16W
2
1
C400
20%
SSCG
402
CERM
10V
0.1uF
2
1
R288
1/16W
SSCG
10K
402
5% MF
21
R284
1/16W
MF
SSCG
0
402
5%
2
1
R178
15K
MF
1/16W
5%
402
2
1
R175
402
5% 1/16W MF
15K
21
R142
SSCG
MF
1/16W
0
402
5%
2 1
R156
5%
1/16W
MF
402
10K
2 1
R157
10K
402
MF
1/16W
5%
2 1
R164
5%
1/16W
MF
402
10K
2 1
R165
5%
1/16W
MF
402
10K
2 1
R182
5%
1/16W
MF
402
10K
2 1
R180
5%
1/16W
MF
402
10K
2 1
R183
10K
402
MF
1/16W
5%
2 1
R181
5%
1/16W
MF
402
10K
21
R250
10K
402
MF
5%
1/16W
45
RP11
SM1
5%
1/16W
10K
36
RP11
10K
SM1
5%
1/16W
27
RP11
5%
1/16W
10K
SM1
18
RP11
SM1
5%
1/16W
10K
1
2
R295
1/16W
10K
NO STUFF
402
5% MF
1
2
R296
402
10K
5% 1/16W MF
NO STUFF
21
R153
10K
402
MF
1/16W
5%
2
1
R287
10K
5% 1/16W MF 402
SSCG
2
1
R286
NO STUFF
5%
402
MF
1/16W
0
21
R218
MF
5%
402
1/16W
0
+3V_SLEEP
21
R746
10K
402
5%
1/16W
MF
21
R158
1/16W
MF
10K
5%
402
21
R148
10K
5% MF
1/16W
402
+3V_MAIN
15
6
11
19
7
18
5
12
10
1
8
9
17 13
4
2
3
16
20
14
U31
CRITICAL
CY28512D
OMIT
TSSOP
81
RP47
SOFT_MODEM
5%
1/16W
SM1
0K
63
RP47
SOFT_MODEM
5%
1/16W
SM1
0K
54
RP47
SOFT_MODEM
1/16W
5%
SM1
0K
72
RP47
SOFT_MODEM
5%
1/16W
SM1
0K
21
R206
5%
1/16W
MF
402
10K
USB_MODEM
72
RP15
10K
1/16W
5%
SM1
USB_MODEM
63
RP15
10K
1/16W
5%
SM1
USB_MODEM
54
RP15
SM1
10K
1/16W
5%
USB_MODEM
81
RP15
SM1
5%
1/16W
USB_MODEM
10K
21
Y2
18.432M
8X4.5MM-SM
CRITICAL
21
R450
MF
SSCG
0
402
1/16W
5%
21
R467
0
5%
1/16W
MF
402
NO STUFF
21
R457
0
5%
1/16W
MF
402
Alt. for Siward Part
Y2
197S0035197S0004
SSCGCRITICAL
U31
IC,CY28512-2
1
359S0086
116S1104
RES
RES-0402-V2
RESISTOR R292
NO_SSCG
5%
1/16W
1 10K
4414
B
051-6809
INT_REF_CLK_IN
LT1962_INT_ADJ
USB_DFM
INT_I2S0_SND_MCLK_UF
USB_DDP
USB_DCM
INT_I2S0_SND_SCLK_UF
COMM_RESET_L FW_PHY_PD SND_HP_MUTE_L
INT_GPIO9_PU
SND_AMP_MUTE_L
INT_GPIO1_PU
CG_FSEL_INT
NEC_PCI_INT_L
+1_5V_INTREPID_PLL2
COMM_SHUTDOWN
SND_HW_RESET_L INT_GPIO12_PU INT_GPIO15_PU INT_ENET_RST_L
LT1962_INT_BYP
CG_SYSCLK_EN
INT_REF_CLK_OUT
CLK18M_INT_XOUT
CG_FSEL
SYSTEM_CLK_EN
INT_TDO
INT_EXTINT13_PU
INT_GPIO12_PU
INT_MOD_DTI
INT_MOD_SYNC_UF
INT_MOD_SYNC
INT_GPIO9_PU
SND_HW_RESET_L
INT_MOD_BITCLK
INT_MOD_DTO
INT_MOD_CLKOUT
INT_EXTINT16_PU
INT_EXTINT12_PU
INT_EXTINT11_PU
PMU_REQ_L
PMU_INT_NMI
INT_I2S0_SND_TO_DAC
INT_I2S0_SND_LRCLK
CG_CLKOUT
LTC1962_INT_VIN
INT_EXTINT14_PU
USB_PWREN_EF_L
USB_OC_EF_L
USB_OC_AB_L
USB_PWREN_AB_L
INT_EXTINT8_PU
COMM_RING_DET_L
INT_GPIO15_PU
PMU_INT_L
CLK18M_INT_EXT
VCORE_VGATE
VCORE_VGATE
USB_DEP
BT_USB_DP
USB_DEM
BT_USB_DM
USB_DFP
MODEM_USB_DP
USB_DFM
MODEM_USB_DM
USB_DBP
USB_DBM
USB_DAP
USB_DAM
USB_DCM
USB_DCP
USB_DDM
USB_DDP
CBUS_INT_L
CLK18M_XTAL_IN
MPIC_CPU_INT_L
PMU_PME_L
NEC_PCI_INT_L
INT_EXTINT16_PU
SND_HP_SENSE_L
INT_EXTINT14_PU
INT_EXTINT12_PU
+3V_INTREPID_USB
PMU_ACK_L
PMU_REQ_L
PMU_INT_L
COMM_RING_DET_L
AGP_ATI_INT_L INT_EXTINT3_PU SND_LIN_SENSE_L
CBUS_INT_L
ENET_ENERGY_DET
INT_EXTINT8_PU PMU_INT_NMI INT_EXTINT10_PU INT_EXTINT11_PU
INT_I2S0_SND_TO_DAC_UF
INT_I2S0_SND_LRCLK_UF
INT_I2S0_SND_FROM_ADC
INT_MOD_DTO_UF INT_MOD_DTI INT_MOD_SYNC_UF
INT_I2C_DATA2
INT_I2C_CLK2
INT_PROC_SLEEP_REQ_L INT_PEND_PROC_INT
SYSTEM_CLK_EN
INT_WATCHDOG_L
INT_REF_CLK_OUT_UF
PMU_CLK
PMU_TO_INT
+1_5V_INTREPID_PLL3
+1_5V_INTREPID_PLL4
+1_5V_INTREPID_PLL8
USB_DAM
USB_DAP
USB_DBP USB_DBM
USB_DCP
USB_PWREN_AB_L USB_OC_AB_L
USB_DDM
USB_PWREN_CD_L USB_OC_CD_L
USB_DEP USB_DEM
USB_OC_EF_L
USB_PWREN_EF_L
USB_DFP
INT_EXTINT13_PU
INT_REF_CLK_IN
CG_FSEL
CG_LOCK
CG_SYSCLK_EN
CG_ADDRSEL
INT_I2C_DATA1
INT_I2C_CLK1
INT_REF_CLK_OUT
CG_RESET_L
COMM_TXD_L COMM_RTS_L COMM_DTR_L COMM_RXD COMM_GPIO_L COMM_TRXC
PMU_FROM_INT
+1_5V_INTREPID_PLL1
+1_5V_INTREPID_PLL
CLK18M_INT_XIN
INT_MOD_DTO_UF
INT_EXTINT3_PU
INT_GPIO1_PU
INT_EXTINT10_PU
USB_PWREN_CD_L
USB_OC_CD_L
MAIN_RESET_L
+3V_CG_PLL_MAIN
+2_5V_CG_MAIN
39 29
39
39
39
24
39
39
39
29
38
38
39
39
39
39
39
29
29
39
39
39
38
19
35
37
39
39
33
17
39
25
35
29
26
25
25
29
29
39
39
35
39
25
29
33
33
37 37
37 37
37 37
37 37
18
24
24
17
39
29
29
25
39
18
24
29
39
25
39
39
29
37
37
37
35
25
25
35
39
39
39
39
39
39
12
33
18
14
14
14
14
25
27
25
14
25
14
14
38
25
14
14
14
26
14
14
35
14
14
13
14
14
14
14
25
14
14
14
25
25
25
14
14
14
14
14
25
25
25
25
38
14
14
14
14
14
14
14
14
14
35
14
14
14 25
14 25
14 25
14 25
14
14
14
14
14
14
14
14
14
14
35
5
17
14
14
25
14
14
38
29
14
14
14
19
14
25
14
14
26
14
14
14
14
25
14
14
14
14
14
25
25
29
29
14
29
35
29
29
38
38
38
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
13
13
14
25
25
25
25
25
25
29
38
8
35
14
14
14
14
14
14
14
17
POWER/GROUND
VSS
(8 OF 9)
VDD2.5
VSS
VDD1.8/CPUVIO
GROUND
POWER
(9 OF 9)
VDD1.5
AGP_IO_VDD
VDD3.3
AGP_IO_VSS
VSS
VSS
VDD3.3
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_5_ITEM
Intrepid Power
M34
M32
M31
M3
M28
M24
M21
M20
M18
M17
M14
L24
J6
J34
J31
J3G7F6
F34
F31F3F28
F25
F22
F19
F16
F13
F10D4D33C7C36
C34
C31
C3
C28
C25
C22
C19
C16
C13
C10
C1
B35
B2
AT34
AT3
AR35
AR2
AP9
AP6
AP36
AP34
AP33
AP30
AP3
AP27
AP24
AP21
AP18
AP15
AP12
AP1
AN4
AN33
U16
U10
T27
T24
T23
T14
T11
R6
R34
R31
R3
R29
R26
R24
R23
R21
R19
R18
R16
R14
P4
P29
P22
P17
P12
N25
N15
M9
M6
AE31
AC28
AC27
AC25
AB34
E33
Y29
Y27
W34
AB31
W31
W25
V29
V25
U28
U25
T34
T31
T29
T28
AB27
T25
R27
R25
P28
P25
N36
N34
N31
N28
K34
AB25
K31
G34
G31
C35
AP35
AK34
AH34
AH30
AF28
AE34
AA29
AA25
F12
C9
C30
C27
C24
C21
C18
P19
P16
N23
N21
N18
C15
M23
M22
M19
M16
M15
F27
F24
F21
F18
F15
C12
U51
CRITICAL
INTREPID-REV2.1
BGA
OMIT
AE21
AE19
AE18
AE16
AE14
AD6
AL9
AL6
AL34
AL31
AL27
AD34
AL21
AL18
AL15
AL12
AK7
AK3
AH27
AH23
AH21
AD31
AH20
AG6
AG34
AG30
Y25
Y24
Y23
Y19
Y16
AG3
Y14
Y12
Y11
W26
W23
W14
W11
V6
V34
V31
AG24
V3
V24
V21
V18
V17
V12
V10
U29
U27
U22
AG23
U19
AG21
AE28
AE22
AD3
AD28
G3F9F7
F30
E4
B34
D5
D32
C6
C2
B3
AR3
AC13
AP7
AP2
W6
W3
W13
W12
U12
T6
T3
T18
AC12
T12
R22
P14
P13
N6
N3
N24
K6
K3
AP16
AB6
AP13
AP10
AN5
AM4
AL7
AL3
AL16
AL13
AL10
AK6
AB3
AH6
AH3
AF25
AE6
AE3
AE17
AE15
AD21
AC14
G6
AA12
AA11
AD13
AC23
AC19
AC17
AB19
AB17
AB15
Y18
Y13
W24
W16
V22
V20
V19
V16
U24
U18
AB13
U17
T13
R20
R17
P21
P20
P18
P15
AD22
AD15
AA24
AA21
AA6
AA34
AA31
AA3
AA27
AA20
A34
AD25
AD23
AD12
AC26
AC22
AC20
AC18
AC16A3AC15
AC11
AB29
AB28
AB24
AB18
AB16
AB14
AB12
AB11
AL19
AJ23
AJ21
AH28
AH22
AH19
AF22
AR34
AE23
AR33
AP31
AP28
AP25
AP22
AP19
AN32
AL30
AL28
AL22
AE20
AD20
U51
BGA
CRITICAL
OMIT
INTREPID-REV2.1
+1_5V_MAIN
+3V_MAIN
2
1
R276
0
5%
1/10W
FF
805
INT_2_5V_COLD
2
1
R274
INT_2_5V_HOT
0
5%
1/10W
FF
805
+2_5V_MAIN
+2_5V_SLEEP
4415
B
051-6809
?
343S0305
1
U51
CRITICAL
IC,ASIC,INTREPID,REV2.1,974 BGA,FAST
+1_5V_AGP
MAXBUS_SLEEP
+2_5V_INTREPID
38
38
33
21
16
20 8 19 7 16 6 12
5
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
40 X 0.22UF (0402)
INTREPID 3.3V DECOUPLING
INTREPID CORE DECOUPLING
INTREPID AGP I/O DECOUPLING
21 Balls 4 X 10UF (0805)
INTREPID MAXBUS DECOUPLING
INTREPID DDR DECOUPLING
44 Balls 4 X 10UF (0805)
57 Balls 4 X 10UF (0805)
30 Balls 4 X 10UF (0805) 4 X 10UF (0805)
Intrepid Decoupling
29 X 0.22UF (0402)
46 X 0.22UF (0402)
21 X 0.22UF (0402)
24 Balls 28 X 0.22UF (0402)
Place these 2.5V Decoupling Caps near the Edge of +2.5V_MAIN and +2.5V_INTREPID split
INTREPID/MAIN 2.5V DECOUPLING
10 X 0.22UF (0402)
2
1
C178
0.22uF
20%
6.3V CERM 402
2
1
C182
0.22uF
20%
6.3V CERM 402
2
1
C204
402
CERM
6.3V
20%
0.22uF
2
1
C166
0.22uF
20%
6.3V CERM 402
2
1
C142
805
CERM
6.3V
20%
10uF
2
1
C148
10uF
20%
6.3V CERM
805
2
1
C141
402
CERM
6.3V
20%
0.22uF
2
1
C205
402
CERM
6.3V
20%
0.22uF
2
1
C145
402
CERM
6.3V
20%
0.22uF
2
1
C223
0.22uF
402
CERM
6.3V
20%
2
1
C214
402
CERM
6.3V
20%
0.22uF
2
1
C229
402
CERM
6.3V
20%
0.22uF
2
1
C163
402
CERM
6.3V
20%
0.22uF
2
1
C181
402
CERM
6.3V
20%
0.22uF
2
1
C164
402
CERM
6.3V
20%
0.22uF
2
1
C207
402
CERM
6.3V
20%
0.22uF
2
1
C225
402
CERM
6.3V
20%
0.22uF
2
1
C208
CERM
6.3V
20%
0.22uF
402
2
1
C149
0.22uF
20%
6.3V CERM 402
2
1
C147
0.22uF
20%
6.3V CERM 402
2
1
C206
402
CERM
6.3V
20%
0.22uF
2
1
C165
0.22uF
20%
6.3V CERM 402
2
1
C146
10uF
20%
6.3V CERM
805
2
1
C144
805
CERM
6.3V
20%
10uF
2
1
C241
0.22uF
20%
6.3V CERM 402
2
1
C334
0.22uF
20%
6.3V CERM 402
2
1
C369
402
CERM
6.3V
20%
0.22uF
2
1
C315
0.22uF
20%
6.3V CERM 402
2
1
C274
402
CERM
6.3V
20%
0.22uF
2
1
C219
0.22uF
20%
6.3V CERM 402
2
1
C253
0.22uF
20%
6.3V CERM 402
2
1
C218
402
CERM
6.3V
20%
0.22uF
2
1
C186
0.22uF
20%
6.3V CERM 402
2
1
C243
0.22uF
20%
6.3V CERM 402
2
1
C281
0.22uF
20%
6.3V CERM 402
2
1
C240
402
CERM
6.3V
20%
0.22uF
2
1
C305
0.22uF
20%
6.3V CERM 402
2
1
C297
0.22uF
402
CERM
6.3V
20%
2
1
C254
0.22uF
20%
6.3V CERM 402
2
1
C172
0.22uF
20%
6.3V CERM 402
2
1
C266
402
CERM
6.3V
20%
0.22uF
2
1
C275
402
CERM
6.3V
20%
0.22uF
2
1
C216
0.22uF
20%
6.3V CERM 402
2
1
C252
0.22uF
20%
6.3V CERM 402
2
1
C251
402
CERM
6.3V
20%
0.22uF
2
1
C304
402
CERM
6.3V
20%
0.22uF
2
1
C306
402
CERM
6.3V
20%
0.22uF
2
1
C265
0.22uF
20%
6.3V CERM 402
2
1
C322
805
CERM
6.3V
20%
10uF
2
1
C202
10uF
20%
6.3V CERM
805
2
1
C314
10uF
20%
6.3V 805
CERM
2
1
C191
805
CERM
6.3V
20%
10uF
2
1
C293
402
CERM
6.3V
20%
0.22uF
2
1
C230
402
CERM
6.3V
20%
0.22uF
2
1
C217
402
CERM
6.3V
20%
0.22uF
2
1
C333
402
CERM
6.3V
20%
0.22uF
2
1
C203
402
CERM
6.3V
20%
0.22uF
2
1
C282
402
CERM
6.3V
20%
0.22uF
2
1
C242
402
CERM
6.3V
20%
0.22uF
2
1
C185
402
CERM
6.3V
20%
0.22uF
2
1
C273
0.22uF
20%
6.3V CERM 402
2
1
C316
0.22uF
20%
6.3V CERM 402
2
1
C323
0.22uF
20%
6.3V CERM 402
2
1
C239
402
CERM
6.3V
20%
0.22uF
2
1
C320
402
CERM
6.3V
20%
0.22uF
2
1
C361
402
CERM
6.3V
20%
0.22uF
2
1
C312
402
CERM
6.3V
20%
0.22uF
2
1
C331
402
CERM
6.3V
20%
0.22uF
2
1
C332
402
CERM
6.3V
20%
0.22uF
2
1
C344
402
CERM
6.3V
20%
0.22uF
2
1
C366
402
CERM
6.3V
20%
0.22uF
2
1
C363
402
CERM
6.3V
20%
0.22uF
2
1
C373
402
CERM
6.3V
20%
0.22uF
2
1
C346
402
CERM
6.3V
20%
0.22uF
2
1
C330
402
CERM
6.3V
20%
0.22uF
2
1
C319
0.22uF
20%
6.3V CERM 402
2
1
C345
402
CERM
6.3V
20%
0.22uF
2
1
C329
0.22uF
20%
6.3V CERM 402
2
1
C367
0.22uF
20%
6.3V CERM 402
2
1
C365
402
CERM
6.3V
20%
0.22uF
2
1
C321
0.22uF
20%
6.3V CERM 402
2
1
C380
805
CERM
6.3V
20%
10uF
2
1
C379
10uF
20%
6.3V CERM
805
2
1
C381
10uF
20%
6.3V
CERM
805
2
1
C382
805
CERM
6.3V
20%
10uF
2
1
C290
0.22uF
20%
6.3V CERM 402
2
1
C300
0.22uF
20%
6.3V CERM 402
2
1
C222
0.22uF
20%
6.3V CERM 402
2
1
C236
0.22uF
20%
6.3V CERM 402
2
1
C224
0.22uF
20%
6.3V CERM 402
2
1
C258
0.22uF
20%
6.3V CERM 402
2
1
C302
0.22uF
20%
6.3V CERM 402
2
1
C263
0.22uF
20%
6.3V CERM 402
2
1
C287
0.22uF
20%
6.3V CERM 402
2
1
C248
0.22uF
20%
6.3V CERM 402
2
1
C292
0.22uF
20%
6.3V CERM 402
2
1
C250
0.22uF
20%
6.3V CERM 402
2
1
C303
0.22uF
20%
6.3V CERM 402
2
1
C238
0.22uF
20%
6.3V CERM 402
2
1
C260
0.22uF
20%
6.3V CERM 402
2
1
C262
0.22uF
20%
6.3V CERM 402
2
1
C279
402
CERM
6.3V
20%
0.22uF
2
1
C226
0.22uF
20%
6.3V CERM 402
2
1
C288
0.22uF
20%
6.3V CERM 402
2
1
C278
402
CERM
6.3V
20%
0.22uF
2
1
C310
402
CERM
6.3V
20%
0.22uF
2
1
C299
402
CERM
6.3V
20%
0.22uF
2
1
C301
0.22uF
20%
6.3V CERM 402
2
1
C271
0.22uF
20%
6.3V CERM 402
2
1
C325
10uF
20%
6.3V CERM
805
2
1
C200
805
CERM
6.3V
20%
10uF
2
1
C324
805
CERM
6.3V
20%
10uF
2
1
C201
10uF
20%
6.3V CERM
805
2
1
C171
0.22uF
20%
6.3V CERM 402
2
1
C352
0.22uF
20%
6.3V CERM 402
2
1
C215
0.22uF
20%
6.3V CERM 402
2
1
C342
0.22uF
20%
6.3V CERM 402
2
1
C327
0.22uF
20%
6.3V CERM 402
2
1
C268
0.22uF
20%
6.3V CERM 402
2
1
C358
402
CERM
6.3V
20%
0.22uF
2
1
C167
0.22uF
20%
6.3V CERM 402
2
1
C189
0.22uF
20%
6.3V CERM 402
2
1
C343
402
CERM
6.3V
20%
0.22uF
2
1
C212
402
CERM
6.3V
20%
0.22uF
2
1
C257
402
CERM
6.3V
20%
0.22uF
2
1
C177
402
CERM
6.3V
20%
0.22uF
2
1
C176
0.22uF
20%
6.3V CERM 402
2
1
C247
402
CERM
6.3V
20%
0.22uF
2
1
C341
402
CERM
6.3V
20%
0.22uF
2
1
C286
0.22uF
20%
6.3V CERM 402
2
1
C350
0.22uF
20%
6.3V CERM 402
2
1
C234
402
CERM
6.3V
20%
0.22uF
2
1
C317
402
CERM
6.3V
20%
0.22uF
2
1
C221
402
CERM
6.3V
20%
0.22uF
2
1
C237
402
CERM
6.3V
20%
0.22uF
2
1
C351
0.22uF
20%
6.3V CERM 402
2
1
C357
402
CERM
6.3V
20%
0.22uF
2
1
C269
402
CERM
6.3V
20%
0.22uF
2
1
C318
0.22uF
402
CERM
6.3V
20%
2
1
C283
0.22uF
20%
6.3V CERM 402
2
1
C308
0.22uF
6.3V
20% CERM
402
2
1
C170
402
CERM
6.3V
20%
0.22uF
2
1
C376
CERM
10uF
20%
6.3V 805
2
1
C378
805
CERM
6.3V
20%
10uF
2
1
C175
0.22uF
20%
6.3V CERM 402
2
1
C285
402
CERM
6.3V
20%
0.22uF
2
1
C360
0.22uF
20%
6.3V CERM 402
2
1
C375
805
CERM
6.3V
20%
10uF
2
1
C377
10uF
20%
6.3V CERM
805
2
1
C289
402
CERM
6.3V
20%
0.22uF
2
1
C261
402
CERM
6.3V
20%
0.22uF
2
1
C272
402
CERM
6.3V
20%
0.22uF
2
1
C227
0.22uF
20%
6.3V CERM 402
2
1
C259
402
CERM
6.3V
20%
0.22uF
2
1
C309
402
CERM
6.3V
20%
0.22uF
2
1
C158
402
CERM
6.3V
20%
0.22uF
2
1
C359
402
CERM
6.3V
20%
0.22uF
2
1
C371
402
CERM
6.3V
20%
0.22uF
2
1
C228
402
CERM
6.3V
20%
0.22uF
2
1
C313
0.22uF
20%
6.3V CERM 402
2
1
C184
402
CERM
6.3V
20%
0.22uF
2
1
C349
402
CERM
6.3V
20%
0.22uF
2
1
C192
0.22uF
20%
6.3V CERM 402
2
1
C348
0.22uF
20%
6.3V CERM 402
2
1
C168
0.22uF
20%
6.3V CERM 402
2
1
C368
402
CERM
6.3V
20%
0.22uF
2
1
C294
0.22uF
20%
6.3V CERM 402
2
1
C264
20%
6.3V
0.22uF
CERM 402
2
1
C296
0.22uF
20%
6.3V CERM 402
2
1
C231
0.22uF
20%
6.3V CERM 402
2
1
C280
0.22uF
20%
6.3V CERM 402
2
1
C295
0.22uF
20%
6.3V CERM 402
2
1
C364
0.22uF
20%
6.3V CERM 402
2
1
C328
0.22uF
20%
6.3V CERM 402
2
1
C347
0.22uF
20%
6.3V CERM 402
2
1
C354
402
CERM
6.3V
20%
0.22uF
2
1
C159
402
CERM
6.3V
20%
0.22uF
2
1
C160
402
CERM
6.3V
20%
0.22uF
2
1
C180
402
CERM
6.3V
20%
0.22uF
2
1
C183
402
CERM
6.3V
20%
0.22uF
2
1
C213
0.22uF
20%
6.3V CERM 402
2
1
C161
0.22uF
20%
6.3V CERM 402
2
1
C162
0.22uF
20%
6.3V CERM 402
2
1
C179
0.22uF
20%
6.3V CERM 402
+1_5V_MAIN
+3V_MAIN
2
1
C385
0.22uF
20%
6.3V CERM 402
2
1
C374
402
CERM
6.3V
20%
0.22uF
2
1
C395
402
0.22uF
20%
6.3V CERM
2
1
C739
0.22uF
20%
6.3V CERM 402
2
1
C736
0.22uF
20%
6.3V CERM 402
2
1
C245
0.22uF
20%
6.3V CERM 402
2
1
C735
CERM
0.22uF
20%
6.3V 402
2
1
C335
CERM
0.22uF
20%
6.3V 402
2
1
C139
402
CERM
6.3V
20%
0.22uF
2
1
C770
0.22uF
402
CERM
6.3V
20%
+2_5V_MAIN
4416
B
051-6809
+1_5V_AGP
MAXBUS_SLEEP
+2_5V_INTREPID
38
38
33
21
15
20
8
38
19
7
15
15
6
10
12
5
9
AVDD
VDD
VDD_PCI
AD3 AD4 AD5
AD2
AD0 AD1
VSS
AD6 AD7
AD17
AD16
AD15
AD8 AD9 AD10 AD11 AD12 AD13 AD14
AD27
AD26
AD25
AD18 AD19 AD20 AD21 AD22 AD23 AD24
AD28 AD29 AD30 AD31
CBE0 CBE1 CBE2 CBE3
PAR
PERR
GNT
DEVSEL
IDSEL
FRAME IRDY TRDY STOP
REQ
SERR
CRUN
SMI
VBBRST
VCCRST
INTA INTB INTC PCLK
PME
LEGC
XT2
DM1 DP1
DM2 DP2
DM3 DP3
RSDM4
RSDM2
RSDP2
RSDM3
RSDP3
RSDP1
XT1/SCLK
RSDM1
DM4 DP4
DM5 DP5
RREF
OCI1 OCI2
OCI4
OCI3
OCI5
RSDP4
RSDM5
RSDP5
PPON1
NC1 NC2
SMC
TEB
NTEST1
PPON2 PPON3 PPON4 PPON5
AVSS(R)
AVSS
SRCLK SRDTA SRMOD
NANDTEST
AMC
TEST
TABLE_ALT_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
Low/Full/High Speed (External)
Tie to GND (NEC_AVSS_F) at ball N11
NC
NC
Series Rpaks required to facilitate NAND-tree testing
NC
NC
NC
NC
NC
NC
(NEC_USB_DBP)
(NEC_USB_DBM)
(NEC_USB_DAP)
NC
IPD
OUT
USB 2.0
NC
NC
NC
IPD
IPD
IPD
IPD
OUT
OUT
OUT
OUT
OD
OD
OD
OD
OD
OD
(PCI_AD<27>)
IPD
NEC documentation indicates that NCs must be tied high.
Y1’s LOAD CAPACITANCE = 16 pF
(NEC_USB_DAM)
Low/Full/High Speed (External)
2
1
R636
402
MF
1/16W
5%
22
+3V_MAIN
21
R614
402
MF
1/16W
1%
9.09K
21
L7
SM
FERR-EMI-100-OHM
2
1
C759
402
CERM
50V
5%
27pF
2
1
C136
402
CERM
50V
5%
27pF
2
1
R124
100
5% 1/16W MF 402
P8
L9
N2B2A2
B14
H14
N14
P10
N1
D8
F11
J11
G4
D12
H12
L12
M11
B13
N13
B1
C8M4H3
L13
N8E2A3
A12
A13
P12
P3
D7
H4
G12
D13
F13
H13
J13
P2
C9
B8
G1
L8
N7
G3
P9
N9
M9
L6
M7
H1
C14
E14
G14
J12
K13
E13
F12
H11
K14
M14
P11
C6
A9
C10
C11
A11
C12
D9
H2
A8
J4 B9
A10
B10
B11
B12
M8
M6
P6
M10
L7
F4
A7
B7
C7
B3
D6
F3
C13
E12
G13
J14
L14
D14
F14
G11
K12
M13
G2
N6
C3
F1
J3
M2
N11
M12
P13
N12
N10
P7
L1
L2
M1
N3
M3
N4
A6
B6
P4
C5
A5
C4
B5
A4
B4
C1
C2
D2
D1
N5
D3
E1
E3
F2
J1
J2
K3
K1
L3
K2
P5
M5
U17
NEC_uPD720101_USB2
CRITICAL
FBGA
21
R606
5%
1/16W
MF
402
10K
+3V_MAIN
2
1
C744
0.1uF
20% 10V CERM 402
NO STUFF
21
R607
5%
402
MF
1/16W
0
2
1
C743
0.1uF
20% 402
CERM
10V
NO STUFF
63
RP43
SM1
1/16W
5%
10K
54
RP43
5%
10K
1/16W
SM1
7
2
RP43
5% 1/16W
10K
SM1
8
1
RP43
10K
5% 1/16W SM1
5
6
7
8
4
3
2
1
RP45
SM1
1/16W
47
5%
5
6
7
8
4
3
2
1
RP44
SM1
1/16W
47
5%
21
R608
1/16W
MF
402
5%
0
2 1
R615
402
MF
1/16W
5%
1K
2 1
R632
402
MF
1/16W
5%
1K
2
1
R172
0
5% 1/16W MF 603
21
R613
43.2
1/16W
MF
1%
402
21
R612
43.2
1% MF
1/16W
402
21
R610
43.2
402
1% MF
1/16W
21
R609
43.2
1% MF
1/16W
402
21
R798
1/16W
0
5% MF
603
21
Y1
8X4.5MM-SM
CRITICAL
30.0000M
2
1
C749
0.1uF
402
CERM
10V
20%
2
1
C750
0.1uF
402
CERM
10V
20%
2
1
C761
0.1uF
402
20% 10V CERM
2
1
C752
0.1uF
20% 10V CERM 402
2
1
C769
0.1uF
402
CERM
10V
20%
2
1
C748
0.1uF
402
CERM
10V
20%
2
1
C756
0.1uF
20% 10V CERM 402
2
1
C747
20% 10V CERM 402
0.1uF
2
1
C746
402
CERM
10V
20%
0.1uF
2
1
C765
CERM
10V
20% 402
0.1uF
2
1
C768
0.1uF
402
CERM
10V
20%
C197
10uF
20%
6.3V CERM 805
2
1
R617
402
1/16W
MF
5%
4.7K
2
1
C173
CERM
6.3V
20%
10uF
805
2
1
C751
0.1uF
20% 10V
CERM
402
2
1
C760
0.1uF
402
CERM
10V
20%
197S0038197S0608
Y1
Alt. for Siward Part
B
4417
051-6809
NEC_NANDTESTOUT_TP
NEC_XT2_R
PCI_AD<27>
PCI_AD<17>
PCI_AD<24>
NEC_RUSB_OCI_UF
NEC_LUSB_OCI NEC_RUSB_OCI
NEC_PPON4_TP
NEC_OCI<3>
NEC_LUSB_PPON NEC_RUSB_PPON NEC_PPON3_TP
NEC_PPON5_TP
NEC_NC<1>
NEC_USB_RSDP2
NEC_USB_DAP
NEC_USB_DBM
NEC_USB_DAM
NEC_USB_DBP
NEC_USB_RSDM1
NEC_USB_RSDM2
NEC_XT2
NEC_LUSB_OCI
NEC_RUSB_OCI
NEC_LUSB_OCI_UF
NEC_USB_RSDP1
NEC_AVDD
+3V_NEC_VDD
+3V_NEC_VDD
NEC_NC<2>
NEC_IDSEL
PCI_AD<1>
PCI_AD<0>
PCI_AD<4>
PCI_AD<3>
PCI_AD<2>
PCI_AD<5> PCI_AD<6> PCI_AD<7> PCI_AD<8> PCI_AD<9> PCI_AD<10> PCI_AD<11> PCI_AD<12> PCI_AD<13> PCI_AD<14> PCI_AD<15> PCI_AD<16>
PCI_AD<18> PCI_AD<19>
PCI_AD<21> PCI_AD<22>
PCI_AD<20>
PCI_AD<23>
PCI_AD<26>
PCI_AD<25>
PCI_AD<29>
PCI_AD<28>
PCI_AD<30> PCI_AD<31>
PCI_CBE<0> PCI_CBE<1> PCI_CBE<2> PCI_CBE<3>
PCI_PAR PCI_FRAME_L PCI_IRDY_L PCI_TRDY_L PCI_STOP_L
PCI_DEVSEL_L NEC_PCI_REQ_L NEC_PCI_GNT_L PCI_PERR_L PCI_SERR_L
NEC_SMI_L_TP
NEC_RREF
NEC_OCI<5>
NEC_AMC_TP
NEC_IO_RESET_L
NEC_MAIN_RESET_L
CLK33M_NEC
NEC_PME_L
NEC_CRUN_L
NEC_LEGC
NEC_PCI_INT_L
NEC_PCI_INTC_L
NEC_PCI_INTB_L
NEC_PCI_INTA_L
IO_RESET_L PMU_PME_L
NEC_IO_RESET_L NEC_PME_L NEC_MAIN_RESET_L
MAIN_RESET_L NEC_LEGC
+3V_NEC_VDD
NEC_OCI<4>
NEC_AVSS_F
NEC_AVSS_F
NEC_XT1
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
14
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
12
12
12
12
18
18
18
18
18
18
14
19
24
24
24
25
25
25
25
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
18
18
18
18
24
24
24
24
24
24
23
24
24
37
37
37
25
25
25
37
37
37
37
25
17
17
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
24
24
24
24
37
37
37
37
37
37
12
26
29
29
17
39
39
39
39
17
17
39
39
39
39
39
39
17
17
39
38
38
38
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
37
37
37
37
39
39
39
39
39
39
12
12
18
18
17
17
35
17
17
14
29
39
17
17
17 39
17
38
17
17
C/BE3*
C/BE2*
C/BE1*
C/BE0*
VR_EN* VR_PORT
VCCCB
VCCP
GND
VCC
GRST
MFUNC4 MFUNC5 MFUNC6
MFUNC3
MFUNC0
SUSPEND
MFUNC1 MFUNC2
PCLK
SPKROUT
GNT
TRDY
STOP
FRAME
PRST REQ
DEVSEL
PERR
IDSEL
SERR
IRDY
AD31
PAR
AD30
AD29
AD28
AD27
AD20 AD21
AD18 AD19
AD26
AD25
AD24
AD23
AD22
AD17
AD10 AD11
AD9
AD8
AD16
AD15
AD14
AD13
AD12
AD7
AD0
AD2 AD3 AD4 AD5 AD6
AD1
D14/RSVD
D13/CAD6
D12/CAD4
D11/CAD2
D10/CAD31
D15/CAD8
D9/CAD30
D8/CAD28
D7/CAD7
D6/CAD5
D5/CAD3
D4/CAD1
D3/CAD0
D2/RSVD
D1/CAD29
D0/CAD27
A22/CTRDY*
A20/CSTOP*
A23/CFRAME*
A21/CDEVSEL*
A19/CBLOCK*
A15/CIRDY*
A14/CPERR*
A12/CC/BE2*
A8/CC/BE1*
A25/CAD19
A24/CAD17
A18/RSVD
A17/CAD16
A16/CCLK
A13/CPAR
A11/CAD12
A10/CAD9
A9/CAD14
A7/CAD18
A6/CAD20
A5/CAD21
CE2/CAD10*
INPACK/CREQ*
WAIT/CSERR*
A4/CAD22
A3/CAD23
A2/CAD24
A1/CAD25
A0/CAD26
VPPD1
VPPD0
VCCD0* VCCD1*
IORD*/CAD13 IOWR*/CAD15
OE*/CAD11
WE*/CGNT*
CD2*/CCD2*
CD1*/CCD1*
CE1*/CC/BE0*
RDY/IREQ*/CINT*
VS1*/CVS1 VS2*/CVS2
REG*/CC/BE3*
RESET/CRST*
BVD1/CSTSCHG/STSCHG*/RI*
BVD2/SPKR*/CAUDIO
WP/IOIS16*/CCLKRUN*
RI_OUT/PME
CLK_48_RSVD/NC
TPS2211
OC
AVPP
AVCC2
AVCC1
AVCC0
GND
SHTDWN
VCCD0 VCCD1 VPPD0 VPPD1
V_5_2
V_5_1
V_3_2
V_3_1
V_12
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PCI1510 PULL-UPS
NC
0.1UF ARE USED TO INCREASE ESD DISCHARGES OF UP TO 10KV
TO MINIMIZE INDUCTANCE!
PC CARD/CARDBUS CONNECTOR
NC NC
CARDBUS
TI REFERENCE SCHEMATIC DID NOT HAVE BULK ON +VCC_CBUS_SW
NC
NC
MAKE SURE VCC AND VPP ARE WIDE PLANE/TRACES
INTEGRATED PULL-UP
(PCI_AD<19>)
+3V_MAIN
+5V_MAIN
2
1
C37
20% 10V CERM 402
0.1uF
21
R718
402
MF
1/16W
10K
5%
21
R714
MF
1/16W
10K
402
5%
21
R722
402
10K
1/16W
MF
5%
1
2
8
9
3
7
4
6
10
5
RP1
10K
5%
1/32W
25V
SM
2
1
C776
10uF
6.3V
20% CERM
805
A5
D13
B6
A9
B2
L8
D4
M11
K9
L3
L12
N13
B11
N11
N7M1E1D5C13A7
J3
N10
L1
M9
L2
M8
D8
C2
A8
A6
G3
K3
G1
N1
G10
L10
N12
M10
K10
L9
N9
K7
K1
C11
F12
B8
F2
L11
C1
N2M13K8H4F13D1A11A2
J1
K2
B4
C5
H12
J10
J13
K12
K11
A3
H11
J12
K13
J11
M12
B3
C4
A4
H10
G13
H13
B5
L13
A1
J2
M3
K6
D6
C6
M2
N4
N5
L6
M6
K4
E3
D3
N6
E4
D2
B1
F4
E2
F3
C3
F1
G4
G2
L7
H2
H3
H1
J4
M4
L5
K5
N3
L4
M5
M7
N8
F11
E11
A12
C9
C8
B12
D10
B9
B10
A10
C12
D11
E10
B7
A13
E13
F10
B13
C10
D12
E12
D9
G12
G11
D7
C7
U8
PCI1510GGU
BGA
CRITICAL
+2_5V_SLEEP
2
1
R721
10K
5%
1/16W
MF
402
2
1
C796
805
CERM
10V
20%
2.2uF
2
1
C800
805
CERM
10V
20%
2.2uF
2
1
C787
4.7uF
6.3V
20% CERM
805
2
1
C60
10uF
805
CERM
6.3V
20%
+3V_SLEEP
+3V_SLEEP_PCCARD
9
84
83 82
81
80879
78 77
76 75
74 73
72 71
70769
68 67
66 65
64 63
62 61
60659
58 57
56 55
54 53
52 51
50549
48 47
46 45
44 43
42 41
40439
38 37
36 35
34 33
32 31
30329
28 27
26 25
24 23
22 21
20219
18 17
16 15
14 13
12 11
10
1
J5
CRITICAL
QT500806-L111
M-ST-SM1
2
1
R756
MF 603
1/16W
5%
0
2
1
R726
0
5%
1/16W
MF
402
2
1
C786
6.3V 402
CERM
20%
0.22uF
6
5
4
3
9
14
15
2
1
16
87
10
13
12
11
U4
SSOI
2
1
C775
CERM
20% 402
6.3V
0.22uF
2
1
C778
402
CERM
20%
6.3V
0.22uF
2
1
C784
0.22uF
402
CERM
20%
6.3V
2
1
C783
20%
0.22uF
6.3V CERM 402
2
1
C791
0.22uF
402
CERM
20%
6.3V
21
R724
47
5%
1/16W
MF
402
2
1
C789
0.22uF
402
CERM
20%
6.3V
2
1
C782
0.22uF
20% CERM
402
6.3V
2
1
C40
CERM
20% 10V
402
0.1uF
2
1
R719
402
22
5%
1/16W
MF
21
R723
402
MF
1/16W
5%
47
18 44
B
051-6809
CBUS_DET_2_L
CBUS_DATA<10>
CBUS_DATA<9>
CBUS_DATA<8>
CBUS_BVD1_L
CBUS_BVD2_L
CBUS_REG_L
CBUS_INPACK_L
CBUS_WAIT_L
CBUS_RESET_L
CBUS_VS2
CBUS_ADDR<24>
CBUS_ADDR<23>
CBUS_ADDR<22>
+VPP_CBUS_SW
+VCC_CBUS_SW
CBUS_ADDR<21>
CBUS_ADDR<20>
CBUS_ADDR<19>
CBUS_ADDR<18>
CBUS_ADDR<17>
CBUS_IOWR_L
CBUS_IORD_L
CBUS_VS1
CBUS_CE2_L
CBUS_DATA<15>
CBUS_DATA<14>
CBUS_DATA<13>
CBUS_DATA<12>
CBUS_DATA<11>
CBUS_DET_1_L
CBUS_ADDR<25>
CBUS_ADDR<8>
CBUS_WP_L
CBUS_DATA<2>
CBUS_DATA<1>
CBUS_DATA<0>
CBUS_ADDR<0>
CBUS_ADDR<1>
CBUS_ADDR<2>
CBUS_ADDR<3>
CBUS_ADDR<4>
CBUS_ADDR<5>
CBUS_ADDR<6>
CBUS_ADDR<7>
CBUS_ADDR<12>
CBUS_ADDR<15>
CBUS_ADDR<16>
+VPP_CBUS_SW
+VCC_CBUS_SW
CBUS_READY
CBUS_WE_L
CBUS_ADDR<14>
CBUS_ADDR<13>
CBUS_ADDR<9>
CBUS_ADDR<11>
CBUS_OE_L
CBUS_ADDR<10>
CBUS_CE1_L
CBUS_DATA<7>
CBUS_DATA<6>
CBUS_DATA<5>
CBUS_DATA<4>
CBUS_DATA<3>
PCI_AD<19>
SLEEP_L_LS5
CBUS_VCCD0_L CBUS_VCCD1_L
CBUS_VPPD0
CBUS_VPPD1
PCI_AD<26>
CBUS_PCI_IDSEL
PCI_AD<27> PCI_AD<28> PCI_AD<29>
PCI_AD<3>
PCI_AD<30> PCI_AD<31>
PCI_AD<4> PCI_AD<5> PCI_AD<6> PCI_AD<7> PCI_AD<8> PCI_AD<9>
PCI_AD<25>
PCI_AD<24>
PCI_AD<23>
PCI_AD<22>
PCI_AD<21>
PCI_AD<20>
PCI_AD<2>
PCI_AD<18>
PCI_AD<17>
PCI_AD<16>
PCI_AD<15>
PCI_AD<14>
PCI_AD<13>
PCI_AD<12>
PCI_AD<11>
PCI_AD<10>
PCI_CBE<0> PCI_CBE<1> PCI_CBE<2> PCI_CBE<3>
PCI_AD<1>
PCI_AD<0>
CLK33M_CBUS
PCI_STOP_L PCI_TRDY_L PCI_DEVSEL_L
CBUS_PCI_REQ_L CBUS_PCI_GNT_L
CBUS_INT_L
CBUS_SUSPEND_PU
CBUS_MFUNC6_PD
CBUS_MFUNC5_PD
CBUS_MFUNC4_PD
CBUS_MFUNC3_PD
CBUS_MFUNC2_PD
CBUS_MFUNC1_PD
PCI_PAR PCI_IRDY_L
PCI_FRAME_L
PCI_SERR_L
PCI_PERR_L
MAIN_RESET_L
CBUS_ADDR<16>
CBUS_PCI_RESET_L
CBUS_VS2
CBUS_VS1
CBUS_DATA<15>
CBUS_ADDR<0> CBUS_ADDR<1> CBUS_ADDR<2> CBUS_ADDR<3> CBUS_ADDR<4> CBUS_ADDR<5> CBUS_ADDR<6> CBUS_ADDR<7> CBUS_ADDR<8> CBUS_ADDR<9> CBUS_ADDR<10> CBUS_ADDR<11> CBUS_ADDR<12> CBUS_ADDR<13> CBUS_ADDR<14> CBUS_ADDR<15> CBUS_ADDR_16_UF CBUS_ADDR<17> CBUS_ADDR<18> CBUS_ADDR<19> CBUS_ADDR<20> CBUS_ADDR<21> CBUS_ADDR<22> CBUS_ADDR<23> CBUS_ADDR<24> CBUS_ADDR<25>
CBUS_DATA<0> CBUS_DATA<1> CBUS_DATA<2> CBUS_DATA<3> CBUS_DATA<4> CBUS_DATA<5> CBUS_DATA<6> CBUS_DATA<7> CBUS_DATA<8> CBUS_DATA<9> CBUS_DATA<10> CBUS_DATA<11> CBUS_DATA<12> CBUS_DATA<13> CBUS_DATA<14>
CBUS_WAIT_L
CBUS_INPACK_L
CBUS_CE2_L
CBUS_WP_L
CBUS_BVD2_L
CBUS_REG_L
CBUS_RESET_L
CBUS_READY
CBUS_WE_L
CBUS_CE1_L
CBUS_OE_L
CBUS_IOWR_L
CBUS_IORD_L
CBUS_DET_2_L
CBUS_DET_1_L
CBUS_BVD1_L
PCI_PERR_L
CBUS_SUSPEND_PU
CBUS_MFUNC6_PD
CBUS_MFUNC5_PD
CBUS_MFUNC4_PD
CBUS_MFUNC1_PD CBUS_MFUNC2_PD CBUS_MFUNC3_PD
PCI1510_VR_EN_L
+VCC_CBUS_SW
+VPP_CBUS_SW
TPS2211_SHTDWN_L
PCI_SERR_L
+3V_SLEEP_PCCARD
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
14
12
20
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
17
17
26
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
17
12
12
12
12
17
17
17
17
17
17
17
17
19
24
32
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
17
17
17
17
24
24
24
24
24
24
24
24
24
18
18
18
18
18
18
37
33
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
24
24
24
24
37
37
12
37
37
37
37
37
37
17
17
29
18
18
17
18
18
17
39
18
18
18
18
18
18
18
18
18
18
18
18
18
38
38
18
18
18
18
18
18
18
18
18
18
18
18
18
39
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
38
38
18
18
18
18
18
18
18
18
18
18
18
18
18
18
39
34
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
37
37
37
37
39
39
35
39
39
39
12
12
14
18
18
18
18
18
18
18
39
39
39
18
18
39
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
39
39
18
18
18
18
18
18
18
18
18
38
38
18
38
XIN/CLKIN
SSCLK
VSS
S0
S1
FRSEL
XOUT
VDD
PAD
THRML
GND
SDA/DK0
SCL/DK1
AGND
PD* EDGE/HTPLG
DE HSYNC VSYNC IDCK+ IDCK-
D11
D10
D2 D3 D4 D5 D6 D7 D8 D9
D1
D0
GND
GND
AVCC
PVCC2
PVCC1
VCC
AVCC
VCC
EXT_SWING
VREF
TX1+
TX2-
TX1­TX2+
TX0+ TX0-
TXC-
TXC+
MSEN
PGND
AGND
PGND
AGND
CTL3/A2 ISEL/RST*
MVREF
VSS
VSS
(1 OF 6)
RAGE_MOBILITY
AGP_BUSYB
AD_STBB1
AD_STBB0
AD_STB0
AGPREF
AD_STB1
AD30
AD31
AD29 AD28 AD27 AD26 AD25 AD24
AD17
AD14
AD15
AD23 AD22
AD19
AD20
AD21
AD16
AD18
AD6 AD5 AD4
AD13
AD11
AD12
AD10 AD9 AD8 AD7
AD3
CBEB1
CBEB2
CBEB3
AD0
AD1
AD2
CBEB0 PCICLK
FRAMEB
PAR
IRDYB TRDYB
RSTB
INTAB
GNTB
REQB
DEVSELB
STOPB
MEMVMODE1
MEMVMODE0
TEST_YCLK TEST_MLCK
D+ D-
VREFG
MEMTEST PLLTEST
WBF
ST0 ST1 ST2
SBA5
SBA6
SBA3
SBA4
SBA7
SBA2
STP_AGPB
RBFB
SB_STB
SBA1 SBA0
SUS_STAT
AGPTEST
AGP8X_DETB
RSTB_MSK
DBI_LO DBI_HI
SB_STBS
(2 OF 6)
RAGE_MOBILITY
VSS VSS
VSSVSS
RAGE_MOBILITY
(6 OF 6)
VSS
VDDCI
OE
GND
OUT
VCC
OSC
TABLE_ALT_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
M11 AGP INTERFACE
(PLACE R315 CLOSE TO OSC)
CLOSE TO ATI M11 VREF PIN
NC
CLOSE TO ATI PIN AJ29)
to SI pin#2
NC
NC
MEMVMODE0=1.8V
FOR 2.5 VDDR1
MEMVMODE1=1.8V
FOR 1.8 VDDR1
(SET TO LOW SWING MODE)
Place C879 close
SIL1162 DVI-Compliant Transmitter
Ext. TMDS source termination
PLACE VERF VOLTAGE DIVIDER
MAIN_RESET_L IS TOGGLED FOR SLEEP
27M OSC
(PLACE THE OSCILLATOR AND R304 AND R305
S0=1;S1=M => -1.5% DOWN-SPREAD
SPREAD SPECTRUM SUPPORT
MEMVMODE1=GND
MEMVMODE0=GND
(PLACE C408 CLOSE TO AGPREF PIN)
PLL NOISE SHOULD BE LESS THAN 100mV PEAK-TO-PEAK
(PULL-UP to GPU_MEM_IO)
21
R309
1/16W
47
MF
402
5%
2
1
R337
10K
MF
5%
1/16W
402
21
L22
SM
60-OHM-EMI
2
1
C457
0.01uF
402
20% CERM
16V
2
1
C458
CERM
20%
6.3V 805
10uF
2
1
R338
402
5% MF
20K
1/16W
2
1
R335
20K
402
MF
1/16W
5%
2
1
R372
45.3
1% 1/16W MF 402
21
R336
402
0
1/16W
MF
5%
2
1
R323
10K
MF
1/16W
5%
402
2
1
R371
4.7K
402
MF
1/16W
5%
ATI_MEMIO_HI
2
1
R375
ATI_MEMIO_HI
402
MF
1/16W
5%
4.7K
2
1
R388
1%
1/16W
1K
402
MF
2
1
R397
402
1%
1K
MF
1/16W
2
1
R373
1%
1K
402
MF
1/16W
2
1
R365
402
MF
1/16W
1%
1K
2
1
C516
0.1uF
10V
20%
CERM
402
2
1
C508
20%
CERM
6.3V
10uF
805
2
1
R304
100K
5%
402
MF
NO STUFF
1/16W
2
1
C401
805
20%
6.3V
4.7uF
CERM
2
1
C409
402
CERM
0.1uF
10V
20%
21
L16
SM
FERR-EMI-100-OHM
+3V_SLEEP
2
1
R289
NO STUFF
0
402
5% MF
1/16W
21
L66
FERR-EMI-100-OHM
SM
GPU_SS
+3V_SLEEP
8
1
2
7
5
3 4
6
U30
CY25811
SOI
CRITICAL
GPU_SS
2
1
C390
GPU_SS
20% 10V CERM
0.1uF
402
2
1
C384
GPU_SS
6.3V
20% CERM
805
10uF
2
1
R297
402
5% 1/16W
0
MF
GPU_SS
2
1
R298
0
NO STUFF
1/16W MF
5%
402
2
1
R290
1/16W
MF
5%
402
NO STUFF
0
2
1
R315
1% MF
287
402
1/16W
2
1
R320
402
162
1/16W
MF
1%
2
1
R313
47
1%
1/16W
MF
402
2
1
R324
402
47K
MF
1/16W
5%
2
1
R325
1/16W
402
5%
47K
MF
2
1
R376
5% MF
402
ATI_MEMIO_LO
4.7K
1/16W
2
1
R370
ATI_MEMIO_LO
5%
1/16W
MF
402
4.7K
21
R305
GPU_SS
0
5%
1/16W
MF
402
2
1
R285
5%
33
1/16W 402
MF
GPU_SS
2
1
C412
0.01uF
20% 16V
402
CERM
2
1
C476
16V 402
CERM
20%
0.01uF
2
1
C490
CERM
0.01uF
20% 16V
402
2
1
C442
16V CERM
20%
402
0.01uF
2
1
C530
0.01uF
16V CERM
20%
402
21
2
22
3
32
33
41
42
38
39
35
36
49
26
27
46
28
45
29
47
48
25
11
12
20
1234
30
44
19
7
8
9
10
13
14
15
16
5
6
17
18
24
40
34
314337
U58
SIL1162
EXT_TMDS
TSSOP
21
L78
SM-1
EXT_TMDS
400-OHM-EMI
21
L79
400-OHM-EMI
SM-1
EXT_TMDS
2
1
C856
10uF
20%
6.3V CERM 805
EXT_TMDS
21
L80
SM-1
EXT_TMDS
400-OHM-EMI
2
1
R825
10K
EXT_TMDS
402
1/16W MF
5%
2
1
C858
402
100pF
5% CERM
50V
EXT_TMDS
2
1
C860
50V 402
100pF
5%
EXT_TMDS
CERM
2
1
C854
10uF
EXT_TMDS
20%
6.3V 805
CERM
2
1
R823
1/16W MF
5%
10K
EXT_TMDS
402
2
1
R818
402
MF
1/16W
5%
10K
NO STUFF
2
1
R824
1/16W
10K
5% MF
NO STUFF
402
2
1
R819
NO STUFF
5%
1/16W
MF
402
10K
2
1
C859
402
CERM
50V
5%
100pF
EXT_TMDS
2
1
C857
50V
5% 402
100pF
EXT_TMDS
CERM
2
1
C855
10uF
20%
6.3V
EXT_TMDS
805
CERM
2
1
C861
EXT_TMDS
5% 402
CERM
50V
100pF
2
1
C862
100pF
402
CERM
50V
EXT_TMDS
5%
2
1
C863
10uF
20%
6.3V 805
CERM
EXT_TMDS
3
4
2
1
RP56
5%
EXT_TMDS
1/16W
SM1
22
3
4
2
1
RP52
SM1
1/16W
5%
EXT_TMDS
22
3
4
2
1
RP57
5%
1/16W
SM1
EXT_TMDS
22
3
4
2
1
RP53
5%
EXT_TMDS
SM1
1/16W
22
5
6
7
8
4
3
2
1
RP49
0K
SM1
1/16W
5%
EXT_TMDS
3
4
2
1
RP58
INT_TMDS
1/16W
0
SM1
5%
3
4
2
1
RP59
0
INT_TMDS
5%
1/16W
SM1
3
4
2
1
RP54
INT_TMDS
0
1/16W
5%
SM1
3
4
2
1
RP55
0
INT_TMDS
SM1
1/16W
5%
5
6
7
8
4
3
2
1
RP50
1/16W
SM1
5%
0K
EXT_TMDS
5
6
7
8
4
3
2
1
RP51
EXT_TMDS
1/16W
5%
0K
SM1
5
6
7
8
4
3
2
1
RP60
0K
SM1
5%
1/16W
EXT_TMDS
+3V_SLEEP
2
1
C408
10V CERM
0.1uF
20%
402
21
R827
MF
300
5%
402
1/16W
EXT_TMDS
21
R828
5%
1/16W
MF
402
EXT_TMDS
300
21
R829
1/16W
300
5% MF
402
EXT_TMDS
21
R830
300
5% MF
1/16W
402
EXT_TMDS
2
1
C873
470pF
10% 50V CERM
NO STUFF
402
2
1
C877
10% 402
CERM
50V
470pF
NO STUFF
2
1
C878
402
CERM
50V
10%
470pF
NO STUFF
2
1
C874
10%
470pF
402
NO STUFF
50V CERM
2
1
C872
402
CERM
50V
10%
470pF
NO STUFF
2
1
C876
NO STUFF
470pF
10% 50V
CERM
402
2
1
C871
402
CERM
50V
10%
470pF
NO STUFF
2
1
C875
470pF
NO STUFF
10% 402
CERM
50V
21
C864
0.1uF
EXT_TMDS
402
10V
20%
CERM
21
C866
20%
CERM
402
10V
EXT_TMDS
0.1uF
21
C867
CERM
20%
0.1uF
EXT_TMDS
402
10V
21
C865
20%
0.1uF
CERM
402
10V
EXT_TMDS
2
1
R836
402
1/16W
EXT_TMDS
MF
5%
10K
21
R833
NO STUFF
402
MF
1/16W
5%
47
2
1
R837
1/16W 402
4.99K
EXT_TMDS
MF
1%
2
1
R835
10K
NO STUFF
5%
1/16W
402
MF
21
R832
47
EXT_TMDS
402
MF
1/16W
5%
2
1
R838
1%
1K
EXT_TMDS
402
MF
1/16W
2
1
R839
EXT_TMDS
1% 1/16W
1K
MF 402
AE27
L1
A22
L2
B22
K1
A23
K2
B23
AC4
AB2
V4
U2
E2
G4
A3
C5
A10
C11
A15
C16
C26
B29
G27
G29
P1
D19
R4
A18
R3
A19
P4
B18
P2
C19
AK3
T28
E8 J6
AJ28
AG29
T27
AE29
AF28
AF30
AC28 AB29 AC27 AC30 AD27 AD30 AE28 AD29
AD28
AC29
AD24
AH30
AF29
AE30
AC22
AG30
R28
D8
B6
B7 C8
T30
AH29
AF27
U27
T29
Y25 Y27
AC11
AC10
W28 U29 R30 N27
K29
K30
AG28
U25
Y29
W29
M28
N29
N28 N30 M30 M27 M29 L28
AB30 AB27
L30
AA29 AB28 AA30 AA27
Y30
AA28
W30 W27 V30 V28
L27
V29 V27 U30 U28 R27 R29 P28 P30 P27 P29
L29 K28
U47
ATI_64MB
CRITICAL
M11-CSP64
64MB
BGA
G30
N3
N4
N1
N2
M4
L3
M3
L4
K3
K4
J1
J2
H1
H2
B27
A27
D23
C23
D22
C20
D20
C21
D21
C22
A25
B25
A26
B26
AE4
AE3
AD4
AD3
AB4
AB3
AA4
AA3
AD2
AD1
AC2
AC1
AA2
AA1
Y2
Y1
Y4
Y3
W4
W3
U4
U3
T4
T3
W2
W1
V2
V1
T2
T1
R2
R1
G2
G1
F2
F1
D2
D1
C2
C1
J4
J3
H4
H3
F4
F3
E3
E4
B1
A1
B2
A2
B4
A4
B5
A5
D3
C3
D4
C4
D6
C6
D7
C7
A8
B8
A9
B9
A11
B11
A12
B12
C9
D9
C10
D10
C12
D12
C13
D13
A13
B13
A14
B14
A16
B16
A17
B17
C14
D14
C15
D15
C17
D17
C18
D18
C24
D24
C25
D25
C27
D27
C28
D28
B28
A28
A29
A30
C29
C30
D29
D30
E27
E28
F27
F28
H27
H28
J27
J28
E29
E30
F29
F30
H29
H30
J29
J30
AC3
AB1
V3
U1
E1
G3
B3
D5
B10
D11
B15
D16
D26
B30
G28
U47
ATI_64MB
BGA
64MB
M11-CSP64
CRITICAL
R19
R18
R17
R16
T16
U16
V16
W16
T14
T13
T12
T15
R15
P15
N15
M15
B19
A21
P3
M2
P25
F18
AE15
U6
U47
ATI_64MB
BGA
CRITICAL
64MB
M11-CSP64
2
1
C879
EXT_TMDS
20%
0.1uF
CERM
402
10V
+3V_SLEEP
2
1
R826
MF
EXT_TMDS
330
402
1/16W
5%
14
81
7
G1
CRITICAL
SM
27MHZ
G1
197S0318 197S0048
Alt. for Siward Part
19 44
B
051-6809
AGP_AD_STB<0>
GPU_DVOD<4>
AGP_SBA<6>
SI_RST_L
SI_A2
SI_I2S_DATA
SI_I2C_CLK
+3V_SI_VCC
MAIN_RESET_L
INT_AGP_VREF
AGP_BUSY_L
AGP_AD<30>
GPU_AGP_TEST
AGP_AD_STB_L<1>
AGP_AD_STB_L<0>
AGP_AD_STB<1>
AGP_AD<31>
AGP_AD<29> AGP_AD<28> AGP_AD<27>
AGP_AD<24>
AGP_AD<26>
AGP_AD<22>
AGP_AD<23>
AGP_AD<21> AGP_AD<20>
AGP_AD<16>
AGP_AD<14>
AGP_AD<15>
AGP_AD<13> AGP_AD<12> AGP_AD<11>
AGP_AD<9>
AGP_AD<10>
AGP_AD<8> AGP_AD<7>
AGP_AD<5>
AGP_AD<2>
AGP_AD<3>
AGP_AD<1>
AGP_CBE<3>
AGP_AD<0>
AGP_CBE<1>
AGP_CBE<2>
CLK66M_GPU_AGP
AGP_CBE<0>
AGP_FRAME_L
AGP_TRDY_L
AGP_IRDY_L
AGP_DEVSEL_L
AGP_STOP_L
AGP_GNT_L
AGP_REQ_L
AGP_ATI_INT_L
ATI_MEMVMODE0 ATI_MEMVMODE1
GPU_MEM_IO
GPU_THERM_DP GPU_THERM_DM
ATI_MEMTEST
AGP_WBF_L
AGP_ST<0> AGP_ST<1> AGP_ST<2>
AGP_SBA<7>
AGP_SBA<5> AGP_SBA<4> AGP_SBA<3> AGP_SBA<2> AGP_SBA<1>
AGP_RBF_L
AGP_STP_L AGP_SB_STB
ATI_RSTB_MSK
ATI_DBI_HI_PU
AGP_SB_STB_L
GPU_VCORE_VDDCI
+3V_ATI_SS
TMDS_DP<2>
TMDS_DN<2>
ATI_DVO_HSYNC
GPU_DVOD<0>
GPU_DVOD<1>
+3V_SI_PLLVCC
+3V_GPU
SI_TMDS_D0_STM
SI_TMDS_CLK_STM
TMDS_CLKN
SI_TMDS_D1_STM
SI_MSEN
SI_TMDS_CLKN
SI_TMDS_D2_STM
GPU_DVO_VSYNC
SI_TMDS_CLKP
TMDS_DP<1>
GPU_TMDS_CLKP
TMDS_DN<0>
+3V_SI_AVCC
TMDS_DN<0>
TMDS_DP<0>
TMDS_DN<2>
GPU_TMDS_DN<1>
TMDS_CLKP
ATI_DVOD<10>
SI_TMDS_DP<0> SI_TMDS_DN<0>
GPU_TMDS_CLKN
SI_TMDS_DP<2>
GPU_VCORE
+1_5V_AGP
+3V_GPU
+3V_GPU
+1_5V_AGP
+1_8V_GPU
MAIN_RESET_L
CY25811_S0
CY25811_S1
ATI_SSCLK_UF
ATI_SSCLK_IN
ATI_DVOD<7> ATI_DVOD<6> ATI_DVOD<5> ATI_DVOD<4>
GPU_DVOD<7> GPU_DVOD<6> GPU_DVOD<5> GPU_DVOD<4>
GPU_DVOD<3>
GPU_DVOD<6>
GPU_DVOD<8> GPU_DVOD<9>
GPU_DVOD_DE
GPU_DVOD<11>
ATI_DVOD<1> ATI_DVOD<0> ATI_DVOD<3> ATI_DVOD<2> GPU_DVOD<2>
ATI_DVOD<8> ATI_DVOD<9>
ATI_DVO_VSYNC ATI_DVOD_DE ATI_DVO_CLKP
GPU_DVOD<10> GPU_DVOD<11>
GPU_DVOD<9>
GPU_DVO_HSYNC GPU_DVO_VSYNC GPU_DVOD_DE GPU_DVO_CLKP
SI_TMDS_DP<2>
TMDS_CLKP
TMDS_DP<0>
TMDS_DN<1>
TMDS_DN<0> TMDS_DP<0>
GPU_TMDS_DN<0>
TMDS_DP<2>
SI_TMDS_DN<2>
TMDS_CLKN
SI_TMDS_CLKN
TMDS_DP<1> TMDS_DN<1>
SI_TMDS_DP<0>
TMDS_CLKN
TMDS_DN<1> TMDS_DP<1>
GPU_TMDS_DP<1>
GPU_TMDS_DN<2> GPU_TMDS_DP<2>
TMDS_DN<2>TMDS_DP<2>
SI_VREF_IDCK_N
ATI_DVOD<11>
GPU_DVOD<0> GPU_DVOD<1>
SI_TMDS_CLKP
GPU_DVOD<5>
SI_PD_L
GPU_DVOD<2>
SI_TMDS_DN<2>
SI_VREF_IDCK_N
+1_8V_GPU
SI_TMDS_DP<1>
SI_TMDS_DN<0>
SI_TMDS_DP<1>
GPU_DVOD<8>
GPU_TMDS_DP<0>
SI_TMDS_DN<1>
SI_EXT_SWING_SET
TMDS_CLKP
SI_TMDS_DN<1>
ATI_OSC_OE
ATI_CLK27M_OSC
AGP8X_DET_PU
AGP_PAR
AGP_ATI_RESET_L
AGP_ATI_VREFG
GPU_MEM_IO
AGP_ATI_VREF
ATI_CLK27M_IN
GPU_VCORE_VDDCI
AGP_SBA<0>
ATI_DBI_LO_PU
GPU_DVOD<7>
GPU_DVOD<10>
SI_HPD
GPU_DVO_HSYNC
GPU_DVO_CLKP
GPU_DVOD<3>
AGP_AD<4>
AGP_AD<6>
AGP_AD<19> AGP_AD<18> AGP_AD<17>
AGP_AD<25>
+3V_GPU
38
38
39
21
21
29
38
20
38
38
20
24
38
39
39
21
39
39
39
39
39
19
21
21
19
38
19
39
39
39
39
39
39
39
39
39
39
39
38
21
38
37
37
20
37
37
37
37
37
37
37
39
16
20
20
16
21
18
37
37
37
37
37
37
37
37
37
37
37
37
37 37
21
37
38
20
37
36
37
38
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
35
37
37
37
37
37
37
37
37
21
37
37
37
37
37
37
37
37
37
38
22
22
36
36
36
19
22
36
36
36
22
36
22
22
22
22
36
22
36
36
36
36
38
15
19
19
15
20
17
35
35
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36 36
35
36
36
36
36
36
36
36
36
36
36
36
36
36
22
22
22
22
22
36
22
36
22 36
22
22
36
22
22
22 36
36
22 22
36
36
36
36
36
36
36
20
36
36
36
36
36
36
22
36
37
21
35
38
37
36
36
36
36
36
37
37
37
37
37
37
19
12
19
12
20
20
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
14
19
25
25
12
12
12
12
12
12
12
12
12
12
12
12
12
19
38
19
19
20
19
19
12
19
19
19
19
19
20
19
19
19
19
20
19
20
19
20
19
20
12
12
12
12
19
14
19
35
20
20
20
20
20
19
19
19
19
19
19
19
19
19
19
20
20
20
20 19
19
20
20
20
20
20
19
19
19
19
19
19
19
19
19
19
19
19
19
20
19
19
19 19
19
19
19
19
19
19 20
20
19 19
19
20
19
19
19
19
19
19
19
19
19
19
19
19
20
19
19
19
35
38
12
19
20
19
12
19
19
19
19
19
12
12
12
12
12
12
12
B00ST
SW
TG
EXT VCC VCC
INT
VIN
SGND PGND
RUN/SS
BG
VFB
ITH
ION
PGOOD
VRNG FCB
G
D
S
G
D
S
VDD15
VSS
RAGE_MOBILITY
(5 OF 6)
VDDC
ZV_LCDDATA11 ZV_LCDDATA12
VSS
VSS
VSS
VSS
VSS
(3 OF 6)
RAGE_MOBILITY
ZV_LCDDATA0 ZV_LCDDATA1
ROMCSB
SSIN
TESTEN
XTALOUT
SSOUT
TXCLK_LP
TXCLK_LN
TXOUT_L3P
XTALIN
TXCP
TX0P TX1M
TXCM
TX2M
TX1P
TX2P
TX0M
GPIO13 GPIO14
GPIO9
GPIO11
GPIO10
GPIO12
GPIO8
TXOUT_U1N
TXOUT_U0N TXOUT_U0P
TXOUT_U1P TXOUT_U2N
TXCLK_UP
TXOUT_U3N
TXOUT_L1P
TXOUT_L1N
TXOUT_L0P
TXOUT_L0N
TXOUT_U2P
TXCLK_UN
TXOUT_U3P
TXOUT_L2N TXOUT_L2P TXOUT_L3N
GPIO4
GPIO3
GPIO2
GPIO6 GPIO7
GPIO5
GPIO1
GPIO0
ZV_LCDCNTL3
ZV_LCDCNTL2
ZV_LCDDATA19
ZV_LCDDATA18
ZV_LCDDATA17
ZV_LCDDATA23
ZV_LCDDATA22
ZV_LCDCNTL1
ZV_LCDCNTL0
ZV_LCDDATA20 ZV_LCDDATA21
AUXWIN
COMP_B
DIGON
C_R
ZV_LCDDATA16
ZV_LCDDATA10
ZV_LCDDATA9
ZV_LCDDATA8
ZV_LCDDATA7
ZV_LCDDATA13 ZV_LCDDATA14 ZV_LCDDATA15
ZV_LCDDATA6
ZV_LCDDATA2 ZV_LCDDATA3 ZV_LCDDATA4 ZV_LCDDATA5
VSYNC
V2SYNC
HSYNC
H2SYNC
RSET
R2SET
Y_G
B
R G
GPIO15 GPIO16
BLON
DDC2DATA
DDC2CLK
DDC1DATA
DDC1CLK
DDC3DATA
DDC3CLK
HPD1
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
SUPPLY
GPU VCORE
WHEN VCORE_CNTL HIGH => 1.2V
1.2V = 0.8V * (1 + R329 / (R328//R330))
WHEN VCORE_CNTL LOW => 1.0V
1.0V = 0.8V * (1 + R329 / R330)
M10 Power Shut down Sequencing
NC
M11 CORE PWR/LVDS/TMDS
Int.TMDS Termination
Place all TMDS 10 ohms close to GPU
TRACE SO THAT IT MAY BE CUT BETWEEN CAPS
NC
NC
GPU VCORE - 1.2V
(GPIO1) (GPIO2) (GPIO3) (GPIO4)
NC
(PUT ALL CAPs BELOW ATI ASIC)
NC
NC NC
NC
(NO ICT TEST)
(NO ICT TEST)
NC
NC
(GPIO5)
NC
NC
NC
.
NC
NC
NC
(GPIO6)
(NO ICT TEST)
(NO ICT TEST)
(500mA)
NC
(GPIO0)
CMF LINE SHOULD BE ROUTED AS 4MIL SURFACE
TERMINATION NETWORK SHOULD BE CONNECTED AS SHOWN
2
1
C440
20%
0.22uF
6.3V CERM 402
2
1
C484
805
CERM
10uF
20%
6.3V
2
1
C485
805
6.3V
10uF
20% CERM
2
1
C441
0.22uF
6.3V
20% CERM
402
2
1
C445
0.22uF
6.3V 402
CERM
20%
2
1
C446
6.3V
20% CERM
402
0.22uF
2
1
C449
0.22uF
CERM 402
6.3V
20%
2
1
C434
402
CERM
20%
6.3V
0.22uF
2
1
C452
0.22uF
20% CERM
402
6.3V
2
1
C451
20% CERM
402
6.3V
0.22uF
2
1
C494
CERM 402
20%
6.3V
0.22uF
2
1
C498
0.22uF
402
CERM
20%
6.3V
2
1
C509
20%
6.3V CERM 402
0.22uF
2
1
C510
20% CERM
402
6.3V
0.22uF
2
1
C512
20% CERM
6.3V
0.22uF
402
2
1
C513
20%
0.22uF
6.3V 402
CERM
2
1
C524
6.3V 402
CERM
20%
0.22uF
2
1
C525
0.22uF
6.3V
20% CERM
402
2
1
C528
0.22uF
CERM
20%
6.3V 402
2
1
C531
6.3V 402
CERM
20%
0.22uF
2
1
C533
0.22uF
20% CERM
6.3V 402
2
1
C477
6.3V 402
20% CERM
0.22uF
2
1
C486
6.3V CERM 402
20%
0.22uF
2
1
C495
6.3V
20% CERM
402
0.22uF
2
1
C704
20%
22uF
CERM 1210
10V
2
1
D29
MBRS130LT3
SM
3
1
D12
SOT23
1N914
2
1
C481
25V
0.1uF
603
20%
CERM
21
R358
603
MF
1/16W
5%
2.2
2
1
C431
CERM
20%
603
0.1uF
25V
2
1
R331
603
5% 1/16W MF
1
2
1
R326
1/16W 402
MF
1%
576K
2
1
C466
4.7uF4.7UF
CERM
20% 10V
1206
+5V_MAIN
2
1
R343
0
402
MF
5% 1/16W
2
1
R330
402
MF
1%
20K
1/16W
2
1
C712
NO STUFF
402
10V
CERM
20%
0.1uF
21
R549
GPU_PWRMSR
1/16W
5%
10K
402
MF
21
XW6
OMIT
SM
3
10
8
15 14
6
1
2
13
5
7
1149
16
12
U32
CRITICAL
SSOP
LTC1778
2
1
R344
402
MF
0
1/16W
5%
NO STUFF
2
1
C465
5% CERM
402
220pF
25V
2
1
C708
CERM
20% 25V
1206
4.7uF
+PBUS
2
1
R327
1M
MF
1/16W
5%
402
2
1
C480
10V 402
20% CERM
0.1uF
2
1
C455
402
CERM
50V
10%
470pF
2
1
R339
20K
1%
1/16W
MF
402
2 1
R367
75
1% MF
1/16W
402
INT_TMDS
2
1
R352
NO STUFF
MF
63.4K
1%
402
1/16W
2
1
R353
402
MF
1/16W
5%
0
2
1
R380
NO STUFF
10K
402
MF
5%
1/16W
2 1
R369
75
MF
402
1%
INT_TMDS
1/16W
2
1
C507
402
50V
10%
470pF
CERM
INT_TMDS
2
1
C515
402
CERM
10%
470pF
50V
INT_TMDS
2 1
R355
75
1/16W
402
MF
1%
INT_TMDS
2 1
R362
75
MF
402
1/16W
1%
INT_TMDS
2
1
C497
10%
470pF
CERM
50V 402
INT_TMDS
2
1
C487
402
CERM
50V
10%
470pF
INT_TMDS
2 1
R340
75
1%
1/16W
MF
402
INT_TMDS
2
1
C469
INT_TMDS
470pF
50V
10% CERM
402
2
1
C479
470pF
50V
CERM
402
10%
INT_TMDS
2 1
R350
75
402
1/16W
MF
1%
INT_TMDS
2 1
R377
49.9
INT_TMDS
1/16W
1% MF
402
2
1
C522
402
10% 50V CERM
470pF
INT_TMDS
2
1
C536
10%
INT_TMDS
470pF
50V 402
CERM
2 1
R374
49.9
1% MF
402
INT_TMDS
1/16W
2
1
C706
4.7uF
20%
25V CERM 1206
2
1
R556
1/16W
402
100K
5% MF
2
1
R559
1/16W
100K
5%
402
MF
6 1
DP7
BAS16TW
SOT-363
2
3
1
Q51
2N3904
SM
2
3
1
Q52
2N3904
SM
2
1
R558
10K
5%
1/16W
MF
402
52
DP7
BAS16TW
SOT-363
43
DP7
SOT-363
BAS16TW
+5V_MAIN
2
1
R366
MF
402
10K
5%
1/16W
2
1
R368
5%
402
10K
MF
1/16W
2
1
R359
402
MF
1%
75
1/16W
2
1
R341
75
1%
402
1/16W MF
OMIT
2
1
R342
402
MF
75
1% 1/16W
OMIT
2
1
R346
MF
75
402
1/16W
1%
OMIT
2
1
R356
1/16W
75
1% MF
402
2
1
R360
75
1% MF
402
1/16W
2
1
R333
1% MF
402
1/16W
499
2
1
R332
402
1% MF
1/16W
715
2
1
R387
5%
10K
MF
1/16W 402
2
1
R396
NO STUFF
10K
402
5% MF
1/16W
2
1
R386
5%
402
MF
NO STUFF
10K
1/16W
2
1
R382
5% MF
10K
1/16W
NO STUFF
402
2
1
R391
1/16W
10K
MF
5%
402
NO STUFF
2
1
R383
NO STUFF
5%
402
MF
10K
1/16W
2
1
R392
NO STUFF
402
MF
1/16W
5%
10K
2
1
R385
5%
10K
402
MF
1/16W
NO STUFF
2
1
R394
NO STUFF
1/16W MF 402
5%
10K
2
1
R384
1/16W MF
10K
5%
402
2
1
R393
10K
MF
5% 1/16W
402
NO STUFF
2
1
R381
5% MF
402
1/16W
10K
NO STUFF
2
1
R390
10K
MF 402
5%
NO STUFF
1/16W
2
1
R395
402
MF
10K
1/16W
5%
NO STUFF
2 1
R351
1K
402
5%
1/16W
MF
2
1
C411
805
CERM
20%
6.3V
10uF
2
1
C482
402
CERM
16V
20%
0.01uF
2
1
C435
402
20% CERM
16V
0.01uF
2
1
C443
402
CERM
20% 16V
0.01uF
2
1
C448
20% 402
0.01uF
16V CERM
2
1
C526
CERM 402
16V
0.01uF
20%
2
1
C529
402
CERM
16V
20%
0.01uF
2
1
C532
402
20% 16V CERM
0.01uF
2
1
C505
16V CERM 402
0.01uF
20%
2
1
R329
402
MF
1%
1/16W
4.99K
2
1
R389
402
INT_TMDS
10K
5%
1/16W
MF
21
L17
FERR-220-OHM
0805
2
1
R357
MF 402
5%
100K
1/16W
2
1
R555
33K
5%
1/16W
MF
402
4
36
5
2
1
Q23
CRITICAL
TSOP
SI3446DV
2
1
C407
10% 25V X7R 402
1000pF
52
DP5
SOT-363
BAS16TW
43
DP5
SOT-363
BAS16TW
61
DP5
BAS16TW
SOT-363
+2_5V_SLEEP
21
XW11
SM
21
XW12
SM
21
XW5
SM
21
XW9
SM
21
XW4
SM
21
R378
402
5%
1/16W
MF
1K
21
R760
INT_TMDS
5%
1/16W
MF
402
0
21
R764
INT_TMDS
1/16W
MF
402
5%
0
21
R763
INT_TMDS
5%
1/16W
MF
402
0
21
R762
INT_TMDS
5%
1/16W
MF
402
0
21
R761
INT_TMDS
402
MF
1/16W
5%
0
21
R767
INT_TMDS
402
1/16W
5% MF
0
21
R765
INT_TMDS
402
MF
1/16W
5%
0
21
R766
INT_TMDS
402
5%
1/16W
MF
0
2
1
R779
1/16W
5% MF
402
10K
4
5
3
Q25
SOT-363
2N7002DW
1
2
6
Q25
2N7002DW
SOT-363
2
1
R786
402
1/16W
5%
100K
MF
+5V_MAIN
321
4
8765
Q49
IRF7832
SO-8
CRITICAL
321
4
5
Q48
SO-8-PWRPK
SI7860DP
CRITICAL
2
1
C838
NO STUFF
402
CERM
50V
20%
0.001uF
2
1
R328
GPU_PWRMSR
18.2K
1% 1/16W
402
MF
2
1
R361
1% MF
402
GPU_PWRMSR
1.82K
1/16W
2
1
C846
10V
CERM
402
20%
0.1uF
GPU_PWRMSR
2
1
C705
6.3V CASE-D4
TANT
20%
330uF
CRITICAL
2
1
C707
6.3V
330uF
20%
CASE-D4
TANT
CRITICAL
2
1
C711
6.3V
20%
CASE-D4
TANT
CRITICAL
330uF
2
1
R840
MF
5% 1/16W
402
10K
EXT_TMDS
3
2
1
L64
SM
CRITICAL
2.1uH-11A
G16
G15
AD23
G14
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
G13
AD12
AD11
AD10
AD9
AD8
AD7
AC24
AC23
AC8
AC7
G12
AB24
AB7
AA24
AA7
Y24
Y7
W24
W7
V24
V7
G11
U24
U7
T24
T7
R24
R7
P24
P7
N24
N7
G10
M24
M7
L24
L7
K24
K7
J24
J7
H24
H23
G9
H8
H7
G24
G23
G22
G21
G20
G19
G18
G17
G8
G7
AD26
P6
H6
G6
F6
AF5
V25
W25
N25
M25
F25
AE24
F24
AH4
F23
AE18
AC25
AE17
AF15
W26
AF14
AE14
F14
F13
AG4
AE11
F11
AE10
F10
F7
AE6
AD6
AC6
W6
V6
AF25
AJ3
AB25
R25
G25
F17
AB6
T6
L6
F12
U47
ATI_64MB
BGA
CRITICAL
64MB
M11-CSP64
AK7
AJ7
AH7
AG7
AK6
AJ6
AH6
AH11
AG11
AK10
AJ10
AG6
AH10
AG10
AK9
AJ9
AH9
AG9
AK8
AJ8
AH8
AG8
AK5
AJ5
AG5
AH5
AK4
AJ4
AK23
AJ30
AJ29
AG27
B21
A20
A24
B20
B24
AG25
AG22
AH22
AG20
AH20
AG19
AH19
AG18
AH18
AJ20
AK20
AJ18
AK18
AJ17
AK17
AJ16
AK16
AK12
AJ12
AG21
AH21
AJ19
AK19
AK15
AJ15
AK14
AJ14
AK13
AJ13
AH24
AJ25AJ26
AK25
AE5
AJ24
AK28
AG26
AF11
AG24
AF3
AG3
AH1
AF4
AJ1
AH2
AH3
AK1
M1
AE1
AE2
AF1
AG1
AF2
AG2
AK2
AJ2
AK27
AE13
AH26 AH25
AE12 AF12
AH28 AH27
AK22
AK24
AF13
AK26
AJ27
U47
ATI_64MB
BGA
M11-CSP64
CRITICAL
64MB
4420
B
051-6809
?
114S7501
3
RES,MTL FILM,1/16W,75OHM,0402
R346,R342,R341
ATI_DVOD<0>
GPU_B
INV_ON_PWM
GPU_TMDS_D0_CMF
GPU_VCORE
GPU_VCORE
+3V_GPU
+1_5V_GPU_VDD15
+1_5V_AGP
ATI_DVOD<2>
ATI_DVOD<5>
GPU_C GPU_COMP
LVDS_U3P_TP
LVDS_U2P
LVDS_U2N
LVDS_U1P
+1_8V_GPU
GPU_TMDS_DP<1>
GPU_TMDS_DP<0>
GPU_CORE_OK
GPU_TMDS_CLKP
1778_FCB
+GPU_VDD15_UF
GPU_TMDS_DP<0>
1778_VFB
HIGH_VCORE
GPU_VCORE_CNTL
GPU_VCORE_CNTL_L
1778_ION
1778_VIN
+GPU_VDD15_UF
ATI_BUS_CFG<2>
1778_BST
1778_ITH_RC
1778_VRNG
GPU_CORE_OK
1778_GND
+3V_GPU
+1_5V_AGP
GPU_VCORE_SEQ_L
SLEEP_L_LS5
GPU_VCORE_SEQ
DCDC_EN
1778_SHDN_L
ATI_TMDS_DP<0>
ATI_TMDS_DP<2>GPU_TMDS_DP<2>
GPU_TMDS_DN<2>
ATI_TMDS_DP<1>GPU_TMDS_DP<1>
GPU_TMDS_DN<1>
ATI_TMDS_CLKPGPU_TMDS_CLKP
ATI_TMDS_CLKNGPU_TMDS_CLKN
+3V_GPU
1778_VCC
1778_BG
1778_ITH
GPU_TMDS_DP<2>
GPU_TMDS_D1_CMF
GPU_TMDS_D2_CMF
GPU_TMDS_DN<2>
GPU_TMDS_DN<0>
GPU_TMDS_CLKN
GPU_VCORE_SW
+1_8V_PVDD_NECK
+1_8V_ATI_PVDD
+1_5V_AGP
ATI_BUS_CFG<0>
1778_TG
GPU_TMDS_DN<1>
ATI_TMDS_DN<2>
1778_GND
ATI_DVOD<10>
ATI_DVOD<1>
ATI_TESTEN
ATI_TMDS_CLKN
ATI_TMDS_DP<2>
ATI_TMDS_DN<2>
ATI_TMDS_DP<1>
ATI_TMDS_DN<0>
ATI_TMDS_DN<1>
ATI_TMDS_DP<0>
ATI_GPIO13_SPN HPD_PWR_SNS_EN
ATI_GPIO11_SPN ATI_GPIO12_SPN
ATI_GPIO10_SPN
ATI_GPIO8_PD ATI_GPIO9_SPN
ATI_GPIO7_SPN
ATI_BUS_CFG<2>
ATI_BUS_CFG<1>
ATI_BUS_CFG<0>
ATI_DVO_CLKP
ATI_DVOD_DE
ATI_DVO_HSYNC
ATI_DVO_VSYNC
ZV_LCDDATA20_PU
ATI_DVOD<11>
ATI_DVOD<6> ATI_DVOD<7>
ATI_DVOD<4>
ATI_DVOD<3>
CLKLVDS_LN
LVDS_L3P_TP
CLKLVDS_LP
LVDS_L3N_TP
LVDS_L2P
LVDS_L1P LVDS_L2N
LVDS_L1N
LVDS_L0P
LVDS_L0N
CLKLVDS_UN CLKLVDS_UP
LVDS_U3N_TP
LVDS_U1N
LVDS_U0P
LVDS_U0N
AUXWIN_PU
GPU_Y
ATI_HSYNC
ATI_VSYNC
GPU_VCORE_CNTL_L ATI_SSCLK_IN
LVDS_DDC_DATA LVDS_DDC_CLK
GPU_DVI_DDC_DATA GPU_DVI_DDC_CLK
SI_I2S_DATA SI_I2C_CLK
+GPU_VDD15_NECK
GPU_VCORE_NECK
GPU_VCORE
+3V_GPU
GPU_TMDS_CLK_CMF
1778_VFB
FP_PWR_EN
ATI_TMDS_CLKP
ATI_CLK27M_IN
ATI_DVOD<9>
ATI_DVOD<8>
GPU_HPD
GPU_TMDS_DN<0> ATI_TMDS_DN<0>
ATI_TMDS_DN<1>
ATI_BUS_CFG<1>
1778_BST_RC
HIGH_VCORE_DIVD
ATI_R2SET
ATI_RSET
GPU_R
GPU_G
+1_5V_AGP_NECK
38
38
38
21
21
21
38
20
38
20
34
38
20
38
39
39
21
19
21
19
33
21
19
39
21
38
38
20
16
38
36
36
36
36
39
20
16
32
33
36
36
36
36
36
36
20
36
36
36
16
36
39
39
39
39
39
39
39
39
38
20
39
36
36
20
20
19
15
36
36
37
37
37
21
20
20
21
20
38
20
38
38
21
38
19
15 26
32
37
37
20
20
37 20
20
37 20
37 20
19
20
20
20
38
15
20
37
38
36
36
37
37
37
37
37
37
37
36
36
36
36
36
36
36
36
36
37
37
37
37
37
37
37
37
37
37
37
37
37
35
39
39
20
19
38
37
35
36
36
20 37
37
19
22
22
19
19
20
20
12
38
12
19
19
22
22
22
22
22
19
19
19
20
19
38
20
20
19
20
20
38
38
38
20
20
38
38
38
20
20
12
12 18
28
20
20 19
19
20 19
19
20 19
20 19
12
38
38
38
19
19
19
38
38
21
12
20
38
19
20
20
19
19
20
20
20
20
20
20
20
22
20
20
20
20
20
20
20
19
19
19
19
19
19
19
19
19
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
20
19
22
22
22
22
19
19
38
38
19
12
20
22
20
19
19
19
22
19 20
20
20
20
38
22
22
38
CONT
NOISE
VIN
VOUT
GND
CONT
NOISE
VIN
VOUT
GND
VDDR4
VDDR3
TXVSSR1 TXVSSR2 TXVSSR3
TXVDDR2
TXVDDR1
TXVDDR0
TXVDDR3
MPVDD
TPVDD
LPVDD
LVDDR_18 LVDDR_18
VDDM
LVSSR3
LVSSR2
LVSSR1
LVSSR0
MPVSS
TPVSS
LPVSS
VDDP
VDDRH1
VDDRH0
A2VDDQ
AVDD0 AVDD1
PVDD
A2VDD1
A2VDD0
VDDR1
VSSRH1
VSSRH0
A2VSSN1
A2VSSN0
A2VSSQ AVSSN0 AVSSN1
AVSSQ
PVSS
RAGE_MOBILITY
(4 OF 6)
VDD1DI VDD2DI
VSS1DI VSS2DI
LVDDR_25 LVDDR_25
DVOVMODE
VDDR1
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_ALT_ITEM
MEMORY CORE - 2.5V
(Max Current varies, depends on usage)
1.5V
LVDS - 2.5V
3.3V
(40mA)
(350mA)
2.5V
(2mA)
(20mA)
(1800mA)
MEMORY I/O
(140mA)
(150mA MAX)
(20mA)
(1200mA)
1.8V
3.3V IO SUPPLY
1.8V DVO POWER (EXT.TMDS)
(21mA)
(150mA MAX)
M11 POWER
GPU PLL - 1.8V
LVDS PLL - 1.8V
AGP 4X I/O - 1.5V
(180mA)
GPU POWER SOURCES - 1.5V, 1.8V, 2.5V & 3.3V
1.8V
MEMORY PLL - 1.8V
LVDS/TMDS - 1.8V
2
1
C488
0.1uF
20%
402
CERM
10V
2
1
C456
20% 10V
402
0.1uF
CERM
2
1
C421
402
0.1uF
20% 10V CERM
2
1
C544
20% 10V
402
CERM
0.1uF
2
1
C545
10V CERM 402
20%
0.1uF
2
1
C551
CERM
6.3V 805
10uF
20%
2
1
C546
0.1uF
CERM 402
10V
20%
2
1
C422
6.3V 805
20%
10uF
CERM
2
1
C424
10V 402
CERM
20%
0.1uF
2
1
C417
CERM 402
16V
20%
0.01uF
2
1
C547
0.1uF
CERM 402
10V
20%
2
1
C540
20% 10V
402
CERM
0.1uF
2
1
C437
20% 10V CERM 402
0.1uF
2
1
C436
402
20% 10V CERM
0.1uF
2
1
C423
20% CERM
402
10V
0.1uF
2
1
C444
402
10V CERM
20%
0.1uF
2
1
C425
402
20% CERM
16V
0.01uF
2
1
C447
0.01uF
402
CERM
16V
20%
2
1
C438
10V CERM 402
20%
0.1uF
2
1
C439
20% 402
0.01uF
16V CERM
2
1
C517
0.1uF
CERM 402
10V
20%
2
1
C543
20%
402
CERM
0.1uF
10V
2
1
C541
20% 10V
402
CERM
0.1uF
2
1
C542
402
CERM
0.01uF
16V
20%
2
1
C483
6.3V 805
CERM
20%
10uF
2
1
C419
20% 10V
402
CERM
0.1uF
2
1
C420
20% CERM
0.01uF
402
16V
2
1
C475
20% CERM
10V 402
0.1uF
2
1
C504
0.01uF
20% CERM
16V 402
2
1
C538
0.01uF
402
CERM
20% 16V
2
1
C539
0.1uF
20% 10V
402
CERM
2
1
C470
20% 10V
402
0.1uF
CERM
2
1
C471
CERM
0.01uF
16V
20% 402
2
1
C489
10V 402
CERM
0.1uF
20%
2
1
C496
402
10V CERM
0.1uF
20%
2
1
C506
CERM 402
0.01uF
20% 16V
2
1
C492
20% 10V
402
CERM
0.1uF
2
1
C501
0.01uF
16V
20%
402
CERM
2
1
C450
20% CERM
0.01uF
16V 402
2
1
C453
20%
402
0.01uF
CERM
16V
2
1
C473
0.01uF
402
20% CERM
16V
2
1
C500
CERM
20% 16V
0.01uF
402
2
1
C430
0.1uF
CERM 402
10V
20%
2
1
C460
20%
0.01uF
402
16V CERM
2
1
C463
16V CERM
20%
402
0.01uF
2
1
C462
402
CERM
20% 16V
0.01uF
2
1
C454
0.01uF
402
20% CERM
16V
2
1
C472
0.01uF
16V
20% 402
CERM
2
1
C527
0.01uF
16V
20% 402
CERM
+1_5V_SLEEP
2
1
R275
1/10W 805
0
FF
5%
+2_5V_SLEEP
2
1
R319
805
FF
1/10W
5%
0
ATI_MEMIO_HI
+3V_SLEEP
2
1
R379
0
5% 1/10W FF 805
+1_8V_SLEEP
2
1
R312
0
FF
5%
1/10W
805
ATI_MEMIO_LO
2
1
C468
0.01uF
20% 402
16V CERM
2
1
C523
402
CERM
16V
0.01uF
20%
2
1
R363
0
5%
805
1/10W
FF
+1_8V_SLEEP
+2_5V_SLEEP
2
1
C413
402
CERM
16V
20%
0.01uF
2
1
C464
10uF
805
6.3V
20% CERM
2
1
C478
CERM
20%
6.3V 805
10uF
2
1
C461
16V
20% CERM
0.01uF
402
2
1
C459
10uF
6.3V CERM 805
20%
2
1
C511
20%
6.3V 805
10uF
CERM
2
1
C427
10uF
20%
805
6.3V CERM
2
1
C493
CERM
20% 805
10uF
6.3V
2
1
C537
CERM
20%
805
10uF
6.3V
2
1
C499
CERM
20%
6.3V 805
10uF
2
1
C414
20% CERM
402
0.1uF
10V
2
1
C418
6.3V CERM 805
20%
10uF
2
1
C514
805
CERM
6.3V
20%
10uF
2
1
C491
0.1uF
402
CERM
10V
20%
21
L23
0402
FERR-220-OHM
21
L21
0402
FERR-220-OHM
21
L24
FERR-220-OHM
0402
21
L28
FERR-220-OHM
0402
21
L20
FERR-220-OHM
0402
21
L19
FERR-220-OHM
0402
21
L32
FERR-220-OHM
0402
21
L30
0402
FERR-220-OHM
21
L29
0402
FERR-220-OHM
2
1
C552
20%
6.3V CERM 805
10uF
21
L25
FERR-220-OHM
0805
21
L26
FERR-10-OHM-500MA
SM
21
L31
FERR-220-OHM
0805
21
L18
FERR-10-OHM-500MA
SM
51 4
2
3
U34
SOT-25A
CRITICAL
MM1571J
2
1
C553
402
CERM
16V
20%
0.01uF
2
1
C830
1uF
603
10V
CERM
20%
+2_5V_SLEEP
51 4
2
3
U60
SOT-25A
CRITICAL
MM1571J
2
1
C833
CERM
10V
1uF
603
20%
2
1
C834
402
CERM
0.01uF
20% 16V
2
1
C835
CERM
6.3V
20% 805
10uF
21
L75
FERR-220-OHM
0402
2
1
C831
CERM
10uF
20%
6.3V 805
2
1
C832
0.01uF
20% 16V CERM 402
2
1
R787
MF
0
1/16W
5%
402
2
1
R788
0
5% 1/16W MF 402
2
1
C519
CERM
0.1uF
10V
20%
402
2
1
C534
10V
20% CERM
402
0.1uF
2
1
C535
10uF
6.3V 805
CERM
20%
2
1
C521
20% 10V
402
CERM
0.1uF
2
1
C550
805
10uF
20%
6.3V CERM
2
1
C518
CERM
0.1uF
20% 10V
402
2
1
C520
0.1uF
CERM
10V
20% 402
2 1
L33
FERR-10-OHM-500MA
SM
21
L81
EXT_TMDS
SM
FERR-10-OHM-500MA
21
R842
402
EXT_TMDS
0
5%
1/16W
MF
2
1
C881
0.1uF
20% 10V CERM 402
2
1
C880
0.1uF
402
CERM
10V
20%
2
1
C426
402
0.1uF
CERM
10V
20%
2
1
R841
INT_TMDS
0
5%
1/16W
402
MF
2
1
R843
INT_TMDS
MF
1/16W
5%
0
603
M6
F20
AF19
AG23
AE8
AF7
AE7
AF6
AE25
AD25
AF10
AF9
AE9
AF8
AF26
AE26
R5
P5
N5
M5
L5
E25
E24
E23
E22
E21
E17
E16
K5
E15
E14
E11
E10
E9
H26
E7
J26
J25
H25
J5
F22
F21
F16
F15
F9
F8
AA6
Y6
R6
K6
H5
G26
AD5
AC5
AB5
AA5
Y5
W5
V5
U5
T5
G5
F5
N26
M26
L26
K26
AA25
K27
Y28
T25
AC26
AB26
AA26
Y26
V26
U26
T26
R26
P26
L25
K25
F26
E26
E20
E19
E18
E13
E12
E6
E5
AF20
AH23
AH15
AH14
AH13
AG15
AG14
AG13
AG12
AJ11AK11
AK30AK29
A6A7
AF18
AH17
AG17
AH16
AF17
AG16
AF16
AE16
AJ21AK21
AH12
AF22
AE23
AE22
AF24
AF23
AJ22
AE20
AE19
U47
ATI_64MB
BGA
64MB
CRITICAL
M11-CSP64
+2_5V_SLEEP
+2_5V_SLEEP
+2_5V_SLEEP
+2_5V_SLEEP
IC,ATI,M11-CSP128,GRAPHICTLR,667BGA
CRITICAL
1 U47
ATI_128MB
338S0158
ATI M11 64MB A16
U47
ATI_64MB338S0183 338S0154
4421
B
051-6809
ATI_128MB
ATI M11 128MB A16
338S0182
U47
338S0158
+1_8V_GPU_PNLIO
GPU_MEM_IO
GPU_MEM_IO
GPU_MEM_IO_FLT
+1_5V_AGP_GPU
+1_8V_GPU_AVDD
+1_8V_GPU
+1_8V_GPU_PLL
ATI_DVOVMODE
+2_5V_GPU_A2VDD
+1_8V_GPU_AVDDQ
+2_5V_GPU_MCLK
+1_8V_GPU_PNLPLL
+1_8V_GPU_TP_PLL
+1_8V_GPU_DVO
+1_8V_GPU
+1_8V_GPU
+3V_GPU
1_8V_TPVDD_STD
+1_8V_ATI_TPVDD
1_8V_PVDD_STD
+1_8V_ATI_PVDD
ATI_TPVDD_BYP
+2_5V_GPU_A2VDD
+1_8V_GPU_TP_PLL
GPU_CORE_OK
ATI_PVDD_BYP
GPU_CORE_OK
+1_5V_AGP
+1_5V_AGP
+1_8V_GPU_AVDDQ
+1_8V_GPU
+1_8V_ATI_PVDD
+2_5V_GPU_MCLK
+1_8V_GPU
+1_8V_GPU_VDDDI
+1_8V_GPU
+3V_GPU
GPU_MEM_IO
+1_8V_ATI_PVDD
+1_8V_GPU
+1_8V_GPU_VDDDI
+3V_GPU_FLT
+1_8V_GPU_MEMPLL
+2_5V_GPU_PNLIO
12
12
15
15
12
16
16
12
19
19
19
19
19
19
19
19
19
19
19
19
19
20
20
20
20
20
20
20
20
20
20
20
20
19
20
20
21
21
21
21
21
21
21
21
21
21
21
21
20
20
21
21
21
21
21
21
21
21
21
21
21
21
21
21
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
21
21
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
38
G2
D2
S2
G1
S1
D1
G
SD
G
SD
G
SD
V-
V+
G
D
S
G
DS
MINIDIN
G
D
S
A
B
Y
32
32
SYM_VER-1
SYM_VER-1
SYM_VER-1
SYM_VER-1
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_5_ITEM
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
TABLE_5_ITEM
INVERTER INTERFACE
Isolation required for DVI power switch
COMPARATOR ENABLED BY NV17MAP
EXTERNAL VIDEO (DVI) INTERFACE
PLACE L1002 & L1003 CLOSE TO DVI CONNECTOR
(TMDS_DN<5>)
VGA SYNC BUFFERS
Panel has 2K pull-ups
no-panel case (development)
PLACE NEAR C5A & C5B
(+5V_DDC SLEEP)
(TMDS_DP<3>)
(TMDS_DP<4>)
(55mA requirement per DVI spec)
DVI DDC CURRENT LIMIT
NOTE: Pulldown for DVI_HPD provided by DVI power switch interface
PLACE CLOSE TO CONNECTOR
TMDS FILTERING
LCD POWER SWITCH
NC
(TMDS_DN<3>)
PLACE NEAR 3, 11 & 19
(TMDS_DP<5>)
NC
(TMDS_DN<4>)
DVI POWER SWITCH
INVERTER EXPECTS ACTIVE HIGH SIGNAL
VIDEO CONNECTORS
on when DVI monitor
pullup.
HPD normally driven to
3.3V. When power key on remote device pressed, HPD will be driven to 5V.
Power key detect path
GPIO.
NC
NC
NC
NC
3V LEVEL SHIFTERS
DDC_CLK is isolated from
into DDC_CLK. Since host rails
system is shutdown or asleep..
power key on remote device is pressed, 5V will be driven
Power key detect path when
NV17M DURING SHUTDOWN. WHEN
will be low, TP0610 will turn on, driving SOFT_PWR_ON_L low.
Isolation will be disabled as well.
device path into DDC_CLK.
As host rails rise, TP0610 will turn off, as will remote
Place GND shorts at
graphics controller
Place GND shorts at
NC
(LVDS DDC POWER)
100K pull-ups are for
graphics controller
when system is running.
ANALOG FILTERING
PLACE CLOSE TO CONNECTOR
S-VIDEO/COMP OUT INTERFACE
LCD INTERFACE
LVDS INTERFACE
+5V_MAIN
2
1
R750
402
MF
1/16W
100K
5%
2
1
C816
0.001uF
CERM
50V 402
20%
CHGND3
2
1
C815
402
50V
20%
0.001uF
CERM
2
1
C812
50V
0.001uF
20% CERM
402
2
1
C813
6.3V
20% CERM
805
10uF
12
L73
SM
FERR-1K-OHM-EMI
21
L72
400-OHM-EMI
SM-1
+PBUS
+3V_MAIN
2
1
C22
402
CERM
10V
20%
0.1uF
4
3 2
6
Q76
FDG6324L
SC70-6
1
5
6
Q76
FDG6324L
SC70-6
2
1
C642
OMIT
50V
CERM
402
4.7pF
5%
2
1
C635
OMIT
402
CERM
50V
5%
4.7pF
21
L50
OMIT
SM
0.068uH
2
1
C632
OMIT
402
50V
CERM
4.7pF
5%
21
L44
OMIT
0.068uH
SM
21
L41
OMIT
0.068uH
SM
2
1
R474
5% 1/16W
402
MF
10K
2
1
R480
10K
5% 1/16W MF 402
1
2
6
Q39
2N7002DW
SOT-363
+3V_SLEEP
4
5
3
Q39
2N7002DW
SOT-363
2
1
R481
100K
5% 1/16W MF 402
2
1
C655
100pF
201
25V
5% CERM
2
1
R476
4.7K
5% 1/16W MF 402
2
1
R478
5%
1/16W
402
MF
4.7K
2
1
C654
100pF
5% 25V
201
CERM
2
1
C667
20% 50V
0.01uF
CERM
603
21
L42
400-OHM-EMI
SM-1
4
5
3
Q40
2N7002DW
SOT-363
21
F2
CRITICAL
0.5AMP-13.2V
SM
21
D19
MBR0530
SM
2
1
C653
100pF
201
25V CERM
5%
21
R475
10K
5%
402
MF
1/16W
2
1
C668
20% 10V CERM 402
0.1uF
2
1
R485
402
68.1K
1%
1/16W
MF
2
5
1
3
4
U42
LMC7211
SM
21
R472
10K
1%
1/16W
MF
402
2
1
R484
100K
1%
1/16W
MF
402
2
1
R482
1/16W
10K
1%
402
MF
1
2
6
Q40
SOT-363
2N7002DW
2
1
R483
470K
5%
402
MF
1/16W
21
R460
10K
5%
402
MF
1/16W
2
1
R459
5%
330
402
MF
1/16W
2
1
3
Q38
SM
TP0610
2
1
C657
0.01uF
CERM
50V
20% 603
CHGND1
CHGND1
2
1
C656
10%
560pF
402
CERM
50V
21
L54
FERR-10-OHM-500MA
SM
21
L53
0603
3.3uH
21
L57
0603
3.3uH
2
1
C660
10%
560pF
402
50V
CERM
2
1
C658
10%
560pF
402
50V
CERM
2
1
C659
0.01uF
603
20% 50V
CERM
21
L55
0603
3.3uH
21
L56
FERR-10-OHM-500MA
SM
2
1
C663
10%
560pF
CERM
50V 402
2
1
C661
10%
560pF
402
50V
CERM
2
1
C664
10%
560pF
402
CERM
50V
+3V_SLEEP
+5V_SLEEP
21
XW15
SM
21
XW14
SM
21
R479
100
5%
402
1/16W
MF
21
R477
100
402
MF
1/16W
5%
21
R469
100
402
MF
1/16W
5%
4
3
2
1
6
5
J4
SM-2MT
CRITICAL
21
L74
400-OHM-EMI
SM-1
5
4 3 2 1
1110
98
J21
CRITICAL
RT-TH
MH11773-WMR8A
CHGND4
2
1
C548
0.001uF
402
CERM
50V
20%
2
1
R543
100K
5%
1/16W
MF
402
2
1
C701
0.001uF
20% 50V
CERM
402
CHGND4
+3V_SLEEP
2
1
R544
100K
5%
1/16W
MF
402
CHGND4
2 1
C549
20% 50V
CERM
402
0.001uF
CHGND4
2
1
C503
0.001uF
402
CERM
50V
20%
21
L27
FERR-250-OHM
SM
+3V_MAIN
21
C474
603
5%
50V
CERM
2200pF
4
3 6
5 2 1
Q29
TSOP
SI3443DV
21
R354
402
MF
1/16W
100K
5%
2
1
R347
402
MF
1/16W
5%
100K
2
1
3
Q28
SM
2N7002
2 1
R473
680
402
MF
1/16W
5%
CHGND1
CHGND3
21
C819
0.01uF
603
CERM
50V
20%
9
8
7
6
5
4
3
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
36
35
34
33
32
31
C5B C5A
C4
C3
C2
C1
J22
QH1112
F-RT-TH
CRITICAL
21
R753
0
5%
1/16W
MF
402
9
8
7
6
5
4
30
3
29
28
27
26
25
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
34
33
J14
CRITICAL
G-501973
F-RT-SM
4
5
3
2
1
U2
SC70
NC7S32
2
1
C702
0.001uF
20% 50V
CERM
402
NO STUFF
2
1
R470
MF 402
5%
330
1/16W
2
1
R462
NO STUFF
402
MF
1% 1/16W
75
2
1
R458
NO STUFF
402
1%
75
1/16W MF
2
1
R456
NO STUFF
1%
75
1/16W MF 402
21
L36
0402
FERR-60-OHM-0.1A
OMIT
21
L38
FERR-60-OHM-0.1A
0402
OMIT
+3V_MAIN
5
4
2
1
3
U40
74AHC1G32
SM
+3V_MAIN
5
4
2
1
3
U39
SM
74AHC1G32
2
1
L1
FERR-250-OHM
SM
2
1
C19
0.001uF
402
50V
20% CERM
CHGND2
CHGND1
CHGND2
2 1
R464
402
MF
1/16W
5%
0
2 1
R463
MF
1/16W
5%
0
402
1
6
2
Q35
MMDT3904
SOT-363
4
3
5
Q35
SOT-363
MMDT3904
4
32
1
L37
SM
370-OHM
4
32
1
L46
2012H
90-OHM-300mA
CRITICAL
4
32
1
L47
2012H
90-OHM-300mA
CRITICAL
4
32
1
L45
2012H
90-OHM-300mA
CRITICAL
21
L49
OMIT
0.068uH
SM
21
L43
OMIT
0.068uH
SM
21
L40
OMIT
0.068uH
SM
2
1
C641
OMIT
402
50V CERM
3.3pF
0.25%
2
1
C634
OMIT
402
50V CERM
3.3pF
0.25%
2
1
C631
OMIT
CERM
50V 402
3.3pF
0.25%
DISCRETE,RES,33OHM,0402
2
L36,L38 VGA_BUFFER_RES
116S1331
B
4422
051-6809
?
C641,C634,C631
CAP,CER,8.2PF,+/-.25PF,0402
3
131S1121
?
C642,C635,C632
CAP,CER,1.5PF,+/-.25PF,0402
3
131S1114
?
L49,L43,L40
IND,FERRITE,27NH,10%,0805
3
152S0214
?
152S0210
3
IND,FERRITE,47NH,10%,0805
L50,L44,L41
TMDS_CONN_DN<1>
TMDS_CONN_DP<1>
TMDS_DP<1>
TMDS_DN<1>
GPU_HPD
GPU_DVI_DDC_DATA
DVI_DDC_CLK_UF
GPU_DVI_DDC_CLK
VGA_R
VGA_G
TMDS_DP<2>
VGA_VSYNC
FP_PWR_EN
LCD_DIGON_L
VGA_HSYNC
TV_Y
TV_C
TV_GND1
+14V_INV
INV_GND
BRIGHT_PWM
+5V_INV_SW
ATI_HSYNC_BUF
ATI_HSYNC
ATI_VSYNC_BUF
ATI_VSYNC
GPU_R
GPU_G
GPU_B
TMDS_CONN_CLKN
CLKLVDS_UP
CLKLVDS_UN
LVDS_U2P
LVDS_U1P
LVDS_U1N
LVDS_U0P
LVDS_L1N LVDS_L1P
LVDS_L2N LVDS_L2P
CLKLVDS_LP
CLKLVDS_LN
LVDS_U0N
LVDS_L0N LVDS_L0P
LVDS_DDC_CLK
LCD_PWREN_L
LVDS_DDC_CLK
+3V_LCD_SW
+3V_LCD
GPU_TV_GND2
GPU_TV_GND1
GPU_COMP
GPU_C
GPU_Y
DVI_DDC_CLK_UF
DVI_TURN_ON
+5V_DDC_SLEEP
DVI_HPD_UF
DVI_HPD_DIV
HPD_PWR_SNS_EN
HPD_REF_EN_L
HPD_4V_REF
FP_PWR_EN_L
INV_ON_PWM
VGA_HSYNC
VGA_B
+5V_INV_UF_SW
BRIGHT_PWM_UF
FP_PWR_EN
HPD_PWR_SW
DVI_TURN_ON_ILIM
DVI_DDC_CLK
DVI_DDC_DATA
DVI_HPD
LVDS_U2N
DVI_TURN_ON_BASE
HPD_PWR_SW_BASE
SOFT_PWR_ON_L
LVDS_DDC_DATA
TMDS_CLKN
TMDS_CLKP
+5V_DDC_SLEEP_UF
TV_GND2
TV_COMP
TMDS_CONN_CLKP
DVI_HPD_UF
LVDS_DDC_DATA
VGA_VSYNC
TMDS_CONN_CLKN
TMDS_CONN_CLKP
TMDS_CONN_DP<0>
TMDS_CONN_DN<0>
TMDS_DN<0>
TMDS_DN<2>
TMDS_CONN_DN<2>
TMDS_CONN_DP<2>
DDC_CLK_ISO
GPU_B_FILTR
GPU_R_FILTR
VGA_B
VGA_G
VGA_R
GPU_G_FILTR
DVI_DDC_DATA_UF
+5V_DDC_SLEEP
TMDS_DP<0>
23
19
19
19
22
20
20
20
20
20
20
20
20
20
20
22
29
20
36
20
22
22
19
22
37
37
22
22
22
37
22
20
22
38
38
38
36
20
20
20
20
20
20
37
37
37
37
37
37
20
37
37
22
22
38
22
38
22
22
22
20
20
33
22
19
19
38
22
22
22
22
36
36
37
22
22
22
38
36
36
39
39
20
20
39
20
39
39
39
39
22
39
39
39
39
39
39
39
39
20
20
20
20
20
39
37
37
37
37
37
37
39
39
39
39
39
39
37
39
39
39
39
38
39
38
38
20
20
20
39
39
39
20
20
39
39
38
22
37
39
39
37
37
38
39
39
39
39
39
39
39
39
36
36
39
36
36
39
39
39
39
39
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
LMU/RIGHT SENSOR CONNECTOR
NC
CONN,TOP CONTACT ZIF,0.8MM PITCH,30P,SM
Apple Part #: 518S0079 SMK Part #: CFP0630-0301
(GND)
(GND)
KEYBOARD PULLUPS
NC
KEYBOARD/TPAD/SLEEP LED
NC
SLEEP LED
DEBUG HELPERS
PLACE ON TOP SIDE NEAR FRONT EDGE OF BOARD
PLACE "PMU RESET" IN SILK NEAR RESISTOR
PLACE "POWER BUTTON" IN SILK NEAR RESISTOR
LEFT LIGHT SENSOR CONNECTOR
NC
Connect caps, DZ1 to pin 6 via trace
Connect caps to pin 5 via trace
TOP CONTACT ZIF KEYBOARD CONN
NOTE: KEEP FERRITE CLOSE TO CAP
TRACKPAD/PWR BTN CONN
21
L9
400-OHM-EMI
SM-1
2
1
C198
0.001uF
20% 50V
CERM
402
21
L11
400-OHM-EMI
SM-1
2
1
C199
0.001uF
402
20% CERM
50V
2
1
C210
0.001uF
50V CERM
20%
402
+5V_SLEEP
12
L8
SM-1
400-OHM-EMI
1 2
L10
400-OHM-EMI
SM-1
+3V_PMU
2
1
C188
0.001uF
402
20%
CERM
50V
+3V_PMU
21
R569
100K
1/16W
MF
402
5%
9
8
7
6
4
3
2
1
10
5
RP42
SM
25V
1/32W
5%
10K
9
8
7
6
4
3
2
1
10
5
RP40
10K
SM
5%
1/32W
25V
9 8 7 65
4
3
2
101
J10
CRITICAL
SM
M-ST-5087
2
1
C233
0.001uF
50V CERM
20%
402
1 2
L12
SM-1
400-OHM-EMI
2 1
R163
MF
1/16W
5%
22
402
2
1
C220
0.001uF
CERM
50V
20%
402
+5V_MAIN
2
1
R611
1/16W
5% MF
402
100
2
1
R616
402
MF
1/16W
5%
2.2K
21
R154
1/16W
MF
5%
4.7K
402
2
1
4
3
J8
SM-2MT
CRITICAL
2
3
1
Q58
2N3906
SM
2
1
L68
SM
400-OHM-EMI
2
1
C766
CERM
603
50V
10%
470pF
4
5
3
Q18
2N7002DW
SOT-363
+3V_MAIN
2
1
R173
402
MF
1/16W
5%
10K
1
2
6
Q18
2N7002DW
SOT-363
3
2
1
D9
15V
SOT23
21
R185
5% MF
1/16W
603
470K
NO STUFF
21
R190
470K
603
5%
1/16W
MF
NO STUFF
2
1
R138
1/16W
0
402
MF
5%
4
3
2
1
6
5
J2
CRITICAL
SM-2MT
5
13
42
U21
74LVC1G125
SOT23-5
CRITICAL
2
1
R198
5% MF
1/16W
402
100K
+3V_MAIN
+3V_MAIN
2 1
R228
0
5%
1/16W
MF
402
NO STUFF
9
8
7
6
5
4
30
3
29
28
27
26
25
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
32
31
J11
F-RT-SM
CFP0630
CRITICAL
2
1
R577
0
5% 1/16W MF 402
2
1
R603
0
5%
1/16W
MF
402
+3V_MAIN
2
3
1
Q19
SM
2N3906
2
1
R223
200
5%
1/16W
MF
402
2
3
1
Q22
SM
2N3906
+3V_MAIN
2
1
R300
200
5%
1/16W
MF
402
9
87
65
43
20
2
19
1817
1615
1413
1211
10
1
J19
F-ST-SM
54102
CRITICAL
2
1
R754
5%
1/16W
MF
402
100K
+3V_PMU
CHGND5
2
1
R789
402
MF
1/16W
5%
0
2
1
R758
0
5% MF
1/16W 603
B
44
23
051-6809
KBD_LED1_OUT
KBD_INTL
KBD_COMMAND_L
ST7_SLEEP_LED_H
TPAD_RXD
TPAD_TXD
KBD_LED2_OUTKBD_LED1_OUT
TPAD_F_TXD
SOFT_PWR_ON_L
PMU_LID_CLOSED_L
LID_CLOSED_L
TPAD_F_RXD
+5V_TPAD_SLEEP
PWR_BUTTON_L
+3V_HALL_EFFECT
+3V_MAIN LUX_ALS_GAIN_SW LUX_ALS_OUT
PMU_RESET_BUTTON_L
PWR_BUTTON_L
SLEEP_LED_SW_L
SLEEP_LED_L SLEEP_LED_I
PMU_SLEEP_LED
INT_I2C_CLK0
ST7_SLEEP_LED_H
PMU_SLEEP_LED_L
LUX_ALS_GAIN_SW
PMU_LID_CLOSED_L
KBD_COMMAND_L
KBD_X<9>
KBD_X<8>
KBD_FUNCTION_L
KBD_X<7>
KBD_X<5>
KBD_X<3>
KBD_X<0> KBD_X<1> KBD_X<2>
KBD_X<4>
KBD_X<6>
KBD_ID
KBD_OPTION_L
KBD_CONTROL_L KBD_SHIFT_L
KBD_JIS
KBD_X<8>
KBD_ID
KBD_FUNCTION_L
KBD_CONTROL_L
KBD_OPTION_L
KBD_SHIFT_L
KBD_X<0>
KBD_X<7> KBD_X<6> KBD_X<5> KBD_X<4>
KBD_X<3> KBD_X<2> KBD_X<1>
KBD_Y<1> KBD_Y<0> KBD_X<9>
KBD_Y<2>
KBD_Y<3>
KBD_Y<5> KBD_Y<4>
KBD_Y<6>
KBD_Y<7>
KBD_NUMLOCK_LED
NUMLOCK_LED_L
NUMLOCK_LED
CAPSLOCK_LED_L
ST7_SLEEP_LED_H
LMU_DETECT
LUX_ALS_OUT
PMU_SLEEP_LED
SLEEP
INT_I2C_DATA0
LMU_DETECT
KBD_LED2_OUT
KBD_CAPSLOCK_LED
SLEEP_LED_UF
SLEEP_LED_DGND
CAPSLOCK_LED
SLEEP_LED
IO_RESET_L
+3V_MAIN_LMU
39
39
39
34
39
39
33
39
13
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
32
13
29
29
39
29
29
39
39
39
39
11
39
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
29
39
39
29
39
39
39
39
39
39
39
39
39 29
11
39
26
23
39
23
23
29
29
23 23
39
22
23
39
39
38
23
38
38
23
23
29
23
23
6
23
29
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
39
23
23
23
23
23
23
23
23
23
23
23
23
23
23
29
29
23
29
29
29
29
29
29
39
29
29
23
23
23
23 25
6
23
23
39
39
17
38
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
OPTICAL DRIVE INTERFACE (EIDE)
PLACE TERMINATORS NEAR INTREPID
PLACE PULLUP RESISTORS CLOSE TO INTREPID
WIRELESS INTERFACE
NC
+5V_HD_SLEEP AND +3V_SLEEP
ANY SEQUENCING REQUIREMENT BETWEEN
EIDE SERIES TERMINATION
INTERNAL I/O CONNECTORS
NC
NCNC
PLACE SERIES R CLOSE TO INTERPID
IOCHRDY - UATA100 REQUIRES PULL-UP TO 3.3V
HARD DRIVE INTERFACE (UATA100)
NC NC NC
2
1
R203
402
MF
1/16W
10K
5%
21
R199
MF
5%
1/16W
33
402
2
1
R196
10K
1/16W
MF
5%
402
21
R215
1/16W
5% MF
22
402
21
R200
22
MF
1/16W
402
5%
21
R229
402
22
1/16W
5% MF
12
R214
402
MF
5%
1/16W
33
+5V_SLEEP
2
1
R546
402
MF
1/16W
5%
NO STUFF
10K
2
1
R540
5% MF
402
1/16W
10K
2
1
R542
402
MF
1/16W
5%
10K
2
1
R541
402
MF
5%
NO STUFF
100K
1/16W
2
1
R545
20K
5%
1/16W
MF
402
2
1
R234
402
MF
1/16W
5%
10K
21
R268
MF
1/16W
5%
402
22
21
R251
5%
1/16W
MF
402
82
21
R217
5%
1/16W
MF
402
82
2
1
R213
5% MF
1/16W 402
10K
21
R262
MF
1/16W
5%
402
22
21
R237
MF
1/16W
5%
402
82
21
R238
5%
1/16W
MF
402
22
21
R266
402
MF
1/16W
5%
33
21
R242
402
MF
1/16W
5%
33
+3V_SLEEP
2
1
R204
1/16W
402
5%
10K
MF
21
R216
402
5%
1/16W
MF
82
2
1
C284
10pF
402
5% 50V CERM
54
RP19
1/16W
5%
33
SM1
72
RP18
SM1
1/16W
5%
33
81
RP18
SM1
1/16W
5%
33
54
RP18
33
5%
1/16W
SM1
63
RP18
33
SM1
5%
1/16W
72
RP19
1/16W
5%
33
SM1
63
RP19
33
5%
1/16W
SM1
81
RP19
5%
33
SM1
1/16W
72
RP21
5%
1/16W
SM1
33
63
RP23
SM1
33
5%
1/16W
81
RP21
33
5%
1/16W
SM1
63
RP21
SM1
1/16W
33
5%
72
RP23
SM1
33
5%
1/16W
72
RP25
33
5%
1/16W
SM1
54
RP25
5%
33
1/16W
SM1
81
RP25
1/16W
5%
33
SM1
54
RP23
SM1
33
5%
1/16W
63
RP25
33
5%
1/16W
SM1
54
RP21
SM1
33
5%
1/16W
81
RP23
SM1
1/16W
5%
33
81
RP26
SM1
1/16W
5%
33
72
RP26
33
5%
1/16W
SM1
72
RP24
SM1
33
5%
1/16W
54
RP27
5%
1/16W
SM1
33
72
RP30
SM1
33
5%
1/16W
63
RP30
SM1
33
5%
1/16W
81
RP27
33
5%
1/16W
SM1
54
RP30
33
5%
1/16W
SM1
54
RP28
SM1
33
5%
1/16W
81
RP28
SM1
33
5%
1/16W
63
RP28
SM1
33
5%
1/16W
72
RP28
SM1
1/16W
5%
33
1
2
R737
402
22
5% 1/16W MF
+3V_SLEEP
2
1
R573
0
5%
1/16W
MF
402
3V_HD_LOGIC
2
1
R570
5V_HD_LOGIC
0
5% 1/16W MF 402
81
RP24
1/16W
5%
33
SM1
63
RP24
SM1
33
5%
1/16W
54
RP24
SM1
33
5%
1/16W
63
RP26
SM1
1/16W
5%
33
54
RP26
SM1
33
5%
1/16W
81
RP30
SM1
33
5%
1/16W
63
RP27
33
5%
1/16W
SM1
72
RP27
33
5%
1/16W
SM1
2
1
R739
10K
5% MF
1/16W
NO STUFF
402
2
1
R747
402
1/16W
5% MF
10K
2
1
C808
CERM
50V
5%
402
100pF
NO STUFF
2
1
C805
CERM
50V
5%
402
100pF
NO STUFF
+3V_SLEEP
9
84
83 82
81
80879
78 77
76 75
74 73
72 71
70769
68 67
66 65
64 63
62 61
60659
58 57
56 55
54 53
52 51
50549
48 47
46 45
44 43
42 41
40439
38 37
36 35
34 33
32 31
30329
28 27
26 25
24 23
22 21
20219
18 17
16 15
14 13
12 11
10
1
J6
QT510806-L111
F-ST-SM1
CRITICAL
9
8
7
6
50
5
49 48 47 46 45 44 43 42 41 40
4
39 38 37 36 35 34 33 32 31 30
3
29 28 27 2625
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
J12
CRITICAL
M-SM
9
8
7
6
50
5
49 48 47 46 45 44 43 42 41 40
4
39 38 37 36 35 34 33 32 31 30
3
29 28 27 2625
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
J13
M-SM
CRITICAL
2
1
R759
0
805
FF
1/10W
5%
+5V_SLEEP
2
1
R579
402
1/16W
MF
5%
20K
2
1
R578
MF
1/16W
10K
5%
402
B
4424
051-6809
PCI_AD<1> ROM_CS_TP_L
PCI_AD<3>
PCI_AD<5>
PCI_AD<8>
ROM_RW_TP_L
PCI_AD<12>
PCI_AD<14>
PCI_CBE<1>
PCI_AD<25>
RF_DISABLE_L
AIRPORT_CLKRUN_L
PCI_AD<10>
PCI_AD<0>
PCI_AD<9>
ROM_OE_TP_L
PCI_AD<6>
PCI_AD<2>
ROM_ONBOARD_CS_TP_L
PCI_AD<7>
UIDE_DATA<15>
HD_RESET_L
HD_IOCHRDY
EIDE_OPTICAL_READ_L
EIDE_OPTICAL_DMAACK_L
EIDE_OPTICAL_DMA_RQ
EIDE_OPTICAL_IOCHRDY
EIDE_DATA<7>
EIDE_INT
EIDE_OPTICAL_INT
EIDE_WR_L
EIDE_RST_L
EIDE_OPTICAL_RST_L
EIDE_IOCHRDY
EIDE_DMACK_L
EIDE_RD_L
EIDE_DMARQ
EIDE_CS1_L
EIDE_OPTICAL_CS1_L
EIDE_OPTICAL_DATA<5>
EIDE_DATA<5>
EIDE_OPTICAL_DATA<4>
EIDE_DATA<4>
EIDE_DATA<3>
EIDE_DATA<6>
EIDE_DATA<0>
EIDE_OPTICAL_DATA<1>
EIDE_DATA<1>
EIDE_OPTICAL_DATA<2>
EIDE_DATA<2>
EIDE_DATA<13>
EIDE_OPTICAL_DATA<9>
EIDE_OPTICAL_DATA<10>
EIDE_OPTICAL_DATA<14>
EIDE_OPTICAL_CS0_L
EIDE_OPTICAL_ADDR<2>
EIDE_OPTICAL_ADDR<1>
EIDE_OPTICAL_ADDR<0>
PCI_AD<18>
HD_DATA<11>
HD_DATA<1>
HD_DATA<0>
HD_DATA<5>
HD_CS0_L
HD_DATA<14>
HD_DATA<9>
HD_DATA<6>
HD_DATA<12>
HD_DATA<15>
HD_ADDR<2>
HD_ADDR<1>
HD_DATA<13>
HD_ADDR<0>
HD_DATA<4>
HD_DATA<8>
HD_DATA<2>
HD_DATA<7>
HD_DATA<3>
UIDE_DATA<5>
UIDE_DATA<0>
UIDE_DATA<1>
UIDE_DATA<11>
UIDE_DATA<2>
UIDE_DATA<3>
UIDE_DATA<6>
UIDE_DATA<9>
UIDE_DATA<4>
UIDE_DATA<8>
UIDE_DATA<10>
UIDE_ADDR<0>
UIDE_DATA<12>
UIDE_DIOR_L
HD_DIOW_L
HD_DMACK_L
UIDE_DMACK_L
UIDE_RST_L
UIDE_CS1_L
HD_CS1_L
EIDE_DATA<8>
EIDE_DATA<9>
EIDE_DATA<12>
EIDE_DATA<10>
EIDE_DATA<11>
EIDE_DATA<14>
EIDE_DATA<15>
EIDE_CS0_L
EIDE_ADDR<2>
EIDE_ADDR<1>
EIDE_ADDR<0>
EIDE_OPTICAL_DATA<8>
PCI_AD<27>
PCI_AD<29>
PCI_AD<31>
PCI_AD<24>
PCI_AD<26>
PCI_AD<28>
PCI_AD<30>
AIRPORT_IDSEL
PCI_AD<23>
PCI_CBE<3>
EIDE_OPTICAL_DATA<12>
EIDE_OPTICAL_DATA<15>
UIDE_CS0_L
HD_DATA<10>
HD_DIOR_L
UIDE_DIOW_L
UIDE_IOCHRDY
CLK33M_AIRPORT
PMU_PME_L
PCI_AD<19>
PCI_AD<21>
PCI_AD<16>
PCI_AD<22> PCI_AD<20>
PCI_PAR
PCI_AD<18>
EIDE_OPTICAL_DATA<6>
EIDE_OPTICAL_DATA<3>
EIDE_OPTICAL_DATA<7>
PCI_AD<4>
PCI_CBE<0>
PCI_AD<13>
PCI_AD<15>
PCI_DEVSEL_L
PCI_STOP_L
PCI_TRDY_L
PCI_FRAME_L
HD_RESET_L
HD_DATA<7> HD_DATA<6>
HD_DATA<3> HD_DATA<2>
HD_DATA<1> HD_DATA<0>
HD_DMARQ HD_DIOR_L
HD_DMACK_L HD_ADDR<1>
HD_ADDR<0> HD_CS0_L
+HD_LOGIC_SLEEP
HD_DATA<8> HD_DATA<9>
HD_DATA<10> HD_DATA<11>
HD_DATA<12> HD_DATA<13>
HD_DATA<14> HD_DATA<15>
HD_DIOW_L HD_IOCHRDY
HD_INTRQ HD_ADDR<2>
HD_CS1_L
+5V_HD_SLEEP
HD_DATA<5> HD_DATA<4>
EIDE_OPTICAL_DATA<8> EIDE_OPTICAL_DATA<9>
EIDE_OPTICAL_DATA<14>
EIDE_OPTICAL_CS1_L
EIDE_OPTICAL_DATA<6> EIDE_OPTICAL_DATA<5> EIDE_OPTICAL_DATA<4>
EIDE_OPTICAL_DATA<3> EIDE_OPTICAL_DATA<2> EIDE_OPTICAL_DATA<1> EIDE_OPTICAL_DATA<0>
EIDE_OPTICAL_CS0_L
EIDE_OPTICAL_DATA<11>
EIDE_OPTICAL_DATA<12>
EIDE_OPTICAL_DATA<15>
EIDE_OPTICAL_DATA<11>
UIDE_DATA<7>
UIDE_DATA<13>
UIDE_ADDR<2>
PCI_AD<11>
PCI_IRDY_L
PCI_CBE<2>
PCI_AD<17>
MAIN_RESET_L
UIDE_DATA<14>
UIDE_ADDR<1>
EIDE_OPTICAL_DATA<10>
EIDE_OPTICAL_DMAACK_L
EIDE_OPTICAL_DATA<13>
EIDE_OPTICAL_READ_L
EIDE_OPTICAL_ADDR<2>
EIDE_OPTICAL_DMA_RQ
EIDE_OPTICAL_ADDR<0>
EIDE_OPTICAL_ADDR<1>
EIDE_OPTICAL_INT
EIDE_OPTICAL_DATA<7>
EIDE_OPTICAL_DATA<13>
EIDE_OPTICAL_DATA<0>
EIDE_OPTICAL_RST_L
+5V_SLEEP_OPT
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
37
39
39
39
39
39
39
39
39
39
37
39
39
39
39
39
39
37
37
37
37
37
37
37
37
37
37
37
37
37
24
37
37
37
37
37
37
39
37
39
37
39
37
39
24
37
37
37
39
39
39
39
37
39
37
29
18
18
18
18
18
18
37
18
18
18
18
18
18
18
18
18
18
18
18
18
18
37
37
39
18
37
18
37
18
37
18
18
37
18
18
37
37
37
37
18
37
37
18
19
17
17
17
17
17
17
18
17
17
17
17
17
17
17
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
17
39
17
17
17
17
17
17
18
18
39
39
39
29
17
18
17
18
17
18
17
39
39
39
17
18
17
17
18
18
18
18
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
17
18
18
17
18
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
12
12
12
12
12
12
17
12
12
12
12
12
12
12
37
37
37
37
37
37
37
37
37 37
37 37
37 37
37
37
37
37
37 37
37 37
37 37
37
37
37
37 37
37 37
37
37
37
37
37
37
37
37
12
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37 37
37
37 37
37
37
37
37
37
37
37
37
37
37
37
37
12
12
12
12
12
12
17
17
37
37
37
37
37
37
37
35
39
17
39
12
17
12
17
12
17
12
37
37
37
12
17
12
12
17
17
17
17
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
38
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
12
17
17
12
17
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
9
9
9
9
9
9
9
9
12
9
39
39
9
9
9
9
9
9
9
9
13
24
24
24
24
24
24
13
13 24
13 24
13 24
13
13
13
13
13 24
24 13
24 13
13
13
13
24 13
24 13
13
24
24
24
24
24
24
24
9
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
13
13
13
13
13
13
13
13
13
13
13
13
13
13
24
24 13
13
13 24
13
13
13
13
13
13
13
13
13
13
13
24
9
9
9
9
9
9
12
12
24
24
13
24
24
13
13
12
12
14
14
9
12
9
12
9
12
9
24
24
24
9
12
9
9
12
12
12
12
24
24
24
24
24
24
24
13
24
24
24
24
24
38
24
24
24
24
24
24
24
24
24
24
13
24
24
32
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
13
13
13
9
12
12
9
14
13
13
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
38
GND
PWM1/
PWM2/
ADR SELECT/
TACH4/
ADR ENABLE#
PWM3/
THERM#
TACH3
TACH2
SMBALERT#
TACH1
XTO
+2.5V/
VCC
SMBALERT# SDA SCL
D1+ D1-
D2+ D2-
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
VER 1
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
USB MODEM/SOFT MODEM
PLACE NEAR CONNECTOR PINS 15 PLACE NEAR CONNECTOR PINS 16
GENERATES ACTIVE HIGH SPKR MUTE
PREVENTS POWER-ON POP AND
KEEP STUFFING RESISTORS CLOSE TO ADT7460 CONTROLLER
RIGHT USB BOARD
GPU FAN
FAN/MODEM/SOUND/BACKUP BATT.
ALTERNATE1
PLACE UNDERNEATH UPPER RAM
ALTERNATE2
PLACE CLOSE TO BATTERY CHARGER/VCORE
MAIN2
MAIN1
PLACE CLOSE TO CPU
Place it near J3
PREVENTS POWER-ON POP AND PROPAGATES ACTIVE LOW HP MUTE
KEEP STUFFING RESISTORS CLOSE TO ADT7460 CONTROLLER
PLACE IN BETWEEN 3/5/1.5/2.5V PWR SUPPLY
LEFT I/O & AUDIO BOARD (LIO)
FAN CONTROLLER
FAN INTERFACE
SERIAL DEBUG INTERFACE
USB MODEM I2C ADDR ASSIGNED VIA FLEX CABLE
CPU FAN
2
1
C763
0.1uF
402
CERM
10V
20%
2
1
R749
10K
1/16W
MF
5%
402
+5V_SLEEP
2
3
1
Q59
2N3904
SM
2
3
1
Q46
2N3904
SM
2
1
R454
10K
402
5% MF
1/16W
+5V_MAIN
2
1
R530
1/16W
10K
5% MF
402
2
1
C698
10uF
CERM 805
20%
6.3V 2
1
C696
10V
0.1uF
NO STUFF
20% CERM
402
2
3
1
Q67
2N3904
SM
2
3
1
Q61
2N3904
SM
21
R686
402
5% MF
1/16W
0
21
R687
MF
0
1/16W
5%
402
21
R703
5%
1/16W
MF
402
0
21
R704
402
0
5%
1/16W
MF
21
R701
402
MF
1/16W
5%
0
NO STUFF
21
R702
NO STUFF
1/16W
MF
5%
0
402
21
R688
NO STUFF
1/16W
402
MF
5%
0
21
R689
402
MF
1/16W
5%
0
NO STUFF
+5V_MAIN
2
1
R547
805
FF
1/10W
5%
0
+3V_MAIN
2
1
C692
402
CERM
10V
20%
NO STUFF
0.1uF
2
1
C689
805
CERM
6.3V
20%
10uF
+3V_SLEEP
2
1
C669
6.3V 805
CERM
20%
4.7uF
+5V_MAIN
+3V_MAIN
+3V_MAIN
+5V_MAIN
+3V_MAIN
2
1
R633
5% 1/16W
402
MF
10K
21
R659
0
5%
1/16W
MF
402
NO STUFF
21
R661
NO STUFF
0
5%
1/16W
MF
402
2
1
C818
NO STUFF
402
CERM
50V
20%
0.001uF
2
1
C817
NO STUFF
0.001uF
402
CERM
50V
20%
21
R700
0
5%
1/16W
NO STUFF
MF
402
21
R705
402
MF
1/16W
0
5%
NO STUFF
2
1
C814
4.7uF
20% 805
CERM
6.3V
3
9
4
7
6
16
1
8
5
15
2
10
11
12
13
14
U53
CRITICAL
QSOP
ADT7460
2
1
R752
1/16W 402
100K
MF
5%
4
5
3
Q77
2N7002DW
SOT-363
1
2
6
Q77
2N7002DW
SOT-363
+5V_MAIN
2
1
R751
100K
5% 1/16W MF 402
4
3
2
1
6
5
J1
M-RT-SM
CRITICAL
SM04B-SSR
4
3
2
1
6
5
J18
SM04B-SSR
CRITICAL
M-RT-SM
21
XW30
OMIT
SM
2
1
C829
0.1uF
20% 10V CERM 402
2
1
C828
20%
0.1uF
10V
CERM
402
1
2
6
Q78
SOT-363
2N7002DW
4
5
3
Q78
SOT-363
2N7002DW
2
1
R769
402
1/16W
100K
5% MF
2
1
R768
402
MF
1/16W
5%
100K
+3V_MAIN
2
1
R770
MF
1/16W
5%
100K
402 2
1
R774
1/16W 402
MF
10K
5%
2
1
R773
MF
1/16W 402
5%
10K
4
5
3
Q79
SOT-363
2N7002DW
2
1
R772
10K
1/16W
5%
402
MF
NO STUFF
1
2
6
Q79
SOT-363
2N7002DW
2
1
R771
NO STUFF
10K
5% MF
402
1/16W
9 8 7 65
4
3
2
101
J28
SM
M-ST-5087
CRITICAL
NO STUFF
+5V_MAIN
+5V_SLEEP
+5V_SLEEP
1
2
6
Q83
2N7002DW
SOT-363
4
5
3
Q83
2N7002DW
SOT-363
2
1
C850
0.1uF
20% 10V CERM 402
2
1
R817
MF
1/16W
5%
100K
402
2
1
R808
402
100K
5% 1/16W MF
2
1
R807
MF
1/16W
5%
100K
402
+3V_MAIN
2
1
C848
SMD-1
TANT
6.3V
20%
150uF
2
1
C849
603
CERM
6.3V
10%
1uF
21
R806
402
MF
1/16W
5%
10
+3V_MAIN
2
1
C868
402
X7R
25V
10%
1000pF
2
1
C869
25V
10%
402
X7R
1000pF
9
8 7
6 5
4 3
2
16 15
14 13
12 11
10
1
J17
CRITICAL
QT500166-L010
M-ST-SM1
9
87
65
43
2
1615
1413
1211
10
1
J15
QT500166-L010
CRITICAL
M-ST-SM1
9
87
65
40
4
39
3837
3635
3433
3231
30
3
29
2827
2625
2423
2221
20
2
19
1817
1615
1413
1211
10
1
4443
4241
J3
M-ST-SM1
CRITICAL
QT500406-L111
2
1
R778
402
MF
1/16W
5%
10K
SOFT_MODEM
21
R776
402
MF
1/16W
5%
0
USB_MODEM
051-6809
25 44
B
THERM1_M_DP
THERM1_M_DM
FAN2_TACH
FAN2_PWM_L
COMM_GPIO_L
COMM_TRXC
COMM_RXD
THERM1_DM
THERM2_DM
THERM2_DP
AUD_GND
ADAPTER_DET CHARGE_LED_L NEC_LUSB_PPON NEC_LUSB_OCI_UF
BT_USB_DM BT_USB_DP
INT_I2S0_SND_LRCLK INT_I2S0_SND_TO_DAC SND_HP_SENSE_L SND_LIN_SENSE_L
+5V_MAIN_AUD
+3V_MAIN_AUD
SND_AMP_MUTE
SND_HP_MUTE_LO
INT_I2C_DATA2
INT_I2C_CLK2
SND_HW_RESET_L
INT_I2S0_SND_FROM_ADC
SLEEP
NEC_USB_DAP
NEC_USB_DAM
THERM1_DM
THERM1_A_DP
THERM2_DP THERM2_DM
ADT7460_TACH3_TP
THERM_INV
THERM2_A_DM
THERM1_A_DM
THERM2_A_DP
THERM1_DP
GPU_THERM_DM
THERM2_DM
GPU_THERM_DP
THERM2_DP
THERM1_DP
INT_PU_RESET_L
ADT7460_ADR_ENABLE_L
ADT7460_VCC
THERM1_DP
ADT7460_THERM_L
FAN1_PWM_L
FAN1_TACH
+FAN_PWR
THERM2_M_DP
THERM2_M_DM
THERM2_A_DP
THERM1_A_DP
THERM1_A_DM
THERM2_A_DM
SND_HP_MUTE_L
SND_HP_MUTE
SND_HP_MUTE_LO
INT_I2C_CLK1
FAN1_PWM
FAN1_PWM_L
FAN1_TACH
+FAN_PWR
FAN2_PWM
FAN2_TACH
FAN2_PWM_L
COMM_TXD_L
COMM_RTS_L
COMM_DTR_L
INT_I2C_DATA1
+3V_PMU_AVCC
THERM_L_OC
ADT7460_THERM_L
NEC_USB_DBM NEC_USB_DBP
NEC_RUSB_PPON
NEC_RUSB_OCI_UF
THERM2_DM
THERM2_M_DM
THERM2_DP
THERM2_M_DP
THERM1_M_DM
THERM1_DP
THERM1_M_DP
THERM1_DM
CPU_THERM_DM
THERM1_DM
CPU_THERM_DP
SND_AMP_MUTE
SND_AMP_MUTE_L
INT_MOD_SYNC INT_MOD_DTI INT_MOD_BITCLK
MODEM_USB_DM MODEM_USB_DP COMM_RING_DET_L
INT_I2C_CLK2
INT_I2C_DATA2
INT_MOD_CLKOUT
INT_MOD_DTO
COMM_RESET_L
COMM_SHUTDOWN
COMM_SHUTDOWN_PU
39 34 39
39
39
39
39
32
39
39
39
39
39
39
39
39
39
39
39 39
39
37
37
39
39
39
39
37
37
37
39
39
39
39
37
37
35
39
39
39
39
38
38
39
25
25
39
39
39
29
37
37
37
37
37
37
37
37
37
37
37
37
37
29
37
39
38
37
37
37
37
37
37
39
14
39
38
39
39
39
39
14
38
37
37 39
39
37 37
37 37
37 37
37
37
39
37
37
29 25
25
39
39
25
25
25
14
14
14
25
25
25
38
29
29
17
17
14
14
14
14
14
14
14
32
32
25
25
14
14
14
14
14
23
17
17
25
25
25
25
25
25
25
25
19 25
19 25
25
13
25
25
25
25
25
25
25
25
25
25
25
25
14
25
13
25
25
25
25
25
14
14
14
13
5
29
29
25
17
17 17
17
25 25
25 25
25 25
25
6
25
6
25
14
14
14
14
14
14
14 14
25
14
14
14
14
14
VFB
SW
MODE
RUN
VIN
GND
G
D
S
G
D
S
TX_EN
TXD7
TXD6
TXD5
TXD4
TX_ER
GTX_CLK
125CLK
RX_CLK
TXD0
TXD3
TXD2
TXD1
TX_CLK
VDDOX
VDDOH
VDDO
DVDD
CTRL10
MDC
CRS COL
RX_ER
RX_DV
RXD7
RXD1 RXD2 RXD3 RXD4 RXD5 RXD6
RXD0
MDI1­MDI2+ MDI2­MDI3+
MDI1+
MDI0-
MDI0+
AVDD
VSSC
XTAL2
HSDAC-
HSDAC+
S_CLK-
S_CLK+
XTAL1
S_OUT-
S_OUT+
S_IN-
S_IN+
COMA
RESET
INT+
INT-/
MDIO
LED_LINK1000
LED_LINK100
GND
SEL_2.5V
SEL_OSC
TRST
RSET
TDO
TDI
TCK TMS
CONFIG5 CONFIG6
CONFIG4
CONFIG0 CONFIG1 CONFIG2 CONFIG3
LED_TX
LED_RX
LED_DUPLEX
LED_LINK10
MDI3-
1000PF, 2000VSHIELD
PRIMARY
ENET_CTAP
MDI_2-
MDI_3-
MDI_3+
MDI_1-
MDI_1+
MDI_0-
MDI_0+
MDI_2+
ENET_CTAP
CHIP SIDE
RJ45
75 OHM
1CT:1CT
J3
J2
J1
J5 J6 J7 J8
J4
SECONDARY
CABLE SIDE
RJ45
75 OHM
75 OHM
75 OHM
1CT:1CT
1CT:1CT
1CT:1CT
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
(000)
(111)
(110)
(101)
Keep C851 & C852 Stubs short
PLACE ALL SERIES RES CLOSE TO PHY
Y6 LOAD CAPACITANCE IS 16PF
NC
NC
NC
NC NC
PLACE CAPS (IN ORDER) ON PINS 32/35, 36/40, 45 & 78
PLACE CAPS (IN ORDER) ON PINS 1, 6, 10/15, 57/62, 67/71, 85
PLACE CAPS (IN ORDER) ON PINS 5, 21/26, 48/52, 66/72, 88, 96
PUT CRYSTAL CIRCUIT CLOSE TO PHY
(BELOW)
SEE CONFIG TABLES
(000)
(111)
(000)
ASLEEP ON BATTERY (SAVES POWER)
PLACES PHY IN "COMA" MODE WHEN
NC
NC
NC
NC
NC
NC
PLACE RESISTORS CLOSE TO PHY
10/100/1000 ETHERNET
PHYADR[0] PHYADR[3]
75/50 OHM
MODE[3]
MODE[0]
DIS_125
ANEG[1]
BIT[0]BIT[1]
INT_POL
ENA_XC
ANEG[2] MODE[1]
DIS_SLEEP
PHYADR[4]
PHYADR[1]
CONFIG INPUTS
BIT[2]
DIS_FC
ANEG[3] ANEG[0] MODE[2]
ENA_PAUSE
PHYADR[2]
SEL_BDT
CONFIG<3>
CONFIG<6>
CONFIG<5>
CONFIG<4>
CONFIG<0> CONFIG<1> CONFIG<2>
PIN
BIT[2:0]
111
000
001
011 010
100
110 101
CONFIG DEFINITIONS
LED_LINK100 LED_LINK1000
PIN
VDDO
VSS
LED_TX
LED_RX
LED_DUPLEX
LED_LINK10
parallel, matched lengths, with minimum via count, and short if possible
All differential signals should be close,
Must maintain 50-ohms trace impedance on all
Sandwich each RJ54 pair between chassis grounds
2. TX SERIES TERMINATION - LOCATE NEAR LINK
3. RX SERIES TERMINATION - LOCATE NEAR PHY
1. Decoupling caps
MDI pairs and all RJ45 pairs
Ethernet routing priority:
MARVELL 88E1111
R1
VOUT = 0.8V*(1+R2EQV/R1)
R2B
R2A
R2EQV = R2A||R2B
PLACE CAPS AT CONNECTOR PINS 5 & 6
.
402
MF
1/16W
1%
49.9
2
1
R435
49.9
1% MF
402
1/16W
2
1
R436
402
49.9
1%
1/16W
MF
2
1
R433
49.9
1% 1/16W MF 402
2
1
R434
27pF
50V
CERM
5%
402
2
1
C604
27pF
402
5%
50V
CERM
2
1
C624
MF
1/16W
5%
402
0
21
R421
10K
5%
1/16W
MF
402
2
1
R430
CHGND1
1/16W
402
MF
1%
49.9
2
1
R439
402
49.9
1%
1/16W
MF
2
1
R437
1%
49.9
1/16W MF 402
2
1
R440
402
MF
1/16W
1%
49.9
2
1
R438
402
CERM
16V
20%
0.01uF
2
1
C622
0.01uF
20% 16V CERM 402
2
1
C615
0.01uF
20% 16V CERM 402
2
1
C617
402
CERM
10V
20%
0.1uF
2
1
C647
20% 10V CERM 402
0.1uF
2
1
C645
20% 10V CERM 402
0.1uF
2
1
C648
402
CERM
10V
20%
0.1uF
2
1
C646
402
49.9
1%
1/16W
MF
NO STUFF
2
1
R424
NO STUFF
402
49.9
1%
1/16W
MF
2
1
R429
402
5%
1/16W
MF
0
21
R423
10K
5% 1/16W MF 402
2
1
R428
402
5%
1/16W
0
MF
21
R445
402
MF
1.5K
1/16W
5%
2
1
R432
1% 1/16W MF 402
4.99K
2
1
R427
805
CERM
2.2uF
20% 10V
2
1
C611
1/16W
MF
402
5%
1K
21
R422
0.01uF
16V CERM
20%
402
2
1
C616
0.1uF
402
10V
20% CERM
2
1
C614
20%
402
CERM
16V
0.01uF
2
1
C602
0.1uF
CERM
20% 10V
402
2
1
C618
6.3V CERM 805
20%
10uF
2
1
C592
402
10V
20% CERM
0.1uF
2
1
C598
0.01uF
16V CERM
20%
402
2
1
C600
402
10V
20% CERM
0.1uF
2
1
C623
402
20% CERM
16V
0.01uF
2
1
C612
0.1uF
CERM
20% 10V
402
2
1
C597
6.3V
20%
805
CERM
10uF
2
1
C595
FERR-EMI-600-OHM
SM
12
L35
+2_5V_MAIN
SOT23-6
LTC3405
CRITICAL
4
5
31
6
2
U45
CRITICAL
3.3uH
SM1
21
L60
1%
402
MF
1/16W
665K
2
1
R506
22pF
402
CERM
50V
5%
2
1
C675
1/16W MF 402
1%
49.9K
2
1
R504
1/16W MF 402
1%
182K
2
1
R503
402
5%
0
MF
1/16W
NO STUFF
2
1
R513
402
20% CERM
16V
0.01uF
2
1
C619
0.1uF
CERM
20% 10V
402
2
1
C608
0.01uF
16V CERM
20%
402
2
1
C601
402
10V
20% CERM
0.1uF
2
1
C594
0.01uF
16V CERM
20%
402
2
1
C599
402
10V
20% CERM
0.1uF
2
1
C603
1/16W
MF
5%
402
0
2
1
R507
SOT23
1N914
3 1
D15
+3V_MAIN
10uF
20% CERM
805
6.3V
2
1
C674
10uF
6.3V 805
CERM
20%
2
1
C680
SOT-363
2N7002DW
4
5
3
Q32
2N7002DW
SOT-363
1
2
6
Q32
88E1111
BCC
CRITICAL
54
55
53
48
26
72
66
52
96
88
21
5
7
9
4
20
19
18
17
16
14
12
11
47
46
50
44
49
75
77
81
82
80
79
56 13
3
94
2
86
87
89
90
91
93
92
95
30
28
24 43
42
41
39
34
33
31
29
25
68
69
73
74
76
70
23
38
37
8
97
85
71
67
62
57
15
10
6
1
51
84
58
59
60
61
63
64
65
27
83
78
45
40
36
35
32
22
U43
NO STUFF
20K
402
MF
1/16W
5%
21
R425
0
5% 1/16W MF 402
2
1
R441
10K
5%
1/16W
MF
402
2
1
R431
402
CERM
16V
20%
0.01uF
2
1
C613
0
5% 1/16W MF 603
2
1
R442
SM-3
25.0000M
CRITICAL
31
Y5
MJ-R0016
F-RT-TH
CRITICAL
9
8
7
6
5
4
3
2
10
1
14
13
12
11
J23
402
CERM
50V
5%
10pF
2
1
C852
402
CERM
50V
5%
10pF
NO STUFF
2
1
C851
B
4426
051-6809
U43
338S0079338S0223
?
ALT PART
+2_5V_MARVELL_AVDD
CLKENET_PHY_RX
CLKENET_PHY_GBE_REF
CLKENET_LINK_RX
CLKENET_LINK_GBE_REF
CLKENET_PHY_TX
MDI_M<3>
MDI_P<0>
+2_5V_MARVELL
IO_RESET_L
INT_ENET_RST_L
ENET_RSET
3405_VFB
3405_MODE
MDI3_PDMDI2_PDMDI1_PDMDI0_PD
SLEEP_L_LS5
AC_IN
ENET_LINK_RXD<0> ENET_LINK_RXD<1> ENET_LINK_RXD<2> ENET_LINK_RXD<3> ENET_LINK_RXD<4> ENET_LINK_RXD<5> ENET_LINK_RXD<6> ENET_LINK_RXD<7>
ENET_PHY_TXD<0>
ENET_PHY_TXD<2>
ENET_PHY_TXD<1>
CLKENET_PHY_GTX
ENET_PHY_TX_ER
ENET_PHY_TX_EN
ENET_PHY_TXD<7>
ENET_PHY_TXD<6>
ENET_PHY_TXD<5>
ENET_PHY_TXD<4>
ENET_PHY_TXD<3>
ENET_RX_DV
ENET_COL
ENET_CRS
ENET_RX_ER
ENET_MDC ENET_MDIO
ENET_ENERGY_DET
ENET_HSDACM
ENET_RST_L
ENET_HSDACP
CLK25M_ENET_XIN
ENET_VSSC
CLK25M_ENET_XOUT
LED_RX_SPN
CLK25M_XTAL_IN
ENET_COMA
LTC3405_SW
+1_0V_MARVELL
CLKENET_LINK_TX
MDI_M<1> MDI_P<2>
MDI_P<3>
MDI_M<2>
MDI_P<1>
MDI_M<0>
JTAG_ASIC_TRST_L
JTAG_ASIC_TMS
JTAG_ASIC_TCK
JTAG_ASIC_TDO_TP
INT_TDO
LED_LINK100
LED_LINK10
+2_5V_MARVELL
34 33
29
32
30
35
35
39
39
38
23
20
29
37
37
37
37
37
37
37
37
37
37
37
35
37
37
37
37
37
37
37
37
37
37
37
37
37
35
39
39
39
39
39
39
39
39
39
14
38
38
35
35
13
13
35
37
37
26
17
14
18
28
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
14
38
38
13
37
37
37
37
37
37
13
13
13
39
13
26
OE
GND
OUT
VCC
OSC
SYM_VER2
GND
OUTIN
BYP ADJ
ADJ
BYP GND
OUT
NC
NC
SHDN
IN
(SYM_VER1)
VREG_PD
PAD
THRML
AGND
SM
TESTM
SE
D5 D6
RESETZ
D7
DGND
PLL VDD
1.8
3.3
DVDD
PLLGND
PLL
3.3
VDD
D3 D4
D1 D2
BMODE
PC2
PD
PC1
CPS
PC0
D0
LREQ
LPS
LCLK
3.3
AVDD DVDD
1.8
TPA1+ TPA1-
PCLK
TPA0-
TPA0+
TPA2+ TPA2-
C/LKON
CTL0 CTL1
CNA
PINT
TPBIAS0 TPBIAS1
XO
XI
TPBIAS2
R1
R0
TPB2-
TPB2+
TPB1-
TPB1+
TPB0-
TPB0+
DS0 DS1
ON/OFF
GND
VOUT
FB
VIN
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
(FWA-TX)
(FWA-RX)
(FWB-RX)
NC
NC
R1
R2
PHY PIN 28
PHY PINS 72,76
PHY PIN 38
TX0
NC
(FW_TPB1N)
(FW_TPB1P)
(FW_TPB0N)
(FW_TPA1N)
(FW_TPA1P)
(FW_TPA0N)
(FW_TPB0P)
NC
NC
PHY PIN 38
RX0
NC
NC
PHY PIN 61
PHY PIN 50
PHY PIN 40
R2
VOUT = 1.22*(1+R2/R1)+ IADJ*R2
165MA MAX LOAD
R1
PHY PIN 21
(PC0 IS MSB, PC2 IS LSB)
MAY REQUIRE UP TO 3W)
PWR CLASS = 100 (MAY PROVIDE POWER, OR
RESET PULSE WHEN PHY FIRST RECEIVES POWER
PHY PINS 4,14
(DS2)
PHY PIN 25
INTERNAL PULLUP PROVIDES
1 = A-only port
DSx Strap Options
CAPACITOR IN CONJUCTION WITH
PHY PIN 64
0 = Bilingual port
1MA (MAX) BUS HOLDERS
IADJ = 30NA AT 25C
SN0201029PFP
(FW_TPA0P)
FIREWIRE PHY
(FWB-TX)
2
1
R514
1K
5%
1/16W
MF
402
2
1
C679
6.3V
0.22uF
CERM
20% 402
5
6
7
8
4
3
2
1
RP38
22
SM1
1/16W
5%
5
6
7
8
4
3
2
1
RP37
5%
1/16W
SM1
22
21
R519
MF
1/16W
5%
22
402
21
R520
402
22
5% MF
1/16W
2
1
C683
0.1uF
402
20% 10V CERM
2
1
C610
16V
0.01uF
402
CERM
20%
4
3 1
2
G2
98.304MHZ
CRITICAL
SM-A
2
1
R508
402
1/16W
5%
0
MF
2
1
R412
MF
1/16W
NO STUFF
100K
5%
402
21
R510
402
MF
1/16W
5%
47
2
1
R511
402
MF
1/16W
5%
100
2
1
C583
402
0.22uF
6.3V
20% CERM
21
C584
10V
20%
603
CERM
1uF
21
C596
10V
20%
CERM
603
1uF
21
C606
1uF
10V
20%
CERM
603
21
C593
10V
20%
603
CERM
1uF
21
R413
603
1
5%
1/16W
MF
21
R420
1
5%
1/16W
MF
603
21
R426
1/16W
603
MF
5%
1
21
R418
1
5%
1/16W
MF
603
51
2
3 4
U44
SOT-23-1
LTC1761ES5-BYP
CRITICAL
2
1
C671
2.2uF
20% 10V
CERM
805
2
1
R496
1% 1/16W MF 402
16.2K
21
R495
402
MF
1/16W
1%
27.4K
2
1
R443
16.2K
1% 1/16W MF 402
2
1
R444
27.4K
1/16W
1% MF
402
2
1
C625
805
CERM
10V
20%
2.2uF
21
R419
603
MF
1/16W
5%
1
21
C586
10V
20%
603
CERM
1uF
21
C678
603
10V
20%
CERM
1uF
2
1
R416
603
MF
1/16W
5%
3.3
2
1
R415
3.3
5%
1/16W
MF
603
2
1
C585
2.2uF
20% 10V CERM 805
2
1
C588
2.2uF
20% 10V
805
CERM
2
1
R414
603
MF
1/16W
5%
10
2
1
L34
400-OHM-EMI
SM-1
5
1
7
6
8
4
3
2
U38
LT1962-ADJ
MSOP
CRITICAL
2
1
C590
0.1uF
402
20% CERM
10V
21
R417
603
MF
1/16W
5%
1
21
C591
0.1uF
402
CERM
10V
20%
2
1
R501
5%
1K
1/16W MF 402
3
2
1
D25
SC-59
SDM20E40C
+5V_SLEEP
2
1
R505
1K
402
MF
1/16W
5%
26
27
73
60
54
47
55
56
48
49
41
42
58
59
52
53
45
46
81
78
36
35
75
22
23
31
30
29
28
25
1
77
5
68
67
66
3
80
7
706918
6
716537
8
32
33
7672643814
4
20
19
17
16
15
13
12
11
2
10
9
34
79
74
6357514439
24
6261504340
21
U36
CRITICAL
PQFP
TSB81BA3A
2
1
C677
0.1uF
402
20% 10V CERM
2
1
C620
10uF
20%
6.3V CERM 805
2
1
R491
56.2
402
1/16W MF
1%
2
1
R492
56.2
1/16W
MF
402
1%
2
1
R487
56.2
MF 402
1% 1/16W
2
1
C676
0.1uF
20% CERM
402
10V
2
1
R488
402
MF
1/16W
1%
56.2
2
1
C607
1uF
CERM
20% 10V
603
2
1
C605
1uF
10V
20% CERM
603
2
1
R489
402
MF
56.2
1% 1/16W
2
1
R498
1% MF
402
1/16W
4.99K
2
1
R490
MF
402
56.2
1/16W
1%
C672
220pF
402
CERM
25V
5%
2
1
R493
56.2
MF 402
1% 1/16W
2
1
R499
402
MF
1/16W
1%
4.99K
2
1
R494
1%
1/16W
MF
402
56.2
C673
220pF
402
CERM
25V
5%
2
1
R486
1K
5%
1/16W
402
MF
2
1
C682
20%
0.1uF
CERM 402
10V
2
1
C681
10uF
20%
6.3V CERM 805
2
1
C621
16V
0.01uF
CERM
20% 402
2
1
C609
10uF
805
CERM
6.3V
20%
2
1
C587
0.1uF
402
CERM
10V
20%
2
1
C670
100uF
20% 10V
POLY
SMD-3
21
L59
SM-3
220uH
CRITICAL
2
1
D16
MBR0540
SM
8
7
56
4
U37
LM2594
CRITICAL
SM
2
1
C665
10uF
50V CERM 2320
N20P20%
2
1
R502
402
MF
1%
1/16W
402K
2
1
C589
0.1uF
10V CERM 402
20%
21
R518
402
MF
1/16W
5%
22
2
1
C684
10V
0.1uF
CERM
20% 402
12
R512
402
6.34K
1%
1/16W
MF
1
2
R516
10K
5% 1/16W MF 402
2
1
R497
1K
402
5% MF
1/16W
2
1
R509
402
MF
1/16W
5%
1K
2
1
R515
402
5%
1/16W
MF
1K
2
1
R500
402
MF
1/16W
5%
470
2
1
R517
402
MF
1/16W
1K
5%
Alt. for Siward Part
197S0011G2197S0052
051-6809
27 44
B
FW_TPI0P
FW_TPB1P FW_TPB1N
FW_TPO0N
FW_PHY_CNTL<0>
+1_95V_FW_PLL500VDD
FW_TPA1P
FW_TPO0P
FW_BIAS1
+3V_FW
FW_OSC_EN
FW_LKON
FW_BIAS0
FW_PORT1_SEL
FW_INPUT_PD
FW_TPB2_PD
FW_R1
FW_R0
FW_XI
FW_PINT
FW_PHY_CNTL<1>
CLKFW_PHY_PCLK
+1_95V_FW_DVDD_RX0
+1_95V_FW_DVDD
+3V_FW_AVDD
CLKFW_PHY_LCLK
FW_PHY_LPS
FW_PHY_LREQ
FW_PC_PU
FW_PHY_PD
FW_PC_PD
FW_PHY_DATA<0>
FW_CPS
FW_BMODE
FW_PHY_DATA<4>
FW_PHY_DATA<1> FW_PHY_DATA<2> FW_PHY_DATA<3>
+3V_FW
+1_95V_FW_DVDD_PORT1
FW_PHY_DATA<5> FW_PHY_DATA<6> FW_PHY_DATA<7>
FW_PHY_RESET_L
FW_TESTM
FW_VREG_PD
FW_PHY_CNTL<0>
FW_LINK_CNTL<1>
CLKFW_PHY_PCLK
FW_LINK_CNTL<0>
+FW_PWR_OR
+FW_PWR_OR
FW_LINK_DATA<7>
FW_LINK_DATA<6>
FW_LINK_DATA<5>
FW_LINK_DATA<4>
FW_LINK_DATA<3>
FW_LINK_DATA<2>
FW_LINK_DATA<1>
FW_LINK_DATA<0>
FWPLL_BYP
FW_PLL_ADJ
+3V_FW_UF
FW_OSC
FWB_TPB0 FWB_TPB1
CLKFW_LINK_PCLK
+1_95V_FW_PLLVDD
+1_95V_FW_DVDD
FW_PHY_CNTL<1>
LM2594_IN
FW_CORE_BYP
FW_CORE_ADJ
+1_95V_FW_DVDD
+1_95V_FW_PLLVDD
+1_95V_FW_DVDD_TX0
FW_TPI0N
FW_TPA1N
+1_95V_FW_PLL400VDD
39
39
39
38
38
38
38
39
37
37
37
37
37
37
37
28
37
37
35
38
35
37
28
37
37
35
37
28
28
37
37
37
37
37
37
37
37
35
38
38
37
38
38
37
37
38
28
28
28
28
27
38
28
28
27
13
35
13
27
27
38
27
38
38
38
13
13
13
14
37
37
37
37
37
27
38
37
37
37
27
13
27
13
27
27
13
13
13
13
13
13
13
13
38
35
13
27
27
27
38
27
27
38
28
28
38
SYM_VER-1
SYM_VER-1
G
D
S
SYM_VER-2
SYM_VER-2
VP VGND
TPI#
TPO
TPI
TPO#
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
PORT POWER SWITCH
ENABLES PORT POWER WHEN MACHINE IS RUNNING OR WHEN ASLEEP ON AC
1394a ONLY
CLEAR OUT ALL PLANES UNDER TRANSFORMERS
514-0057
FIREWIRE PORTS
PORT 1
PORT 0
1394a/b
(AREF)
TPA(R)
SC
TPB
VP
VG
TPB(R)
NC
SO WHEN A BILINGUAL DEVICE IS PLUGGED TO A BETA-ONLY DEVICE, THERE’S NO DC PATH BETWEEN THEM
BREF SHOULD BE HARD CONNECTED TO LOGIC GROUND FOR SPEED SIGNALING AND CONNECTION DETECTION CURRENTS
(TO AVOID GROUND OFFSET ISSUE)
ALL LOCAL GROUNDS PER 1394B SPEC
AREF NEEDS TO BE ISOLATED FROM
(TPI0R)
(BILINGUAL)
TPB*
PER 1394B V1.33
TPA*
(BREF)
514S0058
TPA
INT-SHIELD
INT-SHIELD
2
1
R465
1M
5% 1/16W MF 402
CHGND1
2
1
R448
1/16W
402
5% MF
470K
2
1
R461
330K
1/16W
5% MF
402
2
1
C639
16V
0.01UF
20%
CERM
402
2
1
C651
0.01uF
20%
402
CERM
NO STUFF
16V
61
DP6
SOT-363
BAS16TW
21
D24
SMB
B340B
CRITICAL
2
1
R777
470K
5%
1/16W
MF
402
2
1
C650
0.01uF
20% 16V
CERM
402
9
8
7
6
5
4
3
2
15
14
13
12
11
10
1
J20
1394B
F-RT-SM
CRITICAL
4
3 2
1
L76
2012H
90-OHM-300mA
CRITICAL
4
3 2
1
L77
2012H
90-OHM-300mA
CRITICAL
3 2 1
4
8 7 6 5
Q34
CRITICAL
NDS9407
SOI
1
2
R466
FF
1/10W
5%
0
805
1
2
6
Q33
SOT-363
2N7002DW
21
F3
MINISMDC
1.5A-24V
6
2
1
D18
BAV99DW
SOT-363
3
5
4
D22
SOT-363
BAV99DW
3
5
4
D18
BAV99DW
SOT-363
3
21
4
L52
260-OHM-330MA
SM1
3
21
4
L48
260-OHM-330MA
SM1
6
2
1
D22
SOT-363
BAV99DW
1
2
5
6
3
4
10987
J24
1394A
CRITICAL
F-RT-TH
2
1
C666
0.01uF 16V
20%
402
CERM
CHGND1
2
1
C662
0.01uF 20% 16V CERM 402
2
1
C649
805
CERM
50V
20%
0.1uF
2
1
R471
805
FF
1/10W
5%
0
6
2
1
D23
BAV99DW
SOT-363
+3V_PMU
2
1
R447
402
5% MF
100K
1/16W
4 3
DP6
SOT-363
BAS16TW
3
5
4
D23
SOT-363
BAV99DW
52
DP6
BAS16TW
SOT-363
4
5
3
Q33
2N7002DW
SOT-363
2 1
R446
10K
5%
1/16W
MF
402
CHGND1
2
1
C652
20% 16V
CERM
402
0.01uF
NO STUFF
3
5
4
D20
SOT-363
BAV99DW
2
1
L58
FERR-250-OHM
SM
2
1
L51
SM
FERR-250-OHM
6
2
1
D20
SOT-363
BAV99DW
21
R451
1/16W
402
MF
5%
10K
21
L39
400-OHM-EMI
SM-1
2
1
C630
0.1UF
20% 10V
CERM
402
2
1
C638
16V 402
CERM
20%
0.01UF
3
1
D21
1N5227B
SOT23
2
1
C637
0.001UF
20% 50V
CERM
402
2
1
C640
402
CERM
16V
20%
0.01UF
2
1
F1
SM
1.5AMP-33V
2
1
C633
CERM
16V
20%
0.01UF
402
2
1
C644
402
CERM
16V
20%
0.01UF
+PBUS
051-6809
28 44
B
FW_POWER_UP
FW_TPI0P
FW_TPI0N
FW_TPBI0N
FW_TPBI0P
FW_TPO0P
FW_TPO0N
FW_TPAO0N
FW_TPAO0P
+FW_VP0
FW_TPB1N
+3V_FW
FW_TPA1P
FW_TPA1N
FW_TPO1N
FW_TPB1P
FW_TPI1N
FW_TPI1P
FW_TPO1P
FW_VGND1
+3V_FW_ESD
+FW_PWR1
+3V_FW_ESD_ILIM
+FW_PWR_OR
FW_VGND0
FW_TPO0R
+FW_SW
FW_GATE_EN
POWER_UP
DCDC_EN
PMU_POWER_UP_L
AC_IN
AC_IN_FW_CNTL
FW_GATE_EN_RC
+3V_FW_ESD
+FW_VP1
+FW_PBUS
39
39
39
39
33
30
37
37
37
37
39
37
38
37
37
39
37
39
39
39
38
32
32
29
39
27
27
37
37
27
27
37
37
38
27
27
27
27
37
27
37
37
37
38
28
38
27
38
39
38
20
29
26
28
38
38
G
D
S
A
B
Y
A
B
Y
A
B
Y
P86_XCOUT
AVSS
VSS
XIN RESET
VREF
CNVSS
BYTE XOUT
AVCC
P50_WRL_WR
P51_WRH_BHE
P52_RD
P65_CLK1 P66_RXD1 P67_TXD1
P74_TA2OUT_W
P75_TA2IN_W
P60_CTS0_RTS0
P57_RDY_CLKOUT
P56_ALE
P55_HOLD
P54_HLDA
P53_BCLK
P61_CLK0 P62_RXD0 P63_TXD0
P70_TXD2_SDA_TA0OUT
P72_CLK2_TA1OUT_V
P73_CTS2_RTS2_TA1IN_V
P100_AN0
P90_TB0IN_CLK3 P91_TB1IN_SIN3
P92_TB2IN_SOUT3
P93_DA0_TB3IN P94_DA1_TB4IN
P95_ANEX0_CLK4
P96_ANEX1_SOUT4
P97_ADTRG_SIN4
P87_XCIN
P85_NMI
P84_INT2
P83_INT1
P82_INT0
P81_TA4IN_U
P80_TA4OUT_U
P77_TA3IN
P76_TA3OUT
P107_AN7_KI3
P106_AN6_KI2
P105_AN5_KI1
P104_AN4_KI0
P103_AN3
P102_AN2
P101_AN1
P64_CTS1_RTS1_CTS0_CLKS1
P71_RXD2_SCL_TA0IN_TB5IN
VCC
P01_D1
P00_D0
P02_D2 P03_D3 P04_D4 P05_D5 P06_D6 P07_D7
P10_D8
P11_D9 P12_D10 P13_D11
P21_A1_D1_D0
P22_A2_D2_D1
P23_A3_D3_D2
P24_A4_D4_D3
P25_A5_D5_D4
P14_D12
P17_D15_INT5
P15_D13_INT3 P16_D14_INT4
P20_A0_D0
P27_A7_D7_D6
P26_A6_D6_D5
P30_A8_D7
P31_A9 P32_A10 P33_A11 P34_A12 P35_A13 P36_A14 P37_A15
P45_CS1 P46_CS2 P47_CS3
P44_CS0
P43_A19
P40_A16 P41_A17 P42_A18
RSET*
MR*
GND
VCC
V-
V+
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
TABLE_5_ITEM
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_HEAD
QTY
DESCRIPTION
PART#
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
Keep crystal subcircuit close to PMU.
will act as our pulldown since both are off during PMU reset.
to +3V_MAIN or +3V_SLEEP, which
(PMU_AP)
.
KEEP CAP CLOSE TO ALL 3 OR GATES
PMU KEYBOARD RESET CIRCUIT
AIRLINE
0.33-0.99V
Q11 (65W)
ADAPTER IDs
ADAPTER
ID RANGE
A29 (45W)
2.31-2.97V
1.65-2.31V
PIN VOLTAGE
2.558-2.661V
2.007-2.066V
0.589-0.663V
PMU
reset. MLB will have a pull-up
have a pulldown for coming out of
CPU_VCORE_HI_OC/PMU_AP should
NC
(CHARGE_I)
NC
NC
NC
NC
NC
NC
NC
NC
UNDERVOLTAGE RESET CIRCUIT
Y5’S LOAD CAPACITANCE IS 12PF
Y3’S LOAD CAPACITANCE IS 12.5PF
Keep crystal subcircuit close to PMU.
A29 ADAPTER DETECTION
+3V_PMU
+3V_SLEEP
+3V_PMU
2
1
3
Q30
2N7002
SM
4
5
3
2
1
U20
NC7S32
SC70
4
5
3
2
1
U24
SC70
NC7S32
4
5
3
2
1
U25
SC70
NC7S32
2
1
C277
CERM
402
10V
20%
0.1uF
+3V_PMU
21
Y4
8X4.5MM-SM
CRITICAL
10.0000M
+5V_SLEEP
12
R564
402
10K
5% MF
1/16W
+3V_MAIN
12
R575
402
5% MF
1/16W
10K
12
R599
10K
1/16W
MF
5%
402
12
R598
402
5% MF
1/16W
10K
12
R563
402
10K
5% MF
1/16W
12
R576
1/16W
MF
5%
100K
402
12
R562
5%
100K
402
MF
1/16W
21
R561
402
5% MF
1/16W
100K
21
R594
5% MF
1/16W
10K
402
2
1
C731
0.1uF
402
10V
20%
CERM
11 13
6212
96
6014
10
98
99
100
1
2
3
4
5
8
9
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
61
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
87
88
89
90
91
92
93
95
79
80
81
82
83
84
85
86
7
6
94
97
U29
FLAS
M16C62
OMIT
21
R602
5%
4.7
402
MF
1/16W
12
R589
5%
470K
402
MF
1/16W
2
1
C724
402
10V
20%
CERM
0.1uF
2
1
C729
0.1uF
CERM
20% 10V
402
2
1
R249
0
5% 1/16W MF 402
21
R248
10M
5%
402
MF
1/16W
NO STUFF
2
1
C340
12pF
402
5% 50V CERM
2
1
C339
CERM
12pF
5% 50V
402
21
R588
5%
1/16W
MF
1K
402
21
R600
5%
1K
402
MF
1/16W
+3V_PMU
+3V_PMU
12
R261
1/16W
MF
5%
402
100K
+3V_PMU
+3V_PMU
2
1
C255
6.3V
10uF
CERM
20%
805
21
R597
402
2.2K
MF
1/16W
5%
21
R595
402
5%
1/16W
MF
470K
+3V_PMU
21
R582
10K
MF
1/16W
5%
402
21
R560
100K
MF
1/16W
5%
402
1
2
R592
100K
1% 1/16W MF 402
21
R583
MF
1/16W
5%
402
10K
63
RP39
100K
1/16W
5%
SM1
54
RP39
5%
1/16W
100K
SM1
81
RP39
100K
1/16W
5%
SM1
21
R596
2.2K
5%
1/16W
MF
402
+3V_PMU
4
23
1
U26
SOT143
MAX6804
2
1
R267
1K
1/16W MF 402
5%
2
1
C370
CERM
402
10V
20%
0.1uF
12
R591
5%
470K
1/16W
MF
402
21
R580
402
MF
10M
NO STUFF
1/16W
5%
2
1
C728
50V
CERM
5%
402
12pF
2
1
R581
0
1/16W
MF
402
5%
2
1
C406
5%
50V
CERM
402
12pF
12
R586
10K
402
5%
1/16W
MF
72
RP39
100K
1/16W
5%
SM1
72
RP41
SM1
10K
5%
1/16W
12
R587
MF
1/16W
5%
402
1K
2
1
R593
402
MF
1/16W
1%
100K
2
1
R590
402
MF
1/16W
1%
402K
31
42
Y3
SM-2
32.768K
CRITICAL
12
R584
1%
7.15K
1/16W
MF
402
12
R585
1%
7.15K
402
MF
1/16W
54
RP41
1/16W
5%
10K
SM1
81
RP41
SM1
1/16W
5%
10K
63
RP41
1/16W
5%
10K
SM1
2
5
1
3
4
U33
SM
LMC7211
2
1
R348
52.3K
402
MF
1/16W
1%
2
1
R349
127K
1/16W MF 402
1%
21
R345
5%
4.7M
402
MF
1/16W
2
1
R364
100K
402
MF
1/16W
5%
2
1
C467
10V
20%
0.1uF
402
CERM
051-6809
29
44
B
1
341S1008
U29
IC,PMU,V81B
197S0041
Alt. for Siward Part
197S0604
Y4
CLK10M_PMU_XIN
CLK10M_PMU_XOUT_UF
INT_SUSPEND_ACK_L
SYSTEM_CLK_EN
PMU_FROM_INT
CLK32K_PMU_XIN
CLK32K_PMU_XOUT_UF
PMU_OOPS
INT_PEND_PROC_INT
KBD_Y<3>
KBD_X<5>
KBD_COMMAND_L
PMU_PME_L
POWER_VALID
TPAD_RXD
PMU_BATT_DET_L
PMU_SLEEP_LED_L
PMU_LID_CLOSED_L
POWER_VALID
PMU_NMI_L
THERM_L_OC
CLK32K_PMU_XOUT
PMU_BATT1_DET_L_PU
PMU_AC_IN PMU_AC_DET
PMU_BYTE
PMU_CNVSS
INT_SUSPEND_REQ_L
+3V_PMU_RESET
PMU_RESET_L
PMU_KB_RESET_L
CAPSLOCK_LED_L
PMU_CAPSLOCK_LED_L
INT_RESET_L
IO_RESET_L
SLEEP
MAIN_RESET_L
PMU_POWER_UP_L
SOFT_PWR_ON_L
CHARGE_LED_L
NUMLOCK_LED_L
PMU_NUMLOCK_LED_L
AC_IN
+3V_PMU_AVCC
PMU_BYTE
CPU_VCORE_HI_OC
PMU_INT_NMI
INT_PU_RESET_L PMU_CPU_HRESET_L
PMU_TO_INT
PMU_ACK_L PMU_CLK
PMU_REQ_L
PMU_RESET_BUTTON_L PMU_NMI_BUTTON_L
TPAD_RXD TPAD_TXD
CPU_CLK_EN PMU_CHARGE_V PMU_CHRG_BATT_0
CPU_SMI_L
INT_PROC_SLEEP_REQ_L PMU_POWERUP_OK
PMU_I2C_CLK PMU_I2C_DATA PMU_SMB_CLK PMU_SMB_DATA
KBD_Y<1>
KBD_Y<0>
KBD_Y<2>
KBD_Y<4>
KBD_Y<7>
KBD_Y<6>
KBD_Y<5>
PMU_POWER_UP_L
CHARGE_LED_L
COMM_RING_DET_L
SOFT_PWR_ON_L
KBD_X<0>
INT_WATCHDOG_L
KBD_X<2>
KBD_X<1>
KBD_X<4>
KBD_X<3>
KBD_X<7>
KBD_X<6>
KBD_X<8>
IO_RESET_L
KBD_CONTROL_L
KBD_FUNCTION_L
KBD_OPTION_L
KBD_SHIFT_L
KBD_ID
PMU_INT_L
CPU_PLL_STOP_OC
SLEEP
INT_SUSPEND_REQ_L
PMU_OOPS
INT_PU_RESET_L
PMU_LID_CLOSED_L
PMU_I2C_DATA
PMU_I2C_CLK
PMU_PME_L
TPAD_TXD
PMU_NMI_L
PMU_NMI_BUTTON_L
PMU_BATT1_DET_L_PU
PMU_POWERUP_OK
PMU_BATT_DET_L
PMU_EPM
PMU_RESET_BUTTON_L
PMU_SMB_DATA
PMU_SMB_CLK
PMU_KB_RESET_L
PMU_KB_RESET_IN1
SOFT_PWR_ON_L
KBD_CONTROL_L
PMU_KB_RESET_IN2
KBD_SHIFT_L
KBD_OPTION_L
+4_85V_RAW
ADAPTER_DET
PMU_AC_DET
A29_DET_REF
A29_DET_L
A29_DETECT
INT_RESET_L MAIN_RESET_L
PMU_EPM
+3V_PMU_AVCC
KBD_X<9>
PMU_BATT0_DET_L
PMU_CNVSS
CLK10M_PMU_XOUT
39
39
39
29
39
29
39
34
24
39
39
34
39
39
24
29
29
32
19
33
33
29
32
29
33
19
24
39
39
29
26
29
18
32
29
39
30
38
29
32
39
39
29
26
39
39
39
29
29
39
24
39
29
39
39
39
29
18
38
39
39
39 17
29
30
29
29
39
39
13
23
25
17
29
23
29
28
29
33
25
39
29
29
29
30
30
39
39
39
39
39
39
39
29
29
25
23
39
39
39
39
39
39
39
39
23
29
39
29
29
39
25
29
25
29
17
29
30
29
30
30
39
23
29
29
29
38
39
13
17
29
39
8
14
14
29
14
23
23
23 14
29
23
29
23
23
29
29
25
29
29
29
29
8
33
29
23
9
17
23
14
28
22
25
23
26
25
29
7
14
13
6
14
14
14
14
23
29
23
23
8
30
30
5
14
29
29
29
29
29
23
23
23
23
23
23
23
28
25
14
22
23
14
23
23
23
23
23
23
23
17
23
23
23
23
23
14
7
23
8
29
13
23
29
29
14
23
29
29
29
29
29
29
23
29
29
29
22
23
23
23
31
25
29
30
9
14
29
25
23
29
CSIP CSIN
BATT
PGND
DLO
LX
DHI
BST
DLOV
LDO
CELLS
GND
CSSNCSSP
REF
CCS
CCI
CCV
IINP
ICHG
ICTL
VCTL
RFIN
ACOK
ACIN
DCIN
CLS
S2
GATE
S1
S3 D4
D3 D2
D1
S2
GATE
S1
S3 D4
D3 D2
D1
S2
GATE
S1
S3D4
D3 D2
D1
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
V-
V+
GND
OUT
PG
RS-
V+
RS+
NC2
NC1
G
D
S
G
D
S
G
D
S
G
D
S
S
D
G
V-
V+
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
(GND)
Place close to RS-
PROTECTION
DC INRUSH LIMITER
PLACE R383 CLOSE TO LTC1625
GREATER THAN 13.1V DETECT
DC POWER INPUT
(POWER JACK, ETC. ON SEPARATE BOARD)
BATTERY CONNECTOR
(BATT_IN_PD)
+PBUS CURRENT LIMIT
PLACE U24 NEXT TO R382
NC
NC
NC
_62
REFIN
ICTL
For 4.20V cells, VCTL = 0.245 REFIN
For 4.15V cells, VCTL = 0.123 REFIN
CHG
BATT
V = CELLS X (4.096 + (0.4096 * V / V ))
I = (0.2048/R ) * (V / V )
VCTL
REFIN
BATTERY CHARGER
(+3V_PMU)
CHARGE DISABLED BY PMU OR INPUT VOLTAGE <18V
SWITCHER VOLTAGE CONTROL SWITCHER CURRENT CONTROL
CHARGE THROTTLED BY LOW BATTERY VOLTAGE
OD OUTPUT LOW - WHEN AC GREATER THAN 18V
BACKFEED
WHEN AC IS IN, P-CHANNEL FETS ARE QUICKLY (DIODE) TURNED OFF
ROUTE LTC1625_ITH CAREFULLY
WHEN AC IS NOT PLUGGED, P-CHANNEL FETS ARE ON
RC TIME IS 480K*10UF @ +3V_PMU
BATTERY SWITCH-OVER CIRCUIT
PMU SELECTS BETWEEN TWO VOLTAGES
15
13
4
20
23
2
28
14 10
98
22
21
24
1
27 26
19 18
3
16
7
5
6
25
17
12
11
U6
QSOP
MAX1772
CRITICAL
2
1
C41
603
1uF
20% 10V CERM
2
1
R716
5%
47K
402
MF
1/16W
2
1
R717
5%
1/16W
MF
402
10K
3 2 1
4
8 7 6 5
Q6
SOI
SI4435DY
CRITICAL
2
1
F5
5AMP-125V
SM-2
2
1
F4
SM-2
5AMP-125V
2
1
R83
1K
1% 1/16W MF 402
2
1
R56
402
MF
1/16W
1%
1K
+24V_PBUS
21
R725
1206
1/8W
5%
33
FF
+BATT
+3V_PMU
2
1
C36
603
CERM
0.01uF
20% 50V
3 2 1
4
8 7 6 5
Q68
SOI
SI4435DY
1
2
R29
5%
402
MF
1/16W
470K
2
1
R52
1/16W
402
MF
5%
100K
2
1
C11
20% 50V
CERM
805
0.1uF
1
2
R21
402
MF
1/16W
330K
5%
2
1
C801
402
16V
0.01uF
20%
CERM
21
R41
MF
1/16W
5%
1M
402
+3V_PMU
1
2
R51
MF
1%
402
20K
1/16W
2
1
R16
1%
402
1/16W
MF
100K
1
2
R40
MF
1/16W
1%
402
97.6K
1
2
R30
1%
1/16W
MF
57.6K
402
1
2
R42
402
MF
1/16W
1%
10K
3 2 1
4
8 7 6 5
Q69
SI4435DY
SOI
4
5
3
Q9
2N7002DW
SOT-363
2
1
R102
402
1/16W MF
158K
1%
31
D6
1N914
SOT23
2
1
R710
5%
47K
1/16W
MF
402
2
1
R711
1/16W
MF
10K
402
5%
2
1
R720
1
603
MF
1/16W
5%
1
2
6
Q4
2N7002DW
SOT-363
4
5
3
Q4
SOT-363
2N7002DW
2
1
C97
20%
0.1uF
25V 603
CERM
2
1
R59
5%
100K
1/16W
MF
402
2
1
C118
6.3V CERM
805
20%
10uF
1
2
6
Q71
SOT-363
2N7002DW
2
1
R15
402
MF
1/16W
10K
5%
1
2
R22
470K
1/16W MF 402
5%
4
5
3
Q1
SOT-363
2N7002DW
1
2
6
Q1
2N7002DW
SOT-363
1
2
6
Q9
SOT-363
2N7002DW
2
1
R58
10K
1% 1/16W MF 402
4
5
3
Q71
2N7002DW
SOT-363
1
2
6
Q72
2N7002DW
SOT-363
2
1
R741
5%
100K
1/16W
MF
402
4
5
3
Q72
2N7002DW
SOT-363
+3V_PMU
2
1
C96
0.1uF
20%
805
50V
CERM
2
1
R77
CRITICAL
603
0.1% MF
1/16W
2.21K
2 1
R119
1/16W
1%
150
MF
402
2
5
1
3
4
U1
SM
LMC7211
5 2
DP1
BAS16TW
SOT-363
43
DP1
BAS16TW
SOT-363
2
1
C780
4.7uF
20% 25V CERM 1206
2
1
R94
5%
1/16W
MF
402
100K
2
1
C777
4.7uF
CERM
25V
20%
1206
2
1
C792
4.7uF
20%
25V CERM 1206
2
1
C795
4.7uF
CERM
25V
20%
1206
2
1
R53
4.12K
402
MF
1/16W
1%
2
1
R54
10K
1%
1/16W
402
MF
+BATT
21
L6
FERR-50-OHM
SM
21
L4
FERR-EMI-100-OHM
SM
21
L3
FERR-EMI-100-OHM
SM
21
L2
FERR-50-OHM
SM
1
2
L5
SM
FERR-EMI-100-OHM
21
R61
CRITICAL
0.025
2512
MF
1W
1%
+PBUS
8
7
6
5
4
3
2
1
J26
M-RT-SM
CRITICAL
87438-0833
4
3
2
1
J27
CRITICAL
M-RT-SM
87438-0433
321
4
8765
Q64
CRITICAL
IRF7811W
SO-8
+24V_PBUS
2
1
C803
0.1uF
20% 10V
CERM
402
8
21
7
64
3
5
U3
CRITICAL
MAX4172
TSSOP
+24V_PBUS
2
1
R82
5%
1/16W
MF
402
4.7
2
5
1
3
4
U55
LMC7111 SOT23-5
1
2
6
Q74
SOT-363
2N7002DW
4
5
3
Q74
2N7002DW
SOT-363
2
1
C794
402
CERM
10V
20%
0.1uF
2
1
R744
5% 1/16W
402
100K
MF
2
1
R87
5% 1/16W MF 402
4.7
+3V_PMU
2 1
R727
402
MF
1/16W
1%
10K
2
1
R745
0.1%
42.2K
FF 603
1/16W
CRITICAL
2 1
R728
MF
1/16W
402
1%
1K
21
C798
20% 10V
CERM
402
0.1uF
6 1
DP1
BAS16TW
SOT-363
2
1
C809
1uF
603
CERM
10V
20%
2
1
R736
42.2K
FF
0.1%
603
1/16W
CRITICAL
2
1
R742
CRITICAL
51.1K
1/16W 603
0.1% FF
2
1
R738
82.5K
1/16W
CRITICAL
FF
0.1%
603
2
1
R47
6.34K
1%
1/16W
MF
402
2
1
C35
50V
0.1uF
10% X7R
603-1
2
1
D36
MBRS140T3
SM
2
1
C826
603
20%
0.01uF
50V CERM
1
2
6
Q2
SOT-363
2N7002DW
4
5
3
Q2
2N7002DW
SOT-363
3
1
4
Q7
SUD45P03
TO-252
CRITICAL
2
1
C853
1000pF
10% 25V X7R 402
NO STUFF
2
1
C95
1206
CERM
10%
0.47uF
50V
2
1
C116
50V
2.2uF
10% CERM
1812
2
1
C112
50V
2.2uF
10% CERM
1812
2
1
C117
50V
2.2uF
10% CERM
1812
2
1
C113
50V
2.2uF
10% CERM
1812
2
1
C115
50V
2.2uF
10% CERM
1812
2
1
C71
1206
CERM
10%
0.47uF
50V
2
1
C23
603
1uF
CERM
10V
20%
2
1
R57
100K
402
MF
1/16W
1%
2
1
R49
402
MF
1/16W
1%
12.7K
2
1
C67
1uF
20% 50V CERM 1210
21
L70
SM1
10uH
CRITICAL
21
R715
0.05
1% 1W MF
2512
2
1
R713
5%
1/16W
MF
603
1
2
1
C42
402
CERM
16V
20%
0.01uF
2
1
C98
0.1uF
603
20%
CERM
25V
2
1
C99
0.1uF
20% 25V CERM 603
+3V_PMU
2
1
R73
27.4K
402
MF
1/16W
1%
2
1
R74
402
1/16W
1%
4.12K
MF
2
1
R62
10K
1%
1/16W
MF
402
2
1
R733
20K
402
MF
1/16W
1%
2
1
R75
1% 1/16W MF 402
5.23K
2
1
C43
0.01uF
402
CERM
16V
20%
2
1
R731
1%
1/16W
MF
402
1K
321
4
8765
Q70
CRITICAL
SM
IRF7805
2
5
1
3
4
U57
LMC7211
SM
+3V_PMU
2
1
R55
1K
1%
1/16W
MF
402
2
1
R729
402
1%
100K
MF
1/16W
2
1
R730
402
1%
100K
1/16W
MF
2
1
R740
499K
1%
402
MF
1/16W
2
1
R735
100K
1%
402
1/16W MF 2
1
C807
402
CERM
16V
10%
0.047uF
2
1
C799
402
10V
0.1uF
CERM
20%
3
1
D4
SOT23
1N914
2
1
C24
0.1uF
402
CERM
10V
20%
2
1
C790
4.7uF
20% 25V CERM 1206
2
1
C785
4.7uF
20%
25V CERM 1206
2
1
C779
ELEC
25V SM1
20%
33uF
21
XW1
SM
2
1
R96
4.7
1/16W MF
5%
603
2
1
R732
MF
1/16W
5%
402
47K
2
1
R734
MF
5%
68K
1/16W
402
051-6809
30
44
B
1772_CSSP 1772_CSSN
+ADAPTER
1772_ICTL
+BATT_14V_FUSE
BATT_14V_GATE
1V65_REF
AC_DIV
BATT_LOW
1772_REF
BATT_DIV
+BATT_RSNS
PMU_CHARGE_V
BATTV_LOW
BATTV_HIGH
PMU_CHRG_BATT_0
CHARGE_DISABLE
BATT_LOW_L
1772_ICHG
AC_IN_L
1772_CCV_RC
1772_CCV
1772_IINP
1772_LDO
1772_CCS
1772_CCI
PMU_SMB_CLK
PMU_SMB_DATA
BATT_24PBUS_EN
AC_ENABLE_L
AC_IN
AC_IN_L_RC
AC_IN_L
AC_GTR_18V
1772_ACOK_L
IAC_FB
IAC_RC_COMP
BATT_CLK
PMU_BATT_DET_L
BATT_NEG
1772_CLS
BATT_14PBUS_EN
+BATT_POS
BATT_DATA
A29_DETECT
A29_DETECT
A29_CLS_ADJ
+BATT_24V_FUSE
AC_IN
1V20_REF
A29_CURRENT_ADJ
1625_COMP
LTC1625_ITH
ADAPTER_I_REG
1772_VCTL
1772_BST_ESR
1772_DCIN
BATT_24V_GATE
OVER_18V_ADJ
+BATT_24V_FUSE
+BATT_VSNS
1772_BST
1772_DLOV
1772_DHI
1772_LX
MAX4172_OUT
+ADAPTER_SW
1772_ACIN 1772_ACOK_L
+ADAPTER_SENSE
AC_ENABLE_GATE
BKFD_PROT_EN_L
BKFD_PROT_GATE
1772_DLO
1772_GND
1772_CELLS
1772_CSIN
1772_CSIP
30
30
39
29
29
38
28
39
39
39
30
30
38
28
38
38
37
37
31
38
38
29
29
30
38
29
29
26
30
30
39
29
38
38
39
29
29
30
26
31
31
38
30
38
38
38
38
30
38
37
37
V-
V+
G1
S1
D1
G2
D2
S2
VTAP
IN OUT
SENSE
GND
FDBK
ERR
LP2951
SHUT
SHUT
PLUS5VTAP
LP2951
ERR
FDBK
GND
SENSE
OUTIN
BOOST
SW
SGND PGND
TK
VIN
SYNC RUN/SS
VPROG
ITH FCB
INTVCC
TG
VOSENSE
BG
LTC1625
EXTVCC
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
12.8V PBUS SUPPLY
ADAPTER OR BATTERY
NC
12.8V REGULATOR
NC
PMU SUPPLY
3V_PMU_SENSE
WHEN +24V_PBUS IS BELOW ~13.1V, 1625 IS SHUT-OFF
KEEP VIN/TK LOOP SHORT
CONNECT LTC1625 TK PIN AT TOP-SIDE FET
BATTERY
BOOTSTRAP SYSTEM FROMBACKUP
OUTPUT FROM BATTERY
INPUT TO AND OUTPUT FROM BATTERY
PBUS HOLD-UP CAPS
1
2
R127
1
5%
1/16W
MF
603
+PBUS
1
2
R107
4.99K
MF
1/16W
1%
402
321
4
8765
Q17
IRF7805
SM
CRITICAL
+24V_PBUS
3 1
D8
SOT23
1N914
2
1
C804
100uF
SM-1
35V ELEC
20%
2
1
C806
25V
20%
ELEC
SM
220uF
2
1
C134
20% 10V CERM 402
0.1uF
2
1
R108
158K
1% 1/16W MF 402
2
1
R109
16.2K
402
MF
1/16W
1%
2
5
1
3
4
U14
SM
LMC7211
+3V_PMU
2
1
C772
10V 402
CERM
20%
0.1uF
2
1
R690
97.6K
1%
402
MF
1/16W
2
1
R673
1/16W
MF
10K
1%
402
21
R663
1M
402
1% MF
1/16W
1
5
6
Q15
CRITICAL
SC70-6
FDG6324L
4
3 2
6
Q15
FDG6324L
CRITICAL
SC70-6
+5V_MAIN
2
1
R130
MF
470K
1/16W
402
5%
2
1
R122
2.2
5% 1/16W MF 603
2
1
C119
1206
10V CERM
20%
4.7uF
2
1
R120
NO STUFF
0
5% 1/16W MF 402
2
1
R118
0
5% 1/16W MF 402
21
XW3
OMIT
SM
21
D1
MBR0540
SM
21
R39
1210
FF
1/4W
5%
390
+BATT
+PBUS
21
D2
MBR0540
SM
+3V_PMU
2
1
R231
603
1/16W
1
5% MF
2
1
C326
CERM 805
20%
6.3V
10uF
6
3
2
18
4
7
5
U22
SOI-3.3V
21
D10
MBR0520LT
SM
21
D11
MBR0520LT
SM
2
1
C740
CERM
20%
402
10V
0.1uF
+5V_MAIN
2
1
R233
603
1/16W
1
5% MF
2
1
C276
CERM
10%
470pF
50V 603
2
1
R604
1/16W
MF
1%
402
294K
2
1
R605
402
MF
1%
100K
1/16W
2
1
C737
CERM
20% 10V
402
0.1uF
3
2
6
18
4
7
5
U23
SOI
2
1
C244
805
20% 50V CERM
0.1uF
2
1
C138
NO STUFF
10%
402
0.0047uF
CERM
25V
321
4
8765
Q16
SO-8
IRF7811W
CRITICAL
3
2
1
5
4
J16
CRITICAL
SM-2MT
+24V_PBUS
+PBUS
2
1
D32
SM
MBRS140T3
31
D3
SOT23
1N914
3
2
1
L69
SM1
8.0uH-6.8A
CRITICAL
2
1
C753
CERM
10%
2.2uF
50V 1812
2
1
C754
CERM
10%
2.2uF
50V
1812
2
1
C154
CERM
10%
2.2uF
50V
1812
2
1
C155
50V
2.2uF
10%
CERM 1812
2
1
C755
50V
2.2uF
10% CERM
1812
2
1
C153
50V
2.2uF
10% CERM
1812
2
1
C336
10V
2.2uF
20% CERM
805
2
1
C135
805
CERM
20% 25V
0.22uF
2
1
C767
1206
25V
CERM
4.7uF
20%
2
1
C771
CERM
25V
4.7uF
20% 1206
21
D7
SM
MBR0540
8
7
16 15 13
2
14
639
5
11
4
1
12
10
U13
CRITICAL
SSOP
2
1
C131
CERM
5%
25V 603
4700pF
2
1
C124
470pF
603
10% 50V CERM
2
1
C137
0.1uF
20%
CERM
805
50V
2
1
C121
25V
5%
CERM
603
4700pF
051-6809
31 44
B
+4_85V_ESR
+4_85V_RAW
1625_SGND
COMP_RC
1625_TG
1625_VFB
+ADAPTER_OR_BATT
1625_DIV
1625_ENABLE
1625_COMP
1625_RUNSS
1625_VIN
+3V_PMU_ESR
+ADAPTER
+ADAPTER_ILIM
1625_BST
1625_EXTVCC
1625_BST_ESR
1V20_REF
1625_ENABLE_L
1625_FCB
+4_6V_BU
FB_4_85V_BU
1625_BG
3V_PMU_VTAP
1625_VSW
1625_INTVCC
39
38
38
38
38
38
29
38
38
30
38
38
30
38
38
30
32
38
38
SGND PGND
STBYMD
FCB FREQSET
SNS1-
PGOOD
VOSNS2
VOUT
3.3
VCCVCC
EXT INT VIN
TG2
SW2
SNS2-
BG2
SNS2+
BOOST2
ITH2 RUN/
SS2SS1
SNS1+
BG1
SW1
BOOST1
TG1
VOSNS1 ITH1 RUN/
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
6) DVI LEVEL SHIFTERS & PULLUPS & HPD
2) INTREPID - I2C PULLUPS & OSCILLATOR
3) MAP31 - 3V RAIL (IF USING D3COLD)
9) WIRELESS
10) PMU - I2C PULLUPS
1) CPU PLL CONFIG CONTROL
7) BOOT BANGER
8) HARD DRIVE (IF USING 3V LOGIC)
DISTRIBUTE CAPS ALONG TOP EDGE AND FAN CUT-OUT
DISTRIBUTE CAPS ALONG TOP EDGE AND FAN CUT-OUT
5) LVDS DDC PULL-UPS
4) GRAPHIC CHIP SPREAD SPECTRUM CHIP
+3V_SLEEP LOADS
3.3V/5V REGULATOR
NC
5V START TO TURN ON ~12.5MS AFTER DCDC_EN_L 3V START TO TURN ON ~25MS AFTER DCDC_EN_L DIODE WILL ENSURE DCDC_EN_L IS QUICKLY DISCHARGED DURING SHUT-DOWN POWERDOWN DELAY IS AROUND 4MS-15.6MS
DCDC_EN_L
State
DCDC_EN TRUTH TABLE
DCDC_EN
SLEEP
PMU_POWER_UP_L
Shutdown VOLTAGE
+3V_PMU
1
0
0
Run Sleep
0
1
1
+3V_PMU
0
1
0
1 (2.99V)
+3V_PMU
1
0
+5V_SLEEP LOADS
3) OPTICAL DRIVE
4) DVI
5) TRACKPAD
SLEEP LEVEL SHIFTER (3V -> 5V)
2) Headphone amplifier
1) FAN
THIS SIGNAL IS OPEN COLLECTOR TO GND WHEN POWER IS NOT GOOD
3.3V/5V MAIN SUPPLY
220PF IS USED TO QUIET NOISE ON PGOOD ONCE INTERNAL OPEN DRAIN IS DISENGAGED
+4_6V_BU
124
24
1627
1726
6
9
13
14
3
2
151
28
20
118
21
5
7
22
1825
1923
10
U35
SSOP
CRITICAL
LTC3707
2
1
R521
5% 1/16W MF 402
10
2
1
R533
402
470K
1/16W MF
5%
1
2
6
Q44
SOT-363
2N7002DW
2
1
C694
0.01uF
CERM
20% 16V
402
4
5
3
Q44
2N7002DW
SOT-363
21
R534
100K
MF
1/16W
5%
402
21
R538
1/4W
FF
1%
1206
CRITICAL
0.005
+5V_SLEEP
2
1
C709
10V
20% POLY
100uF
SMD-3
2
1
C575
CERM
0.22uF
25V
20%
805
21
C432
CERM
20% 16V
402
0.01uF
+5V_MAIN
4
3 6
5 2 1
Q26
TSOP
SI3443DV
2
1
C710
100uF
POLY
20% 10V
SMD-3
4
3 6
5 2 1
Q27
TSOP
SI3443DV
21
C433
CERM
20% 10V
402
0.1uF
2
1
C429
805
6.3V
20% CERM
10uF
21
R321
5% MF
1/16W
100K
402
21
R322
5%
402
1/16W
MF
100K
2
1
R409
4.7
5%
603
MF
1/16W
2
1
R307
402
MF
5%
1/16W
100K
4
5
3
Q24
SOT-363
2N7002DW
2
1
C410
0.01uF
CERM
20% 16V
402
21
R310
1/16W
402
MF
5%
100K
+5V_MAIN
2
1
R306
402
MF
5%
1/16W
100K
1
2
6
Q24
SOT-363
2N7002DW
+3V_SLEEP
+3V_MAIN
21
C576
50V 402
20%
0.001uF
CERM
4
3 6
5 2 1
Q21
SI3443DV
TSOP
12
C398
5%
50V
CERM
603
2200pF
2
1
C713
SMD-3
10V
20% POLY
100uF
21
R311
402
1/16W
MF
5%
100K
21
R294
5%
402
100K
MF
1/16W
2
1
R408
1/16W
MF
402
113K
1%
2
1
D14
MBR0540
SM
2
1
D13
MBR0540
SM
2
1
R402
4.7
1/16W
603
5% MF
3 1
D27
1N914
SOT23
21
R524
1M
402
5%
1/16W
MF
2
1
C688
402
16V
20% CERM
0.01uF
2
1
C428
805
6.3V
20% CERM
10uF
2
1
R410
21.5K
1% MF
402
1/16W
2
1
C578
5% 25V CERM 402
220pF
2
1
3
Q43
SM
2N7002
2
1
C8
0.1uF
20%
CERM
10V 402
2
1
C114
CERM
20% 10V
402
0.1uF
2
1
C415
0.1uF
402
10V
CERM
20%
2
1
C123
20%
CERM
10V 402
0.1uF
2
1
C554
0.1uF
402
10V
CERM
20%
2
1
C7
20%
CERM
10V 402
0.1uF
2
1
C573
402
5% 50V CERM
180pF
NO STUFF
2
1
C557
0.1uF
402
10V
CERM
20%
2
1
C562
20%
CERM
10V 402
0.1uF
2
1
C629
0.1uF
402
10V
CERM
20%
+5V_MAIN
2
1
C353
402
0.1uF
10V
CERM
20%
2
1
C143
20%
CERM
10V 402
0.1uF
2
1
C628
0.1uF
402
10V
CERM
20%
2
1
C416
20%
CERM
10V 402
0.1uF
2
1
C574
10V CERM
20%
4.7uF
1206
2
1
C126
0.1uF
402
10V
CERM
20%
2
1
C555
0.1uF
20%
CERM
10V 402
2
1
C627
20%
CERM
402
0.1uF
10V
+3V_MAIN
2
1
C563
20%
CERM
10V 402
0.1uF
2
1
C556
0.1uF
402
10V
CERM
20%
4
5
3
Q20
NO STUFF
SOT-363
2N7002DW
1
2
6
Q20
NO STUFF
2N7002DW
SOT-363
+5V_MAIN
2
1
R301
100K
402
5%
1/16W
MF
21
R291
5%
402
100K
1/16W
MF
2
1
R572
100K
5%
1/16W
MF
402
NO STUFF
4
5
3
Q50
SOT-363
2N7002DW
NO STUFF
2
1
R548
MF
1/16W
5%
100K
NO STUFF
402
2
1
R551
NO STUFF
100K
5% 1/16W MF 402
2
1
C566
10V
20%
402
CERM
0.1uF
2
1
R550
5% 1/16W MF 402
470K
NO STUFF
+5V_MAIN
1
2
6
Q50
NO STUFF
SOT-363
2N7002DW
+3V_SLEEP
2
1
D28
SM
MBRS140T3
2
1
D26
MBRS140T3
SM
21
XW32
SM
OMIT
2
1
C577
0.047uF
10% 16V
402
CERM
21
XW31
SM
OMIT
2 1
L61
CRITICAL
IHLP-5050
4.7uH
21
L62
CRITICAL
IHLP-5050
4.7uH
2
1
C840
NO STUFF
0.001uF
20% 50V CERM 402
2
1
C839
0.001uF
402
CERM
50V
20%
NO STUFF
2
1
C703
CASE-D4
6.3V
330uF
20% TANT
CRITICAL
2
1
C685
CASE-D4
6.3V
330uF
20%
TANT
CRITICAL
3 2 1
4
8 7 6 5
Q41
IRF7805
SM
CRITICAL
321
4
8765
Q45
CRITICAL
SM
IRF7805
3 2 1
4
8 7 6 5
Q42
IRF7811W
CRITICAL
SO-8
321
4
8765
Q47
SO-8
CRITICAL
IRF7811W
2
1
C579
50V
2.2uF
10% CERM
1812
2
1
C580
50V
2.2uF
10% CERM
1812
2
1
C581
50V
2.2uF
10% CERM
1812
2
1
C582
50V
2.2uF
10% CERM
1812
2
1
C561
50V
2.2uF
10% CERM
1812
2
1
C560
CERM
10%
2.2uF
50V 1812
2
1
C559
50V
2.2uF
10% CERM
1812
2
1
C564
0.22uF
CERM
20%
805
25V
2
1
C558
50V
2.2uF
10% CERM
1812
2
1
C568
5%
50V
CERM
402
180pF
NO STUFF
2
1
R401
1% 1/16W MF 402
63.4K
2
1
R400
MF
20K
402
1/16W
1%
2
1
C572
0.01uF
CERM
402
16V
20%
2
1
R405
MF
1/16W
5%
0
402
2
1
R406
1/16W
1%
100K
402
MF
2
1
R407
1%
100K
1/16W MF 402
2
1
C569
402
CERM
50V
0.0022uF
10%
2
1
C567
5%
402
CERM
100pF
50V
2
1
R403
402
MF
1/16W
12K
5%
2
1
C571
50V
CERM
0.0022uF
10% 402
2
1
C570
402
5% CERM
100pF
50V
2
1
R404
1%
1/16W
402
MF
15K
+5V_MAIN
2
1
C699
20%
1210
22uF
10V
CERM
2
1
C700
1210
CERM
20% 10V
22uF
2
1
C686
1210
22uF
10V CERM
20%
2
1
C687
10V CERM 1210
20%
22uF
2
1
XW13
SM
2
1
R523
402
MF
10
5% 1/16W
2
1
R539
10
402
5% MF
1/16W
2
1
R537
10
402
MF
1/16W
5%
21
R522
0.005
1206
FF
1%
1/4W
CRITICAL
+24V_PBUS
21
C565
0.001uF
402
50V
20%
CERM
2
1
R411
1M
402
MF
1/16W
5%
2
1
R399
1M
402
MF
1/16W
5%
+5V_MAIN
+3V_MAIN
051-6809
32
44
B
3V_SW 3V_BG
5V_SW 5V_BG
3V_TG
5V_TG
5V_SNSP
5V_VOSNS
3707_SGND
5V_SNSM
5V_RSNS
5V_BOOST_ESR 3V_BOOST_ESR
3V_SNSM
3V_SNSP
3V_VOSNS
3V_RUNSS
5V_BOOST
3707_FCB
3707_FSET
3707_STBY
+3V_SLP_ON
SLEEP_L_LS5_NET
3V_RSNS
3V_BOOST
+5V_HD_SLEEP
3707_INTVCC
+5V_MAIN_AUD
5V_RUNSS
DCDC_EN_L
SLEEP_NET_INV
SLEEP
SLEEP_L_LS5_EN_L
SLEEP
SLEEP_L_LS5
SLEEP_LS5_EN_L
SLEEP_LS5
PMU_POWER_UP_L
SLEEP
DCDC_EN_L
DCDC_EN
+4_6V_BU
3V_5V_OK
SLEEP_NET
SLEEP
5V_HD_PWREN
5V_SLEEP_PWREN
SLEEP_LS5
5V_ITH_RC 3V_ITH_RC
3V_ITH
LTC3707_START_RC
+3V_SLP_OK_L
5V_ITH
3V_SLEEP_PWREN_L
+3V_MAIN_AUD
39
39
39
39
34
34
34
34
34
32
32
33
32
32
29
29
26
29
33
29
38
38
34
25
25
20
29
25
34
28
38
25
38
38 38
37
38
37
38
37
37
34
38
24
38
25
32
23
23
18
32
28
23
32
20
31
34
23
32
25
D0 D1 D2 D3 D4
SKP/SDN
VCC VDD
V+
ILIM
FBS
GNDS A/B
REF
TON CC
BST
DH
LX DL
GND
VGATE
FB
TIME
SYM_VER-2
GND
OE
SEL
B4
B3 A4
A3
A2 B2
Y3
Y4
A1 B1
VCC
Y2
Y1
G
D
S
G
D
S
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
CRITICAL BOM OPTION
TABLE_5_HEAD
PART#
DESCRIPTION
QTY
REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
1.220V->0.990V
1.280V->0.990V
VREF = 2.0V, HENCE VOFFSET = 2.0V*0.85*(Rb / Ra) AND VCORE = VDAC + VOFFSET.
1.200V->0.975V
1.250V->0.975V
(R93&R97 CPU_BTR BOM OPTION SEE BOM TABLE)
(Rb)
ROUTE AS DIFFERENTIAL PAIR
(R93 CPU_BTR BOM OPTION SEE BOM TABLE)
<D2>
(VCORE_SNS)
Connect MAX1717 GND pin 13 to GND at bottom-side FET
OUTPUT VOLTAGE
(VCORE_GNDSNS)
<D3>
<D0>
<D4>
SEL = 1; Y1=B1
SEL = 0; Y1=A1
1
FOR V-STEP:
When A/B_ is low (slow): <=1K-ohm -> 0
When A/B_ is high (fast): D4-D0 read as-is
B
If all pull-ups are >=100K and all
>=100K-ohm -> 1 pull-downs are <=1K, V = V .
A
1.250
1.275
1.150
CLOSEST TO CPU
Lo/Slow <= 1K PU >= 100K PU >= 100K PD <= 1K PD
D<4..0>
1 1 0 0
Hi/Fast
A/B_ =
0 1 1 0
(approx. 7ms delay)
D3
PLACE THIS SHORT AT
1 11
1 110
01
0 1
1
1
1
1
0
0
0
1
1
0
0 1
0
0
0 0
000
0
1
0
1
1
1
1
1
0
1 1
000
0
1 0
1
0
1
1
0 0
0
1
0
D2
0.925
0.950
1.100
1.075
1.050
1.025
1.000
1.125
1.225
1.200
1.175
1.75
1.90
1.85
1.80
1.95
2.00
1.70
1.60
1.55
1.65
V
NO CPU NO CPU
D4=1D4=0
VCORE SUPPLY
Keep trace fat and short!!
VCORE POWER SEQUENCING
DAC
1.45
1.40
1.30
1.35
1 1
0
0
1
0.975
1.50
0
NC (RFU)
D0D1
0
CPU core follows CPU I/O voltage
NOTE: When U15 MUX is removed => NO SW Support,
Keep trace fat and short!!
(Ra)
<D2>
R794,R795,R796&R797 have to be stuffed
(VCORE=1.385V for EVTB)
Keep trace fat and short!!
1.33Ghz
1.50Ghz
<D1>
PLACE C423 CLOSE TO PINS 15 & 13!!
(VCORE_VPLUS)
VGATE PULLUP PROVIDED BY INTREPID
(CPU Vcore value with offset)
Fmax Test Connections
1.33Ghz
1.50Ghz
NOTE: Ra NO STUFFED FOR NO OFFSET CASE
This allows for an offset to the ground sense to adjust the output voltage.
GROUND SENSE VOLTAGE DIVIDER
<D3>
Keep trace fat (40-100 mils) and short!!
<D1><D4>
Note:No stuff R67 to set skip mode of VCore
MAX1717 VID INPUTS ARE 3.3-5V TOLERANT
(value without offset)
2
1
R106
402
MF
1/16W
5%
100K
+5V_MAIN
2
1
R101
5%
1/16W
MF
402
100K
2
3
1
Q8
SM
2N3904
2
3
1
Q5
2N3904
SM
2
1
R99
402
MF
1/16W
5%
10K
21
XW29
SM
21
XW27
SM
+PBUS
2
1
D5
SM
MBR0530
CRITICAL
2
1
C93
20% CERM
10V 603
1uF
+5V_MAIN
2
1
R86
1/16W
20
5% MF
402
2
1
C64
0.1uF
CERM
20%
603
25V
12
157
1
8
3
2
9
23
10 11
13
5
4
14
24
17
18
19
20
21
6
22
16
U7
QSOP
MAX1717
CRITICAL
21
R72
402
1/16W
MF
5%
100
21
XW2
SM
2
1
C70
402
50V
0.001uF
20%
CERM
2
1
R69
402
MF
390K
1/16W
5%
2
1
C84
1uF
20% 10V
603
CERM
2
1
R85
0
MF
1/16W
5%
402
2
1
C80
CERM
220pF
402
25V
5%
2
1
R91
27.4K
1%
1/16W
MF
402
2
1
C94
603
CERM
10V
1uF
20%
2
1
R95
402
MF
1/16W
1%
12.7K
2
1
C66
402
0.01uF
20% 16V
CERM
2
1
R66
402
MF
1/16W
5%
0
CPU_BTR&CPU_BST
2
1
R65
470K
5% 1/16W MF 402
NO STUFF
21
XW28
SM
2
1
R97
402
MF
1/16W
CPU_BST
5%
3K
2
1
R98
1%
158K
402
MF
1/16W
CPU_BTR&CPU_BST
5 2
DP2
SOT-363
BAS16TW
4 3
DP2
SOT-363
BAS16TW
6 1
DP2
SOT-363
BAS16TW
2
1
R67
402
MF
1/16W
1%
178K
2
1
C65
NO STUFF
0.0047uF
402
CERM
25V
10%
2
1
R90
2.2
1210
1/4W
5% MF
NO STUFF
2 1
R71
MF
5%
2.2
1/16W
603
2
1
C12
6.3V 805
CERM
20%
10uF
2
1
C74
20%
CERM
6.3V
10uF
805
2
1
C100
6.3V 805
CERM
20%
10uF
2
1
C16
20%
CERM
805
6.3V
10uF
2
1
C101
6.3V 805
CERM
20%
10uF
2
1
C15
20%
CERM
805
6.3V
10uF
2
1
C6
6.3V 805
CERM
20%
10uF
2
1
C21
20%
CERM
805
6.3V
10uF
2
1
C57
6.3V 805
CERM
20%
10uF
2
1
C90
CERM
6.3V 805
20%
10uF
2
1
C14
20%
CERM
805
6.3V
10uF
2
1
C5
6.3V 805
CERM
20%
10uF
2
1
C3
20%
CERM
805
6.3V
10uF
2
1
C63
6.3V 805
CERM
20%
10uF
2
1
C83
6.3V 805
20%
10uF
CERM
2
1
C13
20%
CERM
805
6.3V
10uF
2
1
C4
6.3V 805
CERM
20%
10uF
2
1
C105
20%
CERM
805
6.3V
10uF
2
1
C106
6.3V CERM
20%
10uF
805
2
1
C76
CERM
6.3V 805
20%
10uF
3
2
1
7
8
9
10
11
6
5
4
12
J7
NO STUFF
M-ST-SM-52465-1217
21
R706
NO STUFF
2.05K
1%
1/16W
MF
402
21
R708
NO STUFF
MF
1%
100
402
1/16W
2
1
C79
0.0022uF
10% 50V CERM 603
NO STUFF
2
1
D33
CRITICAL
SM
B540C
2
1
C130
0.1uF
402
20% CERM
10V
+3V_MAIN
12
9
7
4
16
1
13
14
10
11
6
5
3
2
8
15
U15
PI3B3257
QSOP
NO STUFF
2
1
R676
10K
5% 1/16W MF 402
NO STUFF
2
1
R121
402
NO STUFF
MF
1K
1/16W
5%
2
1
R662
1/16W MF 402
5%
0
CPU_BTR
2
1
R631
1/16W MF 402
5%
0
NO STUFF
2
1
R137
MF 402
1/16W
5%
470K
NO STUFF
2
1
R672
NO STUFF
5% 1/16W
402
MF
0
2
1
R660
0
5% 1/16W MF 402
CPU_BST
2
1
R634
1/16W
5% MF
402
470K
CPU_BTR&CPU_BST
2
1
R139
MF
1/16W 402
5%
470K
CPU_BTR&CPU_BST
2
1
R126
470K
402
1/16W
5% MF
NO STUFF
2
1
R671
1/16W MF 402
470K
5%
NO STUFF
2
1
R635
NO STUFF
1/16W
5%
0
402
MF
2
1
R135
402
NO STUFF
1/16W MF
470K
5%
2
1
R125
1/16W
NO STUFF
402
MF
5%
470K
2
1
R647
5% MF
470K
NO STUFF
1/16W 402
2
1
R129
5% 1/16W MF 402
470K
NO STUFF
21
R675
1/16W
402
0
5% MF
2
1
R123
MF
0
5%
NO STUFF
402
1/16W
+3V_MAIN
21
R81
1/16W
5%
0
MF
402
21
R80
NO STUFF
0
5%
1/16W
MF
402
2
1
C77
TANT
20% 16V
CASE-D
10uF
CRITICAL
OMIT
2
1
C52
16V
TANT
CASE-D
20%
10uF
CRITICAL
OMIT
2
1
C92
10uF
16V
20%
CASE-D
TANT
CRITICAL
OMIT
2
1
C111
CASE-D
20%
10uF
16V
CRITICAL
TANT
OMIT
2
1
C51
10uF
CASE-D
TANT
20% 16V
CRITICAL
OMIT
2
1
C78
CRITICAL
10uF
16V
TANT
CASE-D
OMIT
20%
2
1
C91
OMIT
TANT
CASE-D
16V
20%
CRITICAL
10uF
2
1
R757
5% 1/16W
402
MF
470K
CPU_BTR&CPU_BST
C797
CASE-D2E
POLY
2.5V-ESR9V
20%
330uF
CRITICAL
C774
20%
330uF
2.5V-ESR9V POLY CASE-D2E
CRITICAL
3
2
1
L71
1.2uH-18.3A
SM1
CRITICAL
R743
1%
0.001
1W MF
2512
321
4
5
Q62
CRITICAL
SI7860DP
SO-8-PWRPK
321
4
5
Q65
CRITICAL
SI7860DP
SO-8-PWRPK
321
4
8765
Q60
IRF7832
CRITICAL
SO-8
321
4
8765
Q63
CRITICAL
SO-8
IRF7832
321
4
8765
Q66
IRF7832
SO-8
CRITICAL
2
1
C843
CERM
50V 402
20%
0.001uF
2
1
C842
CERM
50V 402
20%
0.001uF
2
1
C841
0.001uF
20%
CERM
402
50V
2
1
R93
1/16W
CPU_BST
MF 402
3K
5%
2
1
R790
100K
402
1/16W
5% MF
+3V_MAIN
21
R791
5%
1/16W
0
MF
402
21
R792
402
5% MF
NO STUFF
0
1/16W
21
R794
402
MF
1/16W
5%
0
21
R796
0
5%
1/16W
MF
402
21
R795
402
MF
1/16W
5%
0
21
R797
MF
1/16W
5%
0
402
1
2
6
Q82
SOT-363
2N7002DW
4
5
3
Q82
2N7002DW
SOT-363
C802
20%
2.5V-ESR9V
330uF
POLY CASE-D2E
CRITICAL
C788
330uF
20%
2.5V-ESR9V POLY
CASE-D2E
CRITICAL
C781
CRITICAL
330uF
2.5V-ESR9V POLY
CASE-D2E
20%
C793
330uF
20%
2.5V-ESR9V POLY
CASE-D2E
CRITICAL
2
1
R111
402
MF
1% 1/16W
100K
126S0036
7
CRITICAL
C51,C52,C77,C78,C91,C92,C111
CAP,AL,POLY,8.2uF,20%,16V,V CASE,SMD
?1
CPU_BTR
R97
114S2003
RES,MF,1/16W,2K OHM,1%,0402,SMD
CPU_BTR
1 ?
R93
114S5903
RES,MF,1/16W,5.9K OHM,1%,0402,SMD
051-6809
33 44
B
VCORE_FAST<2>
VCORE_SLOW<1>
VCORE_FAST<3>
VCORE_FAST<1>
VCORE_VID<0>
VCORE_GNDA
VCORE_SHDN_L
VCORE_VID<4>
VCORE_REF
VCORE_VCC
VCORE_SLOW<4>
SLEEP_L_LS5
VCORE_MUX_SEL
VCORE_AB_SEL
VCORE_GNDDIV
VCORE_CC
VCORE_VID<1>
VCORE_LX
VCORE_DH
VCORE_GND
VCORE_FB
VCORE_VGATE
CPU_VCORE_SLEEP
VCORE_VID<2>
VCORE_VSENSE
CPU_VCORE_SLEEP
VCORE_VID<2>
VCORE_FAST<4>
VCORE_VID<4>
VCORE_VID<3>
VCORE_FAST<1>
VCORE_VID<1>
VCORE_VID<4>
VCORE_VID<3>
VCORE_GNDSNS
VCORE_GNDDIV
SOFT_PWR_ON_L
+3V_PMU_RESET
VCORE_D3 VCORE_D4
VCORE_D2
VCORE_D1
VCORE_D0
CPU_VCORE_HI_OC
CPU_VCORE_SNUB
VCORE_BOOST
DCDC_EN
CPU_VCORE_SEQ_L
CPU_VCORE_HI_OC
CPU_VCORE_SEQ
MAXBUS_SLEEP
VCORE_TIME
VCORE_AB_SEL
VCORE_FAST<2>
VCORE_VID<1>
INT_GPIO1_PU
VCORE_MUX_EN
VCORE_AB_SEL_INV
VCORE_DL
VCORE_BST
VCORE_TON
VCORE_ILIM
VCORE_VID<2> VCORE_VID<3>
VCORE_AB_SEL_OPT
VCORE_OFFSET_DIV
VCORE_SNS
VCORE_SLOW<2>
VCORE_FAST<4>
VCORE_FAST<3>
VCORE_SLOW<3>
VCORE_GNDSNS
38 16
34
39
39
15
32
38
38
39
8
26
33
33
29
33
32
33
7
20
38
39
38
6
6
38
38
23
39
29
28
29
6
38
33
33
38
5
33
38
38
18
33
33
38
33
38
38
38
38
14
5
33
5
33
33 33
33
33 33
33
33
33
33
22
29
7
38
20
7
5
38
33
33
33
14
38
38
38
33
33
38
33
33
33
AGND
THRML
NC_28
NC_23
NC_15
BST2
OUT1
TON
PGOOD REF
DL1
LX1
DH1
VCC
BST1
ON2
ON1
ILIM2
ILIM1
OUT2
SKIP
DL2
LX2
PGND
DH2
VDD
V+
FB1
FB2
PVINSVIN
SHDN/RT SYNC/MODE
SW VFB ITH
PGOOD
PGND SGND
G
D
S
G
D
S
G
D
S
G
D
S
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
M11 Power Shut down Sequencing
1.5V/2.5V SWITCHER
POWER DOWN DELAY 1.5MS TO 3.5MS
DIODE PROVIDE PROVIDE QUICK SHUT-DOWN
+1_5V_MAIN LOADS
. .
1.8V SWITCHER
4) DDR MUXES
2) MAXBUS I/O - IF 1.5V INTERFACE
(PULSE MODE)
(BURST MODE)
1) MPC7447 - MAXBUS I/O - IF 1.8V INTERFACE
1) AGP I/O - IF USING D3COLD
1) INTREPID CORE
NC NC NC
+2_5V_MAIN LOADS
2) CPU JTAG & MaxBus Pull-ups
+1_8V_SLEEP LOADS
3) DDR SODIMMS - CORE/IO
+1_5V_SLEEP LOADS
1) INTREPID PLLS
+2_5V_SLEEP LOADS
1) FBCORE/FBIO IF USING D3COLD
2) GIGABIT ETHERNET - AVDDL
3) CPU PLL Config Straps
1.5V/1.8V/2.5V SUPPLIES
1) MAP31 - FBCORE/FBIO IF USING D3HOT
+1_8V_MAIN LOADS
NC
MAX1715_GND
21
L63
SM1
2.2uH
CRITICAL
+2_5V_MAIN
2
1
C298
10V CERM
20%
1uF
603
2 1
R177
MF
5%
1/16W
402
20
+1_8V_SLEEP
+1_8V_MAIN
2
1
C719
10uF
805
6.3V CERM
20%
21
R566
100K
5% MF
402
1/16W
4
3 6
5 2 1
U50
SI3447DV
TSOP
2
1
C715
6.3V
20%
CERM
10uF
805
21
C716
1000pF
10% 25V X7R 402
21
R557
100K
5%
1/16W
402
MF
+2_5V_MAIN
+2_5V_SLEEP
2
1
C693
10pF
5%
50V
CERM
402
2021
4
5
29
69
7
22
141
11
10
28
23
15
1627
12
3
132
1924
1726
1825
8
U19
CRITICAL
MAX1715
QSOP
21
L67
4.7uH
CRITICAL
SM4
3 2 1
4
8 7 6 5
Q56
CRITICAL
SM
IRF7805
321
4
8765
Q55
IRF7805
SM
CRITICAL
2
1
R211
MF 402
1%
158K
1/16W
2
1
R210
1% MF
402
1/16W
158K
5 2
DP3
SOT-363
BAS16TW
21
R171
4.7
5%
1/16W
MF
603
21
R170
603
1/16W
MF
4.7
5%
2
1
C196
25V 603
CERM
20%
0.1uF
2
1
D31
MBRS130LT3
SM
2
1
R212
5.11K
1% 1/16W MF 402
2
1
R222
1/16W MF 402
10K
1%
+1_5V_MAIN
+5V_MAIN
4 3
DP3
BAS16TW
SOT-363
2
1
C193
CERM
25V
20%
0.1uF
603
2
1
C307
6.3V SMD-1
20% TANT
150uF
21
L65
SM4
4.7uH
CRITICAL
2
1
R220
5%
402
0
1/16W
MF
2
1
R226
NO STUFF
402
MF
1/16W
5%
0
+PBUS
+PBUS
+PBUS
2
1
C267
TANT
150uF
SMD-1
20%
6.3V
2
1
C393
SMD-1
20%
6.3V TANT
150uF
2
1
C405
TANT
150uF
6.3V
20% SMD-1
2
1
C396
150uF
SMD-1
20%
6.3V TANT
2
1
C338
1206
20% 25V CERM
4.7uF
CRITICAL
2
1
C355
1206
CERM
25V
20%
CRITICAL
4.7uF
2
1
C209
1206
CERM
25V
20%
CRITICAL
4.7uF
2
1
C232
1206
CERM
25V
20%
CRITICAL
4.7uF
2
1
R227
1/16W
NO STUFF
0
5%
402
MF
2
1
R221
NO STUFF
0
1/16W
MF
402
5%
2
1
D30
MBRS130LT3
SM
2
1
C697
10V 1210
CERM
22uF
20%
2
1
R525
1/16W
1M
402
MF
5%
2
1
R526
NO STUFF
402
MF
1/16W
5%
10K
2
1
R536
NO STUFF
402
MF
1/16W
5%
10K
2
1
R532
402
MF
1/16W
1%
16.2K
2
1
C691
1000pF
5% CERM
603
25V
9
2
4
7
1
3
6
8
5
10
U46
LTC3411
CRITICAL
MSOP
21
XW17
OMIT
SM
21
XW25
SM
OMIT
+1_5V_SLEEP
+1_5V_MAIN
2
1
C717
CERM
805
10uF
20%
6.3V
2
1
C725
20%
10uF
805
CERM
6.3V
2
1
C738
10uF
805
CERM
6.3V
20%
2
1
C194
2.2uF
805
20% 10V CERM
2
1
C195
2.2uF
CERM
10V
20%
805
6 1
DP3
SOT-363
BAS16TW
21
R184
330K
402
MF
1/16W
5%
2
1
C133
402
20% 16V CERM
0.01uF
4
36
5
2
1
Q53
SI3446DV
TSOP
2
1
3
Q10
2N7002
SM
2
1
R117
402
MF
1/16W
5%
100K
321
4
8765
Q54
CRITICAL
IRF7811W
SO-8
3 2 1
4
8 7 6 5
Q57
SO-8
IRF7811W
CRITICAL
2
1
3
Q31
SM
2N7002
2 1
R535
MF
1/16W
1%
324K
402
2
1
R398
5%
1M
402
MF
1/16W
+2_5V_SLEEP
+1_8V_SLEEP
+1_5V_SLEEP
+3V_SLEEP
61
DP4
BAS16TW
SOT-363
52
DP4
SOT-363
BAS16TW
43
DP4
SOT-363
BAS16TW
2 1
C722
402
25V X7R
10%
1000pF
1
2
6
Q11
2N7002DW
SOT-363
4
5
3
Q11
2N7002DW
SOT-363
2
1
R115
402
MF
5%
1/16W
100K
+5V_MAIN
2
1
R116
402
MF
5%
1/16W
100K
21
R114
100K
5% MF
1/16W
402
2
1
C129
1000pF
402
X7R
25V
10%
2
1
C718
10% 25V X7R 402
1000pF
2
1
C720
10%
NO STUFF
25V 402
X7R
1000pF
21
R571
NO STUFF
100K
5%
1/16W
MF
402
2
1
C714
1000pF
10% 25V X7R 402
NO STUFF
21
R554
402
NO STUFF
100K
5%
1/16W
MF
21
XW21
SM
21
XW8
SM
21
XW10
SM
21
XW23
SM
2
1
C845
NO STUFF
CERM
50V
20%
0.001uF
402
2
1
C844
402
NO STUFF
0.001uF
20% 50V
CERM
7632
4
851
U48
SI6467BDQ
TSSOP
2
1
R468
402
15.4K
MF
1% 1/16W
2
1
R601
10K
1% 1/16W MF 402
+1_5V_MAIN
+2_5V_MAIN
2
1
C695
10uF
805
6.3V
20%
CERM
2
1
R529
887K
1%
1/16W
MF
402
2
1
R528
1%
1/16W
MF
402
698K
21
R531
402
MF
1/16W
5%
10
2
1
C690
20%
CERM
10V
1uF
603
2
1
R527
1/16W
1M
402
MF
5%
+1_8V_MAIN
+3V_MAIN
B
4434
051-6809
MAX1715_GND
2_5V_FB
2_5V_DL
2_5V_LX
2_5V_DH
MAX1715_SKIP
1_5V_LX
1_5V_DL
MAX1715_TON
2_5V_BST
1_5V_ILIM
1_5V_SLEEP_EN_L
1_5V_BOOST
SLEEP_L_LS5
+1_5V_SLEEP_NECK
+1_8V_SLEEP_NECK
+3V_SLEEP_NECK
1_5V_FB
1_8V_SLEEP_PWREN_L
SLEEP_L_LS5_INV
SLEEP_L_LS5_NET
SLEEP_L_LS5_INV
1_5V_SLEEP_EN_L
LTC3411_VCC
LTC3411_GND
1_8V_VFB
LTC3411_ITH_RC
MAX1715_ON_RC
SLEEP
MAX1715_VCC
LTC3411_ITH
1_5V_BST
MAX1715_GND
2_5V_ILIM
1_8V_SW
MAX1715_REF
1_5V_FB
1_5V_DH
LTC3411_SYNC
LTC3411_SHDNLTC3411_EN_L
LTC3411_VCC
3V_5V_OK
SLEEP_L_LS5_INV
SLEEP
2_5V_SLEEP_PWREN_L
DCDC_EN_L
3V_5V_OK
2_5V_BOOST
39
39
33
34
34
32
32
32
26
29
29
38
20
38
38
25
38
38
38
34
25
34
34
38
38
38
38
38
38
38
38
38
34
38
18
38
38
38
34
34
32
34
34
34
38
38
38
23
38
38
38
34
38
38
38
34
38
38
38
34
32
34
23
32
32
38
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
(200)
(200)
(200)
(200)
OSC
(200)
M10
&
(200)
(200)
(200)
(200)
(200)
(200)
GROUP 2
GROUP 3
GROUP 0
GROUP 1
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
GOAL: MINIMIZE
PRIMARY LAYERS: 4,7
EXPOSED ROUTES MINIMIZE VIAS
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
FIREWIRE
GROUP
SIG_NAME
MATCHED_DELAY
CLOCK LINE CONSTRAINTS
MAX VIAS
MAX EXPOSED LENGTH
STUB_LENGTH
NET_SPACING_TYPE
PULSE PARAM
SIGNAL CONSTRAINTS - PAGE 1
PULSE_PARAM
NO_TEST
NET_SPACING_TYPE
STUB_LENGTH
MAX_EXPOSED_LENGTH
MAX_VIASSIG_NAME
GROUP
DIGITAL SIGNALS
RAM
DDR
CONTROL
ETHERNET
SOUND
GROUP 4
GROUP 5
GROUP 6
GROUP 7
GOAL: MINIMIZE EXPOSURE ON LONG NETS
PRIORITY: 1 PRIMARY LAYERS: 4,7 SECONDARY LAYERS: 2,9
PRIORITY: 2
STUB_LENGTH OF 200 MILS NEEDED WHEN WE CONVERT TO 14.2
(200) (200) (200) (200) (200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200) (200) (200) (200) (200) (200) (200) (200) (200)
(200) (200) (200) (200) (200)
(200) (200)
(200) (200)
(200)
(200) (200) (200) (200) (200) (200) (200) (200)
(200)
(200) (200) (200) (200) (200) (200) (200) (200)
(200) (200) (200) (200) (200) (200)
(200)
(200)
ADDR
CLOCKS
INTREPID
SECONDARY LAYERS: 2,9
CRYSTALS
I256 I257
I258
I259
I260
I261 I262 I263 I264 I265 I266 I267 I268 I269
I270 I271 I272
I273
I274
I275
I276
I277
I278
I279 I280
4435
051-6809
B
125.0 MHz:::L:S::300 MIL
CLKENET_LINK_GTX
125.0 MHz:::
10 MIL SPACING
600.0000
L:S:8000 MIL:9000 MIL
6
CLKENET_PHY_GTX
25.00 MHz:::
L:S:8000 MIL:9000 MIL
500.0000
10 MIL SPACING
6
CLKENET_LINK_TX
25.00 MHz:::L:S::300 MIL
CLKENET_PHY_TX
125.0 MHz:::L:S::300 MIL
CLKENET_PHY_RX
125.0 MHz:::
500.0000
10 MIL SPACINGL:S:8000 MIL:9000 MIL
6
CLKENET_LINK_GBE_REF
49.15 MHz:::L:S::300 MIL
CLKFW_PHY_PCLK
10 MIL SPACING
L:S::200 MIL
5
ATI_SSCLK_UF
L:S::150 MIL 66.00 MHz:::
10 MIL SPACING
INT_AGP_FB_OUT
L:S:1800 MIL:1900 MIL 10 MIL SPACING
66.00 MHz:::
400.0000
6
CLK66M_GPU_AGP
SYSCLK_DDRCLK_A0_UF:G:L:S:0 MIL:25 MIL
167.0 MHz:::
L:S:300 MIL:350 MIL
10 MIL SPACING
DDRCLK_A0_UF
4
SYSCLK_DDRCLK_A0_L_UF
DDRCLK_B0_UF
167.0 MHz:::
SYSCLK_DDRCLK_B0_UF:G:L:S:0 MIL:25 MIL
167.0 MHz:::
L:S:300 MIL:350 MIL
10 MIL SPACING
4
SYSCLK_DDRCLK_B0_L_UF
L:S:2004:2412
167 MHZ
500
7
167.0 MHz:::
L:S:2004 MIL:2412 MIL
500.0000
7
RAM_DQS_B<1>
167.0 MHz:::
L:S:1344 MIL:1660 MIL
500.0000
7
MEM_DQM<1>
167.0 MHz:::
L:S:1435 MIL:1500 MIL
500.0000
7
MEM_DQM<2>
167.0 MHz:::
L:S:1233 MIL:1485 MIL
500.0000
7
MEM_DQM<3>
167.0 MHz:::
L:S:1719 MIL:1893 MIL
500.0000
7
MEM_DQM<5>
167.0 MHz:::
L:S:2101 MIL:2170 MIL
500.0000
7
MEM_DQM<6>
167.0 MHz:::
L:S:1903 MIL:2000 MIL
500.0000
7
MEM_DQM<7>
167.0 MHz:::
L:S:1602 MIL:1700 MIL
500.0000
7
MEM_DQS<0>
167.0 MHz:::
L:S:1344 MIL:1660 MIL
500.0000
7
MEM_DQS<1>
167.0 MHz:::
L:S:1233 MIL:1485 MIL
500.0000
7
MEM_DQS<3>
167.0 MHz:::
L:S:2101 MIL:2170 MIL
500.0000
7
MEM_DQS<6>
167.0 MHz:::
L:S:1903 MIL:2000 MIL
500.0000
7
MEM_DQS<7>
167.0 MHz:::
L:S:1907 MIL:2356 MIL
7
RAM_DATA_B<26>
167.0 MHz:::
L:S:1903 MIL:2000 MIL
500.0000
7
RAM_DQM_A<0>
167.0 MHz:::
L:S:1905 MIL:2000 MIL
500.0000
7
RAM_DQM_A<1>
167.0 MHz:::
L:S:1707 MIL:1800 MIL
500.0000
7
RAM_DQM_A<2>
167.0 MHz:::
L:S:1700 MIL:2165 MIL
500.0000
7
RAM_DQM_A<3>
167.0 MHz:::
L:S:1205 MIL:1387 MIL
500.0000
7
RAM_DQM_A<4>
167.0 MHz:::
L:S:1204 MIL:1357 MIL
500.0000
7
RAM_DQM_A<6>
167.0 MHz:::
L:S:1611 MIL:1696 MIL
500.0000
7
RAM_DQM_A<7>
L:S:2000 MIL:2100 MIL
167.0 MHz:::
500.0000
7
RAM_DQM_B<0>
L:S:2004 MIL:2412 MIL
167.0 MHz:::
500.0000
7
RAM_DQM_B<1>
167.0 MHz:::
L:S:1900 MIL:2000 MIL
500.0000
7
RAM_DQM_B<2>
167.0 MHz:::
L:S:1907 MIL:2356 MIL
500.0000
7
RAM_DQM_B<3>
167.0 MHz:::
L:S:1404 MIL:1686 MIL
500.0000
7
RAM_DQM_B<4>
167.0 MHz:::
L:S:1716 MIL:2102 MIL
500.0000
7
RAM_DQM_B<5>
167.0 MHz:::
L:S:1707 MIL:1800 MIL
500.0000
7
RAM_DQS_A<2>
167.0 MHz:::
L:S:1700 MIL:2165 MIL
500.0000
7
RAM_DQS_A<3>
167.0 MHz:::
L:S:1205 MIL:1387 MIL
500.0000
7
RAM_DQS_A<4>
167.0 MHz:::
L:S:1607 MIL:1898 MIL
500.0000
7
RAM_DQS_A<5>
167.0 MHz:::
L:S:1611 MIL:1696 MIL
500.0000
7
RAM_DQS_A<7>
L:S:2000 MIL:2100 MIL
167.0 MHz:::
500.0000
7
RAM_DQS_B<0>
167.0 MHz:::
L:S:1900 MIL:2000 MIL
500.0000
7
RAM_DQS_B<2>
167.0 MHz:::
L:S:1907 MIL:2356 MIL
500.0000
7
RAM_DQS_B<3>
167.0 MHz:::
L:S:1716 MIL:2102 MIL
500.0000
7
RAM_DQS_B<5>
167.0 MHz:::
L:S:1400 MIL:1546 MIL
500.0000
7
RAM_DQS_B<6>
SYSCLK_DDRCLK_B0_UF:G:L:S:0 MIL:25 MIL
167.0 MHz:::
L:S:300 MIL:350 MIL
10 MIL SPACING
DDRCLK_B0_UF
4
SYSCLK_DDRCLK_B0_UF
SYSCLK_DDRCLK_B0:G:L:S:0 MIL:25 MIL
167.0 MHz:::
L:S:3100 MIL:3200 MIL
250.0000
10 MIL SPACING
DDRCLK_B0
7
SYSCLK_DDRCLK_B0_L
L:S:300 MIL:350 MIL SYSCLK_DDRCLK_A1_UF:G:L:S:0 MIL:25 MIL
167.0 MHz:::
4
DDRCLK_A1_UF
10 MIL SPACING
SYSCLK_DDRCLK_A1_UF
SYSCLK_DDRCLK_A1_UF:G:L:S:0 MIL:25 MIL
167.0 MHz:::
L:S:300 MIL:350 MIL
10 MIL SPACING
DDRCLK_A1_UF
4
SYSCLK_DDRCLK_A1_L_UF
SYSCLK_DDRCLK_A1:G:L:S:0 MIL:25 MIL
167.0 MHz:::
L:S:2900 MIL:3000 MIL
250.0000
10 MIL SPACING
DDRCLK_A1
7
SYSCLK_DDRCLK_A1_L
L:S:300 MIL:350 MIL SYSCLK_DDRCLK_A0_UF:G:L:S:0 MIL:25 MIL
167.0 MHz:::
10 MIL SPACING
DDRCLK_A0_UF
4
SYSCLK_DDRCLK_A0_UF
167.0 MHz:::L:S::150 MIL
10 MIL SPACING
SYSCLK_CPU_UF
167.0 MHz:::
L:S:2650 MIL:2750 MIL
250.0000
10 MIL SPACING
5
SYSCLK_CPU
L:S:2000 MIL:4100 MIL
7
RAM_RAS_L
L:S:2000 MIL:4100 MIL
7
RAM_CAS_L
L:S::500 MIL
4
MEM_WE_L
L:S::500 MIL
4
MEM_RAS_L
L:S::500 MIL
4
MEM_CAS_L
49.92 MHz:::L:S::400 MIL
10 MIL SPACING
INT_REF_CLK_OUT_UF
167.0 MHz:::
L:S:700 MIL:850 MIL
250.0000
10 MIL SPACING
5
INT_CPUFB_OUT_SHORT
167.0 MHz:::
L:S:500 MIL:600 MIL
250.0000
10 MIL SPACING
5
INT_CPUFB_OUT_NORM
167.0 MHz:::
L:S:1050 MIL:1150 MIL
250.0000
10 MIL SPACING
5
INT_CPUFB_LONG
167.0 MHz:::
L:S:500 MIL:600 MIL
250.0000
10 MIL SPACING
5
167.0 MHz:::
L:S:700 MIL:800 MIL
250.0000
10 MIL SPACING
5
INT_CPUFB_IN
98.03 MHz:::L:S::500 MIL
10 MIL SPACING
FW_XI
98.03 MHz:::L:S::300 MIL
10 MIL SPACING
FW_OSC
49.15 MHz:::
L:S:7500 MIL:8000 MIL
500.0000
10 MIL SPACING
5
CLKFW_PHY_LCLK
49.15 MHz:::
500.0000
10 MIL SPACING
5
L:S:7500 MIL:8000 MIL
CLKFW_LINK_PCLK
49.15 MHz:::L:S::300 MIL
CLKFW_LINK_LCLK
125.0 MHz:::L:S::300 MIL
CLKENET_PHY_GBE_REF
L:S:1716:2102
500
167 MHZ
7
RAM_DATA_B<47..40>
L:S:2101:2170
500
167 MHZ
7
MEM_DATA<55..48>
L:S:2500:3200
7
RAM_CKE<3..0>
167 MHZ
L:S:1719:1893
500
7
MEM_DATA<47..40>
L:S:1915:2000
500
167 MHZ
7
MEM_DATA<39..32>
L:S:1204:1357
500
167 MHZ
7
RAM_DATA_A<55..48>
L:S:1404:1686
500
167 MHZ
7
RAM_DATA_B<39..32>
L:S::500
4
MEM_CS_L<3..0>
L:S::500
4
MEM_BA<1..0>
L:S:1903:2000
500
167 MHZ
7
MEM_DATA<63..56>
L:S:1903:2000
500
167 MHZ
7
RAM_DATA_A<7..0>
L:S:1344:1660
500
167 MHZ
7
MEM_DATA<15..8>
L:S:1905:2000
167 MHZ
500
7
L:S:1435:1500
167 MHZ
500
7
MEM_DATA<23..16>
L:S:1900:2000
167 MHZ
500
7
RAM_DATA_B<23..16>
L:S:1907:2356
167 MHZ
500
7
RAM_DATA_B<25..24>
L:S:1907:2356
500
167 MHZ
7
RAM_DATA_B<31..27>
L:S:1700:2165
500
167 MHZ
7
RAM_DATA_A<31..24>
167.0 MHz:::L:S::150 MIL
250.0000
10 MIL SPACING
5
INT_CPUFB_OUT
L:S:1602:1700
167 MHZ
500
7
MEM_DATA<7..0>
L:S:1905 MIL:2000 MIL
167.0 MHz:::
500.0000
7
RAM_DQS_A<1>
L:S::400 MIL
10 MIL SPACING
5
L:S:1250 MIL:1350 MIL 10 MIL SPACING
CLK18M_INT_XOUT
L:S::400 MIL
10 MIL SPACING
CLK18M_INT_EXT
L:S:1233:1485
500
167 MHZ
7
MEM_DATA<31..24>
10 MIL SPACINGL:S:1400 MIL:1500 MIL
CLK18M_INT_XIN
L:S::1800 MIL
500.0000
10 MIL SPACING
5
ATI_SSCLK_IN
L:S::400 MIL
5
10 MIL SPACING
ATI_CLK27M_OSC
L:S::200 MIL
5
10 MIL SPACING
ATI_CLK27M_IN
SYSCLK_DDRCLK_B1:G:L:S:0 MIL:25 MIL
167.0 MHz:::
L:S:3100 MIL:3200 MIL
250.0000
10 MIL SPACING
DDRCLK_B1
7
SYSCLK_DDRCLK_B1_L
49.92 MHz:::
L:S:1000 MIL:1150 MIL
250.0000
5
10 MIL SPACING
INT_REF_CLK_OUT
167.0 MHz:::
L:S:1903 MIL:2000 MIL
500.0000
7
RAM_DQS_A<0>
167.0 MHz:::
L:S:1435 MIL:1500 MIL
500.0000
7
MEM_DQS<2>
L:S:1707:1800
167 MHZ
500
7
RAM_DATA_A<23..16>
167.0 MHz:::
L:S:1204 MIL:1357 MIL
500.0000
7
RAM_DQS_A<6>
L:S:1400:1546
500
167 MHZ
7
RAM_DATA_B<55..48>
L:S:1809 MIL:1887 MIL
167.0 MHz:::
500.0000
7
RAM_DQM_B<7>
L:S:1809 MIL:1887 MIL
500.0000
167.0 MHz:::
7
RAM_DQS_B<7>
L:S:1809:1887
500
167 MHZ
7
RAM_DATA_B<63..56>
167.0 MHz:::
L:S:1404 MIL:1686 MIL
500.0000
7
RAM_DQS_B<4>
L:S:1205:1387
500
167 MHZ
7
RAM_DATA_A<39..32>
167.0 MHz:::
L:S:1915 MIL:2000 MIL
500.0000
7
MEM_DQS<4>
167.0 MHz:::
L:S:1915 MIL:2000 MIL
500.0000
7
MEM_DQM<4>
L:S:1607:1898
167 MHZ
500
7
RAM_DATA_A<47..40>
167.0 MHz:::
L:S:1607 MIL:1898 MIL
500.0000
7
RAM_DQM_A<5>
167.0 MHz:::
L:S:1719 MIL:1893 MIL
500.0000
7
MEM_DQS<5>
167.0 MHz:::
L:S:1400 MIL:1546 MIL
500.0000
7
RAM_DQM_B<6>
L:S:1611:1696
500
167 MHZ
7
RAM_DATA_A<63..56>
L:S::500
83 MHZ
4
MEM_ADDR<12..0>
L:S:2000:3300
8
RAM_BA<1..0>
7
L:S:1700 MIL:3000 MIL
MEM_MUXSEL_LSB
8
L:S:1700 MIL:3000 MIL
MEM_MUXSEL_MSB
L:S:2000 MIL:3100 MIL
8
RAM_WE_L
L:S::500
4
MEM_CKE<3..0>
L:S:2500:3200
7
RAM_CS_L<3..0>
L:S:2000:3000
10
RAM_ADDR<12..0>
L:S:2000:2100
500
167 MHZ
7
RAM_DATA_B<7..0>
SYSCLK_DDRCLK_B0:G:L:S:0 MIL:25 MIL
167.0 MHz:::
L:S:3100 MIL:3200 MIL
250.0000
10 MIL SPACING
DDRCLK_B0
7
SYSCLK_DDRCLK_B0
SYSCLK_DDRCLK_B1_UF:G:L:S:0 MIL:25 MIL
167.0 MHz:::
L:S:300 MIL:350 MIL
10 MIL SPACING
DDRCLK_B1_UF
4
SYSCLK_DDRCLK_B1_L_UF
SYSCLK_DDRCLK_B1_UF:G:L:S:0 MIL:25 MILL:S:300 MIL:350 MIL
10 MIL SPACING
DDRCLK_B1_UF
4
SYSCLK_DDRCLK_B1_UF
SYSCLK_DDRCLK_B1:G:L:S:0 MIL:25 MIL
167.0 MHz:::
L:S:3100 MIL:3200 MIL
250.0000
10 MIL SPACING
DDRCLK_B1
7
SYSCLK_DDRCLK_B1
L:S::250 MIL 33.00 MHz:::
10 MIL SPACING
CLK33M_CBUS_UF
33.00 MHz:::
10 MIL SPACING
L:S::250 MIL
L:S::250 MIL 33.00 MHz:::
10 MIL SPACING
CLK33M_NEC_UF
167.0 MHz:::
L:S:1602 MIL:1700 MIL
500.0000
7
MEM_DQM<0>
SYSCLK_DDRCLK_A0:G:L:S:0 MIL:25 MIL
167.0 MHz:::
L:S:2900 MIL:3000 MIL
250.0000
10 MIL SPACING
DDRCLK_A0
7
SYSCLK_DDRCLK_A0
SYSCLK_DDRCLK_A0:G:L:S:0 MIL:25 MIL
167.0 MHz:::
250.0000
10 MIL SPACING
DDRCLK_A0
7
L:S:2900 MIL:3000 MIL
SYSCLK_DDRCLK_A0_L
SYSCLK_DDRCLK_A1:G:L:S:0 MIL:25 MIL
167.0 MHz:::
L:S:2900 MIL:3000 MIL
250.0000
10 MIL SPACING
DDRCLK_A1
7
SYSCLK_DDRCLK_A1
66.00 MHz:::L:S::150 MIL
10 MIL SPACING
167.0 MHz:::
L:S:1900 MIL:2000 MIL
250.0000
10 MIL SPACING
5
INT_REF_CLK_IN
L:S:1450 MIL:1550 MIL
6
66.00 MHz:::
500.0000
10 MIL SPACING
INT_AGP_FB_IN
9
L:S:5000 MIL:6000 MIL
33.00 MHz:::
500.0000
10 MIL SPACING
CLK33M_CBUS
L:S:9500 MIL:10500 MIL
33.00 MHz:::
500.0000
10 MIL SPACING
6
CLK33M_AIRPORT
7
L:S:4000 MIL:6000 MIL
33.00 MHz:::
500.0000
10 MIL SPACING
CLK33M_NEC
33.00 MHz:::
10 MIL SPACING
L:S::300 MIL
INT_PCI_FB_OUT
33.00 MHz:::
L:S:6500 MIL:7500 MIL
500.0000
10 MIL SPACING
7
INT_PCI_FB_IN
10 MIL SPACING
L:S::300 MIL
CLK18M_XTAL_IN
500.0000
6
10 MIL SPACING
L:S:8000 MIL:9000 MIL
125.0 MHz:::
10 MIL SPACING
6
800.0000
CLKENET_LINK_RX
39
39
26
26
26
19
11
11
10
10
10
10
10
10
10
10
10
10
10
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
8
11
11
27
27
11
10
11
10
10
11
11
10
11
10
11
10
11
11
11
11
10
11
10
20
20
11
11
10
11
11
11
11
11
11
11
11
10
10
11
11
10
11
11
11
10
10
11
11
11
11
11
11
10
11
11
11
18
24
17
25
26
13
13
13
26
26
13
27
19
12
12
9
9
10
10
9
9
9
9
9
9
9
9
9
9
9
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
9
9
9
9
9
9
8
5
9
9
9
9
9
14
8
8
8
8
8
27
27
13
13
13
26
10
9
9
9
9
10
10
9
9
9
10
9
10
9
10
10
10
10
8
9
10
19
14
14
9
14
19
19
19
9
14
10
9
10
10
10
10
10
10
10
10
9
9
10
10
9
10
10
9
9
9
9
9
9
9
9
10
9
9
9
9
12
12
12
9
9
9
9
12
14
12
12
12
12
12
12
14
14
13
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
STUB_LENGTH OF 250 MILS NEEDED WHEN DESIGN SWITCHED TO 14.2
(250)
(250)
(250)
(250)
(250)
(250)
(250)
(250)
(250) (250) (250)
(250)
SIGNAL CONSTRAINTS - PAGE 1
PULSE_PARAM
NET_SPACING_TYPE
STUB_LENGTH
MAX_EXPOSED_LENGTH
MAX_VIASSIG_NAME
GROUP
DIGITAL SIGNALS
MAXBUS
GOAL: MINIMIZE TH VIAS
SECONDARY LAYERS: 4,7
(250)
(250)
(250)
(250) (250) (250) (250) (250)
NO_TEST
(250)
Temporary Area for TMDS/DVO signal constraints
ALL TMDS GROUP SIGNALS ROUTE AT LAYER 4 OR 7 AND HAVE SAME WIDTH SPACING RULE AS OTHER TMDS SIGNALES
ALL THE DVOD GROUP SIGNALS ROUTE AT LAYER 4 OR 7 AND ROUTE AS STANDARD 50OHM SIGNALS AT 4 MILS
PRIORITY: 4
(250)
I231
I232
I233
I234 I235 I236
I237
I238
I239
I240
I241
I242
I243
I244
I245
I246
I258 I259 I260 I261 I262
I263
I264
I265
I266
I267
I268 I269
I270
I271
I272 I273 I274 I275
B
36 44
051-6809
100 OHM SPACING
100 OHM SPACING
500.0000
GPU_TMDS_DN<0>
GPU_TMDS_D0
8
830.0000
GPU_TMDS_DP<2>
GPU_TMDS_D2
100 OHM SPACING
100 OHM SPACING
8
830.0000
100 OHM SPACING
100 OHM SPACING
GPU_TMDS_DN<2>
GPU_TMDS_D2
8
SITMDS:G:L:S:0 MIL:50 MIL
100 OHM SPACING
100 OHM SPACING
SI_TMDS_CLKN
5
SI_CLKTMDS
100 OHM SPACING
100 OHM SPACING
SI_TMDS_CLKP
SITMDS:G:L:S:0 MIL:50 MIL
SI_CLKTMDS
5
SI_TMDS_D0
100 OHM SPACING
100 OHM SPACING
SI_TMDS_DN<0>
8
100 OHM SPACING
100 OHM SPACING
SI_TMDS_D1
8
SI_TMDS_DN<1>
TMDS_CONN:G:L:S:0 MIL:50 MIL
CLKCONN_TMDS 500.0000
100 OHM SPACING
100 OHM SPACING
TMDS_CONN_CLKP
4
TMDS_CONN:G:L:S:0 MIL:50 MIL
TMDS_CONN_CLKN
CLKCONN_TMDS
100 OHM SPACING
100 OHM SPACING
500.0000
4
GPU_DVO_CLKP
GPUDVOD:G:L:S:0 MIL:50 MIL
165.0 MHz:::
500.0000
6
GPU_DVO_VSYNC
6
500.0000
GPUDVOD:G:L:S:0 MIL:50 MIL
6
GPU_DVOD_DE
GPUDVOD:G:L:S:0 MIL:50 MIL
500.0000
ATIDVOD:G:L:S:0 MIL:50 MIL
ATI_DVO_VSYNC
610.0000
6
GPU_DVO_HSYNC
500.0000
GPUDVOD:G:L:S:0 MIL:50 MIL
6
700
GPUDVOD:G:L:S:0 MIL:50 MIL
GPU_DVOD<11..0>
6
610
ATIDVOD:G:L:S:0 MIL:50 MIL
ATI_DVOD<11..0>
6
ATIDVOD:G:L:S:0 MIL:50 MIL
ATI_DVO_CLKP
610.0000
165.0 MHz:::
6
ATIDVOD:G:L:S:0 MIL:50 MIL
610.0000
ATI_DVO_HSYNC
6
ATIDVOD:G:L:S:0 MIL:50 MIL
610.0000
ATI_DVOD_DE
6
100 OHM SPACING
100 OHM SPACING
500.0000
GPU_CLKTMDS
GPUTMDS:G:L:S:0 MIL:50 MIL
GPU_TMDS_CLKN
5
100 OHM SPACING
100 OHM SPACING
5
500.0000
GPUTMDS:G:L:S:0 MIL:50 MIL
GPU_CLKTMDS
GPU_TMDS_CLKP
L:S:1500 MIL:2700 MIL
7
CPU_ARTRY_L
L:S:1500 MIL:3200 MIL
7
CPU_DRDY_L
83 MHZ
L:S:1500:3100
7
TRUE
CPU_ADDR<0..31>
L:S:1100:2700
7
83 MHZ
TRUE
CPU_DATA<0..31>
L:S:1100:2700
83 MHZ
8
CPU_DATA<32..63>
L:S:1500:2950
7
CPU_DTI<0..2>
L:S:1500:3400
7
CPU_TT<0..4>
L:S:1500:3500
7
CPU_TSIZ<0..2>
L:S:1500 MIL:2700 MIL
7
CPU_BG_L
L:S:1500 MIL:2700 MIL
7
CPU_CI_L
L:S:1500 MIL:2700 MIL
7
CPU_DBG_L
L:S:1500 MIL:2700 MIL
7
CPU_GBL_L
L:S:1500 MIL:2800 MIL
7
CPU_HIT_L
L:S:1500 MIL:2700 MIL
7
CPU_QACK_L
L:S:1500 MIL:2700 MIL
7
CPU_QREQ_L
L:S:1500 MIL:2700 MIL
7
CPU_TA_L
L:S:1500 MIL:2700 MIL
7
CPU_TBST_L
L:S:1500 MIL:3000 MIL
7
CPU_TEA_L
L:S:1500 MIL:2700 MIL
7
CPU_TS_L
L:S:1500 MIL:3100 MIL
7
CPU_WT_L
L:S:1500 MIL:2700 MIL
7
CPU_AACK_L
L:S:1500 MIL:2700 MIL
7
CPU_BR_L
600.0000
100 OHM SPACING
100 OHM SPACING
GPU_TMDS_DN<1>
GPU_TMDS_D1
8
GPU_TMDS_DP<0>
100 OHM SPACING
100 OHM SPACING
500.0000
GPU_TMDS_D0
8
600.0000
100 OHM SPACING
100 OHM SPACING
GPU_TMDS_DP<1>
GPU_TMDS_D1
8
100 OHM SPACING
100 OHM SPACING
SI_TMDS_D2
SI_TMDS_DN<2>
8
100 OHM SPACING
100 OHM SPACING
SI_TMDS_D0
8
SI_TMDS_DP<0>
100 OHM SPACING
100 OHM SPACING
8
SI_TMDS_DP<1>
SI_TMDS_D1
100 OHM SPACING
100 OHM SPACING
SI_TMDS_D2
SI_TMDS_DP<2>
8
CONN_TMDS_D0
TMDS_CONN_DN<0>
4
500.0000
100 OHM SPACING
100 OHM SPACING
CONN_TMDS_D1
TMDS_CONN_DN<1>
4
500.0000
100 OHM SPACING
100 OHM SPACING
CONN_TMDS_D2
TMDS_CONN_DN<2>
4
500.0000
100 OHM SPACING
100 OHM SPACING
CONN_TMDS_D0
TMDS_CONN_DP<0>
4
100 OHM SPACING
100 OHM SPACING
500.0000
CONN_TMDS_D1
TMDS_CONN_DP<1>
4
100 OHM SPACING
100 OHM SPACING
500.0000
CONN_TMDS_D2
4
100 OHM SPACING
100 OHM SPACING
500.0000
TMDS_CONN_DP<2>
20
20
20
39
39
20
20
20
20
20
20
20
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
20
20
20
19
19
19
19
19
19
19
22
22
19
19
19
19
19
19
19
19
19
19
19
19
5
5
5
6
6
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
19
19
19
19
19
19
19
22
22
22
22
22
22
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
S = 5.6MIL (TRACE SEPERATION)
Digital Signals (cont’d)
STUB_LENGTH
PULSE_PARAM
LAYERS 2 OR 9
SIGNAL CONSTRAINTS - PAGE 2
Zo(single) = 46.6 OHMS
Zo(diff) = 89.8 OHMS
T = 0.6MIL (TRACE THICKNESS)
H = 9.6MIL (DIST BETW PLANES)
W = 3.9MIL (TRACE WIDTH)
Er = 4.3 (DIELECTRIC CONSTANT)
S = 11MIL (TRACE SEPERATION)
LAYERS 4 OR 7
Zo(single) = 50 OHMS
Zo(diff) = 94 OHMS
T = 0.6MIL (TRACE THICKNESS)
H = 9.6MIL (DIST BETW PLANES)
S = 4.9MIL (TRACE SEPERATION)
W = 3.1MIL (TRACE WIDTH)
Er = 4.3 (DIELECTRIC CONSTANT)
LAYERS 4 OR 7
asymmetric stackup.
Zo will be lower due to
Clear adjacent power plane!
Zo(single) = 55.4 OHMS
Zo(diff) = 106.2 OHMS
T = 0.6MIL (TRACE THICKNESS)
H = 16.8MIL (DIST BETW PLANES)
W = 3MIL (TRACE WIDTH)
Er = 4.3 (DIELECTRIC CONSTANT)
LAYERS 4 OR 7
Zo = 100
NET_SPACING_TYPE
UPPER
PRIORITY: 6
Differential Signals
POWER
PRIMARY
LOWER
MAX_EXPOSED_LENGTH
NEED TO MATCH DELAY TO 250
(200)
(200)
(200)
(250)
(250)
(250) (250)
(350)
(350)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
(200)
PRIORITY: 8
AGP BYTES 0-1
AGP BYTES 2-3
AGP CONTROL
ULTRA ATA-100
INTREPID
OPTICAL
FIREWIRE MII
EIDE
PCI
AGP
SIG_NAME
NO_TEST
MAX_VIAS
MAX_EXPOSED_LENGTH
Zo = 110
FIREWIRE
GROUP
Zo = 100
ETHERNET
Zo = 90
USB 1.1
Zo = 90
USB 2.0
THERMOSTAT
SUPPLIES
SECONDARY LAYERS: 2,9
LAYERS: 2,9
LAYERS: 4,7 SECONDARY
PRIMARY
PRIMARY
SECONDARY LAYERS: 2,9
LAYERS: 2,9
LAYERS: 4,7 SECONDARY
PRIMARY
LAYERS: 2,9
LAYERS: 4,7 SECONDARY
PRIMARY
PRIORITY: 3 PRIMARY LAYERS: 4,7 FOR CONTROLLED IMPEDANCE DIFF PAIRS SECONDARY LAYERS: 2,9 FOR UNCONTROLLED IMPEDANCE DIFF PAIRS
PRIORITY: 4
PRIORITY: 5
PRIORITY: 5
(200)
(400)
(400)
(400)
(400)
(400) (400)(400)
(400)
GROUP
AGP SIDEBAND
SIG_NAME
RELATIVE_PROPAGATION_DELAY
(200)
(200)
MAX_VIAS
TOTAL UIDE+HD SKEW <500MIL
(200)
ETHERNET MII
Zo = 100
TMDS
LAYERS: 4,7
GOAL: MINIMIZE TH VIAS
LAYERS: 4,7
NET_SPACING_TYPE
PRIORITY: 7
LVDS
I233 I234 I235 I236 I237 I238
I239
I240
I241 I242
I243
I244
B
37 44
051-6809
LVDS_U2
LVDS_U2N
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
100 OHM SPACING
500.0000
TMDS_D1
TMDS_DN<1>
100 OHM SPACING
100 OHM SPACING
8
500.0000
TMDS_DP<1>
8
500.0000
TMDS_D1
100 OHM SPACING
100 OHM SPACING
ATI_CLKTMDS
ATI_TMDS_CLKP
5
200.0000
100 OHM SPACING
100 OHM SPACING
ATITMDS:G:L:S:0 MIL:50 MIL
ATI_TMDS_D0
8
200.0000
ATI_TMDS_DN<0>
100 OHM SPACING
100 OHM SPACING
ATI_TMDS_D0
8
ATI_TMDS_DP<0>
100 OHM SPACING
100 OHM SPACING
200.0000
ATI_TMDS_D1
ATI_TMDS_DP<1>
8
200.0000
100 OHM SPACING
100 OHM SPACING
USB_DE:G:L:S:0 MIL:200 MIL
USB_DE
USB_DEM
5.6 MIL SPACING
USB_DE:G:L:S:0 MIL:200 MIL
USB_DE
USB_DEP
5.6 MIL SPACING
500.0000
ATI_TMDS_D2
ATI_TMDS_DP<2>
8
100 OHM SPACING
100 OHM SPACING
500.0000
ATI_TMDS_D2
ATI_TMDS_DN<2>
8
100 OHM SPACING
100 OHM SPACING
ATI_TMDS_D1
ATI_TMDS_DN<1>
8
200.0000
100 OHM SPACING
100 OHM SPACING
8
TMDS_DN<2>
500.0000
TMDS_D2
100 OHM SPACING
100 OHM SPACING
8
500.0000
TMDS_D2
100 OHM SPACING
100 OHM SPACING
TMDS_DP<2>
ATITMDS:G:L:S:0 MIL:50 MIL
ATI_CLKTMDS
5
200.0000
100 OHM SPACING
100 OHM SPACING
ATI_TMDS_CLKN
BT_USB_D
BT_USB_DM
BT_USB:G:L:S:0 MIL:200 MIL
5.6 MIL SPACING
USB_DFP
USB_DF
USB_DF:G:L:S:0 MIL:200 MIL
5.6 MIL SPACING
USB_DF:G:L:S:0 MIL:200 MIL
USB_DFM
USB_DF
5.6 MIL SPACING
BT_USB:G:L:S:0 MIL:200 MIL
BT_USB_DP
BT_USB_D
5.6 MIL SPACING
MODEM_USB:G:L:S:0 MIL:200 MIL
MODEM_USB_D
MODEM_USB_DM
5.6 MIL SPACING
MODEM_USB:G:L:S:0 MIL:200 MIL
MODEM_USB_DP
MODEM_USB_D
5.6 MIL SPACING
TMDS_D0
8
500.0000
TMDS_DP<0>
100 OHM SPACING
100 OHM SPACING
TMDS_D0
8
500.0000
TMDS_DN<0>
100 OHM SPACING
100 OHM SPACING
TMDS:G:L:S:0 MIL:50 MIL
TMDS_CLKP
500.0000
CLKTMDS
5
100 OHM SPACING
100 OHM SPACING
TMDS:G:L:S:0 MIL:50 MIL
500.0000
TMDS_CLKN
5
100 OHM SPACING
CLKTMDS
100 OHM SPACING
LVDS_U1
500.0000
LVDS_U1P
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
100 OHM SPACING
LVDS_U1
500.0000
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
100 OHM SPACING
LVDS_U1N
LVDS_U0P
LVDS_U0
500.0000
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
LVDS_U0
LVDS_U0N
500.0000
100 OHM SPACING
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
CLKLVDS_U
4
CLKLVDS_UP
100 OHM SPACING
100 OHM SPACING
500.0000
LVDS:G:L:S:0 MIL:110 MIL
CLKLVDS_UN
CLKLVDS_U
4
500.0000
100 OHM SPACING
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
LVDS_L2P
LVDS_L2
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
100 OHM SPACING
500.0000
LVDS_L2N
100 OHM SPACING
100 OHM SPACING
500.0000
LVDS_L2
LVDS:G:L:S:0 MIL:110 MIL
500.0000
LVDS_L0N
LVDS:G:L:S:0 MIL:110 MIL
100 OHM SPACING
100 OHM SPACING
LVDS_L0
4
LVDS:G:L:S:0 MIL:110 MIL
500.0000
100 OHM SPACING
100 OHM SPACING
CLKLVDS_L
CLKLVDS_LP
ENET_MDI3
ENET_MDI3:G:U43.43:J23.10:0 MIL:100 MIL
ENET 11 MIL SPACING
ENET 11 MIL SPACING
MDI_M<3>
ENET_MDI2
ENET_MDI2:G:U43.41:J23.8:0 MIL:100 MIL ENET 11 MIL SPACING
ENET 11 MIL SPACING
MDI_M<2>
ENET_MDI3
ENET_MDI3:G:U43.42:J23.9:0 MIL:100 MIL ENET 11 MIL SPACING
ENET 11 MIL SPACING
MDI_P<3>
LVDS:G:L:S:0 MIL:110 MIL
4
500.0000
100 OHM SPACING
CLKLVDS_L
100 OHM SPACING
CLKLVDS_LN
500.0000
LVDS_L0P
100 OHM SPACING
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
LVDS_L0
LVDS_L1P
500.0000
100 OHM SPACING
100 OHM SPACING
LVDS_L1
LVDS:G:L:S:0 MIL:110 MIL
LVDS_L1
500.0000
LVDS_L1N
100 OHM SPACING
100 OHM SPACING
LVDS:G:L:S:0 MIL:110 MIL
MDI_P<0>
ENET_MDI0
ENET 11 MIL SPACING
ENET 11 MIL SPACINGENET_MDI0:G:U43.29:J23.1:0 MIL:100 MIL
ENET_MDI0:G:U43.31:J23.2:0 MIL:100 MIL
ENET_MDI0
ENET 11 MIL SPACING
ENET 11 MIL SPACING
MDI_M<0>
MDI_M<1>
ENET_MDI1
ENET_MDI1:G:U43.34:J23.4:0 MIL:100 MIL
ENET 11 MIL SPACING
ENET 11 MIL SPACING
L:S:6000:12500
MIN_DAISY_CHAIN
33 MHz
PCI_CBE<3..0>
L:S:6000:12500
33 MHz
MIN_DAISY_CHAIN
PCI_AD<31..0>
33.00 MHz:::
L:S:6000 MIL:12500 MIL
MIN_DAISY_CHAIN
PCI_IRDY_L
FW_TPI0
FW_TPI0:G:L:S:0 MIL:5 MIL
110 OHM SPACING
500.0000
FW_TPI0N
110 OHM SPACING
500.0000FW_TPAO0
FW_TPAO0:G:L:S:0 MIL:5 MIL
FW_TPAO0P
110 OHM SPACING
500.0000FW_TPAO0
FW_TPAO0:G:L:S:0 MIL:5 MIL
FW_TPAO0N
7
66 MHz
L:S:1050:1450
AGP_SBA<7..0>
UIDE_DATA<7>
100.0 MHz:::
U51.V1:RP19.3::600 MIL
USB_D1:G:L:S:0 MIL:20 MIL
90 OHM SPACING
USB_D1
NEC_USB_DAP
500.0000
USB_D1:G:L:S:0 MIL:20 MIL
500.0000
USB_D1
NEC_USB_DAM
90 OHM SPACING
33.00 MHz:::
L:S:4500 MIL:6500 MIL
EIDE_OPTICAL_READ_L
L:S:8000 MIL:9000 MIL
ENET_MDC
L:S:2700:3500
7
FW_LINK_DATA<7..0>
ENET_RX_DV
L:S:8000 MIL:9000 MIL
L:S:4000:6000
33 MHZ
EIDE_OPTICAL_ADDR<2..0>
33.00 MHz:::
EIDE_RD_L
L:S::500 MIL
33.00 MHz:::L:S::850 MIL
EIDE_CS0_L
L:S::850
33 MHZ
EIDE_ADDR<2..0>
EIDE_DATA<15..0>
L:S::850
33 MHZ
L:S:5000:6500
100 MHZ
7
HD_DATA<15..0>
100.0 MHz:::L:S::500 MIL
UIDE_CS1_L
UIDE_RST_L
100.0 MHz:::L:S::400 MIL
L:S::710
UIDE_DATA<15..8>
100 MHZ
THERM1:G:L:S:0 MIL:100 MIL
THERM1_DM
5V_SNS:G:L:S:0 MIL:100 MIL
5V_SNS
5V_SNSP
THERM1:G:L:S:0 MIL:100 MIL
THERM1_DP
1772_CSI:G:L:S:0 MIL:100 MIL
1772_CSIP
1772_CSI
L:S:1050:1450
7
66 MHz
AGP_CBE<1..0>
100.0 MHz:::
7
L:S:6200 MIL:6300 MIL
10 MIL SPACING
HD_IOCHRDY
10 MIL SPACING
7
100.0 MHz:::
L:S:6100 MIL:6150 MIL
HD_DIOR_L
UIDE_ADDR<2..0>
L:S::650
100 MHZ
L:S::400 MIL 100.0 MHz:::
UIDE_DMACK_L
L:S:3000 MIL:6000 MIL
HD_CS0_L
100.0 MHz:::
7
L:S:3000 MIL:6000 MIL
7
100.0 MHz:::
HD_CS1_L
HD_INTRQ
100.0 MHz:::
L:S:3000 MIL:5000 MIL
7
5V_SNS:G:L:S:0 MIL:100 MIL
5V_SNS
5V_SNSM
L:S:1050 MIL:1450 MIL
6
133.0 MHz:::
8 MIL SPACING
AGP_AD_STB_L<1>
66.00 MHz:::
6
L:S:1250 MIL:1950 MIL
AGP_RBF_L
66.00 MHz:::
6
L:S:1250 MIL:1950 MIL
AGP_GNT_L
6
L:S:1050 MIL:1450 MIL
8 MIL SPACING
66.00 MHz:::
AGP_SB_STB
33.00 MHz:::
MIN_DAISY_CHAIN
L:S:6000 MIL:12500 MIL
PCI_STOP_L
66.00 MHz:::
6
L:S:1250 MIL:1950 MIL
AGP_IRDY_L
L:S::400 MIL
ENET_LINK_TX_EN
L:S:1050 MIL:1450 MIL
6
133.0 MHz:::
8 MIL SPACING
AGP_AD_STB<0>
L:S:4700:5500
7
L:S:8000:9000
7
ENET_PHY_TXD<7..0>
L:S:8000:9000
7
ENET_LINK_RXD<7..0>
L:S:4000:6000
33 MHZ
EIDE_OPTICAL_DATA<15..0>
L:S::600
ENET_LINK_TXD<7..0>
L:S:9000:10000
FW_LINK_CNTL<1..0>
L:S::300
1772_CSS:G:L:S:0 MIL:100 MIL
1772_CSS
1772_CSSP
3V_SNS:G:L:S:0 MIL:100 MIL
3V_SNS
3V_SNSP
33.00 MHz:::L:S::500 MIL
EIDE_DMACK_L
33.00 MHz:::L:S::500 MIL
EIDE_DMARQ
33.00 MHz:::L:S::500 MIL
EIDE_INT
33.00 MHz:::
L:S:4500 MIL:6500 MIL
EIDE_OPTICAL_CS0_L
33.00 MHz:::
L:S:4500 MIL:6500 MIL
EIDE_OPTICAL_CS1_L
33.00 MHz:::
L:S:4500 MIL:6500 MIL
EIDE_OPTICAL_DMAACK_L
33.00 MHz:::
L:S:4500 MIL:6500 MIL
EIDE_OPTICAL_DMA_RQ
33.00 MHz:::
L:S:5000 MIL:7000 MIL
EIDE_OPTICAL_INT
33.00 MHz:::
L:S:4500 MIL:6500 MIL
EIDE_OPTICAL_IOCHRDY
33.00 MHz:::
L:S:4500 MIL:6500 MIL
EIDE_OPTICAL_RST_L
33.00 MHz:::
L:S:4500 MIL:6500 MIL
L:S:8000 MIL:9000 MIL
ENET_COL
L:S:8000 MIL:9000 MIL
ENET_CRS
L:S::400 MIL
ENET_LINK_TX_ER
L:S:8000 MIL:9000 MIL
ENET_MDIO
L:S:8000 MIL:9000 MIL
7
ENET_PHY_TX_EN
L:S:8000 MIL:9000 MIL
7
ENET_PHY_TX_ER
L:S:8000 MIL:9000 MIL
ENET_RX_ER
L:S::300 MIL
FW_LINK_LREQ
L:S:8500 MIL:9500 MIL
FW_PHY_LREQ
L:S:8500 MIL:9500 MIL
FW_PINT
MIN_DAISY_CHAIN
33.00 MHz:::
L:S:6000 MIL:12500 MIL
PCI_TRDY_L
THERM1_ALT:G:L:S:0 MIL:100 MILTHERM1_ALT
THERM1_A_DM
THERM1_ALT:G:L:S:0 MIL:100 MIL
THERM1_A_DP
THERM1_ALT
THERM1_MAIN:G:L:S:0 MIL:100 MIL
THERM1_MAIN
THERM1_M_DM
THERM1_MAIN:G:L:S:0 MIL:100 MIL
THERM1_M_DP
THERM1_MAIN
THERM2_ALT:G:L:S:0 MIL:100 MIL
THERM2_A_DM
THERM2_ALT
THERM2_ALT:G:L:S:0 MIL:100 MIL
THERM2_A_DP
THERM2_ALT
THERM2:G:L:S:0 MIL:100 MIL
THERM2_DM
THERM2:G:L:S:0 MIL:100 MIL
THERM2_DP
THERM2_MAIN:G:L:S:0 MIL:100 MIL
THERM2_M_DM
THERM2_MAIN
THERM2_MAIN:G:L:S:0 MIL:100 MIL
THERM2_M_DP
THERM2_MAIN
L:S::500 MIL 100.0 MHz:::
UIDE_CS0_L
33.00 MHz:::
MIN_DAISY_CHAIN
L:S:6000 MIL:12500 MIL
PCI_DEVSEL_L
33.00 MHz:::L:S::850 MIL
EIDE_CS1_L
66.00 MHz:::
6
L:S:1250 MIL:1950 MIL
AGP_TRDY_L
L:S:1250 MIL:1950 MIL
66.00 MHz:::
7
AGP_DEVSEL_L
66.00 MHz:::
6
L:S:1250 MIL:1950 MIL
AGP_STOP_L
L:S:1250 MIL:1950 MIL
66.00 MHz:::
6
AGP_PAR
L:S::600
UIDE_DATA<6..0>
100 MHZ
L:S:4500 MIL:6000 MIL
7
HD_DMACK_L
100.0 MHz:::
100.0 MHz:::
7
HD_DIOW_L
L:S:3000 MIL:5200 MIL
L:S::500 MIL 33.00 MHz:::
EIDE_WR_L
L:S::600 MIL 100.0 MHz:::
UIDE_DIOR_L
10 MIL SPACING
100.0 MHz:::L:S::400 MIL
UIDE_DMARQ
L:S:5000:6500
7
HD_ADDR<2..0>
100 MHZ
L:S:1050 MIL:1450 MIL
6
8 MIL SPACING
66.00 MHz:::
AGP_SB_STB_L
66.00 MHz:::
6
L:S:1250 MIL:1950 MIL
AGP_REQ_L
L:S:6000 MIL:12500 MIL
33.00 MHz:::
MIN_DAISY_CHAIN
PCI_FRAME_L
L:S:4500 MIL:6000 MIL
HD_DMARQ
7
100.0 MHz:::
1772_CSI:G:L:S:0 MIL:100 MIL
1772_CSI
1772_CSIN
1772_CSS:G:L:S:0 MIL:100 MIL
1772_CSS
1772_CSSN
3V_SNS:G:L:S:0 MIL:100 MIL
3V_SNS
3V_SNSM
100.0 MHz:::
HD_RESET_L
7
L:S:4000 MIL:6000 MIL
L:S::400 MIL 100.0 MHz:::
UIDE_INTRQ
L:S:1050 MIL:1450 MIL
6
133.0 MHz:::
8 MIL SPACING
AGP_AD_STB_L<0>
L:S:1050:1450
7
66 MHz
AGP_AD<31..16>
6
L:S:1250 MIL:1950 MIL
66.00 MHz:::
AGP_FRAME_L
MIN_DAISY_CHAIN
33.00 MHz:::
L:S:6000 MIL:12500 MIL
PCI_PAR
L:S::400 MIL 100.0 MHz:::
UIDE_DIOW_L
L:S::600 MIL
10 MIL SPACING
100.0 MHz:::
UIDE_IOCHRDY
33.00 MHz:::L:S::500 MIL
EIDE_IOCHRDY
33.00 MHz:::L:S::500 MIL
EIDE_RST_L
USB_D2:G:L:S:0 MIL:20 MIL
USB_D2
NEC_USB_DBM
90 OHM SPACING
500.0000
USB_D2:G:L:S:0 MIL:20 MIL
90 OHM SPACING
USB_D2
NEC_USB_DBP
500.0000
LVDS:G:L:S:0 MIL:110 MIL
LVDS_U2
500.0000
100 OHM SPACING
100 OHM SPACING
LVDS_U2P
L:S:1050:1450
7
66 MHz
AGP_CBE<3..2>
L:S:1050 MIL:1450 MIL
133.0 MHz:::
6
8 MIL SPACING
AGP_AD_STB<1>
FW_TPB1P
110 OHM SPACING
FW_TPB1
FW_TPB1:G:L:S:0 MIL:4%
500.0000 110 OHM SPACING
FW_TPI1:G:L:S:0 MIL:4%
FW_TPI1
FW_TPI1N
500.0000
110 OHM SPACING
FW_TPB1:G:L:S:0 MIL:4%
FW_TPB1N
FW_TPB1
500.0000
110 OHM SPACING
500.0000
FW_TPA1
FW_TPA1:G:L:S:0 MIL:4%
FW_TPA1P
FW_TPA1N
110 OHM SPACING
500.0000
FW_TPA1
FW_TPA1:G:L:S:0 MIL:4%
FW_TPO0:G:L:S:0 MIL:5 MIL
FW_TPO0
500.0000
110 OHM SPACING
FW_TPO0P
500.0000
110 OHM SPACING
FW_TPBI0
FW_TPBI0:G:L:S:0 MIL:5 MIL
FW_TPBI0N
500.0000
110 OHM SPACING
FW_TPBI0
FW_TPBI0:G:L:S:0 MIL:5 MIL
FW_TPBI0P
500.0000
110 OHM SPACING
FW_TPO0
FW_TPO0N
FW_TPO0:G:L:S:0 MIL:5 MIL
110 OHM SPACING
500.0000
FW_TPI0
FW_TPI0:G:L:S:0 MIL:5 MIL
FW_TPI0P
MDI_P<1>
ENET_MDI1:G:U43.33:J23.3:0 MIL:100 MIL
ENET_MDI1
ENET 11 MIL SPACING
ENET 11 MIL SPACING
ENET_MDI2
MDI_P<2>
ENET_MDI2:G:U43.39:J23.7:0 MIL:100 MIL
ENET 11 MIL SPACING
ENET 11 MIL SPACING
FW_TPO1P
FW_TPO1
FW_TPO1:G:L:S:0 MIL:4%
110 OHM SPACING
500.0000
FW_TPO1
FW_TPO1N
FW_TPO1:G:L:S:0 MIL:4%
110 OHM SPACING
500.0000
FW_TPI1
FW_TPI1P
500.0000
110 OHM SPACING
FW_TPI1:G:L:S:0 MIL:4%
L:S:1050:1450
66 MHz
7
AGP_AD<15..0>
39
24
39
39
39
39
39
39
24
18
24
24
24
24
24
24
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
18
17
18
39
39
39
18
18
18
18
18
39
39
39
39
39
22
22
22
22
22
25
25
25
25
22
22
22
22
22
22
22
22
22
22
22
22
22
22
39
39
39
22
22
22
22
39
39
39
17
12
17
28
19
24
25
25
39
26
27
26
39
24
24
24
24
24
24
24
19
24
24
24
19
19
19
19
17
19
19
26
26
39
27
24
24
24
39
39
39
39
39
39
39
39
26
26
26
26
26
26
27
27
17
24
17
24
19
19
19
19
24
24
24
19
19
17
24
19
19
19
17
24
24
24
24
25
25
22
19
19
28
39
28
28
28
28
28
28
39
39
39
39
39
19
20
19
19
20
20
20
20
14
14
20
20
20
19
19
20
14
14
14
14
14
14
19
19
19
19
20
20
20
20
20
20
20
20
20
20
26
26
26
20
20
20
20
26
26
26
12
9
12
27
28
28
12
13
17
17
24
13
13
13
24
13
13
13
13
24
13
13
13
25
32
25
30
12
24
24
13
13
24
24
13
32
12
12
12
12
12
12
13
12
27
13
13
24
13
13
27
30
32
13
13
13
24
24
24
24
24
24
24
24
13
13
13
13
13
13
13
13
13
13
12
25
25
25
25
25
25
25
25
25
25
13
12
13
12
12
12
12
13
24
24
13
13
13
24
12
12
12
13
30
30
32
24
13
12
12
12
12
13
13
13
13
17
17
20
12
12
27
28
27
27
27
27
28
28
27
27
26
26
28
28
28
12
IN
IN
IN
IN
IN
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
SIG_NAME
POWER NET CONSTRAINTS
CPU
ATI M11
BATTERY
CARDBUS
1.65V SWITCHER
MAX1715
OPT DRIVER
LMU CONN
CY28512D
LTC1962
INT PLLS
SIGNAL CONSTRAINTS - PAGE 3
AIRPORT
LTC3411
REFERENCE
MAIN/SLEEP
HALL EFFECT
AUDIO
FAN
I/O AREA INVERTER TRACKPAD
PLLS
INTREPID
DDR RAM
2.5V SWITCHER
CONTROL
MAX1717
LTC1778
MISC
MIN_NECK_WIDTH
LTC1625
GROUP
14V SWITCHER
SIG_NAME
VOLTAGE MIN_LINE_WIDTH MIN_NECK_WIDTH
SIG_NAME
GROUP
VOLTAGE MIN_LINE_WIDTH
LVDS
PMU
HD
GROUP
VOLTAGE MIN_LINE_WIDTH MIN_NECK_WIDTH
CHARGER
ADAPTER
3V SWITCHER
5V SWITCHER
LTC3707
ETHERNET
88E1111
NEC USB2.0
FW
VIDEO
TRACKPAD
I308
I310
I311
I312
I314
I315
I316 I317
CHGND1
CHGND2
CHGND3
CHGND4
I332
I333
I345
I346 I347 I348 I349 I350 I351 I352 I353 I354 I355
I356
I357
I358
I359
I360 I361
I362 I363
I364
I365
I366
I367
051-6809
38 44
B
VOLTAGE=0V
MIN_NECK_WIDTH=6
VOLTAGE=0V
MIN_NECK_WIDTH=12MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=12MIN_LINE_WIDTH=25
VOLTAGE=0V
VOLTAGE=0V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=12
MIN_NECK_WIDTH=12MIN_LINE_WIDTH=25
VOLTAGE=0V
VOLTAGE=33V
LM2594_IN
VOLTAGE=3.3V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
+3V_SLEEP_PCCARD
MIN_LINE_WIDTH=8
1778_VFB
MIN_LINE_WIDTH=8
VOLTAGE=1.4V
VCORE_FB
MIN_LINE_WIDTH=8
VCORE_CC
MIN_LINE_WIDTH=8
VCORE_REF
MIN_LINE_WIDTH=8
VCORE_ILIM
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
VOLTAGE=5V
VCORE_BOOST
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
VCORE_DL
VOLTAGE=24V
+ADAPTER_ILIM
VOLTAGE=24V
+ADAPTER_OR_BATT
VOLTAGE=4.85V
+4_85V_RAW
VOLTAGE=4.6V
+4_6V_BU
VOLTAGE=1.8V
MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10
+1_8V_GPU_TP_PLL
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
VOLTAGE=5V
1778_BST
MIN_LINE_WIDTH=8
VOLTAGE=5V
VCORE_TON
VOLTAGE=5V
MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10
VCORE_BST
VOLTAGE=14V
+14V_INV
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=5V
+5V_INV_UF_SW
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=5V
+5V_INV_SW
MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10
VOLTAGE=5V
+5V_DDC_SLEEP_UF
VOLTAGE=3.3V
+3V_LCD
VOLTAGE=0V
GPU_TV_GND2
VOLTAGE=0V
AUD_GND
VOLTAGE=3.3V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=3.3V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=1.95V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+1_95V_FW_DVDD
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=1.95V
+1_95V_FW_PLL500VDD
MIN_LINE_WIDTH=100
VOLTAGE=0V
FW_VGND0
VOLTAGE=0V
MIN_LINE_WIDTH=100
FW_VGND1
VOLTAGE=12.8V
MIN_LINE_WIDTH=100
FW_VDD_ON
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=1.95V
+1_95V_FW_PLLVDD
VOLTAGE=3.3V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+3V_FW_AVDD
VOLTAGE=3.3V
VOLTAGE=33V
MIN_LINE_WIDTH=100
+FW_PWR1
VOLTAGE=33V
MIN_LINE_WIDTH=100
+FW_PWR_OR
VOLTAGE=12.8V
MIN_LINE_WIDTH=100
+FW_SW
VOLTAGE=3.3V
+3V_PMU_AVCC
VOLTAGE=3.3V
+3V_PMU_ESR
VOLTAGE=4.85V
+4_85V_ESR
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=5V
+5V_HD_SLEEP
VOLTAGE=3.3V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
+HD_LOGIC_SLEEP
VOLTAGE=1.95V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
+1_95V_FW_DVDD_RX0
VOLTAGE=3.3V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+3V_FW_UF
VOLTAGE=3.3V
+3V_FW
MIN_LINE_WIDTH=100
VOLTAGE=33V
+FW_VP0
VOLTAGE=12.8V
MIN_LINE_WIDTH=100
+FW_AMP_SENSE
VOLTAGE=33V
MIN_LINE_WIDTH=100
+FW_VP1
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
VCORE_DH
MIN_LINE_WIDTH=200
VOLTAGE=1.4V
VCORE_LX
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
VOLTAGE=5V
VCORE_VCC
MIN_LINE_WIDTH=30 MIN_NECK_WIDTH=10
VOLTAGE=0V
MAX1715_GND
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
VOLTAGE=5V
MAX1715_VCC
MIN_LINE_WIDTH=8
VOLTAGE=2.0V
MAX1715_REF
MIN_LINE_WIDTH=8
MAX1715_SKIP
MIN_LINE_WIDTH=8
MAX1715_TON
MIN_LINE_WIDTH=8
2_5V_ILIM
MIN_LINE_WIDTH=8
1_5V_ILIM
VOLTAGE=1.5V
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10
1_5V_DL
VOLTAGE=1.5V
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10
1_5V_DH
VOLTAGE=5V
MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10
1_5V_BOOST
VOLTAGE=5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
1_5V_BST
VOLTAGE=1.5V
MIN_LINE_WIDTH=50 MIN_NECK_WIDTH=10
1_5V_LX_F
VOLTAGE=1.5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=50
1_5V_LX
VOLTAGE=2.5V
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10
2_5V_DL
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=3.3V
+3V_MAIN_JUMPER
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=3.3V
3V_RSNS
VOLTAGE=3.3V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
3V_SW
VOLTAGE=5V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+5V_MAIN_JUMPER
VOLTAGE=5V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
5V_RSNS
VOLTAGE=5V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
5V_SW
VOLTAGE=5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=10
3707_INTVCC
VOLTAGE=1.2V
MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10
1V20_REF
VOLTAGE=0V
1625_SGND
VOLTAGE=5V
1625_INTVCC
VOLTAGE=5V
1625_EXTVCC
VOLTAGE=14V
+PBUS_JUMPER
MIN_NECK_WIDTH=6
VOLTAGE=1.5V
+1_5V_INTREPID_PLL7
MIN_NECK_WIDTH=6
VOLTAGE=1.5V
+1_5V_INTREPID_PLL5
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=3.3V
+3V_INTREPID_USB
VOLTAGE=1.5V
MIN_NECK_WIDTH=6
+1_5V_INTREPID_PLL8
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=1.95V
+1_95V_FW_PLL400VDD
VOLTAGE=1.95V
+1_95V_FW_DVDD_TX0
VOLTAGE=3.3V
+3V_HALL_EFFECT
VOLTAGE=5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
+5V_SLEEP
MIN_NECK_WIDTH=6
VOLTAGE=1.5V
+1_5V_INTREPID_PLL2
MIN_NECK_WIDTH=6
VOLTAGE=1.5V
+1_5V_INTREPID_PLL4
VOLTAGE=24V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=50
+ADAPTER_SW
VOLTAGE=24V
MIN_LINE_WIDTH=50 MIN_NECK_WIDTH=10
+ADAPTER_SW
VOLTAGE=1.25V
INT_MEM_VREF
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=1.3V
CPU_AVDD
MIN_NECK_WIDTH=6
VOLTAGE=1.5V
+1_5V_INTREPID_PLL6
VOLTAGE=12.8V
+PBUS
VOLTAGE=12.6V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+BATT
VOLTAGE=24V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+24V_PBUS
VOLTAGE=5V
+5V_TPAD_SLEEP
VOLTAGE=2.5V
MIN_LINE_WIDTH=50 MIN_NECK_WIDTH=10
2_5V_LX_F
VOLTAGE=2.5V
MIN_LINE_WIDTH=50 MIN_NECK_WIDTH=10
2_5V_LX
VOLTAGE=5V
MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10
2_5V_BOOST
VOLTAGE=1.5V
MIN_LINE_WIDTH=8
1_5V_FB
VOLTAGE=24V
1625_VIN
VOLTAGE=14V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
1625_VSW
MIN_NECK_WIDTH=6
VOLTAGE=1.5V
+1_5V_INTREPID_PLL1
MIN_NECK_WIDTH=6
VOLTAGE=3.3V
+3V_SLEEP
VOLTAGE=2.5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
+2_5V_INTREPID
VOLTAGE=12.6V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
+BATT_RSNS
VOLTAGE=5.4V
1772_LDO
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=12.6V
+BATT_14V_FUSE
MIN_LINE_WIDTH=50 MIN_NECK_WIDTH=10
VOLTAGE=24V
+ADAPTER
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=50
VOLTAGE=24V
+ADAPTER_SENSE
VOLTAGE=5V
+5V_MAIN
VOLTAGE=12.6V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+BATT_24V_FUSE
MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10
VOLTAGE=5V
2_5V_BST
VOLTAGE=0V
1772_GND
VOLTAGE=2.5V
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10
2_5V_DH
VOLTAGE=12.6V
+BATT_VSNS
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=1.95V
+1_95V_FW_DVDD_PORT1
VOLTAGE=3.3V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+3V_MAIN
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=3.3V
+3V_PMU
VOLTAGE=1.5V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+1_5V_LDO
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=1.5V
+1_5V_SLEEP
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=1.5V
+1_5V_SLEEP_VIN
MIN_NECK_WIDTH=6
VOLTAGE=1.5V
+1_5V_INTREPID_PLL3
VOLTAGE=5.4V
1772_DLOV
VOLTAGE=16.8V
+BATT_POS
VOLTAGE=1.8V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
MAXBUS_SLEEP
VOLTAGE=1.3V
CPU_AVDD_VOUT
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=3.3V
+3V_LCD_SW
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=5V
+5V_MAIN_AUD
VOLTAGE=3.3V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+3V_MAIN_AUD
VOLTAGE=5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
+FAN_PWR
VOLTAGE=0V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
FAN1_GND
VOLTAGE=0V
FAN2_GND
VOLTAGE=0V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=12
ENET_CTAP_CHGND
VOLTAGE=2.5V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+2_5V_MAIN
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=2.5V
+2_5V_SLEEP
MIN_NECK_WIDTH=6
VOLTAGE=1.8V
+1_8V_MAIN
VOLTAGE=1.8V
+1_8V_SLEEP
VOLTAGE=1.25V
INT_AGP_VREF
VOLTAGE=0V
INT_MEM_REF_H
VOLTAGE=0V
MIN_LINE_WIDTH=8
UIDE_REF
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=3.3V
+3V_AIRPORT
MIN_LINE_WIDTH=8
VCORE_TIME
MIN_LINE_WIDTH=8
VCORE_VGATE
VOLTAGE=0V
VCORE_GND
MIN_LINE_WIDTH=8
VOLTAGE=1.4V
VCORE_SNS
VOLTAGE=0V
VCORE_GNDA
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
VOLTAGE=14V
1778_VIN
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
VOLTAGE=5V
1778_VCC
VOLTAGE=1.8V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=30
1_8V_SW_F
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
VOLTAGE=3.3V
LTC3411_VCC
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=30
VOLTAGE=1.8V
1_8V_SW
MIN_LINE_WIDTH=8
LTC3411_ITH_RC
VOLTAGE=12.6V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
1772_LX
VOLTAGE=24V
1772_DCIN
VOLTAGE=0V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
BATT_NEG
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=3.3V
+VCC_CBUS_SW
VOLTAGE=3.3V
+3V_MAIN_SSCG
MIN_LINE_WIDTH=100
VOLTAGE=12.8V
+FW_PBUS
VOLTAGE=3.3V
MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10
NEC_AVDD
VOLTAGE=3.3V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+3V_NEC_VDD
VOLTAGE=1.0V
LTC3405_SW
VOLTAGE=1.0V
+1_0V_MARVELL
VOLTAGE=2.5V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+2_5V_MARVELL_AVDD
VOLTAGE=2.5V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+2_5V_MARVELL
VOLTAGE=1.5V
+1_5V_SLEEP_NECK
VOLTAGE=1.8V
+1_8V_SLEEP_NECK
VOLTAGE=2.5V
VOLTAGE=1.5V
+GPU_VDD15_NECK
VOLTAGE=1.2V
GPU_VCORE_NECK
VOLTAGE=1.5V
+1_5V_AGP_NECK
VOLTAGE=2.5V
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10
VOLTAGE=1.5V
+GPU_VDD15_UF
MIN_LINE_WIDTH=10 MIN_NECK_WIDTH=10
VOLTAGE=3.3V
+3V_ATI_SS
VOLTAGE=3.3V
MIN_LINE_WIDTH=10 MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=10
VOLTAGE=1.8V
+1_8V_GPU_AVDDQ
VOLTAGE=2.5V
MIN_LINE_WIDTH=10 MIN_NECK_WIDTH=10
+2_5V_GPU_MCLK
VOLTAGE=1.8V
+1_8V_GPU_PNLIO
MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10
VOLTAGE=1.8V
+1_8V_GPU_PNLPLL
VOLTAGE=1.8V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
+1_8V_GPU_AVDD
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
VOLTAGE=2.5V
+2_5V_GPU_A2VDD
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
VOLTAGE=1.2V
GPU_VCORE_VDDCI
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
VOLTAGE=1.8V
+1_8V_GPU_VDDDI
VOLTAGE=1.8V
MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10
+1_8V_GPU_PLL
VOLTAGE=1.5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
+1_5V_GPU_VDD15
VOLTAGE=1.5V
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10
+1_5V_AGP_GPU
VOLTAGE=1.8V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
+1_8V_ATI_PVDD
VOLTAGE=1.5V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+1_5V_AGP
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=2.5V
VOLTAGE=5V
+VPP_CBUS_SW
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=2.5V
GPU_MEM_IO
VOLTAGE=2.5V
+2_5V_GPU
MIN_LINE_WIDTH=8
VOLTAGE=0V
VCORE_GNDSNS
MIN_LINE_WIDTH=8
VOLTAGE=0V
VCORE_GNDDIV
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=30
VOLTAGE=0V
1778_GND
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
VOLTAGE=5V
1778_BST_RC
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
1778_TG
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
1778_BG
VOLTAGE=1.2V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=50
GPU_VCORE_SW
VOLTAGE=1.2V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=50
GPU_VCORE_SW_F
MIN_LINE_WIDTH=8
1778_ION
MIN_LINE_WIDTH=8
1778_ITH
MIN_LINE_WIDTH=8
1778_ITH_RC
MIN_LINE_WIDTH=8
1778_FCB
MIN_LINE_WIDTH=8
1778_VRNG
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=30
VOLTAGE=0V
LTC3411_GND
MIN_LINE_WIDTH=8
1_8V_VFB
MIN_LINE_WIDTH=8
LTC3411_ITH
VOLTAGE=5V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+5V_SLEEP_OPT
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=3.3V
+3V_MAIN_LMU
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
LTC1962_INT_VIN
MIN_LINE_WIDTH=8
LTC3411_SHDN
MIN_LINE_WIDTH=8
LTC3411_SYNC
VOLTAGE=0V
3707_SGND
VOLTAGE=0V
TV_GND2
VOLTAGE=0V
TV_GND1
VOLTAGE=0V
GPU_TV_GND1
VOLTAGE=1.5V
+1_5V_INTREPID_PLL
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=1.5V
+1_5V_MAIN
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15
VOLTAGE=5V
+5V_DDC_SLEEP
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=3.3V
CPU_AVDD_VIN
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=1.3V
CPU_VCORE_SLEEP
VOLTAGE=1.25V
DDR_VREF
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=2.5V
GPU_MEM_IO_FLT
VOLTAGE=3.3V
MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+3V_GPU_FLT
VOLTAGE=1.2V
MIN_LINE_WIDTH=30 MIN_NECK_WIDTH=10
GPU_VCORE
VOLTAGE=3.3V
+3V_GPU
VOLTAGE=1.8V
+1_8V_GPU
VOLTAGE=2.5V
+2_5V_GPU_PNLIO
VOLTAGE=1.8V
+1_8V_GPU_MEMPLL
VOLTAGE=3V
+3V_SLEEP_NECK
VOLTAGE=1.8V
+1_8V_PVDD_NECK
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
VOLTAGE=1.8V
+1_8V_ATI_TPVDD
33 16
21
15
20
16
8
19
39
21
15
39
7
16
14
33
39
20
21
39
39
31
32
39
39
39
28
29
32
28
39
39
31
39
38
38
39
10
31
39
39
6
32
32
39
19
33
39
21
15
21
39
39
12
39
6
20
19
20
27
18
20
33
33
33
33
33
33
31
31
29
31
21
20
33
33
22
22
22
22
22
22
25
27
27
27
27
28
28
27
27
27
28
27
28
25
31
31
24
24
27
27
27
28
28
33
33
33
34
34
34
34
34
34
34
34
34
34
34
34
34
32
32
32
32
32
30
31
31
31
8
12
14
14
27
27
23
39
14
14
30
30
9
5
12
39
39
23
34
34
34
31
31
14
39
9
30
30
30
30
30
39
30
34
30
34
30
27
23
39
14
30
30
5
5
22
25
25
25
39
39
39
39
12
9
13
39
33
14
33
33
33
20
20
34
34
34
30
30
30
18
28
17
17
26
26
26
26
34
34
34
20
20
20
20
20
19
19
21
21
21
21
21
21
19
21
21
20
21
20
12
21
18
19
33
33
20
20
20
20
20
20
20
20
20
20
34
34
34
24
23
14
34
34
32
22
22
22
8
22
5
5
11
21
21
19
12
19
21
21
34
20
21
IN
IN
IN
IN IN
IN IN
IN
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
GROUP
INVERTER
ETHERNET
FIREWIRE
BATTERY
TRACKPAD
MODEM/ SERIAL
KEYBOARD
OPTICAL
LVDS
S-VIDEO
LISTS THE NUMBER OF TEST POINTS ON THAT NET AND WITHIN THAT GROUP/CONNECTOR.
CARDBUS DVI
LIO
SCAN/TEST
SIG_NAME
FUNC_TEST
FUNC_QTY
FUNC_DIST
USB
GROUP
SIG_NAME
FUNC_TEST
FUNC_QTY
FUNC_DIST FUNC_DIST
FUNC_QTY
FUNC_TEST
SIG_NAME
GROUP
(CONT.)
(100 MIL PROBE PREFERRED)
INT I2C
PWR/GND
WIRELESS
(100 MIL PROBE PREFERRED)
FUNC_DIST IS SIMILARLY USED TO DEFINE MAXIMUM DISTANCE FROM A CONNECTOR.
FUNC_TEST IS ONLY PROPERTY USED BY THE TOOLS. FUNC_QTY IS FOR REFERENCE AND
PROBES ARE ON BOTTOM SIDE. MINIMUM PAD/HOLE SIZE IS 25 MIL.
FUNCTIONAL TEST POINTS
RT. USB
FANS
(100 MIL PROBE PREFERRED)
(100 MIL PROBE PREFERRED)
FIREWIRE
MISC.
LMU/ALS
DC PWR IN
I1
I10
I100
I101
I102
I103
I104
I105
I106
I107
I108
I109
I11
I110
I111
I112
I113
I114
I115
I116
I117
I118
I119
I12
I120
I121
I123
I124
I125
I126
I127 I128 I129
I13
I130
I131
I132
I133
I134
I135
I136
I137 I138 I139
I14
I140
I141
I142
I143
I144
I145
I146
I147
I148
I149
I15
I150
I151
I152
I153
I154
I155
I156
I157
I158
I159
I16
I160
I161
I162
I163
I164
I166
I167 I168 I169
I17
I170 I171
I173
I174
I176
I177
I178
I179
I18
I180
I181
I182
I183
I184
I185
I186 I187 I188
I189
I19
I192 I195 I196
I197
I198
I2
I20
CHGND1
I21
I215 I216
I217 I218 I219 I220 I221
I222
I223
I224 I225 I226
I229 I230
I24
CHGND4
I248
I249
I25
I250
I251
I252
I253
I26
I27
I3
I35
I36
I37 I38
I39
I4
I40
I41
I42
I43
I44
I45
I46
I47 I48 I49
I5
I51
I52
I53
I54
I55
I56
I57
I58 I59
I6
I60 I62
I66
I67
I68
I7
I70
I71
I72
I73 I74
I75
I76
I77
I78
I79
I8
I80
I81
I82
I83
I84 I85 I86
I87 I88 I89
I9
I90
I94
I95
I96
I97 I98 I99
B
4439
051-6809
6
1000
TRUE
TRUE
2000
2
1000
TRUE
6
1000
TRUE
TRUE
1000
6
1000TRUE
TRUE
2000
2 6
1000
TRUE
TRUE
1000
FW_TPI1P
1000
TRUE
TRUE
PMU_SLEEP_LED
TRUE
ST7_SLEEP_LED_H
1000
TRUE
FW_TPO1P
+FW_VP1
TRUE
1000
FW_VGND
TRUE
1000
TRUE
PMU_LID_CLOSED_L
1000
TRUE
PCI_AD<0..31>
TRUE
PCI_FRAME_L
1000
TRUE
PMU_KB_RESET_L
SLEEP_LED
TRUE
PMU_CPU_HRESET_L
TRUE
SLEEP
TRUE
TRUE
LMU_DETECT
TRUE
+3V_PMU_RESET
TRUE
BB_RESET_L
3000
TRUE
KBD_SHIFT_L
MDI_P<0..3>
1000
TRUE
TRUE
KBD_OPTION_L
3000
TRUE
KBD_INTL
3000
TRUE
KBD_JIS
3000
VCORE_FB
TRUE
PCI_STOP_L
TRUE
1000
TRUE
1000
TRUE
BT_USB_DM
MODEM_USB_DM
TRUE
NEC_RUSB_PPON
TRUE
TRUE
PCI_PAR
1000
INT_TST_MONIN_PD
TRUE
TV_Y
TRUE
2000
TRUE
TPAD_F_TXD
3000
TRUE
+5V_TPAD_SLEEP
3000
EIDE_OPTICAL_INT
TRUE
2000
TRUE
2000
EIDE_OPTICAL_CS0_L
EIDE_OPTICAL_ADDR<0..2>
TRUE
2000
TRUE
2000
EIDE_OPTICAL_DMA_RQ
2000
TRUE
EIDE_OPTICAL_DMAACK_L
TRUE
2000
ROM_ONBOARD_CS_L
TRUE
1000
TRUE
PCI_TRDY_L
1000
TRUE
PCI_IRDY_L
1000
TRUE
PCI_DEVSEL_L
1000
EIDE_OPTICAL_DATA<0..15>
TRUE
2000
TRUE
KBD_X<0..9>
3000
TRUE
KBD_Y<0..7>
3000
TRUE
+BATT_POS
1000
TRUE
BATT_CLK
1000
+FAN_PWR
3000
TRUE
TRUE
BATT_NEG
1000
KBD_COMMAND_L
TRUE
3000
TRUE
KBD_FUNCTION_L
3000
TRUE
FAN1_TACH
3000
PMU_BATT_DET_L
TRUE
1000
MDI_M<0..3>
1000
TRUE
1000
TRUE
FW_TPO0P
1000
TRUE
FW_TPI0N
TRUE
INT_JTAG_TEI
TRUE
INT_TST_PLLEN_PD
TRUE
MODEM_USB_DP
TRUE
TRUE
INT_I2C_CLK2
1000
1000
TRUE
NEC_LUSB_PPON
INT_I2C_CLK1
TRUE
INT_I2C_DATA0
TRUE
2
2000
+3V_LCD
TRUE
1000
TRUE
INT_I2S0_SND_LRCLK
TV_GND2
2000
TRUE
SND_AMP_MUTE
TRUE
1000
2
TRUE
+5V_MAIN
2
2000
TRUE
+5V_MAIN
2
TRUE
+5V_SLEEP
3000
2
TRUE
+5V_SLEEP
TRUE
KBD_NUMLOCK_LED
3000
2000
TRUE
+3V_SLEEP
1000
TMDS_DN<0..2>
TRUE
TRUE
+5V_DDC_SLEEP
2000
4
TRUE
+3V_MAIN
2000
CBUS_DET_1_L
TRUE
TMDS_CONN_CLKP
TRUE
1000
VGA_VSYNC
TRUE
1000
TRUE
+3V_PMU
1000
TMDS_DP<0..2>
TRUE
2000
CBUS_DET_2_L
TRUE
TMDS_CONN_CLKN
TRUE
1000
TRUE
INT_I2C_DATA2
1000
SND_LIN_SENSE_L
1000
TRUE
SND_HP_SENSE_L
TRUE
1000
1000
SND_HW_RESET_L
TRUE
TRUE
SND_HP_MUTE_L
1000
TRUE
1000
INT_I2S0_SND_FROM_ADC
TRUE
1000
INT_I2C_DATA1
TRUE
INT_I2C_CLK0
TRUE
TRUE
+ADAPTER
3
1000
1000
FW_TPO1N
TRUE
FW_TPI1N
1000
TRUE
CLK33M_AIRPORT
TRUE
1000
TRUE
1000
NEC_RUSB_OCI_UF
TRUE
TRUE
BT_USB_DP
TRUE
NEC_USB_DBP
TRUE
NEC_USB_DBM
TRUE
NEC_USB_DAP
TRUE
NEC_USB_DAM
JTAG_CPU_TRST_L
TRUE
TRUE
LVDS_DDC_DATA
1000
TRUE
LVDS_DDC_CLK
1000
TRUE
LVDS_L2P
1000
TRUE
LVDS_L2N
1000
TRUE
LVDS_L1P
1000
TRUE
LVDS_L0P
1000
DVI_DDC_CLK_UF
TRUE
1000
VGA_HSYNC
1000
TRUE
VGA_B
1000
TRUE
VGA_R
TRUE
1000
CPU_VCORE_SLEEP
TRUE
GPU_VCORE
TRUE
1778_VFB
TRUE
1000
CHARGE_LED_L
TRUE
ADAPTER_DET
1000
TRUE
1000
TRUE
INT_I2S0_SND_TO_DAC
1000
TRUE
TV_GND1
TRUE
2000
TV_COMP
TRUE
2000
+PBUS
TRUE
+24V_PBUS
TRUE
TRUE
+1_8V_MAIN
TRUE
+2_5V_MAIN
2000
TRUE
+3V_SLEEP
1000
TRUE
ROM_RW_L
AIRPORT_CLKRUN_L
TRUE
1000
TRUE
2000
EIDE_OPTICAL_CS1_L
2000
EIDE_OPTICAL_RST_L
TRUE
TRUE
SOFT_PWR_ON_L
3000
TRUE
+3V_HALL_EFFECT
3000
TRUE
COMM_SHUTDOWN
4000
TRUE
COMM_RESET_L
4000
TRUE
COMM_RING_DET_L
4000
COMM_TXD_L
TRUE
4000
COMM_TRXC
TRUE
4000
COMM_GPIO_L
TRUE
4000
COMM_RTS_L
TRUE
4000
COMM_DTR_L
TRUE
4000
TRUE
KBD_ID
3000
COMM_RXD
TRUE
4000
TRUE
KBD_CAPSLOCK_LED
3000
3000
TRUE
KBD_CONTROL_L
TRUE
BATT_DATA
1000
TRUE
FAN2_TACH
3000
TRUE
FAN1_GND
3000
TRUE
FAN2_GND
3000
1000
TRUE
FW_TPO0N
1000
TRUE
FW_TPI0P
FW_TPO0R
1000
TRUE
1000
TRUE
+FW_VP0
1000
TRUE
FW_VGND
TRUE
1000
MAIN_RESET_L
NEC_LUSB_OCI_UF
1000
TRUE
ROM_OE_L
TRUE
1000
TRUE
2000
4
+3V_AIRPORT
TRUE
2000
EIDE_OPTICAL_IOCHRDY
TRUE
CLKLVDS_LN
1000
TRUE
LVDS_L0N
1000
TRUE
LVDS_L1N
1000
TRUE
CLKLVDS_LP
1000
TV_C
TRUE
2000
TRUE
+14V_INV
2000
TRUE
+5V_INV_SW
2000 2000
BRIGHT_PWM
TRUE
INV_GND
2000
TRUE
CPU_SRESET_L
TRUE
JTAG_ASIC_TCK
TRUE
JTAG_ASIC_TMS
TRUE
JTAG_CPU_TMS
TRUE
JTAG_ASIC_TDI
TRUE
TRUE
JTAG_CPU_TDI
RF_DISABLE_L
TRUE
1000
JTAG_ASIC_TRST_L
TRUE
CPU_CHKSTP_OUT_L
TRUE
CPU_HRESET_L
TRUE
JTAG_CPU_TCK
TRUE
JTAG_ASIC_TDO_TP
TRUE
JTAG_CPU_TDO_TP
TRUE
PMU_PME_L
TRUE
1000
ROM_CS_L
TRUE
1000
VGA_G
TRUE
1000
TRUE
DVI_HPD_UF
1000
DVI_DDC_DATA_UF
1000
TRUE
TRUE
2000
EIDE_OPTICAL_READ_L
TRUE
TPAD_F_RXD
3000 3000
LID_CLOSED_L
TRUE
37
29
24
37
34
37
37
37
37
37
24
18
24
32
24
24
24
24
24
23
23
38
33
19
29
17
18
29
18
37
37
18
18
18
18
37
37
37
25
13
37
37
25
13
38
35
37
37
37
37
37
37
37
37
37
33
38
35
29
29
37
37
18
37
37
37
37
7
24
24
37
37
38
29
12
17
29
25
33
29
37
29
38
17
24
25
25
25
17
38
37
37
37
37
37
37
17
17
17
37
29
29
38
38
38
29
29
30
37
28
28
25
25
25
14
11
38
25
38
39
39
39
39
39
22
38
38
36
22
36
25
25
25
25
25
25
25
14
11
31
37
37
24
24
25
25
25
25
25
25
6
22
22
22
22
22
22
6
20
38
29
29
25
25
38
39
12
37
37
23
38
25
25
25
25
25
25
25
25
29
25
29
28
28
38
17
25
12
37
22
22
22
22
38
38
26
26
6
6
26
6
6
17
12
37
12
28
23
23
28
28
39
23
9
12
29
23
6
23
23
29
6
23
26
23
23
23
33
12
12
14
14
17
12
13
22
23
23
24
24
24
24
24
24
9
12
12
12
24
23
23
30
30
25
30
23
23
25
29
26
27
27
13
13
13
14
14
17
13
6
22
14
22
25
38
38
38
38
23
38
19
22
23
18
22
22
38
19
18
22
14
14
14
14
14
14
14
13
6
30
28
28
12
14
17
14
17
17
17
17
5
20
20
20
20
20
20
22
22
22
22
5
19
20
25
25
14
14
22
22
38
38
38
38
38
9
24
24
24
22
23
14
14
14
14
14
14
14
14
23
14
23
23
30
25
38
38
27
27
28
28
39
14
17
9
38
24
20
20
20
20
22
22
22
22
22
5
13
13
5
13
5
24
13
5
5
5
26
5
14
9
22
22
22
24
23
23
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
07/08/05 - Replaced 740S0006 with 740S0018 (FUSE,1.5A,24V,SMD,LF) at F3 07/19/05 - Corrected symbols for 337S2838 (MPU),132S0021 (0.47uF,10%) and 138S0511 (2.2uF,10%)
07/08/05 - Added 337S2913 (IC,A7PM,1.33GHZ,1.18VCORE) as an option
05/27/04 - 1. Updated BOM : 113S0006 -> 113S1000
Production Release (Rev. C - 051-6653)
Production Release (Rev. A - 051-6653)
04/09/04 - 2. Updated to production BootROM part number (Pg 9)
04/02/04 - 1. USB series termination near NEC PHY change to 43.2 ohm (Pg 17)
PVT Release (Rev. A)
03/11/04 - 1. INT. TMDS Termination change to 2* 75 ohm = 150ohm (except CLK pair) (Pg 20)
2. USB series termination near NEC PHY change to 47 ohm (Pg 17)
PVT Release (Rev. A - 051-6570)
4. AGP I/O VREF voltage divider chagne to both 1K ohm (Pg 12)
2. CPU AVDD adjustment for V1.1 A7PM CPU (Pg 5)
02/13/04 - 1. INT. TMDS Termination change to 2* 49.9ohm = 100ohm (Pg 20)
2. Connect INT_TDO from Intrepid to Marvell 88E1111(U43)
DVT Release (Rev. 02)
DVT Release (Rev. 04)
02/04/04 - 1. C811 change to 4.7uF per MOT A7PM requirement (Pg 5)
01/30/04 - 1. Add Soft_Modem(Pin#14) 10K pull-up at J15.7 (Pg 25)
12/17/03 - 1. Change LDO Vin from +3V_MAIN to +3V_SLEEP
4. Change R402 and R409 to 4.7ohm resistors
12/02/03 - 1. Modify CPU_BTR CPU_VCORE VID setting
12/01/03 - 1. Modify CPU_VCORE setting.
14. Change R748 from 410 ohm to 10 ohm
8. Connect TEMP_ANODE and TEMP_CATHODE to ADT7460
DVT Release (Rev. 03)
02/12/04 - 1. CPU VCore adjustment for V1.1 A7PM CPU (Pg 33)
3. ATI INT.TMDS termination change to 0 ohm, Qty:8 (Pg 20)
2. NO STUFF R236,R1,R271&R194 to remove PCI stub (Pg 9)
3. Modify LDO power sequence
7. Add 4 pcs 0 ohm resistor for AMD BootRom issue (R1,R194,R236,R271)
REVISION HISTORY
12/16/03 - 1. Add 10K pull down for INT_TDO on page 13
5. Connect INT_TDO from intrepid to Cypress Chip PD* (U31)
12/05/03 - 1. Add CPU AVDD LDO (Page 5)
2. Modify CPU_VCORE setting to Motorola new spec
5. Connect SENSEVDD to CPU_VCORE_SLEEP
2. Add Bom Table for R97 2.21K ohm VCore Offset (Pg 33)
13. Change C774,C781,C788,C793,C797,C802 from 220uF to 330uF
2.5V adjust
10. Add 0 ohm resistor on CG_FSEL Interpid side(R450)
2. Connect OVDDSENSE to MAXBUS_SLEEP
11/10/03 - 1. Replace U56 symbol
3. Modify SRW0, SRW1 and IARTRY0 connection
6. Connect SENSEGND to GND
MAX1715
4. Connect VDD(Page 6) to CPU_VCORE_SLEEP(PAGE 5)
9. Modify CPU PLL config
11. Replace U47 symbol
12. Change R743 from 2m ohm to 1m ohm
3. Change Q47 and Q42 to IRF7811W (376S0104)
2. Change Q45 and Q41 to IRF7805 (376S0035)
10/27/03 - 1. Schematic originated from Q16 MLB
Proto/EVT Release
Add R468 and R601 for
12/12/03 - 1.
3. Add R755,R756,R758,R759 for power rail
04/09/04 - 1. Updated to Apollo 7PM rev 1.1.1 part numbers (Pg 5)
04/30/04 - 3. Use new VGA filter to remove ghost image on external VGA display (Pg 22)
04/30/04 - 2. Add ATI M11 A16 parts as alternative for A15 parts (Pg 19-21)
Production Release (Rev. B - 051-6653)
04/30/04 - 1. Updated to Fast Intrepid part for 6A ReadMacro Delay value (Pg 8-15)
05/27/04 - 2. Updated BOM : 132S0020 -> 132S0100
07/08/05 - Added label for EEE:SQE
Production Release (Rev. B - 051-6809)-- mergered with 051-6808
07/07/05 - Added 338S0223 (88E1111 Rev.B1) at U43 and 338S0079 as an alternate
051-6809
40 44
B
A
D
C
B
A
D
C
B
8 7
6
5
4
3
2 1
8
7 6
5
4
3
2
1
41
*** Signal Cross-Reference for the entire design ***
+1_0V_MARVELL 26D2< 38B3> +1_5V_AGP 12B5< 12D1< 12D4< 15D6< 16C8<
19C6< 19D6< 20A8< 20B4<> 20D5<>
21B8< 21D6< 38C3> +1_5V_AGP_GPU 21C5< 38C3> +1_5V_AGP_NECK 20B4<> 38B3> +1_5V_GPU_VDD15 20D3< 38C3> +1_5V_INTREPID_PLL 8D6< 12D4< 12D8< 14D6<> 38D3> +1_5V_INTREPID_PLL1 14C3< 38D3> +1_5V_INTREPID_PLL2 14D3< 38D3> +1_5V_INTREPID_PLL3 14D3< 38D3> +1_5V_INTREPID_PLL4 14D3< 38D3> +1_5V_INTREPID_PLL5 12D3< 38D3> +1_5V_INTREPID_PLL6 12D6< 38D3> +1_5V_INTREPID_PLL7 8D5< 38D3> +1_5V_INTREPID_PLL8 14D3< 38C3> +1_5V_LDO 38D6> +1_5V_MAIN 38D6> +1_5V_SLEEP 38D6> +1_5V_SLEEP_NECK 34D2<> 38B3> +1_5V_SLEEP_VIN 38D6> +1_8V_ATI_PVDD 20C5<> 21B6< 21B6< 21D6<> 38C3> +1_8V_ATI_TPVDD 21D2<> 38B3> +1_8V_GPU 19A8< 19C2< 20D7< 21A2< 21A6<
21B1< 21B6< 21C8< 21D6< 21D8< 38C3> +1_8V_GPU_AVDD 21D5< 38B3> +1_8V_GPU_AVDDQ 21D4< 21D7< 38B3> +1_8V_GPU_DVO 21B2< +1_8V_GPU_MEMPLL 21B5< 38B3> +1_8V_GPU_PLL 21D5< 38C3> +1_8V_GPU_PNLIO 21A5< 38B3> +1_8V_GPU_PNLPLL 21B5< 38B3> +1_8V_GPU_TP_PLL 21B5< 21D1< 38B3> +1_8V_GPU_VDDDI 21C7< 21D4< 38C3> +1_8V_MAIN 38D6> 39C6> +1_8V_PVDD_NECK 20B5<> 38B3> +1_8V_SLEEP 38D6> +1_8V_SLEEP_NECK 34D2<> 38B3> +1_95V_FW_DVDD 27C4< 27C7<> 27D5< 38A3> +1_95V_FW_DVDD_PORT1 27D6< 38A3> +1_95V_FW_DVDD_RX0 27C5< 38A3> +1_95V_FW_DVDD_TX0 27C5< 38A3> +1_95V_FW_PLL400VDD 27C4< 38A3> +1_95V_FW_PLL500VDD 27D4< 38A3> +1_95V_FW_PLLVDD 27D4< 27D6<> 38A3> +2_5V_CG_MAIN 14C6< +2_5V_GPU 38C3> +2_5V_GPU_A2VDD 21D4< 21D7< 38B3> +2_5V_GPU_MCLK 21C7< 21D4< 38B3> +2_5V_GPU_MEMCORE 21C5< 38C3> +2_5V_GPU_PNLIO 21A5< 38C3> +2_5V_INTREPID 9A7< 10D3< 10D5< 10D6< 10D8< 15D6<
16B8< 38D3> +2_5V_MAIN 38D6> 39C6> +2_5V_MARVELL 26B8< 26C4<> 38B3> +2_5V_MARVELL_AVDD 26C4< 38B3> +2_5V_SLEEP 38D6> +2_5V_SLEEP_NECK1 20C4<> 38B3> +2_5V_SLEEP_NECK2 34D2<> 38B3> +3V_AIRPORT 38C3> 39C3> +3V_ATI_OSC_SLEEP 19B2< 38B3> +3V_ATI_SS 19A3< 38B3> +3V_CG_PLL_MAIN 14C6< +3V_FW 27A3< 27D7<> 28D5< 38A3> +3V_FW_AVDD 27C6< 38A3> +3V_FW_AVDD_PORT0 27C6< 38A3> +3V_FW_AVDD_PORT1 27C6< 38A3> +3V_FW_AVDD_PORT2 27D6< 38A3> +3V_FW_ESD 28B4<> 28D3<> +3V_FW_ESD_ILIM 28D4< +3V_FW_UF 27D7<> 38A3> +3V_GPU 12D1< 19B8< 19C6< 19C8< 19D6<
20C4< 20C5< 20C7< 20D7< 21A6< 21B1<
38C3> +3V_GPU_FLT 21B2< 38C3> +3V_HALL_EFFECT 23B4<> 38B6> 39B3> +3V_INTREPID_USB 14C3< 38D3> +3V_LCD 22B4<> 38B6> 39B6> +3V_LCD_SW 22B4<> 38B6> +3V_MAIN 23B7<> 38D6> 39C6> +3V_MAIN_AUD 25C6<> 32C1<> 38B6> +3V_MAIN_JUMPER 38D1> +3V_MAIN_LMU 23D7<> 38A1> +3V_MAIN_SSCG 38A1> +3V_NEC_VDD 17B3< 17D7< 17D7< 38A3> +3V_PMU 38D6> 39C6> +3V_PMU_AVCC 25B1< 29B6< 29D5<> 38C6> +3V_PMU_ESR 31A2< 38C6> +3V_PMU_RESET 29B7< 33A4<> 39C1> +3V_SI_AVCC 19D3< +3V_SI_PLLVCC 19D3< +3V_SI_VCC 19D3< +3V_SLEEP 38D6> 39A6> 39B6> +3V_SLEEP_NECK 34D1<> 38B3> +3V_SLEEP_PCCARD 18D7< 38C3> +3V_SLP_OK_L 32B4<> +3V_SLP_ON 32A5<> +4_6V_BU 31B3<> 32B7< 38C6> +4_85V_ESR 31A4< 38C6> +4_85V_RAW 29A5< 31B4<> 38C6> +5V_DDC_SLEEP 22D3<> 22D5<> 38B6> 39B6> +5V_DDC_SLEEP_UF 22D6< 38B6> +5V_HD_SLEEP 24D1<> 32A7<> 38C6> +5V_INV_SW 22B2<> 38B6> 39A6> +5V_INV_UF_SW 22B2<> 38B6> +5V_MAIN 38D6> 39A6> 39C6> +5V_MAIN_AUD 25C6<> 32C8<> 38B6> +5V_MAIN_JUMPER 38D1> +5V_SLEEP 38D6> 39A6> 39C6> +5V_SLEEP_OPT 24B5<> 38A1> +5V_TPAD_SLEEP 23B5<> 38B6> 39B3> +14V_INV 22B2<> 38B6> 39B6> +24V_PBUS 38D6> 39C6> +ADAPTER 30D8<> 31A7< 38C6> 39D1> +ADAPTER_ILIM 31A6<> 38C6> +ADAPTER_OR_BATT 31A5<> 38C6> +ADAPTER_SENSE 30D4<> 38C6> +ADAPTER_SW 30D5<> 38C6> 38C6> +BATT 38D6> +BATT_14V_FUSE 30D1<> 38C6> +BATT_24V_FUSE 30B1< 30D2<> 38C6> +BATT_POS 30A4<> 38C6> 39A3> +BATT_RSNS 30B2< 38C6> +BATT_VSNS 30A4< 38C6> +FAN_PWR 25A3< 25A4< 38B6> 39A3> +FW_AMP_SENSE 38A3> +FW_PBUS 28D7<> 38A3> +FW_PWR1 28C5< 38A3> +FW_PWR_OR 27B8< 27D8<> 28D5<> 38A3> +FW_SW 28D5<> 38A3> +FW_VP0 28C1<> 38A3> 39A3> +FW_VP1 28A3<> 38A3> 39D1> +GPU_VDD15_NECK 20B5<> 38B3> +GPU_VDD15_UF 20B5<> 20D4<> 38B3> +HD_LOGIC_SLEEP 24C2<> 38C6> +PBUS 38D6> 39C6> +PBUS_JUMPER 38D1> +VCC_CBUS_SW 18B1<> 18B2<> 18D2<> 38C3> +VPP_CBUS_SW 18B1<> 18B2<> 18D2<> 38C3> 1V20_REF 30C7< 31C8< 38D1> 1V65_REF 30A5< 1_5V_BOOST 34C6<> 38C1> 1_5V_BST 34C5<> 38C1> 1_5V_DH 34C5<> 38C1> 1_5V_DL 34B5<> 38C1> 1_5V_FB 34B5< 34B7< 38C1> 1_5V_ILIM 34C5<> 38C1> 1_5V_LX 34B5<> 38C1> 1_5V_LX_F 38C1> 1_5V_SLEEP_EN_L 34C7<> 34D7<> 1_8V_PVDD_STD 21D6< 1_8V_SLEEP_PWREN_L 34A3<> 1_8V_SW 34A5<> 38A1> 1_8V_SW_F 38A1> 1_8V_TPVDD_STD 21D1< 1_8V_VFB 34A5<> 38A1> 2_5V_BOOST 34C4<> 38D1> 2_5V_BST 34C4<> 38D1> 2_5V_DH 34C3<> 38D1> 2_5V_DL 34B3<> 38C1> 2_5V_FB 34B4< 2_5V_ILIM 34C5<> 38C1> 2_5V_LX 34B3<> 38D1> 2_5V_LX_F 38D1> 2_5V_SLEEP_PWREN_L 34C2<> 3V_5V_OK 32B4<> 34A8< 34D6<
3V_BG 32C4<> 3V_BOOST 32C4<> 3V_BOOST_ESR 32D3<> 3V_ITH 32C4<> 3V_ITH_RC 32C3< 3V_PMU_VTAP 31B3< 3V_RSNS 32D2< 38D1> 3V_RUNSS 32C4< 3V_SLEEP_PWREN_L 32B3<> 3V_SNSM 32C4< 37A2> 3V_SNSP 32C4< 37A2> 3V_SW 32C4<> 38D1> 3V_TG 32D4<> 3V_VOSNS 32C4<> 5V_BG 32C5<> 5V_BOOST 32C5<> 5V_BOOST_ESR 32D6<> 5V_HD_PWREN 32A8<> 5V_ITH 32C5<> 5V_ITH_RC 32C6< 5V_RSNS 32D7< 38D1> 5V_RUNSS 32C5< 5V_SLEEP_PWREN 32A8<> 5V_SNSM 32C5< 37A2> 5V_SNSP 32C5< 37A2> 5V_SW 32C5<> 38D1> 5V_TG 32C5<> 5V_VOSNS 32C5<> 1625_BG 31C5<> 1625_BST 31C5< 1625_BST_ESR 31C5<> 1625_COMP 30D2< 31C6< 1625_DIV 31C8< 1625_ENABLE 31D7<> 1625_ENABLE_L 31D6<> 1625_EXTVCC 31D5<> 38D1> 1625_FCB 31C6< 1625_INTVCC 31C5<> 38D1> 1625_RUNSS 31C6< 1625_SGND 31B7<> 38D1> 1625_TG 31C5<> 1625_VFB 31B5<> 1625_VIN 31C6< 38D1> 1625_VSW 31C4<> 38D1> 1772_ACIN 30B5< 1772_ACOK_L 30B5<> 30C4<> 1772_BST 30B4<> 1772_BST_ESR 30C3< 1772_CCI 30B5<> 1772_CCS 30B5< 1772_CCV 30B5<> 1772_CCV_RC 30B5< 1772_CELLS 30B4< 1772_CLS 30A4< 1772_CSIN 30B4<> 37A2> 1772_CSIP 30B4<> 37A2> 1772_CSSN 30C5< 37A2> 1772_CSSP 30C5< 37A2> 1772_DCIN 30B5< 38C6> 1772_DHI 30B4<> 1772_DLO 30B4<> 1772_DLOV 30B4<> 38C6> 1772_GND 30A5<> 38C6> 1772_ICHG 30B5<> 1772_ICTL 30B5<> 1772_IINP 30B5< 1772_LDO 30C4<> 38C6> 1772_LX 30B4<> 38C6> 1772_REF 30B5<> 1772_VCTL 30B5< 1778_BG 20A5<> 38B1> 1778_BST 20A5<> 38B1> 1778_BST_RC 20A5< 38B1> 1778_FCB 20A6< 38B1> 1778_GND 20A6< 20A7<> 38B1> 1778_ION 20A5< 38B1> 1778_ITH 20A6<> 38B1> 1778_ITH_RC 20A7< 38B1> 1778_SHDN_L 20A6<> 1778_TG 20A5<> 38B1> 1778_VCC 20A5< 38B1> 1778_VFB 20A2< 20A5< 38B1> 39C6> 1778_VIN 20A5< 38B1> 1778_VRNG 20A6< 38B1> 3405_MODE 26D5< 3405_VFB 26D4<> 3707_FCB 32C5< 3707_FSET 32C5< 3707_INTVCC 32D4<> 38D1> 3707_SGND 32B5<> 38D1> 3707_STBY 32C5<> A29_CLS_ADJ 30A5<> A29_CURRENT_ADJ 30C4<> A29_DETECT 29A2< 30A5<> 30C4<> A29_DET_L 29A3< A29_DET_REF 29A4< AC_DIV 30C7< AC_ENABLE_GATE 30D6<> AC_ENABLE_L 30C5<> AC_GTR_18V 30C3<> AC_IN 26B8<> 28C8< 29B3< 30C5<> 30C6<> AC_IN_FW_CNTL 28C7<> AC_IN_L 30C2<> 30C6<> AC_IN_L_RC 30C2<> ADAPTER_DET 25D8<> 29A4< 39A6> ADAPTER_I_REG 30D3<> ADT7460_ADR_ENABLE_L 25B3<> ADT7460_TACH3_TP 25B3< ADT7460_THERM_L 25B2<> 25B3<> ADT7460_VCC 25C4< ADT7460_VCORE_MON 5C8<> 25B4<> AGP8X_DET_PU 19C6<> AGP_AD<0> 12D2<> 19C7<> AGP_AD<15..0> 37D5> AGP_AD<1> 12C2<> 19C7<> AGP_AD<2> 12C2<> 19C7<> AGP_AD<3> 12C2<> 19C7<> AGP_AD<4> 12C2<> 19C7<> AGP_AD<5> 12C2<> 19C7<> AGP_AD<6> 12C2<> 19C7<> AGP_AD<7> 12C2<> 19C7<> AGP_AD<8> 12C2<> 19C7<> AGP_AD<9> 12C2<> 19C7<> AGP_AD<10> 12C2<> 19C7<> AGP_AD<11> 12C2<> 19C7<> AGP_AD<12> 12C2<> 19C7<> AGP_AD<13> 12C2<> 19C7<> AGP_AD<14> 12C2<> 19C7<> AGP_AD<15> 12C2<> 19C7<> AGP_AD<16> 12C2<> 19C7<> AGP_AD<31..16> 37D5> AGP_AD<17> 12C2<> 19C7<> AGP_AD<18> 12C2<> 19C7<> AGP_AD<19> 12C2<> 19C7<> AGP_AD<20> 12C2<> 19C7<> AGP_AD<21> 12C2<> 19C7<> AGP_AD<22> 12C2<> 19C7<> AGP_AD<23> 12C2<> 19C7<> AGP_AD<24> 12C2<> 19C7<> AGP_AD<25> 12C2<> 19C7<> AGP_AD<26> 12C2<> 19D7<> AGP_AD<27> 12B2<> 19D7<> AGP_AD<28> 12B2<> 19D7<> AGP_AD<29> 12B2<> 19D7<> AGP_AD<30> 12B2<> 19D7<> AGP_AD<31> 12B2<> 19D7<> AGP_AD_STB<0> 12A2<> 12B2< 19D6<> 37D5> AGP_AD_STB<1> 12A2<> 12B2< 19D6<> 37D5> AGP_AD_STB_L<0> 12A2<> 12B2< 19D6<> 37D5> AGP_AD_STB_L<1> 12A2< 12A2<> 19D6<> 37D5> AGP_ATI_INT_L 14B5<> 19B7<> AGP_ATI_RESET_L 19B7< AGP_ATI_VREF 19B7< AGP_ATI_VREFG 19B7< AGP_BUSY_L 12C4<> 12D2< 19D6> AGP_CBE<0> 12B2<> 19B7<> AGP_CBE<1..0> 37D5> AGP_CBE<1> 12B2<> 19B7<> AGP_CBE<2> 12B2<> 19B7<> AGP_CBE<3..2> 37D5> AGP_CBE<3> 12B2<> 19B7<> AGP_DEVSEL_L 12B2<> 12C2< 19B7<> 37D5> AGP_FRAME_L 12B2<> 12C2< 19B7<> 37D5> AGP_GNT_L 12C2< 12D2<> 19B7< 37D5> AGP_IRDY_L 12B2<> 12C2< 19B7<> 37D5> AGP_PAR 12B2<> 19B7> 37D5> AGP_PIPE_L 12A2<> 12B2< AGP_RBF_L 12A2<> 12C2< 19C6> 37C5>
AGP_REQ_L 12C2< 12D2<> 19B7<> 37D5> AGP_SBA<0> 12B2< 19C6> AGP_SBA<7..0> 37D5> AGP_SBA<1> 12B2<> 19C6> AGP_SBA<2> 12B2<> 19C6> AGP_SBA<3> 12B2<> 19C6> AGP_SBA<4> 12B2<> 19C6> AGP_SBA<5> 12B2<> 19C6> AGP_SBA<6> 12B2<> 19C6> AGP_SBA<7> 12B2<> 19C6<> AGP_SB_STB 12B2< 12B2<> 19C6<> 37D5> AGP_SB_STB_L 12A2< 12A2<> 19C6<> 37D5> AGP_ST<0> 12A2<> 19C6< AGP_ST<1> 12A2<> 19C6< AGP_ST<2> 12A2<> 19C6< AGP_STOP_L 12B2<> 12C2< 19B7<> 37D5> AGP_STP_L 19C6< AGP_SUS_STAT_L_PU 19C6< AGP_TRDY_L 12B2<> 12C2< 19B7<> 37D5> AGP_WBF_L 12A4<> 12B2< 19B7> AIRPORT_CLKRUN_L 24C6<> 39C3> AIRPORT_IDSEL 24C5<> AIRPORT_PCI_GNT_L 12D7<> 24D5<> 39C3> AIRPORT_PCI_INT_L 14B5<> 14D7< 24D5<> 39C3> AIRPORT_PCI_REQ_L 12A7< 12D7<> 24D6<> 39C3> ATI_AGP_FBSKEW<0> 20C2< 20C7<> ATI_AGP_FBSKEW<1> 20C2< 20C7<> ATI_BUS_CFG<0> 20B2< 20C7<> ATI_BUS_CFG<1> 20B2< 20C7<> ATI_BUS_CFG<2> 20B2< 20C7<> ATI_CLK27M_IN 19A2< 20B7< 35B1> ATI_CLK27M_OSC 19A2< 35B1> ATI_CLK27M_OSC_SS 19A1< 19A4< 35B1> ATI_DBI_HI_PU 19C6<> ATI_DBI_LO_PU 19C6<> ATI_DVOD<0> 19B4< 20D7<> ATI_DVOD<11..0> 36C1> ATI_DVOD<1> 19B4< 20D7<> ATI_DVOD<2> 19B4< 20D7<> ATI_DVOD<3> 19B4< 20D7<> ATI_DVOD<4> 19B4< 20D7<> ATI_DVOD<5> 19B4< 20D7<> ATI_DVOD<6> 19B4< 20D7<> ATI_DVOD<7> 19B4< 20D7<> ATI_DVOD<8> 19B3< 20D7<> ATI_DVOD<9> 19B3< 20D7<> ATI_DVOD<10> 19B3< 20D7<> ATI_DVOD<11> 19B3< 20D7<> ATI_DVOD_DE 19B3< 20C7<> 36C1> ATI_DVOVMODE 21A3< ATI_DVO_CLKP 19B3< 20C7<> 36C1> ATI_DVO_HSYNC 19B3< 20C7<> 36C1> ATI_DVO_VSYNC 19B3< 20C7<> 36C1> ATI_GPIO7_SPN 20C7<> ATI_GPIO8_PD 20C7<> ATI_GPIO9_SPN 20C7<> ATI_GPIO10_SPN 20C7<> ATI_GPIO11_SPN 20C7<> ATI_GPIO12_SPN 20C7<> ATI_GPIO13_SPN 20C7<> ATI_HSYNC 20D5<> 22D8< ATI_HSYNC_BUF 22D8<> ATI_MEMTEST 19A6<> ATI_MEMVMODE0 19A7< ATI_MEMVMODE1 19A7< ATI_OSC_OE 19A3< ATI_PVDD_BYP 21D6<> ATI_R2SET 20D6<> ATI_RSET 20D6<> ATI_RSTB_MSK 19C6<> ATI_SSCLK_IN 19A2< 20B7<> 35B1> ATI_SSCLK_UF 19A2<> 35B1> ATI_TESTEN 20B7< ATI_TMDS_CLKN 20B7> 20B8< 37B2> ATI_TMDS_CLKP 20B7> 20B8< 37B2> ATI_TMDS_DN<0> 20B7> 20B7< 37B2> ATI_TMDS_DN<1> 20B7> 20B8< 37B2> ATI_TMDS_DN<2> 20B7< 20B7> 37B2> ATI_TMDS_DP<0> 20B7< 20B7> 37B2> ATI_TMDS_DP<1> 20B7> 20B8< 37B2> ATI_TMDS_DP<2> 20B7< 20B7> 37B2> ATI_TPVDD_BYP 21D1<> ATI_VSYNC 20D5<> 22D8< ATI_VSYNC_BUF 22D8<> ATI_X1CLK_SKEW<0> 20C2< 20C7<> ATI_X1CLK_SKEW<1> 20B2< 20C7<> AUD_GND 25C8<> 38B6> AUXWIN_PU 20C6<> BATTV_HIGH 30B7<> BATTV_LOW 30B8<> BATT_14PBUS_EN 30C1<> BATT_14V_GATE 30C1<> BATT_24PBUS_EN 30C2<> BATT_24V_GATE 30C1<> BATT_CLK 30A4<> 39A3> BATT_DATA 30A4<> 39A3> BATT_DIV 30A5< BATT_LOW 30A6<> BATT_LOW_L 30B6<> BATT_NEG 30A4<> 38C6> 39A3> BBANG_HRESET_L 6A2< 6B3<> BBANG_JTAG_TCK 6A4< 6B2<> 6C2< BBANG_TCK_EN 6A4< BB_EEPR_ADDR 6C2< 6D3< BB_EEPR_WP_PD 6D2<> BB_MISO 6B3<> 6C2< BB_MOSI 6B3<> 6C2< BB_RESET_L 6C3< 39C1> BB_SCK 6B3<> 6C2< BB_XTAL1_SPN 6C3<> BFR_TDO 6C2< 6C2<> BKFD_PROT_EN_L 30C5<> BKFD_PROT_GATE 30D5<> BRIGHT_PWM 22A2<> 39A6> BRIGHT_PWM_UF 22A2<> BT_USB_DM 14C1< 25D8<> 37B2> 39D3> BT_USB_DP 14C1< 25D8<> 37B2> 39D3> CAPSLOCK_LED 23C2< CAPSLOCK_LED_L 23C3< 29C7< CBUS_ADDR<0> 18B1<> 18B4> CBUS_ADDR<1> 18B1<> 18B4> CBUS_ADDR<2> 18B1<> 18B4> CBUS_ADDR<3> 18B1<> 18B4> CBUS_ADDR<4> 18B1<> 18B4> CBUS_ADDR<5> 18B1<> 18B4> CBUS_ADDR<6> 18B1<> 18B4> CBUS_ADDR<7> 18B1<> 18B4> CBUS_ADDR<8> 18B1<> 18B4> CBUS_ADDR<9> 18B1<> 18B4> CBUS_ADDR<10> 18B4> 18C1<> CBUS_ADDR<11> 18B1<> 18B4> CBUS_ADDR<12> 18B1<> 18B4> CBUS_ADDR<13> 18B1<> 18B4> CBUS_ADDR<14> 18B1<> 18B4> CBUS_ADDR<15> 18B1<> 18B4> CBUS_ADDR<16> 18B1<> 18B4< CBUS_ADDR<17> 18B2<> 18B4> CBUS_ADDR<18> 18B2<> 18B4> CBUS_ADDR<19> 18B2<> 18B4> CBUS_ADDR<20> 18B2<> 18B4> CBUS_ADDR<21> 18B2<> 18B4> CBUS_ADDR<22> 18A4> 18B2<> CBUS_ADDR<23> 18A4> 18B2<> CBUS_ADDR<24> 18A4> 18B2<> CBUS_ADDR<25> 18A4> 18B2<> CBUS_ADDR_16_UF 18B5<> CBUS_BVD1_L 18A2<> 18C4< CBUS_BVD2_L 18B2<> 18C4< CBUS_CE1_L 18C1<> 18C4> CBUS_CE2_L 18B2<> 18B4> CBUS_DATA<0> 18A1<> 18A4<> CBUS_DATA<1> 18A1<> 18A4<> CBUS_DATA<2> 18A1<> 18A4<> CBUS_DATA<3> 18A4<> 18C1<> CBUS_DATA<4> 18A4<> 18C1<> CBUS_DATA<5> 18A4<> 18C1<> CBUS_DATA<6> 18A4<> 18C1<> CBUS_DATA<7> 18A4<> 18C1<> CBUS_DATA<8> 18A2<> 18A4<> CBUS_DATA<9> 18A2<> 18A4<> CBUS_DATA<10> 18A2<> 18A4<> CBUS_DATA<11> 18A4<> 18C2<> CBUS_DATA<12> 18A4<> 18C2<> CBUS_DATA<13> 18A4<> 18C2<> CBUS_DATA<14> 18A4<> 18C2<> CBUS_DATA<15> 18A4<> 18C2<> CBUS_DET_1_L 18C2<> 18C4< 39C6> CBUS_DET_2_L 18A2<> 18C4< 39C6>
CBUS_INPACK_L 18B2<> 18B4< CBUS_INT_L 14B5<> 14D7< 18A7<> CBUS_IORD_L 18B2<> 18C4> CBUS_IOWR_L 18B2<> 18C4> CBUS_MFUNC1_PD 18A7<> 18A7< CBUS_MFUNC2_PD 18A7<> 18A7< CBUS_MFUNC3_PD 18A7<> 18A7< CBUS_MFUNC4_PD 18A7<> 18A7< CBUS_MFUNC5_PD 18A7<> 18A7< CBUS_MFUNC6_PD 18A7<> 18A7< CBUS_OE_L 18B1<> 18C4> CBUS_PCI_GNT_L 12D7<> 18A7< CBUS_PCI_IDSEL 18B7< CBUS_PCI_REQ_L 12A7< 12D7<> 18A7> CBUS_PCI_RESET_L 18A7< CBUS_READY 18B1<> 18C4< CBUS_REG_L 18B2<> 18C4> CBUS_RESET_L 18B2<> 18C4> CBUS_SUSPEND_PU 18A7< 18D7< CBUS_VCCD0_L 18C4<> CBUS_VCCD1_L 18C4<> CBUS_VPPD0 18C4<> CBUS_VPPD1 18C5<> CBUS_VS1 18B2<> 18C4<> CBUS_VS2 18B2<> 18C4<> CBUS_WAIT_L 18B2<> 18B4< CBUS_WE_L 18B1<> 18C4> CBUS_WP_L 18A1<> 18B4< CG_ADDRSEL 14B7< CG_CLKOUT 14B6<> CG_FSEL 14B7< 14C5< CG_FSEL_INT 14C5<> CG_LOCK 14B7<> CG_RESET_L 14B7< CG_SYSCLK_EN 14B5< 14B7< CHARGE_DISABLE 30A7<> CHARGE_LED_L 25D8<> 29C6<> 29D7< 39A6> CLK10M_PMU_XIN 29B6< CLK10M_PMU_XOUT 29B6< CLK10M_PMU_XOUT_UF 29B7< CLK18M_INT_EXT 14B6<> 35B1> CLK18M_INT_XIN 14A5< 35B1> CLK18M_INT_XOUT 14A5<> 35B1> CLK18M_XTAL_IN 14A5< 35B1> CLK25M_ENET_XIN 26A7<> CLK25M_ENET_XOUT 26A7<> CLK25M_XTAL_IN 26A7<> CLK32K_PMU_XIN 29B3<> CLK32K_PMU_XOUT 29B3<> CLK32K_PMU_XOUT_UF 29B2<> CLK33M_AIRPORT 12D8< 24D5<> 35C1> 39C3> CLK33M_AIRPORT_UF 12C7<> 35C1> CLK33M_CBUS 12D8< 18A7< 35C1> CLK33M_CBUS_UF 12C7<> 35C1> CLK33M_NEC 12C8< 17B7< 35C1> CLK33M_NEC_UF 12C7<> 35C1> CLK66M_AGP_1_5V_TP 12C4> CLK66M_GPU_AGP 12C8< 19B7< 35C1> CLK66M_GPU_AGP_UF 12C7<> 35C1> CLKENET_LINK_GBE_REF 13C5< 26C8< 35B1> CLKENET_LINK_GTX 13C5<> 35A1> CLKENET_LINK_RX 13D5< 26C8< 35B1> CLKENET_LINK_TX 13D5< 26D8< 35A1> CLKENET_PHY_GBE_REF 26C7<> 35B1> CLKENET_PHY_GTX 13C6< 26C7< 35A1> CLKENET_PHY_RX 26C7<> 35B1> CLKENET_PHY_TX 26D7<> 35A1> CLKFW_LINK_LCLK 13C3<> 35A1> CLKFW_LINK_PCLK 13C3<> 27C3< 35A1> CLKFW_PHY_LCLK 13C2< 27B7< 35A1> CLKFW_PHY_PCLK 27B4> 27C4< 35A1> CLKLVDS_LN 20B5> 22A4<> 37C2> 39B6> CLKLVDS_LP 20B5> 22A4<> 37C2> 39B6> CLKLVDS_UN 20B5> 22A4<> 37C2> CLKLVDS_UP 20B5> 22A4<> 37C2> COMM_DTR_L 14C2> 25C1<> 39B3> COMM_GPIO_L 14C2<> 25C2<> 39B3> COMM_RESET_L 14C5<> 25C4<> 39B3> COMM_RING_DET_L 14B5<> 14C7< 25C3<> 29C6<> 39B3> COMM_RTS_L 14C2> 25C1<> 39B3> COMM_RXD 14C2<> 25C1<> 39B3> COMM_SHUTDOWN 14C5<> 25C5< 39B3> COMM_SHUTDOWN_PU 25C4<> COMM_TRXC 14C2<> 25C2<> 39B3> COMM_TXD_L 14C2<> 25C2<> 39B3> COMP_RC 31C6< CPU_AACK_L 5A7< 8B5<> 8C2< 36D5> CPU_ADDR<0> 5C7<> 8D5<> CPU_ADDR<0..31> 36D5> CPU_ADDR<1> 5C7<> 8D5<> CPU_ADDR<2> 5C7<> 8D5<> CPU_ADDR<3> 5C7<> 8D5<> CPU_ADDR<4> 5C7<> 8D5<> CPU_ADDR<5> 5C7<> 8C5<> CPU_ADDR<6> 5C7<> 8C5<> CPU_ADDR<7> 5C7<> 8C5<> CPU_ADDR<8> 5C7<> 8C5<> CPU_ADDR<9> 5C7<> 8C5<> CPU_ADDR<10> 5B7<> 8C5<> CPU_ADDR<11> 5B7<> 8C5<> CPU_ADDR<12> 5B7<> 8C5<> CPU_ADDR<13> 5B7<> 8C5<> CPU_ADDR<14> 5B7<> 8C5<> CPU_ADDR<15> 5B7<> 8C5<> CPU_ADDR<16> 5B7<> 8C5<> CPU_ADDR<17> 5B7<> 8C5<> CPU_ADDR<18> 5B7<> 8C5<> CPU_ADDR<19> 5B7<> 8C5<> CPU_ADDR<20> 5B7<> 8C5<> CPU_ADDR<21> 5B7<> 8C5<> CPU_ADDR<22> 5B7<> 8C5<> CPU_ADDR<23> 5B7<> 8C5<> CPU_ADDR<24> 5B7<> 8C5<> CPU_ADDR<25> 5B7<> 8C5<> CPU_ADDR<26> 5B7<> 8C5<> CPU_ADDR<27> 5B7<> 8C5<> CPU_ADDR<28> 5B7<> 8C5<> CPU_ADDR<29> 5B7<> 8C5<> CPU_ADDR<30> 5B7<> 8C5<> CPU_ADDR<31> 5B7<> 8C5<> CPU_ARTRY_L 5A7<> 8B5<> 8D2< 36D5> CPU_AVDD 5C3< 38D3> CPU_AVDD_ADJ 5C2<> CPU_AVDD_SHDN_L 5C3<> CPU_AVDD_VIN 5C3< 38D3> CPU_AVDD_VOUT 5C2<> 38D3> CPU_BG_L 5C7< 8C2< 8D5<> 36D5> CPU_BR_L 5C7> 8D2< 8D5< 36D5> CPU_BUS_VSEL 5C3< 7A6< CPU_CHKSTP_OUT_L 5B3<> 5C2< 39D6> CPU_CHKS_L 5A3< 5D2< CPU_CI_L 5A7> 8B5<> 36D5> CPU_CLKOUT_SPN 5C3> CPU_CLK_EN 8A5< 29C4<> CPU_DATA<0> 6D8<> 8D3<> CPU_DATA<0..31> 36D5> CPU_DATA<1> 6D8<> 8D3<> CPU_DATA<2> 6D8<> 8D3<> CPU_DATA<3> 6D8<> 8D3<> CPU_DATA<4> 6D8<> 8D3<> CPU_DATA<5> 6D8<> 8D3<> CPU_DATA<6> 6D8<> 8D3<> CPU_DATA<7> 6D8<> 8D3<> CPU_DATA<8> 6D8<> 8D3<> CPU_DATA<9> 6C8<> 8D3<> CPU_DATA<10> 6C8<> 8D3<> CPU_DATA<11> 6C8<> 8D3<> CPU_DATA<12> 6C8<> 8C3<> CPU_DATA<13> 6C8<> 8C3<> CPU_DATA<14> 6C8<> 8C3<> CPU_DATA<15> 6C8<> 8C3<> CPU_DATA<16> 6C8<> 8C3<> CPU_DATA<17> 6C8<> 8C3<> CPU_DATA<18> 6C8<> 8C3<> CPU_DATA<19> 6C8<> 8C3<> CPU_DATA<20> 6C8<> 8C3<> CPU_DATA<21> 6C8<> 8C3<> CPU_DATA<22> 6C8<> 8C3<> CPU_DATA<23> 6C8<> 8C3<> CPU_DATA<24> 6C8<> 8C3<> CPU_DATA<25> 6C8<> 8C3<> CPU_DATA<26> 6C8<> 8C3<> CPU_DATA<27> 6C8<> 8C3<> CPU_DATA<28> 6C8<> 8C3<> CPU_DATA<29> 6C8<> 8C3<> CPU_DATA<30> 6C8<> 8C3<> CPU_DATA<31> 6C8<> 8C3<> CPU_DATA<32> 6C8<> 8C3<> 8D8<
CPU_DATA<32..63> 36D5> CPU_DATA<33> 6C8<> 8C3<> 8D8< CPU_DATA<34> 6C8<> 8C3<> 8D8< CPU_DATA<35> 6C8<> 8C3<> 8D8< CPU_DATA<36> 6B8<> 8C3<> 8D8< CPU_DATA<37> 6B8<> 8C3<> 8D8< CPU_DATA<38> 6B8<> 8C3<> 8D8< CPU_DATA<39> 6B8<> 8B3<> 8D8< CPU_DATA<40> 6B8<> 8B3<> 8C8< CPU_DATA<41> 6B8<> 8B3<> 8C8< CPU_DATA<42> 6B8<> 8B3<> 8C8< CPU_DATA<43> 6B8<> 8B3<> 8C8< CPU_DATA<44> 6B8<> 8B3<> 8C8< CPU_DATA<45> 6B8<> 8B3<> 8C8< CPU_DATA<46> 6B8<> 8B3<> 8B8< CPU_DATA<47> 6B8<> 8B3<> 8B8< CPU_DATA<48> 6B8<> 8A8< 8B3<> CPU_DATA<49> 6B8<> 8A8< 8B3<> CPU_DATA<50> 6B8<> 8A8< 8B3<> CPU_DATA<51> 6B8<> 8A8< 8B3<> CPU_DATA<52> 6B8<> 8A8< 8B3<> CPU_DATA<53> 6B8<> 8A8< 8B3<> CPU_DATA<54> 6B8<> 8A8< 8B3<> CPU_DATA<55> 6B8<> 8A8< 8B3<> CPU_DATA<56> 6B8<> 8B3< 8B3<> CPU_DATA<57> 6B8<> 8B3< 8B3<> CPU_DATA<58> 6B8<> 8B3< 8B3<> CPU_DATA<59> 6B8<> 8B3< 8B3<> CPU_DATA<60> 6B8<> 8B3< 8B3<> CPU_DATA<61> 6B8<> 8B3< 8B3<> CPU_DATA<62> 6A8<> 8B3< 8B3<> CPU_DATA<63> 6A8<> 8B3< 8B3<> CPU_DBG_L 5C3< 8A3<> 8C2< 36D5> CPU_DRDY_L 5C3> 8A3< 8C2< 36D5> CPU_DTI<0> 5C3< 8A3<> CPU_DTI<0..2> 36D5> CPU_DTI<1> 5C3< 8A3<> CPU_DTI<2> 5C3< 8A3<> CPU_EDTI 5A2< 5C3< CPU_EMODE0_L 5A3< 7A4< CPU_EMODE1_L 5A3< 5C2< CPU_GBL_L 5A7<> 8B5<> 36D5> CPU_HIT_L 5A7> 8B5< 8D2< 36D5> CPU_HRESET_INV 7A7<> CPU_HRESET_L 5B3< 5C2< 6A1<> 7A5< 7A8< 39D6> CPU_L1TSTCLK 5B2< 5B3< CPU_L2TSTCLK 5B3< 5C2< CPU_LSSD_MODE 5B3< 5C2< CPU_MCP_L 5B3< 5D2< CPU_PLL_CFG<0> 5C3< 7D3< CPU_PLL_CFG<1> 5C3< 7D3< CPU_PLL_CFG<2> 5C3< 7D3< CPU_PLL_CFG<3> 5C3< 7D3< CPU_PLL_CFG<4> 5C3< 7D3<> CPU_PLL_CFGEXT 7D4<> CPU_PLL_FS00 7C4<> CPU_PLL_FS01 7C4< CPU_PLL_FS10 7C4< CPU_PLL_STOP_BASE 7C7< CPU_PLL_STOP_OC 7C4<> 7C8<> 29B6<> CPU_PMONIN_L 5A3< 5C2< CPU_PULLDOWN 5A2< 5A3< 5A3< 5C7<> CPU_PULLUP 5A3< 5C2< CPU_QACK_L 5B3< 8B5<> 36D5> CPU_QREQ_L 5B3> 8B5< 8C2< 36D5> CPU_SHD0_L 5A7<> 5D2< CPU_SHD1_L 5A7<> 5D2< CPU_SMI_L 5B3< 5C2< 29C4<> CPU_SRESET_L 5B2< 5B3< 39D6> CPU_SRWX_L 5A3< 5C2< CPU_TA_L 5B3< 8A3<> 8D2< 36D5> CPU_TBEN 5B3< 5D2< 8A5<> CPU_TBST_L 5A7> 8B5<> 36D5> CPU_TEA_L 5B3< 8A3<> 8C2< 36D5> CPU_THERM_DM 6A6<> 25A6< CPU_THERM_DP 6A6<> 25A6< CPU_TSIZ<0> 5A7> 8B5<> CPU_TSIZ<0..2> 36D5> CPU_TSIZ<1> 5A7> 8B5<> CPU_TSIZ<2> 5A7> 8B5<> CPU_TS_L 5C7<> 8D2< 8D5<> 36D5> CPU_TT<0> 5A7<> 8B5<> CPU_TT<0..4> 36D5> CPU_TT<1> 5A7<> 8B5<> CPU_TT<2> 5A7<> 8B5<> CPU_TT<3> 5A7<> 8B5<> CPU_TT<4> 5A7<> 8B5<> CPU_VCORE_HI_OC 7B8< 29D4<> 33C8< 33D7< CPU_VCORE_PWR_SEQ 33D8<> CPU_VCORE_SEQ 33D8< CPU_VCORE_SEQ_L 33D8< CPU_VCORE_SLEEP 5D2< 5D8<> 6C6<> 33C1< 33D2< 38D3>
39C6> CPU_VCORE_SNUB 33B3< CPU_WT_L 5A7> 8B5<> 36C5> CSLOT_ADDR3_SPN 13B7> CSLOT_ADDR4_SPN 13B7> CSLOT_ADDR5_SPN 13B7> CSLOT_ADDR6_SPN 13B7> CSLOT_ADDR7_SPN 13B7> CSLOT_ADDR8_SPN 13B7> CSLOT_ADDR9_SPN 13B7> CSLOT_CE1_L_SPN 13C7> CSLOT_CE2_L_SPN 13C7> CSLOT_IORD_L_SPN 13C7> CSLOT_IOWAIT_L_PU 13C7< CSLOT_IOWR_L_SPN 13C7> CSLOT_OE_L_SPN 13C7> CSLOT_WE_L_SPN 13C7> CURRENT_THRESHOLD 30C3< CY25811_S0 19A4< CY25811_S1 19A4< DCDC_EN 20A7<> 28C8<> 32B7<> 33C7<> DCDC_EN_L 32B6< 32B7<> 34C7<> DDC_CLK_ISO 22D4<> DDR_VREF 11D1< 11D3<> 11D5<> 11D6<> 11D8<>
38D3> DVI_DDC_CLK 22D4<> DVI_DDC_CLK_UF 22C5<> 22D3<> 39B6> DVI_DDC_DATA 22C4<> DVI_DDC_DATA_UF 22C5<> 39B6> DVI_HPD 22C4<> DVI_HPD_DIV 22C3< DVI_HPD_UF 22C3< 22C5<> 39B6> DVI_TURN_ON 22D3<> DVI_TURN_ON_BASE 22D2<> DVI_TURN_ON_ILIM 22D2< EIDE_ADDR<0> 13B7> 24B8< EIDE_ADDR<2..0> 37B5> EIDE_ADDR<1> 13B7> 24B8< EIDE_ADDR<2> 13B7> 24B8< EIDE_CS0_L 13B7> 24B8< 37B5> EIDE_CS1_L 13B7> 24A8< 37B5> EIDE_DATA<0> 13C7<> 24C8< EIDE_DATA<15..0> 37B5> EIDE_DATA<1> 13C7<> 24C8< EIDE_DATA<2> 13C7<> 24C8< EIDE_DATA<3> 13C7<> 24C8< EIDE_DATA<4> 13C7<> 24B8< EIDE_DATA<5> 13B7<> 24B8< EIDE_DATA<6> 13B7<> 24B8< EIDE_DATA<7> 13B7<> 24B8< EIDE_DATA<8> 13B7<> 24D8< EIDE_DATA<9> 13B7<> 24C8< EIDE_DATA<10> 13B7<> 24D8< EIDE_DATA<11> 13B7<> 24C8< EIDE_DATA<12> 13B7<> 24C8< EIDE_DATA<13> 13B7<> 24C8< EIDE_DATA<14> 13B7<> 24C8< EIDE_DATA<15> 13B7<> 24C8< EIDE_DMACK_L 13A7<> 24A8< 37B5> EIDE_DMARQ 13A7< 24A8< 37B5> EIDE_INT 13A7< 24A8< 37B5> EIDE_IOCHRDY 13B7< 24A8< 37B5> EIDE_OPTICAL_ADDR<0> 24A5<> 24B7< EIDE_OPTICAL_ADDR<2..0> 37B5> 39C3> EIDE_OPTICAL_ADDR<1> 24A5<> 24B7< EIDE_OPTICAL_ADDR<2> 24A6<> 24B7< EIDE_OPTICAL_CS0_L 24A5<> 24B7< 37B5> 39C3> EIDE_OPTICAL_CS1_L 24A6<> 24A7< 37B5> 39C3> EIDE_OPTICAL_DATA<0> 24A5<> 24C7< EIDE_OPTICAL_DATA<15..0> 37B5> 39C3> EIDE_OPTICAL_DATA<1> 24A5<> 24C7< EIDE_OPTICAL_DATA<2> 24A5<> 24C7< EIDE_OPTICAL_DATA<3> 24A5<> 24C7< EIDE_OPTICAL_DATA<4> 24A5<> 24B7< EIDE_OPTICAL_DATA<5> 24A5<> 24B7< EIDE_OPTICAL_DATA<6> 24A5<> 24B7<
EIDE_OPTICAL_DATA<7> 24A5<> 24B7< EIDE_OPTICAL_DATA<8> 24A6<> 24D7< EIDE_OPTICAL_DATA<9> 24A6<> 24C7< EIDE_OPTICAL_DATA<10> 24A6<> 24D7< EIDE_OPTICAL_DATA<11> 24A6<> 24C7< EIDE_OPTICAL_DATA<12> 24A6<> 24C7< EIDE_OPTICAL_DATA<13> 24A6<> 24C7< EIDE_OPTICAL_DATA<14> 24A6<> 24C7< EIDE_OPTICAL_DATA<15> 24A6<> 24C7< EIDE_OPTICAL_DMAACK_L 24A6<> 24A7< 37A5> 39C3> EIDE_OPTICAL_DMA_RQ 24A6<> 24A7< 37A5> 39C3> EIDE_OPTICAL_INT 24A5<> 24A7< 37A5> 39B3> EIDE_OPTICAL_IOCHRDY 24A5<> 24A7< 37A5> 39B3> EIDE_OPTICAL_READ_L 24A6<> 24A7< 37B5> 39C3> EIDE_OPTICAL_RST_L 24A7< 24B5<> 37A5> 39C3> EIDE_OPTICAL_WR_L 24A5<> 24A7< 37B5> 39B3> EIDE_RD_L 13A7> 24A8< 37B5> EIDE_RST_L 13B7> 24A8< 37B5> EIDE_WR_L 13A7> 24A8< 37B5> ENET_COL 13C5< 26B7> 37A5> ENET_COMA 26B7<> ENET_CRS 13C5< 26B7> 37A5> ENET_CTAP_CHGND 38A6> ENET_ENERGY_DET 14B5<> 26B7<> ENET_HSDACM 26A7<> ENET_HSDACP 26A7<> ENET_LINK_RXD<0> 13C5< 26C7> ENET_LINK_RXD<7..0> 37A5> ENET_LINK_RXD<1> 13C5< 26C7> ENET_LINK_RXD<2> 13C5< 26C7> ENET_LINK_RXD<3> 13C5< 26B7> ENET_LINK_RXD<4> 13C5< 26B7> ENET_LINK_RXD<5> 13C5< 26B7> ENET_LINK_RXD<6> 13C5< 26B7> ENET_LINK_RXD<7> 13C5< 26B7> ENET_LINK_TXD<0> 13B4< 13D5> ENET_LINK_TXD<7..0> 37A5> ENET_LINK_TXD<1> 13B4< 13D5> ENET_LINK_TXD<2> 13B4< 13D5> ENET_LINK_TXD<3> 13B4< 13D5> ENET_LINK_TXD<4> 13B4< 13D5> ENET_LINK_TXD<5> 13B4< 13D5> ENET_LINK_TXD<6> 13A4< 13D5> ENET_LINK_TXD<7> 13A4< 13D5> ENET_LINK_TX_EN 13D5<> 37A5> ENET_LINK_TX_ER 13D5<> 37A5> ENET_MDC 13C5> 26B7< 37A5> ENET_MDIO 13C5<> 26B7<> 37A5> ENET_PHY_TXD<0> 13B5< 26C7< ENET_PHY_TXD<7..0> 37A5> ENET_PHY_TXD<1> 13B5< 26C7< ENET_PHY_TXD<2> 13B5< 26C7< ENET_PHY_TXD<3> 13B5< 26C7< ENET_PHY_TXD<4> 13B5< 26C7< ENET_PHY_TXD<5> 13B5< 26C7< ENET_PHY_TXD<6> 13A5< 26C7< ENET_PHY_TXD<7> 13A5< 26C7< ENET_PHY_TX_EN 13D6< 26C7< 37A5> ENET_PHY_TX_ER 13D6< 26C7< 37A5> ENET_RSET 26A5< ENET_RST_L 26B7< ENET_RX_DV 13D5< 26B7> 37A5> ENET_RX_ER 13C5< 26B7> 37A5> ENET_VSSC 26A7<> ESP_EN_L 6C2<> 6C2< FAN1_GND 38B6> 39A3> FAN1_PWM 25A4<> FAN1_PWM_L 25A4<> 25B2<> FAN1_TACH 25A4< 25B2< 39A3> FAN2_GND 38B6> 39A3> FAN2_PWM 25A3<> FAN2_PWM_L 25A3<> 25B2<> FAN2_TACH 25A3< 25B2< 39A3> FB_4_85V_BU 31A5< FP_PWR_EN 20C6<> 22A5< 22B3<> FP_PWR_EN_L 22B3<> FWB_TPB0 27A3< FWB_TPB1 27A3< FWPLL_BYP 27D8<> FW_BIAS0 27A4<> FW_BIAS1 27A4<> FW_BMODE 27B6< FW_CORE_ADJ 27C7< FW_CORE_BYP 27C7<> FW_CPS 27B6< FW_GATE_EN 28D6<> FW_GATE_EN_RC 28C6<> FW_INPUT_PD 27A6< FW_LINK_CNTL<0> 13C3<> 27C3< FW_LINK_CNTL<1..0> 37A5> FW_LINK_CNTL<1> 13C3<> 27C3< FW_LINK_DATA<0> 13D3<> 27B7< FW_LINK_DATA<7..0> 37A5> FW_LINK_DATA<1> 13D3<> 27B7< FW_LINK_DATA<2> 13D3<> 27B7< FW_LINK_DATA<3> 13D3<> 27B7< FW_LINK_DATA<4> 13C3<> 27B7< FW_LINK_DATA<5> 13C3<> 27A7< FW_LINK_DATA<6> 13C3<> 27A7< FW_LINK_DATA<7> 13C3<> 27A7< FW_LINK_LREQ 13C3<> 37A5> FW_LKON 13C3<> 27B4<> FW_OSC 27A4< 35A1> FW_OSC_EN 27A3< FW_PC_PD 27B6< FW_PC_PU 27B6< FW_PHY_CNTL<0> 27B4<> 27C4< FW_PHY_CNTL<1..0> 37A5> FW_PHY_CNTL<1> 27B4<> 27C4< FW_PHY_DATA<0> 27B7<> FW_PHY_DATA<7..0> 37A5> FW_PHY_DATA<1> 27B7<> FW_PHY_DATA<2> 27B7<> FW_PHY_DATA<3> 27B7<> FW_PHY_DATA<4> 27B7<> FW_PHY_DATA<5> 27A7<> FW_PHY_DATA<6> 27A7<> FW_PHY_DATA<7> 27A7<> FW_PHY_LPS 13C3<> 27B7< FW_PHY_LREQ 13C2< 27B7< 37A5> FW_PHY_PD 14C5<> 27B7< FW_PHY_RESET_L 27A7< FW_PINT 13C3<> 27B4> 37A5> FW_PLL_ADJ 27C7< FW_PORT1_SEL 27B6< FW_POWER_UP 28C7<> FW_R0 27A4<> FW_R1 27A4<> FW_TESTM 27A6< FW_TPA1N 27B2<> 28A4<> 37D2> FW_TPA1P 27B2<> 28A4<> 37D2> FW_TPAO0N 28C2<> 37D2> FW_TPAO0P 28C2<> 37D2> FW_TPB1N 27A2<> 28A4<> 37D2> FW_TPB1P 27B2<> 28A4<> 37D2> FW_TPB2_PD 27A4<> FW_TPBI0N 28C2<> 37D2> FW_TPBI0P 28C2<> 37D2> FW_TPI0N 27B2<> 28C3<> 37D2> 39A3> FW_TPI0P 27B2<> 28C3<> 37D2> 39A3> FW_TPI1N 28A3<> 37D2> 39D1> FW_TPI1P 28A3<> 37D2> 39D1> FW_TPO0N 27B2<> 28C3<> 37D2> 39A3> FW_TPO0P 27B2<> 28C3<> 37D2> 39A3> FW_TPO0R 28C1<> 39A3> FW_TPO1N 28A3<> 37D2> 39D1> FW_TPO1P 28A3<> 37D2> 39D1> FW_VDD_ON 38A3> FW_VGND 39A3> 39D1> FW_VGND0 28C1<> 38A3> FW_VGND1 28A3<> 38A3> FW_VREG_PD 27A6< FW_XI 27A4<> 35A1> GPU_AGP_TEST 19C6< GPU_B 20D6<> 22C8< GPU_B_FILTR 22C8< GPU_C 20D6<> 22A8< GPU_COMP 20D6<> 22A8< GPU_CORE_OK 20A6<> 20D4<> 21D2<> 21D7<> GPU_DVI_DDC_CLK 20C5<> 22D3<> GPU_DVI_DDC_DATA 20C5<> 22C3<> GPU_DVOD<0> 19B3< 19C4< GPU_DVOD<11..0> 36C1> GPU_DVOD<1> 19B3< 19C4< GPU_DVOD<2> 19B3< 19C4< GPU_DVOD<3> 19B3< 19C4< GPU_DVOD<4> 19B3< 19C4< GPU_DVOD<5> 19B3< 19C4<
GPU_DVOD<6> 19B3< 19C4< GPU_DVOD<7> 19B3< 19C4< GPU_DVOD<8> 19B2< 19C4< GPU_DVOD<9> 19B2< 19C4< GPU_DVOD<10> 19B2< 19C4< GPU_DVOD<11> 19B2< 19C4< GPU_DVOD_DE 19B2< 19C4< 36C1> GPU_DVO_CLKP 19B2< 19C4< 36C1> GPU_DVO_HSYNC 19B2< 19C4< 36C1> GPU_DVO_VSYNC 19B2< 19C4< 36C1> GPU_G 20D6<> 22C8< GPU_G_FILTR 22C8< GPU_HPD 20C5< 22C3<> GPU_MEM_IO 19A6<> 19B8< 21A7< 21B4< 21D2<
38C3> GPU_MEM_IO_FLT 21C2< 38C3> GPU_R 20D6<> 22B8< GPU_R_FILTR 22B8< GPU_THERM_DM 19A6<> 25A6< GPU_THERM_DP 19A6<> 25A6< GPU_TMDS_CLKN 19B2< 20B8< 20D7< 36D1> GPU_TMDS_CLKP 19B2< 20B8< 20D8< 36D1> GPU_TMDS_CLK_CMF 20D7< GPU_TMDS_D0_CMF 20D7< GPU_TMDS_D1_CMF 20C7< GPU_TMDS_D2_CMF 20C7< GPU_TMDS_DN<0> 19B2< 20B8< 20D7< 36D1> GPU_TMDS_DN<1> 19B2< 20B8< 20C7< 36D1> GPU_TMDS_DN<2> 19A2< 20B8< 20C7< 36D1> GPU_TMDS_DP<0> 19B2< 20B8< 20D8< 36D1> GPU_TMDS_DP<1> 19B2< 20B8< 20C8< 36D1> GPU_TMDS_DP<2> 19A2< 20B8< 20C8< 36D1> GPU_TV_GND1 22B8<> 38B6> GPU_TV_GND2 22A8<> 38B6> GPU_VCORE 19D8< 20A3<> 20B5<> 20D4< 38C3>
39C6> GPU_VCORE_CNTL 20A3<> GPU_VCORE_CNTL_L 20A4< 20B7<> GPU_VCORE_CNTL_RC 20A3<> GPU_VCORE_NECK 20B5<> 38B3> GPU_VCORE_PWR_SEQ 20A8<> GPU_VCORE_SEQ 20A8< GPU_VCORE_SEQ_L 20A8< GPU_VCORE_SW 20A4<> 38B1> GPU_VCORE_SW_F 38B1> GPU_VCORE_VDDCI 19C8< 19D6< 38B3> GPU_Y 20D6<> 22B8< HD_ADDR<0> 24C2<> 24C3< HD_ADDR<2..0> 37C5> HD_ADDR<1> 24C2<> 24C3< HD_ADDR<2> 24B3< 24C1<> HD_CS0_L 24C2<> 24C3< 37B5> HD_CS1_L 24B3< 24C1<> 37B5> HD_DATA<0> 24C2<> 24D3< HD_DATA<15..0> 37C5> HD_DATA<1> 24C2<> 24D3< HD_DATA<2> 24D2<> 24D3< HD_DATA<3> 24D2<> 24D3< HD_DATA<4> 24C3< 24D2<> HD_DATA<5> 24C3< 24D2<> HD_DATA<6> 24C3< 24D2<> HD_DATA<7> 24C3< 24D2<> HD_DATA<8> 24C3< 24D1<> HD_DATA<9> 24C3< 24D1<> HD_DATA<10> 24C3< 24D1<> HD_DATA<11> 24D1<> 24D3< HD_DATA<12> 24B3< 24D1<> HD_DATA<13> 24B3< 24D1<> HD_DATA<14> 24C1<> 24C3< HD_DATA<15> 24B3< 24C1<> HD_DIOR_L 24A3< 24C2<> 37B5> HD_DIOW_L 24A3< 24C1<> 37B5> HD_DMACK_L 24A3< 24C2<> 37B5> HD_DMARQ 13C6< 24C2<> 37B5> HD_INTRQ 13C6< 24C1<> 37B5> HD_IOCHRDY 24A3< 24C1<> 37B5> HD_RESET_L 24A3< 24D2<> 37C5> HIGH_VCORE 20A2<> HIGH_VCORE_DIVD 20A3< HPD_4V_REF 22C3< HPD_PWR_SNS_EN 20C7<> 22C3<> HPD_PWR_SW 22C2< HPD_PWR_SW_BASE 22C2<> HPD_REF_EN_L 22C2<> IAC_FB 30D4< IAC_RC_COMP 30D3< ICT_TRST_L 6B2<> 6C2< INTREPID_ACS_REF 8A5< INT_AGPPVT 12D4<> INT_AGP_FB_IN 12C4< 35C1> INT_AGP_FB_OUT 12C4<> 35C1> INT_AGP_VREF 12B5< 12D4<> 19D6< 38C3> INT_CPUFB_IN 8A5< 8B5< 35D1> INT_CPUFB_IN_NORM 8A4< 35D1> INT_CPUFB_LONG 8A3< 35D1> INT_CPUFB_OUT 8A5<> 8A5< 35D1> INT_CPUFB_OUT_NORM 8A4< 35D1> INT_CPUFB_OUT_SHORT 8A5< 35D1> INT_DDRCLK2_N_TP 9B6<> INT_DDRCLK2_P_TP 9B6<> INT_DDRCLK5_N_TP 9B6<> INT_DDRCLK5_P_TP 9B6<> INT_ENET_RST_L 14B5<> 26B8< INT_EXTINT3_PU 14A7< 14B5<> INT_EXTINT8_PU 14B5<> 14C7< INT_EXTINT10_PU 14B5<> 14B7< INT_EXTINT11_PU 14B5<> 14B7< INT_EXTINT12_PU 14B5<> 14B7< INT_EXTINT13_PU 14B5<> 14B7< INT_EXTINT14_PU 14B5<> 14C7< INT_EXTINT16_PU 14B5<> 14B7< INT_GPIO1_PU 14A7< 14C5<> 33C8< INT_GPIO9_PU 14A7< 14B5<> INT_GPIO12_PU 14B5<> 14B7< INT_GPIO15_PU 14B5<> 14B7< INT_I2C_CLK0 6B3<> 6D2< 11A5<> 11A8<> 13C2<
13C3<> 23D7<> 39C6> INT_I2C_CLK1 13C2< 13C3<> 14B7< 25B4< 39C6> INT_I2C_CLK2 14A2<> 25C4<> 25D7<> 39A6> INT_I2C_DATA0 6B3<> 6D2<> 11A5<> 11A8<> 13C2<
13C3<> 23D7<> 39C6> INT_I2C_DATA1 13B2< 13C3<> 14B7< 25B4<> 39C6> INT_I2C_DATA2 14A2<> 25C4<> 25D7<> 39A6> INT_I2S0_SND_FROM_ADC 14B2< 25D7<> 39A6> INT_I2S0_SND_LRCLK 14B1< 25D8<> 39A6> INT_I2S0_SND_LRCLK_UF 14A3<> INT_I2S0_SND_MCLK 14B1< 25D8<> 35B1> 39A6> INT_I2S0_SND_MCLK_UF 14A3<> INT_I2S0_SND_SCLK 14B1< 25D7<> 39A6> INT_I2S0_SND_SCLK_UF 14A3<> INT_I2S0_SND_TO_DAC 14B1< 25D8<> 39A6> INT_I2S0_SND_TO_DAC_UF 14B3<> INT_JTAG_TEI 13C2< 13C5< 39D6> INT_MEM_REF_H 9B6< 38C3> INT_MEM_VREF 9A7< 9B6<> 38C3> INT_MOD_BITCLK 14A1< 25C3<> INT_MOD_BITCLK_UF 14A3<> 14A7< INT_MOD_CLKOUT 14A1< 25C4<> INT_MOD_CLKOUT_UF 14A3<> 14A7< INT_MOD_DTI 14A2< 14A7< 25C3<> INT_MOD_DTO 14B1< 25C4<> INT_MOD_DTO_UF 14A3<> 14A7< INT_MOD_SYNC 14A1< 25C3<> INT_MOD_SYNC_UF 14A3<> 14A7< INT_PCI_FB_IN 12C7< 35C1> INT_PCI_FB_OUT 12C7<> 35C1> INT_PEND_PROC_INT 14A5> 29C4<> INT_PROC_SLEEP_REQ_L 14A5< 29B4<> INT_PU_RESET_L 13D3< 25D5<> 29A2< 29C4<> INT_REF_CLK_IN 14A5< 14B5< 35C1> INT_REF_CLK_OUT 14A5< 14B7< 35C1> INT_REF_CLK_OUT_UF 14A5<> 35C1> INT_RESET_L 9B3< 13D3< 29C7< 29D4<> INT_ROM_CS_L 12A5< 12C7> INT_ROM_OE_L 12A5< 12C7> INT_ROM_RW_L 12A5< 12C7> INT_SUSPEND_ACK_L 8B5> 29B6<> INT_SUSPEND_REQ_L 8B5< 29B6<> 29C7< INT_TDO 13C5> 13D2< 14A6< 26A5< INT_TST_MONIN_PD 13C2< 13C5< 39C6> INT_TST_MONOUT_TP 13C5> 39C6> INT_TST_PLLEN_PD 13C5< 13D2< 39C6> INT_WATCHDOG_L 14A5> 29C6<> INV_GND 22A1<> 39A6> INV_ON_PWM 20C6<> 22A3< IO_RESET_L 17A8< 23D7<> 26B8< 29C6<> 29D7< JTAG_ASIC_TCK 13C5< 13D2< 26A5< 39D6> JTAG_ASIC_TDI 13C5< 13D2< 39D6>
JTAG_ASIC_TDO_TP 26A5> 39D6> JTAG_ASIC_TMS 13C5< 13D2< 26A5< 39D6> JTAG_ASIC_TRST_L 13C2< 13C5< 26A5< 39D6> JTAG_CPU_TCK 5A2< 5B3< 6A3> 39D6> JTAG_CPU_TDI 5B2< 5C3< 6B2<> 39D6> JTAG_CPU_TDO_TP 5C3> 39D6> JTAG_CPU_TMS 5B2< 5B3< 6B2<> 39D6> JTAG_CPU_TRST_L 5A3< 5B3< 6B2<> 39D6> KBD_CAPSLOCK_LED 23C1<> 39B3> KBD_COMMAND_L 23A2< 23C1<> 29C6<> 39B3> KBD_CONTROL_L 23B2< 23C1<> 29A8< 29C6<> 39A3> KBD_FUNCTION_L 23A2< 23C1<> 29B6<> 39B3> KBD_ID 23B2< 23C1<> 29B6<> 39B3> KBD_INTL 23C1<> 39B3> KBD_JIS 23C1<> 39B3> KBD_LED1_OUT 23B5<> 23D7<> KBD_LED2_OUT 23B4<> 23D7<> KBD_NUMLOCK_LED 23C1<> 39B3> KBD_OPTION_L 23A2< 23C1<> 29A8< 29B6<> 39B3> KBD_SHIFT_L 23A2< 23C1<> 29A8< 29C6<> 39A3> KBD_X<0> 23B2< 23C1<> 29C6<> KBD_X<0..9> 39A3> KBD_X<1> 23B2< 23C1<> 29C6<> KBD_X<2> 23B2< 23C1<> 29C6<> KBD_X<3> 23B2< 23C1<> 29C6<> KBD_X<4> 23B2< 23C1<> 29C6<> KBD_X<5> 23B2< 23C1<> 29C6<> KBD_X<6> 23B2< 23D1<> 29C6<> KBD_X<7> 23B2< 23D1<> 29C6<> KBD_X<8> 23A2< 23D1<> 29C6<> KBD_X<9> 23A2< 23D1<> 29C6<> KBD_Y<0> 23D1<> 29D6<> KBD_Y<0..7> 39A3> KBD_Y<1> 23D1<> 29D6<> KBD_Y<2> 23D1<> 29D6<> KBD_Y<3> 23D1<> 29D6<> KBD_Y<4> 23D1<> 29D6<> KBD_Y<5> 23D1<> 29C6<> KBD_Y<6> 23D1<> 29C6<> KBD_Y<7> 23D1<> 29C6<> LCD_DIGON_L 22B6< LCD_PWREN_L 22B5<> LED_LINK10 26B5<> LED_LINK100 26B5<> LED_RX_SPN 26B5> LID_CLOSED_L 23B4<> 39B3> LM2594_IN 27D8<> 38A3> LMU_DETECT 23C7< 23D6<> 39D1> LT1962_INT_ADJ 14D7< LT1962_INT_BYP 14D7<> LTC1625_ITH 30D2<> LTC1962_INT_VIN 14D8<> 38A1> LTC3405_SW 26D4<> 38A3> LTC3411_EN_L 34A7< LTC3411_GND 34A5<> 38A1> LTC3411_ITH 34A5<> 38A1> LTC3411_ITH_RC 34A5< 38A1> LTC3411_SHDN 34A6<> 38A1> LTC3411_SYNC 34A6<> 38A1> LTC3411_VCC 34A6< 34A7< 38B1> LTC3707_START_RC 32B6< LUX_ALS_GAIN_SW 23B7<> 23D6<> LUX_ALS_OUT 23B7<> 23D6<> LVDS_DDC_CLK 20C5<> 22A4< 22B4<> 39B6> LVDS_DDC_DATA 20C5<> 22A4< 22B4<> 39B6> LVDS_L0N 20B5> 22B4<> 37C2> 39B6> LVDS_L0P 20B5> 22B4<> 37C2> 39B6> LVDS_L1N 20B5> 22B4<> 37C2> 39B6> LVDS_L1P 20B5> 22B4<> 37C2> 39B6> LVDS_L2N 20B5> 22A4<> 37C2> 39B6> LVDS_L2P 20B5> 22A4<> 37C2> 39B6> LVDS_L3N_TP 20B5> LVDS_L3P_TP 20B5> LVDS_U0N 20C5> 22A4<> 37C2> LVDS_U0P 20C5> 22A4<> 37C2> LVDS_U1N 20C5> 22A4<> 37C2> LVDS_U1P 20C5> 22A4<> 37C2> LVDS_U2N 20B5> 22A4<> 37C2> LVDS_U2P 20B5> 22A4<> 37C2> LVDS_U3N_TP 20B5> LVDS_U3P_TP 20B5> MAIN_RESET_L 14C7< 17A8< 18A7< 19B8< 19D4<
24D6<> 29D4<> 29D7< 39C3> MAX1715_GND 34B5<> 34C5< 38C1> MAX1715_ON_RC 34C7<> MAX1715_REF 34B5<> 38C1> MAX1715_SKIP 34C4< 38C1> MAX1715_TON 34C5< 38C1> MAX1715_VCC 34D5< 38C1> MAX4172_OUT 30D4<> MAXBUS_SLEEP 5A2< 5D2< 5D5< 6B2< 6B4< 7B7< 7D8<
8B3< 8B8< 8C8< 8D1< 8D8< 15D8< 16D8<
33D8< 38D3> MDI0_PD 26B4< MDI1_PD 26B4< MDI2_PD 26B4< MDI3_PD 26B3< MDI_M<0> 26B5<> 37D2> MDI_M<0..3> 39A3> MDI_M<1> 26B5<> 37D2> MDI_M<2> 26B5<> 37C2> MDI_M<3> 26B5<> 37C2> MDI_P<0> 26B5<> 37D2> MDI_P<0..3> 39A3> MDI_P<1> 26B5<> 37D2> MDI_P<2> 26B5<> 37C2> MDI_P<3> 26B5<> 37C2> MEM_ADDR<0> 9B5< 9D6<> MEM_ADDR<12..0> 35A5> MEM_ADDR<1> 9B5< 9D6<> MEM_ADDR<2> 9B5< 9D6<> MEM_ADDR<3> 9B5< 9D6<> MEM_ADDR<4> 9B5< 9D6<> MEM_ADDR<5> 9B5< 9D6<> MEM_ADDR<6> 9B5< 9D6<> MEM_ADDR<7> 9B5< 9D6<> MEM_ADDR<8> 9B5< 9D6<> MEM_ADDR<9> 9A5< 9D6<> MEM_ADDR<10> 9A5< 9D6<> MEM_ADDR<11> 9A5< 9D6<> MEM_ADDR<12> 9A5< 9D6<> MEM_BA<0> 9A5< 9D6<> MEM_BA<1..0> 35A5> MEM_BA<1> 9A5< 9C6<> MEM_CAS_L 9A5< 9C6<> 35A5> MEM_CKE<0> 9B6<> 9C5< MEM_CKE<3..0> 35A5> MEM_CKE<1> 9B6<> 9C5< MEM_CKE<2> 9B6<> 9C5< MEM_CKE<3> 9B6<> 9C5< MEM_CS_L<0> 9C5< 9C6<> MEM_CS_L<3..0> 35A5> MEM_CS_L<1> 9C5< 9C6<> MEM_CS_L<2> 9C5< 9C6<> MEM_CS_L<3> 9C5< 9C6<> MEM_DATA<0> 9D8<> 10C7<> MEM_DATA<7..0> 35D5> MEM_DATA<1> 9D8<> 10C7<> MEM_DATA<2> 9D8<> 10C7<> MEM_DATA<3> 9D8<> 10C7<> MEM_DATA<4> 9D8<> 10C7<> MEM_DATA<5> 9D8<> 10C7<> MEM_DATA<6> 9D8<> 10C7<> MEM_DATA<7> 9D8<> 10C7<> MEM_DATA<8> 9D8<> 10C7<> MEM_DATA<15..8> 35D5> MEM_DATA<9> 9D8<> 10C7<> MEM_DATA<10> 9D8<> 10C7<> MEM_DATA<11> 9D8<> 10C7<> MEM_DATA<12> 9D8<> 10B7<> MEM_DATA<13> 9C8<> 10B7<> MEM_DATA<14> 9C8<> 10B7<> MEM_DATA<15> 9C8<> 10B7<> MEM_DATA<16> 9C8<> 10C5<> MEM_DATA<23..16> 35C5> MEM_DATA<17> 9C8<> 10C5<> MEM_DATA<18> 9C8<> 10C5<> MEM_DATA<19> 9C8<> 10C5<> MEM_DATA<20> 9C8<> 10C5<> MEM_DATA<21> 9C8<> 10C5<> MEM_DATA<22> 9C8<> 10C5<> MEM_DATA<23> 9C8<> 10C5<> MEM_DATA<24> 9C8<> 10C5<> MEM_DATA<31..24> 35C5> MEM_DATA<25> 9C8<> 10C5<> MEM_DATA<26> 9C8<> 10C5<> MEM_DATA<27> 9C8<> 10C5<> MEM_DATA<28> 9C8<> 10C5<>
MEM_DATA<29> 9C8<> 10B5<> MEM_DATA<30> 9C8<> 10B5<> MEM_DATA<31> 9C8<> 10B5<> MEM_DATA<32> 9C8<> 10C3<> MEM_DATA<39..32> 35C5> MEM_DATA<33> 9C8<> 10C3<> MEM_DATA<34> 9C8<> 10C3<> MEM_DATA<35> 9C8<> 10C3<> MEM_DATA<36> 9C8<> 10C3<> MEM_DATA<37> 9C8<> 10C3<> MEM_DATA<38> 9C8<> 10C3<> MEM_DATA<39> 9B8<> 10C3<> MEM_DATA<40> 9B8<> 10C3<> MEM_DATA<47..40> 35B5> MEM_DATA<41> 9B8<> 10C3<> MEM_DATA<42> 9B8<> 10C3<> MEM_DATA<43> 9B8<> 10C3<> MEM_DATA<44> 9B8<> 10C3<> MEM_DATA<45> 9B8<> 10B3<> MEM_DATA<46> 9B8<> 10B3<> MEM_DATA<47> 9B8<> 10B3<> MEM_DATA<48> 9B8<> 10C1<> MEM_DATA<55..48> 35B5> MEM_DATA<49> 9B8<> 10C1<> MEM_DATA<50> 9B8<> 10C1<> MEM_DATA<51> 9B8<> 10C1<> MEM_DATA<52> 9B8<> 10C1<> MEM_DATA<53> 9B8<> 10C1<> MEM_DATA<54> 9B8<> 10C1<> MEM_DATA<55> 9B8<> 10C1<> MEM_DATA<56> 9B8<> 10C1<> MEM_DATA<63..56> 35A5> MEM_DATA<57> 9B8<> 10C1<> MEM_DATA<58> 9B8<> 10C1<> MEM_DATA<59> 9B8<> 10C1<> MEM_DATA<60> 9B8<> 10C1<> MEM_DATA<61> 9B8<> 10B1<> MEM_DATA<62> 9B8<> 10B1<> MEM_DATA<63> 9B8<> 10B1<> MEM_DQM<0> 9C6<> 10C7<> 35D5> MEM_DQM<1> 9C6<> 10B7<> 35D5> MEM_DQM<2> 9C6<> 10C5<> 35C5> MEM_DQM<3> 9C6<> 10B5<> 35C5> MEM_DQM<4> 9C6<> 10C3<> 35B5> MEM_DQM<5> 9C6<> 10B3<> 35B5> MEM_DQM<6> 9C6<> 10C1<> 35B5> MEM_DQM<7> 9C6<> 10B1<> 35A5> MEM_DQS<0> 9C6<> 10C7<> 35D5> MEM_DQS<1> 9C6<> 10B7<> 35D5> MEM_DQS<2> 9C6<> 10C5<> 35C5> MEM_DQS<3> 9C6<> 10B5<> 35C5> MEM_DQS<4> 9C6<> 10C3<> 35B5> MEM_DQS<5> 9C6<> 10B3<> 35B5> MEM_DQS<6> 9C6<> 10C1<> 35B5> MEM_DQS<7> 9C6<> 10B1<> 35A5> MEM_MUXSEL_LSB 9B6<> 10B5<> 10B7<> 35A5> MEM_MUXSEL_LSB_L_TP 9B6<> MEM_MUXSEL_MSB 9B6<> 10B1<> 10B3<> 35A5> MEM_MUXSEL_MSB_L_TP 9B6<> MEM_RAS_L 9A5< 9C6<> 35A5> MEM_WE_L 9A5< 9C6<> 35A5> MODEM_USB_DM 14B1< 25C3<> 37B2> 39D3> MODEM_USB_DP 14C1< 25C3<> 37B2> 39D3> MPIC_CPU_INT_L 5B2< 5B3< 14B5> NEC_AMC_TP 17A5< NEC_AVDD 17D6< 38A3> NEC_AVSS_F 17A5< 17B4< NEC_CRUN_L 17A7<> NEC_IDSEL 17B7< NEC_IO_RESET_L 17A7< 17B7< NEC_LEGC 17A7< 17A8< NEC_LUSB_OCI 17B3< 17B5< NEC_LUSB_OCI_UF 17B1< 25D8<> 39A6> NEC_LUSB_PPON 17B5> 25D8<> 39A6> NEC_MAIN_RESET_L 17A7< 17A7< NEC_NANDTESTEN_TP 17A4< NEC_NANDTESTOUT_TP 17A4<> NEC_NC<1> 17B5<> NEC_NC<2> 17B5<> NEC_OCI<3> 17B5< NEC_OCI<4> 17B5< NEC_OCI<5> 17B5< NEC_PCI_GNT_L 12C7<> 17B7< NEC_PCI_INTA_L 17B7<> NEC_PCI_INTB_L 17B7<> NEC_PCI_INTC_L 17B7<> NEC_PCI_INT_L 14B5<> 14D7< 17B8< NEC_PCI_REQ_L 12A7< 12D7<> 17B7> NEC_PME_L 17A7< 17A7> NEC_PPON3_TP 17B5> NEC_PPON4_TP 17B5> NEC_PPON5_TP 17B5> NEC_RREF 17B5<> NEC_RUSB_OCI 17B3< 17B5< NEC_RUSB_OCI_UF 17B1< 25D1<> 39D3> NEC_RUSB_PPON 17B5> 25D1<> 39D3> NEC_SMI_L_TP 17A7> NEC_USB_DAM 17D2<> 25D7<> 37B2> 39D3> NEC_USB_DAP 17D2<> 25D7<> 37B2> 39D3> NEC_USB_DBM 17C2<> 25D2<> 37B2> 39D3> NEC_USB_DBP 17C2<> 25D2<> 37A2> 39D3> NEC_USB_RSDM1 17C5<> NEC_USB_RSDM2 17C5<> NEC_USB_RSDP1 17C5<> NEC_USB_RSDP2 17C5<> NEC_XT1 17D5< NEC_XT2 17D5<> NEC_XT2_R 17D4< NUMLOCK_LED 23D2< NUMLOCK_LED_L 23D2< 29C7< OVER_18V_ADJ 30C3<> PCI1510_VR_EN_L 18C7< PCI_AD<0> 9C3< 12D6<> 17D7<> 18C7<> 24B5<> PCI_AD<31..0> 37C5> 39D3> PCI_AD<1> 9C3< 12D6<> 17D7<> 18C7<> 24B6<> PCI_AD<2> 9C3< 12D6<> 17D7<> 18C7<> 24C5<> PCI_AD<3> 9C3< 12D6<> 17C7<> 18C7<> 24C6<> PCI_AD<4> 9C3< 12D6<> 17C7<> 18C7<> 24C5<> PCI_AD<5> 9C3< 12D6<> 17C7<> 18C7<> 24C6<> PCI_AD<6> 9C3< 12C6<> 17C7<> 18C7<> 24C5<> PCI_AD<7> 9C3< 12C6<> 17C7<> 18C7<> 24C6<> PCI_AD<8> 9C3< 12C6<> 17C7<> 18C7<> 24C6<> PCI_AD<9> 9C3< 12C6<> 17C7<> 18C7<> 24C5<> PCI_AD<10> 9C3< 12C6<> 17C7<> 18C7<> 24C6<> PCI_AD<11> 9C3< 12C6<> 17C7<> 18C7<> 24C5<> PCI_AD<12> 9C3< 12C6<> 17C7<> 18C7<> 24C6<> PCI_AD<13> 9C3< 12C6<> 17C7<> 18C7<> 24C5<> PCI_AD<14> 9C3< 12C6<> 17C7<> 18C7<> 24C6<> PCI_AD<15> 9C3< 12C6<> 17C7<> 18C7<> 24C5<> PCI_AD<16> 9C3< 12C6<> 17C7<> 18C7<> 24C5<> PCI_AD<17> 9C3< 12C6<> 17C7<> 18C7<> 24C6<> PCI_AD<18> 9C3< 12C6<> 17C7<> 18B7<> 24C5<>
24D4< PCI_AD<19> 9B3< 12C6<> 17C7<> 18B7<> 24C6<> PCI_AD<20> 9B3< 12C6<> 17C7<> 18B7<> 24C5<> PCI_AD<21> 12C6<> 17C7<> 18B7<> 24C6<> PCI_AD<22> 12C6<> 17C7<> 18B7<> 24C5<> PCI_AD<23> 12C6<> 17C7<> 18B7<> 24C6<> PCI_AD<24> 9C1<> 12C6<> 17C7<> 18B7<> 24C5<> PCI_AD<25> 9C1<> 12C6<> 17C7<> 18B7<> 24C6<> PCI_AD<26> 9C1<> 12C6<> 17C7<> 18B7<> 24C5<> PCI_AD<27> 9C1<> 12C6<> 17C8<> 18B7<> 24D6<> PCI_AD<28> 9C1<> 12C6<> 17C7<> 18B7<> 24C5<> PCI_AD<29> 9C1<> 12C6<> 17B7<> 18B7<> 24D6<> PCI_AD<30> 9C1<> 12C6<> 17B7<> 18B7<> 24D5<> PCI_AD<31> 9C1<> 12C6<> 17B7<> 18B7<> 24D6<> PCI_CBE<0> 12C7<> 17B7<> 18B7<> 24C5<> PCI_CBE<3..0> 37C5> PCI_CBE<1> 12C7<> 17B7<> 18B7<> 24C6<> PCI_CBE<2> 12C7<> 17B7<> 18B7<> 24C6<> PCI_CBE<3> 12C7<> 17B7<> 18B7<> 24C6<> PCI_DEVSEL_L 12B7< 12C7<> 17B7<> 18A7<> 24C5<>
37C5> 39C3> PCI_FRAME_L 12B7< 12C7<> 17B7<> 18B7<> 24C5<>
37C5> 39D3> PCI_IRDY_L 12B7< 12C7<> 17B7<> 18B7<> 24C6<>
37C5> 39D3> PCI_PAR 12C7<> 17B7<> 18B7<> 24C5<> 37C5>
39C3> PCI_PERR_L 17B7<> 18B7<> 18D7< PCI_SERR_L 17B7> 18B7> 18D7< PCI_STOP_L 12A7< 12C7<> 17B7<> 18B7<> 24C5<>
37C5> 39C3> PCI_TRDY_L 12B7< 12C7<> 17B7<> 18A7<> 24C5<>
37C5> 39D3> PLL_STOP_L 7C4<> 7C8<> PMU_ACK_L 14C2< 29C4<> PMU_AC_DET 29A4< 29B4<>
D
SIZE
OF
SHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWING
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
1
2
3
4
5
67
8
12
3
4
5
6
78
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.
SCALE
NONE
42
PMU_AC_IN 29B4<> PMU_BATT0_DET_L 29B4<> PMU_BATT1_DET_L_PU 29B4<> 29D2< PMU_BATT_DET_L 29B3< 29D2< 30A4<> 39A3> PMU_BYTE 29B6< 29C7< PMU_CAPSLOCK_LED_L 29C6<> PMU_CHARGE_V 29C4<> 30B8<> PMU_CHRG_BATT_0 29C4<> 30A8<> PMU_CLK 14C2<> 29C4<> PMU_CNVSS 29B6< 29C7< PMU_CPU_HRESET_L 6A2< 6C3<> 29C4<> 39C1> PMU_EPM 29C4<> 29D2< PMU_FROM_INT 14C2<> 29C4<> PMU_I2C_CLK 29B4<> 29C2< PMU_I2C_DATA 29B4<> 29C2< PMU_INT_L 14B5<> 14B7< 29B6<> PMU_INT_NMI 14B5<> 14B7< 29D4<> PMU_KB_RESET_IN1 29A7<> PMU_KB_RESET_IN2 29A7<> PMU_KB_RESET_L 29A6> 29B7< 39C1> PMU_LID_CLOSED_L 23B3< 23D6<> 29B2< 29C4<> 39D1> PMU_NMI_BUTTON_L 29C2< 29C4<> PMU_NMI_L 29C2< 29C4<> PMU_NUMLOCK_LED_L 29C6<> PMU_OOPS 29B2< 29B4<> PMU_PME_L 14A5<> 17A8< 24D5<> 29B2< 29C4<>
39C3> PMU_POWERUP_OK 29B4<> 29D2< PMU_POWER_UP_L 28C8<> 29C6<> 29D7< 32B8< PMU_REQ_L 14B7< 14C2> 29C4<> PMU_RESET_BUTTON_L 23A7< 29C4<> 29D2< PMU_RESET_L 29B6<> PMU_SLEEP_LED 23C7<> 23D6<> 39D1> PMU_SLEEP_LED_L 23C8<> 29C4<> PMU_SMB_CLK 29B4<> 29C2< 30A3< PMU_SMB_DATA 29B4<> 29C2< 30A2< PMU_TO_INT 14C2<> 29C4<> POWER_UP 28D7<> POWER_VALID 29B2< 29C4<> PWR_BUTTON_L 23A7< 23B4<> RAM_ADDR<0> 9B4< 11B3<> 11B6<> RAM_ADDR<12..0> 35A5> RAM_ADDR<1> 9B4< 11B5<> 11B8<> RAM_ADDR<2> 9B4< 11B3<> 11B6<> RAM_ADDR<3> 9B4< 11B5<> 11B8<> RAM_ADDR<4> 9B4< 11B3<> 11B6<> RAM_ADDR<5> 9B4< 11B5<> 11B8<> RAM_ADDR<6> 9B4< 11B3<> 11B6<> RAM_ADDR<7> 9B4< 11B5<> 11B8<> RAM_ADDR<8> 9B4< 11B3<> 11B6<> RAM_ADDR<9> 9A4< 11B5<> 11B8<> RAM_ADDR<10> 9A4< 11B5<> 11B8<> RAM_ADDR<11> 9A4< 11B3<> 11B6<> RAM_ADDR<12> 9A4< 11B5<> 11B8<> RAM_BA<0> 9A4< 11B5<> 11B8<> RAM_BA<1..0> 35A5> RAM_BA<1> 9A4< 11B3<> 11B6<> RAM_CAS_L 9A4< 11B3<> 11B6<> 35A5> RAM_CKE<0> 9A4< 9C4< 11C6<> RAM_CKE<3..0> 35A5> RAM_CKE<1> 9A4< 9C4< 11C8<> RAM_CKE<2> 9A4< 9C4< 11C3<> RAM_CKE<3> 9A4< 9C4< 11C5<> RAM_CS_L<0> 9C4< 11B8<> RAM_CS_L<3..0> 35A5> RAM_CS_L<1> 9C4< 11B6<> RAM_CS_L<2> 9C4< 11B5<> RAM_CS_L<3> 9C4< 11B3<> RAM_DATA_A<0> 10C8<> 11D8<> RAM_DATA_A<7..0> 35D5> RAM_DATA_A<1> 10C8<> 11D8<> RAM_DATA_A<2> 10C8<> 11D8<> RAM_DATA_A<3> 10B8<> 11D8<> RAM_DATA_A<4> 10B8<> 11D6<> RAM_DATA_A<5> 10B8<> 11D6<> RAM_DATA_A<6> 10B8<> 11D6<> RAM_DATA_A<7> 10B8<> 11D6<> RAM_DATA_A<8> 10B8<> 11D8<> RAM_DATA_A<15..8> 35C5> RAM_DATA_A<9> 10C7<> 11D8<> RAM_DATA_A<10> 10C7<> 11D8<> RAM_DATA_A<11> 10C7<> 11D8<> RAM_DATA_A<12> 10C7<> 11D6<> RAM_DATA_A<13> 10C7<> 11D6<> RAM_DATA_A<14> 10C7<> 11D6<> RAM_DATA_A<15> 10C7<> 11D6<> RAM_DATA_A<16> 10C6<> 11D8<> RAM_DATA_A<23..16> 35C5> RAM_DATA_A<17> 10C6<> 11C8<> RAM_DATA_A<18> 10C6<> 11C8<> RAM_DATA_A<19> 10B6<> 11C8<> RAM_DATA_A<20> 10B6<> 11D6<> RAM_DATA_A<21> 10B6<> 11C6<> RAM_DATA_A<22> 10B6<> 11C6<> RAM_DATA_A<23> 10B6<> 11C6<> RAM_DATA_A<24> 10B6<> 11C8<> RAM_DATA_A<31..24> 35C5> RAM_DATA_A<25> 10C5<> 11C8<> RAM_DATA_A<26> 10C5<> 11C8<> RAM_DATA_A<27> 10C5<> 11C8<> RAM_DATA_A<28> 10C5<> 11C6<> RAM_DATA_A<29> 10C5<> 11C6<> RAM_DATA_A<30> 10C5<> 11C6<> RAM_DATA_A<31> 10C5<> 11C6<> RAM_DATA_A<32> 10C4<> 11B8<> RAM_DATA_A<39..32> 35B5> RAM_DATA_A<33> 10C4<> 11B8<> RAM_DATA_A<34> 10C4<> 11B8<> RAM_DATA_A<35> 10C4<> 11B8<> RAM_DATA_A<36> 10B4<> 11B6<> RAM_DATA_A<37> 10B4<> 11B6<> RAM_DATA_A<38> 10B4<> 11B6<> RAM_DATA_A<39> 10B4<> 11B6<> RAM_DATA_A<40> 10B4<> 11B8<> RAM_DATA_A<47..40> 35B5> RAM_DATA_A<41> 10D3<> 11B8<> RAM_DATA_A<42> 10C3<> 11A8<> RAM_DATA_A<43> 10C3<> 11A8<> RAM_DATA_A<44> 10C3<> 11B6<> RAM_DATA_A<45> 10C3<> 11B6<> RAM_DATA_A<46> 10C3<> 11A6<> RAM_DATA_A<47> 10C3<> 11A6<> RAM_DATA_A<48> 10C2<> 11A8<> RAM_DATA_A<55..48> 35B5> RAM_DATA_A<49> 10C2<> 11A8<> RAM_DATA_A<50> 10C2<> 11A8<> RAM_DATA_A<51> 10C2<> 11A8<> RAM_DATA_A<52> 10B2<> 11A6<> RAM_DATA_A<53> 10B2<> 11A6<> RAM_DATA_A<54> 10B2<> 11A6<> RAM_DATA_A<55> 10B2<> 11A6<> RAM_DATA_A<56> 10B2<> 11A8<> RAM_DATA_A<63..56> 35A5> RAM_DATA_A<57> 10D1<> 11A8<> RAM_DATA_A<58> 10C1<> 11A8<> RAM_DATA_A<59> 10C1<> 11A8<> RAM_DATA_A<60> 10C1<> 11A6<> RAM_DATA_A<61> 10C1<> 11A6<> RAM_DATA_A<62> 10C1<> 11A6<> RAM_DATA_A<63> 10C1<> 11A6<> RAM_DATA_B<0> 10C8<> 11D5<> RAM_DATA_B<7..0> 35D5> RAM_DATA_B<1> 10C8<> 11D5<> RAM_DATA_B<2> 10C8<> 11D5<> RAM_DATA_B<3> 10C8<> 11D5<> RAM_DATA_B<4> 10C8<> 11D3<> RAM_DATA_B<5> 10C8<> 11D3<> RAM_DATA_B<6> 10C8<> 11D3<> RAM_DATA_B<7> 10C8<> 11D3<> RAM_DATA_B<8> 10C8<> 11D5<> RAM_DATA_B<15..8> 35C5> RAM_DATA_B<9> 10C8<> 11D5<> RAM_DATA_B<10> 10C8<> 11D5<> RAM_DATA_B<11> 10C8<> 11D5<> RAM_DATA_B<12> 10C8<> 11D3<> RAM_DATA_B<13> 10C8<> 11D3<> RAM_DATA_B<14> 10C8<> 11D3<> RAM_DATA_B<15> 10C8<> 11D3<> RAM_DATA_B<16> 10C6<> 11D5<> RAM_DATA_B<23..16> 35C5> RAM_DATA_B<17> 10C6<> 11C5<> RAM_DATA_B<18> 10C6<> 11C5<> RAM_DATA_B<19> 10C6<> 11C5<> RAM_DATA_B<20> 10C6<> 11D3<> RAM_DATA_B<21> 10C6<> 11C3<> RAM_DATA_B<22> 10C6<> 11C3<> RAM_DATA_B<23> 10C6<> 11C3<> RAM_DATA_B<24> 10C6<> 11C5<>
RAM_DATA_B<25..24> 35C5> RAM_DATA_B<25> 10C6<> 11C5<> RAM_DATA_B<26> 10C6<> 11C5<> 35C5> RAM_DATA_B<27> 10C6<> 11C5<> RAM_DATA_B<31..27> 35C5> RAM_DATA_B<28> 10C6<> 11C3<> RAM_DATA_B<29> 10C6<> 11C3<> RAM_DATA_B<30> 10C6<> 11C3<> RAM_DATA_B<31> 10C6<> 11C3<> RAM_DATA_B<32> 10D4<> 11B5<> RAM_DATA_B<39..32> 35B5> RAM_DATA_B<33> 10C4<> 11B5<> RAM_DATA_B<34> 10C4<> 11B5<> RAM_DATA_B<35> 10C4<> 11B5<> RAM_DATA_B<36> 10C4<> 11B3<> RAM_DATA_B<37> 10C4<> 11B3<> RAM_DATA_B<38> 10C4<> 11B3<> RAM_DATA_B<39> 10C4<> 11B3<> RAM_DATA_B<40> 10C4<> 11B5<> RAM_DATA_B<47..40> 35B5> RAM_DATA_B<41> 10C4<> 11B5<> RAM_DATA_B<42> 10C4<> 11A5<> RAM_DATA_B<43> 10C4<> 11A5<> RAM_DATA_B<44> 10C4<> 11B3<> RAM_DATA_B<45> 10C4<> 11B3<> RAM_DATA_B<46> 10C4<> 11A3<> RAM_DATA_B<47> 10C4<> 11A3<> RAM_DATA_B<48> 10D2<> 11A5<> RAM_DATA_B<55..48> 35B5> RAM_DATA_B<49> 10C2<> 11A5<> RAM_DATA_B<50> 10C2<> 11A5<> RAM_DATA_B<51> 10C2<> 11A5<> RAM_DATA_B<52> 10C2<> 11A3<> RAM_DATA_B<53> 10C2<> 11A3<> RAM_DATA_B<54> 10C2<> 11A3<> RAM_DATA_B<55> 10C2<> 11A3<> RAM_DATA_B<56> 10C2<> 11A5<> RAM_DATA_B<63..56> 35A5> RAM_DATA_B<57> 10C2<> 11A5<> RAM_DATA_B<58> 10C2<> 11A5<> RAM_DATA_B<59> 10C2<> 11A5<> RAM_DATA_B<60> 10C2<> 11A3<> RAM_DATA_B<61> 10C2<> 11A3<> RAM_DATA_B<62> 10C2<> 11A3<> RAM_DATA_B<63> 10C2<> 11A3<> RAM_DQM_A<0> 10B8<> 11D6<> 35D5> RAM_DQM_A<1> 10C7<> 11D6<> 35C5> RAM_DQM_A<2> 10B6<> 11C6<> 35C5> RAM_DQM_A<3> 10C5<> 11C6<> 35C5> RAM_DQM_A<4> 10B4<> 11B6<> 35B5> RAM_DQM_A<5> 10C3<> 11B6<> 35B5> RAM_DQM_A<6> 10B2<> 11A6<> 35B5> RAM_DQM_A<7> 10C1<> 11A6<> 35A5> RAM_DQM_B<0> 10C8<> 11D3<> 35D5> RAM_DQM_B<1> 10C8<> 11D3<> 35C5> RAM_DQM_B<2> 10C6<> 11C3<> 35C5> RAM_DQM_B<3> 10C6<> 11C3<> 35C5> RAM_DQM_B<4> 10C4<> 11B3<> 35B5> RAM_DQM_B<5> 10C4<> 11B3<> 35B5> RAM_DQM_B<6> 10C2<> 11A3<> 35B5> RAM_DQM_B<7> 10C2<> 11A3<> 35A5> RAM_DQS_A<0> 10B8<> 11D8<> 35D5> RAM_DQS_A<1> 10C7<> 11D8<> 35C5> RAM_DQS_A<2> 10B6<> 11C8<> 35C5> RAM_DQS_A<3> 10C5<> 11C8<> 35C5> RAM_DQS_A<4> 10B4<> 11B8<> 35B5> RAM_DQS_A<5> 10C3<> 11B8<> 35B5> RAM_DQS_A<6> 10B2<> 11A8<> 35B5> RAM_DQS_A<7> 10C1<> 11A8<> 35A5> RAM_DQS_B<0> 10C8<> 11D5<> 35D5> RAM_DQS_B<1> 10C8<> 11D5<> 35C5> RAM_DQS_B<2> 10C6<> 11C5<> 35C5> RAM_DQS_B<3> 10C6<> 11C5<> 35C5> RAM_DQS_B<4> 10C4<> 11B5<> 35B5> RAM_DQS_B<5> 10C4<> 11B5<> 35B5> RAM_DQS_B<6> 10C2<> 11A5<> 35B5> RAM_DQS_B<7> 10C2<> 11A5<> 35A5> RAM_RAS_L 9A4< 11B3<> 11B6<> 35A5> RAM_WE_L 9A4< 11B5<> 11B8<> 35A5> RESET_VREF 6C3<> RF_DISABLE_L 24D6<> 39C3> ROM_CS_L 9B3< 12A4< 39C3> ROM_CS_TP_L 9C3< 24B6<> ROM_OE_L 9B3< 12A4< 39C3> ROM_OE_TP_L 9B3< 24C5<> ROM_ONBOARD_CS_L 9B3< 39C3> ROM_ONBOARD_CS_TP_L 9B3< 24C6<> ROM_RW_L 9B3< 12A4< 39C3> ROM_RW_TP_L 9B3< 24C6<> ROM_WP_L 9B3< SI_A2 19C4< SI_EXT_SWING_SET 19C2<> SI_HPD 19C4< SI_I2C_CLK 19D4< 20C5<> SI_I2S_DATA 19C4< 20C5<> SI_MSEN 19D2<> SI_PD_L 19C4< SI_RST_L 19C4< SI_TMDS_CLKN 19C2< 19C2<> 36D1> SI_TMDS_CLKP 19C2<> 19C2< 36D1> SI_TMDS_CLK_STM 19D1< SI_TMDS_D0_STM 19D1< SI_TMDS_D1_STM 19D1< SI_TMDS_D2_STM 19C1< SI_TMDS_DN<0> 19C2< 19C2<> 36D1> SI_TMDS_DN<1> 19B2< 19C2<> 36D1> SI_TMDS_DN<2> 19B2< 19C2<> 36C1> SI_TMDS_DP<0> 19C2< 19C2<> 36D1> SI_TMDS_DP<1> 19B2< 19C2<> 36C1> SI_TMDS_DP<2> 19B2< 19C2<> 36C1> SI_VREF_IDCK_N 19C2< 19C4< SLEEP 23D7<> 25D7<> 29B6<> 29D7< 32A4<
32A6< 32B3< 32B8<> 34B3< 34C2< 39C1>
SLEEP_LED 23C3<> 39C1> SLEEP_LED_DGND 23C3<> SLEEP_LED_I 23D3< SLEEP_LED_L 23D4< SLEEP_LED_SW_L 23D4<> SLEEP_LED_UF 23D3< SLEEP_LS5 32A4<> 32A8< SLEEP_LS5_EN_L 32A5<> SLEEP_L_LS5 18D5< 20A7<> 26A8<> 32A5<> 33C7<>
34C8< SLEEP_L_LS5_EN_L 32A6<> SLEEP_L_LS5_INV 34A3< 34C2< 34C8<> SLEEP_L_LS5_NET 32B3<> 34C8<> SLEEP_NET 32A3<> SLEEP_NET_INV 32A3<> SND_AMP_MUTE 25C7<> 25D6<> 39A6> SND_AMP_MUTE_CTRL 25B5<> 25D6<> SND_AMP_MUTE_L 14B5<> 25D5<> SND_HP_MUTE 25C5<> SND_HP_MUTE_L 14C5<> 25C5<> 39A6> SND_HP_MUTE_LO 25C6<> 25C7<> SND_HP_SENSE_L 14B5<> 25C8<> 39A6> SND_HW_RESET_L 14A7< 14B5<> 25D7<> 39A6> SND_LIN_SENSE_L 14B5<> 25C8<> 39A6> SOFT_PWR_ON_L 22D1<> 23A3< 29A8< 29C6<> 29D7<
33A4<> 39B3> ST7_SLEEP_LED_H 23C5<> 23C6<> 23D6<> 39D1> STOP_AGP_L 12D2< 12D4<> SYSCLK_CPU 5C3< 8A6< 35D1> SYSCLK_CPU_UF 8A5<> 35D1> SYSCLK_DDRCLK_A0 9D4< 11D8<> 35D1> SYSCLK_DDRCLK_A0_L 9D4< 11D8<> 35C1> SYSCLK_DDRCLK_A0_L_UF 9B6<> 9D5< 35D1> SYSCLK_DDRCLK_A0_UF 9B6<> 9D5< 35D1> SYSCLK_DDRCLK_A1 9D4< 11A6<> 35C1> SYSCLK_DDRCLK_A1_L 9D4< 11A6<> 35C1> SYSCLK_DDRCLK_A1_L_UF 9B6<> 9D5< 35D1> SYSCLK_DDRCLK_A1_UF 9B6<> 9D5< 35D1> SYSCLK_DDRCLK_B0 9D4< 11D5<> 35C1> SYSCLK_DDRCLK_B0_L 9C4< 11D5<> 35C1> SYSCLK_DDRCLK_B0_L_UF 9B6<> 9C5< 35D1> SYSCLK_DDRCLK_B0_UF 9B6<> 9D5< 35D1> SYSCLK_DDRCLK_B1 9D4< 11A3<> 35C1> SYSCLK_DDRCLK_B1_L 9D4< 11A3<> 35C1> SYSCLK_DDRCLK_B1_L_UF 9B6<> 9D5< 35D1> SYSCLK_DDRCLK_B1_UF 9B6<> 9D5< 35D1> SYSCLK_LA_TP 8A5<> SYSTEM_CLK_EN 14A5< 14B6< 29C4<> THERM1_A_DM 25A7< 25A8< 37A2> THERM1_A_DP 25A7< 25A8< 37A2> THERM1_DM 25A5< 25A6< 25B5<> 25B6< 37A2> THERM1_DP 25A5< 25A6< 25B5<> 25B6< 37A2> THERM1_M_DM 25B7< 25B8< 37A2> THERM1_M_DP 25B7< 25B8< 37A2>
THERM2_A_DM 25A7< 25A8< 37A2> THERM2_A_DP 25A7< 25A8< 37A2> THERM2_DM 25A5< 25A6< 25B5<> 25B6< 37A2> THERM2_DP 25A5< 25A6< 25B5<> 25B6< 37A2> THERM2_M_DM 25B7< 25B8< 37A2> THERM2_M_DP 25B7< 25B8< 37A2> THERM_INV 25B1<> THERM_L_OC 25B1<> 29B4<> TMDS_CLKN 19B1< 19C1< 19D1< 22C8<> 37C2> TMDS_CLKP 19B1< 19C1< 19D2< 22C8<> 37C2> TMDS_CONN_CLKN 22C7<> 22C7<> 36C1> 39C6> TMDS_CONN_CLKP 22C7<> 22C7<> 36C1> 39C6> TMDS_CONN_DN<0> 22D6<> 36C1> TMDS_CONN_DN<1> 22D6<> 36B1> TMDS_CONN_DN<2> 22D6<> 36B1> TMDS_CONN_DP<0> 22D6<> 36C1> TMDS_CONN_DP<1> 22D6<> 36B1> TMDS_CONN_DP<2> 22D6<> 36B1> TMDS_DN<0> 19B1< 19C1< 19D1< 22D7<> 37C2> TMDS_DN<0..2> 39C6> TMDS_DN<1> 19B1< 19B1< 19C1< 22D5<> 37B2> TMDS_DN<2> 19A1< 19B1< 19C1< 22D5<> 37B2> TMDS_DP<0> 19B1< 19C1< 19D2< 22D7<> 37B2> TMDS_DP<0..2> 39C6> TMDS_DP<1> 19B1< 19B1< 19C2< 22C5<> 37B2> TMDS_DP<2> 19A1< 19B1< 19C2< 22D5<> 37B2> TPAD_F_RXD 23B5<> 39B3> TPAD_F_TXD 23B5<> 39B3> TPAD_RXD 23A6< 29C2< 29C4<> TPAD_TXD 23B6< 29B2< 29C4<> TPS2211_SHTDWN_L 18C5< TV_C 22A6<> 39A6> TV_COMP 22A6<> 39A6> TV_GND1 22B6<> 38B6> 39A6> TV_GND2 22A6<> 38B6> 39A6> TV_Y 22A6<> 39A6> UIDE_ADDR<0> 13D7<> 24C4< UIDE_ADDR<2..0> 37C5> UIDE_ADDR<1> 13D7<> 24C4< UIDE_ADDR<2> 13D7<> 24B4< UIDE_CS0_L 13C7<> 24C4< 37C5> UIDE_CS1_L 13C7<> 24B4< 37C5> UIDE_DATA<0> 13D7<> 24D4< UIDE_DATA<6..0> 37C5> UIDE_DATA<1> 13D7<> 24D4< UIDE_DATA<2> 13D7<> 24D4< UIDE_DATA<3> 13D7<> 24D4< UIDE_DATA<4> 13D7<> 24C4< UIDE_DATA<5> 13D7<> 24C4< UIDE_DATA<6> 13D7<> 24C4< UIDE_DATA<7> 13D7<> 24C4< 37C5> UIDE_DATA<8> 13D7<> 24C4< UIDE_DATA<15..8> 37C5> UIDE_DATA<9> 13D7<> 24C4< UIDE_DATA<10> 13D7<> 24C4< UIDE_DATA<11> 13D7<> 24D4< UIDE_DATA<12> 13D7<> 24B4< UIDE_DATA<13> 13D7<> 24B4< UIDE_DATA<14> 13D7<> 24C4< UIDE_DATA<15> 13D7<> 24B4< UIDE_DIOR_L 13C7<> 24A4< 37C5> UIDE_DIOW_L 13C7<> 24A4< 37C5> UIDE_DMACK_L 13C7<> 24A4< 37C5> UIDE_DMARQ 13C7<> 37C5> UIDE_INTRQ 13C7< 37C5> UIDE_IOCHRDY 13C7< 24A4< 37C5> UIDE_REF 13C7<> 38C3> UIDE_RST_L 13C7<> 24A4< 37C5> USB_DAM 14B2<> 14D2< USB_DAP 14B2<> 14D2< USB_DBM 14B2<> 14D2< USB_DBP 14B2<> 14D2< USB_DCM 14B2<> 14D2< USB_DCP 14B2<> 14D2< USB_DDM 14B2<> 14D2< USB_DDP 14B2<> 14C2< USB_DEM 14B2<> 14C2< 37B2> USB_DEP 14B2<> 14C2< 37B2> USB_DFM 14B2< 14B2<> 37B2> USB_DFP 14B2<> 14C2< 37B2> USB_OC_AB_L 14B2< 14C7< USB_OC_CD_L 14B2< 14C7< USB_OC_EF_L 14B2< 14C7< USB_PWREN_AB_L 14B2<> 14C7< USB_PWREN_CD_L 14B2<> 14C7< USB_PWREN_EF_L 14B2<> 14C7< VCORE_AB_SEL 33A7<> 33C6< VCORE_AB_SEL_INV 33A7<> VCORE_AB_SEL_OPT 33A6<> VCORE_BOOST 33C4<> 38C1> VCORE_BST 33C5<> 38C1> VCORE_CC 33B6<> 38C1> VCORE_D0 33A3<> VCORE_D1 33A3<> VCORE_D2 33A3<> VCORE_D3 33A3<> VCORE_D4 33A3<> VCORE_DH 33B5<> 38C1> VCORE_DL 33B5<> 38C1> VCORE_FAST<1> 33D4< 33D5< VCORE_FAST<2> 33D4< 33D5< VCORE_FAST<3> 33D4< 33D5< VCORE_FAST<4> 33D4< 33D5< VCORE_FB 33B5< 38B1> 39C6> VCORE_GND 33B5<> 38B1> VCORE_GNDA 33B6<> 38B1> VCORE_GNDDIV 33A5< 33A5< 38B1> VCORE_GNDDIV_TEST 33A4<> VCORE_GNDSNS 33A1<> 33A5< 38B1> VCORE_GNDSNS_TEST 33A4<> VCORE_ILIM 33C6<> 38C1> VCORE_LX 33B5<> 38C1> VCORE_MUX_EN 33D5<> VCORE_MUX_SEL 33D5<> VCORE_OFFSET_DIV 33B6<> VCORE_REF 33B6<> 38C1> VCORE_SHDN_L 5B3< 33C6<> VCORE_SHDN_L_3V 5B3<> VCORE_SLOW<1> 33D6< VCORE_SLOW<2> 33D6< VCORE_SLOW<3> 33D6< VCORE_SLOW<4> 33D6< VCORE_SNS 33A1<> 38B1> VCORE_TIME 33B4<> 38B1> VCORE_TON 33B6< 38C1> VCORE_VCC 33C6< 38C1> VCORE_VGATE 14B5< 14B7< 33B4> 38B1> VCORE_VID<0> 33B7< VCORE_VID<1> 33B7< 33D3< 33D4> VCORE_VID<2> 33B7< 33D3< 33D4> VCORE_VID<3> 33B7< 33D3< 33D4> VCORE_VID<4> 33B7< 33D3< 33D4> VCORE_VSENSE 33C2<> VGA_B 22C6<> 22C7< 39B6> VGA_G 22C5<> 22C7< 39B6> VGA_HSYNC 22C6<> 22D7< 39B6> VGA_R 22B7< 22C5<> 39B6> VGA_VSYNC 22C5<> 22D7< 39B6> ZT10_SPN 4C2<> ZT301_SPN 4C2<> ZT302_SPN 4C2<> ZV_LCDDATA20_PU 20C7<>
051-6809
42 44
B
A
D
C
B
A
D
C
B
8 7
6
5
4
3
2 1
8
7 6
5
4
3
2
1
43
*** Part Cross-Reference for the entire design ***
C1 CAP 5 C2 CAP 5 C3 CAP 33 C4 CAP 33 C5 CAP 33 C6 CAP 33 C7 CAP 32 C8 CAP 32 C9 CAP 5 C10 CAP 5 C11 CAP 30 C12 CAP 33 C13 CAP 33 C14 CAP 33 C15 CAP 33 C16 CAP 33 C17 CAP 5 C18 CAP 5 C19 CAP 22 C20 CAP 5 C21 CAP 33 C22 CAP 22 C23 CAP 30 C24 CAP 30 C25 CAP 5 C26 CAP 5 C27 CAP 5 C28 CAP 5 C29 CAP 5 C30 CAP 5 C31 CAP 5 C32 CAP 5 C33 CAP 5 C34 CAP 5 C35 CAP 30 C36 CAP 30 C37 CAP 18 C38 CAP 5 C39 CAP 5 C40 CAP 18 C41 CAP 30 C42 CAP 30 C43 CAP 30 C44 CAP 5 C45 CAP 5 C46 CAP 5 C47 CAP 5 C48 CAP 5 C49 CAP 5 C50 CAP 5 C51 CAP_P 33 C52 CAP_P 33 C53 CAP 5 C54 CAP 5 C55 CAP 5 C56 CAP 5 C57 CAP 33 C58 CAP 5 C59 CAP 5 C60 CAP 18 C61 CAP 5 C62 CAP 5 C63 CAP 33 C64 CAP 33 C65 CAP 33 C66 CAP 33 C67 CAP 30 C68 CAP 5 C69 CAP 5 C70 CAP 33 C71 CAP 30 C72 CAP 5 C73 CAP 5 C74 CAP 33 C75 CAP 5 C76 CAP 33 C77 CAP_P 33 C78 CAP_P 33 C79 CAP 33 C80 CAP 33 C81 CAP 5 C82 CAP 5 C83 CAP 33 C84 CAP 33 C85 CAP 5 C86 CAP 5 C87 CAP 5 C88 CAP 5 C89 CAP 5 C90 CAP 33 C91 CAP_P 33 C92 CAP_P 33 C93 CAP 33 C94 CAP 33 C95 CAP 30 C96 CAP 30 C97 CAP 30 C98 CAP 30 C99 CAP 30 C100 CAP 33 C101 CAP 33 C102 CAP 5 C103 CAP 5 C104 CAP 5 C105 CAP 33 C106 CAP 33 C107 CAP 5 C108 CAP 5 C109 CAP 5 C110 CAP 5 C111 CAP_P 33 C112 CAP 30 C113 CAP 30 C114 CAP 32 C115 CAP 30 C116 CAP 30 C117 CAP 30 C118 CAP 30 C119 CAP 31 C120 CAP 6 C121 CAP 31 C122 CAP 9 C123 CAP 32 C124 CAP 31 C125 CAP 9 C126 CAP 32 C127 CAP 11 C128 CAP 11 C129 CAP 34 C130 CAP 33 C131 CAP 31 C132 CAP 11 C133 CAP 34 C134 CAP 31 C135 CAP 31 C136 CAP 17 C137 CAP 31 C138 CAP 31 C139 CAP 16 C140 CAP 11 C141 CAP 16 C142 CAP 16 C143 CAP 32 C144 CAP 16 C145 CAP 16 C146 CAP 16 C147 CAP 16 C148 CAP 16 C149 CAP 16 C150 CAP 11 C151 CAP 14 C152 CAP 14 C153 CAP 31 C154 CAP 31 C155 CAP 31 C156 CAP 11 C157 CAP 11 C158 CAP 16 C159 CAP 16 C160 CAP 16 C161 CAP 16 C162 CAP 16 C163 CAP 16 C164 CAP 16 C165 CAP 16 C166 CAP 16
C167 CAP 16 C168 CAP 16 C169 CAP 11 C170 CAP 16 C171 CAP 16 C172 CAP 16 C173 CAP 17 C174 CAP 11 C175 CAP 16 C176 CAP 16 C177 CAP 16 C178 CAP 16 C179 CAP 16 C180 CAP 16 C181 CAP 16 C182 CAP 16 C183 CAP 16 C184 CAP 16 C185 CAP 16 C186 CAP 16 C187 CAP 8 C188 CAP 23 C189 CAP 16 C190 CAP 12 C191 CAP 16 C192 CAP 16 C193 CAP 34 C194 CAP 34 C195 CAP 34 C196 CAP 34 C197 CAP 17 C198 CAP 23 C199 CAP 23 C200 CAP 16 C201 CAP 16 C202 CAP 16 C203 CAP 16 C204 CAP 16 C205 CAP 16 C206 CAP 16 C207 CAP 16 C208 CAP 16 C209 CAP 34 C210 CAP 23 C211 CAP 11 C212 CAP 16 C213 CAP 16 C214 CAP 16 C215 CAP 16 C216 CAP 16 C217 CAP 16 C218 CAP 16 C219 CAP 16 C220 CAP 23 C221 CAP 16 C222 CAP 16 C223 CAP 16 C224 CAP 16 C225 CAP 16 C226 CAP 16 C227 CAP 16 C228 CAP 16 C229 CAP 16 C230 CAP 16 C231 CAP 16 C232 CAP 34 C233 CAP 23 C234 CAP 16 C235 CAP 14 C236 CAP 16 C237 CAP 16 C238 CAP 16 C239 CAP 16 C240 CAP 16 C241 CAP 16 C242 CAP 16 C243 CAP 16 C244 CAP 31 C245 CAP 16 C246 CAP 14 C247 CAP 16 C248 CAP 16 C249 CAP 9 C250 CAP 16 C251 CAP 16 C252 CAP 16 C253 CAP 16 C254 CAP 16 C255 CAP 29 C256 CAP 14 C257 CAP 16 C258 CAP 16 C259 CAP 16 C260 CAP 16 C261 CAP 16 C262 CAP 16 C263 CAP 16 C264 CAP 16 C265 CAP 16 C266 CAP 16 C267 CAP_P 34 C268 CAP 16 C269 CAP 16 C270 CAP 12 C271 CAP 16 C272 CAP 16 C273 CAP 16 C274 CAP 16 C275 CAP 16 C276 CAP 31 C277 CAP 29 C278 CAP 16 C279 CAP 16 C280 CAP 16 C281 CAP 16 C282 CAP 16 C283 CAP 16 C284 CAP 24 C285 CAP 16 C286 CAP 16 C287 CAP 16 C288 CAP 16 C289 CAP 16 C290 CAP 16 C291 CAP 12 C292 CAP 16 C293 CAP 16 C294 CAP 16 C295 CAP 16 C296 CAP 16 C297 CAP 16 C298 CAP 34 C299 CAP 16 C300 CAP 16 C301 CAP 16 C302 CAP 16 C303 CAP 16 C304 CAP 16 C305 CAP 16 C306 CAP 16 C307 CAP_P 34 C308 CAP 16 C309 CAP 16 C310 CAP 16 C311 CAP 12 C312 CAP 16 C313 CAP 16 C314 CAP 16 C315 CAP 16 C316 CAP 16 C317 CAP 16 C318 CAP 16 C319 CAP 16 C320 CAP 16 C321 CAP 16 C322 CAP 16 C323 CAP 16 C324 CAP 16 C325 CAP 16 C326 CAP 31 C327 CAP 16 C328 CAP 16 C329 CAP 16 C330 CAP 16 C331 CAP 16 C332 CAP 16 C333 CAP 16 C334 CAP 16
C335 CAP 16 C336 CAP 31 C337 CAP 14 C338 CAP 34 C339 CAP 29 C340 CAP 29 C341 CAP 16 C342 CAP 16 C343 CAP 16 C344 CAP 16 C345 CAP 16 C346 CAP 16 C347 CAP 16 C348 CAP 16 C349 CAP 16 C350 CAP 16 C351 CAP 16 C352 CAP 16 C353 CAP 32 C354 CAP 16 C355 CAP 34 C356 CAP 11 C357 CAP 16 C358 CAP 16 C359 CAP 16 C360 CAP 16 C361 CAP 16 C362 CAP 12 C363 CAP 16 C364 CAP 16 C365 CAP 16 C366 CAP 16 C367 CAP 16 C368 CAP 16 C369 CAP 16 C370 CAP 29 C371 CAP 16 C372 CAP 12 C373 CAP 16 C374 CAP 16 C375 CAP 16 C376 CAP 16 C377 CAP 16 C378 CAP 16 C379 CAP 16 C380 CAP 16 C381 CAP 16 C382 CAP 16 C383 CAP 11 C384 CAP 19 C385 CAP 16 C386 CAP 14 C387 CAP 14 C388 CAP 14 C389 CAP 14 C390 CAP 19 C391 CAP 11 C392 CAP 14 C393 CAP_P 34 C394 CAP 14 C395 CAP 16 C396 CAP_P 34 C397 CAP 11 C398 CAP 32 C399 CAP 14 C400 CAP 14 C401 CAP 19 C402 CAP 14 C403 CAP 11 C404 CAP 11 C405 CAP_P 34 C406 CAP 29 C407 CAP 20 C408 CAP 19 C409 CAP 19 C410 CAP 32 C411 CAP 20 C412 CAP 19 C413 CAP 21 C414 CAP 21 C415 CAP 32 C416 CAP 32 C417 CAP 21 C418 CAP 21 C419 CAP 21 C420 CAP 21 C421 CAP 21 C422 CAP 21 C423 CAP 21 C424 CAP 21 C425 CAP 21 C426 CAP 21 C427 CAP 21 C428 CAP 32 C429 CAP 32 C430 CAP 21 C431 CAP 20 C432 CAP 32 C433 CAP 32 C434 CAP 20 C435 CAP 20 C436 CAP 21 C437 CAP 21 C438 CAP 21 C439 CAP 21 C440 CAP 20 C441 CAP 20 C442 CAP 19 C443 CAP 20 C444 CAP 21 C445 CAP 20 C446 CAP 20 C447 CAP 21 C448 CAP 20 C449 CAP 20 C450 CAP 21 C451 CAP 20 C452 CAP 20 C453 CAP 21 C454 CAP 21 C455 CAP 20 C456 CAP 21 C457 CAP 19 C458 CAP 19 C459 CAP 21 C460 CAP 21 C461 CAP 21 C462 CAP 21 C463 CAP 21 C464 CAP 21 C465 CAP 20 C466 CAP 20 C467 CAP 29 C468 CAP 21 C469 CAP 20 C470 CAP 21 C471 CAP 21 C472 CAP 21 C473 CAP 21 C474 CAP 22 C475 CAP 21 C476 CAP 19 C477 CAP 20 C478 CAP 21 C479 CAP 20 C480 CAP 20 C481 CAP 20 C482 CAP 20 C483 CAP 21 C484 CAP 20 C485 CAP 20 C486 CAP 20 C487 CAP 20 C488 CAP 21 C489 CAP 21 C490 CAP 19 C491 CAP 21 C492 CAP 21 C493 CAP 21 C494 CAP 20 C495 CAP 20 C496 CAP 21 C497 CAP 20 C498 CAP 20 C499 CAP 21 C500 CAP 21 C501 CAP 21 C502 CAP 5
C503 CAP 22 C504 CAP 21 C505 CAP 20 C506 CAP 21 C507 CAP 20 C508 CAP 19 C509 CAP 20 C510 CAP 20 C511 CAP 21 C512 CAP 20 C513 CAP 20 C514 CAP 21 C515 CAP 20 C516 CAP 19 C517 CAP 21 C518 CAP 21 C519 CAP 21 C520 CAP 21 C521 CAP 21 C522 CAP 20 C523 CAP 21 C524 CAP 20 C525 CAP 20 C526 CAP 20 C527 CAP 21 C528 CAP 20 C529 CAP 20 C530 CAP 19 C531 CAP 20 C532 CAP 20 C533 CAP 20 C534 CAP 21 C535 CAP 21 C536 CAP 20 C537 CAP 21 C538 CAP 21 C539 CAP 21 C540 CAP 21 C541 CAP 21 C542 CAP 21 C543 CAP 21 C544 CAP 21 C545 CAP 21 C546 CAP 21 C547 CAP 21 C548 CAP 22 C549 CAP 22 C550 CAP 21 C551 CAP 21 C552 CAP 21 C553 CAP 21 C554 CAP 32 C555 CAP 32 C556 CAP 32 C557 CAP 32 C558 CAP 32 C559 CAP 32 C560 CAP 32 C561 CAP 32 C562 CAP 32 C563 CAP 32 C564 CAP 32 C565 CAP 32 C566 CAP 32 C567 CAP 32 C568 CAP 32 C569 CAP 32 C570 CAP 32 C571 CAP 32 C572 CAP 32 C573 CAP 32 C574 CAP 32 C575 CAP 32 C576 CAP 32 C577 CAP 32 C578 CAP 32 C579 CAP 32 C580 CAP 32 C581 CAP 32 C582 CAP 32 C583 CAP 27 C584 CAP 27 C585 CAP 27 C586 CAP 27 C587 CAP 27 C588 CAP 27 C589 CAP 27 C590 CAP 27 C591 CAP 27 C592 CAP 26 C593 CAP 27 C594 CAP 26 C595 CAP 26 C596 CAP 27 C597 CAP 26 C598 CAP 26 C599 CAP 26 C600 CAP 26 C601 CAP 26 C602 CAP 26 C603 CAP 26 C604 CAP 26 C605 CAP 27 C606 CAP 27 C607 CAP 27 C608 CAP 26 C609 CAP 27 C610 CAP 27 C611 CAP 26 C612 CAP 26 C613 CAP 26 C614 CAP 26 C615 CAP 26 C616 CAP 26 C617 CAP 26 C618 CAP 26 C619 CAP 26 C620 CAP 27 C621 CAP 27 C622 CAP 26 C623 CAP 26 C624 CAP 26 C625 CAP 27 C626 CAP 5 C627 CAP 32 C628 CAP 32 C629 CAP 32 C630 CAP 28 C631 CAP 22 C632 CAP 22 C633 CAP 28 C634 CAP 22 C635 CAP 22 C637 CAP 28 C638 CAP 28 C639 CAP 28 C640 CAP 28 C641 CAP 22 C642 CAP 22 C644 CAP 28 C645 CAP 26 C646 CAP 26 C647 CAP 26 C648 CAP 26 C649 CAP 28 C650 CAP 28 C651 CAP 28 C652 CAP 28 C653 CAP 22 C654 CAP 22 C655 CAP 22 C656 CAP 22 C657 CAP 22 C658 CAP 22 C659 CAP 22 C660 CAP 22 C661 CAP 22 C662 CAP 28 C663 CAP 22 C664 CAP 22 C665 CAP 27 C666 CAP 28 C667 CAP 22 C668 CAP 22 C669 CAP 25 C670 CAP_P 27 C671 CAP 27 C672 CAP 27
C673 CAP 27 C674 CAP 26 C675 CAP 26 C676 CAP 27 C677 CAP 27 C678 CAP 27 C679 CAP 27 C680 CAP 26 C681 CAP 27 C682 CAP 27 C683 CAP 27 C684 CAP 27 C685 CAP_P 32 C686 CAP 32 C687 CAP 32 C688 CAP 32 C689 CAP 25 C690 CAP 34 C691 CAP 34 C692 CAP 25 C693 CAP 34 C694 CAP 32 C695 CAP 34 C696 CAP 25 C697 CAP 34 C698 CAP 25 C699 CAP 32 C700 CAP 32 C701 CAP 22 C702 CAP 22 C703 CAP_P 32 C704 CAP 20 C705 CAP_P 20 C706 CAP 20 C707 CAP_P 20 C708 CAP 20 C709 CAP_P 32 C710 CAP_P 32 C711 CAP_P 20 C712 CAP 20 C713 CAP_P 32 C714 CAP 34 C715 CAP 34 C716 CAP 34 C717 CAP 34 C718 CAP 34 C719 CAP 34 C720 CAP 34 C721 CAP 14 C722 CAP 34 C723 CAP 14 C724 CAP 29 C725 CAP 34 C726 CAP 10 C727 CAP 10 C728 CAP 29 C729 CAP 29 C730 CAP 10 C731 CAP 29 C732 CAP 10 C733 CAP 10 C734 CAP 10 C735 CAP 16 C736 CAP 16 C737 CAP 31 C738 CAP 34 C739 CAP 16 C740 CAP 31 C741 CAP 10 C742 CAP 10 C743 CAP 17 C744 CAP 17 C745 CAP 10 C746 CAP 17 C747 CAP 17 C748 CAP 17 C749 CAP 17 C750 CAP 17 C751 CAP 17 C752 CAP 17 C753 CAP 31 C754 CAP 31 C755 CAP 31 C756 CAP 17 C757 CAP 10 C758 CAP 10 C759 CAP 17 C760 CAP 17 C761 CAP 17 C762 CAP 6 C763 CAP 25 C764 CAP 10 C765 CAP 17 C766 CAP 23 C767 CAP 31 C768 CAP 17 C769 CAP 17 C770 CAP 16 C771 CAP 31 C772 CAP 31 C773 CAP 9 C774 CAP_P 33 C775 CAP 18 C776 CAP 18 C777 CAP 30 C778 CAP 18 C779 CAP_P 30 C780 CAP 30 C781 CAP_P 33 C782 CAP 18 C783 CAP 18 C784 CAP 18 C785 CAP 30 C786 CAP 18 C787 CAP 18 C788 CAP_P 33 C789 CAP 18 C790 CAP 30 C791 CAP 18 C792 CAP 30 C793 CAP_P 33 C794 CAP 30 C795 CAP 30 C796 CAP 18 C797 CAP_P 33 C798 CAP 30 C799 CAP 30 C800 CAP 18 C801 CAP 30 C802 CAP_P 33 C803 CAP 30 C804 CAP_P 31 C805 CAP 24 C806 CAP_P 31 C807 CAP 30 C808 CAP 24 C809 CAP 30 C810 CAP 5 C811 CAP 5 C812 CAP 22 C813 CAP 22 C814 CAP 25 C815 CAP 22 C816 CAP 22 C817 CAP 25 C818 CAP 25 C819 CAP 22 C826 CAP 30 C828 CAP 25 C829 CAP 25 C830 CAP 21 C831 CAP 21 C832 CAP 21 C833 CAP 21 C834 CAP 21 C835 CAP 21 C838 CAP 20 C839 CAP 32 C840 CAP 32 C841 CAP 33 C842 CAP 33 C843 CAP 33 C844 CAP 34 C845 CAP 34 C846 CAP 20 C847 CAP 13 C848 CAP_P 25 C849 CAP 25
C850 CAP 25 C851 CAP 26 C852 CAP 26 C853 CAP 30 C854 CAP 19 C855 CAP 19 C856 CAP 19 C857 CAP 19 C858 CAP 19 C859 CAP 19 C860 CAP 19 C861 CAP 19 C862 CAP 19 C863 CAP 19 C864 CAP 19 C865 CAP 19 C866 CAP 19 C867 CAP 19 C868 CAP 25 C869 CAP 25 C871 CAP 19 C872 CAP 19 C873 CAP 19 C874 CAP 19 C875 CAP 19 C876 CAP 19 C877 CAP 19 C878 CAP 19 C879 CAP 19 C880 CAP 21 C881 CAP 21 D1 DIODE_SCHOT 31 D2 DIODE_SCHOT 31 D3 DIODE 31 D4 DIODE 30 D5 DIODE_SCHOT 33 D6 DIODE 30 D7 DIODE_SCHOT 31 D8 DIODE 31 D9 ZENER_MMBZ15VDLT1 23 D10 DIODE_SCHOT 31 D11 DIODE_SCHOT 31 D12 DIODE 20 D13 DIODE_SCHOT 32 D14 DIODE_SCHOT 32 D15 DIODE 26 D16 DIODE_SCHOT 27 D17 DIODE_SCHOT 5 D18 DIODE_DUAL_6P 28 D19 DIODE_SCHOT 22 D20 DIODE_DUAL_6P 28 D21 ZENER 28 D22 DIODE_DUAL_6P 28 D23 DIODE_DUAL_6P 28 D24 DIODE_SCHOT 28 D25 DIODE_SCHOT_3P2 27 D26 DIODE_SCHOT 32 D27 DIODE 32 D28 DIODE_SCHOT 32 D29 DIODE_SCHOT 20 D30 DIODE_SCHOT 34 D31 DIODE_SCHOT 34 D32 DIODE_SCHOT 31 D33 DIODE 33 D36 DIODE_SCHOT 30 DP1 DPAK3P 30 DP2 DPAK3P 33 DP3 DPAK3P 34 DP4 DPAK3P 34 DP5 DPAK3P 20 DP6 DPAK3P 28 DP7 DPAK3P 20 F1 FUSE 28 F2 FUSE 22 F3 FUSE 28 F4 FUSE 30 F5 FUSE 30 G1 OSC 19 G2 OSC 27 J1 CON_M4RT_S2MT_SM 25 J2 CON_4RT_WRIB 23 J3 CON_M40ST_D4MT_SM 25 J4 CON_4RT_WRIB 22 J5 CON_M80ST_D4MT_SM 18 J6 CON_F80ST_D4MT_SM 24 J7 CON_12 33 J8 CON_2RTSM_125 23 J9 CON_F1ST_S2MT_SM 14 J10 CON_10STSM_5087 23 J11 CON_F30RT_S2MT_SM1 23 J12 CON_M50SM_5MM 24 J13 CON_M50SM_5MM 24 J14 CON_F30RT_S2MT_SM 22 J15 CON_M16ST_D_SMA 25 J16 CON_3RTSM_125 31 J17 CON_M16ST_D_SMA 25 J18 CON_M4RT_S2MT_SM 25 J19 CON_F20ST_D_SM 23 J20 CON_F9RT_1394B_S6MT_SMA 28 J21 CON_F5RT_MINIDIN_TH 22 J22 CON_F30RT_T6MT_TH1 22 J23 CON_RJ45_10RT_S4MT_TH1 26 J24 CON_F6RT_S4MT_TH1 28 J25 CON_F400RT_DDRDIMM_SM3 11 J26 CON_M8RT_S_SM 30 J27 CON_M4RT_S_SM 30 J28 CON_10STSM_5087 25 L1 IND 22 L2 IND 30 L3 IND 30 L4 IND 30 L5 IND 30 L6 IND 30 L7 IND 17 L8 IND 23 L9 IND 23 L10 IND 23 L11 IND 23 L12 IND 23 L13 IND 14 L14 IND 14 L15 IND 14 L16 IND 19 L17 IND 20 L18 IND 21 L19 IND 21 L20 IND 21 L21 IND 21 L22 IND 19 L23 IND 21 L24 IND 21 L25 IND 21 L26 IND 21 L27 IND 22 L28 IND 21 L29 IND 21 L30 IND 21 L31 IND 21 L32 IND 21 L33 IND 21 L34 IND 27 L35 IND 26 L36 IND 22 L37 FILTER_4P 22 L38 IND 22 L39 IND 28 L40 IND 22 L41 IND 22 L42 IND 22 L43 IND 22 L44 IND 22 L45 FILTER_4P 22 L46 FILTER_4P 22 L47 FILTER_4P 22 L48 FILTER_4P 28 L49 IND 22 L50 IND 22 L51 IND 28 L52 FILTER_4P 28 L53 IND 22 L54 IND 22 L55 IND 22 L56 IND 22 L57 IND 22 L58 IND 28 L59 IND 27 L60 IND 26 L61 IND 32
L62 IND 32 L63 IND 34 L64 IND_3P 20 L65 IND 34 L66 IND 19 L67 IND 34 L68 IND 23 L69 IND_3P 31 L70 IND 30 L71 IND_3P 33 L72 IND 22 L73 IND 22 L74 IND 22 L75 IND 21 L76 FILTER_4P 28 L77 FILTER_4P 28 L78 IND 19 L79 IND 19 L80 IND 19 L81 IND 21 Q1 TRA_2N7002DW 30 Q2 TRA_2N7002DW 30 Q3 TRA_2N7002DW 7 Q4 TRA_2N7002DW 30 Q5 TRA_2N3904 33 Q6 TRA_SI4435DY 30 Q7 TRA_SUD45P03 30 Q8 TRA_2N3904 33 Q9 TRA_2N7002DW 30 Q10 TRA_2N7002 34 Q11 TRA_2N7002DW 34 Q12 TRA_2N3904 7 Q13 TRA_2N7002 7 Q14 TRA_2N7002DW 7 Q15 TRA_FDG6324L 31 Q16 TRA_IRF7811W 31 Q17 TRA_IRF7805 31 Q18 TRA_2N7002DW 23 Q19 TRA_2N3906 23 Q20 TRA_2N7002DW 32 Q21 TRA_SI3443DV 32 Q22 TRA_2N3906 23 Q23 TRA_SI3446DV 20 Q24 TRA_2N7002DW 32 Q25 TRA_2N7002DW 20 Q26 TRA_SI3443DV 32 Q27 TRA_SI3443DV 32 Q28 TRA_2N7002 22 Q29 TRA_SI3443DV 22 Q30 TRA_2N7002 29 Q31 TRA_2N7002 34 Q32 TRA_2N7002DW 26 Q33 TRA_2N7002DW 28 Q34 TRA_NDS9407 28 Q35 TRA_DUAL_MMDT3904 22 Q38 TRA_TP0610 22 Q39 TRA_2N7002DW 22 Q40 TRA_2N7002DW 22 Q41 TRA_IRF7805 32 Q42 TRA_IRF7811W 32 Q43 TRA_2N7002 32 Q44 TRA_2N7002DW 32 Q45 TRA_IRF7805 32 Q46 TRA_2N3904 25 Q47 TRA_IRF7811W 32 Q48 TRA_SI7860DP 20 Q49 TRA_IRF7832 20 Q50 TRA_2N7002DW 32 Q51 TRA_2N3904 20 Q52 TRA_2N3904 20 Q53 TRA_SI3446DV 34 Q54 TRA_IRF7811W 34 Q55 TRA_IRF7805 34 Q56 TRA_IRF7805 34 Q57 TRA_IRF7811W 34 Q58 TRA_2N3906 23 Q59 TRA_2N3904 25 Q60 TRA_IRF7832 33 Q61 TRA_2N3904 25 Q62 TRA_SI7860DP 33 Q63 TRA_IRF7832 33 Q64 TRA_IRF7811W 30 Q65 TRA_SI7860DP 33 Q66 TRA_IRF7832 33 Q67 TRA_2N3904 25 Q68 TRA_SI4435DY 30 Q69 TRA_SI4435DY 30 Q70 TRA_IRF7805 30 Q71 TRA_2N7002DW 30 Q72 TRA_2N7002DW 30 Q74 TRA_2N7002DW 30 Q76 TRA_FDG6324L 22 Q77 TRA_2N7002DW 25 Q78 TRA_2N7002DW 25 Q79 TRA_2N7002DW 25 Q82 TRA_2N7002DW 33 Q83 TRA_2N7002DW 25 R1 RES 9 R2 RES 5 R3 RES 5 R4 RES 5 R5 RES 7 R6 RES 5 R7 RES 5 R8 RES 5 R9 RES 5 R10 RES 5 R11 RES 5 R12 RES 7 R13 RES 5 R14 RES 7 R15 RES 30 R16 RES 30 R17 RES 7 R18 RES 7 R19 RES 5 R20 RES 5 R21 RES 30 R22 RES 30 R23 RES 7 R24 RES 5 R25 RES 5 R26 RES 5 R27 RES 5 R28 RES 5 R29 RES 30 R30 RES 30 R31 RES 7 R32 RES 5 R33 RES 5 R34 RES 5 R35 RES 7 R36 RES 5 R37 RES 5 R38 RES 5 R39 RES 31 R40 RES 30 R41 RES 30 R42 RES 30 R43 RES 7 R44 RES 7 R45 RES 5 R46 RES 5 R47 RES 30 R48 RES 7 R49 RES 30 R50 RES 7 R51 RES 30 R52 RES 30 R53 RES 30 R54 RES 30 R55 RES 30 R56 RES 30 R57 RES 30 R58 RES 30 R59 RES 30 R60 RES 7 R61 RES 30 R62 RES 30 R63 RES 7 R64 RES 7 R65 RES 33 R66 RES 33 R67 RES 33 R68 RES 7 R69 RES 33 R70 RES 7 R71 RES 33
R72 RES 33 R73 RES 30 R74 RES 30 R75 RES 30 R76 RES 7 R77 RES 30 R78 RES 7 R79 RES 7 R80 RES 33 R81 RES 33 R82 RES 30 R83 RES 30 R84 RES 7 R85 RES 33 R86 RES 33 R87 RES 30 R88 RES 7 R89 RES 5 R90 RES 33 R91 RES 33 R92 RES 7 R93 RES 33 R94 RES 30 R95 RES 33 R96 RES 30 R97 RES 33 R98 RES 33 R99 RES 33 R100 RES 6 R101 RES 33 R102 RES 30 R103 RES 6 R104 RES 6 R105 RES 6 R106 RES 33 R107 RES 31 R108 RES 31 R109 RES 31 R110 RES 7 R111 RES 33 R112 RES 9 R113 RES 14 R114 RES 34 R115 RES 34 R116 RES 34 R117 RES 34 R118 RES 31 R119 RES 30 R120 RES 31 R121 RES 33 R122 RES 31 R123 RES 33 R124 RES 17 R125 RES 33 R126 RES 33 R127 RES 31 R128 RES 8 R129 RES 33 R130 RES 31 R131 RES 7 R132 RES 7 R133 RES 7 R134 RES 14 R135 RES 33 R136 RES 8 R137 RES 33 R138 RES 23 R139 RES 33 R140 RES 8 R141 RES 8 R142 RES 14 R143 RES 14 R144 RES 14 R145 RES 13 R146 RES 8 R147 RES 8 R148 RES 14 R149 RES 13 R150 RES 8 R151 RES 8 R152 RES 8 R153 RES 14 R154 RES 23 R155 RES 8 R156 RES 14 R157 RES 14 R158 RES 14 R159 RES 8 R160 RES 13 R161 RES 8 R162 RES 9 R163 RES 23 R164 RES 14 R165 RES 14 R166 RES 14 R167 RES 12 R168 RES 8 R169 RES 8 R170 RES 34 R171 RES 34 R172 RES 17 R173 RES 23 R174 RES 14 R175 RES 14 R176 RES 9 R177 RES 34 R178 RES 14 R179 RES 14 R180 RES 14 R181 RES 14 R182 RES 14 R183 RES 14 R184 RES 34 R185 RES 23 R186 RES 13 R187 RES 14 R188 RES 14 R189 RES 14 R190 RES 23 R191 RES 14 R192 RES 14 R193 RES 14 R194 RES 9 R195 RES 13 R196 RES 24 R197 RES 12 R198 RES 23 R199 RES 24 R200 RES 24 R201 RES 14 R202 RES 9 R203 RES 24 R204 RES 24 R205 RES 13 R206 RES 14 R207 RES 13 R208 RES 9 R209 RES 9 R210 RES 34 R211 RES 34 R212 RES 34 R213 RES 24 R214 RES 24 R215 RES 24 R216 RES 24 R217 RES 24 R218 RES 14 R219 RES 12 R220 RES 34 R221 RES 34 R222 RES 34 R223 RES 23 R224 RES 13 R225 RES 12 R226 RES 34 R227 RES 34 R228 RES 23 R229 RES 24 R230 RES 12 R231 RES 31 R232 RES 13 R233 RES 31 R234 RES 24 R235 RES 12 R236 RES 9 R237 RES 24 R238 RES 24 R239 RES 12
R240 RES 14 R241 RES 14 R242 RES 24 R243 RES 14 R244 RES 12 R245 RES 12 R246 RES 12 R247 RES 9 R248 RES 29 R249 RES 29 R250 RES 14 R251 RES 24 R252 RES 12 R253 RES 12 R254 RES 12 R255 RES 12 R256 RES 12 R257 RES 9 R258 RES 14 R259 RES 13 R260 RES 9 R261 RES 29 R262 RES 24 R263 RES 13 R264 RES 12 R265 RES 9 R266 RES 24 R267 RES 29 R268 RES 24 R269 RES 13 R270 RES 13 R271 RES 9 R272 RES 12 R273 RES 12 R274 RES 15 R275 RES 21 R276 RES 15 R277 RES 12 R278 RES 12 R279 RES 14 R280 RES 14 R281 RES 5 R282 RES 12 R283 RES 5 R284 RES 14 R285 RES 19 R286 RES 14 R287 RES 14 R288 RES 14 R289 RES 19 R290 RES 19 R291 RES 32 R292 RES 14 R293 RES 14 R294 RES 32 R295 RES 14 R296 RES 14 R297 RES 19 R298 RES 19 R299 RES 11 R300 RES 23 R301 RES 32 R302 RES 5 R303 RES 11 R304 RES 19 R305 RES 19 R306 RES 32 R307 RES 32 R308 RES 12 R309 RES 19 R310 RES 32 R311 RES 32 R312 RES 21 R313 RES 19 R314 RES 12 R315 RES 19 R316 RES 12 R317 RES 12 R318 RES 12 R319 RES 21 R320 RES 19 R321 RES 32 R322 RES 32 R323 RES 19 R324 RES 19 R325 RES 19 R326 RES 20 R327 RES 20 R328 RES 20 R329 RES 20 R330 RES 20 R331 RES 20 R332 RES 20 R333 RES 20 R334 RES 12 R335 RES 19 R336 RES 19 R337 RES 19 R338 RES 19 R339 RES 20 R340 RES 20 R341 RES 20 R342 RES 20 R343 RES 20 R344 RES 20 R345 RES 29 R346 RES 20 R347 RES 22 R348 RES 29 R349 RES 29 R350 RES 20 R351 RES 20 R352 RES 20 R353 RES 20 R354 RES 22 R355 RES 20 R356 RES 20 R357 RES 20 R358 RES 20 R359 RES 20 R360 RES 20 R361 RES 20 R362 RES 20 R363 RES 21 R364 RES 29 R365 RES 19 R366 RES 20 R367 RES 20 R368 RES 20 R369 RES 20 R370 RES 19 R371 RES 19 R372 RES 19 R373 RES 19 R374 RES 20 R375 RES 19 R376 RES 19 R377 RES 20 R378 RES 20 R379 RES 21 R380 RES 20 R381 RES 20 R382 RES 20 R383 RES 20 R384 RES 20 R385 RES 20 R386 RES 20 R387 RES 20 R388 RES 19 R389 RES 20 R390 RES 20 R391 RES 20 R392 RES 20 R393 RES 20 R394 RES 20 R395 RES 20 R396 RES 20 R397 RES 19 R398 RES 34 R399 RES 32 R400 RES 32 R401 RES 32 R402 RES 32 R403 RES 32 R404 RES 32 R405 RES 32 R406 RES 32 R407 RES 32
A
D
C
B
A
D
C
B
8 7
6
5
4
3
2 1
8
7 6
5
4
3
2
1
44
R408 RES 32 R409 RES 32 R410 RES 32 R411 RES 32 R412 RES 27 R413 RES 27 R414 RES 27 R415 RES 27 R416 RES 27 R417 RES 27 R418 RES 27 R419 RES 27 R420 RES 27 R421 RES 26 R422 RES 26 R423 RES 26 R424 RES 26 R425 RES 26 R426 RES 27 R427 RES 26 R428 RES 26 R429 RES 26 R430 RES 26 R431 RES 26 R432 RES 26 R433 RES 26 R434 RES 26 R435 RES 26 R436 RES 26 R437 RES 26 R438 RES 26 R439 RES 26 R440 RES 26 R441 RES 26 R442 RES 26 R443 RES 27 R444 RES 27 R445 RES 26 R446 RES 28 R447 RES 28 R448 RES 28 R449 RES 5 R450 RES 14 R451 RES 28 R452 RES 5 R453 RES 5 R454 RES 25 R455 RES 5 R456 RES 22 R457 RES 14 R458 RES 22 R459 RES 22 R460 RES 22 R461 RES 28 R462 RES 22 R463 RES 22 R464 RES 22 R465 RES 28 R466 RES 28 R467 RES 14 R468 RES 34 R469 RES 22 R470 RES 22 R471 RES 28 R472 RES 22 R473 RES 22 R474 RES 22 R475 RES 22 R476 RES 22 R477 RES 22 R478 RES 22 R479 RES 22 R480 RES 22 R481 RES 22 R482 RES 22 R483 RES 22 R484 RES 22 R485 RES 22 R486 RES 27 R487 RES 27 R488 RES 27 R489 RES 27 R490 RES 27 R491 RES 27 R492 RES 27 R493 RES 27 R494 RES 27 R495 RES 27 R496 RES 27 R497 RES 27 R498 RES 27 R499 RES 27 R500 RES 27 R501 RES 27 R502 RES 27 R503 RES 26 R504 RES 26 R505 RES 27 R506 RES 26 R507 RES 26 R508 RES 27 R509 RES 27 R510 RES 27 R511 RES 27 R512 RES 27 R513 RES 26 R514 RES 27 R515 RES 27 R516 RES 27 R517 RES 27 R518 RES 27 R519 RES 27 R520 RES 27 R521 RES 32 R522 RES 32 R523 RES 32 R524 RES 32 R525 RES 34 R526 RES 34 R527 RES 34 R528 RES 34 R529 RES 34 R530 RES 25 R531 RES 34 R532 RES 34 R533 RES 32 R534 RES 32 R535 RES 34 R536 RES 34 R537 RES 32 R538 RES 32 R539 RES 32 R540 RES 24 R541 RES 24 R542 RES 24 R543 RES 22 R544 RES 22 R545 RES 24 R546 RES 24 R547 RES 25 R548 RES 32 R549 RES 20 R550 RES 32 R551 RES 32 R552 RES 12 R553 RES 12 R554 RES 34 R555 RES 20 R556 RES 20 R557 RES 34 R558 RES 20 R559 RES 20 R560 RES 29 R561 RES 29 R562 RES 29 R563 RES 29 R564 RES 29 R565 RES 14 R566 RES 34 R567 RES 14 R568 RES 14 R569 RES 23 R570 RES 24 R571 RES 34 R572 RES 32 R573 RES 24 R574 RES 14 R575 RES 29
R576 RES 29 R577 RES 23 R578 RES 24 R579 RES 24 R580 RES 29 R581 RES 29 R582 RES 29 R583 RES 29 R584 RES 29 R585 RES 29 R586 RES 29 R587 RES 29 R588 RES 29 R589 RES 29 R590 RES 29 R591 RES 29 R592 RES 29 R593 RES 29 R594 RES 29 R595 RES 29 R596 RES 29 R597 RES 29 R598 RES 29 R599 RES 29 R600 RES 29 R601 RES 34 R602 RES 29 R603 RES 23 R604 RES 31 R605 RES 31 R606 RES 17 R607 RES 17 R608 RES 17 R609 RES 17 R610 RES 17 R611 RES 23 R612 RES 17 R613 RES 17 R614 RES 17 R615 RES 17 R616 RES 23 R617 RES 17 R618 RES 8 R619 RES 8 R620 RES 8 R621 RES 8 R622 RES 8 R623 RES 8 R624 RES 8 R625 RES 8 R626 RES 8 R627 RES 8 R628 RES 8 R629 RES 8 R630 RES 13 R631 RES 33 R632 RES 17 R633 RES 25 R634 RES 33 R635 RES 33 R636 RES 17 R637 RES 6 R638 RES 8 R639 RES 8 R640 RES 8 R641 RES 8 R642 RES 8 R643 RES 8 R644 RES 8 R645 RES 8 R646 RES 8 R647 RES 33 R648 RES 8 R649 RES 8 R650 RES 8 R651 RES 8 R652 RES 8 R653 RES 8 R654 RES 8 R655 RES 8 R656 RES 8 R657 RES 8 R658 RES 8 R659 RES 25 R660 RES 33 R661 RES 25 R662 RES 33 R663 RES 31 R664 RES 8 R665 RES 8 R666 RES 8 R667 RES 8 R668 RES 8 R669 RES 8 R670 RES 8 R671 RES 33 R672 RES 33 R673 RES 31 R674 RES 9 R675 RES 33 R676 RES 33 R677 RES 8 R678 RES 8 R679 RES 8 R680 RES 8 R681 RES 8 R682 RES 8 R683 RES 8 R684 RES 8 R685 RES 8 R686 RES 25 R687 RES 25 R688 RES 25 R689 RES 25 R690 RES 31 R691 RES 9 R692 RES 6 R693 RES 8 R694 RES 8 R695 RES 8 R696 RES 8 R697 RES 8 R698 RES 8 R699 RES 8 R700 RES 25 R701 RES 25 R702 RES 25 R703 RES 25 R704 RES 25 R705 RES 25 R706 RES 33 R707 RES 6 R708 RES 33 R709 RES 6 R710 RES 30 R711 RES 30 R712 RES 6 R713 RES 30 R714 RES 18 R715 RES 30 R716 RES 30 R717 RES 30 R718 RES 18 R719 RES 18 R720 RES 30 R721 RES 18 R722 RES 18 R723 RES 18 R724 RES 18 R725 RES 30 R726 RES 18 R727 RES 30 R728 RES 30 R729 RES 30 R730 RES 30 R731 RES 30 R732 RES 30 R733 RES 30 R734 RES 30 R735 RES 30 R736 RES 30 R737 RES 24 R738 RES 30 R739 RES 24 R740 RES 30 R741 RES 30 R742 RES 30 R743 RES 33
R744 RES 30 R745 RES 30 R746 RES 14 R747 RES 24 R748 RES 5 R749 RES 25 R750 RES 22 R751 RES 25 R752 RES 25 R753 RES 22 R754 RES 23 R755 RES 5 R756 RES 18 R757 RES 33 R758 RES 23 R759 RES 24 R760 RES 20 R761 RES 20 R762 RES 20 R763 RES 20 R764 RES 20 R765 RES 20 R766 RES 20 R767 RES 20 R768 RES 25 R769 RES 25 R770 RES 25 R771 RES 25 R772 RES 25 R773 RES 25 R774 RES 25 R775 RES 5 R776 RES 25 R777 RES 28 R778 RES 25 R779 RES 20 R786 RES 20 R787 RES 21 R788 RES 21 R789 RES 23 R790 RES 33 R791 RES 33 R792 RES 33 R794 RES 33 R795 RES 33 R796 RES 33 R797 RES 33 R798 RES 17 R806 RES 25 R807 RES 25 R808 RES 25 R817 RES 25 R818 RES 19 R819 RES 19 R823 RES 19 R824 RES 19 R825 RES 19 R826 RES 19 R827 RES 19 R828 RES 19 R829 RES 19 R830 RES 19 R832 RES 19 R833 RES 19 R835 RES 19 R836 RES 19 R837 RES 19 R838 RES 19 R839 RES 19 R840 RES 20 R841 RES 21 R842 RES 21 R843 RES 21 RP1 RPAK10P2C 18 RP2 RPAK4P 8 RP3 RPAK4P 8 RP4 RPAK4P 14 RP5 RPAK4P 14 RP6 RPAK4P 14 RP7 RPAK4P 14 RP8 RPAK4P 14 RP9 RPAK4P 9 RP10 RPAK4P 13 RP11 RPAK4P 14 RP12 RPAK4P 9 RP13 RPAK4P 14 RP14 RPAK4P 9 RP15 RPAK4P 14 RP16 RPAK4P 13 RP17 RPAK4P 9 RP18 RPAK4P 24 RP19 RPAK4P 24 RP20 RPAK4P 9 RP21 RPAK4P 24 RP22 RPAK4P 9 RP23 RPAK4P 24 RP24 RPAK4P 24 RP25 RPAK4P 24 RP26 RPAK4P 24 RP27 RPAK4P 24 RP28 RPAK4P 24 RP29 RPAK4P 9 RP30 RPAK4P 24 RP31 RPAK4P 9 RP32 RPAK4P 13 RP33 RPAK4P 12 RP34 RPAK4P 12 RP35 RPAK4P 13 RP36 RPAK4P 12 RP37 RPAK4P 27 RP38 RPAK4P 27 RP39 RPAK4P 29 RP40 RPAK10P2C 23 RP41 RPAK4P 29 RP42 RPAK10P2C 23 RP43 RPAK4P 17 RP44 RPAK4P 17 RP45 RPAK4P 17 RP46 RPAK10P2C 6 RP47 RPAK4P 14 RP49 RPAK4P 19 RP50 RPAK4P 19 RP51 RPAK4P 19 RP52 RPAK2P 19 RP53 RPAK2P 19 RP54 RPAK2P 19 RP55 RPAK2P 19 RP56 RPAK2P 19 RP57 RPAK2P 19 RP58 RPAK2P 19 RP59 RPAK2P 19 RP60 RPAK4P 19 SH1 SHLD_3P_EMI 4 U1 COMPARATOR_LMC7211 30 U2 NC7S32 22 U3 AMP_MAX4172 30 U4 PWR_CNTRL_TPS2211 18 U5 FAN2558 5 U6 MAX1772 30 U7 MAX1717 33 U8 PCI1510GGU 18 U9 SN74AUC1G08 6 U10 SN74AUC1G08 6 U11 FEPR_1MX8 9 U12 SN74AUC1G04 7 U13 LTC1625 31 U14 COMPARATOR_LMC7211 31 U15 PI3B3257 33 U16 CBTV4020 10 U17 UPD720101_FBGA 17 U18 CBTV4020 10 U19 MAX1715 34 U20 NC7S32 29 U21 741125 23 U22 VREG_LP2951 31 U23 VREG_LP2951 31 U24 NC7S32 29 U25 NC7S32 29 U26 MAX6804 29 U27 CBTV4020 10 U28 CBTV4020 10 U29 M16C62 29 U30 CLK_GEN_CY25811 19 U31 CLK_GEN_CY28512 14 U32 LTC1778 20 U33 COMPARATOR_LMC7211 29 U34 VREG_MM1571J 21 U35 LTC3707 32
U36 TSB81BA3A 27 U37 VREG_LM2594 27 U38 VREG_LT1962 27 U39 741G32 22 U40 741G32 22 U42 COMPARATOR_LMC7211 22 U43 TRANSCEIVER_88E1111 26 U44 LTC1761 27 U45 LTC3405 26 U46 LTC3411 34 U47 RAGE_MBLTY_M11_CSP64_667 19 20 21 U48 TRA_SI6467BDQ 34 U49 VREG_LT1962 14 U50 TRA_SI3447DV 34 U51 INTREPID 8 9 12 13 14 15 U52 EEPROM_32KX8_M24256B 6 U53 ADT7460 25 U54 AT90S1200 6 U55 OPAMP_LMC7111 30 U56 APOLLO_MPC7447A_360 5 6 U57 COMPARATOR_LMC7211 30 U58 SIL1162 19 U60 VREG_MM1571J 21 XW1 SHORT 30 XW2 SHORT 33 XW3 SHORT 31 XW4 SHORT 20 XW5 SHORT 20 XW6 SHORT 20 XW8 SHORT 34 XW9 SHORT 20 XW10 SHORT 34 XW11 SHORT 20 XW12 SHORT 20 XW13 SHORT 32 XW14 SHORT 22 XW15 SHORT 22 XW17 SHORT 34 XW21 SHORT 34 XW23 SHORT 34 XW25 SHORT 34 XW27 SHORT 33 XW28 SHORT 33 XW29 SHORT 33 XW30 SHORT 25 XW31 SHORT 32 XW32 SHORT 32 XW34 SHORT 5 Y1 CRYSTAL 17 Y2 CRYSTAL 14 Y3 CRYSTAL_4PIN 29 Y4 CRYSTAL 29 Y5 CRYSTAL_4PIN 26 ZT1 HOLE_VIA 4 ZT2 HOLE_VIA 4 ZT3 HOLE_VIA 4 ZT4 HOLE_VIA 4 ZT5 HOLE_VIA 4 ZT6 HOLE_VIA 4 ZT7 HOLE_VIA 4 ZT8 HOLE_VIA 4 ZT9 HOLE_VIA 4 ZT10 HOLE_VIA 4 ZT11 HOLE_VIA 4 ZT12 HOLE_VIA 4 ZT13 HOLE_VIA 4 ZT14 HOLE_VIA 4 ZT15 HOLE_VIA 4 ZT16 HOLE_VIA 4 ZT17 HOLE_VIA 4 ZT18 HOLE_VIA 4 ZT19 HOLE_VIA 4 ZT20 HOLE_VIA 4 ZT21 HOLE_VIA 4 ZT22 HOLE_VIA 4 ZT23 HOLE_VIA 4 ZT24 HOLE_VIA 4 ZT25 HOLE_VIA 4 ZT26 HOLE_VIA 4 ZT27 HOLE_VIA 4 ZT28 HOLE_VIA 4 ZT29 HOLE_VIA 4 ZT30 HOLE_VIA 4 ZT31 HOLE_VIA 4 ZT32 HOLE_VIA 4 ZT33 HOLE_VIA 4 ZT34 HOLE_VIA 4 ZT35 HOLE_VIA 4 ZT36 HOLE_VIA 4 ZT37 HOLE_VIA 4 ZT38 HOLE_VIA 4 ZT39 HOLE_VIA 4 ZT40 HOLE_VIA 4 ZT41 HOLE_VIA 4 ZT42 HOLE_VIA 4 ZT43 HOLE_VIA 4 ZT44 HOLE_VIA 4 ZT45 HOLE_VIA 4 ZT46 HOLE_VIA 4 ZT47 HOLE_VIA 4 ZT48 HOLE_VIA 4 ZT49 HOLE_VIA 4 ZT50 HOLE_VIA 4 ZT51 HOLE_VIA 4 ZT52 HOLE_VIA 4 ZT53 HOLE_VIA 4 ZT54 HOLE_VIA 4 ZT55 HOLE_VIA 4 ZT56 HOLE_VIA 4 ZT57 HOLE_VIA 4 ZT58 HOLE_VIA 4 ZT59 HOLE_VIA 4 ZT60 HOLE_VIA 4 ZT61 HOLE_VIA 4 ZT62 HOLE_VIA 4 ZT63 HOLE_VIA 4 ZT64 HOLE_VIA 4 ZT65 HOLE_VIA 4 ZT66 HOLE_VIA 4 ZT67 HOLE_VIA 4 ZT68 HOLE_VIA 4 ZT69 HOLE_VIA 4 ZT70 HOLE_VIA 4 ZT71 HOLE_VIA 4 ZT72 HOLE_VIA 4 ZT73 HOLE_VIA 4 ZT74 HOLE_VIA 4 ZT75 HOLE_VIA 4 ZT76 HOLE_VIA 4 ZT77 HOLE_VIA 4 ZT78 HOLE_VIA 4 ZT79 HOLE_VIA 4 ZT80 HOLE_VIA 4 ZT81 HOLE_VIA 4 ZT82 HOLE_VIA 4 ZT83 HOLE_VIA 4 ZT84 HOLE_VIA 4 ZT85 HOLE_VIA 4 ZT86 HOLE_VIA 4
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