Analog Devices AD7224LP, AD7224LN, AD7224KR-18, AD7224KR-1, AD7224KP Datasheet
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LC2MOS
a
FEATURES
8-Bit CMOS DAC with Output Amplifiers
Operates with Single or Dual Supplies
Low Total Unadjusted Error:
Less Than 1 LSB Over Temperature
Extended Temperature Range Operation
mP-Compatible with Double Buffered Inputs
Standard 18-Pin DIPs, and 20-Terminal Surface
Mount Package and SOIC Package
GENERAL DESCRIPTION
The AD7224 is a precision 8-bit voltage-output, digital-toanalog converter, with output amplifier and double buffered
interface logic on a monolithic CMOS chip. No external trims
are required to achieve full specified performance for the part.
The double buffered interface logic consists of two 8-bit registers–an input register and a DAC register. Only the data held in
the DAC registers determines the analog output of the converter. The double buffering allows simultaneous update in a
system containing multiple AD7224s. Both registers may be
made transparent under control of three external lines,
and
LDAC. With both registers transparent, the RESET line
functions like a zero override; a useful function for system calibration cycles. All logic inputs are TTL and CMOS (5 V) level
compatible and the control logic is speed compatible with most
8-bit microprocessors.
Specified performance is guaranteed for input reference voltages
from +2 V to +12.5 V when using dual supplies. The part is also
specified for single supply operation using a reference of +10 V.
The output amplifier is capable of developing +10 V across a
2 kΩ load.
The AD7224 is fabricated in an all ion-implanted high speed
Linear Compatible CMOS (LC
specifically developed to allow high speed digital logic circuits
and precision analog circuits to be integrated on the same chip.
2
MOS) process which has been
CS, WR
8-Bit DAC with Output Amplifiers
AD7224
FUNCTIONAL BLOCK DIAGRAM
PRODUCT HIGHLIGHTS
1. DAC and Amplifier on CMOS Chip
The single-chip design of the 8-bit DAC and output amplifier
is inherently more reliable than multi-chip designs. CMOS
fabrication means low power consumption (35 mW typical
with single supply).
2. Low Total Unadjusted Error
The fabrication of the AD7224 on Analog Devices Linear
Compatible CMOS (LC
DAC switch-pair arrangement, enables an excellent total unadjusted error of less than 1 LSB over the full operating temperature range.
3. Single or Dual Supply Operation
The voltage-mode configuration of the AD7224 allows operation from a single power supply rail. The part can also be operated with dual supplies giving enhanced performance for
some parameters.
4. Versatile Interface Logic
The high speed logic allows direct interfacing to most microprocessors. Additionally, the double buffered interface enables simultaneous update of the AD7224 in multiple DAC
systems. The part also features a zero override function.
2
MOS) process coupled with a novel
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
AD7224–SPECIFICA TIONS
(VDD = 11.4 V to 16.5 V, VSS = –5 V 6 10%; AGND = DGND = O V; V
DUAL SUPPLY
Parameter Versions
All specifications T
to T
MIN
MAX
K, B, T L, C, U
unless otherwise noted.)
2
Versions
2
Units Conditions/Comments
= +2 V to (VDD – 4 V)1 unless otherwise noted.
REF
STATIC PERFORMANCE
Resolution 8 8 Bits
Total Unadjusted Error ±2 ±1 LSB max V
= +15 V ± 5%, V
DD
= +10 V
REF
Relative Accuracy ± 1 ±1/2 LSB max
Differential Nonlinearity ± 1 ±1 LSB max Guaranteed Monotonic
Full-Scale Error ± 3/2 ± 1 LSB max
Full-Scale Temperature Coefficient ± 20 ± 20 ppm/°C max VDD = 14 V to 16.5 V, V
= +10 V
REF
Zero Code Error ±30 ±20 mV max
Zero Code Error Temperature Coefficient ±50 ±30 µV/°C typ
REFERENCE INPUT
Voltage Range 2 to (VDD – 4) 2 to (VDD – 4) V min to V max
Input Resistance 8 8 kΩ min
Input Capacitance
3
100 100 pF max Occurs when DAC is loaded with all 1s.
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Leakage Current ±1 ±1 µA max VIN = 0 V or V
Input Capacitance
INH
INL
3
2.4 2.4 V min
0.8 0.8 V max
DD
8 8 pF max
Input Coding Binary Binary
DYNAMIC PERFORMANCE
Voltage Output Slew Rate
Voltage Output Settling Time
Positive Full-Scale Change 5 5 µs max V
Negative Full-Scale Change 7 7 µs max V
Digital Feedthrough 50 50 nV secs typ V
Minimum Load Resistance 2 2 kΩ min V
3
3
2.5 2.5 V/µs min
= +10 V; Settling Time to ± 1/2 LSB
REF
= +10 V; Settling Time to ± 1/2 LSB
REF
= 0 V
REF
= +10 V
OUT
POWER SUPPLIES
VDD Range 11.4/16.5 11.4/16.5 V min/V max For Specified Performance
VSS Range 4.5/5.5 4.5/5.5 V min/V max For Specified Performance
I
DD
@ 25°C 4 4 mA max Outputs Unloaded; VIN = V
T
to T
MIN
I
SS
MAX
6 6 mA max Outputs Unloaded; VIN = V
@ 25°C 3 3 mA max Outputs Unloaded; VIN = V
T
to T
MIN
MAX
SWITCHING CHARACTERISTICS
t
1
3, 4
5 5 mA max Outputs Unloaded; VIN = V
INL
INL
INL
INL
or V
or V
or V
or V
@ 25°C 90 90 ns min Chip Select/Load DAC Pulse Width
T
to T
MIN
t
2
MAX
90 90 ns min
@ 25°C 90 90 ns min Write/Reset Pulse Width
T
to T
MIN
t
3
MAX
90 90 ns min
@ 25°C 0 0 ns min Chip Select/Load DAC to Write Setup Time
T
to T
MIN
t
4
MAX
0 0 ns min
@ 25°C 0 0 ns min Chip Select/Load DAC to Write Hold Time
T
to T
MIN
t
5
MAX
0 0 ns min
@ 25°C 90 90 ns min Data Valid to Write Setup Time
T
to T
MIN
t
6
MAX
90 90 ns min
@ 25°C 10 10 ns min Data Valid to Write Hold Time
T
to T
MIN
MAX
NOTES
1
Maximum possible reference voltage.
2
Temperature ranges are as follows:
10 10 ns min
K, L Versions: –40°C to +85°C
B, C Versions: –40°C to +85°C
T, U Versions: –55°C to +125°C
3
Sample Tested at 25°C by Product Assurance to ensure compliance.
4
Switching characteristics apply for single and dual supply operation.
Specifications subject to change without notice.
INH
INH
INH
INH
–2–
REV. B
AD7224
(VDD = +15 V 6 5%; VSS = AGND = DGND = O V; V
SINGLE SUPPLY
Parameter Versions
All specifications T
K, B, T L, C, U
MIN
to T
unless otherwise noted.)
MAX
2
Versions
2
= +10 V1 unless otherwise noted.
REF
Units Conditions/Comments
STATIC PERFORMANCE
Resolution 8 8 Bits
Total Unadjusted Error ± 2 ±2 LSB max
Differential Nonlinearity ± 1 ± 1 LSB max Guaranteed Monotonic
REFERENCE INPUT
Input Resistance 8 8 kΩ min
Input Capacitance
3
100 100 pF max Occurs when DAC is loaded with all 1s.
DIGITAL INPUTS
Input High Voltage, V
Input Low Voltage, V
Input Leakage Current ±1 ±1 µA max VIN = 0 V or V
Input Capacitance
INH
INL
3
2.4 2.4 V min
0.8 0.8 V max
DD
8 8 pF max
Input Coding Binary Binary
DYNAMIC PERFORMANCE
Voltage Output Slew Rate
Voltage Output Settling Time
4
4
22V/µs min
Positive Full-Scale Change 5 5 µs max Settling Time to ±1/2 LSB
Negative Full-Scale Change 20 20 µs max Settling Time to ± 1/2 LSB
Digital Feedthrough
Minimum Load Resistance 2 2 kΩ min V
3
50 50 nV secs typ V
REF
OUT
= 0 V
= +10 V
POWER SUPPLIES
VDD Range 14.25/15.75 14.25/15.75 V min/V max For Specified Performance
I
DD
@ 25°C 4 4 mA max Outputs Unloaded; VIN = V
T
to T
MIN
MAX
SWITCHING CHARACTERISTICS
t
1
6 6 mA max Outputs Unloaded; VIN = V
3, 4
INL
INL
or V
or V
@ 25°C 90 90 ns min Chip Select/Load DAC Pulse Width
T
to T
MIN
t
2
MAX
90 90 ns min
@ 25°C 90 90 ns min Write/Reset Pulse Width
T
to T
MIN
t
3
MAX
90 90 ns min
@ 25°C 0 0 ns min Chip Select/Load DAC to Write Setup Time
T
to T
MIN
t
4
MAX
0 0 ns min
@ 25°C 0 0 ns min Chip Select/Load DAC to Write Hold Time
T
to T
MIN
t
5
MAX
0 0 ns min
@ 25°C 90 90 ns min Data Valid to Write Setup Time
T
to T
MIN
t
6
MAX
90 90 ns min
@ 25°C 10 10 ns min Data Valid to Write Hold Time
T
to T
MIN
MAX
NOTES
1
Maximum possible reference voltage.
2
Temperature ranges are as follows:
10 10 ns min
AD7224KN, LN: 0°C to +70°C
AD7224BQ, CQ: –25°C to +85°C
AD7224TD, UD: –55°C to +125°C
3
See Terminology.
4
Sample tested at 25°C by Product Assurance to ensure compliance.
Specifications subject to change without notice.
INH
INH
REV. B
–3–
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