Alinco DR-635 Service Manual

D R -635

S e r v i c e M a n u a l

CONTENTS

SPECIFICATIONS

1) GENERAL

....................

1...'.......... 2

2) TRANSMITTER....................................................

3) RECEIVER

.................................................I..'...... 3

CIRCUIT DESCRIPTION

1) VHF Reception..........................................:./4

2) UHF Reception

........

. . . . . i .

...............

..... 5

3) FM Reception........................................................6

4) V/V(VHF-VHF) Dual Reception

5) U/U (UHF-UHF) Dual Reception

6) VHF Squelch Control

7) UHF Squelch Control

8) Transmit Signal Path

........................... ....... 7

................i...........................

......................................... 7

9) VHF Transmit Signal Path...................................

......................... 6

............................

10) UHF Transmit Signal Path.......................................8

11) VHFTxAPC Circuit

...............................................

12) UHFTx APC Circuit...................................... 8

13) VHF PTT Circuit

........................................

14) UHF PTT Circuit....................................

15) VHF PLL

..........................

...................................

...... 8

...............

16) UHF PLL................................................................9

17) Power-on Circuit

.................................................

SEMICONDUCTOR DATA

1) M5218FP (XA0068)..........

...................................

2) NJM78L05UA (XA0098)....................................... 10

3) NJM7808FA (XA0102)........................................ 10

4) TC4S66F (XA0115)........................................... 11

5) AN8010M (XA0119)

.............................................11

6) BU4052BF (XA0236)............................................ 11

7) TA75S01F (XA0332)............................................ 12

8) TC4W53FU (XA0348)

9) TA31136FN (XA0404).................................

10) LA4425A (XA0410)

..........................................

.........

..............................................

11) NJM2904V (XA0573)............................................ 13

12) NJM2902V-TE1 (XA0596).................................... 13

13) S-80845ALMP-EA9-T2 (XA0620)

14) TK10931V (XA0666)

............................................

.........................

. 6

! 9

..9

.. 9

12 12 13

14 14

15) BR24C64F-E2 (XA0669).

16) LC75884W (XA0899) ................

17) M51132FP ( X A 0 9 0 0 )

18) M38503M2H667FP (XA0914).......

19) M64076AGP (XA0915)

20) S-816A50AMC (XA0925)

21) NJM78M05DL1A (XA0947)

22) M30624FGPGP (XA1081/XA1082)

23) Transistor, Diode, and LED Outline Drawings.... 23-24

24) LCD Connection

EXPLODE D VIEW

1) Front View

2) Bottom View...................................................................2 7

PARTS LIST

Front Unit.......................................................................28

LED Unit

Main Unit.................................................................28-37

Mechanical Parts Packing Parts

Accessories (Screw Set)..............................................37

ADJU S TME NT

1) Adjustment Spot

2) Adjustment Mode................

- 3) VHF Adjustment Specification....................................

4) UHF Adjustment Specification ...................................

5) VHF Test Specification

6) UHF Test Specification...............

PC BOARD VIEW

1) Front Side A

2) Front Side B ...................................................................44

3) Main Side A ...................................................................45

4) Main Side B ...................................................................46

FRONT SCHEMATIC D IAG R A M .............................. 47

MAIN SCHEM A TIC DIAG R AM ......................................48

FRONT BLOC K DIA G RA M

MAIN B L O CK D IA G R A M ................................................50

................................ 24-25

......................................................................

........................................................................

...................................

...................

...................................................................44

....................................

......

.....................

....................................

........

...........................................

........

..............

....................

.........................................................

.............................

............

...........................38

........................................39

.......................................

................................

...........................................

......

16 17

....... 17-18

.....

.........

19 20

......

.,.

......

20-22

40 41

42 43

ALINCO, INC.

SPECIFICATIONS

1) GENERAL

Frequency coverage DR-635T (U.S amateur)

DR-635E (European amateur)

Operating mode Frequency resolution Number of memory channels Antenna impedance Power requirement Ground method Current drain Receive

Transmit

Operating temperature

Frequency stability Dimensions

Weight

87.500 - 107.995MHz (WFM RX)

108.000 - 135.995MHz (AM RX)

136.000 - 173.995MHz (RX)

144.000-147.995MHz (TX)

335.000 - 479.995MHz (RX)

430.000 - 449.995MHz (TX)

87.500 - 107.995MHz (WFM)

144.000 - 145.995MHz (RX, TX)

430.000 - 439.995MHz (RX, TX) 16K0F3E (Wide mode) 8K50F3E (Narrow mode) 5, 8.33, 10, 12.5,15, 20, 25, 30, 50,100kHz

20 0

50£} unbalanced

13.8V DC±15% (11.7 to 15.8V)

Negative ground

0.6A (Max.) 0.4A (Squelched)

11.0A

- 10 to 60°C ±2.5ppm

142 (w) x 40 (h) x 174 (d) mm (w/o knobs)

Approx. 1.0kg

2) TRANSMITTER

Output power

Modulation system

Maximum frequency deviation Spurious emission Adjacent channel power

Modulation Distortion

Microphone impedance

High : 50W (VHF)

35 W(UHF) Mid : 20W Low : 5W

Variable reactance frequency modulation

±5kHz (Wide mode) ±2.5kHz (Narrow mode)

-60dB

Lass than 3%

2kn

3 ) R E C E IV E R

Sensitivity Receiver circuitry Intermediate frequency

-16dBu for 12dB SINAD Double conversion superheterodyne

18‘ 21.7MHz 2nd 450kHz (VHF)

1st 45.1MHz 2nd 455kHz (UHF) Squelch sensitivity Selectivity (-6dB / -60dB) Spurious and image rejection ratio Audio output power

-18dBu 12kHz/24kHz

70dB

2.0W (80, 10% THD)

I Note : All specifications are subject to change without notice or obligation.

CIRCUIT DESCRIPTION

1 ) V H F R e c e p t io n

Incoming VHF signals are passed through a low-pass filter network, antenna switching diodes D15 (UM9401F) and D26 (DAN235E), and a high-pass filer network, and on to the RF amplifier Q19 (3SK293). The amplified RF signal is passed through another RF amplifier Q18 (2SC5226) and band-pass filtered again by varactor turned resonators L46, L49, L51 and D28, D29, D30 (all 1SV215), then applied to the

1st mixer Q21 (3SK293) along with the first local signal from the PLL circuit The first local signal is generated between 122.3MHz and 126.3MHz by the VHF VCO, which consists of

Q9 (2SK508) and varactor diodes D10 and D11 (both 1SV282), according to the receiving frequency. The 21.7 MHz first IF signal is applied to monolithic crystal filters XF1 and XF2 (both UM5-3P 21.7M) which strip away unwanted mixer products, and the IF signal is applied to the first IF amplifier Q20

(2SC4215). The amplified first IF signal is then delivered to the FM IF subsystem IC IC3 (TK10931V), which contains the second mixer, limiter amplifier, noise amplifier, and FM detector. The second local signal is generated by 21.25MHz TCXO, producing the 450kHz second IF signal when

mixed with the first IF signal within 1C3. The 450kHz second IF signal is applied to the ceramic filter FL1 (ALFYM450E) which strips away all but the desired signal, and then passes through the limiter amplifier within IC3 to the discriminator coil L101, which removes any amplitude variations in the 450kHz IF signal before detection of speech.

The detected audio then signal is amplified by IC9 (NJM2902V-B) passes through the de-emphasis

network, a high-pass filter consisting of IC9 (NJM2902V-A) and associated circuitry, and a low-pass filter

consisting and associated circuitry. The filtered audio signal is switched by IC12 (BU4052), and then

passes through the audio volume control IC IC13 (M511312FP), which adjusts the audio sensitivity to

compensate for audio level variations.

The audio signal is amplified by IC8 (LA4425A), and then applied to the internal loudspeaker.

2 ) U H F R e c e p t io n

Incoming UHF signals are passed through a low-pass filter network, a high-pass filter network, antenna switching diodes D14 (UM9401F), and on to the band-pass filter network consisting of varactor diode D49 (HVU359) and L79. The filtered UHF signal is amplified by R'F amplifier Q41 (3SK293) and fed to another band-pass filter consisting of varactor diode D50 (HVU359) and L80, and then is passed through another RF amplifier Q43 (2SC5226) to another band-pass filter consisting of varactor diodes D51 and D52 (both HVU359) and L81 and L82. The amplified and filtered UHF signal is applied to the 1st mixer Q42 (3SK293) along with the first local signal from the PLL circuit. The first local signal is generated between 384.9MHz and 404.9MHz by the UHF VCO, which consists of Q29 (2SK508) and varactor diodes D38 and D40 (both 1SV278), according to the receiving frequency. The 45.1 MHz first IF signal is applied to monolithic crystal filters XF3A and XF3B (UM5-3P 45.1M) which strip away unwanted mixer products, and the IF signal is applied to the first IF amplifier Q44 (2SC4618). The amplified first IF signal is then delivered to the FM IF subsystem IC ICS (TA31136FN), which contains the second mixer, limiter amplifier, noise amplifier, and FM detector. The second local signal is generated by 45.555MHz crystal X4, producing the 455kHz second IF signal within IC5. The 455kHz second IF signal is applied to the ceramic filter FL4 (ALFYM455E) which strips away all but the desired signal, and then passes through the limiter amplifier within IC5 to the discriminator coil L102, which removes any amplitude variations in the 455kHz IF signal before detection of speech. The detected audio then signal is amplified by IC9 (NJM2902V-C) passes through the de-emphasis

network, a high-pass filter consisting of IC9 (NJM2902V-D) and associated circuitry, and a low-pass filter

consisting and associated circuitry. The filtered audio signal is switched by IC12 (BU4052), and then

passes through the audio volume control IC IC13 (M511312FP), which adjusts the audio sensitivity to compensate for audio level variations.

The audio signal is amplified by IC8 (LA4425A) then applied to the internal loudspeaker.

3 ) F M R e c e p tio n

Incoming FM signals are passed through a low-pass filter network, antenna switching diodes D15 (UM9401F) and D26 (DAN235E), and a high-pass filter network, and on the RF amplifier Q36 (2SC5066). The amplified RF signal is passed through band-pass filtered L, C, then applied to the 1st mixer Q33 (2SC5066) along with the first local signal from the circuit. The first local signal is generated between 86.7MHz and 118.7MHz by the FM VCO, which consists of Q14 (2SC4808) and varactor diodes D23 and D25 (both 1SV282), according to the receiving frequency. The 10.7MHz first IF signal is applied to ceramic filters FL3 and FL6 (both SFT10.7MAS) which strip

away unwanted mixer products, and the IF signal is applied to the first IF amplifier Q37 (2SC4618). The amplified first IF signal is then delivered to the FM IF subsystem IC IC3 (TK10931V), limiter amplifier,

noise amplifier, and FM detector. The 10.7MHz first IF signal is applied to the discriminator coil L53, which removes any amplitude variations in the 10.7MHz IF signal before detection of speech.

4 ) V /V (V H F -V H F ) D u a l R e c e p t io n

During V & V operation, the incoming VHF "sub" band signal is passed through a low-pass filter network, antenna switching diode D15 (UM9401F) and a high-pass filter network to the RF amplifier Q19

(3SK293). The amplified RF signal is passed through a high-pass filter network, VHF "sub" RF amplifier Q31

(2SC5066), and a low-pass filter network, then is applied to the VHF "sub" first mixer Q32 (2SC5066)

along with the 45.1MHz VHF "sub" first local signal from the VHF "sub" VCO circuit. The VHF "sub" first local signal is generated between 189.1 MHz and 193.1MHz by the VHF "sub" VCO

Q38 (2SC4080). The 45.1MHz VHF "sub" second IF signal is applied to the UHF receiving circuit. The VHF "sub" signal is amplified, filtered, and demodulated, etc., by the UHF "main" receiving circuit, described previously.

5 ) U /U (U H F -U H F ) D u a l R e c e p t i o n

During U & U operation, the incoming UHF "sub" band signal is passed through a high-pass and a

low-pass filter networks, antenna switching diode D14 (UM9401F), and another high-pass filter network to the RF amplifier Q51 (2SC5066). The amplified RF signal is passed through a low-pass filter network, UHF "sub" RF amplifier Q49

(2SC5066), and a low-pass filter network, then is applied to the UHF "sub" first mixer Q52 (2SC5066)

along with the 21 .7MHz UHF "sub" first local signal from the UHF "sub" VCO. The UHF "sub" first local signal is generated between 408.3MHz and 428.3MHz by the UHF "sub" VCO

Q13 (2SC5066). The 21.7MHz UHF "sub" second IF signal is applied to the VHF receiving circuit. The UHF "sub" signal is amplified, filtered, and demodulated, etc., by the VHF "main" receiving circuit,

described previously.

6 ) V H F S q u e lc h C o n t r o l

When no VHF carrier is being received, noise at the output of the detector stage in IC3 is amplified and

band-pass filtered by the noise amp section of IC3, then passes through the noise adjust VR (VR8) to

CPU. The resulting DC voltage is applied to pin 88 of main CPU IC19 (M30624FGPGP), which

compares the squelch threshold level to that which set by the front panel VHF SQL knob.

While no carrier is received, pin 55 of IC19 remains "high" turning on the squelch switch Q108

(DTC363EK) to disable audio output from the speaker.

7 ) U H F S q u e lc h C o n t r o l

When no UHF carrier is being received, noise at the output of the detector stage in ICS is amplified and

band-pass filtered by the noise amp section of ICS, then passes through the noise adjust VR (VR9) to

CPU. The resulting DC voltage is applied to pin 90 of main CPU IC19, which compares the squelch threshold level to that which set by the front panel UHF SQL knob. While no carrier is received, pin 56 of IC19 remains "high" turning on the squelch switch Q109

(DTC363EK) to disable audio output from the speaker.

8 ) T r a n s m it S ig n a l P a t h

The speech signal from the microphone passes through the MIC jack CN601 to AF amplifier IC601

(M5218FP) on the FRONT UNIT The amplified speech signal is subjected to amplitude limiting by IC601 (M5218FP), then passes through the front interface jacks CN602 and CN2 to MAIN UNIT

On the MAIN UNIT, the speech signal passes through the audio mute switch IC7 (TC4066F), MIC gain

control VR5 and buffer amplifier IC1 (NJM2902V-B) and a low-pass filter network at IC1 (NJM2902V-A) to deviation control VR3 (for VHF TX audio) or VR4 (for UHF TX audio).

9 ) V H F T r a n s m it S ig n a l P a th

The adjusted speech signal from VR3 is delivered to VHF VCO Q9, which frequency modulates the

transmitting VCO D6 (1SV278).

The modulated transmit signal passes through buffer amplifier Q7 (2SC5066), a low-pass filter network,

and another buffer amplifier Q3 (2SC5226) to another low-pass filter network.

The filtered transmit signal is applied to the Pre-Drive amplifier Q2 (2SK3074) and Drive amplifier Q1

(2SK2975), then finally is amplified by Power amplifier Q4 (RD70HV1) up to 50 Watts.

This three-stage power amplifier’s gain is controlled by the APC circuit.

The 50 Watts RF signal passes through a low-pass filter network, antenna switch D1 and D71 (both

UM9401F), and another low-pass filter network, and then is delivered to the ANT jack.

1 0 ) U H F T r a n s m it S ig n a l P a th

The adjusted speech signal from VR4 is delivered to UHF VCO Q29, which frequency modulates the transmitting VCO D35 (1SV278). The modulated transmit signal passes through buffer amplifier Q28 (2SC5066) to a high-pass filter

network.

The filtered transmit signal is applied to the Pre-Drive amplifier Q2 (2SK3074) and Drive amplifier Q1

(2SK2975), then finally is amplified by Power amplifier Q4 (RD70HV1) up to 35 Watts. This three-stage power amplifier's gain is controlled by the APC circuit. The 35 Watts RF signal passes through a high-pass filter network, antenna switch D12 and D13 (both

UM9401F), a low-pass filter and a high-pass filter networks, and then is delivered to the ANT jack.

1 1 ) V H F T x A P C C ir c u it

A portion of the power amplifier output is rectified by D8 (MA4S713), D9 (MA4S713) and Q12 (2SC4081),

and then delivered to APC IC1 (NJM2902V-D) as a DC voltage, which is proportional to the output level

of the power amplifier.

The APC IC1 compares the rectified DC voltage from the power amplifier and the reference voltage from

the main CPU IC19, producing a control voltage for the Automatic Power Controller Q8 (RN2107) and

Q11 (RN1107) which regulates supply voltage to the Pre-Drive amplifier Q2, Drive amplifier Q1, and

Power amplifier Q4, so as to maintain stable output power under varying antenna loading conditions.

1 2 ) U H F T x A P C C ir c u i t

A portion of the power amplifier output is rectified by D9 (M4S713), D22 (MA4S713) and Q12 (2SC4081),

and then delivered to APC IC1 (NJM2902V-D) as a DC voltage, which is proportional to the output level

of the power amplifier. The APC IC1 compares the rectified DC voltage from the power amplifier and the reference voltage from the main CPU IC19, producing a control voltage for the Automatic Power Controller Q8 (RN2107) and

Q11 (RN1107) which regulates supply voltage to the Pre-Drive amplifier Q2, Drive amplifier Q1, and

Power amplifier Q4, so as to maintain stable output power under varying antenna loading conditions.

1 3 ) V H F P T T c ir c u i t

When the PTT switch is pressed, pin 4 of front CPU IC604 (M38503M) goes "low" which sends the

"PTT" command to the main CPU IC19. When it receives the "PTT" command, pin71 of IC19 goes "high" to control local switch D5 (1SV306), filter switches D2 and D3, Tx switch D17 (DAN235E), and APC switches Q8 and Q11, which activates the VHF Tx circuit.

Meanwhile, pin 69 of !C19 goes "low" which disables the VHF Rx circuit.

1 4 ) U H F P T T c ir c u it

When the PTT switch is pressed, pin 4 of front CPU IC604 (M38503M) goes "low" which sends the

"PTT" command to the main CPU IC19. When it receives the "PTH command, pin72 of IC19 goes "high" to control local switch D76 (1SV306), filter switches D74 and D75, Tx switch D17 (DAN235E) and APC switches Q8 and Q11, which activates the UHF Tx circuit.

Meanwhile, pin 70 of IC19 goes "low" which disables the UHF Rx circuit. _

1 5 ) V H F P L L

A portion of the output from the VHF VCO Q9 (2SK508) passes through buffer amplifiers Q7 (2SC5066)

and Q5 (2SC5066) to the programmable divider section of the PLL IQ IC2 (M64076AGP), which divides the frequency according to the frequency dividing data from the main CPU IC19.

It is then sent to the phase comparator.

The 21.25MHz frequency of the reference oscillator circuit, made up of TCXO X1, Is divided by the

reference frequency divider section of IC2 into 4250 or 3400 parts to become 5kHz or 6.25kHz comparative reference frequencies, which are utilized by the phase comparator. The phase comparator section of IC2 compares the phase between the frequency-divided oscillations frequency of the VCO circuit and comparative frequency, and its output is a pulse corresponding to the

phase difference. This pulse is integrated by the charge pump and loop filter of IC2 into a control voltage (VCV) to control the oscillation frequency of the VHF VCO Q9.

1 6 ) U H F P L L

A portion of the output from the UHF VCO Q29 (2SK508) passes through buffer amplifier Q28

(2SC5066) and Q39 (2SC5066) to the programmable divider section of the PLL IC IC2 (M64076AGP), which divides the frequency according to the frequency dividing data from the main CPU IC19.

It is then sent to the phase comparator. The 21.25MHz frequency of the reference oscillator circuit, made up of TCXO X1, is divided by the

reference frequency divider section of IC2 into 4250 or 3400 parts to become 5kHz or 6.25kHz

comparative reference frequencies, which are utilized by the phase comparator

The phase comparator section of IC2 compares the phase between the frequency-divided oscillations frequency of the VCO circuit and comparative frequency, and its output is a pulse corresponding to the

phase difference. This pulse is integrated by the charge pump and loop filter of IC2 into a control voltage (VCV) to control the oscillation frequency of the UHF VCO Q29.

1 7 ) P o w e r - o n C ir c u it

When the POWER switch is turned on, pin 18 of man CPU IC19 goes "low". When pin 18 of IC19 goes "low", pin 79 of IC19 goes "high" to activate the power switches Q63

(2SB1386) and Q74 (2SC4081), which supply the DC power to the radio.

SEMICONDUCTOR DATA

1) M 5 2 1 8 F P ( X A 0 0 6 8 )

Dual Low Noise Operational Amplifiers

Output 1 1

Inverting Input 1 2

Non Inverting Input 1 3

Power supply Minus 4

2 ) N J M 7 8 L 0 5 U A (X A 0 0 9 8 )

5V Voltage Regulator

/ \

___

3 1

3 ) N J M 7 8 0 8 F A (X A 0 1 0 2 )

8V Voltage Ragulator Pin Assignment

Power Supply Plus

Output 2

Inverting Input 2

Non Inverting Input 2

1. OUTPUT

2. COMMON

3. INPUT

3 2 1

1. OUTPUT

2. COMMON

3. INPUT'

4) TC4S66F (XA0115)

Bilateral Switch

1 MDUT [TJ

OUTAN {H

3 » i

vss [äjj

5 ) A N 8 0 1 0 M (X A 0 1 1 9 )

H)VDD

T*1co n t

10V Voltage Regulator

Test Circuit

§ 8

f l

_ _ _

□ □ □

B l

U " □ U

Output Common Input

AN8010M

6) B U 4 0 5 2 B F (X A 0 2 3 6 )

Analog Multiplexer/Demultiplexer

Logic Diagram

Voo (16) o-

1NHIBIT (6) o-

Truth Table

INHIBIT A

LEVEL

CONVE

A (10) o-

STE»

B (9)

VS S(8) o-

Vee (7) ®- Xo(12) »- Xt (14) - X2(1S) »-

Xs(11) «-

Yo(1)«- Yi(5)o- Y2(2) e- YS (4) a-

L L K L L ' L H H

L !

B L L H H X

ON SWITCH

XO YO XI Y1 X2Y2 X3 Y3 NONE

(13) X

¥0 ¡7 Y1 |T

COW ONY [T

« E

vi d

inhibit |T

vu [7

V » {?

¡3 V»

¡3»

¡3*’

tä]X00MM0N

«Ixo

‘IL

n i»

T|b

7) TA75S01F (XA0332)

Operational Amplifiers

____

S A

8) T C 4 W 5 3 F U (X A 0 3 4 8 )

Multiplexer/Demultiplexer

Function Table

Control input

INH

L L

* Don't Care

9) T A 3 1 1 36 F N (X A 0 4 0 4 )

Low Power FM IF

A L H

ON channel

chO ch1

NONE

> j

JN ( +) VE E IN (-)

COMMON |~T

INH

VEE

VSS

IZ Cl

•

-P»

cn CO T |

~B | VDD

7~~| chO

6 | ch1

E a

Block Diagram

10) LA442 5A (XA0410)

5W Audio Power Amplifiers

Test Circuit

11) NJM2904V (XA0573)

1 2 3 4 5

(Top View)

12) NJM2902V-TE1 (XA0596) Quad Single Supply Operational Amplifier

A OUTPUT □

A -IN P U T \ j T _

A + INPUT [~3~

GND [ T

1 2 V+

T "1 B OUTPUT

6 ] B - INPUT

X I B + INPUT

(Top View)

141 DOUTPUT

U1 D- INPUT ~12l D + INPUT TTI GND l0 l C + INPUT

T"1 C-INPUT ~T| C OUTPUT

OSC{B)

OSC(E)

MIX OUTPUT

AM IF INPUT

£ RF INPUT

GND

COMP OUTPUT

COMP INPUT

NOISE AMP OUTPUT

TJ u'

> Cfl to

CD 3

l~ O

□

£ 3

o o> o

■£

r-^

CD o

CD CD

13) S-80845ALMP-EA9-T2 (XA0620)

DECOUPLING

FM IF INPUT

DECOUPLING

LIM OUTPUT

QUAD INPUT

FMDET OUTPUT

NOISE AMP INPUT

AMAGC INPUT

AGC AMP OUTPUT

RFAGC OUTPUT

RSSI OUTPUT

—V.

AW DETOUT

15) BR24C64F-E2 (XA0669)

EE-P ROM Block Diagram

AO 1

A1 2

A2 3

GND 4

Pin Assignment

13bit

ADDRESS DECODER

CONTROL CIRCUIT

HIGH VOLTAGE

GENERATOR

Vcc WP SCL SDA

64Kbit EEPROM ARRAY

t ~

,13bit

START

S L A V E -W O R D

A D D R E S S R E G I S T E R

STOP

E E

VOLTAGE

DETECTOR

BR24C64/F

AC K

DATA

8 Vcc

71 WP

6 SCL

5 SDA

A1 A2

GND

RES

KI5

KI4

KI3

KI2 KI1

KS6 KS5 KS4

KS3 S55/KS2 S54/KS1

16) LC75884W (XA0899)

s 53

Q) Q)

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Wjo

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Knln^MNHOaUI^^MHO)

n n n n n n n n n n n n o n m m n n n

UU UU UU UU UU UU UU UU 'ÏÏUU U

MMWOTWwt/iwwwwMmt/ícnMWWWw MKIMMMM MUUIdUUUUU UU»» «. U^UlOl'jm'ÛOHNWÂUim'JOlÛOHW

KS5 KS4 KS3 KS2/S55 KS1/S54 COM4

COM3

COM2 COMI S53 S52 S51 S50 S49 S48 S47 S46

S45

S44

S43

O O

+ 37 hidden pages

Alinco DR-635 Service Manual

Specifications and Main Features

Frequently Asked Questions

User Manual