Alinco DR-605TE, DR-605E, DR-605T Service Manual

DR-6 05 T / E /TE1 / TE2

S e r v i c e M a n u a l

CONTENTS

• SPECIFICATIONS

1) General.......................................................................2

2) Transmitter.................................................................2

3) Receiver......................................................................2

• CIRCUIT DESCRIPTION

1) Frequency Configuration..........................................3

2) Receiver Sytem

3) Power Supply Circuit...............................................4

4) AF Signal Circuit......................................................5

5) Transmitter System..............................................5-6

6) PLL Circuit.................................................................6

7) Front CPU and Peripheral Circuit

8) Cross Band Repeater Circuit

9) Tone Burst Output Circuit........................................7

10) CTCSS Tone Encoder Circuit

11) CTCSS Tone Decoder Circuit

12) 9600bps Packet Circuit............................................8

13) Clone Circuit

14) CPUI/O Port........................................................9-10

• SEMICONDUCTOR DATA

1) AK2341 ...................................................................11

2) AN78L05M ............................................................12

3) AN8010M...............................................................12

4) AT24C16N-10SI-2.7 .............................................12

5) LA4425A ................................................................12

6) M64076GP ............................................................ 13

7) M57788 ..................................................................14

8) M67746 ..................................................................14

9) M68702H .............................................................. 14

10) MC3372VM ...........................................................15

11) MC7808CT

12) NJM4558 .............................................................16

13) RH5VA60AA ........................................................16

14) RN5VL25AA-T1 ...................................................16

15) TC4W53FU.............................................................17

16) Transistor,Diode and LED Outline Drawings

17) LCD Connection ...................................................18

• EXPLODED VIEW

1) LCD Assembly

2) VHF Unit Assembly.................................................20

3) UHF Unit Assembly.................................................21

...................................................3-4

...........................

..................................

.................................

............................................................8

............................

........................................................19

.............................. 15

......

• PARTS LIST

VHF MAIN Unit......................................................22-23

UHF MAIN Unit......................................................24-26

FRONT CPU Unit................................................. 26-27

VHFVCO Unit......................................................27-28

UHFVCO Unit.............................................................28

TCXO Unit................................................................... 28

Mechanical Parts.........................................................28

PCB Unit......................................................................28

SP Unit......................................................................... 28

Packing........................................................................ 28

7 7

8 8

• ADJUSTMENT

1) Required Test Equipment................................29-30

2) UHF PLL Adjustment.............................................30

3) UHF RX Adjustment..............................................31

4) UHF TX Adjustment................................................32

5) VHF PLL Adjustment............................................33

6) VHF RX Adjustment...............................................33

7) VHF TX Adjustment............................................... 34

8) Adjustment Points.................................................. 35

• PC BOAD VIEW

1) VHF Main Unit Side A............................................36

2) VHF VCO Unit Side A

3) UHF Main Unit Side A

4) UHFVCO Unit Side A............................................ 37

5) VHF Main Unit Side B............................................38

6) VHFVCO Unit Side B............................................ 38

7) UHF Main Unit Side B............................................39

8) UHFVCO Unit Side B............................................ 39

9) Front Unit Side A ................................................... 40

10) Front Unit Side B ................................................... 40

11) TCXO Unit ..............................................................40

• SCHEMATIC DIAGRAM

1) CPU Unit............................................................41-42

2) VHF Main Unit T/E............................................43-44

3) VHF Main Unit TE1fTE2..................................45-46

4) UHF Main Unit T/E........................................... 47-49

5) UHF Main UnitTE1fTE2 .................................49-50

6) VHF PLL-VCO Unit..........................................51 -52

7) UHF PLL- VCO Unit.........................................51 -52

8) TCXO Unit........................................................51-52

• BLOCK DIAGRAM......................................................53-54

............................................

............................................37

A L IN C O , inc

SPECIFICATIONS

1) General

Frequency Rage:

(Version T)

(Version E)

(Version TE1)

(Version TE2)

Modulation: Antenna Impedance: Supply Voltage: Ground: Current Consumption

Frequency Stability: Dimensions (Body only): Weight: Cannel

VHF BAND 136.000-

UHF BAND

VHF BAND UHF BAND 430.000 - 439.995MHz VHF BAND 136.000-

UHF BAND 400.000 - VHFBAND UHF BAND

F3E (FM) 50Q

13.8 Volts DC

Negative VHF TX 50W: 11.5A max. (T/E), 35W: 11 .OA max. (TE1/TE2)

UHFTX 35W: 10.0A max.

RX 1.2A max. ±1 Oppm max.

140(W)mm x 40(H)mm x 176(D)mm

1.1kg

VHF: 51 / UHF: 51 total 102

173.995MHz

144.000-

420.000 -

147.995MHz (TX)

470.000MHz

430.000 ~449.995MHz

144.000-

145.995MHz

173.995MHz

420.000MHz (RX/TX)

136.000-

173.995MHz

450.000 - 470.000MHz

(RX)

(RX) (TX) (RX/TX) (RX/TX) (RX/TX)

(RX/TX) (RX/TX)

2) Transmitter

Output Power:

Modulator: Spurious Emission: Max. Deviation: Mod. Distortion (@60% mod.): Microphone Impedance:

VHF BAND High: 50W / Low: approx. 5W (T/E)

High: 35W/Low: approx. 5W (TE1/TE2)

UHF BAND High: 35W/Low: approx. 5W

Reactance modulation

-60dB max. ±5kHz

3% max. (300 to 3000Hz)

2k£2

3) Receiver

Rx System: Intermediate Frequency:

Sensitivity (12dB SINAD): Selectivity: Squelch Sensitivity: AF Output (@5% distortion): Speaker Output Impedance:

Note: Specifications are subject to change without notice or obligation.

Specifications guaranteed in the amateur band only. (T/E)

Double Superheterodyne VHF: First: 21.7MHz/Second: 450kHz UHF: First: 30.85MHz / Second: 455kHz Main band: -16dBn (0.16^V) or less

-6dB: 12kHz min.,-60dB: 28kHz max.

-20dB^ (0.1 (xV) or less 2W or more (

8 C i

8Q load)

CIRCUIT DESCRIPTION

1) Frequency Configuration

• VHF and UHF bands have each PLL independently, and 2 IF systems are provided. Therefore 2 bands can be received simultaneously.

• The received signal of VHF band is mixed with the first local oscillator signal and converted into the first IF of 21.70M Hz. Then the resulting signal is mixed with the second local oscillator signal of 21.25MHz and converted into 450kHz.

• The received signal of UHF band is mixed with the first local oscillator signal and converted into the first IF of 30.85kMHz. Then the resulting signal is mixed with the second local oscillator signal of 30.395MHz and converted into 455kHz.

2) Receiver System

1. Receiver Circuit

The received signal from the antenna is passed through the duplexer (the circuit consists of low-pass filter for VHF and high-pass filter for UHF), and divided into the signals of VHF and UHF.

1-1 144M Band Receiver Circuit

After the received signal from the duplexer is passed through the band-pass filter via the antenna switch (D5, D6), the signal is amplified at RF amplifier Q11. The

unwanted signal of the amplified signal is eliminated by the band-pass filter consisting of 3 varicaps. Next the signal is mixed with the first local oscillator signal at the first mixer Q12, and converted to the first IF. The unwanted signal is attenuated by the crystal filter circuit. Then the signal is fed to IC2 Pin16 after being amplified at IF amplifier Q7. In this IC2 the signal is mixed with the second oscillator signal and converted to the second IF, then it is output from Pin3. The output signal is attenuated the unwanted signal by the ceramic filter, and input again from IC2 Pin5. Next the signal is passed through the limiter amplifier and demodulated in the quadrature detection circuit of IC2 to be output from Pin9 as AF signal.

1-2 430M Band Receiver Circuit

The received signal from the duplexer is passed through the antenna switch (D206, D207), and amplified in the RF amplifier Q 211. The amplified signal is attenuated the unwanted signal by the helical filter L218. The signal is amplified in RF amplifier Q212 and attenuated the unwanted signal again by the helical filter L219, then it is mixed with the first local oscillator signal at the first mixer Q 213 and converted to the first IF. The unwanted signal is attenuated by the crystal filter circuit. Then the signal is fed to IC202 Pin16 after being amplified at IF amplifier Q214. In this IC202 the signal is mixed with the second oscillator signal and converted to the second IF, then it is output from Pin3. The output signal is attenuated the unwanted signal by the ceramic filter, and input again from IC202 Pin5. Next the signal is passed through the limiter amplifier and demodulated in

the quadrature detection circuit of IC202 to be output from Pin9 as AF signal.

2. S (Signal) Meter Circuit

3. Squelch Circuit

VHF: The S meter signal DC voltage which is output from IC2 Pin13 is supplied to IC401 Pin10 via Trim, pot VR1, then it is digitized by A/D converter to be indicated on LCD as the S meter.

UHF: The S meter signal DC voltage which is output from IC202 Pin 13 is supplied to IC401 Pin5 via Trim, pot VR202 then it is digitized by A/D converter to be indicated on LCD as the S meter.

VHF Squelch Circuit: The AF signal which is output from IC2 Pin9 is input to Pin10. Only the noise is amplified by the active filter in IC2 and output from Pin11, then amplified by the noise amplifier Q6. The amplified noise is rectified to DC voltage by D2 and input to CPU IC401 Pin9 via Trim, pot VR2. In the IC the input voltage and the settled voltage by the squelch knob are compared to work the squelch ON/OFF. When the squelch is open, the squelch signal "H" is output from IC401 Pin41 and LED D401 (green) lights.

UHF Squelch Circuit: The AF signal output from IC202 Pin9 is input to Pin 10. Only the noise is amplified by the active filter in IC2 and output from Pin11, then amplified by the noise amplifier Q206. The amplified noise is rectified to DC voltage by D202 and input to CPU IC401 Pin5 via Trim, pot VR201. In the IC the input voltage and the settled voltage by the squelch knob are compared to work the squelch ON/OFF. When the squelch is open, the squelch signal "H" is output from IC401 Pin13 and LED D402 (green) lights.

3) Power Supply Circuit

1. VHF Power Supply Switch Circuit and Unlock Circuit

Jn the receiving mode, "H" is output from PLL shift register IC501 Pin16 according to the serial data from CPU, and Q17 and Q16 are turned ON, then 8V is added to 8RV line. In the transmitting mode, just same as the receiving mode, "H" is output from IC501 Pin17, and Q19 and Q 18 are turned ON, then 8V is added to 8TV line. When PLL is unlocked, the unlock switch Q21 is turned ON because "H" is output from UL terminal of PLL-VCO unit. Then 8TV switch Q19 is turned OFF. Conse quently, as 8TV line does not work, the unit does not transmit when PLL is un locked.

2. UHF Power Supply Switch Circuit and Unlock Circuit

In the receiving mode, "H" is output from PLL shift register IC601 Pin16 according to the serial data from CPU, and Q217 and Q218 are turned ON, then 8V is added to 8RV line. In the transmitting mode, just same as the receiving mode, "H" is

output from IC601 Pin17, and Q220 and Q219 are turned ON, then 8V is added to 8TV line. When PLL is unlocked, the unlock switch Q222 is turned ON because "H" is output from UL terminal of PLL-VCO unit. Then 8TV switch Q220 is turned

4) AF Signal Circuit

1. VHFAF Signal

2. UHF AF Signal

OFF. Consequently, as 8TV line does not work, the unit does not transmit when

PLL is unlocked.

The AF signal which is output from IF unit IC2 Pin9 is made the AF frequency

characteristics 3kHz or below by the de-emphasis circuit (consisting of R19, C18,

R13, C10, R12 and C9), then amplified by AF preamplifier Q3. Besides the amplified signal is made the AF frequency characteristics 300Hz or more by the de-emphasis circuit (consisting of C5, R8, C4, R3, C3). The de-emphasized AF signal ROV is muted and after the signal is adjusted by volume VR401, added to

AF power amplifier IC3 Pinl and amplified to drive the speaker.

The AF signal which is output from IF unit IC202 Pin9 is made the AF frequency characteristics 3kHz or below by the de-emphasis circuit (consisting of R226, C213, R222, C2 11, R221 and C210), then amplified by AF preamplifier Q203. Besides the amplified signal is made the AF frequency characteristics 300Hz or more by the de-emphasis circuit (consisting of C207, R210, C206, R207, C205). The de-emphasized AF signal ROU is muted and after the signal is adjusted by volume VR402, added to AF power amplifier IC3 Pin 1 and amplified to drive the

speaker.

3. AF Mute Circuit

VHF: When the squelch is turned ON and there is no input signal, the output control signal of the microcomputer IC401 Pin42 turns ON double mute switches Q2 and

Q4, then the input signal of audio power amplifier IC3 is cut to mute the speaker

output.

UHF:

When the squelch is turned ON and there is no input signal, the output control signal of the microcomputer IC401 Pin19 turns ON double mute switches Q204 and Q233, then the input signal of audio power amplifier IC3 is cut to mute the speaker output.

5) Transmitter System

1. Modulator Circuit VHF/UHF

After the voice is converted into the electric signal by the microphone, the signal is

led to the microphone amplifier Q401 to be amplified. The microphone amplifier includes the pre-emphasis circuit. The amplified voice signal is added to the IDC circuit of operational amplifier IC203 and limited the band width. Each frequency deviation can be adjusted in VR3 (VHF) or VR204 (UHF). The signal is added to varicap of VHF/UHF VCO unit for reactance modulation.

2. Drive/PA Amplifier Circuit

VHF: The transmit signal from VCO of VHF band is amplified by the younger amplifiers

Q9, Q10, then input to the power module IC1. The signal amplified to the desired

level in IC1, is passed through the low-pass filter, antenna switch, and low-pass

filter in duplexer to attenuate the second and third harmonics enough, then

supplied to the antenna.

UHF:

The transmit signal from VCO of VHF band is amplified by the younger amplifiers

Q208, Q209, Q 210 then input to the power module IC201. The signal amplified to

the desired level in IC201, is passed through the low-pass filter, antenna switch,

and low-pass filter in duplexer to attenuate the second and third harmonics

enough, then supplied to the antenna.

3. APC circuit

VHF:

A part of output power from low-pass filter is detected by Diodes D7 and D8, and

converted to DC. The detection voltage is passed through the APC circuit of UHF

side (Q229, Q228, Q227), then it controls the APC voltage supplied to the younger

amplifier Q10 and the power module IC1 to fix the output power.

6) PLL Circuit

1. PLL Synthesizer Circuit

UHF:

A part of output power from low-pass filter is detected by Diodes D208 and D209,

and converted to DC. The detection voltage is passed through the APC circuit of

UHF side (Q229, Q228, Q227), then it controls the APC voltage supplied to the

younger amplifier Q210 and the power module IC201 to fix the output power.

VHF and UHF bands have their own units isolatedly. The sub unit is packed in a

hard shield case so as not to be influenced by the circumstances. The crystal X2:

21.25M Hz is oscillated in IC501 (VHF), and the output is fed to IC601 (UHF) via

buffer Q13. The reference oscillating frequency (X2) is divided inside IC501 and

IC601 to gain the reference frequency of 5kHz or 6.25kHz. The comparison

frequency is divided by the pulse swallow system PLL IC501 and IC601 after VCO

output is amplified in Q505 (VHF) and Q604 (UHF). In the result, the PLL synthe

sizer which has 5, 10,12.5, 15 ,20, 25, 30 and 50kHz steps is obtained.

The reference frequency of 21.25MHz is passed through the buffer of IC501 and

output from Pin 1 XBO, then input to IC2 Pin1 as VHF (144MHz band) 2nd local

oscillator.

*As for TE1 and TE2, reference frequency of 21 ,25MHz is oscillated in X901:

TCXO unit and fed to IC501 (VHF).

2. V-VCO Circuit

The desired frequency is oscillated directly in Colpitts oscillating circuit consisting of FET Q502. VCO control voltage is added to the varicaps D502 and D503 to tune the oscillating frequency. While receiving RXV becomes "H", and Q501 and D501 are turned ON to shift the oscillating frequency.

3. U-VCO Circuit

The desired frequency is oscillated directly in Colpitts oscillating circuit consisting of FET Q601. VCO control voltage is added to the varicaps D602 and D603 to tune the oscillating frequency.

7) Front CPU and Peripheral Circuit

1. Microphone Key Input Circuit

PTT key: Soon after the switch on the microphone (PTT) is turned ON, "L" level is input to CPU IC401 directly. UP/DOW N key: Soon after this switch is turned ON, the voltage is generated by the resistors that are connected to keys and supplied to IC401 Pin4 then A/D converted in CPU.

2. Lighting Circuit

When the power is turned ON, the voltage which is stabilized to 10.5V at Q405 and D407 is supplied to LMP401 and LMP402 to turn ON the lamp.

3. Reset and Backup Circuit

When the power is turned ON, "L" level of approximately 2jis or more is output from IC403 OUT (equipped with reset function), then "H" level is output to reset CPU IC401. When the power is turned OFF, IC405 output (BU) becomes "L" level and the transceiver goes into the backup mode. The contents of the memory is written on E2PROM IC402 in the backup mode. Then IC403 (equipped with reset function) becomes "L" level to reset the CPU.

4. Beep Sound Output Circuit

The square pulse is output from CPU IC401 Pin23 (BEEP), then it is integrated by CR and input to AF amplifier without passing through Volume VR.

8) Cross Band Repeater Circuit (T, TE1, TE2)

When the Squelch of VHF side is opened in the Cross Band Repeater mode, the

AF signal ROV (VHF) is unmuted and amplified by IC203. The amplified modula tion signal is added to modulation varicap of UHF VCO and transmitted from UHF side. When the Squelch of UHF side is opened in the Cross Band Repeater mode, the AF signal ROU (UHF) is unmuted and amplified by IC203. The amplified

modulation signal is added to modulation varicap of VHF VCO and transmitted

from VHF side.

9) Tone Burst Output Circuit

When Down key is pressed while holding the PTT key down, the square pulse is output from CPU IC401 Pin14 (B1750). It is amplified by IC203 after being integrated by CR. The amplified signal is added to each VCO modulation varicap to output.

10) CTCSS Tone Encoder Circuit

The mimic sine wave is output from IC401 Pin11. It is integrated by CR, and converted to analogue wave to obtain 50 waves within 67.0~254.1. The tone is added to VCO to output.

11) CTCSS Tone Decoder Circuit (EJ-24U)

In IC1 (VHF) or IC2 (UHF), a kind of tone frequency is settled by the serial data selected from 50 kinds of frequencies within 67.0-254.1 Hz . While receiving the voice and tone signals input from RAV (VHF) or RAU (UHF) are supplied to Pin1, and tone signal only is selected at the low-pass filter in IC. When the signal is accordance with the tone frequency which is settled by the serial data, "L" level is output to TDV (VHF) or TDU (UHF) terminal. The "L" level signal is input to

IC401, Pin32 and Pin33, then the squelch is opened When the tone signal is not

accordance with the settled frequency, "H" level is output to the TDV (VHF) or TDU (UHF) terminal. The "H" level signal is input to IC401, Pin32 and Pin33, then the squelch is closed.

12) 9600bps Packet Circuit

In the 9600 packet mode, PTT is provided through the UART terminal of JK1 to IC401 Pin22, then it is transmitted in "L" level. The modulation signal from TNC is provided through 9600 PKT terminal of JK2. It is amplified and limited in Q29, unmuted in Q26 and Q27, and the VCO is modulated, then transmitted. The detection output of IF IC2 or IC202 is input to the signal switch IC4 via butter Q23 or Q235. The input V/U signal switches the input signal of IC4 according to the signal from CPU IC401 Pin33. Then the MAIN band signal is output from Pin1 to JK2.

13) Clone Circuit

In the Clone mode, the data which is output from IC401 Pin21 of Master unit is fed to the IC401 Pin22 of the Slave unit through the UART terminal JK1 and connect ing cable.

14) CPU I/O Port

No.

Pin Name Function I/O Logic

Description

C1 C1

2 VL1

P67/AN7

3 4 P66/AN6

5 P65/AN5

P64/AN4

6 7 P63/SCLK22/AN3 BP1 I A/D

P62SCLK21/AN2 BP2 I

8 9 P61/SOUT2/AN1 SQV

P60/SIN2/AN0

10 11 P57/ADT/DA2

P56/DA1 MMUT

P55/CNTR1 SDU

13 14

P54/CNTR0 P53/RTP1

15 16 P52/RTP0

P51/PWM1 18 P50/PWM0 19 P47/SROY1

20 P46/SCLK1

P45/TXD TXD

P44/RXD RXD I

P43/S/TOUT BEEP

23 24

P42/INT2

P41/INT1

25 26 P40

P77

27 28 P76 MONI I/O L

P75

P74

P73 FUNC I

P72

P71

33 34

P70/INT0 BU

RESET

Xcin

36 37 Xcout xco

Xin

38 39 Xout XOUT

V1 v/u I A/D Key input (VHF/UHF/TOT key switch)

UP/DN I SMU I A/D SQU I A/D UHF side SQ noise voltage input

SMV I TONE

B1750 DATU

CKU o Pulse UHF side PLL clock output STPU o

PTT MUTU

XMUT

ENC2 I

ENC1 I

UL TP I

MHZ I V/M I L Key input (VFO/MR switch)

TDV I L VHF CTCSS tone detection (when the tone is detected = "L") TDU

RES I L XC1

XIN

- -

A/D Key input (UP/DOWN/CALL key switch)

A/D

o o H Microphone mute OFF control output (TX="H")

I/O A/D/H Extension specification (when PSW is ON)/ Tone burst output

0 Pulse UHF side PLL data output

I 0 H o L o

I L PLL unlock input (L = unlock)

I/O

- -

I o

A/D VHF side SQ noise voltage input A/D VHF side S meter voltage input

D/A

Pulse

Pulse Pulse Clone data input (9600 packet = PTT input "L" = TX)

L/H

NC LCD Power supply

UHF side S meter voltage input

Destination setting (T=5V, E=3.2V) Extension specification

CTCSS tone output (50 waves)

H UHF Squelch signal output (When squelch is open = "H")

UHF side PLL reset output

L Key input (PTT)

UHF side AF signal mute control output ("H" = Mute is ON) AF unmute output in cross band repeater mode (XBR = "L") Clone data output

H Beep sound output

L Rotary encoder B input L Rotary encoder A input

Trunking mode input (H = Trunking mode) Key input (MONITOR) / 9600 mode (PTT ON = "L")

L Key input (MHz)

L Backup signal input ("L"=Backup)

key input (FUNC)

UHF CTCSS tone detection/RX switch in 9600 mode (VHF=L)

Reset signal input ("L"=Reset) NC NC CPU clock input (4.1943MHz) CPU clock output (4.1943MHz)

No. Pin Name

Vss GND

40 41 P27 SDV 0 H VHF squelch signal output (when squelch is open = "H")

P26 MUTV

P25

43 44 P24 45 P23

P22

P21 SDA I/O Pulse EEPROM data input/output

P20 LOW o

P17

50 P16 TID 51 P15/SEG39 SEG39

i i i i

SEGO

91 Vcc VCC

92 Vref AVCC 93 AVss GND 94 COM3 COM3

COM2 COM2 0

COM1

96 97 COMO COMO

98 VL3

VL2

100

Function I/O Logic Description

- -

STPV DATV CKV 0 Pulse VHF PLL/CTCSS clock output

SCL

STB2

SEGO

COM1 0

V3 V2 C2

0 Pulse VHF PLL reset output 0 Pulse VHF PLL/CTCSS data output

0 Pulse CTCSS UHF strobe signal output

I/O Pulse

0 H Segment output for LCD

o H Segment output for LCD

- -

Pulse

GND

VHF AF signal mute control output (H=Mute is ON)

EEPROM clock output

Transmitting output switch ("H"=Low output)

CTCSS board detection/CTCSS VHF strobe signal output

5V Power supply Reference power supply for A/D conversion GND

- NC

- Common output 2 for LCD

- Common output 1 for LCD

- Common output 0 for LCD

- Power supply for LCD

Power supply for LCD NC

SEMICONDUCTOR DATA

1) AK2341 (XA0239) EJ24u (option)

C T C S S E n c o d e r / D e c o d e r

Name

RXIN

TXIN

VDD

XIN

XOUT

VSS -

TLINP TLINN I TLINO

BIAS

I/O

I RX Signal Input

I TX Audio Input

- I Crystal Terminal (3.6864MHz)

Crystal Terminal (3.6864MHz)

I Strobe for Serial Data I Serial Data I I DCS Input

I Tone Detection Level Adjust Input I

RX Tone Signal Reference Input

No.

1 2 RXINO 0 AMP2 Output 3 TXINO 0

4 5 RXOUT 0

TXOUT

7 8

10 STB 11

SDATA

12 SCLK

13 DCS

DETOUT0Tone Detection Output (Detect: Low)

14 15

16 DREF

18 19 20 RXTONE 0 RX Tone Signal Output

21 TXTONE 22 AGNDIN 23 AGND 0 Analog Ground Output

Function

AMP1 Output

RX Audio Output

TX Audio Output

Power Supply (1.8 - 5.5V)

Serial Clock

Ground

RX Tone Signal Input

AMP3 Output

TX Tone Signal Output

Analog Ground Input

Bias Input

RXIN

RXINO n z

TXINO

TXIN

RXOUT

TXOUT

VDD

XIN

XOUT c =

STB

SDATA

SCLK

n z

c z

1 =

c =

1 =

n z

> =

n z

* fO

= □

ZZI ZZI ZD

= □

ZZI ZD

= □

Z D

1=]

ZZI

BIAS

AGND

AGNDIN

TXTONE

RXTONE

TLINO

TLINN

TLINP

DREF

VSS

DETOUT

DCS

Block Diagram

J 3. 6864 MHz

2) AN78L05M (XA0238)

5 V V o lt a g e R e g u la to r

3) AN8010M (XA0119)

V o lt a g e R e g u l a to r

Test Circuit

u u u

Output Common Input

A N 8 0 1 0 M

u u u

Output Common Input

A N 7 8 L 0 5 M

4) AT24C16N-1 OSI-2.7 (XA0368)

1 6 K b it s C M O S S e ria l E E P R O M

A1 IZZ 2

A2 C Z

GND

1 =

■ =

> H

O _k

o> z

7 = □ TEST

= l

Vcc

SCL

SDA

5) LA4425A (XA0410)

5 W A u d io P o w e r A m p lif i e r s

Pin Nam e

AO to A 2 Addres s inputs

SD A

SC L

Te s t NC N o conne ctio n

Serial D ata

Se rial Clock Test Input {GN D or Vcc )

Function

1 2 3 4 5

6) M64076GP (XA0352)

Dual PLL Synthesizer

XB o

C P S

RS T

Vc c

Fini

Lo c k l

PD1

VT1

2 19

3 18

□

Equivalent Circuit

Fin2 0

o> o o>

O “O

GND

□

Xin

□

Xout

□

17□OP2

16□OP 1

15□Fin2

Lock 2

□

13□PD 2

12□VT 2

GND

□

Pa ramet er S ym bol

Pow e r s upp ly vo lta ge

LPF sup ply voltage

Lo c a l oscillator input leve l

Lo c a l os cillator input fre quen cy

Xin input le vel

Xin input freq uen c y

— Data latch (17bit)

Local 2 programmable divider

Cond ition Min.

Vcc

Vin

Fin

Vxin

Fxin

Fin-8 0 ~520MH z

Vin =-10d Bm

VF - ■ 9 12

Fin -80-52 0M H z

Vcc-2 .7~5.5 V Vin»-20 ~ -4d B m

Vcc-2.7 -5 . 5 V Vcc- 2 .7 ~5 . 5V

Fx in=1 0 -25MH z Sin e w a v e

Vçc- 2 .7 ~5 . 5V Vx in-0 .4 ~ 1 .4 V p -p

Ty p. Ma x. Unit

2.7

-20

80 - 520

0.4

- 1.4

5.5

-4

dBm

M H z

Vp -p

25 MHz

Data latch (16bit)

Reference frequency 2

programmable divider

Reference frequency 1

programmable divider

............I.......

Data latch (16bit)

Local 1

programmable divider

I ~

"— Data latch (17bit)

' — Data latch (6bit)

GND

7) M57738LR (XA0447)

M57788MR (XA0313) M57788HR (XA0448)

U H F F M 3 5 W R F P o w e r M o d u le

S' O

D o

O il

5 c

t'i

o s

8 ) M67746 (XA0412)

1 4 4 - 1 4 8 M H z 6 0 W

R F P o w e r M o d u l e

M57788MR

5 4 3 2 1

*5 .

o 2

a D

? !

Q g

I I

iT ©

S) 0)

¿3 ^

w a

CM W

o | Q E

iS >*

<0 Q.

V) D

(13

M67746

12 3 4

O Q

ID C-

.§* >-c

” & E « 5 m

3 CM

Q |

I I

C-

4_, (Q 5 c

t i o s

^ s

c l o

£ 52- - u > &

I f

3 s

Q .O

C '«i’

Supply voltage

D O

Total current

Input power Output power Po Operation case temperature

Storage temperature f=430~450MHz, Vcc1<13.5V, Zg»ZI=50ii

Supply voltage Vcc 17 Total current

Input power Pin(max) Output power Operation case temperature Storage temperature Tstg

Zg=ZI=50£i

Ratings

Symbol

Vcc Icc

Tc(op) Tstg

Symbol Ratings

Icc 20

Po(max) Tc(op)

Ratings

17.0 12

0.8 50

-30—i-110

-40—1-110

600

-30 to+110

-40 to+110

Unit

A W W °C °C

Unit

W °C °C

9) M68702H (XA0444)

1 5 0 - 1 7 5 M H z 6 0 W

R F P o w e r M o d u le

M68702H

12 3 4

0 ^

Q OJ

S? ^ «

jS ^ c

I f

3 O

” & E

Q .O

C CO

1 3 *

3 OJ o

V) y - CD

O -s O g

? ! il £

■5 CL

■5

Supply voltage

n c

E ©

Total current

Input power Output power Operation case temperature Storage temperature

Zg=ZI=50£i

Ratings

Symbol Vcc Icc 20 Pin(max) 600 Po(max) 75 Tc(op) -30 to+110 Tstg

Ratings

-40 to+110

Unit

V A

W °C °C

10) MC3372VM (XA0343)

L o w P o w e r F M IF

Equivalent Circuit

(1 6 )

---------

(15 >

Sq uelch Trigg er

Oscillator — » Mixer

Filter A m p

------

& — ® -

Crystal O s c .

Crystal O s c . nz

Mixer Output

Vc c nz

Lim iter Input

De cou p ling

Lim iter Output

Qua d Input

Ta=25°C

Parameter Pin No.

Max. supply voltage

Symbol Ratings Unit

Vcc 2.4-9.0 Vdc

RF input voltage 16 Vrf 0.005-10 mVrms RF input frequency 16 Oscillator input voltage IF frequency

- Limiter amplifier input voltage 5 Vif Filter amplifier input voltage 10 Squelch input voltage Mute sink current Temperature range

12 14

Frf

0.1-100 MHz

Vlocal 80-400 mVrms

Fif 455

0-400

Vfa

Vsq

0.1-300 0or2

Isq 0.1-30

kHz mVrms mVrms

Vdc

TA -30-+75

3 14

c :

i= 5

6 11

8 9

°C

= ]

=1 =1

= •

= □

Mixer Input

GND

Mute

M ete r drive

Sq uelch Input

Filter Output

Filter Input

De m odu lator Output

11) MC7808CT (XA0082)

8 V V o l t a g e R e g u la to r

Test Circuit

78L08

12) NJM4558 (XA0097)

O p e ra t io n a l A m p lif ie r s

13) RH5VA60AA (XA0315)

C - M O S V o l t a g e D e te c t o r

Equivalent Circuit

VD D r

................................................................

- o

OUT

A Output [

A -Input [

A +lnput I

V- [

1 A \

3 6

4 5

h 7

V+

IB Output

B -Input

B + Input

14) RN5VL25AA-T1 (XA0309)

C - M O S V o lt a g e D e t e c t o r

Equivalent Circuit

VD D r......................................................................

(* >

Vr ef

VSS

u u u

OUT VDD VSS

R H 5 V A 6 0 A A

OUT

u u u

VSS

OUT VDD VSS

R L 5 V L 2 5 A A

15) TC4W53FU (XA0348)

M u l t i p l e x e r /D e m u lt ip le x e r

F u n c t i o n T a b le

Control input

INH

L L

* Don't Care

ON channel

chO ch 1

NONE

COMMON

INH

VEE

VSS 4

16) Transistor, Diode and LED Outline Drawings

T o p V ie w

• 4^

U l 03 6

I]H

17) LCD Connection

No.

COM.3

COM.2

COM.1 No. COM.3

2 COM.2 27 3 COM.1 28 4

(R)ISQLI

(R) 50

(R)CD

(R) 75 (R) 25 6 10c 10b 7

10g 10a 10d 8 10e 10f 9

10 11 12 13 14 15 16 17 18

19 20 21 22 23 24

9c 9b 9g

9e 8c

B e 8f 7 c 7b

7e 14c 14g

14b

14a 14e 13c

13b 6f 13g 13a 13d 13e

13f

LOW F

(L) 50

(L) 75 (L) 25

9f 8b 8a 8d 38

14f

(H) I I I

(G) I I I

@ .

( n i l l

(D .

(E )« //

(R) □

(R) E l

7d 7a

6bcg

14d

(R)IMAINI

(D) I I I

COM.2 COM.1

29 30

31 4e 4f

5c 5g

5e 5f 4c

(C)///

5a 5d

<B) / / /

4a 4d

3g 3e 2c

2g 2e 2f

12c

12g 40 12e 41 1 1 c 42

110

43 11e

3a 3d

(L) I SOL I

3 1

(u m

(L) □

12b

(L) E l

12a 12d

12f

1bc 11b 11a

11f

11 d

(L)IMAIN I

ifg

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