Yamaha MW14 Schematics
Revisions
http://hobi-elektronika.net
Approvals
TABLE OF CONTENTS
PAGE
4 - CLOCK GENERATOR
5-8 - YONAH PROCESSOR
9-14 - CALISTOGA
15-17 - DDR2
18-22- ICH7-M
23 -LCD INTERFACE
24- HDD CONNECTOR(SATA)
25 - CD-ROM CONNECTOR (PATA)
26 - USB PORT & CIR USB CONTROLLER
27 - LAN CONTROLLER
28 - LAN POWER
29- RJ45 CONN
30- KBC (SUPER I/O)/FLASH ROM
31 - IR / CIR
32- 1394 CONTROLLER
33 - K/B CONN & TOUCH PAD & LED & KILL SW
REV REL.
ECN NO.
Description Of Change
DATE
DFTG.
ENGR.
PAGE
36- CARD READER 3 IN 1
37 - MINI CARD
38 - MDC / BT INTERFACE & MIC
39 - THERMAL SENSOR & FAN
40 - BOARD TO BOARD CONN
41 - DRILL HOLE
42 - TPM 1.2
43-50 - POWER
51 - DC IN
52-55 - IO BOARD - TV OUT/CRT/USB
56 - TOUCH PAD BUTTON BOARD
57-59 - HOTKEY BOARD
60 - OPTIONAL HOTKEY BOARD
61-62 - AUDIO DAUGHTER BOARD
63 - AUDIO I/O DAUGHTER BOARD
34 - CARD CONTROLLER
35 - NEW CARD
CHANGE NO.
REV
DRAWER
CHECK
DESIGN
RESPOSFOR
SIZE = B
FILE NAME :
XXXX-XXXXXX-XX
XXXXXXXXXXXX
P/N
EE
DATE
DATE BEGINNING :DATE
POWER
dd / mm / yyyy
VER :
DATE
INVENTEC
TITLE
SIZE
A3
MW14-6.0
DOC. NUMBER
CODE
LC5183 X01
CS
SHEET
REV
OF
631
CPU
http://hobi-elektronika.net
YONAH/MEROM
PWR Board
Batt Charger
MAIN BATT
LCM
14" TFT
XGA/SXGA
CRT
IO BOARD
TV OUT
P.30
P.60
ANT
CD-ROM
USB2.0 x 8
BT
BIOS
TOUCH PAD
2 PICK BUTTON/
1 SCROLL BUTTON
HDD
P.45
P.37
SATA
P.31
Ultra ATA-100
P.32
SUPER I/O & KBC
North Bridge
Calistoga
1466 uFCBGA
South Bridge
ICH7-M
652 BGA
LPC 3.3V 33MHZ
KBC1122
PSB
DMI
P.37
P.5-8
DDR2 533/667
DDR2 533/667
P.9-14
PCI Bus
P.25-29
1394 CONN X 1
PCI_Express Bus
Card
Controller
TI PCI8402
P.39
CLK GEN
ICS9LP316
DDR2_SODIMM0
DDR2_SODIMM1
NEW CARD
P.41
3 IN 1 SLOT
P.43
P.4
P.14,16,17
P.15,16,17
P.42
Mini Card
DTV
THERMAL SENSOR
& FAN
ADM1032
Mini Card
P.44
802.11abg
ANT
ANT
P.46
P.44
LOM
Controller
RTL8111B(1G)/
RTL8100E(10/100)
P.34
RJ45
CONN
P.36
CIR
IR
KB / LED
Azalia
Audio Board
Codec
REA_ALC861
AMP
MAX_MAX9750
Azalia
EARPHONE
/ Speaker
INT/EXT
MIC
KILL-SW
& USB
MDC
MDC 1.5
P.45
CHANGE by
Su Chun-Chi 25-Feb-2006
INVENTEC
TITLE
BLOCK DIAGRAM
CODE
SIZE
A3
CS
SHEET
MW14-6.0
DOC. NUMBER
LC5183 X01
REV
OF
632
DSKDC
http://hobi-elektronika.net
+VBAT
5V
+V5S
+V5A
+VADPTR
+V3S
+V1.5S
SCL
SDA
ACOK
+V2.5S
+V1.2S
+VPACK
SKIP#
3V
EN_PSV
EN_PSV
EN_PSV
EN_PSV
+V3A
1.5V
1.8V
VCCP
VCCP
+V3S
+V1.5S
+V0.9S
+V1.8
+VGAVCC
+VCCP
PWM2
INPWM1
IN
SW
SW
Su Chun-Chi
7-Nov-2005
+VCC_CORE
INVENTEC
TITLE
BLOCK DIAGRAM
SIZE
CODE
A3
CS
SHEET
MW14-6.0
DOC. NUMBER
LC5183 X01
REV
OFCHANGE by
633
CPU_BSEL0
http://hobi-elektronika.net
CPU_BSEL1
CPU_BSEL2
+VCCP
2
R231
OPEN
1
R230
12
9-,6-
10K_5%
+VCCP
48-,21-,18-,14-,13-,11-,7-,6-,5-,4-
2
R227
OPEN
1
R220
9-,6-
2
10K_5%
R190
OPEN
12
R213
9-,6-
1
10K_5%
R211
OPEN
12
VR_PWRGD_CK410
1
2
IMVP_CKEN#
1
2
+V3S
45-
SSM3K17FU_OPEN
C611
22uF_6.3v
45-
Layout note: All decoupling 0.047uF disperse closed to pin
C264
1
2
0.047uF_10v
1
2
2
0.047uF_10v
C266
C283
11
0.047uF_10v
2
C282
0.047uF_10v
Please place close to CLKGEN within 500mils
X501
12
C642
1
14.31818MHZ
2
33pF_50v
30PPM
19-
CLK_R3S_ICH48
CLK_R3S_CARD48
CLK_R3S_ICH14
CLK_R3S_CBPCI
CLK_R3S_MINICARDPCI
CLK_R3S_KBPCI
CLK_R3S_TPMPCI
CLK_R3S_KBC14
ICH_3S_SMDATA
ICH_3S_SMCLK
CLK_R3S_ICHPCI
Q19
D
D
G
G
S
S
19-
LAYOUT NOTES : THE IREF(PIN_46) VIA R CONNECT TO GND DIRECTLY.
1
R175
4.7K_1%
2
34-
34373042-
30-
19-,16-,1519-,16-,15-
20-
R228
R229
R214
R225
R222
R224
R221
R216
R215
R223
R226
C281
1
2
0.047uF_10v
C612
1
2
33pF_50v
12
12.1_1%
12
12.1_1%
12
33_5%
12
33_5%
12
33_5%
12
33_5%
12
33_5%
2
1
10K_5%
12
33_5%
10K_5%
12
12
33_5%
CLK_REQA#
CLK_REQB#
+V3S_CLKVDD
C265
1
2
0.047uF_10v
CLK_3S_ICH48
CLK_BSEL1
CLK_3S_ICH14
CLK_3S_CBPCI
CLK_3S_MINICARDPCI
CLK_3S_KBPCI
CLK_3S_TPMPCI
CLK_3S_KBC14
CLK_3S_ICHPCI
37-,1937-
R256
12
0_5%
+V3S
L509
49-,47-,45-,42-,40-,39-,38-,37-,36-,35-,34-,32-,31-,30-,27-,25-,24-,23-,21-,20-,19-,18-,16-,15-,13-,10-,9-,5-,4-
1
2
3
4
NFM40P12C223
C613
0.047uF_10v
U14
24
VDDSRC
41
VDDSRC
5
VDDPCI
10
VDD48
16
VDD
33
VDDSRC
50
VDDCPU
57
X1
56
X2
11
FSLA_USB_48MHZ
15
FSLB_TEST_MODE
59
REF1_FSLC_TEST_SEL
6
PCICLK6
2
PCICLK4
3
PCICLK5
1
PCI_REFSEL_PCICLK3
62
SEL_REQ_PCICLK2
60
REF0_PCICLK1
54
SDATA
53
SCLK
7
SELSRC_LCDCLK#_PCICLK_F1
9
Vtt_PwrGd#_PD
46
VREF
64
CLKREQA#
63
CLKREQB#
4
GND
12
GND
40
GNDSRC
58
GND
17
GND
25
GNDSRC
32
GNDSRC
47
GNDCPU
ICS_ICS9LPR316_TSSOP_64P
1
1
2
2
CPUCLKT2_ITP_CLKREQC#
CPUCLKC2_ITP_CLKREQD#
LCDCLK_SST_SRCCLKT0
LCDCLK_SSC_SRCCLKC0
(ICS_ICS9LPR316)
C614
BLM11A121S
10uF_6.3v
PCI_SRC_STOP#
CPU_STOP#
CPUCLKT0
CPUCLKC0
CPUCLKT1
CPICLKC1
SRCCLKT5
SRCCLKC5
SRCCLKT8
SRCCLKC8
SRCCLKT7
SRCCLKC7
SRCCLKT6
SRCCLKC6
SRCCLKT4
SRCCLKC4
GNDSRC
GNDSRC
SRCCLKT3
SRCCLKC3
SRCCLKT2
SRCCLKC2
SRCCLKT1
SRCCLKC1
DOTT_96MHZ
DOTC_96MHz
L510
2
VDDREF
+V3S
1
55
8
61
CLK_CPUBCLK
52
CLK_CPUBCLK#
51
CLK_MCHBCLK
49
CLK_MCHBCLK#
48
45
44
35
34
CLK_PEG_MCH
43
CLK_PEG_MCH#
42
CLK_PCIE_CARD
39
CLK_PCIE_CARD#
38
CLK_PCIE_ICH
37
CLK_PCIE_ICH#
36
CLK_SATA1
30
CLK_SATA1#
31
28
29
CLK_PCIE_MINI1
26
27
CLK_PCIE_MINI1#
CLK_PCIE_MINI2
22
23
CLK_PCIE_MINI2#
CLK_PCIE_LAN
20
CLK_PCIE_LAN#
21
SSCLK_DREF
18
SSCLK_DREF#
19
CLK_DREF
13
CLK_DREF#
14
49-,47-,45-,42-,40-,39-,38-,37-,36-,35-,34-,32-,31-,30-,27-,25-,24-,23-,21-,20-,19-,18-,16-,15-,13-,10-,9-,5-,4-
22_5%
12
R217
12
R218
R176
R179
R180 24_5%
R181 24_5%
R173 24_5%
R174 24_5%
R177
R178 24_5%
R189 24_5%
R188 24_5%
R183 24_5%
R182 24_5%
Close to CLKGEN
R569 24_5%
R600 24_5%
22_5%
22_5%
12
12
22_5%
12
12
12
12
12
24_5%
12
12
24_5%R184
12
24_5%R186
12
24_5%R185
1
2
24_5%R187
12
2
1
2
1
12
12
12
12
12
24_5%R568
24_5%R601
19-
PCISTOP#_3
19-
CPUSTOP#_3
5-
CLK_R_CPUBCLK
5-
CLK_R_CPUBCLK#
11-
CLK_R_MCHBCLK
11-
CLK_R_MCHBCLK#
9-
MCH_CLK_REQ#
35-
CLK_REQD#
9-
CLK_R_PEG_MCH
9-
CLK_R_PEG_MCH#
35-
CLK_R_PCIE_CARD
35-
CLK_R_PCIE_CARD#
19-
CLK_R_PCIE_ICH
19-
CLK_R_PCIE_ICH#
18-
CLK_R_SATA1
18-
CLK_R_SATA1#
37-
CLK_R_PCIE_MINI1
37-
CLK_R_PCIE_MINI1#
37-
CLK_R_PCIE_MINI2
37-
CLK_R_PCIE_MINI2#
27-
CLK_R_PCIE_LAN
27-
CLK_R_PCIE_LAN#
9-
SSCLK_R_DREF
9-
SSCLK_R_DREF#
9-
CLK_R_DREF
9-
CLK_R_DREF#
BSEL0
FSA
BSEL1
FSB
1 0 0
1 1 0
BSEL2
FSC
FSB CLOCK
FREQUENCY
533
667
HOST CLOCK
FREQUENCY
133
166
SRCCLK7
CLKREQA#
CLKREQB#
CLKREQC#
CLKREQD#
INTERNAL PULL UP: PIN 1, 64, 63, 62, 44, 45
INTERNAL PULL DOWN: PIN7
SRCCLK8
X
SRCCLK6
X
X
SRCCLK5
X
SRCCLK4
X
SRCCLK3 SRCCLK2
X
X
SRCCLK1
X
CHANGE by
SRCCLK0
X
Su Chun-Chi 22-Nov-2005
INVENTEC
TITLE
MW14-6.0
CLOCK_GENERATOR
CODE
SIZE DOC. NUMBER
A3
LC5183 X01
CS
SHEET
OF
REV
634
H_A#(31:3)
http://hobi-elektronika.net
H_STPCLK#
11-
H_A#(3)
H_A#(4)
H_A#(5)
H_A#(6)
H_A#(7)
H_A#(8)
H_A#(9)
H_A#(10)
H_A#(11)
H_A#(12)
H_A#(13)
H_A#(14)
H_A#(15)
H_A#(16)
H_REQ#(4:0) H_RS#(0:2)
H_A#(17)
H_A#(18)
H_A#(19)
H_A#(20)
H_A#(21)
H_A#(22)
H_A#(23)
H_A#(24)
H_A#(25)
H_A#(26)
H_A#(27)
H_A#(28)
H_A#(29)
H_A#(30)
H_A#(31)
18-
H_A20M#
18-
H_FERR#
18- 18-,9-
H_IGNNE#
1818-
H_INTR
18-
H_NMI
18-
H_SMI#
11-
H_REQ#(0)
H_REQ#(1)
H_REQ#(2)
H_REQ#(3)
H_REQ#(4)
H_ADSTB#0
H_ADSTB#1
11-
11-
CN7-1
J4
A3#
L4
A4#
M3
A5#
K5
A6#
M1
A7#
N2
A8#
J1
A9#
N3
A10#
P5
A11#
P2
A12#
L1
A13#
P4
A14#
P1
A15#
R1
A16#
L2
K3
H2
K2
L5
Y2
U5
R3
W6
U4
Y5
U2
R4
T5
T3
W3
W5
Y4
W2
Y1
V4
A6
A5
C4
D5
C6
B4
A3
AA1
AA4
AB2
AA3
M4
N5
T2
V3
B2
C3
B25
ADDR GROUP 0ADDR GROUP 1
ADSTB0#
REQ0#
REQ1#
REQ2#
J3
REQ3#
REQ4#
A17#
A18#
A19#
A20#
A21#
A22#
A23#
A24#
A25#
A26#
A27#
A28#
A29#
A30#
A31#
ADSTB1#
A20M#
FERR#
IGNNE#
STPCLK#
LINT0
LINT1
SMI#
RSVD01
RSVD02
RSVD03
RSVD04
RSVD05
RSVD06
RSVD07
RSVD08
RSVD09
RSVD10
RSVD11
MLX_YONAH_SOCKET_M478A_478P
DEFER#
CONTROL
RESET#
XDP/ITP SIGNALS
PROCHOT#
THERMDA
THERMDC
THERM
THERMTRIP#
H CLK
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RESERVED
RSVD17
RSVD18
RSVD19
RSVD20
ADS#
BNR#
BPRI#
DRDY#
DBSY#
BR0#
IERR#
INIT#
LOCK#
RS0#
RS1#
RS2#
TRDY#
HITM#
BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#
TRST#
DBR#
BCLK0
BCLK1
H1
E2
G5
H5
F21
E1
F1
D20
B3
H4
B1
F3
F4
G3
G2
G6
HIT#
E4
AD4
AD3
AD1
AC4
AC2
AC1
AC5
TCK
AA6
TDI
AB3
TDO
AB5
TMS
AB6
C20
D21
A24
A25
C7
A22
A21
T22
D2
F6
D3
C1
AF1
D22
C23
C24
R543
56_5%
48-,21-,18-,14-,13-,11-,7-,6-,4-,5-
12
10mils/10mils
CPU
+VCCP
GMCH
39-
H_THERMDA
39-
H_THERMDC
PM_THRMTRIP#
4-
CLK_R_CPUBCLK
4-
CLK_R_CPUBCLK#
111111-
111111-
11-
18-
11-
11-
11-
1111-
ICH7
H_ADS#
H_BNR#
H_BPRI#
H_DEFER#
H_DRDY#
H_DBSY#
H_BREQ#0
H_INIT#
H_LOCK#
H_CPURST#
H_TRDY#
H_HIT#
H_HITM#
H_RS#(0)
H_RS#(1)
H_RS#(2)
1
R516
56_5%
2
+VCCP
+VCCP
48-,21-,18-,14-,13-,11-,7-,6-,4-,5-
1
R542
56_5%
2
CLOSED TO CPU
11-
+V3S
49-,47-,45-,42-,40-,39-,38-,37-,36-,35-,34-,32-,31-,30-,27-,25-,24-,23-,21-,20-,19-,18-,16-,15-,13-,10-,9-,4-
1
R192
240_5%
2
1
R515
56_5%
2
1
R518
56_5%
2
+VCCP
48-,21-,18-,14-,13-,11-,7-,6-,4-,5-
1
1
R520
R517
56_5%
56_5%
2
2
19-
H_BPM5_PREQ#
H_TCK
TDI_FLEX
H_TMS
H_TRST#
ITP_DBRESET#
PM_THRMTRIP# should be without T at CPU
CHANGE by
Su Chun-Chi
7-Nov-2005
INVENTEC
TITLE
MW14-6.0
YONAH -1
SIZE
CODE
DOC. NUMBER
A3
LC5183 X01
CS
SHEET
REV
OF
635
+VCCP
http://hobi-elektronika.net
48-,21-,18-,14-,13-,11-,7-,5-,4-
1
R125
1K_1%
2
1
R126
2K_1%
2
H_D#(63:0)
H_DSTBN#0
H_DSTBP#0
H_DINV#0
H_D#(63:0)
11-,6-
111111-
11-,6-
H_DSTBN#1
H_DSTBP#1
H_GTLREF
CLEARANCE 20 MILS
55 OHM
CLOSED TO CPU WITHIN 0.5"
H_D#(0)
H_D#(1)
H_D#(2)
H_D#(3)
H_D#(4)
H_D#(5)
H_D#(6)
H_D#(7)
H_D#(8)
H_D#(9)
H_D#(10)
H_D#(11)
H_D#(12)
H_D#(13)
H_D#(14)
H_D#(15)
H_D#(16)
H_D#(17)
H_D#(18)
H_D#(19)
H_D#(20)
H_D#(21)
H_D#(22)
H_D#(23)
H_D#(24)
H_D#(25)
H_D#(26)
H_D#(27)
H_D#(28)
H_D#(29)
H_D#(30)
H_D#(31)
H_DINV#1
CN7-2
E22
D0#
F24
D1#
E26
D2#
H22
D3#
F23
D4#
G25
D5#
E25
D6#
E23
D7#
K24
D8#
G24
D9#
J24
D10#
J23
D11#
H26
D12#
DATA GRP 0DATA GRP 1
F26
D13#
K22
D14#
H25
D15#
H23
DSTBN0#
G22
DSTBP0#
J26
DINV0#
N22
D16#
K25
D17#
P26
D18#
R23
D19#
L25
D20#
L22
D21#
L23
D22#
M23
D23#
P25
D24#
P22
D25#
P23
D26#
T24
D27#
R24
D28#
L26
D29#
T25
D30#
N24
111111-
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2 PSI#
9-,49-,49-,4-
1
1
R129
R130
51_5%
OPEN
2
2
D31#
M24
DSTBN1#
N25
DSTBP1#
M26
DINV1#
AD26
GTLREF
C26
TEST1
D25
B22
B23
C21
MLX_YONAH_SOCKET_M478A_478P
TEST2
BSEL0
BSEL1
BSEL2
MISC
D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
DATA GRP 2DATA GRP 3
D45#
D46#
D47#
DSTBN2#
DSTBP2#
DINV2#
D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#
DSTBN3#
DSTBP3#
DINV3#
COMP0
COMP1
COMP2
COMP3
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
AA23
AB24
V24
V26
W25
U23
U25
U22
AB25
W22
Y23
AA26
Y26
Y22
AC26
AA24
W24
Y25
V23
AC22
AC23
AB22
AA21
AB21
AC25
AD20
AE22
AF23
AD24
AE21
AD21
AE25
AF25
AF22
AF26
AD23
AE24
AC20
R26
U26
U1
V1
E5
B5
D24
D6
D7
AE6
CLOSED TO CPU
COM0, COM2, trace impedance
NOTE:
should be 27.4 ohm
COM1, COM3, trace impedance
should be 55 ohm
H_D#(48)
H_D#(49)
H_D#(50)
H_D#(51)
H_D#(52)
H_D#(53)
H_D#(54)
H_D#(55)
H_D#(56)
H_D#(57)
H_D#(58)
H_D#(59)
H_D#(60)
H_D#(61)
H_D#(62)
H_D#(63)
111111-
12
R128 27.4_1%
12
54.9_1%R127
12
R521 27.4_1%
12
54.9_1%R519
45-,18-
181118-
18-,11-
45-
H_D#(32)
H_D#(33)
H_D#(34)
H_D#(35)
H_D#(36)
H_D#(37)
H_D#(38)
H_D#(39)
H_D#(40)
H_D#(41)
H_D#(42)
H_D#(43)
H_D#(44)
H_D#(45)
H_D#(46)
H_D#(47)
H_DSTBN#3
H_DSTBP#3
H_DINV#3
H_DPRSTP#
H_DPSLP#
H_DPWR#
H_PWRGD
H_CPUSLP#
11-,6-
11-,6-
111111-
H_D#(63:0)
H_DSTBN#2
H_DSTBP#2
H_DINV#2
H_D#(63:0)
CHANGE by
INVENTEC
TITLE
MW14-6.0
YONAH-2
SIZE DOC. NUMBER
CODE
A3
CS
7-Nov-2005Su Chun-Chi
SHEET
663
REV
X01LC5183
OF
PLACE THESE INSIDE SOCKET
http://hobi-elektronika.net
CAVITY ON L8 (NORTH SIDE
SECONDARY)
PLACE THESE INSIDE SOCKET
CAVITY ON L8 (SOUTH SIDE
SECONDARY)
PLACE THESE INSIDE SOCKET
CAVITY ON L1 (NORTH SIDE
PRIMARY)
PLACE THESE INSIDE SOCKET
CAVITY ON L1 (SOUTH SIDE
PRIMARY)
1
2
1
2
1
2
1
2
1
2
1
2
1
2
C174
22uF_6.3v
C562
22uF_6.3v
C178
22uF_6.3v
C560
22uF_6.3v
C182
OPEN
C124
OPEN
C179
OPEN
1
1
2
1
2
1
2
1
2
1
2
1
2
C519
22uF_6.3v
C521
22uF_6.3v
C553
22uF_6.3v
C566
22uF_6.3v
C123
OPEN
C125
OPEN
C177
OPEN
1
2
1
2
1
2
1
2
1
2
1
2
1
2
C180
22uF_6.3v
C554
22uF_6.3v
C556
22uF_6.3v
C563
22uF_6.3v
C122
OPEN
C183
OPEN
C175
OPEN
1
22
1
2
1
2
1
2
1
2
1
2
1
2
C126
22uF_6.3v
22uF_6.3v
C565
22uF_6.3v
22uF_6.3v
C561
22uF_6.3v
22uF_6.3v
C558
22uF_6.3v
22uF_6.3v
C121
OPEN
C181
OPEN
C172
OPEN
1
2
1
2
1
2
1
2
NOTE:
NO_STUFF
22UF X 12
+VCC_CORE
45-,7-
C557
C555
C173
C176
CN7-3
A7
VCC001
A9
VCC002
A10
VCC003
A12
VCC004
A13
VCC005
A15
VCC006
A17
VCC007
A18
VCC008
A20
VCC009
B7
VCC010
B9
VCC011
B10
VCC012
B12
VCC013
B14
VCC014
B15
VCC015
B17
VCC016
B18
VCC017
B20
VCC018
C9
VCC019
C10
VCC020
C12
VCC021
C13
VCC022
C15
VCC023
C17
VCC024
C18
VCC025
D9
VCC026
D10
VCC027
D12
VCC028
D14
VCC029
D15
VCC030
D17
VCC031
D18
VCC032
E7
VCC033
E9
VCC034
E10
VCC035
E12
VCC036
E13
VCC037
E15
VCC038
E17
VCC039
E18
VCC040
E20
VCC041
F7
VCC042
F9
VCC043
F10
VCC044
F12
VCC045
F14
VCC046
F15
VCC047
F17
VCC048
F18
VCC049
F20
VCC050
AA7
VCC051
AA9
VCC052
AA10
VCC053
AA12
VCC054
AA13
VCC055
AA15
VCC056
AA17
VCC057
AA18
VCC058
AA20
VCC059
AB9
VCC060
AC10
VCC061
AB10
VCC062
AB12
VCC063
AB14
VCC064
AB15
VCC065
AB17
VCC066
AB18
VCC067
MLX_YONAH_SOCKET_M478A_478P
VCC068
VCC069
VCC070
VCC071
VCC072
VCC073
VCC074
VCC075
VCC076
VCC077
VCC078
VCC079
VCC080
VCC081
VCC082
VCC083
VCC084
VCC085
VCC086
VCC087
VCC088
VCC089
VCC090
VCC091
VCC092
VCC093
VCC094
VCC095
VCC096
VCC097
VCC098
VCC099
VCC0100
VCCP01
VCCP02
VCCP03
VCCP04
VCCP05
VCCP06
VCCP07
VCCP08
VCCP09
VCCP10
VCCP11
VCCP12
VCCP13
VCCP14
VCCP15
VCCP16
VCCA
VCCSENSE
VSSSENSE
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
V6
G21
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
AD6
VID0
AF5
VID1
AE5
VID2
AF4
VID3
AE3
VID4
AF2
VID5
AE2
VID6
AF7
AE7
+VCC_CORE
45-,7-
+VCCP
48-,21-,18-,14-,13-,11-,6-,5-,4-
1
1
C217
2
2
330uF_2.5v
45-
H_VID0
45-
H_VID1
4545454545-
R514
100_1%
+VCC_CORE
H_VID2
H_VID3
H_VID4
H_VID5
H_VID6
45-
VSSSENSE
LAYOUT NOTE:
1
ROUTE VCCSENSE AND VSSSENSE TRACE AT
27.4 OHM WITH 50 MIL SPACING.
PLACE PU AND PD WITHIN 1 INCH OF CPU
2
C552
0.1uF_10v
45-,7-
1
2
1
2
R513
100_1%
45-
C520
0.1uF_10v
VCCSENSE
PLACE THESE INSIDE SOCKET
CAVITY ON L8 SIDE (NORTH SIDE
SECONDARY)
C559
C523
1
1
2
0.1uF_10v
2
0.1uF_10v
1
2
+V1.5S
47-,37-,35-,30-,21-,14-,13-
C219
1
2
10uF_6.3v
LAYOUT NOTE:
PLACE C119 NEAR PIN B26
C564
0.1uF_10v
C220
1
2
0.01uF_16v
C522
1
2
0.1uF_10v
CHANGE by
INVENTEC
TITLE
MW14-6.0
YONAH-3
CODE
SIZE
7-Nov-2005Su Chun-Chi
A3
CS
SHEET
DOC. NUMBER
7
REV
X01LC5183
OF
63
CN7-4
http://hobi-elektronika.net
A4
VSS001
A8
VSS002
A11
VSS003
A14
VSS004
A16
VSS005
A19
VSS006
A23
VSS007
A26
VSS008
B6
VSS009
B8
VSS010
B11
VSS011
B13
VSS012
B16
VSS013
B19
VSS014
B21
VSS015
B24
VSS016
C5
VSS017
C8
VSS018
C11
VSS019
C14
VSS020
C16
VSS021
C19
VSS022
C2
VSS023
C22
VSS024
C25
VSS025
D1
VSS026
D4
VSS027
D8
VSS028
D11
VSS029
D13
VSS030
D16
VSS031
D19
VSS032
D23
VSS033
D26
VSS034
E3
VSS035
E6
VSS036
E8
VSS037
E11
VSS038
E14
VSS039
E16
VSS040
E19
VSS041
E21
VSS042
E24
VSS043
F5
VSS044
F8
VSS045
F11
VSS046
F13
VSS047
F16
VSS048
F19
VSS049
F2
VSS050
F22
VSS051
F25
VSS052
G4
VSS053
G1
VSS054
G23
VSS055
G26
VSS056
H3
VSS057
H6
VSS058
H21
VSS059
H24
VSS060
J2
VSS061
J5
VSS062
J22
VSS063
J25
VSS064
K1
VSS065
K4
VSS066
K23
VSS067
K26
VSS068
L3
VSS069
L6
VSS070
L21
VSS071
L24
VSS072
M2
VSS073
M5
VSS074
M22
VSS075
M25
VSS076
N1
VSS077
N4
VSS078
N23
VSS079
N26
VSS080
P3
VSS081
MLX_YONAH_SOCKET_M478A_478P
VSS082
VSS083
VSS084
VSS085
VSS086
VSS087
VSS088
VSS089
VSS090
VSS091
VSS092
VSS093
VSS094
VSS095
VSS096
VSS097
VSS098
VSS099
VSS0100
VSS0101
VSS0102
VSS0103
VSS0104
VSS0105
VSS0106
VSS0107
VSS0108
VSS0109
VSS0110
VSS0111
VSS0112
VSS0113
VSS0114
VSS0115
VSS0116
VSS0117
VSS0118
VSS0119
VSS0120
VSS0121
VSS0122
VSS0123
VSS0124
VSS0125
VSS0126
VSS0127
VSS0128
VSS0129
VSS0130
VSS0131
VSS0132
VSS0133
VSS0134
VSS0135
VSS0136
VSS0137
VSS0138
VSS0139
VSS0140
VSS0141
VSS0142
VSS0143
VSS0144
VSS0145
VSS0146
VSS0147
VSS0148
VSS0149
VSS0150
VSS0151
VSS0152
VSS0153
VSS0154
VSS0155
VSS0156
VSS0157
VSS0158
VSS0159
VSS0160
VSS0161
VSS0162
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
AF3
AF6
AF8
AF11
AF13
AF16
AF19
AF21
AF24
Su Chun-Chi 7-Nov-2005
INVENTEC
TITLE
MW14-6.0
YONAH-4
SIZE
A3
DOC. NUMBER
LC5183 X01
CS
SHEET OFCHANGE by
REVCODE
638
MCH_CFG(18)
http://hobi-elektronika.net
MCH_CFG(19)
MCH_CFG(20)
MCH_CFG(12)
MCH_CFG(13)
MCH_CFG(16)
MCH_CFG(11)
MCH_CFG(10)
MCH_CFG(9)
MCH_CFG(7)
MCH_CFG(6)
MCH_CFG(5)
49-,47-,45-,42-,40-,39-,38-,37-,36-,35-,34-,32-,31-,30-,27-,25-,24-,23-,21-,20-,19-,18-,16-,15-,13-,10-,5-,4-,9-
9-
9-
9-
+V3S
1
R533
OPEN
2
1
R537
OPEN
2
1
2
R530
OPEN
CFG(18:20) HAS INTERNAL PULL DOWN
999999999-
1
R548
OPEN
2
1
R544
OPEN
2
1
R545
OPEN
2
1
R550
OPEN
2
1
R547
OPEN
2
1
R546
OPEN
2
1
R549
OPEN
2
1
R555
OPEN
2
PM_EXTTS#0
PM_DPRSLPVR
1
R551
OPEN
2
16-,1545-,19-
R527
R535
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
MCH_CFG(20:3)
R534
OPEN
12
0_5%
12
0_5%
MCH_ICH_SYNC#
MCH_CLK_REQ#
6-,46-,46-,4-
+V3S
1
R528
10K_5%
2
PM_THRMTRIP#
PM_PWROK
PLT_RST#
9-
1
2
BM_BUSY#
R553
R556
1
1
2
2
1K_5%
1K_5%
MCH_CFG(3)
MCH_CFG(4)
MCH_CFG(5)
MCH_CFG(6)
MCH_CFG(7)
MCH_CFG(8)
MCH_CFG(9)
MCH_CFG(10)
MCH_CFG(11)
MCH_CFG(12)
MCH_CFG(13)
MCH_CFG(14)
MCH_CFG(15)
MCH_CFG(16)
MCH_CFG(17)
MCH_CFG(18)
MCH_CFG(19)
MCH_CFG(20)
18-,545-,1930-,25-,20-
100_5%
204-
U8-2
T32
RSVD_1
R32
RSVD_2
F3
RSVD_3
F7
RSVD_4
AG11
RSVD_5
AF11
RSVD_6
H7
RSVD_7
J19
RSVD_8
A41
RSVD_9
A35
RSVD_10
A34
RSVD_11
RSVD_12
RSVD_13
CFG_0
CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15
CFG_16
CFG_17
CFG_18
CFG_19
CFG_20
PM_BMBUSY#
PM_EXTTS#_0
PM_EXTTS#_1
PM_THRMTRIP#
PWROK
RSTIN#
SDVO_CTRLCLK
SDVO_CTRLDATA
ICH_SYNC#
CLK_REQ#
NC0
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
RSVDCFG
NC
D28
R557
1
D27
2
1K_5%
K16
K18
J18
F18
E15
F15
E18
D19
D16
G16
E16
D15
G15
K15
C15
H16
G18
H15
J25
K27
J26
19-
G28
F25
H26
G6
AH33
2
1
AH34
R141
H28
H27
K28
H32
D1
C41
C1
BA41
BA40
BA39
BA3
BA2
BA1
B41
B2
AY41
AY1
AW41
AW1
A40
A4
A39
A3
ITL_CALISTOGA_MICRO_FCBGA_BU3_1466P
SM_CK_0
SM_CK_1
SM_CK_2
SM_CK_3
SM_CK#_0
SM_CK#_1
SM_CK#_2
SM_CK#_3
SM_CKE_0
SM_CKE_1
SM_CKE_2
SM_CKE_3
SM_CS#_0
SM_CS#_1
DDR MUXING
SM_CS#_2
SM_CS#_3
SM_OCDCOMP_0
SM_OCDCOMP_1
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
SM_RCOMP#
SM_RCOMP
SM_VREF_0
SM_VREF_1
G_CLKIN#
G_CLKIN
D_REFCLKIN#
D_REFCLKIN
D_REFSSCLKIN#
CLK
D_REFSSCLKIN
PM
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
MISC
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
AY35
AR1
AW7
AW40
AW35
AT1
AY7
AY40
AU20
AT20
BA29
AY29
AW13
AW12
AY21
AW21
AL20
AF10
BA13
BA12
AY20
AU21
AV9
AT9
AK1
AK41
AF33
AG33
A27
A26
C40
D41
AE35
AF39
AG35
AH39
AC35
AE39
AF35
AG39
AE37
AF41
AG37
AH41
AC37
AE41
AF37
AG41
15151616-
15151616-
17-,1517-,1517-,1617-,16-
17-,1517-,1517-,1617-,16-
17-,1517-,1517-,1617-,16-
MCH_SMRCOMPN
444444-
DMI_TXN(0)
DMI_TXN(1)
DMI_TXN(2)
DMI_TXN(3)
DMI_TXP(0)
DMI_TXP(1)
DMI_TXP(2)
DMI_TXP(3)
DMI_RXN(0)
DMI_RXN(1)
DMI_RXN(2)
DMI_RXN(3)
DMI_RXP(0)
DMI_RXP(1)
DMI_RXP(2)
DMI_RXP(3)
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR2
M_CLK_DDR3
M_CLK_DDR0#
M_CLK_DDR1#
M_CLK_DDR2#
M_CLK_DDR3#
M_CKE0
M_CKE1
M_CKE2
M_CKE3
M_CS0#
M_CS1#
M_CS2#
M_CS3#
50-,48-,16-,15-,14-
M_ODT0
M_ODT1
M_ODT2
R123
M_ODT3
80.6_1%
CLK_R_PEG_MCH#
CLK_R_PEG_MCH
CLK_R_DREF#
CLK_R_DREF
SSCLK_R_DREF#
SSCLK_R_DREF
19-
19-
19-
19-
+V1.8
1
2
1
2
DMI_TXN(3:0)
DMI_TXP(3:0)
DMI_RXN(3:0)
DMI_RXP(3:0)
M_OCDCOMP1
C114
0.47uF_6.3v
1
2
OPEN
50-,16-,15-
1
R558
2
C100
0.1uF_16v
1
2
R559
OPEN
M_VREF
1
R124
2
80.6_1%
CFG(3:17) HAS INTERNAL PULL UP
MCH_CFG(5)
MCH_CFG(9)
PCIE Graphics
Lane
MCH_CFG(16)
(FSB Dynamic
ODT)
LOW=DMIx2
HIGH=DMIx4
LOW=Reverse Lane
HIGH=Normal operation
LOW=Dynamic ODT
Disable
HIGH=Dynamic ODT
Enabled
MCH_CFG(6)
MCH_CFG(10)
HOST PLL VCO
SELECT
(DDR)
LOW=Moby Dick
HIGH=Calistoga
LOW=RESERVED
HIGH=MOBILITY
MCH_CFG(7)
(CPU Strap)
MCH_CFG(11)
LOW=RSVD
HIGH=Mobile CPU
LOW=Calistoga
HIGH=Reserved
MCH_CFG(18)
(VCC Select)
MCH_CFG(20)
(PCIE Backward
Interpoerability
mode)
LOW=1.05V
HIGH=1.5V
LOW=Only SDVO or PCIE x1 is
operational
HIGH=SDVO and PCIE x1 are operating
simultaneously via the PEG port
MCH_CFG(19)
(DMI LANE
REVERSAL)
LOW=Normal
HIGH=LANES REVERSED
CHANGE by
Su Chun-Chi
7-Nov-2005
INVENTEC
TITLE
MW14-6.0
CALISTOGA-1
DOC. NUMBER
CODE
SIZE
A3
LC5183 X01
CS
SHEET
REV
OF
639
BLUE
http://hobi-elektronika.net
GREEN
RED
LCM_3S_BKLTEN
40-
40-
40-
1
R529
150_1%
2
23-
1
R525
150_1%
2
R526
R62
1.5K_1%
LCM_3S_VDDEN
1
2
LUMA_Y_Y
CHROMA_C_PR
4040-
INV_PWM_3
23-
1
R100
150_1%
2
30-,23-
DDCPDATA
1
R101
150_1%
2
OPEN
DDCPCLK
1
R121
75_1%
2
close to Calistoga
49-,47-,45-,42-,40-,39-,38-,37-,36-,35-,34-,32-,31-,30-,27-,25-,24-,23-,21-,20-,19-,18-,16-,15-,13-,9-,5-,4-,10-
1
R522
150_1%
2
DDCCLK
DDCDATA
+V3S
12
12
2.2K_5%
2.2K_5%
R524
R523
4040-
HSYNC
VSYNC
R532
10K_5%
12
2323-
LVDS_TXCLLVDS_TXCL+
LVDS_TXCU-
LVDS_TXCU+
LVDS_TXDL0LVDS_TXDL1LVDS_TXDL2-
LVDS_TXDL0+
LVDS_TXDL1+
LVDS_TXDL2+
LVDS_TXDU0LVDS_TXDU1-
LVDS_TXDU2-
LVDS_TXDU0+
LVDS_TXDU1+
LVDS_TXDU2+
R536
1
4.99K_1%
40-
40-
+V3S
49-,47-,45-,42-,40-,39-,38-,37-,36-,35-,34-,32-,31-,30-,27-,25-,24-,23-,21-,20-,19-,18-,16-,15-,13-,9-,5-,4-,10-
1
1
R531
10K_5%
2
2
U8-3
D32
L_BKLTCTL
J30
L_BKLTEN
H30
L_CLKCTLA
H29
L_CLKCTLB
G26
L_DDC_CLK
G25
L_DDC_DATA
B38
L_IBG
C35
L_VBG
F32
L_VDDEN
C33
L_VREFH
C32
L_VREFL
23-
A33
LA_CLK#
23-
A32
LA_CLK
2323-
232323-
232323-
232323-
232323-
2
R538
12
255_1%
E27
E26
C37
B35
A37
B37
B34
A36
G30
D30
F29
F30
D29
F28
A16
C18
A19
J20
B16
B18
B19
K30
J29
E23
D23
C22
B22
A21
B21
C26
C25
G23
J22
H23
LB_CLK#
LB_CLK
LA_DATA#_0
LA_DATA#_1
LA_DATA#_2
LA_DATA_0
LA_DATA_1
LA_DATA_2
LB_DATA#_0
LB_DATA#_1
LB_DATA#_2
LB_DATA_0
LB_DATA_1
LB_DATA_2
TV_DACA_OUT
TV_DACB_OUT
TV_DACC_OUT
TV_IREF
TV_IRTNA
TV_IRTNB
TV_IRTNC
TV_DCONSEL0
TV_DCONSEL1
CRT_BLUE
CRT_BLUE#
CRT_GREEN
CRT_GREEN#
CRT_RED
CRT_RED#
CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC
CRT_IREF
CRT_VSYNC
LVDS
TV
VGA
ITL_CALISTOGA_MICRO_FCBGA_BU3_1466P
+V1.5S_PCIE
R59
D40
EXP_A_COMPI
D38
EXP_A_COMPO
F34
EXP_A_RXN_0
G38
EXP_A_RXN_1
H34
EXP_A_RXN_2
J38
EXP_A_RXN_3
L34
EXP_A_RXN_4
M38
EXP_A_RXN_5
N34
EXP_A_RXN_6
P38
EXP_A_RXN_7
R34
EXP_A_RXN_8
T38
EXP_A_RXN_9
V34
EXP_A_RXN_10
W38
EXP_A_RXN_11
Y34
EXP_A_RXN_12
AA38
EXP_A_RXN_13
AB34
EXP_A_RXN_14
AC38
EXP_A_RXN_15
D34
EXP_A_RXP_0
F38
EXP_A_RXP_1
G34
EXP_A_RXP_2
H38
EXP_A_RXP_3
J34
EXP_A_RXP_4
L38
EXP_A_RXP_5
M34
EXP_A_RXP_6
N38
EXP_A_RXP_7
P34
EXP_A_RXP_8
R38
EXP_A_RXP_9
T34
EXP_A_RXP_10
V38
EXP_A_RXP_11
W34
EXP_A_RXP_12
Y38
EXP_A_RXP_13
AA34
EXP_A_RXP_14
AB38
EXP_A_RXP_15
F36
EXP_A_TXN_0
G40
EXP_A_TXN_1
H36
EXP_A_TXN_2
J40
EXP_A_TXN_3
L36
EXP_A_TXN_4
M40
EXP_A_TXN_5
N36
EXP_A_TXN_6
P40
EXP_A_TXN_7
R36
EXP_A_TXN_8
PCI-EXPRESS GRAPHICS
EXP_A_TXN_9
EXP_A_TXN_10
EXP_A_TXN_11
EXP_A_TXN_12
EXP_A_TXN_13
EXP_A_TXN_14
EXP_A_TXN_15
EXP_A_TXP_0
EXP_A_TXP_1
EXP_A_TXP_2
EXP_A_TXP_3
EXP_A_TXP_4
EXP_A_TXP_5
EXP_A_TXP_6
EXP_A_TXP_7
EXP_A_TXP_8
EXP_A_TXP_9
EXP_A_TXP_10
EXP_A_TXP_11
EXP_A_TXP_12
EXP_A_TXP_13
EXP_A_TXP_14
EXP_A_TXP_15
T40
V36
W40
Y36
AA40
AB36
AC40
D36
F40
G36
H40
J36
L40
M36
N40
P36
R40
T36
V40
W36
Y40
AA36
AB40
12
24.9_1%
13-
INVENTEC
TITLE
MW14-6.0
CALISTOGA-2
CODE
CS
DOC. NUMBER
LC5183
SIZE REV
CHANGE by SHEET OF
Su Chun-Chi 11-Nov-2005
A3
X01
6310
12
http://hobi-elektronika.net
11-
MCH_HXSCOMP
MCH_HXRCOMP
MCH_HYSCOMP
MCH_HYRCOMP
MCH_HXSWING
MCH_HYSWING
NOTE:
MCH_HXRCOMP, MCH_HYRCOMP
MCH_HXSWING, MCH_HYSWING
should be 10 mil wide with 20 mil spacing
R122 54.9_1%
12
11-
1
11-
R137 54.9_1%
1
11-
+VCCP
48-,21-,18-,14-,13-,7-,6-,5-,4-,11-
1
R135
221_1%
2
11-
1
R136
100_1%
2
+VCCP
48-,21-,18-,14-,13-,7-,6-,5-,4-,11-
1
R139
221_1%
2
11-
1
R138
100_1%
2
1
2
1
2
24.9_1%R134
2
2
24.9_1%R140
C222
0.1uF_10v
C223
0.1uF_10v
H_D#(63:0)
+VCCP
48-,21-,18-,14-,13-,7-,6-,5-,4-,11-
+VCCP
48-,21-,18-,14-,13-,7-,6-,5-,4-,11-
MCH_HXRCOMP
MCH_HXSCOMP
MCH_HXSWING
MCH_HYRCOMP
MCH_HYSCOMP
MCH_HYSWING
6-
111111-
111111-
H_D#(63:0)
H_D#(0)
H_D#(1)
H_D#(2)
H_D#(3)
H_D#(4)
H_D#(5)
H_D#(6)
H_D#(7)
H_D#(8)
H_D#(9)
H_D#(10)
H_D#(11)
H_D#(12)
H_D#(13)
H_D#(14)
H_D#(15)
H_D#(16)
H_D#(17)
H_D#(18)
H_D#(19)
H_D#(20)
H_D#(21)
H_D#(22)
H_D#(23)
H_D#(24)
H_D#(25)
H_D#(26)
H_D#(27)
H_D#(28)
H_D#(29)
H_D#(30)
H_D#(31)
H_D#(32)
H_D#(33)
H_D#(34)
H_D#(35)
H_D#(36)
H_D#(37)
H_D#(38)
H_D#(39)
H_D#(40)
H_D#(41)
H_D#(42)
H_D#(43)
H_D#(44)
H_D#(45)
H_D#(46)
H_D#(47)
H_D#(48)
H_D#(49)
H_D#(50)
H_D#(51)
H_D#(52)
H_D#(53)
H_D#(54)
H_D#(55)
H_D#(56)
H_D#(57)
H_D#(58)
H_D#(59)
H_D#(60)
H_D#(61)
H_D#(62)
H_D#(63)
Layout notes:
Trace need be 10 mils
CLK_R_MCHBCLK
CLK_R_MCHBCLK#
U8-1
F1
H_D#_0
J1
H_D#_1
H1
H_D#_2
J6
H_D#_3
H3
H_D#_4
K2
H_D#_5
G1
H_D#_6
G2
H_D#_7
K9
H_D#_8
K1
H_D#_9
K7
H_D#_10
J8
H_D#_11
H4
H_D#_12
J3
H_D#_13
K11
H_D#_14
G4
H_D#_15
T10
H_D#_16
W11
H_D#_17
T3
H_D#_18
U7
H_D#_19
U9
H_D#_20
U11
H_D#_21
T11
H_D#_22
W9
H_D#_23
T1
H_D#_24
T8
H_D#_25
T4
H_D#_26
W7
H_D#_27
U5
H_D#_28
T9
H_D#_29
W6
H_D#_30
T5
H_D#_31
AB7
H_D#_32
AA9
H_D#_33
W4
H_D#_34
W3
H_D#_35
Y3
H_D#_36
Y7
H_D#_37
W5
H_D#_38
Y10
H_D#_39
AB8
H_D#_40
W2
H_D#_41
AA4
H_D#_42
AA7
H_D#_43
AA2
H_D#_44
AA6
H_D#_45
AA10
H_D#_46
Y8
H_D#_47
AA1
H_D#_48
AB4
H_D#_49
AC9
H_D#_50
AB11
H_D#_51
AC11
H_D#_52
AB3
H_D#_53
AC2
H_D#_54
AD1
H_D#_55
AD9
H_D#_56
AC1
H_D#_57
AD7
H_D#_58
AC6
H_D#_59
AB5
H_D#_60
AD10
H_D#_61
AD4
H_D#_62
AC8
H_D#_63
E1
H_XRCOMP
E2
H_XSCOMP
E4
H_XSWING
Y1
H_YRCOMP
U1
H_YSCOMP
W1
44-
H_YSWING
AG2
H_CLKIN
AG1
H_CLKIN#
ITL_CALISTOGA_MICRO_FCBGA_BU3_1466P
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
HOST
H_A#_30
H_A#_31
H_ADS#
H_ADSTB#_0
H_ADSTB#_1
H_VREF
H_BNR#
H_BPRI#
H_BREQ#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_VREF
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_HIT#
H_HITM#
H_LOCK#
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
H_RS#_0
H_RS#_1
H_RS#_2
H_SLPCPU#
H_TRDY#
H9
C9
E11
G11
F11
G12
F9
H11
J12
G14
D9
J14
H13
J15
F14
D12
A11
C11
A12
A13
E13
G13
F12
B12
B14
C12
A14
C14
D14
E8
B9
C13
J13
C6
F6
C7
B7
A7
C3
J9
H8
K13
J7
W8
U3
AB10
K4
T7
Y5
AC4
K3
T6
AA5
AC5
D3
D4
B3
D8
G8
B8
F8
A8
B4
E6
D6
E3
E7
H_VREF
H_VREF
H_A#(3)
H_A#(4)
H_A#(5)
H_A#(6)
H_A#(7)
H_A#(8)
H_A#(9)
H_A#(10)
H_A#(11)
H_A#(12)
H_A#(13)
H_A#(14)
H_A#(15)
H_A#(16)
H_A#(17)
H_A#(18)
H_A#(19)
H_A#(20)
H_A#(21)
H_A#(22)
H_A#(23)
H_A#(24)
H_A#(25)
H_A#(26)
H_A#(27)
H_A#(28)
H_A#(29)
H_A#(30)
H_A#(31)
18-,6-
555-
55555565-
6666-
6666-
6666-
55-
5-
H_REQ#(0)
H_REQ#(1)
H_REQ#(2)
H_REQ#(3)
H_REQ#(4)
5-
5-
H_ADS#
H_ADSTB#0
H_ADSTB#1
H_BNR#
H_BPRI#
H_BREQ#0
H_CPURST#
H_DBSY#
H_DEFER#
H_DPWR#
H_DRDY#
H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3
H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3
H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3
H_HIT#
H_HITM#
H_LOCK#
H_RS#(0)
H_RS#(1)
H_RS#(2)
H_CPUSLP#
H_TRDY#
H_A#(31:3)
C572
1
2
0.1uF_10v
+VCCP
48-,21-,18-,14-,13-,7-,6-,5-,4-,11-
1
R554
100_1%
2
1
R552
200_1%
2
5-
H_REQ#(4:0)
5-
H_RS#(2:0)
LAYOUT NOTE:
Place DELIEVER R close to MCH within 100 mil
CHANGE by
Su Chun-Chi
7-Nov-2005
INVENTEC
TITLE
MW14-6.0
CALISTOGA-3
CODE
SIZE
A3
DOC. NUMBER
LC5183 X01
CS
SHEET
REV
OF
6311
MA_DATA(63:0)
http://hobi-elektronika.net
15-
U8-4
AJ35
SA_DQ0
AJ34
SA_DQ1
AM31
SA_DQ2
AM33
SA_DQ3
AJ36
SA_DQ4
AK35
SA_DQ5
AJ32
SA_DQ6
AH31
SA_DQ7
AN35
SA_DQ8
AP33
SA_DQ9
AR31
SA_DQ10
AP31
SA_DQ11
AN38
SA_DQ12
AM36
SA_DQ13
AM34
SA_DQ14
AN33
SA_DQ15
AK26
SA_DQ16
AL27
SA_DQ17
AM26
SA_DQ18
AN24
SA_DQ19
AK28
SA_DQ20
AL28
SA_DQ21
AM24
SA_DQ22
AP26
SA_DQ23
AP23
SA_DQ24
AL22
SA_DQ25
AP21
SA_DQ26
AN20
SA_DQ27
AL23
SA_DQ28
AP24
SA_DQ29
AP20
SA_DQ30
AT21
SA_DQ31
AR12
SA_DQ32
AR14
SA_DQ33
AP13
SA_DQ34
AP12
SA_DQ35
AT13
SA_DQ36
AT12
SA_DQ37
AL14
SA_DQ38
AL12
SA_DQ39
AK9
SA_DQ40
AN7
SA_DQ41
AK8
SA_DQ42
AK7
SA_DQ43
AP9
SA_DQ44
AN9
SA_DQ45
AT5
SA_DQ46
AL5
SA_DQ47
AY2
SA_DQ48
AW2
SA_DQ49
AP1
SA_DQ50
AN2
SA_DQ51
AV2
SA_DQ52
AT3
SA_DQ53
AN1
SA_DQ54
AL2
SA_DQ55
AG7
SA_DQ56
AF9
SA_DQ57
AG4
SA_DQ58
AF6
SA_DQ59
AG9
SA_DQ60
AH6
SA_DQ61
AF4
SA_DQ62
AF8
SA_DQ63
ITL_CALISTOGA_MICRO_FCBGA_BU3_1466P
DDR SYSTEM MEMORY A
SA_RCVENOUT#
SA_BS_0
SA_BS_1
SA_BS_2
SA_CAS#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_RAS#
SA_RCVENIN#
SA_WE#
AU12
AV14
BA20
AY13
AJ33
AM35
AL26
AN22
AM14
AL9
AR3
AH4
AK33
AT33
AN28
AM22
AN12
AN8
AP3
AG5
AK32
AU33
AN27
AM21
AM12
AL8
AN3
AH5
AY16
AU14
AW16
BA16
BA17
AU16
AV17
AU17
AW17
AT16
AU13
AT17
AV20
AV12
AW14
AK23
AK24
AY14
17-,15-
TP7002
TP7000
MA_CAS#
MB_DATA(63:0)
17-,15-
MA_BS0#
17-,15-
MA_BS1#
17-,15-
MA_BS2#
15-
MA_DM(7:0)
15-
MA_DQS(7:0)
15-
MA_DQS#(7:0)
17-,15-
MA_A(13:0) MB_A(13:0)
17-,15-
MA_RAS#
17-,15-
MA_WE#
16-
U8-5
AK39
SB_DQ0
AJ37
SB_DQ1
AP39
SB_DQ2
AR41
SB_DQ3
AJ38
SB_DQ4
AK38
SB_DQ5
AN41
SB_DQ6
AP41
SB_DQ7
AT40
SB_DQ8
AV41
SB_DQ9
AU38
SB_DQ10
AV38
SB_DQ11
AP38
SB_DQ12
AR40
SB_DQ13
AW38
SB_DQ14
AY38
SB_DQ15
BA38
SB_DQ16
AV36
SB_DQ17
AR36
SB_DQ18
AP36
SB_DQ19
BA36
SB_DQ20
AU36
SB_DQ21
AP35
SB_DQ22
AP34
SB_DQ23
AY33
SB_DQ24
BA33
SB_DQ25
AT31
SB_DQ26
AU29
SB_DQ27
AU31
SB_DQ28
AW31
SB_DQ29
AV29
SB_DQ30
AW29
SB_DQ31
AM19
SB_DQ32
AL19
SB_DQ33
AP14
SB_DQ34
AN14
SB_DQ35
AN17
SB_DQ36
AM16
SB_DQ37
AP15
SB_DQ38
AL15
SB_DQ39
AJ11
SB_DQ40
AH10
SB_DQ41
AJ9
SB_DQ42
AN10
SB_DQ43
AK13
SB_DQ44
AH11
SB_DQ45
AK10
SB_DQ46
AJ8
SB_DQ47
BA10
SB_DQ48
AW10
SB_DQ49
BA4
SB_DQ50
AW4
SB_DQ51
AY10
SB_DQ52
AY9
SB_DQ53
AW5
SB_DQ54
AY5
SB_DQ55
AV4
SB_DQ56
AR5
SB_DQ57
AK4
SB_DQ58
AK3
SB_DQ59
AT4
SB_DQ60
AK5
SB_DQ61
AJ5
SB_DQ62
AJ3
SB_DQ63
ITL_CALISTOGA_MICRO_FCBGA_BU3_1466P
DDR SYSTEM MEMORY B
SB_RCVENOUT#
SB_BS_0
SB_BS_1
SB_BS_2
SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_RAS#
SB_RCVENIN#
SB_WE#
AT24
AV23
AY28
AR24
AK36
AR38
AT36
BA31
AL17
AH8
BA5
AN4
AM39
AT39
AU35
AR29
AR16
AR10
AR7
AN5
AM40
AU39
AT35
AP29
AP16
AT10
AT7
AP5
AY23
AW24
AY24
AR28
AT27
AT28
AU27
AV28
AV27
AW27
AV24
BA27
AY27
AR23
AU23
AK16
AK18
AR27
TP7003
TP7001
17-,16-
MB_CAS#
17-,16-
17-,16-
17-,16-
17-,1617-,1617-,16-
16-
16-
16-
MB_BS0#
MB_BS1#
MB_BS2#
MB_DM(7:0)
MB_DQS(7:0)
MB_DQS#(7:0)
MB_RAS#
MB_WE#
INVENTEC
TITLE
MW14-6.0
CALISTOGA-4
SIZEOFCODE DOC. NUMBER REV
A3
CHANGE by SHEET
Su Chun-Chi
11-Nov-2005
CS
12 63
X01LC5183
47-,37-,35-,30-,21-,14-,7-,13-
http://hobi-elektronika.net
+V1.5S
+V2.5S
47-,13-
R58
2
1
10_5%
L11
12
BLM18PG181SN1J
47-,37-,35-,30-,21-,14-,7-,13-
+V1.5S
NFM60R30T222
L7
12
3
4
+V3S
R57
12
49-,47-,45-,42-,40-,39-,38-,37-,36-,35-,34-,32-,31-,30-,27-,25-,24-,23-,21-,20-,19-,18-,16-,15-,10-,9-,5-,4-,13-
10_5%
L10
12
BLM18PG181SN1J
+VCCP
D10
13
CHENMKO_BAT54_3P
1
2
220uF_4v
1
1
C130
2
2
470uF_2.5v
47-,37-,35-,30-,21-,14-,7-,13-
D9
13
CHENMKO_BAT54_3P
near E20
C187
1
2
10uF_6.3v
0.1uF_10v
L8
1
ICB_1206_3.0A
220uF_2.5v
48-,21-,18-,14-,11-,7-,6-,5-,4-,13-
47-,37-,35-,30-,21-,14-,7-,13-
1
C186
2
0.022uF_16v
C529
C225
1
2
0.1uF_16v
0.1uF_16v
+V1.5S
near C20 near E19
C569
1
1
2
2
0.1uF_10v
47-,37-,35-,30-,21-,14-,7-,13-
2
C109
C135
C528
1
2
0.1uF_16v
C568
1
2
0.1uF_10v
+V1.5S
BLM18PG181SN1J
1
2
+V1.5S
C188
1
2
1uF_10v
near H20
C570
C571
1
2
0.1uF_10v
L12
12
1
2
L504
1
BLM11A121S
R102
12
0.5_1%
C110
10uF_6.3v
NOTE:
10UF CAPS USED IN
+V1.5S_3GPLL SHOULD
SHOULD BEPLACED
IN CAVITY
2
1
2
47-,37-,35-,30-,21-,14-,7-,13-
+V1.5S
C185
0.022uF_16v
C189
1
2
0.022uF_16v
+V2.5S
NOTE:
CAPS USED IN +V1.5S_PCIE
SHOULD BE WITHIN ON TOP
LAYER
1
2
C111
10uF_6.3v
1
2
C113
0.1uF_10v
1
2
C112
0.1uF_10v
+V2.5S
C539
10uF_6.3v
1
2
+V1.5S_3GPLL
C541
1
2
0.1uF_10v
+V2.5S
47-,13-
1
2
+V1.5S
0.1uF_10v
C587
0.1uF_10v
1
2
1
C527
2
0.1uF_10v
C132
L508
BLM11A121S
12
1
C586
2
22uF_6.3v
47-,37-,35-,30-,21-,14-,7-,13-
1
C184
2
0.1uF_10v
+V3S
49-,47-,45-,42-,40-,39-,38-,37-,36-,35-,34-,32-,31-,30-,27-,25-,24-,23-,21-,20-,19-,18-,16-,15-,10-,9-,5-,4-,13-
C525
1
2
10uF_6.3v
1
C190
0.1uF_10v
2
47-,37-,35-,30-,21-,14-,7-,13-
0.1uF_10v
+V1.5S_PCIE
47-,13-
C131
10uF_6.3v
+V1.5S
C578
10-
1
2
1
2
+V2.5S
C133
1
2
0.1uF_16v
0.1uF_10v
47-,13-
1
2
C526
0.1uF_16v
C134
1
0.01uF_16v
2
C579
1
2
47-,13-
C530
1
2
0.1uF_16v
U8-8
H22
VCCSYNC
C30
VCC_TXLVDS0
B30
VCC_TXLVDS1
A30
VCC_TXLVDS2
AJ41
VCC3G0
AB41
VCC3G1
Y41
VCC3G2
V41
VCC3G3
R41
VCC3G4
N41
VCC3G5
L41
VCC3G6
AC33
VCCA_3GPLL
G41
VCCA_3GBG
H41
VSSA_3GBG
F21
VCCA_CRTDAC0
E21
VCCA_CRTDAC1
G21
VSSA_CRTDAC
B26
VCCA_DPLLA
C39
VCCA_DPLLB
AF1
VCCA_HPLL
A38
VCCA_LVDS
B39
VSSA_LVDS
AF2
VCCA_MPLL
H20
VCCA_TVBG
G20
VSSA_TVBG
E19
VCCA_TVDACA0
F19
VCCA_TVDACA1
C20
VCCA_TVDACB0
D20
VCCA_TVDACB1
E20
VCCA_TVDACC0
F20
VCCA_TVDACC1
AH1
VCCD_HMPLL0
AH2
VCCD_HMPLL1
A28
VCCD_LVDS0
B28
VCCD_LVDS1
C28
VCCD_LVDS2
D21
VCCD_TVDAC
A23
VCC_HV0
B23
VCC_HV1
B25
VCC_HV2
H19
VCCD_QTVDAC
AK31
VCCAUX0
AF31
VCCAUX1
AE31
VCCAUX2
AC31
VCCAUX3
AL30
VCCAUX4
AK30
VCCAUX5
AJ30
VCCAUX6
AH30
VCCAUX7
AG30
VCCAUX8
AF30
VCCAUX9
AE30
VCCAUX10
AD30
VCCAUX11
AC30
VCCAUX12
AG29
VCCAUX13
AF29
VCCAUX14
AE29
VCCAUX15
AD29
VCCAUX16
AC29
VCCAUX17
AG28
VCCAUX18
AF28
VCCAUX19
AE28
VCCAUX20
AH22
VCCAUX21
AJ21
VCCAUX22
AH21
VCCAUX23
AJ20
VCCAUX24
AH20
VCCAUX25
AH19
VCCAUX26
P19
VCCAUX27
P16
VCCAUX28
AH15
VCCAUX29
P15
VCCAUX30
AH14
VCCAUX31
AG14
VCCAUX32
AF14
VCCAUX33
AE14
VCCAUX34
Y14
VCCAUX35
AF13
VCCAUX36
AE13
VCCAUX37
AF12
VCCAUX38
AE12
VCCAUX39
AD12
VCCAUX40
ITL_CALISTOGA_MICRO_FCBGA_BU3_1466P
VTT_0
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25
VTT_26
VTT_27
VTT_28
VTT_29
VTT_30
POWER
VTT_31
VTT_32
VTT_33
VTT_34
VTT_35
VTT_36
VTT_37
VTT_38
VTT_39
VTT_40
VTT_41
VTT_42
VTT_43
VTT_44
VTT_45
VTT_46
VTT_47
VTT_48
VTT_49
VTT_50
VTT_51
VTT_52
VTT_53
VTT_54
VTT_55
VTT_56
VTT_57
VTT_58
VTT_59
VTT_60
VTT_61
VTT_62
VTT_63
VTT_64
VTT_65
VTT_66
VTT_67
VTT_68
VTT_69
VTT_70
VTT_71
VTT_72
VTT_73
VTT_74
VTT_75
VTT_76
AC14
AB14
W14
V14
T14
R14
P14
N14
M14
L14
AD13
AC13
AB13
AA13
Y13
W13
V13
U13
T13
R13
N13
M13
L13
AB12
AA12
Y12
W12
V12
U12
T12
R12
P12
N12
M12
L12
R11
P11
N11
M11
R10
P10
N10
M10
P9
N9
M9
R8
P8
N8
M8
P7
N7
M7
R6
P6
M6
A6
R5
P5
N5
M5
P4
N4
M4
R3
P3
N3
M3
R2
P2
M2
D2
AB1
R1
P1
N1
M1
+VCCP
48-,21-,18-,14-,11-,7-,6-,5-,4-,13-
VTTLF_CAP3
VTTF_CAP2
VTTF_CAP1
CHANGE by
C540
0.1uF_10v
1
2
1
2
PLACE IN CAVITY
1
2
C214
1
2
0.47uF_6.3v
C224
0.47uF_6.3v
Su Chun-Chi
C537
4.7uF_6.3v
C531
0.1uF_10v
C213
1
2
0.22uF_6.3v
1
2
1
2
C538
2.2uF_10v
C533
0.1uF_10v
28-Dec-2005
C575
1
2
0.22uF_6.3v
PLACE ON THE EDGE
C536
0.1uF_10v
1
2
1
2
TITLE
SIZE
A3
1
C233
330uF_2.5v
2
INVENTEC
MW14-6.0
CALISTOGA-5
CODE
DOC. NUMBER
CS
SHEET
OF
13 63
REV
X01LC5183
+VCCP
http://hobi-elektronika.net
48-,21-,18-,13-,11-,7-,6-,5-,4-,14-
U8-7
AA33
VCC_0
W33
VCC_1
P33
VCC_2
N33
VCC_3
L33
VCC_4
J33
VCC_5
AA32
VCC_6
Y32
VCC_7
W32
VCC_8
V32
VCC_9
P32
VCC_10
N32
VCC_11
M32
VCC_12
L32
VCC_13
J32
VCC_14
AA31
VCC_15
W31
VCC_16
V31
VCC_17
T31
VCC_18
R31
VCC_19
P31
VCC_20
N31
VCC_21
M31
VCC_22
AA30
VCC_23
Y30
VCC_24
W30
VCC_25
V30
VCC_26
U30
VCC_27
T30
VCC_28
R30
VCC_29
P30
VCC_30
N30
VCC_31
M30
VCC_32
L30
VCC_33
AA29
VCC_34
Y29
VCC_35
W29
VCC_36
V29
VCC_37
U29
VCC_38
R29
VCC_39
P29
VCC_40
M29
VCC_41
L29
VCC_42
AB28
VCC_43
AA28
VCC_44
Y28
VCC_45
V28
VCC_46
U28
VCC_47
T28
VCC_48
R28
VCC_49
P28
VCC_50
N28
VCC_51
M28
VCC_52
L28
VCC_53
P27
VCC_54
N27
VCC_55
M27
VCC_56
L27
VCC_57
P26
VCC_58
N26
VCC_59
L26
VCC_60
N25
VCC_61
M25
VCC_62
L25
VCC_63
P24
VCC_64
N24
VCC_65
M24
VCC_66
AB23
VCC_67
AA23
VCC_68
Y23
VCC_69
P23
VCC_70
N23
VCC_71
M23
VCC_72
L23
VCC_73
AC22
VCC_74
AB22
VCC_75
Y22
VCC_76
W22
VCC_77
P22
VCC_78
N22
VCC_79
M22
VCC_80
L22
VCC_81
AC21
VCC_82
AA21
VCC_83
W21
VCC_84
N21
VCC_85
M21
VCC_86
L21
VCC_87
AC20
VCC_88
AB20
VCC_89
Y20
VCC_90
W20
VCC_91
P20
VCC_92
N20
VCC_93
M20
VCC_94
L20
VCC_95
AB19
VCC_96
AA19
VCC_97
Y19
VCC_98
N19
VCC_99
M19
VCC_100
L19
VCC_101
N18
VCC_102
M18
VCC_103
L18
VCC_104
P17
VCC_105
N17
VCC_106
M17
VCC_107
N16
VCC_108
M16
VCC_109
L16
VCC_110
ITL_CALISTOGA_MICRO_FCBGA_BU3_1466P
VCC_SM_0
VCC_SM_1
VCC_SM_2
VCC_SM_3
VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35
VCC_SM_36
VCC_SM_37
VCC_SM_38
VCC_SM_39
VCC_SM_40
VCC_SM_41
VCC_SM_42
VCC_SM_43
VCC_SM_44
VCC_SM_45
VCC_SM_46
VCC
VCC_SM_47
VCC_SM_48
VCC_SM_49
VCC_SM_50
VCC_SM_51
VCC_SM_52
VCC_SM_53
VCC_SM_54
VCC_SM_55
VCC_SM_56
VCC_SM_57
VCC_SM_58
VCC_SM_59
VCC_SM_60
VCC_SM_61
VCC_SM_62
VCC_SM_63
VCC_SM_64
VCC_SM_65
VCC_SM_66
VCC_SM_67
VCC_SM_68
VCC_SM_69
VCC_SM_70
VCC_SM_71
VCC_SM_72
VCC_SM_73
VCC_SM_74
VCC_SM_75
VCC_SM_76
VCC_SM_77
VCC_SM_78
VCC_SM_79
VCC_SM_80
VCC_SM_81
VCC_SM_82
VCC_SM_83
VCC_SM_84
VCC_SM_85
VCC_SM_86
VCC_SM_87
VCC_SM_88
VCC_SM_89
VCC_SM_90
VCC_SM_91
VCC_SM_92
VCC_SM_93
VCC_SM_94
VCC_SM_95
VCC_SM_96
VCC_SM_97
VCC_SM_98
VCC_SM_99
VCC_SM_100
VCC_SM_101
VCC_SM_102
VCC_SM_103
VCC_SM_104
VCC_SM_105
VCC_SM_106
VCC_SM_107
AU41
AT41
AM41
AU40
BA34
AY34
AW34
AV34
AU34
AT34
AR34
BA30
AY30
AW30
AV30
AU30
AT30
AR30
AP30
AN30
AM30
AM29
AL29
AK29
AJ29
AH29
AJ28
AH28
AJ27
AH27
BA26
AY26
AW26
AV26
AU26
AT26
AR26
AJ26
AH26
AJ25
AH25
AJ24
AH24
BA23
AJ23
BA22
AY22
AW22
AV22
AU22
AT22
AR22
AP22
AK22
AJ22
AK21
AK20
BA19
AY19
AW19
AV19
AU19
AT19
AR19
AP19
AK19
AJ19
AJ18
AJ17
AH17
AJ16
AH16
BA15
AY15
AW15
AV15
AU15
AT15
AR15
AJ15
AJ14
AJ13
AH13
AK12
AJ12
AH12
AG12
AK11
BA8
AY8
AW8
AV8
AT8
AR8
AP8
BA6
AY6
AW6
AV6
AT6
AR6
AP6
AN6
AL6
AK6
AJ6
AV1
AJ1
VCC_SM_LF4
VCC_SM_LF5
NEAR PIN BA15 ON LAYER1
C115
1
2
0.47uF_6.3v
1
2
10uF_6.3v
1
2
C137
1
2
0.47uF_6.3v
NEAR PIN BA23
C191
1
2
0.47uF_6.3v
C116
1
2
0.47uF_6.3v
C584
C532
0.22uF_6.3v
PLACE IN CAVITY
1
C580
2
33uF_6.3v
VCC_SM_LF2
VCC_SM_LF1
1
2
0.47uF_6.3v
+V1.8
C226
+VCCP
1
2
1uF_6.3v
1
2
0.22uF_6.3v
1
C542
33uF_6.3v
2
48-,21-,18-,13-,11-,7-,6-,5-,4-,14-
1
1
2
C534
C574
C127
330uF_2.5v
C212
2
330uF_2.5v
C535
1
2
10uF_6.3v
C585
1
2
0.22uF_6.3v
AD27
AC27
AB27
AA27
AD26
AC26
AB26
AA26
AD25
AC25
AB25
AA25
AD24
AC24
AB24
AA24
AD23
AD22
AD21
AD20
AD19
AD18
AC18
AB18
AA18
Y27
W27
V27
U27
T27
R27
Y26
W26
V26
U26
T26
R26
Y25
W25
V25
U25
T25
R25
Y24
W24
V24
U24
T24
R24
V23
U23
T23
R23
V22
U22
T22
R22
V21
U21
T21
R21
V20
U20
T20
R20
V19
U19
T19
Y18
W18
V18
U18
T18
U8-6
VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
ITL_CALISTOGA_MICRO_FCBGA_BU3_1466P
50-,48-,16-,15-,9-
C136
C138
1
2
C215
0.1uF_16v
1
2
0.1uF_16v
1
2
0.1uF_16v
1
2
Layout note: Place these Hi_Feq & Resistors closed GMCH
C227
1
2
0.47uF_6.3v
C193
0.1uF_16v
C544
1
2
0.22uF_6.3v
VSS_NCTF0
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
VSS_NCTF12
NCTF
VCCAUX_NCTF0
VCCAUX_NCTF1
VCCAUX_NCTF2
VCCAUX_NCTF3
VCCAUX_NCTF4
VCCAUX_NCTF5
VCCAUX_NCTF6
VCCAUX_NCTF7
VCCAUX_NCTF8
VCCAUX_NCTF9
VCCAUX_NCTF10
VCCAUX_NCTF11
VCCAUX_NCTF12
VCCAUX_NCTF13
VCCAUX_NCTF14
VCCAUX_NCTF15
VCCAUX_NCTF16
VCCAUX_NCTF17
VCCAUX_NCTF18
VCCAUX_NCTF19
VCCAUX_NCTF20
VCCAUX_NCTF21
VCCAUX_NCTF22
VCCAUX_NCTF23
VCCAUX_NCTF24
VCCAUX_NCTF25
VCCAUX_NCTF26
VCCAUX_NCTF27
VCCAUX_NCTF28
VCCAUX_NCTF29
VCCAUX_NCTF30
VCCAUX_NCTF31
VCCAUX_NCTF32
VCCAUX_NCTF33
VCCAUX_NCTF34
VCCAUX_NCTF35
VCCAUX_NCTF36
VCCAUX_NCTF37
VCCAUX_NCTF38
VCCAUX_NCTF39
VCCAUX_NCTF40
VCCAUX_NCTF41
VCCAUX_NCTF42
VCCAUX_NCTF43
VCCAUX_NCTF44
VCCAUX_NCTF45
VCCAUX_NCTF46
VCCAUX_NCTF47
VCCAUX_NCTF48
VCCAUX_NCTF49
VCCAUX_NCTF50
VCCAUX_NCTF51
VCCAUX_NCTF52
VCCAUX_NCTF53
VCCAUX_NCTF54
VCCAUX_NCTF55
VCCAUX_NCTF56
VCCAUX_NCTF57
C543
1
2
0.22uF_6.3v
AE27
AE26
AE25
AE24
AE23
AE22
AE21
AE20
AE19
AE18
AC17
Y17
U17
AG27
AF27
AG26
AF26
AG25
AF25
AG24
AF24
AG23
AF23
AG22
AF22
AG21
AF21
AG20
AF20
AG19
AF19
R19
AG18
AF18
R18
AG17
AF17
AE17
AD17
AB17
AA17
W17
V17
T17
R17
AG16
AF16
AE16
AD16
AC16
AB16
AA16
Y16
W16
V16
U16
T16
R16
AG15
AF15
AE15
AD15
AC15
AB15
AA15
Y15
W15
V15
U15
T15
R15
1
2
0.22uF_6.3v
47-,37-,35-,30-,21-,13-,7-
C573
1
2
+V1.5S
C576
0.1uF_16v
U8-9
AC41
VSS_0
AA41
VSS_1
W41
VSS_2
T41
VSS_3
P41
VSS_4
M41
VSS_5
J41
VSS_6
F41
VSS_7
AV40
VSS_8
AP40
VSS_9
AN40
VSS_10
AK40
VSS_11
AJ40
VSS_12
AH40
VSS_13
AG40
VSS_14
AF40
VSS_15
AE40
VSS_16
B40
VSS_17
AY39
VSS_18
AW39
VSS_19
AV39
VSS_20
AR39
VSS_21
AN39
VSS_22
AJ39
VSS_23
AC39
VSS_24
AB39
VSS_25
AA39
VSS_26
Y39
VSS_27
W39
VSS_28
V39
VSS_29
T39
VSS_30
R39
VSS_31
P39
VSS_32
N39
VSS_33
M39
VSS_34
L39
VSS_35
J39
VSS_36
H39
VSS_37
G39
VSS_38
F39
VSS_39
D39
VSS_40
AT38
VSS_41
AM38
VSS_42
AH38
VSS_43
AG38
VSS_44
AF38
VSS_45
AE38
VSS_46
C38
VSS_47
AK37
VSS_48
AH37
VSS_49
AB37
VSS_50
AA37
VSS_51
Y37
VSS_52
W37
VSS_53
V37
VSS_54
T37
VSS_55
R37
VSS_56
P37
VSS_57
N37
VSS_58
M37
VSS_59
L37
VSS_60
J37
VSS_61
H37
VSS_62
G37
VSS_63
F37
VSS_64
D37
VSS_65
AY36
VSS_66
AW36
VSS_67
AN36
VSS_68
AH36
VSS_69
AG36
VSS_70
AF36
VSS_71
AE36
VSS_72
AC36
VSS_73
C36
VSS_74
B36
VSS_75
BA35
VSS_76
AV35
VSS_77
AR35
VSS_78
AH35
VSS_79
AB35
VSS_80
AA35
VSS_81
Y35
VSS_82
W35
VSS_83
V35
VSS_84
T35
VSS_85
R35
VSS_86
P35
VSS_87
C577
1
2
0.1uF_16v
N35
VSS_88
M35
VSS_89
L35
VSS_90
J35
VSS_91
H35
VSS_92
G35
VSS_93
F35
VSS_94
D35
VSS_95
AN34
VSS_96
ITL_CALISTOGA_MICRO_FCBGA_BU3_1466P
VSS_97
VSS_98
VSS_99
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
AK34
AG34
AF34
AE34
AC34
C34
AW33
AV33
AR33
AE33
AB33
Y33
V33
T33
R33
M33
H33
G33
F33
D33
B33
AH32
AG32
AF32
AE32
AC32
AB32
G32
B32
AY31
AV31
AN31
AJ31
AG31
AB31
Y31
AB30
E30
AT29
AN29
AB29
T29
N29
K29
G29
E29
C29
B29
A29
BA28
AW28
AU28
AP28
AM28
AD28
AC28
W28
J28
E28
AP27
AM27
AK27
J27
G27
F27
C27
B27
AN26
M26
K26
F26
D26
AK25
P25
K25
H25
E25
D25
A25
BA24
AU24
AL24
AW23
Su Chun-Chi 7-Nov-2005
U8-10
AT23
VSS_180
AN23
VSS_181
AM23
VSS_182
AH23
VSS_183
AC23
VSS_184
W23
VSS_185
K23
VSS_186
J23
VSS_187
F23
VSS_188
C23
VSS_189
AA22
VSS_190
K22
VSS_191
G22
VSS_192
F22
VSS_193
E22
VSS_194
D22
VSS_195
A22
VSS_196
BA21
VSS_197
AV21
VSS_198
AR21
VSS_199
AN21
VSS_200
AL21
VSS_201
AB21
VSS_202
Y21
VSS_203
P21
VSS_204
K21
VSS_205
J21
VSS_206
H21
VSS_207
C21
VSS_208
AW20
VSS_209
AR20
VSS_210
AM20
VSS_211
AA20
VSS_212
K20
VSS_213
B20
VSS_214
A20
VSS_215
AN19
VSS_216
AC19
VSS_217
W19
VSS_218
K19
VSS_219
G19
VSS_220
C19
VSS_221
AH18
VSS_222
P18
VSS_223
H18
VSS_224
D18
VSS_225
A18
VSS_226
AY17
VSS_227
AR17
VSS_228
AP17
VSS_229
AM17
VSS_230
AK17
VSS_231
AV16
VSS_232
AN16
VSS_233
AL16
VSS_234
J16
VSS_235
F16
VSS_236
C16
VSS_237
AN15
VSS_238
AM15
VSS_239
AK15
VSS_240
N15
VSS_241
M15
VSS_242
L15
VSS_243
B15
VSS_244
A15
VSS_245
BA14
VSS_246
AT14
VSS_247
AK14
VSS_248
AD14
VSS_249
AA14
VSS_250
U14
VSS_251
K14
VSS_252
H14
VSS_253
E14
VSS_254
AV13
VSS_255
AR13
VSS_256
AN13
VSS_257
AM13
VSS_258
AL13
VSS_259
AG13
VSS_260
P13
VSS_261
F13
VSS_262
D13
VSS_263
B13
VSS_264
AY12
VSS_265
AC12
VSS_266
K12
VSS_267
H12
VSS_268
E12
VSS_269
AD11
VSS_270
AA11
VSS_271
Y11
VSS_272
ITL_CALISTOGA_MICRO_FCBGA_BU3_1466P
VSS_273
VSS_274
VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325
VSS_326
VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350
VSS_351
VSS_352
VSS_353
VSS_354
VSS_355
VSS_356
VSS_357
VSS_358
VSS_359
VSS_360
J11
D11
B11
AV10
AP10
AL10
AJ10
AG10
AC10
W10
U10
BA9
AW9
AR9
AH9
AB9
Y9
R9
G9
E9
A9
AG8
AD8
AA8
U8
K8
C8
BA7
AV7
AP7
AL7
AJ7
AH7
AF7
AC7
R7
G7
D7
AG6
AD6
AB6
Y6
U6
N6
K6
H6
B6
AV5
AF5
AD5
AY4
AR4
AP4
AL4
AJ4
Y4
U4
R4
J4
F4
C4
AY3
AW3
AV3
AL3
AH3
AG3
AF3
AD3
AC3
AA3
G3
AT2
AR2
AP2
AK2
AJ2
AD2
AB2
Y2
U2
T2
N2
J2
H2
F2
C2
AL1
INVENTEC
TITLE
MW14-6.0
CALISTOGA-6
SIZE
CODE
A3
LC5183 X01
CS
SHEETCHANGE by OF
REVDOC. NUMBER
6314
R142
http://hobi-elektronika.net
10K_5%
MA_A(13:0)
1
1
R143
10K_5%
2
2
MA_DQS#(7:0)
MA_DM(7:0)
MA_DQS(7:0)
12-
17-,12-
12-
CN502-1
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10_AP
90
A11
89
A12
116
A13
86
A14
84
17-,12-
MA_BS2#
17-,12-
MA_BS0#
17-,12-
MA_BS1#
17-,9-
M_CS0#
17-,9-
M_CS1#
M_CKE0
M_CKE1
MA_CAS#
MA_RAS#
MA_WE#
M_ODT0
M_ODT1
999917-,917-,917-,1217-,1217-,12-
19-,16-,419-,16-,4-
17-,917-,9-
M_CLK_DDR0
M_CLK_DDR0#
M_CLK_DDR1
M_CLK_DDR1#
ICH_3S_SMCLK
ICH_3S_SMDATA
12-
12-
A15
85
A16_BA2
107
BA0
106
BA1
110
S0#
115
S1#
30
CK0
32
CK0#
164
CK1
166
CK1#
79
CKE0
80
CKE1
113
CAS#
108
RAS#
109
WE#
198
SA0
200
SA1
197
SCL
195
SDA
114
ODT0
119
ODT1
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS#0
29
DQS#1
49
DQS#2
68
DQS#3
129
DQS#4
146
DQS#5
167
DQS#6
186
DQS#7
TYCO_292524_4_STD_200P
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
MA_DATA(63:0)
+V1.8
50-,48-,16-,14-,9-
Layout notes: Place these Caps closed So-Dimm0
1
2
C204
0.1uF_16v
1
2
0.1uF_16v
0.1uF_16v
1
1
2
2
0.1uF_16v
49-,47-,45-,42-,40-,39-,38-,37-,36-,35-,34-,32-,31-,30-,27-,25-,24-,23-,21-,20-,19-,18-,16-,13-,10-,9-,5-,4-
1
C229
2
C159
C160
PLACE BETWEEN DIMM0 AND DIMM1
C152
0.1uF_16v
+V3S
1
2
C144
C165
1
1
2
2
2.2uF_6.3v
2.2uF_6.3v
C228
10uF_6.3v
1
C98
0.1uF_16v
2
PLACE BETWEEN DIMM0 AND DIMM1
C154
1
2
2.2uF_6.3v
M_VREF
1
2
50-,16-,9-
C139
1
2
2.2uF_6.3v
C99
10uF_6.3v
C166
1
2
2.2uF_6.3v
PM_EXTTS#0
16-,9-
TYCO_292524_4_STD_200P
112
111
117
96
95
118
81
82
87
103
88
104
199
83
120
50
69
163
201
202
47
133
183
77
12
48
184
78
71
72
121
122
196
193
CN502-2
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDDSPD
NC1
NC2
NC3
NC4
NCTEST
1
VREF
GND0
GND1
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
8
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
DDR2 SODIMM0
CHANGE by
Su Chun-Chi 22-Nov-2005
INVENTEC
TITLE
MW14-6.0
DDR2-SODIMM-0
SIZE
A3
DOC. NUMBER
CODE
LC5183 X01
CS
SHEET
REV
OF
6315
+V3S
http://hobi-elektronika.net
1
R144
10K_5%
2
MB_DQS#(7:0)
MB_A(13:0)
1
R145
10K_5%
2
17-,12-
MB_DM(7:0)
MB_DQS(7:0)
12-
12-
1
2
C161
0.1uF_16v
MB_DATA(63:0)
C151
C200
1
1
2
0.1uF_16v
C230
0.1uF_16v
1
2
2
0.1uF_16v
2.2uF_6.3v
+V3S
49-,47-,45-,42-,40-,39-,38-,37-,36-,35-,34-,32-,31-,30-,27-,25-,24-,23-,21-,20-,19-,18-,15-,13-,10-,9-,5-,4-,16-
1
2
0.1uF_16v
C196
1
2
2.2uF_6.3v
C101
1
2
M_VREF
50-,15-,9-
1
2
C208C155
2.2uF_6.3v
1
2
C192
2.2uF_6.3v
C207
1
2
2.2uF_6.3v
PM_EXTTS#0
15-,9-
CN503-2
112
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDDSPD
NC1
NC2
NC3
NC4
NCTEST
VREF
GND0
GND1
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
111
117
96
95
118
81
82
87
103
88
104
199
83
120
50
69
163
1
G1
G2
47
133
183
77
12
48
184
78
71
72
121
122
196
193
8
TYCO_292525_4_RVS_200P
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
CN503-1
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10_AP
90
A11
89
A12
116
A13
86
A14
84
17-,12-
MB_BS2#
17-,12-
MB_BS0#
17-,12-
MB_BS1#
17-,9-
M_CS2#
17-,9-
M_CS3#
M_CKE2
M_CKE3
MB_CAS#
MB_RAS#
MB_WE#
M_ODT2
M_ODT3
999917-,917-,917-,1217-,1217-,12-
19-,15-,419-,15-,4-
17-,9-1217-,9-
M_CLK_DDR3
M_CLK_DDR3#
M_CLK_DDR2
M_CLK_DDR2#
ICH_3S_SMCLK
ICH_3S_SMDATA
12-
A15
85
A16_BA2
107
BA0
106
BA1
110
S0#
115
S1#
30
CK0
32
CK0#
164
CK1
166
CK1#
79
CKE0
80
CKE1
113
CAS#
108
RAS#
109
WE#
198
SA0
200
SA1
197
SCL
195
SDA
114
ODT0
119
ODT1
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS#0
29
DQS#1
49
DQS#2
68
DQS#3
129
DQS#4
146
DQS#5
167
DQS#6
186
DQS#7
TYCO_292525_4_RVS_200P
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
5
7
17
19
4
6
14
16
23
25
35
37
20
22
36
38
43
45
55
57
44
46
56
58
61
63
73
75
62
64
74
76
123
125
135
137
124
126
134
136
141
143
151
153
140
142
152
154
157
159
173
175
158
160
174
176
179
181
189
191
180
182
192
194
+V1.8
50-,48-,15-,14-,9-
Layout note: Place these Caps closed So-Dimm1
C201
1
2
0.1uF_16v
DDR2 SODIMM1
CHANGE by
INVENTEC
TITLE
MW14-6.0
DDR2-SODIMM-1
CODE
CS
SHEET
DOC. NUMBER
OF
16 63
X01LC5183
SIZE REV
8-Nov-2005Su Chun-Chi
A3
+V0.9S
http://hobi-elektronika.net
50-,17-
+V0.9S
50-,17-
R106
R107
R109
R104
R115
C145
1
2
1
R80
R66 56_5%
R92 56_5%
R88 56_5%
R74
R70 56_5%
R73 56_5%
R68
R77 56_5%
R65 56_5%
R79 56_5%
R69
R63
R72
R76 56_5%
R71 56_5%
R67 56_5%
R78
1
2 2
C146
1
2
0.1uF_16v
56_5%
12
2
1
12
12
12
56_5%
12
56_5%R108
12
56_5%R112
56_5%R119
12
56_5%
12
2
1
12
56_5%
12
12
56_5%
12
56_5%R103
12
56_5%
12
56_5%R110
56_5%R114
12
12
56_5%
56_5%
12
12
12
12
56_5%
12
12
56_5%R75
56_5%R64
12
12
56_5%
56_5%
12
12
12
12
56_5%
12
12
56_5%R105
C195
0.1uF_16v
C197
0.1uF_16v
1
2
1
2
C150
0.1uF_16v0.1uF_16v
C141
0.1uF_16v
1
2
1
2
C203
0.1uF_16v
C148
0.1uF_16v
1
2
1
22
C202
0.1uF_16v
C162
0.1uF_16v
1
2
1
2
C153
0.1uF_16v
C143
0.1uF_16v
1
2
1
2
C206
0.1uF_16v
C158
0.1uF_16v
1
2
1
2
C157
0.1uF_16v
C149
1
2
1
2
C164
11
2
0.1uF_16v
C156
1
2
0.1uF_16v
C142
0.1uF_16v
C163
0.1uF_16v
2
1
2
C198
0.1uF_16v
C199
0.1uF_16v0.1uF_16v
LAYOUT NOTES : PLACE ONE CAP CLOSE TO EVERY 2 PULL UP RESISTOR TERMINATED TO +V0.9S
15-,9-
M_CKE0
15-,9-
M_CKE1
16-,9-
M_CKE2
16-,9-
M_CKE3
+V0.9S
50-,17-
R116
R81
R91
R118
R117
R113
R82
R96
R83
R97
R84
R98
R85
R86
R94
R93
R95
R87
R90
R111
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
2
1
56_5%
2
1
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
12
56_5%
2
1
56_5%
1
2
56_5%
12
MA_A(0)
MA_A(1)
MA_A(2)
MA_A(3)
MA_A(4)
MA_A(5)
MA_A(6)
MA_A(7)
MA_A(8)
MA_A(9)
MA_A(10)
MA_A(11)
MA_A(12)
MA_A(13)
15-,9-
15-,9-
16-,9-
16-,9-
15-,12-
15-,12-
15-,12-
15-,12-
15-,12-
15-,12-
15-,9-
15-,9-
16-,9-
16-,9-
15-,12-
M_ODT0
M_ODT1
M_ODT2
M_ODT3
MA_BS0#
MA_BS1#
MA_BS2#
MA_WE#
MA_CAS#
MA_RAS#
M_CS0#
M_CS1#
M_CS2#
M_CS3#
MA_A(13:0)
2
1
2
C147
0.1uF_16v
C194
0.1uF_16v
MB_A(0)
MB_A(1)
MB_A(2)
MB_A(3)
MB_A(4)
MB_A(5)
MB_A(6)
MB_A(7)
MB_A(8)
MB_A(9)
MB_A(10)
MB_A(11)
MB_A(12)
MB_A(13)
11
1
2
CHANGE by
C205
0.1uF_16v
C140
0.1uF_16v
16-,12-
16-,12-
16-,12-
16-,12-
16-,12-
16-,12-
16-,12-
Su Chun-Chi
MB_BS0#
MB_BS1#
MB_BS2#
MB_WE#
MB_CAS#
MB_RAS#
MB_A(13:0)
7-Nov-2005
INVENTEC
TITLE
MW14-6.0
DDR-DAMPING
CODE DOC. NUMBER
SIZE
A3
CS
SHEET OF
17 63
REV
X01LC5183
49-,44-,43-,40-,33-,31-,30-,28-,21-,20-,19-
http://hobi-elektronika.net
RTC BATTERY
CN501
1
12
1
2
2
LT_BH_12T_2P
BAT54C
R53
1K_5%
+V3A
1
3
D5
2
+V_RTC
21-,18-
1
C643
1uF_6.3v
2
+V_RTC
21-,18-
1
R617
330K_5%
2
MC97_3S_BITCLK
ACZ_3S_BITCLK
ACZ_3S_SYNC
MC97_3S_SYNC
ACZ_3S_RST#
MC97_3S_RST#
ACZ_3S_SDIN0
ACZ_3S_SDIN1
MC97_3S_SDOUT
ACZ_3S_SDOUT
LED_3S_SATA#
SATA_C_RXN0
SATA_C_RXP0
SATA_C_TXN0
SATA_C_TXP0
R266
12
20K_1%
C308
1uF_6.3v
1
R267
1M_5%
2
C309
12
12pF_50v
1
2
C335
12pF_50v
12
BIOS NEED TO DISABLE 82801GBM LAN
FBM_11_100505_900_T
12
L21
38-
L22
4040-
R609 39_5%
38-
R608
R606 39_5%
40-
R607
384038-
38-
R263 39_5%
40-
24-
24242424-
12
12
12
12
12
12
1
C313
3300pF_50v
1
R238
24.9_1%
2
FBM_11_100505_900_T
39_5%
39_5%
39_5%R262
2
C312
3300pF_50v
12
CLOSE TO ICH7
CLK_R_SATA1#
CLK_R_SATA1
PIDE_3S_IOR#
PIDE_3S_IOW#
PIDE_3S_DACK#
PIDE_3S_IRQ
PIDE_3S_IORDY
PIDE_3S_DREQ
34
12
1
2
X3
32.768KHZ
252525252525-
44-
1
R268
10M_5%
2
SATA_TXN0
SATA_TXP0
U21-1
AB1
RXTC1
AB2
RXTC2
AG10
AG16
AF18
AH10
AF15
AH15
AF16
AH16
AE15
AA3
Y5
W4
W1
Y1
Y2
W3
V3
U3
U5
V4
T5
U7
V6
V7
U1
R6
R5
T2
T3
T1
T4
AF3
AE3
AG2
AH2
AF7
AE7
AG6
AH6
AF1
AE1
RTC
RTCRST#
INTRUDER#
INTVRMEN
EE_CS
EE_SHCLK
EE_DOUT
EE_DIN
LAN_CLK
LAN_RSTSYNC
LAN_RXD0
LAN_RXD1
LAN
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
ACZ_BIT_CLK
ACZ_SYNC
ACZ_RST#
ACZ_SDIN0
ACZ_SDIN1
ACZ_SDIN2
AC-97/AZALIASATA
ACZ_SDOUT
SATALED#
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA_CLKN
SATA_CLKP
SATARBIASN
SATARBIASP
DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ
ITL_ICH7_MBGA_BU3_652P
LPC
LDRQ0#
LDRQ1#_GPIO23
LFRAME#
A20GATE
CPUSLP#
TP1_DPRSTP#
TP2_DPSLP#
GPIO49_CPUWRGD
IGNNE#
INIT3_3V#
CPU
STPCLK#
THERMTRIP#
IDE
LAD0
LAD1
LAD2
LAD3
A20M#
FERR#
INIT#
RCIN#
DD10
DD11
DD12
DD13
DD14
DD15
DCS1#
DCS3#
AA6
AB5
AC4
Y6
AC3
AA5
AB3
AE22
AH28
AG27
AF24
1 2 R585
AH25
0_5%R195
AG26
AG24
AG22
AG21
AF22
AF25
INTR
AG23
AH24
NMI
AF23
SMI#
AH22
AF26
AB15
DD0
AE14
DD1
AG13
DD2
AF13
DD3
AD14
DD4
AC13
DD5
AD12
DD6
AC12
DD7
AE12
DD8
AF12
DD9
AB13
AC14
AF14
AH13
AH14
AC15
AH17
DA0
AE17
DA1
AF17
DA2
AE16
AD16
30-
EC_3S_A20GATE
5-
H_A20M#
6-
H_DPSLP#
25252525252525252525252525252525-
252525-
2525-
42-,37-,3042-,37-,3042-,37-,3042-,37-,30-
30-
LPC_3S_DRQ0#
42-,37-,30-
LPC_3S_FRAME#
R158
12
OPEN
12
PIDE_3S_D(0)
PIDE_3S_D(1)
PIDE_3S_D(2)
PIDE_3S_D(3)
PIDE_3S_D(4)
PIDE_3S_D(5)
PIDE_3S_D(6)
PIDE_3S_D(7)
PIDE_3S_D(8)
PIDE_3S_D(9)
PIDE_3S_D(10)
PIDE_3S_D(11)
PIDE_3S_D(12)
PIDE_3S_D(13)
PIDE_3S_D(14)
PIDE_3S_D(15)
PIDE_3S_A(0)
PIDE_3S_A(1)
PIDE_3S_A(2)
PIDE_3S_CS#(1)
PIDE_3S_CS#(3)
LPC_3S_AD(0)
LPC_3S_AD(1)
LPC_3S_AD(2)
LPC_3S_AD(3)
Close to ICH7
11-,6-
H_CPUSLP#
0_5%
6-
H_PWRGD
5-
55-
45-,6-
H_IGNNE#
H_INIT#
H_INTR
Close to ICH7
+VCCP
48-,21-,14-,13-,11-,7-,6-,5-,4-,18-
1
R564
56_5%
H_DPRSTP#
+V3S
49-,47-,45-,42-,40-,39-,38-,37-,36-,35-,34-,32-,31-,30-,27-,25-,24-,23-,21-,20-,19-,16-,15-,13-,10-,9-,5-,4-
1
R197
10K_5%
2
30-
PM_3S_KBCCPURST#
5-
H_NMI
5-
H_SMI#
5-
H_STPCLK#
R157
12
24.9_1%
2
+VCCP
48-,21-,14-,13-,11-,7-,6-,5-,4-,18-
1
R159
56_5%
2
C243
1
2
OPEN
5-
9-,5-
H_FERR#
PM_THRMTRIP#
BIOS NEED TO DISABLE LAN
CHANGE by
INVENTEC
TITLE
MW14-6.0
ICH7-1
SIZE
CODE
CS
SHEET
DOC. NUMBER
18 63
15-Nov-2005Su Chun-Chi
A3
REV
X01LC5183
OF
PCIE_C_TXN1
http://hobi-elektronika.net
PCIE_C_TXP1
PCIE_C_TXN2
PCIE_C_TXP2
PCIE_C_TXN3
PCIE_C_TXP3
PCIE_C_TXN4
PCIE_C_TXP4
ERASE PASSWORD
THERM_SCI#
C235
0.1uF_16v
2727-
12
C237
0.1uF_16v
3535-
12
C239
0.1uF_16v
3737-
12
C241
0.1uF_16v
3737-
12
49-,44-,43-,40-,33-,31-,30-,28-,21-,20-,18-,19-
49-,44-,43-,40-,33-,31-,30-,28-,21-,20-,18-,19-
+V3A
1
R193
100K_5%
2
1
C269
OPEN
2
+V3S
1
R198
10K_5%
2
R199
12
39-
OPEN
C236
PCIE_C_RXN1
0.1uF_16v
PCIE_C_RXP1
12
PCIE_C_RXN2
PCIE_C_RXP2
2
1
C238
PCIE_C_RXN3
0.1uF_16v
PCIE_C_RXP3
2
1
C240
PCIE_C_RXN4
0.1uF_16v
PCIE_C_RXP4
12
C242
0.1uF_16v
49-,44-,43-,40-,33-,31-,30-,28-,21-,20-,18-,19-
+V3A
1
R259
10K_5%
2
2727-
PCIE_TXN1
PCIE_TXP1
3535-
PCIE_TXN2
PCIE_TXP2
3737-
PCIE_TXN3
PCIE_TXP3
3737-
PCIE_TXN4
PCIE_TXP4
+V3A
12
R261
OPEN
OC0#
OC1#
OC2#
PM_RI#
42-,34-,30-,19-
35-,27-,1942-,34-,30-,19-
45-,30-
30-,2035-,1935-
37-,35-
1919-
37-,35-
1919191919-
19-
4042-,40-,355-
9-
19-
ICH_3A_SMCLK
ICH_3A_SMDATA
ICH_3A_LINKALERT#
ICH_3A_ALERT_CLK
ICH_3A_ALERT_DAT
A_3S_ICHSPKR
SUS_STAT#_3
ITP_DBRESET#
BM_BUSY#
SMB_ALERT#
PCISTOP#_3
CPUSTOP#_3
ICH_NEWCARD_SD#
44-
35-
PCI_3S_CLKRUN#
PCIE_WAKE#
PCI_3S_SERIRQ
SB_3S_VRMPWRGD
RUNSCI0#_3
ICH_NEWCARD_OC#
CPPE#
49-,47-,45-,42-,40-,39-,38-,37-,36-,35-,34-,32-,31-,30-,27-,25-,24-,23-,21-,20-,18-,16-,15-,13-,10-,9-,5-,4-,19-
ICH_3S_ALERT_CLK
ICH_3A_ALERT_CLK
ICH_3A_ALERT_DAT
ICH_3S_ALERT_DAT
OPEN
R149
2.2K_5%
12
R604
U21-4
F26
PERn1
F25
PERp1
E28
PETn1
E27
PETp1
H26
PERn2
H25
PERp2
G28
PETn2
G27
PETp2
K26
PERn3
K25
PERp3
J28
PETn3
J27
PETp3
M26
PERn4
M25
PERp4
PCI-Express
L28
PETn4
L27
PETp4
P26
PERn5
P25
PERp5
N28
PETn5
N27
PETp5
T25
PERn6
T24
12
R605
OPEN
2640-
40-
PERp6
R28
PETn6
R27
PETp6
R2
SPI_CLK
P6
SPI_CS#
P1
SPI_ARB
P5
SPI_MOSI
P2
SPI_MISO
D3
OC0#
C4
OC1#
D5
OC2#
D4
OC3#
E5
OC4#
C3
OC5#GPIO29
A2
OC6#GPIO30
B3
OC7#GPIO31
ITL_ICH7_MBGA_BU3_652P
U21-3
C22
SMBLCK
B22
SMBDATA
A26
LINKALERT#
B25
SMLINK0
A25
SMLINK1
A28
RI#
A19
SPKR
A27
SUS_STAT#
A22
SYS_RST#
AB18
GPIO0_BM_BUSY#
B23
GPIO11_SMBALERT#
AC20
GPIO18_STPPCI#
AF21
GPIO20_STPCPU#
A21
GPIO26
B21
GPIO27
E23
GPIO28
AG18
GPIO32_CLKRUN#
AC19
GPIO33_AZ_DOCK_EN#
U2
GPIO34_AZ_DOCK_RST#
F20
WAKE#
AH21
SERIRQ
AF20
THRM#
AD22
VRMPWRGD
AC21
GPIO6
AC18
GPIO7
E21
GPIO8
SPI
SMB
SYS GPIO
GPIO
V26
DMI0RXN
V25
DMI0RXP
U28
DMI0TXN
U27
DMI0TXP
Y26
DMI1RXN
Y25
DMI1RXP
W28
DMI1TXN
W27
DMI1TXP
AB26
DMI2RXN
AB25
DMI2RXP
AA28
DMI2TXN
AA27
DMI2TXP
AD25
DMI3RXN
AD24
DMI3RXP
AC28
DMI3TXN
Direct Media Interface
AC27
DMI3TXP
AE28
DMI_CLKN
AE27
DMI_CLKP
C25
DMI_ZCOMP
D25
DMI_IRCOMP
F1
USBP0N
F2
USBP0P
G4
USBP1N
G3
USBP1P
H1
USBP2N
H2
USBP2P
J4
USBP3N
J3
USBP3P
K1
USBP4N
K2
USBP4P
L4
USBP5N
USB
L5
USBP5P
M1
USBP6N
M2
USBP6P
N4
USBP7N
N3
USBP7P
D2
USBRBIAS#
D1
USBRBIAS
Place within 500 mils of ICH
GPIO21_SATA0GP
GPIO19_SATA1GP
GPIO36_SATA2GP
SATA
GPIO
GPIO37_SATA3GP
CLK14
CLK48
Clocks
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
PWROK
GPIO16_DPRSLPVR
TP0_BATLOW#
PWRBTN#
LAN_RST#
Power MGT
RSMRST#
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
GPIO24
GPIO25
GPIO35
GPIO38
GPIO39
USB_RBIAS_PN
AF19
AH18
AH19
AE19
AC1
B2
C20
B24
D23
F22
AA4
AC22
C21
C23
C19
Y4
E20
A20
F19
E19
R4
E22
R3
D20
12
AD21
AD20
AE20
ITL_ICH7_MBGA_BU3_652P
+V3S
1
1
R150
2.2K_5%
2
2
49-,47-,45-,40-,39-,34-,33-,30-,26-,25-,24-,23-,21-,19-
+V5S
Q12
5
S1
1
G1
6
D1
4
D2
3
G2
2
S2
NDC7002N
9-
DMI_RXN(0)
9-
DMI_RXP(0)
9-
DMI_TXN(0)
9-
DMI_TXP(0)
9-
DMI_RXN(1)
9-
DMI_RXP(1)
9-
DMI_TXN(1)
9-
DMI_TXP(1)
9-
DMI_RXN(2)
9-
DMI_RXP(2)
9-
DMI_TXN(2)
9-
DMI_TXP(2)
9-
DMI_RXN(3)
9-
DMI_RXP(3)
9-
DMI_TXN(3)
9-
DMI_TXP(3)
4-
CLK_R_PCIE_ICH#
4-
CLK_R_PCIE_ICH
26-
USB_P0-
26-
USB_P0+
40-
USB_P1-
40-
USB_P1+
40-
USB_P2-
40-
USB_P2+
40-
USB_P3-
40-
USB_P3+
38-
USB_P4-
38-
USB_P4+
35-
USB_P5-
35-
USB_P5+
37-
USB_P6-
37-
USB_P6+
31-
USB_P7-
31-
USB_P7+
12
R260
22.6_1%
4-
CLK_R3S_ICH14
4-
CLK_R3S_ICH48
OPEN
0_5%
0_5% R578
42-,37-,35-,27-,20-
R620
0_5%
12
R191
2
1
R153
12
TP7012
45-,9-,19-
PM_PWROK
45-,9-,19-
PM_DPRSLPVR
30-,19-
LOW_BAT#_3
BUF_PLT_RST#
30-
RSMRST#
30-
WAKEUP0#_3
19-
SHUTDOWN#
19-
MACHINE_ID0
19-
MACHINE_ID1
37-,4-
CLK_REQA#
BIOS NEED TO SET SATA CLOCK REQ ENABLE
49-,47-,45-,42-,40-,39-,38-,37-,36-,35-,34-,32-,31-,30-,27-,25-,24-,23-,21-,20-,18-,16-,15-,13-,10-,9-,5-,4-,19-
ICH_3S_SMCLK
ICH_3A_SMCLK
ICH_3A_SMDATA
ICH_3S_SMDATA
+V1.5S_PCIE_ICH
DMI_IRCOMP_R
RS3
3
4
2
18
8.2K_5%
50-,49-,47-,45-,44-,30-,20-
RS503
1
2
3
45
8.2K_5%
+V3S
R212
2.2K_5%
16-,15-,4-
1919-
16-,15-,4-
6
5
7
1
1
2
2
Close to ICH7
8
7
6
R572
2.2K_5%
PM_PWROK
PM_DPRSLPVR
21-
1
R156
24.9_1%
2
LOW_BAT#_3
SMB_ALERT#
ICH_3A_LINKALERT#
ICH_3A_ALERT_CLK
ICH_3A_ALERT_DAT
PCIE_WAKE#
SHUTDOWN#
+V3S
49-,47-,45-,42-,40-,39-,38-,37-,36-,35-,34-,32-,31-,30-,27-,25-,24-,23-,21-,20-,18-,16-,15-,13-,10-,9-,5-,4-,19-
C610
1
2
0.1uF_16v
SLP_S3#_3R
50-,48-,30-
SLP_S4#_3R
ICH_NEWCARD_OC#
BAT54
+V3S
49-,47-,45-,42-,40-,39-,38-,37-,36-,35-,34-,32-,31-,30-,27-,25-,24-,23-,21-,20-,18-,16-,15-,13-,10-,9-,5-,4-,19-
+V3A
2
R573
10K_5%
1
CHANGE by
Su Chun-Chi
45-,9-,19-
45-,9-,19-
30-,1919-
PM_RI#
1919191935-,27-,1919-
C647
1
2
PCI_3S_CLKRUN#
49-,44-,43-,40-,33-,31-,30-,28-,21-,20-,18-,19-
1
R571
10K_5%
2
C249
1
2
0.1uF_16v
0.1uF_16v
49-,47-,45-,40-,39-,34-,33-,30-,26-,25-,24-,23-,21-,19-
+V5S
1
2
49-,47-,45-,42-,40-,39-,38-,37-,36-,35-,34-,32-,31-,30-,27-,25-,24-,23-,21-,20-,18-,16-,15-,13-,10-,9-,5-,4-,19-
PCI_3S_SERIRQ
40-,30-
D16
30-
13
49-,47-,45-,42-,40-,39-,38-,37-,36-,35-,34-,32-,31-,30-,27-,25-,24-,23-,21-,20-,18-,16-,15-,13-,10-,9-,5-,4-,19-
49-,47-,45-,40-,39-,34-,33-,30-,26-,25-,24-,23-,21-,19-
Q507
5
S1
1
G1
6
D1
4
D2
3
G2
2
S2
NDC7002N
12
R618
1
R582
PULL DOWN FOR GMCH A0
OPEN FOR GMCH A1
49-,44-,43-,40-,33-,31-,30-,28-,21-,20-,18-,19-
1
12
12
12
1
12
C248
0.1uF_16v
2
2
2
2
1
2
OPEN1
10K_5%
10K_5%
10K_5%
10K_5%1
10K_5%
1K_5%
10K_5%
C644
0.1uF_16v
R155
R576
R154
R151
R152
R579
R194
1
2
R577
C128
0.1uF_16v
42-,34-,30-,19-
R586
R196
R584
1
2
42-,34-,30-,1935-,19-
PWR_SWIN#_3
EC_PWRSW#
MACHINE_ID0
MACHINE_ID1
1919-
+V5S
INVENTEC
TITLE
MW14-6.0
ICH7-2
CODE
SIZE
9-Dec-2005
A3
10K_5%
2
OPEN
+V3A
8.2K_5%1
2
8.2K_5%
2
100K_5%
1
+V3S
2
1
R580
R588
10K_5%
10K_5%
2
1
2
1
R581
R587
OPEN
OPEN
2
1
DOC. NUMBER
LC5183 X01
CS
SHEET OF
+V3S
REV
6319
Loading...