Xilinx VC707 Getting Started

Getting Started with the Virtex-7 FPGA VC707 Evaluation Kit
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XPM 0402902-04
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Revision History

The following table shows the revision history for this document.
Date Version Revision
07/31/2012 1.0 Initial Xilinx release.
03/01/2013 1.1 Add Vivado® Design Suite to VC707 Evaluation Kit Contents. Removed references to
USB flash drive throughout Chapter 1, Getting Started with the Virtex-7 FPGA VC707
Evaluation Kit. Updated Step 1 and removed note in Extract the AMS Design Files, page 13.
09/25/2013 1.2 Updated disclaimer and copyright. Updated Introduction, VC707 Evaluation Kit
Contents, Project Files, Extract the AMS Design Files, Set Up the Hardware, and Examine Analog Mixed Signal Features. Removed IBERT Demonstration, MultiBoot Design, MIG
Design, Integrated Endpoint Block for PCI Express®, and LogiCORE™ IP Ethernet SGMII Designs sections. Added Appendix A, VC707 Board Components and
Appendix B, Additional Resources.
03/07/2014 1.2.1 Made typographical edits.
05/03/2014 1.3 Updated Figure 1-1, Figure 1-7, and Figure 1-11 to show a Revision 1.0 board.
09/16/2014 1.4 Updated Verify Jumpers are in Default Positions, including removing the J7, J40, and J41
jumper connectors and adding Figure 1-6.
10/14/2015 1.4.1 Updated the XPM number to 0402902-04.
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Table of Contents

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Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Chapter 1: Getting Started with the Virtex-7 FPGA VC707 Evaluation Kit
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
VC707 Evaluation Kit Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Host Computer Requirements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Preliminary Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Built-In Self Test. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
AMS 101 Card Demonstration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Next Steps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Additional Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Appendix A: VC707 Board Components
Feature Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Appendix B: Additional Resources
Xilinx Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Solution Centers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Appendix C: Warranty
Getting Started with the VC707 Evaluation Kit www.xilinx.com 3
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Chapter 1
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Getting Started with the Virtex-7 FPGA VC707 Evaluation Kit

Introduction

This document describes how to use the materials provided in the VC707 Evaluation Kit to set up the VC707 board and a host computer to run two reference designs, which test and demonstrate some of the key features of the XC7VX485T FPGA and the VC707 board:
Built-in self test (BIST)
Analog mixed signal (AMS) card demonstration
Note:
Xilinx tools, technology, and reference designs. Additional instructions and background information are available from the VC707 Evaluation
These design summaries are for use as a quick start method for users who are familiar with
Kit website.

VC707 Evaluation Kit Contents

The VC707 Evaluation Kit includes:
VC707 board with the Virtex®-7 XC7VX485T FPGA
ISE® Design Suite: Logic Edition (full seat, node-locked, device-locked to the XC7VX485T FPGA)
Vivado® Design Suite Installation DVD
Printed entitlement voucher: provides entitlement of the Vivado Design Suite Logic Edition, node-locked, and device-locked to the XC7VX485T FPGA. Follow the printed instructions on the voucher to redeem your software entitlement.
AMS101 evaluation card
USB cable, standard-A plug to mini-B plug
USB cable, standard-A plug to micro-B plug
•HDMI cable, type-A plug to type-A plug
Power Supply: 100 VAC–240 VAC input, 12 VDC 5.0A output
Power cords to support three main plug types
Getting Started Guide
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Chapter 1: Getting Started with the Virtex-7 FPGA VC707 Evaluation Kit
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Host Computer Requirements

The example designs described in this document require an Intel processor based computer running Windows 7 or Windows XP operating system. The computer must have two USB ports and an Ethernet interface.
Note:

Preliminary Setup

Complete the tasks in this section before running the reference designs.

Install ISE Software

Install the latest version of the Xilinx ISE® Design Suite on the host computer.

Install the USB UART Drivers

Download and install the Silicon Laboratories CP210x VCP drivers on the host computer. The drivers are available for download at no cost from Silicon Labs

Configure the Host Computer COM Port

The BIST design uses a terminal program to communicate between the host computer and the VC707 board. To configure the host computer COM port for this purpose:
1. Connect the VC707 board to the host computer and power supply as shown in
Figure 1-1.
X-Ref Target - Figure 1-1
USB cable standard-A plug to mini-B plug
The Windows 7 operating system is used in the setup instructions and examples.
.
Board Power Switch SW12
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Host
Computer
To J17
(UART)
Figure 1-1: Host Computer COM Port Configuration
2. Turn Board power on (SW12).
To J18
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Power Supply
100VAC–240VAC Input
12 VDC 5.0A Output
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Preliminary Setup
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3. Open the host computer Device Manager (Figure 1-2). In the Windows task bar, Click Start, click Control Panel, and then click Device Manager.
X-Ref Target - Figure 1-2
Figure 1-2: Device Manager
4. Open UART properties. Expand Ports (COM & LPT), right-click Silicon Labs CP210x USB to UART Bridge, and then click Properties.
5. In the properties window, select the Port Settings tab, verify the settings match the values shown in Figure 1-3 and then click Advanced.
X-Ref Target - Figure 1-3
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Figure 1-3: Port Settings
Chapter 1: Getting Started with the Virtex-7 FPGA VC707 Evaluation Kit
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6. Select an unused COM Port Number and then click OK. Figure 1-4 shows COM1 as the selected COM port number.
X-Ref Target - Figure 1-4
Select an unused COM port
Figure 1-4: Advanced Settings
7. Click OK in the properties window (Figure 1-3, page 7), and then close the Device Manager and the Control Panel.
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Install the Terminal Program

Download and install the Tera Term Pro terminal program on the host computer. Tera Term is available for download at no cost from the LogMeTT
To communicate with the VC707 board, configure the New Connection and Serial Port settings as shown in Figure 1-5. These settings must match the host computer COM port settings shown in Figure 1-3, page 7 and Figure 1-4.
X-Ref Target - Figure 1-5
Preliminary setup is complete and the reference designs can now be run.
download page.
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Figure 1-5: TeraTerm Pro Settings
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