Texas Instruments UCC3889D, UCC3889N, UCC3889DTR, UCC2889N, UCC2889DTR Datasheet

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Off-line Power Supply Controller

• Transformerless O ff-line Applications

• Ideal Primary-side Bias Supply

• Efficient BiCMOS Design

• Wide Input Range

• Fixed or Adjustable

Low Voltage Output

• Uses Low Cost SMD Inductors

• Short Circuit Protecte d

• Optional Isolation Capability

The UCC1889 controller is optimized for use as an off-line, low power, low voltage, regulated bias supply. The unique circuit topology utilized in this device can be visualized as two cascaded flyback converters, each operating in the discontinuous mode, and both driven from a single external power switch. The significant benefit of this approach is the abili ty t o achieve voltage conversion ratios of 400V to 12V with no t ra nsf or m er an d low int er nal los ses .

The control algorithm utilized by the UCC1889 is to force the switch on time to be inversely proportional to the input line voltage while the switch off time is made inversely proportional to the output volta ge . This act ion is autom atica lly cont r olled by an internal feedback loop and reference. The casc aded con figura tio n allow s a voltage conversion from 400V to 12V to be achieved with a switch duty cycle greater than 10%. This topology also offers inherent short circuit protection since as the output volta g e fa lls to zer o, th e swit c h of f time appr oac hes infin ity.

The output voltage can be easily set to 12V or 18V. Moreover, it can be programmed for other output voltages less than 18V with a few additional components. An isolated version can be achieved with this topology as described further in Unitr ode Application Note U- 1 4 9 .

UCC1889 UCC2889 UCC3889

2/95

FEATURES

DESCRIPTI ON

OPERATION

With reference to the application d iagram below, when input voltage is fir st a pplied, the RON current into TON is directed to VCC where it charges the extern al capacitor , C3, connected to VCC. As voltage builds on VCC, an internal undervoltage lockout holds the circuit off and the output at DRIVE low until VCC reaches 8.4V. At this time, DRIVE goes high turning on the power switch, Q1, and redirectin g the cur rent into TON to the timing capacitor, CT. CT charges to a fixed threshold with a current ICHG=0.8 • (VIN - 4.5V)/RON. Since DRIVE will only be high for as long as CT charges, the power switch on time will be inversely proportional to line voltage. This provides a const ant line v olt age- switc h on tim e produc t.

Note: This device incorpo rat es patent ed t ech nology used un der license from Lambd a E lectron ic s, Inc .

TYPICAL APPLI CATIO N

UDG-93060-1

UCC1889 UCC2889 UCC3889

OPERATION (cont.)

At the end of the on time, Q1 is turned off and the RON current into TON is again diverted to VCC. Thus the current through R

ON, which charges CT during the on time,

contributes to supplying control power during the off time. The power switch off time is controlled by the di scharge

of C

T which, in turn, is programmed by the regulated out-

put voltage. The relationship between C

T discharge cur-

rent, I

DCHG, and output voltage is illustrated as follows:

1. When V

OUT = 0, the off time is infinite. This feature

provides inherent short circuit protection. However, to ensure output voltage startup when the output is not a short, a high value resistor, R

S, is placed in parallel

with C

T to establish a minimum switching frequency.

2. As V

OUT rises above approxi mately 0.7V to its regu-

lated value, I

DCHG is defined by ROFF, and therefore is

equal to:

IDCHG = (VOUT - 0.7V) / ROFF

As V

OUT

increases, IDCHG increases resulting in the reduction of off time. The frequency of operation increases and V

OUT rises quickly to its regulated value.

3. In this region, a transconductance amplifier reduces I

DCHG in order to maintain VOUT in regulation.

4. If V

OUT should rise above its regulation range, IDCHG

falls to zero and the circuit returns to the minimum frequency established by R

S and CT.

The range of switching frequencies is established by R

ON, ROFF, RS, and CT as follows:

Frequency = 1/(T

ON + TOFF)

ON = RON • CT • 4.6 V/(VIN - 4.5V)

OFF (max) = 1.4 • RS • CT

Regions 1 and 4 T

OFF = ROFF • CT • 3.7V /(VOUT - 0.7V)

Region 2, excluding the effects of R

which have a minimal impact on TOFF.

The above equations assume that V

CC equals 9V. The

voltage at T

ON increases from approximately 2.5V to

6.5V while C

T is chargin g. To take this into account, VIN

is adjusted by 4.5V in the calculation of TON. The voltage at T

OFF is approximately 0.7V.

DESIGN EXAMPL E

The UCC3889 regulates a 12 volt, 1 Watt nonisolated DC output from AC inputs between 80 and 265 volts. In this example, the IC i s pro grammed to deliver a maximum on time gate drive pulse width of 2.4 microseconds which occurs at 80 VAC. The corresponding switching frequency is approximately 100kHz at low line, and overal l efficiency is approximately 50%. Additional design informat ion is ava ilable in Unitrode Application Note U-149.

UDG-93062-3

PARAMETER TEST CONDITIONS MIN TYP MAX UNITS

General

CC Zener Voltage ICC < 1.5mA 8.6 9.0 9.3 V

Startup Current V

OUT = 0 150 250 µA

Operating Cur ren t I(V

OUT) VOUT = 11V, F = 150kHz 1.2 2.5 mA

Under-Voltage-Locko ut

Start Thresh o ld V

OUT = 0 8.0 8.4 8.8 V

Minimum Oper ating Volt age af t er Star t V

OUT = 0 6.0 6.3 6.6 V

Hysteresis V

OUT = 0 1. 8 V

Oscillato r

Amplitude V

CC = 9V 3.5 3.7 3.9 V

T to DRIVE high Propagation Delay Overdrive = 0.2V 100 200 ns

T to DRIVE low Propagation Delay Overdrive = 0.2V 50 100 ns

Driver

VOL I = 20mA, V

CC = 9V 0.15 0.4 V

I = 100mA, V

CC = 9V 0.7 1.8 V

VOH I = −20mA, V

CC = 9V 8.5 8.8 V

I = −100mA, VCC = 9V 6.1 7.8 V

Rise Time C

LOAD = 1nF 35 70 ns

Fall Time C

LOAD = 1nF 30 60 ns

Line Voltage Det ect i on

Charge Coefficient : I

CHG / I(TON) VCT = 3V, DRIVE = High, I(TON) = 1mA 0.73 0.79 0.85

Minimum Line Voltage for Fault R

ON = 330k 60 80 100 V

Minimum Current I(T

ON) for Fault RON = 330k 220 µA

On Time During Fault C

T = 150pF, VLINE = Min − 1V 2 µs

Oscillator Restart Delay after Fault 0.5 ms

OUT Error Amp

OUT Regulated 12 V (ADJ Open ) VCC = 9V, IDCHG = I(TOFF)/2 11.2 11.9 12.8 V

OUT Regulated 18 V (ADJ = 0V) VCC = 9V, IDCHG = I(TOFF)/2 16.5 17.5 19.5 V

Discharge Ratio: IDCHG / I(TOFF)I(TOFF) = 50µA 0.95 1.01 1.07 Voltage at T

OFF I(TOFF) = 50µ A 0.6 0.95 1.3 V

Regulation gm (Note 1) Max I

DCHG = 50µA 1.0 mA/V

Max I

DCHG = 125µA 0.8 1.7 2.9 mA/V

Unless otherwise stated , thes e specificat ions hold for TA = 0°C to 70°C for the UCC3889, -40°C to +85°C for the UCC2889, and -55°C to +12 5°C for the UCC1889. No load at DRIVE pin (C LOAD=0).

ELECTRICAL CHARACTERISTICS

DIL-8, SOIC-8 (Top View) N or J, D Package

CONNECTION DIAG RAM

ICC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5mA

Current into T

ON Pi n. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5mA

Voltag e on V

OUT Pi n. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V

Current into T

OFF Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250µA

Storage Temperature . . . . . . . . . . . . . . . . . . . . -65 °C to +150°C

Note: Unless oth erwise indicated, voltages are refere nced to ground and current s are pos itive int o, negative out of, the spe cified terminals .

ABSOLUTE MAXI MUM RATING S

UCC1889 UCC2889 UCC3889

Note 1: gm is def ined as

∆IDCHG

∆VOUT

for the values of V

OUT

when V

OUT

is in regulation. The t wo point s used to calculate gm are for

DCHG

at 65% and 35% of its maximum va lue.

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