TEXAS INSTRUMENTS TLC4501, TLC4501A, TLC4502, TLC4502A Technical data

TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
D
Self-Calibrates Input Offset Voltage to 40 µV Max
D
Low Input Offset Voltage Drift ...1 µV/°C
D
Input Bias Current ...1 pA
D
Open Loop Gain . . . 120 dB
D
Rail-To-Rail Output Voltage Swing
D
Stable Driving 1000 pF Capacitive Loads
D
Gain Bandwidth Product . . . 4.7 MHz
description
The TLC4501 and TLC4502 are the highest precision CMOS single supply rail-to-rail operational amplifiers available today. The input offset voltage is 10 µV typical and 40 µV maximum. This exceptional precision, combined with a 4.7-MHz bandwidth, 2.5-V/µs slew rate, and 50-mA output drive, is ideal for multiple applications including: data acquisition systems, measurement equipment, industrial control applications, and portable digital scales.
D
Slew Rate . . . 2.5 V/µs
D
High Output Drive Capability . . . ±50 mA
D
Calibration Time . . . 300 ms
D
Characterized From –55°C to 125°C
D
Available in Q-Temp Automotive
HighRel Automotive Applications Configuration Control / Print Support Qualification to Automotive Standards
These amplifiers feature
self-calibrating
circuitry which digitally trims the input offset voltage to less than 40 µV within the first 300 ms of operation. The offset is then digitally stored in an integrated successive approximation register (SAR). Immediately after the data is stored, the calibration circuitry effectively drops out of the signal path, shuts down, and the device functions as a standard operational amplifier.
Offset Control
D/A
SAR
Oscillator
A/D
1
OUT
4
GND
V
IN+
IN–
DD
3
2
Calibration Circuitry
8
Power-On
Reset
+
5 V
Control
Logic
Figure 1. Channel One of the TLC4502
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinEPIC and Self-Cal are trademarks of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
Copyright 1999, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.
1
TLC4501, TLC4501A, TLC4502, TLC4502A
0°C to 70°C
40°C to 125°C
40°C to 125°C
55°C to 125°C
FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
description (continued)
Using this technology eliminates the need for noisy and expensive chopper techniques, laser trimming, and power hungry, split supply bipolar operational amplifiers.
TLC4501
D PACKAGE
(TOP VIEW)
TLC4502
D OR JG PACKAGE
(TOP VIEW)
TLC4502
U PACKAGE
(TOP VIEW)
NC
1
1IN – 1IN +
V
/GND
DD –
NC – No internal connection
2 3 4
NC
NC
8
V
DD
OUT NC
+
7 6 5
V
DD –
NC
1IN–
NC
1IN+
NC
1OUT
1IN – 1IN +
/GND
FK PACKAGE
3 2 1 20 19
4 5 6 7 8
910111213
1 2 3 4
TLC4502
(TOP VIEW)
NC
1OUT
NC
NC
NC
/GND
DD–
V
8 7 6 5
DD+
V
2IN+
VDD+ 2OUT 2IN– 2IN+
NC
18 17 16 15 14
NC
NC 2OUT NC 2IN– NC
V
DD–
1OUT
1IN – 1IN +
/GND
1 2 3 4 5
10
9 8 7 6
NC V
DD
2OUT 2IN – 2IN +
+
T
A
°
°
°
°
°
The D package is also available taped and reeled.
2
°
°
°
VIOmax AT 25°C
AVAILABLE OPTIONS
PACKAGED DEVICES
SMALL
OUTLINE
40 µV TLC4501ACD 50 µV TLC4502ACD — 80 µV TLC4501CD
100 µV TLC4502CD
40 µV TLC4501AID — 50 µV TLC4502AID — 80 µV TLC4501ID
100 µV TLC4502ID
50 µV TLC4502AQD
100 µV TLC4502QD
50 µV TLC4502AMD TLC4502AMFKB TLC4502AMJGB TLC4502AMUB
100 µV TLC4502MD TLC4502MFKB TLC4502MJGB TLC4502MUB
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
(D)
CHIP CARRIER
(FK)
CERAMIC DIP
(JG)
CERAMIC FLAT
PACK
(U)
TLC4501, TLC4501A, TLC4502, TLC4502A
PACKAGE
A
A
JGU1050 mW
8.4 mW/ C
672 mW
546 mW
210 mW
UNIT
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Differential input voltage, VID (see Note 2) ±7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
Input current, II (each input) ±5 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current, IO (each output) ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Total current into V Total current out of V
Electrostatic discharge (ESD) > 2 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Duration of short-circuit current at (or below) 25°C (see Note 3) unlimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
Storage temperature range, T
Case temperature for 60 seconds, TC: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to V
2. Differential voltages are at IN+ with respect to IN–. Excessive current flows when an input is brought below V
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded.
(see Note 1) 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DD+
(any input, see Note 1) –0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DD+
/GND ±100 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DD–
: TLC4502C 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
A
TLC4502I –40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TLC4502Q –40°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
TLC4502M –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
/GND.
DD –
DD–
– 0.3 V.
T
25°C DERATING FACTOR T
POWER RATING ABOVE TA = 25°CAPOWER RATING
D
FK
725 mW
1375 mW
675 mW
11.0 mW/°C
recommended operating conditions
TLC4502C TLC4502I TLC4502Q TLC4502M
MIN MAX MIN MAX MIN MAX MIN MAX
Supply voltage, V Input voltage range, V Common-mode input voltage, V Operating free-air temperature, T
DD
I
IC
A
4 6 4 6 4 6 4 6 V
V
DD–VDD+
V
DD–VDD+
0 70 –40 125 –40 125 –55 125 °C
DISSIPATION RATING TABLE
5.8 mW/°C
°
5.4 mW/°C
– 2.3 V – 2.3 V
DD–VDD+ DD–VDD+
464 mW 880 mW
432 mW
= 70°C T
– 2.3 V – 2.3 V
POWER RATINGAPOWER RATING
DD–VDD+ DD–VDD+
= 85°C T
377 mW 715 mW
350 mW
– 2.3 V – 2.3 V
DD–VDD+ DD–VDD+
= 125°C
145 mW 275 mW
135 mW
– 2.3 V – 2.3 V
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3
TLC4501, TLC4501A, TLC4502, TLC4502A
PARAMETER
TEST CONDITIONS
T
UNIT
VIOInput offset voltage
DD
,
O
,
Full range
V
α
VIO
Full range
1µV/°C
,
IIOInput offset current
V
DD
±2.5 V,
V
O
0,
pA
IIBInput bias current
pA
I
mA
V
I
mA
A
gg g
IC
,
O
,
V/mV
CMRR
Common-mode rejection ratio
IC
,
O
,
dB
k
ygj
V
V
load
dB
TLC4501/A
IDDSupply current
V
No load
mA
TLC4502/A V
Calibration input threshold voltage
Full range
4
V
FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
electrical characteristics at specified free-air temperature, VDD = 5 V, GND = 0 (unless otherwise noted)
TLC450xC
MIN TYP MAX
–40 10 40
–100 10 100
200
12
10
µ
°
p
p
V
V
p
Temperature coefficient of input offset voltage
p
p
V
OH
V
OL
VD
R
I(D)
R
L
C
L
z
O
SVR
IT(CAL)
Full range is 0°C to 70°C.
NOTE 4: RL and CL values are referenced to 2.5 V .
High-level output voltage
Low-level output voltage
Large-signal differential voltage V amplification
Differential input resistance 25°C 10 k Input resistance See Note 4 25°C Common-mode input capacitance f = 10 kHz, P package 25°C 8 pF Closed-loop output impedance AV = 10, f = 100 kHz 25°C 1
Supply-voltage rejection ratio (V
DD ±
pp
/VIO)
p
A
TLC4501 –80 10 80
V
= ±2.5 V, V
VIC = 0,
V
= ±2.5 V,V
VIC = 0,
IOH = – 500 µA 25°C 4.99
= – 5
OH
VIC = 2.5 V, IOL = 500 µA 25°C 0.01
= 2.5 V,
IC
= 2.5 V, V
RL = 1 kΩ,
V
= 0 to 2.7 V, V
RS = 1 k
= 4 V to 6 V,
DD
= 2.5 V,
O
= 0,
RS = 50
= 0
RS = 50
= 5
OL
= 1 V to 4 V,
See Note 4
= 2.5 V,
IC
TLC4501A TLC4502 TLC4502A –50 10 50
25°C 1
Full range 500
25°C 1
Full range 500
25°C 4.9
Full range 4.7
25°C 0.1
Full range 0.3
25°C 200 1000
Full range
25°C 90 100
Full range 85
= 0, No
25°C 90 100
Full range 90
25°C 1 1.5
Full range 2
25°C 2.5 3.5
Full range 4
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
PARAMETER
TEST CONDITIONS
T
UNIT
SR
Slew rate at unity gain
V
C
100 pF
VnEquivalent input noise voltage
V/H
V
q
V
,
R
L
tsSettling time
s
operating characteristics, VDD= 5 V
p
N(PP)
I
n
THD + N Total harmonic distortion plus noise
B
OM
φ
m
Full range is 0°C to 70°C.
NOTE 4: RL and CL values are referenced to 2.5 V .
Peak-to-peak equivalent input noise voltage
Equivalent input noise current 25°C 0.6
Gain-bandwidth product
Maximum output swing bandwidth
Phase margin at unity gain RL = 1 kΩ, CL = 100 pF 25°C 74 Calibration time 25°C 300 ms
= 0.5 V to 2.5 V,
O
f = 10 Hz f = 1 kHz f = 0.1 to 1 Hz f = 0.1 to 10 Hz
VO = 0.5 V to 2.5 V, f = 10 kHz,
= 1 k
1 k,
R CL = 100 pF
f = 10 kHz, CL = 100 pF
V
= 2 V,
O(PP)
RL = 1 kΩ, AV = –1,
Step = 0.5 V to 2.5 V, RL = 1 kΩ, CL = 100 pF
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
SLOS221A – MA Y 1998 – REVISED JULY 1999
TLC450xC, TLC450xAC
A
p
=
L
AV = 1 25°C 0.02% AV = 10 25°C 0.08% AV = 100 25°C 0.55% RL = 1 kΩ,
AV = 1, CL = 100 pF
to 0.1% 25°C 1.6
to 0.01% 25°C 2.2
25°C 1.5 2.5 V/µs
Full range 1 V/µs
25°C 70 25°C 12 25°C 1 25°C 1.5
25°C 4.7 MHz
25°C 1 MHz
MIN TYP MAX
n
µ
fA/Hz
µ
z
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
5
TLC4501, TLC4501A, TLC4502, TLC4502A
PARAMETER
TEST CONDITIONS
T
UNIT
VIOInput offset voltage
DD
,
O
,
Full range
V
α
VIO
Full range
1µV/°C
DD
O
I
mA
V
I
mA
A
gg g
IC
,
O
,
V/mV
CMRR
Common-mode rejection ratio
IC
,
O
,
dB
k
ygj
V
V
load
dB
TLC4501/A
IDDSupply current
V
No load
mA
TLC4502/A V
Calibration input threshold voltage
Full range
4
V
FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
electrical characteristics at specified free-air temperature, VDD = 5 V, GND = 0 (unless otherwise noted)
TLC450xI
MIN TYP MAX
–40 10 40
–100 10 100
1
500
500
200
12
10
µ
°
pA
pA
V
V
p
Temperature coefficient of input offset voltage
I
IO
I
IB
V
OH
V
OL
VD
R
I(D)
R
L
C
L
z
O
SVR
IT(CAL)
Full range is –40°C to 125°C.
NOTE 4: RL and CL values are referenced to 2.5 V .
Input offset current
Input bias current
High-level output voltage
Low-level output voltage
Large-signal differential voltage V amplification
Differential input resistance 25°C 10 k Input resistance See Note 4 25°C Common-mode input capacitance f = 10 kHz, P package 25°C 8 pF Closed-loop output impedance AV = 10, f = 100 kHz 25°C 1
Supply-voltage rejection ratio (V
DD ±
pp
/VIO)
p
A
TLC4501 –80 10 80
V
= ±2.5 V, V
VIC = 0,
VDD = ±2.5 V, VO = 0, VIC = 0,
VDD = ±2.5 V, VIC = 0,
IOH = – 500 µA 25°C 4.99
= – 5
OH
VIC = 2.5 V, IOL = 500 µA 25°C 0.01
= 2.5 V,
IC
= 2.5 V, V
RL = 1 kΩ,
V
= 0 to 2.7 V, V
RS = 1 k
= 4 V to 6 V,
DD
= 2.5 V,
O
= 0,
RS = 50
RS = 50
VO = 0, RS = 50
= 5
OL
= 1 V to 4 V,
See Note 4
= 2.5 V,
IC
TLC4501A TLC4502 TLC4502A –50 10 50
25°C
–40°C to
85°C
Full range 5 nA
25°C 1
–40°C to
85°C
Full range 10 nA
25°C 4.9
Full range 4.7
25°C 0.1
Full range 0.3
25°C 200 1000
Full range
25°C 90 100
Full range 85
= 0, No
25°C 90 100
Full range 90
25°C 1 1.5
Full range 2
25°C 2.5 3.5
Full range 4
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
PARAMETER
TEST CONDITIONS
T
UNIT
SR
Slew rate at unity gain
V
C
100 pF
VnEquivalent input noise voltage
V/H
V
q
V
,
R
L
tsSettling time
s
operating characteristics, VDD= 5 V
p
N(PP)
I
n
THD + N Total harmonic distortion plus noise
B
OM
φ
m
Full range is –40°C to 125°C.
NOTE 4: RL and CL values are referenced to 2.5 V .
Peak-to-peak equivalent input noise voltage
Equivalent input noise current 25°C 0.6
Gain-bandwidth product
Maximum output swing bandwidth
Phase margin at unity gain RL = 1 kΩ, CL = 100 pF 25°C 74 Calibration time 25°C 300 ms
= 0.5 V to 2.5 V,
O
f = 10 Hz f = 1 kHz f = 0.1 to 1 Hz f = 0.1 to 10 Hz
VO = 0.5 V to 2.5 V, f = 10 kHz,
= 1 k
1 k,
R CL = 100 pF
f = 10 kHz, CL = 100 pF
V
= 2 V,
O(PP)
RL = 1 kΩ, AV = –1,
Step = 0.5 V to 2.5 V, RL = 1 kΩ, CL = 100 pF
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
SLOS221A – MA Y 1998 – REVISED JULY 1999
A
p
=
L
AV = 1 25°C 0.02% AV = 10 25°C 0.08% AV = 100 25°C 0.55% RL = 1 kΩ,
AV = 1, CL = 100 pF
to 0.1% 25°C 1.6
to 0.01% 25°C 2.2
25°C 1.5 2.5 V/µs
Full range 1 V/µs
25°C 70 25°C 12 25°C 1 25°C 1.5
25°C 4.7 MHz
25°C 1 MHz
TLC450xI, TLC450xAI
MIN TYP MAX
n
µ
fA/Hz
µ
z
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
7
TLC4501, TLC4501A, TLC4502, TLC4502A
A
VIOInput offset voltage
DD
,
O
,
Full range
V
α
VIO
Full range
1µV/°C
,
IIOInput offset current
V
DD
±2.5 V,
V
O
0,
nA
IIBInput bias current
nA
I
mA
V
2.5 V
I
5 mA
A
gg g
IC
,
O
,
V/mV
CMRR
Common-mode rejection ratio
IC
,
O
,
dB
k
ygj
DD
,
IC DD
,
dB
IDDSupply current
V
No load
mA
V
Calibration input threshold voltage
Full range
4
V
FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
electrical characteristics at specified free-air temperature, VDD = 5 V, GND = 0 (unless otherwise noted)
TLC4502Q,
PARAMETER TEST CONDITIONS
V
p
Temperature coefficient of input offset voltage
p
p
V
OH
V
OL
VD
R
I(D)
R
L
C
L
z
O
SVR
IT(CAL)
Full range is –40°C to 125°C for Q suffix, –55°C to 125°C for M suffix.
NOTE 4: RL and CL values are referenced to 2.5 V .
High-level output voltage
Low-level output voltage
Large-signal differential voltage V amplification
Differential input resistance 25°C 10 k Input resistance See Note 4 25°C Common-mode input capacitance f = 10 kHz, P package 25°C 8 pF Closed-loop output impedance AV = 10, f = 100 kHz 25°C 1
Supply-voltage rejection ratio V (V
DD ±
pp
/VIO)
p
= ±2.5 V, V
VIC = 0,
V
= ±2.5 V,V
VIC = 0,
IOH = – 500 µA 25°C 4.99
= – 5
OH
VIC = 2.5 V, IOL = 500 µA 25°C 0.01
,
=
IC
= 2.5 V, V
RL = 1 kΩ,
V
= 0 to 2.7 V, V
RS = 1 k
= 4 V to 6 V, V
No load
= 2.5 V,
O
= 0,
RS = 50
= 0
RS = 50
=
OL
= 1 V to 4 V,
See Note 4
= 2.5 V,
= V
TLC4502 TLC4502A
/2,
T
25°C 1
125°C
25°C 1
125°C 10
25°C 4.9
Full range 4.7
25°C 0.1
Full range 0.3
25°C 200 1000
Full range
25°C 90 100
Full range 85
25°C 90 100
Full range 90
25°C 2.5 3.5
Full range 4
TLC4502M
MIN TYP MAX
–100 10 100
–50 10 50
200
12
10
UNIT
µ
°
5
V
V
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SR
Slew rate at unity gain
O
,
L
VnEquivalent input noise voltage
V/H
V
q
V
,
R
L
tsSettling time
s
operating characteristics, VDD= 5 V
PARAMETER TEST CONDITIONS
V
= 0.5 V to 2.5 V, C
See Note 4
p
N(PP)
I
n
THD + N Total harmonic distortion plus noise
B
OM
φ
m
Full range is –40°C to 125°C for Q suffix, –55°C to 125°C for M suffix.
NOTE 4: RL and CL values are referenced to 2.5 V .
Peak-to-peak equivalent input noise voltage
Equivalent input noise current 25°C 0.6
Gain-bandwidth product
Maximum output swing bandwidth
Phase margin at unity gain RL = 1 kΩ, CL = 100 pF 25°C 74 Calibration time 25°C 300 ms
f = 10 Hz f = 1 kHz f = 0.1 to 1 Hz f = 0.1 to 10 Hz
VO = 0.5 V to 2.5 V, f = 10 kHz,
= 1 k
1 k,
R CL = 100 pF
f = 10 kHz, CL = 100 pF
V
= 2 V,
O(PP)
RL = 1 kΩ, AV = –1,
Step = 0.5 V to 2.5 V, RL = 1 kΩ, CL = 100 pF
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
SLOS221A – MA Y 1998 – REVISED JULY 1999
TLC4502Q, TLC4502M,
T
A
= 100 pF
AV = 1 25°C 0.02% AV = 10 25°C 0.08% AV = 100 25°C 0.55% RL = 1 kΩ,
AV = 1, CL = 100 pF
to 0.1% 25°C 1.6
to 0.01% 25°C 2.2
25°C 1.5 2.5 V/µs
Full range 1 V/µs
25°C 70 25°C 12 25°C 1 25°C 1.5
25°C 4.7 MHz
25°C 1 MHz
TLC4502AQ,
TLC4502AM
MIN TYP MAX
UNIT
n
µ
fA/Hz
µ
z
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
9
TLC4501, TLC4501A, TLC4502, TLC4502A
VIOInput offset voltage
AVDLarge-signal differential voltage amplification
CMRR
Common-mode rejection ratio
qy
SR
Slew rate
φmPhase margin
FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
TYPICAL CHARACTERISTICS
Table of Graphs
p
VIO
α
V
OH
V
OL
V
O(PP)
I
OS
V
O
z
o
V
n
THD + N Total harmonic distortion plus noise vs Frequency 26
PSRR Power-supply rejection ratio vs Free-air temperature 30
Input offset voltage temperature coefficient Distribution 6, 7 High-level output voltage vs High-level output current 8 Low-level output voltage vs Low-level output current 9 Maximum peak-to-peak output voltage vs Frequency 10 Short-circuit output current vs Free-air temperature 11 Output voltage vs Differential input voltage 12
p
Output impedance vs Frequency 15
Inverting large-signal pulse response 20 Voltage-follower large-signal pulse response 21 Inverting small-signal pulse response 22 Voltage-follower small-signal pulse response 23 Equivalent input noise voltage vs Frequency 24 Input noise voltage Over a 10-second period 25
Gain-bandwidth product vs Free-air temperature 27
Gain margin vs Load capacitance 29
Calibration time at –40°C 31 Calibration time at 25°C 32 Calibration time at 85°C 33
Calibration time at 125°C 34
Distribution 2, 3, 4 vs Common-mode input voltage 5
vs Free-air temperature 13 vs Frequency
vs Frequency 16 vs Free-air temperature 17
vs Load capacitance 18 vs Free-air temperature 19
vs Load capacitance 28 vs Frequency 14
FIGURE
14
10
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLC4502 INPUT
18
339 Amplifier From 2 Wafer Lot VDD = ± 2.5 V
16
TA = 40°C
14
12
10
8
6
Percentage Of Amplification – %
4
2
0
–40
DISTRIBUTION OF TLC4502 INPUT
16
296 Amplifier From 2 Wafer Lot VDD = ± 2.5 V
14
TA = 85°C
12
OFFSET VOLTAGE
0
–30
–20
VIO – Input Offset Voltage – µV
–10
10
Figure 2
OFFSET VOLTAGE
20
30
40
14
486 Amplifier From 8 Wafer Lot VDD = ± 2.5 V
12
TA = 25°C
10
8
6
4
Percentage of Amplifiers – %
2
0
–60
200
150
Vµ
100
DISTRIBUTION OF TLC4502 INPUT
OFFSET VOLTAGE
0
10
20
30
–50
–40
–30
–20
VIO – Input Offset Voltage – µV
–10
40
Figure 3
INPUT OFFSET VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
VDD = ±2.5 V RS = 50 TA = 25°C
50
60
10
8
6
4
Percentage Of Amplification – %
2
0
–50
–40
50
0
–50
– Input Offset Voltage –
–100
IO
V
–150
0
10
–30
–20
–10
VIO – Input Offset Voltage – µV
20
30
40
50
–200
–3 –2 –1 0
VIC – Common-Mode Input Voltage – v
Figure 4 Figure 5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
123
11
TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLC4502 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
25
30 Amplifiers From 1 Wafer Lot VDD = ± 2.5 V TA = 25°C To –40°C
20
15
10
Percentage Of Amplifiers – %
5
0
–3 –2 0 1
5
4.5
4
3.5
3
2.5
α
– Temperature Coefficient – µV/°C
VIO
23–1
Figure 6
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
TA = –40°C
TA = 125°C
TA = 25°C
TA = 85°C
VDD = 5 V VIC = 2.5 V
DISTRIBUTION OF TLC4502 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
20
30 Amplifiers From 1 Wafer Lot
18
VDD = ± 2.5 V
16
TA = 25°C To 85°C
14
12
10
8
6
Percentage Of Amplifiers – %
4 2
0
–3.5–3–2.5–2–1.5–1–0.5
2
VDD = 5 V VIC = 2.5 V
1.75
1.5
1.25
1
0
0.511.522.5
α
– Temperature Coefficient – µV/°C
VIO
Figure 7
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
TA = 125°C
TA = 85°C
TA = 25°C
3
3.5
12
2
1.5
1
OH
VOH – High-Level Output Voltage – V
V
0.5 0
010203040
IOH – High-Level Output Current – mA
Figure 8
0.75
– Low-Level Output Voltage – V
0.5
OL
V
0.25
0
50 60 70 80
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TA = –40°C
0102030 4050
IOL – Low-Level Output Current – mA
Figure 9
60 70 80
TLC4501, TLC4501A, TLC4502, TLC4502A
A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
TYPICAL CHARACTERISTICS
– Maximum Peak-To-Peak Output Voltage – V
O(PP)
V
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
10
VDD = 5 V
8
6
4
2
0
100
1 k 10 k 100 k 1 M 10 M
f – Frequency – Hz
Figure 10
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
3
2
1
VDD = 5 V VIC = 2.5 V RL = 1 k TA = 25°C
SHORT-CIRCUIT OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE
69
67
65
63
61
59
– Short-Circuit Output Current – mA
57
OS
I
55
–50 –25 0 25
I
OS+
I
OS–
TA – Free-Air Temperature – °C
Figure 11
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
1600
1400
1200
1000
RL = 1 k
50 75 100
0
– Output Voltage – V
–1
O
V
–2
–3
–0.2 –0.15 –0.1 –0.05
VID – Differential Input Voltage – mV
0.05 0.1
0.15
0.20
Figure 12
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
800
600
– Large-Signal Differential
400
VD
Voltage Amplification – V/mV
200
0
–55 –30 –5 20 45
TA – Free-Air Temperature – °C
70 95 120
Figure 13
13
TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
80
60
VDD = 5 V RL = 1 k CL = 100 pF TA = 25°C
180°
135°
40
20
0
– Large-Signal Differential
Voltage Amplification – dB
VD
A
–20
–40
1 k
10 k 100 k 1 M 10 M 100 M
OUTPUT IMPEDANCE
1000
100
10
90°
45°
Phase Margin
0°
–45°
–90°
f – Frequency – Hz
Figure 14
vs
FREQUENCY
14
1
AV = 100
0.1
– Output Impedance –
O
z
0.01
0.001 100
AV = 10
AV = 1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
1 k 10 k 100 k 1 M
f – Frequency – Hz
Figure 15
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
TYPICAL CHARACTERISTICS
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
110 100
90
80
70
60
50 40 30
20
CMRR – Common-Mode Rejection Ratio – dB
10
100
1 k 10 k 100 k 1 M 10 M
f – Frequency – Hz
VDD = 5 V VIC = 2.5 V TA = 25°C
Figure 16
SLEW RATE
vs
LOAD CAPACITANCE
6
5
sµ
4
SR+
COMMON-MODE REJECTION RATIO
vs
FREE-AIR TEMPERATURE
130
VDD = 5 V
125
120
115
110
105
100
95
CMRR – Common-Mode Rejection Ratio – dB
90
–50 –25 0 25 50
TA – Free-Air Temperature – °C
Figure 17
SLEW RATE
vs
FREE-AIR TEMPERATURE
8
VDD = 5 V RL = 1 k CL = 100 pF AV = 1
6
sµ
V/
SR–
75 100 125
3
2
SR – Slew Rate – V/
1
0
10
SR–
100 1 k 10 k 100 k
CL – Load Capacitance – pF
Figure 18
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
4
SR – Slew Rate –
2
0
–50 –25 0 25 50
TA – Free-Air Temperature – °C
SR+
75 100 125
Figure 19
15
TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
TYPICAL CHARACTERISTICS
VOLTAGE-FOLLOWER LARGE-SIGNAL
INVERTING LARGE-SIGNAL PULSE RESPONSE
4.5
4.5
PULSE RESPONSE
4
3.5
3
2.5
2
– Output Voltage – V
O
V
1.5
1
0.5 0 25 50 75 100 125
VDD = 5 V RL = 1 k CL = 100 pF AV = –1 TA = 25°C
150 175 200
t – Time – µs
Figure 20
INVERTING SMALL-SIGNAL PULSE RESPONSE
2.525
2.52
2.515
2.51
2.505
4
3.5
3
2.5
2
– Output Voltage – V
O
V
1.5
1
0.5 0 25 50 75 100 125
VOLTAGE-FOLLOWER SMALL-SIGNAL
PULSE RESPONSE
2.53
2.52
2.51
VDD = 5 V RL = 1 k CL = 100 pF AV = 1 TA = 25°C
150 175 200
t – Time – µs
Figure 21
VDD = 5 V RL = 1 k CL = 100 pF AV = 1 TA = 25°C
– Output Voltage – V
O
V
16
2.5
2.495
2.49
2.485
2.48
2.475
2.47 0 20 40 60 80 100 120
VDD = 5 V RL = 1 k CL = 100 pF AV = –1 TA 25°C
Figure 22
t – Time – µs
2.5
– Output Voltage – V
2.49
O
V
2.48
2.47
140 160 180 200
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
0 50 100 150
200 250
t – Time – µs
Figure 23
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
TYPICAL CHARACTERISTICS
100
VDD = 5 V RS = 20
90
nV/ Hz
n
V
VN – Equivalent Input Noise Voltage – nv//Hz
TA = 25°C
80 70
60 50
40 30
20
10
0
10 100 1 k
TOTAL HARMONIC DISTORTION PLUS NOISE
1
VDD = 5 V RL = 1 kΩ TIED 2.5 V
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
10 k 100 k
f – Frequency – Hz
Figure 24
vs
FREQUENCY
AV = 100
INPUT NOISE VOLTAGE OVER
A 10-SECOND PERIOD
1200
VDD = 5 V f = 0.1 Hz To 10 Hz TA = 25°C
400
–400
Input Noise Voltage – nV
–1200
0123456
GAIN-BANDWIDTH PRODUCT
FREE-AIR TEMPERATURE
6
VDD = 5 V F = 10 kHz RL = 1 k CL = 100 pF
5.5
78910
t – Time – s
Figure 25
vs
0.1
THD+N – Total Harmonic Distortion Plus Noise – %
0.01 100 1 k 10 k 100 k
AV = 10
AV = 1
f – Frequency – Hz
Figure 26
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
5
4.5
Gain-Bandwidth Product – MHz
4
–40 –25 0 25
TA – Free-Air Temperature –°C
Figure 27
50 75 85
17
TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
TYPICAL CHARACTERISTICS
90
75
60
45
Phase Margin
30
15
V
I
0
10
130
125
PHASE MARGIN
vs
LOAD CAPACITANCE
R
= 50
null
R
= 20
null
50 k
V
50 k
DD+
R
null
+ V
DD–
100 1 k 10 k 100 k
CL – Load Capacitance – pF
R
= 0
null
C
L
Figure 28
POWER SUPPLY REJECTION RATIO
vs
FREE-AIR TEMPERATURE
VDD = 4 V To 6 V VIC = VO = VDD/2
30
TA 25°C
25
20
15
Gain Margin – dB
10
5
0
10
0.5
0
GAIN MARGIN
vs
LOAD CAPACITANCE
R
= 50
null
100 1 k
CL – Load Capacitance – pF
R
null
R
= 20
null
= 0
10 k 100 k
Figure 29
CALIBRATION TIME AT –40°C
120
115
110
105
PSRR – Power Supply Rejection Ratio – dB
100
–50 –25 0 25 50
TA – Free-Air Temperature – °C
Figure 30
18
–0.5
–1
–1.5
– Output Voltage – V
O
–2
V
–2.5
–3
75 100 125
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
0 100 200 300 400 500 600
VDD = 2.5 V GND = –2.5 V RL = 1 k to GND AV = –1 VI = 0
700 800 900 1000
t – Time – ms
Figure 31
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
TYPICAL CHARACTERISTICS
CALIBRATION TIME AT 25°C
0.5
0
–0.5
–1
–1.5
– Output Voltage – V
O
–2
V
–2.5
–3
0 100 200 300 400 500 600
t – Time – ms
Figure 32
VDD = 2.5 V GND = –2.5 V RL = 1 k to GND AV = –1 VI = 0
700 800 900 1000
CALIBRATION TIME AT 125°C
0.5
CALIBRATION TIME AT 85°C
0.5
0
–0.5
–1
–1.5
– Output Voltage – V
O
–2
V
–2.5
–3
0 100 200 300 400 500 600
VDD = 2.5 V GND = –2.5 V RL = 1 k to GND AV = –1 VI = 0
700 800 900 1000
t – Time – ms
Figure 33
0
–0.5
–1
–1.5
– Output Voltage – V
O
–2
V
–2.5
–3
VDD = 2.5 V GND = –2.5 V RL = 1 k to GND AV = –1 VI = 0
0 100 200 300 400 500 600
t – Time – ms
Figure 34
700 800 900 1000
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
19
TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
APPLICATION INFORMATION
D
The TLC4502 is designed to operate with only a single 5-V power supply , have true differential inputs, and remain in the linear mode with an input common-mode voltage of 0.
D
The TLC4502 has a standard dual-amplifier pinout, allowing for easy design upgrades.
D
Large differential input voltages can be easily accommodated and, as input differential-voltage protection diodes are not needed, no large input currents result from large differential input voltage. Protection should be provided to prevent the input voltages from going negative more than –0.3 V at 25°C. An input clamp diode with a resistor to the device input terminal can be used for this purpose.
D
For ac applications, where the load is capacitively coupled to the output of the amplifier, a resistor can be used from the output of the amplifier to ground. This increases the class-A bias current and prevents crossover distortion. Where the load is directly coupled, for example in dc applications, there is no crossover distortion.
D
Capacitive loads, which are applied directly to the output of the amplifier, reduce the loop stability margin. V alues of 500 pF can be accommodated using the worst-case noninverting unity-gain connection. Resistive isolation should be considered when larger load capacitance must be driven by the amplifier.
The following typical application circuits emphasize operation on only a single power supply. When complementary power supplies are available, the TLC4502 can be used in all of the standard operational amplifier circuits. In general, introducing a pseudo-ground (a bias voltage of VI/2 like that generated by the TLE2426) allows operation above and below this value in a single-supply system. Many application circuits shown take advantage of the wide common-mode input-voltage range of the TLC4502, which includes ground. In most cases, input biasing is not required and input voltages that range to ground can easily be accommodated.
description of calibration procedure
To achieve high dc gain, large bandwidth, high CMRR and PSRR, as well as good output drive capability, the TLC4502 is built around a 3-stage topology: two gain stages, one rail-to-rail, and a class-AB output stage. A nested Miller topology is used for frequency compensation.
During the calibration procedure, the operational amplifier is removed from the signal path and both inputs are tied to GND. Figure 35 shows a block diagram of the amplifier during cabilbration mode.
20
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
V
DD
POWER-ON RESET
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
Q
S
R
LPF
ENABLE
RC
Q
OSCILLATOR
CLOCK RESET
Figure 35. Block Diagram During Calibration Mode
SAR
COUNTER
RCO
CAL
RCO
DAC
CORE
AMPLIFIER
+
The class AB output stage features rail-to-rail voltage swing and incorporates additional switches to put the output node into a high-impedance mode during the calibration cycle. Small-replica output transistors (matched to the main output transistors) provide the amplifier output signal for the calibration circuit. The TLC4502 also features built-in output short-circuit protection. The output current flowing through the main output transistors is continuously being sensed. If the current through either of these transistors exceeds the preset limit (60 mA – 70 mA) for more than about 1 µs, the output transistors are shut down to approximately their quiescent operating point for approximately 5 ms. The device is then returned to normal operation. If the short circuit is still in place, it is detected in less than 1 µs and the device is shut down for another 5 ms.
The offset cancellation uses a current-mode digital-to-analog converter (DAC), whose full-scale current allows for an adjustment of approximately ±5 mV to the input offset voltage. The digital code producing the cancellation current is stored in the successive-approximation register (SAR).
During power up, when the offset cancellation procedure is initiated, an on-chip RC oscillator is activated to provide the timing of the successive-approximation algorithm. T o prevent wide-band noise from interfering with the calibration procedure, an analog low-pass filter followed by a Schmidt trigger is used in the decision chain to implement an averaging process. Once the calibration procedure is complete, the RC oscillator is deactivated to reduce supply current and the associated noise.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
21
TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
APPLICATION INFORMATION
The key operational-amplifier parameters CMRR, PSRR, and offset drift were optimized to achieve superior offset performance. The TLC4502 calibration DAC is implemented by a binary-weighted current array using a pseudo-R-2R MOSFET ladder architecture, which minimizes the silicon area required for the calibration circuitry, and thereby reduces the cost of the TLC4502.
Due to the performance (precision, PSRR, CMRR, gain, output drive, and ac performance) of the TLC4502, it is ideal for applications like:
D
Data acquisition systems
D
Medical equipment
D
Portable digital scales
D
Strain gauges
D
Automotive sensors
D
Digital audio circuits
D
Industrial control applications
It is also ideal in circuits like:
D
A precision buffer for current-to-voltage converters, a/d buffers, or bridge applications
D
High-impedance buffers or preamplifiers
D
Long term integration
D
Sample-and-hold circuits
D
Peak detectors
The TLC4502 self-calibrating operational amplifier is manufactured using Texas instruments LinEPIC process technology and is available in an 8-pin SOIC (D) Package. The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized for operation from –40°C to 125°C.The M-suffix devices are characterized for operation from –55°C to 125°C.
22
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
APPLICATION INFORMATION
V
(REF)+
V
(REF)–
R
V
I2
V
I1
P
1 k
R
P
1 k
(Gain+10) VO+ǒVI1*
R1
90 kR29 kR31 kR41 kR59 kR690 k
Gain = 10Gain = 10 Gain = 100Gain = 100
V
V
DD
DD
V
Ǔ
I2
0.1 pF
ǒ
1
)
R6
R4)R5
6
1/2
TLC4502
+
Ǔ
)
V
(REF) Where R1+R6, R2+R5, and R3+R4
4
71
V
O+
V
O–
8
2
1/2
TLC4502
35
+
(Gain+100) VO+
ǒ
VI1*
V
I2
R5)R6
Ǔ
ǒ
1
)
R4
Ǔ
)
V
(REF) Where R1+R6, R2+R5, and R3+R4
Figure 36. Single-Supply Programmable Instrumentation Amplifier Circuit
RP1 < 1 k
5
+
V
I
RP2 < 1 k
V
(REF)
R1
3
2
+
1/2
TLC4502
R2
R3
1
R
G
6
1/2
TLC4502
VO+
4
V
ƪ
I
Where : R1+R4 and R2+R3
R4
ǒ
7
Ǔ
) ǒ
2R4
R
R4
1
)
R3
V
O
Ǔ
)
V
ƫ
G
(REF)
Figure 37. T wo Operational-Amplifier Instrumentation Amplifier Circuit
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
23
TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
APPLICATION INFORMATION
3
+
2
1/2
TLC4502
R3
1
R5
R1
V
I
R
G
6
5
1/2
TLC4502
+
R2
R4
7
V
(REF)
R6
2
3
1/2
TLC4502
+
R5
ǒ
VO+
Where : R1+R2, R3+R4, and R5+R6
Ǔ
V
ǒ
I
R3
Figure 38. Three Operational-Amplifier Instrumentation Amplifier Circuit
V
I
R1
2
R4
1
2R1
R
V
O
)
1
Ǔ)
V
G
(REF)
24
R2
3
1/2
TLC4502
+
1
Figure 39. Fixed Current-Source Circuit
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
R5
I1
I2
R3
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
APPLICATION INFORMATION
2
2
3
1/2
TLC4502
V
3
I
+
1
Figure 40. Voltage-Follower Circuit
2
3
1/2
TLC4502
+
30 mA
1
β 20
100
Figure 41. Lamp-Driver Circuit
1/2
TLC4502
+
1
R
L
240
VI+
V
V
I
V
O
O
600 mA
Figure 42. TTL-Driver Circuit
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
25
TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
APPLICATION INFORMATION
I
O
+
V
3
I
2
1/2
TLC4502
1
IO+
V
I
R
E
R
E
Figure 43. High-Compliance Current-Sink Circuit
2
V
(REF)
V
I
R1
10 k
3
1/2
TLC4502
+
10 M
R2
1
V
O
Figure 44. Comparator With Hysteresis Circuit
I
B
6
2
1/2
TLC4502
V
3
I
Z
I
+
1
C1 1 µF
I
B
5
1/2
TLC4502
+
7
V
Z
O
O
26
Figure 45. Low-Drift Detector Circuit
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
macromodel information
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
SLOS221A – MA Y 1998 – REVISED JULY 1999
APPLICATION INFORMATION
Macromodel information provided was derived using Microsim software used with Microsim
PSpice
. The Boyle macromodel (see Note 4) and subcircuit in Figure 46 are
Parts
Release 8, the model generation
generated using the TLC4501 typical electrical and operating characteristics at TA = 25°C. Using this information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
D
Maximum positive output voltage swing
D
Maximum negative output voltage swing
D
Slew rate
D
Quiescent power dissipation
D
Input bias current
D
Open-loop voltage amplification
NOTE 4: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Intergrated Circuit Operational Amplifiers”,
V
V
Journal of Solid-State Circuits,
3
DD+
RP
2
IN –
IN+
1
DP
4
DD–
ISS
SC-9, 353 (1974).
RSS
10
J1 J2
11
C1
RD1
CSS
12
RD2
+
VD
DC
DE
+
VE
53
54
D
Unity-gain frequency
D
Common-mode rejection ratio
D
Phase margin
D
DC output resistance
D
AC output resistance
D
Short-circuit output current limit
EGND
R2 6
9
+
VB
90
HLIM
+
GCM
+
DLP
+
91
C2
GA
DLN
FB
99
RO2
7
+
VLIM
92
VLNVLP
+
8
RO1
5
IEEE
OUT
.subckt TLC4501 1 2 3 4 5 *
c2 6 7 8.0000E–12 css 10 99 1.0000E–30 dc 5 53 dy de 54 5 dy dlp 90 91 dx dln 92 90 dx dp 4 3 dx egnd 99 0 poly(2) (3,0) (4,0) 0 .5 .5 fb 7 99 poly(5) vb vc ve vlp vln 0
ga 6 0 11 12 236.25E–6 gcm 0 6 10 99 2.3625E–9 iss 10 4 dc 20.000E–6 hlim 90 0 vlim 1K j1 11 2 10 jx1 j2 12 1 10 jx2
c1 11 12 1.4559E–12
+ 84.657E9 –1E3 1E3 85E9 –85E9
Figure 46. Boyle Macromodel and Subcircuit
PSpice
and
Parts
are trademarks of MicroSim Corporation.
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
r2 6 9 100.00E3 rd1 3 11 4.2328E3 rd2 3 12 4.2328E3 ro1 8 5 5.0000E–3 ro2 7 99 5.0000E–3 rp 3 4 5.0000E3 rss 10 99 10.000E6 vb 9 0 dc 0 vc 3 53 dc .92918 ve 54 4 dc .82918 vlim 7 8 dc 0 vlp 91 0 dc 67 vln 0 92 dc 67
.model dx D(Is=800.00E–18) .model dy D(Is=800.00E–18 Rs=1m Cjo=10p) .model jx1 NJF(Is=500.00E–15 Beta=2.7907E–3 Vto=–1) .model jx2 NJF(Is=500.00E–15 Beta=2.7907E–3 Vto=–1) .ends
27
TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
MECHANICAL INFORMATION
D (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
14
1
0.069 (1,75) MAX
0.050 (1,27)
A
0.020 (0,51)
0.014 (0,35)
0.010 (0,25)
0.004 (0,10)
8
7
0.010 (0,25)
0.157 (4,00)
0.150 (3,81)
M
0.244 (6,20)
0.228 (5,80)
Seating Plane
0.004 (0,10)
PINS **
DIM
A MAX
A MIN
0.008 (0,20) NOM
Gage Plane
0°–8°
8
0.197
(5,00)
0.189
(4,80)
14
0.344
(8,75)
0.337
(8,55)
0.010 (0,25)
0.044 (1,12)
0.016 (0,40)
4040047/D 10/96
16
0.394
(10,00)
0.386
(9,80)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15). D. Falls within JEDEC MS-012
28
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
MECHANICAL INFORMATION
FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A SQ
B SQ
20
22
23
24
25
19
21
12826 27
12
1314151618 17
0.020 (0,51)
0.010 (0,25)
MIN
0.342
(8,69)
0.442
0.640
0.739
0.938
1.141
A
0.358
(9,09)
0.458
(11,63)
0.660
(16,76)
0.761
(19,32)(18,78)
0.962
(24,43)
1.165
(29,59)
NO. OF
TERMINALS
**
11
10
9
8
7
6
5
432
20
28
44
52
68
84
0.020 (0,51)
0.010 (0,25)
(11,23)
(16,26)
(23,83)
(28,99)
MINMAX
0.307
(7,80)
0.406
(10,31)
0.495
(12,58)
0.495
(12,58)
0.850
(21,6)
1.047
(26,6)
0.080 (2,03)
0.064 (1,63)
B
MAX
0.358 (9,09)
0.458
(11,63)
0.560
(14,22)
0.560
(14,22)
0.858 (21,8)
1.063 (27,0)
0.055 (1,40)
0.045 (1,14)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a metal lid. D. The terminals are gold plated. E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
4040140/D 10/96
29
TLC4501, TLC4501A, TLC4502, TLC4502A FAMILY OF SELF-CALIBRATING (Self-Cal) PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
MECHANICAL INFORMATION
JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE PACKAGE
0.400 (10,20)
0.355 (9,00)
0.063 (1,60)
0.015 (0,38)
0.100 (2,54)
8
1
5
4
0.065 (1,65)
0.045 (1,14)
0.020 (0,51) MIN
0.280 (7,11)
0.245 (6,22)
0.200 (5,08) MAX
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0.310 (7,87)
0.290 (7,37)
Seating Plane
0°–15°
0.014 (0,36)
0.008 (0,20)
NOTES: A. All linear dimensions are in inches (millimeters).
30
B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only. E. Falls within MIL-STD-1835 GDIP1-T8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
4040107/C 08/96
TLC4501, TLC4501A, TLC4502, TLC4502A
FAMILY OF SELF-CALIBRATING (Self-Cal)
PRECISION CMOS RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
SLOS221A – MA Y 1998 – REVISED JULY 1999
MECHANICAL INFORMATION
U (S-GDFP-F10) CERAMIC DUAL FLATPACK
0.250 (6,35)
0.246 (6,10)
0.006 (0,15)
0.080 (2,03)
0.050 (1,27)
0.004 (0,10)
0.045 (1,14)
0.026 (0,66)
0.250 (6,35) 1
0.250 (6,35)
5
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification only. E. Falls within MIL STD 1835 GDFP1-F10 and JEDEC MO-092AA
0.300 (7,62)
1.000 (25,40)
0.750 (19,05)
10
0.350 (8,89)0.350 (8,89)
0.250 (6,35)
0.019 (0,48)
0.015 (0,38)
0.050 (1,27)
6
0.025 (0,64)
0.005 (0,13)
4040179/B 03/95
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
31
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Copyright 1999, Texas Instruments Incorporated
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