Integrates Most Communications Card
Functions From the IBM PC/AT or
Compatibles With Single- or Dual-Channel
Serial Ports
D
TL16C451 Consists of One TL16C450 Plus
Centronix Printer Interface
D
TL16C452 Consists of Two TL16C450s Plus
a Centronix-T ype Printer Interface
description
The TL16C451 and TL16C452 provide single- and dual-channel (respectively) serial interfaces along with a
single Centronix-type parallel-port interface. The serial interfaces provide a serial-to-parallel conversion for data
received from a peripheral device or modem and a parallel-to-serial conversion for data transmitted by a CPU.
The parallel interface provides a bidirectional parallel data port that fully conforms to the requirements for a
Centronix-type printer interface. A CPU can read the status of the asynchronous communications element
(ACE) interfaces at any point in the operation. The status includes the state of the modem signals (CTS
RLSD
, and RI) and any changes to these signals that have occurred since the last time they were read, the state
of the transmitter and receiver including errors detected on received data, and printer status. The TL16C451
and TL16C452 provide control for modem signals (RTS and DTR), interrupt enables, baud rate programming,
and parallel-port control signals.
D
Fully Programmable Serial Interface
Characteristics:
– 5-, 6-, 7-, or 8-Bit Characters
– Even-, Odd-, or No-Parity Bit Generation
and Detection
– 1-, 1 1/2-, or 2 Stop-Bit Generation
– Programmable Baud Rate
(dc to 256 kbit/s)
D
Fully Double Buffered for Reliable
Asynchronous Operation
, DSR,
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
IBM PC/AT is a trademark of International Business Machines Corporation.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1999, Texas Instruments Incorporated
1
TL16C451, TL16C452
ASYNCHRONOUS COMMUNICATIONS ELEMENTS
TL16C451, TL16C452
ASYNCHRONOUS COMMUNICATIONS ELEMENTS
SLLS053C – MAY 1989 – REVISED AUGUST 1999
TL16C451 functional block diagram
TL16C451
CTS0
DSR0
RLSD0
RI0
SIN0
CS0
DB0–DB7
A0–A2
IOW
IOR
RESET
CLK
ERROR
SLCT
BUSY
PE
ACK
LPTOE
CS2
8
35 – 33
3
36
37
39
Select
and
Control
4
Logic
28
31
29
30
41
32
14 – 21
8
8
63
65
66
67
68
1
38
ACE
1
Parallel
Port
Parallel
Port
24
25
26
45
53 – 46
57
56
55
58
59
44
8
RTS0
DTR0
SOUT0
INT0
BDO
PD0–PD7
INIT
AFD
STB
SLIN
INT2
TL16C452 functional block diagram
CTS0
DSR0
RLSD0
RI0
SIN0
CS0
DB0–DB7
CTS1
DSR1
RLSD1
RI1
SIN1
CS1
A0–A2
IOW
IOR
RESET
CLK
ERROR
SLCT
BUSY
PE
ACK
LPTOE
CS2
8
3
35 – 33
36
37
39
4
Select
and
Control
Logic
14 – 21
8
28
31
29
30
41
32
13
62
63
65
66
67
68
38
5
8
6
3
8
1
TL16C452
ACE
1
ACE
2
Parallel
Port
24
25
26
45
12
11
10
60
44
53 – 46
57
56
55
58
59
8
RTS0
DTR0
SOUT0
INT0
RTS1
DTR1
SOUT1
INT1
BDO
PD0–PD7
INIT
AFD
STB
SLIN
INT2
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL16C451,TL16C452
I/O
DESCRIPTION
ASYNCHRONOUSCOMMUNICATIONSELEMENTS
SLLS053C – MAY 1989 – REVISED AUGUST 1999
Terminal Functions
TERMINAL
†
NAME
A0
A1
A2
ACK
AFD
BDO44OBus buffer output. BDO is active (high) when the CPU is reading data. When active, this output can
BUSY66IPrinter busy. BUSY is an input line from the printer that goes high when the printer is not ready to accept
CLK4I/OExternal clock. CLK connects the ACE to the main timing reference.
CS0
CS1 [VCC]
CS2
CTS0
CTS1 [GND]
DB0 – DB714 – 21
DSR0
DSR1 [GND]
DTR0
DTR1 [NC]
ERROR63I
INIT57
INT0
INT1 [NC]
INT259O
IOR
IOW
LPTOE
†
Names shown in brackets are for the TL16C451.
NO.
35
34
33
68I
56I/O
32
3
38
28
13
31
5
25
11
45
60
37I
36I
1I
Register select. A0, A1, and A2 are used during read and write operations to select the register to read
I
from or write to. Refer to T able 1 for register addresses, also refer to the chip select signals (CS0
).
CS2
Printer acknowledge. ACK goes low to indicate that a successful data transfer has taken place. It
generates a printer port interrupt during its positive transition.
Printer autofeed. AFD is an open-drain line that provides the printer with a low signal when
continuous-form paper is to be autofed to the printer. An internal pullup is provided.
disable an external transceiver.
data.
Chip selects. Each chip select enables read and write operations to its respective channel. CS0 and
I
I
I/OData bus. Eight 3-state data lines provide a bidirectional path for data, control, and status information
I
O
I/O
OInterrupt. INTx is an active-high 3-state output that is enabled by bit 3 of the MCR. When active, INTx
select serial channels 0 and 1, respectively, and CS2 selects the parallel port.
CS1
Clear to send. CTSx is an active-low modem status signal. Its state can be checked by reading bit 4
(CTS) of the modem status register. Bit 0 (DCTS) of the modem status register indicates that this signal
has changed states since the last read from the modem status register. If the modem status interrupt
is enabled when CTSx
between the TL16C451/TL16C452 and the CPU. DB0 is the least significant bit (LSB).
Data set ready. DSRx is an active-low modem status signal. Its state can be checked by reading
bit 5 (DSR) of the modem status register. Bit 1 (DDSR) of the modem status register indicates that this
signal has changed states since the last read from the modem status register. If the modem status
interrupt is enabled when the DSRx
Data terminal ready. DTRx, when active (low), informs a modem or data set that the ACE is ready to
establish communication. DTRx
register. DTRx
or clearing bit 0 (DTR) of the modem control register.
Printer error. ERROR is an input line from the printer. The printer reports an error by holding this line
low during the error condition.
Printer initialize. INIT is an open-drain line that provides the printer with a signal that allows the printer
initialization routine to be started. An internal pullup is provided.
informs the CPU that the ACE has an interrupt to be serviced. Four conditions that cause an interrupt
to be issued are: a receiver error, received data is available, the transmitter holding register is empty,
and an enabled modem status interrupt. The INTx output is reset (low) either when the interrupt is
serviced or as a result of a reset.
Printer port interrupt. INT2 is an active-high 3-state output generated by the positive transition of ACK.
It is enabled by bit 4 of the write control register.
Data read strobe. When IOR input is active (low) while the ACE is selected, the CPU is allowed to read
status information or data from a selected ACE register.
Data write strobe. When IOW input is active (low) while the ACE is selected, the CPU is allowed to write
control words or data into a selected ACE register.
Parallel data output enable. When low, LPT OE enables the write data register to the PD0–PD7 lines.
A high puts the PD0–PD7 lines in the high-impedance state allowing them to be used as inputs. LPTOE
is usually tied low for printer operation.
changes state, an interrupt is generated.
changes state, an interrupt is generated.
is placed in the active state by setting the DTR bit of the modem control
is placed in the inactive state either as a result of a reset or during loop mode operation
, CS1,
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
TL16C451,TL16C452
I/O
DESCRIPTION
ASYNCHRONOUSCOMMUNICATIONSELEMENTS
SLLS053C – MAY 1989 – REVISED AUGUST 1999
Terminal Functions (continued)
TERMINAL
†
NAME
PD0–PD753–46I/OParallel data bits (0–7). These eight lines provide a byte-wide input or output port to the system. The
PE67IPrinter paper empty. This is an input line from the printer that goes high when the printer runs out of
RESET
RI0
RI1 [GND]
RLSD0
RLSD1 [GND]
RTS0
RTS1 [NC]
SIN0
SIN1 [GND]
SLCT65IPrinter selected. SLCT is an input line from the printer that goes high when the printer has been selected.
SLIN
SOUT0
SOUT1 [NC]
STB
V
CC
GND2,7,9
†
Names shown in brackets are for the TL16C451.
NO.
39I
30
6
29
8
24
12
41
62
58I/O
26
10
55I/O
23,40,
64
22,27,42,
43,54,61
eight lines are held in a high-impedance state when LPTOE
paper.
Reset. When active (low), RESET clears most ACE registers and sets the state of various output
signals. Refer to Table 2.
I
Ring indicator. RIx is an active-low modem status signal. Its state can be checked by reading bit 6 (RI)
of the modem status register. Bit 2 (TERI) of the modem status register indicates that the RIx
transitioned from a low to a high state since the last read from the modem status register. If the modem
status interrupt is enabled when this transition occurs, an interrupt is generated.
I
Receive line signal detect. RLSDx is an active-low modem status signal. Its state can be checked by
reading bit 7 of the modem status register. Bit 3 (DRLSD) of the modem status register indicates that
this signal has changed states since the last read from the modem status register. If the modem status
interrupt is enabled when RLSDx
carrier is detected.
O
Request to send. When active (low), RTSx informs the modem or data set that the ACE is ready to
transmit data. RTSx
to its inactive (high) state either as a result of a reset or during loop mode operations or by clearing bit
1 (RTS) of the modem control register.
ISerial input. SINx is a serial data input from a connected communications device.
Printer select. SLIN is an open-drain line that selects the printer when it is active (low). An internal pullup
is provided on this line.
ISerial output. SOUTx is a composite serial data output to a connected communication device. SOUTx
is set during a reset.
Printer strobe. STB is an open-drain line that provides communication synchronization between the
TL16C451/TL16C452 and the printer . When it is active (low), it provides the printer with a signal to latch
the data currently on the parallel port. An internal pullup is provided on this line.
5-V supply voltage
Supply common
is set to its active state by setting the RTS modem control register bit and is set
changes state, an interrupt is generated. This bit is low when a data
is high.
input has
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL16C451, TL16C452
VOHHigh-level output voltage
2.4
V
I
Input leakage current
CC
,
SS
,
±10µA
All other in uts at 0.8 V,XTAL1 at 4 MHz
ASYNCHRONOUS COMMUNICATIONS ELEMENTS
SLLS053C – MAY 1989 – REVISED AUGUST 1999
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values are with respect to GND.
recommended operating conditions
MINNOMMAXUNIT
Supply voltage, V
High-level Input voltage, V
Low-level Input voltage, V
Operating free-air temperature, T
CC
IH
IL
A
4.7555.25V
2V
–0.50.8V
070°C
CC
V
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYP†MAXUNIT
IOH = –0.4 mA on DB0–DB7
p
V
OL
Ikg
I
oz
I
CC
†
All typical values are at VCC = 5 V, TA = 25°C.
NOTE 2: INIT
Low-level output voltage
p
High-impedance output current
Supply current
, AFD, STB, and SLIN are open-collector output terminals that each have an internal pullup to VCC. This generates a maximum of
2 mA of internal IOL per terminal. In addition to this internal current, each terminal sinks at least 10 mA while maintaining the V
specification of 0.4 V maximum.
IOH = –2 mA to 4 mA on PD0–PD7
IOH = –0.2 mA on INIT,AFD, STB, and SLIN
IOH = –0.2 mA on all other outputs
IOL = 4 mA on DB0–DB7
IOL = 12 mA on PD0–PD7
IOL = 10 mA on INIT,
AFD, STB, and SLIN (see Note 2)
IOL = 2 mA on all other outputs
V
= 5.25 V,V
VI = 0 to 5.25 V,All other terminals floating
VCC = 5.25 V,VSS = 0,
VO = 0 to 5.25 V,
Chip selected and in write mode, or chip deselected
VCC = 5.25 V,VSS = 0,
SIN, DSR, RLSD, CTS, and RI at 2 V,
p
No load on outputs, Baud rate = 50 kbit/s
= 0,
,
0.4V
±20µA
10mA
OL
system timing requirements over recommended ranges of supply voltage and operating free-air
temperature
t
cR
Cycle time, read (tw7 + td8 + td9)175ns
PARAMETERFIGUREMINMAXUNIT
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
7
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