TEXAS INSTRUMENTS THS3201 Technical data
Low-Noise, Low-Distortion, Wideband Application Circuit
NONINVERTING SMALL SIGNAL
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SLOS416A − JUNE 2003 − REVISED JANUARY 2004
FEATURES
D Unity Gain Bandwidth: 1.8 GHz
D High Slew Rate: 10500 V/µs
D Distortion at 100 MHz: (G = 10 V/V,
RL = 100 Ω, 2-VPP envelope)
− IMD3: −80 dBc
− OIP3: 41 dBm
D Noise Figure : 11 dB (G = 10 V/V,
RG = 28 Ω, RF = 255 Ω)
D Input Referred Noise (f > 10 MHz)
− Voltage Noise: 1.65 nV/√Hz
− Noninverting Current Noise: 13.4 pA/√Hz
− Inverting Current Noise: 20 pA/√Hz
D Output Current: +115/−100 mA
D Power Supply Voltage Range: ±3.3 V to ±7.5 V
APPLICATIONS
D Arbitrary Waveform Driver
D High-Resolution, High-Sampling Rate ADC
Drivers
D High-Resolution, High-Sampling Rate DAC
Output Buffers
D If Amplification for Wireless Communications
Applciations
D Broadcast Video and HDTV Line Drivers
DESCRIPTION
The THS3201 is a wide-band, high-speed
current-feedback amplifier, designed to operate over a
wide supply range of ±3.3 V to ±7.5 V for todays high
performance applications.
The wide supply range combined with distortion as low as
−74 dBc at 10 MHz, plus an extremely high slew rate of
10500 V/µs makes the THS3201 ideally suited for arbitrary
waveform driver applications. The distortion performance
also enables driving high-resolution and high-sampling
rate ADCs. Moreover, the gain of +2 bandwidth of 850
MHz, combined with a 0.1 dB flatness of 380 MHz makes
the THS3201 ideal for broadcast video and HDTV
applications. The THS3201 also offers excellent
performance for IF amplification in wireless
communications systems by having IMD
−80 dBc, OIP
of 41 dBm, and a noise figure of 1 1 dB, all at
3
100 MHz with a gain +10 V/V, while driving a 2-V
envelope into a 100-Ω load.
The THS3201 is offered in a 5-pin SOT−23, 8-pin SOIC,
and an 8-pin MSOP with PowerPAD packages.
RELATED DEVICES AND DESCRIPTIONS
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THS3001 ±15-V 420-MHz Low Distortion CFB Amplifier
THS3061/2 ±15-V 300-MHz Low Distortion CFB Amplifier
THS3122 ±15-V Dual CFB Amplifier With 350 mA Drive
THS4271 ±7.5-V 1.4-GHz Low Distortion VFB Amplifier
performance of
3
PP
FREQUENCY RESPONSE
50 Ω Source
50 Ω
V
I
NOTE:Power supply decoupling capacitors not shown
semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments Incorporated.
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49.9 Ω
768 Ω
+7.5 V
+
THS3201
_
−7.5 V
768 Ω
49.9 Ω
50 Ω
8
7
6
5
4
3
Gain = 2.
2
Noninverting Gain − dB
Copyright 2003 − 2004, Texas Instruments Incorporated
RL = 100 Ω,
VO = 0.2 VPP.
1
VS = ±7.5 V
0
100 k 1 M 10 M 100 M 1 G 10 G
RF = 768 Ω
f − Frequency − Hz
ESD ratings:
PACKAGE
(1)
PACKAGE
JC
(°C/W)
JA
(°C/W)
Supply voltage
V
OUTLINE
−40°C to 85°C
BEO
BEN
BGP
SLOS416A − JUNE 2003 − REVISED JANUARY 2004
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ABSOLUTE MAXIMUM RATINGS
over operat i n g f ree-air temperature range unless otherwise noted
UNIT
Supply voltage, V
Input voltage, V
Output current, IO
Differential input voltage, V
Continuous power dissipation See Dissipation Rating Table
Maximum junction temperature, T
Maximum junction temperature, continuous
operation, long term reliability T
Operating free-air temperature range, T
Storage temperature range, T
Lead temperature
1,6 mm (1/16 inch) from case for 10 seconds
S
I
(2)
ID
(3)
J
(4)
J
A
stg
HBM 3000 V
ESD ratings:
CDM 1500 V
MM 100 V
(1)
Stresses above these ratings may cause permanent damage.
Exposure to absolute maximum conditions for extended periods
may degrade device reliability. These are stress ratings only, and
functional operation of the device at these or any other conditions
beyond those specified is not implied.
(2)
The THS3201 may incorporate a PowerPAD on the underside
of the chip. This acts as a heat sink and must be connected to a
thermally dissipative plane for proper power dissipation. Failure
to do so may result in exceeding the maximum junction
temperature which could permanently damage the device. See TI
technical briefs SLMA002 and SLMA004 for more information
about utilizing the PowerPAD thermally enhanced package.
(3)
The absolute maximum temperature under any condition is
limited by the constraints of the silicon process.
(4)
The maximum junction temperature for continuous operation is
limited by package constraints. Operation above this temperature
may result in reduced reliability and/or lifetime of the device.
16.5 V
±V
S
175 mA
±3 V
150°C
125°C
−40°C to 85°C
−65°C to 150°C
300°C
(1)
This integrated circuit can be damaged by ESD. Texas
Instruments recommends that all integrated circuits be
handled with appropriate precautions. Failure to observe
proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible t o damage because very small parametric changes could
cause the device not to meet its published specifications.
PACKAGE DISSIPATION RATINGS
θ
JCθJA
POWER RATING
(TJ = 125°C)
TA ≤ 25°C TA = 85°C
DBV (5) 55 255.4 391 mW 156 mW
D (8) 38.3 97.5 1.02 W 410 mW
DGN (8) 4.7 58.4 1.71 W 685 mW
DGK (8 pin) 54.2 260 385 mW 154 mW
(1)
This data was taken using the JEDEC standard High-K test PCB.
(2)
Power rating is determined with a junction temperature of 125°C.
This is the point where distortion starts to substantially increase.
Thermal management of the final PCB should strive to keep the
junction temperature at or below 125°C for best performance and
long term reliability.
(2)
RECOMMENDED OPERATING CONDITIONS
MIN MAX UNIT
Dual supply ±3.3 ±7.5
Single supply 6.6 15
Operating free-air temperature, T
A
−40 85 °C
PACKAGE/ORDERING INFORMATION
PIN ASSIGNMENTS
NOTE:If a PowerPAD is used, it is electrically isolated from the active circuitry.
2
PACKAGED DEVICES
TEMPERATURE
PLASTIC SMALL
OUTLINE
(1)
(D)
(DBV) SYM (DGN) SYM (DGK) SYM
SOT-23
(2)
THS3201D THS3201DBVT
THS3201DR THS3201DBVR
(1)
Available in tape and reel. The R suffix standard quantity is 2500 (e.g. THS3201DGNR).
(2)
Available in tape and reel. The R suffix standard quantity is 3000. The T suf fix standard quantity is 250 (e.g. THS3201DBVT).
SOT−23TOP VIEW
1
5
V
OUT
V
S−
IN+
2
3
V
S+
4
IN−
PLASTIC MSOP
THS3201DGN
THS3201DGNR
TOP VIEW
POWERPAD
NC
V
IN−
V
IN+
V
S−
(1)
PLASTIC MSOP
THS3201DGK
THS3201DGKR
1
2
3
4
NC
8
7
V
6
5
S+
V
OUT−
NC
NC = No Internal Connection
(1)
D, DGN, DGK
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PARAMETER
TEST CONDITIONS
Small-signal bandwidth, −3 dB
Small-signal bandwidth, −3 dB
Typ
(VO = 200 mVPP)
MHz
Slew rate (25% to 75% level)
V/µs
Typ
ns
Typ
2nd harmonic
dBc
Typ
3rd harmonic
dBc
Typ
c
f = 200 kHz,
Differential gain
G = +2, R
= 150 Ω,
G = +2, RL = 150 Ω
Differential phase
RF = 768
SLOS416A − JUNE 2003 − REVISED JANUARY 2004
ELECTRICAL CHARACTERISTICS
VS = ±7.5 V: Rf = 768 Ω, RL = 100 Ω, and G = +2 unless otherwise noted
THS3201
TYP OVER TEMPERATURE
25°C 25°C
AC PERFORMANCE
G = +1, RF= 1.2 kΩ 1.8 GHz
G = +2, RF = 768 Ω 850
(VO = 200 mVPP)
Bandwidth for 0.1 dB flatness
Large-signal bandwidth G = +2, VO = 2 V
Rise and fall time G = +2, VO = 4-V step, RF = 768 Ω 0.6 ns Typ
Settling time to 0.1% G = −2, VO = 2-V step 20
0.01% G = −2, VO = 2-V step 60
Harmonic distortion G = +5, f = 10 MHz, VO = 2 V
Third-order intermodulation
distortion (IMD3)
Third-order output intercept
point (OIP3)
Noise figure
Input voltage noise f > 10 MHz 1.65 nV/√Hz Typ
Input current noise (noninverting) f > 10 MHz 13.4 pA/√Hz Typ
Input current noise (inverting) f > 10 MHz 20 pA/√Hz Typ
G = +5, RF = 619 Ω 565
G = +10, RF = 487 Ω 520
G = +2, VO = 200 mV
RF = 768 Ω
G = +1, VO = 5-V step 6200
G = +2, VO = 10-V step 10500
RL = 100 Ω −75
RL = 500 Ω −77
RL = 100 Ω −91
RL = 500 Ω −93
G = +10, fc = 100 MHz,
∆
V
O(envelope)
G = +10, fc = 100 MHz,
RF = 255 Ω, RG = 28
RF = 768 Ω
pp,
= 715 Ω 880 MHz Typ
pp, RF
pp
= 2 V
pp 41 dBm Typ
NTSC 0.008% Typ
,
PAL 0.004% Typ
NTSC 0.007° Typ
PAL 0.011° Typ
380 MHz Typ
−80 dBc Typ
11 dB Typ
0°C to
70°C
−40°C
to 85°C
UNITS
MHz
MIN/TYP/
MAX
DC PERFORMANCE
Open-loop transimpedance gain VO = ±1 V, RL = 1 kΩ 300 200 140 120 kΩ Min
Input offset voltage VCM = 0 V ±0.7 ±3 ±3.8 ±4 mV Max
Average offset voltage drift VCM = 0 V ±10 ±13 µV/°C Typ
Input bias current (inverting) VCM = 0 V ±13 ±60 ±80 ±85 µA Max
Average bias current drift (−) VCM = 0 V ±300 ±400 nA/°C Typ
Input bias current (noninverting) VCM = 0 V ±14 ±35 ±45 ±50 µA Max
Average bias current drift (+) VCM = 0 V ±300 ±400 nA/°C Typ
3
PARAMETER
TEST CONDITIONS
Input resistance
Voltage output swing
V
Min
SLOS416A − JUNE 2003 − REVISED JANUARY 2004
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ELECTRICAL CHARACTERISTICS
VS = ±7.5 V: Rf = 768 Ω, RL = 100 Ω, and G = +2 unless otherwise noted
THS3201
TYP OVER TEMPERATURE
25°C 25°C
INPUT
Common-mode input range ±5.1 ±5 ±5 ±5 V Min
Common-mode rejection ratio VCM = ±3.75 V 71 60 58 58 dB Min
Inverting input impedance, Z
Input capacitance Noninverting 1 pF Typ
OUTPUT
Current output, sourcing RL = 20 Ω 115 105 100 100 mA Min
Current output, sinking RL = 20 Ω 100 85 80 80 mA Min
Closed-loop output impedance G = +1, f = 1 MHz 0.01 Ω Typ
in
Open loop 16 Ω Typ
Noninverting 780 kΩ Typ
Inverting 11 Ω Typ
RL = 1 kΩ ±6 ±5.9 ±5.8 ±5.8
RL = 100 Ω ±5.8 ±5.7 ±5.5 ±5.5
0°C to
70°C
−40°C
to 85°C
UNITS
MIN/TYP/
MAX
POWER SUPPLY
Minimum operating voltage Absolute minimum ±3.3 ±3.3 ±3.3 V Min
Maximum operating voltage Absolute maximum ±8.25 ±8.25 ±8.25 V Max
Maximum quiescent current 14 18 21 21 mA Max
Power supply rejection (+PSRR) VS+ = 7 V to 8 V 69 63 60 60 dB Min
Power supply rejection (−PSRR) VS− = −7 V to –8 V 65 58 55 55 dB Min
4
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PARAMETER
TEST CONDITIONS
Small-signal bandwidth, −3dB
Small-signal bandwidth, −3dB
Typ
(VO = 200 mVPP)
MHz
Slew rate (25% to 75% level)
V/µs
Typ
2nd harmonic
dBc
Typ
3rd harmonic
dBc
Typ
c
f = 200 kHz,
Differential gain
G = +2, R
= 150 Ω,
G = +2, RL = 150 Ω,
Differential phase
RF= 768
SLOS416A − JUNE 2003 − REVISED JANUARY 2004
ELECTRICAL CHARACTERISTICS
VS = ±5 V: Rf = 715 Ω, RL = 100 Ω, and G = +2 unless otherwise noted
THS3201
TYP OVER TEMPERATURE
25°C 25°C
AC PERFORMANCE
G = +1, RF= 1.2 kΩ 1.3 GHz
G = +2, RF = 715 Ω 725
(VO = 200 mVPP)
Bandwidth for 0.1 dB flatness
Large-signal bandwidth G = +2, VO = 2 Vpp, RF= 715 Ω 900 MHz Typ
Rise and fall time
Settling time to 0.1% G = −2, VO = 2-V step 20 ns Typ
0.01% G = −2, VO = 2-V step 60 ns Typ
Harmonic distortion G = +5, f = 10 MHz, VO = 2 V
Third-order intermodulation
distortion (IMD3)
Third-order output intercept
point (OIP3)
Noise figure
Input voltage noise f > 10 MHz 1.65 nV/√Hz Typ
Input current noise (noninverting) f > 10 MHz 13.4 pA/√Hz Typ
Input current noise (inverting) f > 10 MHz 20 pA/√Hz Typ
G = +5, RF = 576 Ω 540
G = +10, RF = 464 Ω 480
G = +2, VO = 200 mV
RF= 715 Ω
G = +1, VO = 5-V step 5200
G = +2, VO = 5-V step 5200
G = +2, VO = 4-V step,
RF= 715 Ω
RL = 100 Ω −68
RL = 500 Ω −70
RL = 100 Ω −72
RL = 500 kΩ −74
G = +10, fc = 100 MHz,
∆
V
O(envelope)
G = +10, fc = 100 MHz,
RF = 255 Ω, RG = 28
RF= 768 Ω
pp,
pp
= 2 V
pp 33.5 dBm Typ
NTSC 0.006% Typ
PAL 0.004% Typ
NTSC 0.03° Typ
PAL 0.04° Typ
170 MHz Typ
0.7 ns Typ
−65 dBc Typ
11 dB Typ
0°C to
70°C
−40°C
to 85°C
UNITS
MHz
MIN/TYP/
MAX
DC PERFORMANCE
Open-loop transimpedance gain VO = +1 V , RL = 1 kΩ 300 200 140 120 kΩ Min
Input offset voltage VCM =0 V ±0.7 ±3 ±3.8 ±4 mV Max
Average offset voltage drift VCM = 0 V ±10 ±13 µV/°C Typ
Input bias current (inverting) VCM = 0 V ±13 ±60 ±80 ±85 µA Max
Average bias current drift (−) VCM = 0 V ±300 ±400 nA/°C Typ
Input bias current (noninverting) VCM = 0 V ±14 ±35 ±45 ±50 µA Max
Average bias current drift (+) VCM = 0 V ±300 ±400 nA/°C Typ
5
PARAMETER
TEST CONDITIONS
Input resistance
Voltage output swing
V
Min
SLOS416A − JUNE 2003 − REVISED JANUARY 2004
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ELECTRICAL CHARACTERISTICS continued
VS = ±5 V: Rf = 715 Ω, RL = 100 Ω, and G = +2 unless otherwise noted
THS3201
TYP OVER TEMPERATURE
25°C 25°C
INPUT
Common-mode input range ±2.6 ±2.5 ±2.5 ±2.5 V Min
Common-mode rejection ratio VCM = ±2.5 V 71 60 58 58 dB Min
Inverting input impedance, Z
Input capacitance Noninverting 1 pF Typ
OUTPUT
Current output, sourcing RL = 20 Ω 115 105 100 100 mA Min
Current output, sinking RL = 20 Ω 100 85 80 80 mA Min
Closed-loop output impedance G = +1, f = 1 MHz 0.01 Ω Typ
in
Open loop 17.5 Ω Typ
Noninverting 780 kΩ Typ
Inverting 11 Ω Typ
RL = 1 kΩ ±3.65 ±3.5 ±3.45 ±3.4
RL = 100 Ω ±3.45 ±3.33 ±3.25 ±3.2
0°C to
70°C
−40°C
to 85°C
UNITS
MIN/TYP/
MAX
POWER SUPPLY
Minimum operating voltage Absolute minimum ±3.3 ±3.3 ±3.3 V Min
Maximum operating voltage Absolute maximum ±8.25 ±8.25 ±8.25 V Max
Maximum quiescent current 14 16.8 19 20 mA Max
Power supply rejection (+PSRR) VS+ = 4.5 V to 5.5 V 69 63 60 60 dB Min
Power supply rejection (−PSRR) VS− = −4.5 V to –5.5 V 65 58 55 55 dB Min
6
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SLOS416A − JUNE 2003 − REVISED JANUARY 2004
TYPICAL CHARACTERISTICS
Table of Graphs (V
Noninverting small signal frequency response 1, 2
Inverting small signal frequency response 3
Noninverting large signal frequency response 4
Inverting large signal frequency response 5
0.1 dB gain flatness frequency response 6
Capacitive load frequency response 7
Recommended switching resistance vs Capacitive Load 8
2nd harmonic distortion vs Frequency 9
3rd harmonic distortion vs Frequency 10
Harmonic distortion vs Output voltage swing 11, 12
Third-order intermodulation distortion (IMD3) vs Frequency 13
Third-order output intercept point (OIP3) vs Frequency 14
S − Parameter vs Frequency 15, 16
Input voltage and current noise vs Frequency 17
Noise figure vs Frequency 18
Transimpedance vs Frequency 19
Input offset voltage vs Case Temperature 20
Input bias and offset current vs Case Temperature 21
Slew rate vs Output voltage step 22, 23
Settling time 24, 25
Quiescent current vs Supply voltage 26
Output voltage vs Load resistance 27
Rejection ratio vs Frequency 28
Noninverting small signal transient response 29
Inverting large signal transient response 30
Overdrive recovery time 31
Differential gain vs Number of loads 32
Differential phase vs Number of loads 33
Closed-loop output impedance vs Frequency 34
= ±7.5 V)
S
FIGURE
Table of Graphs (VS = ±5 V)
FIGURE
Noninverting small signal frequency response 35
Inverting small signal frequency response 36
2nd harmonic distortion vs Frequency 38
3rd harmonic distortion vs Frequency 39
Harmonic distortion vs Output voltage swing 40, 41
Third-order intermodulation distortion (IMD3) vs Frequency 42
Third-order output intercept point (OIP3) vs Frequency 43
S − Parameter vs Frequency 44, 45
Slew rate vs Output voltage step 46
Noninverting small signal transient response 47
Inverting large signal transient response 48
Overdrive recovery time 49
37
7
SLOS416A − JUNE 2003 − REVISED JANUARY 2004
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VS = ±7.5 V Graphs
NONINVERTING SMALL SIGNAL
FREQUENCY RESPONSE
8
7
6
5
4
3
Gain = 2.
2
Noninverting Gain − dB
RL = 100 Ω,
VO = 0.2 VPP.
1
VS = ±7.5 V
0
100 k 1 M 10 M 100 M 1 G 10 G
RF = 619 Ω
RF = 768 Ω
RF = 1 kΩ
f − Frequency − Hz
Figure 1
INVERTING LARGE SIGNAL
FREQUENCY RESPONSE
16
14
12
10
Inverting Gain − dB
G =−5, RF = 576 Ω
8
G = 2, RF = 715 Ω
6
4
RL = 100 Ω,
VO = 2 VPP.
2
VS = ±7.5 V
0
100 k 1 M 10 M 100 M 1 G
f − Frequency − Hz
Figure 4
NONINVERTING SMALL SIGNAL
FREQUENCY RESPONSE
24
22
20
18
16
14
12
10
8
6
Noninverting Gain − dB
4
2
0
−2
−4
100 k 1 M 10 M 100 M 1 G 10 G
G = 10, RF = 487 Ω
G = 5, RF = 619 Ω
RL = 100 Ω,
VO = 0.2 VPP.
VS = ±7.5 V
G = 2, RF = 768 Ω
G =1, RF = 1.2 kΩ
f − Frequency − Hz
Figure 2
INVERTING LARGE SIGNAL
FREQUENCY RESPONSE
16
14
12
10
8
6
4
Inverting Gain − dB
2
0
−2
−4
G =−5, RF = 549 Ω
RL = 100 Ω,
VO = 2 VPP.
VS = ±7.5 V
G = −1, RF = 576 Ω
100 k 1 M 10 M 100 M 1 G
f − Frequency − Hz
Figure 5
INVERTING SMALL SIGNAL
FREQUENCY RESPONSE
24
22
20
18
16
14
12
10
8
6
4
Noninverting Gain − dB
2
0
−2
−4
100 k 1 M 10 M 100 M 1 G 10 G
G = −10, RF = 499 Ω
G = −5, RF = 549 Ω
RL = 100 Ω,
VO = 0.2 VPP.
VS = ±7.5 V
G = −2, RF = 576 Ω
G = −1, RF = 619 Ω
f − Frequency − Hz
Figure 3
0.1 dB GAIN FLATNESS
FREQUENCY RESPONSE
6.4
Gain = 2,
6.3
RF = 768 Ω,
RL = 100 Ω,
6.2
VO = 0.2 VPP,
VS = ±7.5 V
6.1
6
5.9
Noninverting Gain − dB
5.8
5.7
5.6
100 k 10 M 100 M 1 G 10 G
1 M
f − Frequency − Hz
Figure 6
Gain − dB
8
CAPACITIVE LOAD
FREQUENCY RESPONSE
16
R
= 30 Ω, CL = 22 pF
14
12
10
−2
(ISO)
R
= 20 Ω,
(ISO)
CL = 50 pF
Gain = 5
RF = 619 Ω
8
RL = 100 Ω
VS = ±7.5 V
6
4
R
= 15 Ω,
(ISO)
CL = 100 pF
2
R
= 20 Ω,
(ISO)
0
CL = 47 pF
0 100 200 300 400 500
f − Frequency − MHz
Figure 7
RECOMMENDED R
vs
60
50
Ω
−
40
ISO
R
30
20
Recommended
10
0
CAPACTIVE LOAD
Gain = 5,
RF = 619 Ω
RL = 100 Ω,
VS = ±7.5 V
R
_
ISO
+
10 100
C
L
CL − Capacitive Load − pF
Figure 8
ISO
2nd HARMONIC DISTORTION
vs
FREQUENCY
−40
VO = 2 VPP,
RL = 100 Ω,
−50
VS = ±7.5 V
G = 1, RF = 1.2 kΩ
−60
−70
−80
−90
2nd Harmonic Distortion − dBc
−100
1 10 100
f − Frequency − MHz
G = 5, RF = 619 Ω
G = 2, RF = 768 Ω
Figure 9
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G
SLOS416A − JUNE 2003 − REVISED JANUARY 2004
3rd HARMONIC DISTORTION
vs
−40
−50
−60
−70
−80
−90
3rd Harmonic Distortion − dBc
−100
1
FREQUENCY
VO = 2 VPP,
RL = 100 Ω,
VS = ±7.5 V
G = 1, RF = 1.2 kΩ
G = 2, RF = 768 Ω
f − Frequency − MHz
G = 5, RF = 619 Ω
10 100
Figure 10
THIRD-ORDER INTERMODULATION
DISTORTION
vs
−60
−65
−70
−75
−80
−85
−90
−95
−100
Third-Order Intermodulation Distortion − dBc
10 100 200
FREQUENCY
RL = 100 Ω
VO = 2VPP Envelope
VS = ±7.5 V
200 kHz Tone Spacing
G = 2, RF = 768 Ω
G = 5, RF = 619 Ω
f − Frequency − MHz
G = 10, RF = 487 Ω
Figure 13
HARMONIC DISTORTION
vs
OUTPUT VOLTAGE SWING
−60
Gain = 5
RF = 619 Ω
−65
f = 8 MHz
−70
VS = ±7.5 V
HD2, RL = 100 Ω
−75
−80
−85
−90
Harmonic Distortion − dBc
−95
−100
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
VO − Output Voltage Swing − ± V
HD2, RL = 499 Ω
HD3, RL = 100 Ω
HD3, RL = 499 Ω
Figure 11
THIRD-ORDER OUTPUT
INTERCEPT POINT
vs
FREQUENCY
60
55
50
45
40
G = 5, RF = 619 Ω
35
Third-Order Output Intersept Point − dBm
VO = 2 VPP Envelope
RL = 100 Ω
VS = ±7.5 V
200 kHz Tone Spacing
G = 10, RF = 487 Ω
G = 2, RF = 768 Ω
20 40 60 80 1000
f − Frequency − MHz
Figure 14
HARMONIC DISTORTION
vs
OUTPUT VOLTAGE SWING
−50
−55
−60
−65
−70
−75
−80
−85
Harmonic Distortion − dBc
−90
−95
−100
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5
HD2
RL = 100 Ω
RL = 499 Ω
VO − Output Voltage Swing − ± V
HD2, RL = 499 Ω
HD3,
HD3, RL = 100 Ω
Gain = 5, RF = 619 Ω
f = 32 MHz, VS = ±7.5 V
Figure 12
S − PARAMETER
vs
FREQUENCY
0
VS = ±7.5 V
Gain = +10
C = 0 pF
−20
S22
−40
−60
S−Parameter − dB
−80
−100
1 M 10 M 100 M 10
f − Frequency − Hz
R
G
50 Ω
Source
S11
Figure 15
R
−
+
50 Ω
1 G
S12
F
C
50 Ω
50 Ω
S − PARAMETER
vs
FREQUENCY
0
VS = ±7.5 V
Gain = +10
C = 3.3 pF
−20
S22
−40
−60
S11
S−Parameter − dB
−80
−100
1 M 10 M 100 M 10 G
f − Frequency − Hz
R
50 Ω
Source
R
G
−
+
50 Ω
1 G
Figure 16
INPUT VOLTAGE
AND CURRENT NOISE
vs
50
45
pA Hz
40
S12
F
C
50 Ω
50 Ω
35
30
25
20
15
Input Current Noise Density −
−
10
n
I
100 k 1 M 10 M 100 M
FREQUENCY
VS = ±7.5 V and ±5 V
TA = 25°C
V
n
Inverting
Noise Current
Noninverting
Current Noise
f − Frequency − Hz
Hz
4
nV/
3.5
3
2.5
1.5
0.5
Voltage Noise Density −
−
n
0
V
Figure 17
9
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