TEXAS INSTRUMENTS THS3091, THS3095 Technical data

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−

OUT

TOTAL HARMONIC DISTORTION

FREQUENCY

TYPICAL ARBITARY WAVEFORM

GENERATOR OUTPUT DRIVE CIRCUIT

−90

−80

−70

−60

−50

−40

−20

1 M 10 M 100 M

f − Frequency − Hz

Total Harmonic Distortion − dBc

G = 5, RF = 1 kΩ, RL = 100 Ω, VS = ±15 V

100 k

−30

VO = 20 V

VO = 10 V

VO = 5 V

VO = 2 V

−

THS3091

−

THS4271

IOUT1

IOUT2

DAC5686

查询THS3091供应商

HIGH-VOLTAGE, LOW-DISTORTION, CURRENT-FEEDBACK

OPERATIONAL AMPLIFIERS

FEATURES DESCRIPTION

• Low Distortion

– 77 dBc HD2 at 10 MHz, R – 69 dBc HD3 at 10 MHz, R

• Low Noise – 14 pA/ √ Hz Noninverting Current Noise and VDSL line drivers. – 17 pA/ √ Hz Inverting Current Noise – 2 nV/ √ Hz Voltage Noise

• High Slew Rate: 7300 V/µs (G = 5, V

• Wide Bandwidth: 210 MHz (G = 2, R

• High Output Current Drive: ± 250 mA

• Wide Supply Range: ± 5 V to ± 15 V

• Power-Down Feature: (THS3095 Only)

APPLICATIONS

• High-Voltage Arbitrary Waveform

• Power FET Driver

• Pin Driver

• VDSL Line Driver

L L

= 1 k Ω = 1 k Ω

= 20 V

= 100 Ω )

)

THS3091 THS3095

SLOS423C – SEPTEMBER 2003 – REVISED AUGUST 2004

The THS3091 and THS3095 are high-voltage, low-distortion, high-speed, current-feedback amplifiers designed to operate over a wide supply range of ± 5 V to ± 15 V for applications requiring large, linear output signals such as Pin, Power FET,

The THS3095 features a power-down pin (PD) that puts the amplifier in low power standby mode, and lowers the quiescent current from 9.5 mA to 500 µA.

The wide supply range combined with total harmonic distortion as low as -69 dBc at 10 MHz, in addition, to the high slew rate of 7300 V/µs makes the THS3091/5 ideally suited for high-voltage arbitrary waveform driver applications. Moreover, having the ability to handle large voltage swings driving into high-resistance and high-capacitance loads while maintaining good settling time performance makes the devices ideal for Pin driver and PowerFET driver applications.

The THS3091 and THS3095 are offered in an 8-pin SOIC (D), and the 8-pin SOIC (DDA) packages with PowerPAD™.

UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PowerPAD is a trademark of Texas Instruments.

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D, DDATOP VIEW

1 2 3 4

8 7 6 5

IN−

IN+

S−

NC V

S+

OUT

NC = No Internal Connection

THS3091

Note A: The devices with the power−down option defaults to the ON state if no signal is applied to the PD pin. Additionallly, the REF pin functional range is from VS− to (VS+ − 4 V).

1 2 3 4

8 7 6 5

REF V

IN−

IN+

S−

PD V

S+

OUT

D, DDATOP VIEW

THS3095

NC = No Internal Connection See Note A.

THS3091 THS3095

SLOS423C – SEPTEMBER 2003 – REVISED AUGUST 2004

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

PART NUMBER PACKAGE TYPE TRANSPORT MEDIA, QUANTITY

THS3091D Rails, 75

THS3091DR Tape and Reel, 2500

THS3091DDA Rails, 75

THS3091DDAR Tape and Reel, 2500

Power-down

THS3095D Rails, 75

THS3095DR Tape and Reel, 2500

THS3095DDA Rails, 75

THS3095DDAR Tape and Reel, 2500

(1) The PowerPAD is electrically isolated from all other pins.

ODERING INFORMATION

SOIC-8

SOIC-8-PP

SOIC-8

SOIC-8-PP

(1)

DISSIPATION RATING TABLE

PACKAGE Θ

D-8 38.3 97.5 1.02 W 410 mW

(3)

DDA-8

(1) This data was taken using the JEDEC standard High-K test PCB. (2) Power rating is determined with a junction temperature of 125 ° C. This is the point where distortion starts to substantially increase.

Thermal management of the final PCB should strive to keep the junction temperature at or below 125 ° C for best performance and long-term reliability.

(3) The THS3091 and THS3095 may incorporate a PowerPAD™ on the underside of the chip. This acts as a heatsink and must be

connected to a thermally dissipating plane for proper power dissipation. Failure to do so may result in exceeding the maximum junction temperature which could permanently damage the device. See TI Technical Brief SLMA002 for more information about utilizing the PowerPAD™ thermally enhanced package.

( ° C/W) Θ

9.2 45.8 2.18 W 873 mW

(1)

( ° C/W)

TA= 25 ° C TA= 85 ° C

POWER RATING

TJ= 125 ° C

(2)

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THS3091 THS3095

SLOS423C – SEPTEMBER 2003 – REVISED AUGUST 2004

RECOMMENDED OPERATING CONDITIONS

MIN MAX UNIT

Supply voltage V

Operating free-air temperature -40 85 ° C

ABSOLUTE MAXIMUM RATINGS

over operating free-air temperature (unless otherwise noted)

VS-to V V

(2)

stg

(1) The absolute maximum ratings under any condition is limited by the constraints of the silicon process. Stresses above these ratings may

cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied.

(2) The maximum junction temperature for continuous operation is limited by package constraints. Operation above this temperature may

result in reduced reliability and/or lifetime of the device.

Supply voltage 33 V

S+

Input voltage ± V Differential input voltage ± 4 V Output current 350 mA Continuous power dissipation See Dissipation Ratings Table Maximum junction temperature, 150 ° C Maximum junction temperature, continuous operation, long-term reliability 125 ° C Storage temperature -65 ° C to 150 ° C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 300 ° C

ESD ratings CDM 1500

Dual supply ± 5 ± 15 Single supply 10 30

(1)

UNIT

HBM 2000

MM 150

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THS3091 THS3095

SLOS423C – SEPTEMBER 2003 – REVISED AUGUST 2004

ELECTRICAL CHARACTERISTICS

VS= ± 15 V, RF= 1.21 k Ω , RL= 100 Ω , and G = 2 (unless otherwise noted)

TYP OVER TEMPERATURE

PARAMETER TEST CONDITIONS

AC PERFORMANCE

G = 1, RF= 1.78 k Ω , VO= 200 mV

Small-signal bandwidth, -3 dB

0.1-dB bandwidth flatness G = 2, RF= 1.21 k Ω , VO= 200 mV Large-signal bandwidth G = 5, RF= 1 k Ω , VO= 4 V

Slew rate (25% to 75% level) V/µs TYP

Rise and fall time G = 2, VO= 5-V Settling time to 0.1% G = -2, VO= 2 VPPstep 42 Settling time to 0.01% G = -2, VO= 2 VPPstep 72 Harmonic distortion

2nd Harmonic distortion

3rd Harmonic distortion

Input voltage noise f > 10 kHz 2 nV / √ Hz TYP Noninverting input current noise f > 10 kHz 14 pA / √ Hz TYP Inverting input current noise f > 10 kHz 17 pA / √ Hz TYP

Differential gain

Differential phase

DC PERFORMANCE

Transimpedance VO= ± 7.5 V, Gain = 1 850 350 300 300 k Ω MIN Input offset voltage 0.9 3 4 4 mV MAX

Average offset voltage drift ± 10 ± 10 µV/ ° C TYP

Noninverting input bias current 4 15 20 20 µA MAX

Average bias current drift ± 20 ± 20 nA/ ° C TYP

Inverting input bias current 3.5 15 20 20 µA MAX

Average bias current drift ± 20 ± 20 nA/ ° C TYP

Input offset current 1.7 10 15 15 µA MAX

Average offset current drift ± 20 ± 20 nA/ ° C TYP

INPUT CHARACTERISTICS

Common-mode input range ± 13.6 ± 13.3 ± 13 ± 13 V MIN Common-mode rejection ratio VCM= ± 10 V 78 68 65 65 dB MIN Noninverting input resistance 1.3 M Ω TYP Noninverting input capacitance 0.1 pF TYP Inverting input resistance 30 Ω TYP Inverting input capacitance 1.4 pF TYP

G = 2, RF= 1.21 k Ω , VO= 200 mV G = 5, RF= 1 k Ω , VO= 200 mV G = 10, RF= 866 Ω , VO= 200 mV

G = 2, VO= 10-V step, RF= 1.21 k Ω 5000 G = 5, VO= 20-V step, RF= 1 k Ω 7300

, RF= 1.21 k Ω 5 ns TYP

G = 2, RF= 1.21 k Ω , VO= 2 VPP, f = 10 MHz

G = 2, RL= 150 Ω , RF= 1.21 k Ω

VCM= 0 V

PP PP

RL= 100 Ω 66 RL= 1 k Ω 77 RL= 100 Ω 74 RL= 1 k Ω 69

NTSC 0.013% PAL 0.011% NTSC 0.020 ° PAL 0.026 °

25 ° C 25 ° C UNIT

235 210 190 180

135

0 ° C to -40 ° C to MIN/TYP/

70 ° C 85 ° C MAX

MHz TYP

ns TYP

dBc TYP

TYP

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SLOS423C – SEPTEMBER 2003 – REVISED AUGUST 2004

TYP OVER TEMPERATURE

PARAMETER TEST CONDITIONS

OUTPUT CHARACTERISTICS

Output voltage swing V MIN

Output current (sourcing) RL= 40 Ω 280 225 200 200 mA MIN Output current (sinking) RL= 40 Ω 250 200 175 175 mA MIN Output impedance f = 1 MHz, Closed loop 0.06 Ω TYP

POWER SUPPLY

Specified operating voltage ± 15 ± 16 ± 16 ± 16 V MAX Maximum quiescent current 9.5 10.5 11 11 mA MAX Minimum quiescent current 9.5 8.5 8 8 mA MIN Power supply rejection (+PSRR) VS+= 15.5 V to 14.5 V, VS-= 15 V 75 70 65 65 dB MIN Power supply rejection (-PSRR) VS+= 15 V, VS-= -15.5 V to -14.5 V 73 68 65 65 dB MIN

POWER-DOWN CHARACTERISTICS (THS3095 ONLY)

Power-down voltage level V MAX

Power-down quiescent current PD = 0V 500 700 800 800 µA MAX

VPDquiescent current µA MAX

Turnon time delay 90% of final value 60 Turnoff time delay 10% of final value 150

RL= 1 k Ω ± 13.2 ± 12.8 ± 12.5 ± 12.5 RL= 100 Ω ± 12.5 ± 12.1 ± 11.8 ± 11.8

Enable, REF = 0 V ≤ Power-down , REF = 0 V ≥ 2

VPD= 0 V, REF = 0 V, 11 15 20 20 VPD= 3.3 V, REF = 0 V 11 15 20 20

25 ° C 25 ° C UNIT

0 ° C to -40 ° C to MIN/TYP/

70 ° C 85 ° C MAX

µs TYP

THS3091 THS3095

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THS3091 THS3095

SLOS423C – SEPTEMBER 2003 – REVISED AUGUST 2004

ELECTRICAL CHARACTERISTICS

VS= ± 5 V, RF= 1.15 k Ω , RL= 100 Ω , and G = 2 (unless otherwise noted)

TYP OVER TEMPERATURE

PARAMETER TEST CONDITIONS

AC PERFORMANCE

G = 1, RF= 1.78 k Ω , VO= 200 mV

Small-signal bandwidth, -3 dB

0.1-dB bandwidth flatness G = 2, RF= 1.15 k Ω , VO= 200 mV Large-signal bandwidth G = 2, RF= 1.15 k Ω , VO= 4 V

Slew rate (25% to 75% level) V/µs TYP

Rise and fall time G = 2, VO= 5-V step, RF= 1.21 k Ω 5 ns TYP Settling time to 0.1% G = -2, VO= 2 VPPstep 35 Settling time to 0.01% G = -2, VO= 2 VPPstep 73 Harmonic distortion

2nd Harmonic distortion

3rd Harmonic distortion

Input voltage noise f > 10 kHz 2 nV / √ Hz TYP Noninverting input current noise f > 10 kHz 14 pA / √ Hz TYP Inverting input current noise f > 10 kHz 17 pA / √ Hz TYP

Differential gain

Differential phase

DC PERFORMANCE

Transimpedance VO= ± 2.5 V, Gain = 1 700 250 200 200 k Ω MIN Input offset voltage 0.3 2 3 3 mV MAX

Average offset voltage drift ± 10 ± 10 µV/ ° C TYP

Noninverting input bias current 2 15 20 20 µA MAX

Average bias current drift ± 20 ± 20 nA/ ° C TYP

Inverting input bias current 5 15 20 20 µA MAX

Average bias current drift ± 20 ± 20 nA/ ° C TYP

Input offset current 1 10 15 15 µA MAX

Average offset current drift ± 20 ± 20 nA/ ° C TYP

INPUT CHARACTERISTICS

Common-mode input range ± 3.6 ± 3.3 ± 3 ± 3 V MIN Common-mode rejection ratio VCM= ± 2.0 V, VO= 0 V 66 60 57 57 dB MIN Noninverting input resistance 1.1 M Ω TYP Noninverting input capacitance 1.2 pF TYP Inverting input resistance 32 Ω TYP Inverting input capacitance 1.5 pF TYP

G = 2, RF= 1.15 k Ω , VO= 200 mV G = 5, RF= 1 k Ω , VO= 200 mV G = 10, RF= 866 Ω , VO= 200 mV

G = 2, VO= 5-V step, RF= 1.21 k Ω 1400 G = 5, VO= 5-V step, RF= 1 k Ω 1900

G = 2, RF= 1.15 k Ω , VO= 2 VPP, f = 10 MHz

G = 2, RL= 150 Ω , RF= 1.15 k Ω

VCM= 0 V

PP PP

RL= 100 Ω 77 RL= 1 k Ω 73 RL= 100 Ω 70 RL= 1 k Ω 68

NTSC 0.027% PAL 0.025% NTSC 0.04 ° PAL 0.05 °

25 ° C 25 ° C UNIT

190 180 160 150

160

0 ° C to -40 ° C to MIN/TYP/

70 ° C 85 ° C MAX

MHz TYP

ns TYP

dBc TYP

TYP

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SLOS423C – SEPTEMBER 2003 – REVISED AUGUST 2004

TYP OVER TEMPERATURE

PARAMETER TEST CONDITIONS

OUTPUT CHARACTERISTICS

Output voltage swing V MIN

Output current (sourcing) RL= 40 Ω 200 160 140 140 mA MIN Output current (sinking) RL= 40 Ω 180 150 125 125 mA MIN Output impedance f = 1 MHz, Closed loop 0.09 Ω TYP

POWER SUPPLY

Specified operating voltage ± 5 ± 4.5 ± 4.5 ± 4.5 V MAX Maximum quiescent current 8.2 9 9.5 9.5 mA MAX Minimum quiescent current 8.2 7 6.5 6.5 mA MIN Power supply rejection (+PSRR) VS+= 5.5 V to 4.5 V, VS–= 5 V 73 68 63 63 dB MIN Power supply rejection (-PSRR) VS+= 5 V, VS–= –4.5 V to -5.5 V 71 65 60 60 dB MIN

POWER-DOWN CHARACTERISTICS (THS3095 ONLY)

Power-down voltage level V MAX

Power-down quiescent current PD = 0V 300 500 600 600 µA MAX

VPDquiescent current µA MAX

Turnon time delay 90% of final value 60 Turnoff time delay 10% of final value 150

RL= 1 k Ω ± 3.4 ± 3.1 ± 2.8 ± 2.8 RL= 100 Ω ± 3.1 ± 2.7 ± 2.5 ± 2.5

Enable, REF = 0 V ≤ 0.8 Power-down , REF = 0 V ≥ 2

VPD= 0 V, REF = 0 V, 11 15 20 20 VPD= 3.3 V, REF = 0 V 11 15 20 20

25 ° C 25 ° C UNIT

0 ° C to -40 ° C to MIN/TYP/

70 ° C 85 ° C MAX

µs TYP

THS3091 THS3095

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THS3091 THS3095

SLOS423C – SEPTEMBER 2003 – REVISED AUGUST 2004

TYPICAL CHARACTERISTICS

TABLE OF GRAPHS

± 15-V GRAPHS FIGURE

Noninverting small-signal frequency response 1, 2 Inverting small-signal frequency response 3

0.1-dB gain flatness frequency response 4 Noninverting large-signal frequency response 5 Inverting large-signal frequency response 6 Capacitive load frequency response 7 Recommended R 2nd Harmonic distortion vs Frequency 9, 11 3rd Harmonic distortion vs Frequency 10, 12 2nd Harmonic distortion vs Frequency 13 3rd Harmonic distortion vs Frequency 14 Harmonic distortion vs Output voltage swing 15, 16 Slew rate vs Output voltage step 17, 18, 19 Noise vs Frequency 20 Settling time 21, 22 Quiescent current vs Supply voltage 23 Quiescent current vs Frequency 24 Output voltage vs Load resistance 25 Input bias and offset current vs Case temperature 26 Input offset voltage vs Case temperature 27 Transimpedance vs Frequency 28 Rejection ratio vs Frequency 29 Noninverting small-signal transient response 30 Inverting large-signal transient response 31, 32 Overdrive recovery time 33 Differential gain vs Number of loads 34 Differential phase vs Number of loads 35 Closed-loop output impedance vs Frequency 36 Power-down quiescent current vs Supply voltage 37 Turnon and turnoff time delay 38

ISO

vs Capacitive load 8

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SLOS423C – SEPTEMBER 2003 – REVISED AUGUST 2004

TABLE OF GRAPHS

± 5-V GRAPHS FIGURE

Noninverting small-signal frequency response 39 Inverting small-signal frequency response 40

0.1-dB gain flatness frequency response 41 Noninverting large-signal frequency response 42 Inverting large-signal frequency response 43 Settling time 44 2nd Harmonic distortion vs Frequency 45, 47 3rd Harmonic distortion vs Frequency 46, 48 Harmonic distortion vs Output voltage swing 49, 50 Slew rate vs Output voltage step 51, 52, 53 Quiescent current vs Frequency 54 Output voltage vs Load resistance 55 Input bias and offset current vs Case temperature 56 Overdrive recovery time 57 Rejection ratio vs Frequency 58

THS3091 THS3095

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1 M 10 M 100 M 1 G

f − Frequency − Hz

Noninverting Gain − dB

Gain = 2, RL =100 Ω, VO = 200 mVPP, VS = ±15 V

RF = 750 Ω

RF = 1.21 k ΩRF = 1.21 kΩ

RF = 1.5 kΩ

−4

−2

1 M

10 M 100 M 1 G

f − Frequency − Hz

Noninverting Gain − dB

G = 1, RF = 1.78 kΩ

G = 10, RF = 866 Ω

G = 5, RF = 1 kΩ

G = 2, RF = 1.21 kΩ

RL = 100 Ω, VO = 200 mVPP, VS = ±15 V

−4

−2

1 M 10 M 100 M 1 G

f − Frequency − Hz

Inverting Gain − dB

G = −1, RF = 1.05 kΩ

G = −10, RF = 866 Ω

G = −5, RF = 909 Ω

G = −2, RF = 1 kΩ

RL = 100 Ω, VO = 200 mVPP, VS = ±15 V

−4

−2

1 M 10 M 100 M 1 G

f − Frequency − Hz

VO = 4 VPP, RL = 100 Ω, VS = ±15 V

G = −5, RF = 909 Ω

G = −2, RF = 1 kΩ

Inverting Gain − dB

1 M 10 M 100 M 1 G

f − Frequency − Hz

VO = 4 VPP, RL = 100 Ω, VS = ±15 V

G = 5, RF = 1 kΩ

G = 2, RF = 1.21 kΩ

Noninverting Gain − dB

5.7

5.8

5.9

6.1

6.2

6.3

100 k 1 M 10 M 100 M 1 G

Gain = 2, RF = 1.21 kΩ, RL = 100 Ω, VO = 200 mVPP, VS = ±15 V

f - Frequency - Hz

Noninverting Gain - dB

−2

10 M 100 M 1 G

Signal Gain − dB

Gain = 5, RL = 100 Ω, VS =±15 V

(ISO)

= 38.3 Ω

CL = 10 pF

(ISO)

= 30.9 Ω

CL = 22 pF

(ISO)

= 22.1 Ω

CL = 47 pF

(ISO)

= 15.8 Ω

CL = 100 pF

f − Frequency − Hz

10 100

− Capacitive Load − pF

Recommended

ISO

Ω

Gain = 5, RL = 100 Ω, VS = ±15 V

−

−90

−80

−70

−60

−50

−45

−40

1 M 10 M 100 M

f − Frequency − Hz

2nd Harmonic Distortion − dBc

G = 1, RF = 1.78 kΩ

G = 2, RF = 1.21 kΩ

100 k

−85

−75

−65

−55

VO = 2 VPP, RL = 100 Ω, VS = ±15 V

THS3091 THS3095

SLOS423C – SEPTEMBER 2003 – REVISED AUGUST 2004

NONINVERTING SMALL-SIGNAL NONINVERTING SMALL-SIGNAL INVERTING SMALL-SIGNAL

FREQUENCY RESPONSE FREQUENCY RESPONSE FREQUENCY RESPONSE

Figure 1. Figure 2. Figure 3.

0.1-dB GAIN FLATNESS NONINVERTING LARGE-SIGNAL INVERTING LARGE-SIGNAL

FREQUENCY RESPONSE FREQUENCY RESPONSE FREQUENCY RESPONSE

TYPICAL CHARACTERISTICS ( ± 15 V)

FREQUENCY RESPONSE CAPTIVATE LOAD FREQUENCY

Figure 4. Figure 5. Figure 6.

CAPACITIVE LOAD vs vs

RECOMMENDED R

Figure 7. Figure 8. Figure 9.

ISO

2ND HARMONIC DISTORTION

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