LM340-N/LM78XX Series 3-Terminal Positive Regulators
Check for Samples: LM340-N, LM78xx
1
FEATURES
2
•Complete Specifications at 1A Load
•Output Voltage Tolerances of ±2% at Tj= 25°C
and ±4% Over the Temperature Range
(LM340A)
•Line Regulation of 0.01% of V
1A Load (LM340A)
•Load Regulation of 0.3% of V
•Internal Thermal Overload Protection
•Internal Short-circuit Current Limit
•Output Transistor Safe Area Protection
•P+Product Enhancement Tested
/V of ΔVINat
OUT
/A (LM340A)
OUT
SNOSBT0J –FEBRUARY 2000–REVISED DECEMBER 2013
DESCRIPTION
The LM140/LM340A/LM340-N/LM78XXC monolithic
3-terminal positive voltage regulators employ internal
current-limiting, thermal shutdown and safe-area
compensation, making them essentially indestructible.
If adequate heat sinking is provided, they can deliver
over 1.0A output current. They are intended as fixed
voltage regulators in a wide range of applications
including local (on-card) regulation for elimination of
noise and distribution problems associated with
single-point regulation. In addition to use as fixed
voltage regulators, these devices can be used with
external components to obtain adjustable output
voltages and currents.
Considerable effort was expended to make the entire
series of regulators easy to use and minimize the
number of external components. It is not necessary to
bypass the output, although this does improve
transient response. Input bypassing is needed only if
the regulator is located far from the filter capacitor of
the power supply.
The 5V, 12V, and 15V regulator options are available
inthesteelTO-3powerpackage.The
LM340A/LM340-N/LM78XXC series is available in the
TO-220 plastic power package, and the LM340-N-5.0
is available in the SOT-223 package, as well as the
LM340-5.0 and LM340-12 in the surface-mount
DDPAK/TO-263 package.
Typical Applications
*Required if the regulator is located far from the power supply filter.
**Although no output capacitor is needed for stability, it does help
transient response. (If needed, use 0.1 μF, ceramic disc).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
www.ti.com
Absolute Maximum Ratings
DC Input Voltage35V
Internal Power Dissipation
Maximum Junction Temperature150°C
Storage Temperature Range−65°C to +150°C
Lead Temperature (Soldering, 10 sec.)TO-3 Package (NDS)300°C
ESD Susceptibility
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Conditions are conditions under which
the device functions but the specifications might not be ensured. For ensured specifications and test conditions see the Electrical
Characteristics.
(2) Military datasheets are available upon request. At the time of printing, the military datasheet specifications for the LM140K-5.0/883,
LM140K-12/883, and LM140K-15/883 complied with the min and max limits for the respective versions of the LM140. The LM140H and
LM140K may also be procured as JAN devices on slash sheet JM38510/107.
(3) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(4) The maximum allowable power dissipation at any ambient temperature is a function of the maximum junction temperature for operation
(T
= 125°C or 150°C), the junction-to-ambient thermal resistance (θJA), and the ambient temperature (TA). P
JMAX
TA)/θJA. If this dissipation is exceeded, the die temperature will rise above T
temperature rises above 150°C, the device will go into thermal shutdown. For the TO-3 package (NDS), the junction-to-ambient thermal
resistance (θJA) is 39°C/W. When using a heatsink, θJAis the sum of the 4°C/W junction-to-case thermal resistance (θJC) of the TO-3
package and the case-to-ambient thermal resistance of the heatsink. For the TO-220 package (NDE), θJAis 54°C/W and θJCis 4°C/W. If
SOT-223 is used, the junction-to-ambient thermal resistance is 174°C/W and can be reduced by a heatsink (see Applications Hints on
heatsinking).If the DDPAK\TO-263 package is used, the thermal resistance can be reduced by increasing the PC board copper area
thermally connected to the package: Using 0.5 square inches of copper area, θJAis 50°C/W; with 1 square inch of copper area, θJAis
37°C/W; and with 1.6 or more inches of copper area, θJAis 32°C/W.
(5) ESD rating is based on the human body model, 100 pF discharged through 1.5 kΩ.
(2) The maximum allowable power dissipation at any ambient temperature is a function of the maximum junction temperature for operation
(T
= 125°C or 150°C), the junction-to-ambient thermal resistance (θJA), and the ambient temperature (TA). P
JMAX
TA)/θJA. If this dissipation is exceeded, the die temperature will rise above T
temperature rises above 150°C, the device will go into thermal shutdown. For the TO-3 package (NDS), the junction-to-ambient thermal
and the electrical specifications do not apply. If the die
JMAX
DMAX
= (T
JMAX
−
resistance (θJA) is 39°C/W. When using a heatsink, θJAis the sum of the 4°C/W junction-to-case thermal resistance (θJC) of the TO-3
package and the case-to-ambient thermal resistance of the heatsink. For the TO-220 package (NDE), θJAis 54°C/W and θJCis 4°C/W. If
SOT-223 is used, the junction-to-ambient thermal resistance is 174°C/W and can be reduced by a heatsink (see Applications Hints on
heatsinking).If the DDPAK\TO-263 package is used, the thermal resistance can be reduced by increasing the PC board copper area
thermally connected to the package: Using 0.5 square inches of copper area, θJAis 50°C/W; with 1 square inch of copper area, θJAis
37°C/W; and with 1.6 or more inches of copper area, θJAis 32°C/W.
RippleTJ= 25°C, f = 120 Hz, IO=688061726070dB
Rejection1A
or f = 120 Hz, IO= 500 mA,686160dB
Over Temperature,
V
≤ VIN≤ V
MIN
R
DropoutTJ= 25°C, IO= 1A2.02.02.0V
O
Voltage
MAX
(8 ≤ VIN≤ 18)(15 ≤ VIN≤ 25)(18.5 ≤ VIN≤ 28.5)V
Outputf = 1 kHz81819mΩ
Resistance
Short-CircuitTJ= 25°C2.11.51.2A
Current
Peak OutputTJ= 25°C2.42.42.4A
Current
Average TCMin, TJ= 0°C, IO= 5 mA−0.6−1.5−1.8mV/°C
of V
O
V
Input Voltage TJ= 25°C
IN
Required to
Maintain Line
7.514.517.5V
Regulation
(1) All characteristics are measured with a 0.22 μF capacitor from input to ground and a 0.1 μF capacitor from output to ground. All
characteristics except noise voltage and ripple rejection ratio are measured using pulse techniques (tw≤ 10 ms, duty cycle ≤ 5%).
Output voltage changes due to changes in internal temperature must be taken into account separately.
Input Voltage (unless otherwise noted)10V19V23VUnits
ol
ParameterConditionsMinTypMaxMinTypMaxMinTypMax
V
Output Voltage TJ= 25°C, 5 mA ≤ IO≤ 1A4.855.211.51212.514.41515.6V
O
ΔVOLineIO= 500TJ= 25°C35041204150mV
RegulationmA
ΔVOLoadTJ=5 mA ≤ IO≤10501212012150mV
Regulation25°C1.5A
I
ΔI
QuiescentIO≤ 1ATJ= 25°C666mA
Q
Current
Quiescent5 mA ≤ IO≤ 1A0.50.50.5mA
Q
Current
Change
V
Output NoiseTA= 25°C, 10 Hz ≤ f ≤ 100407590μV
N
VoltagekHz
Ripplef = 120IO≤ 1A, TJ=688061726070dB
RejectionHz25°C or
R
DropoutTJ= 25°C, IO= 1A2.02.02.0V
O
Voltage
Outputf = 1 kHz81819mΩ
Resistance
Short-CircuitTJ= 25°C2.11.51.2A
Current
Peak OutputTJ= 25°C2.42.42.4A
Current
Average TC of 0°C ≤ TJ≤ +150°C, IO= 5−0.6−1.5−1.8mV/°C
V
OUT
Output Voltage5V12V15V
PD≤ 15W, 5 mA ≤ IO≤ 1A4.755.2511.412.614.2515.75V
V
MIN
≤ VIN≤ V
ΔV
MAX
IN
(8 ≤ VIN≤ 20)(15.5 ≤ VIN≤ 27)(18.5 ≤ VIN≤ 30)V
(7 ≤ VIN≤ 25)(14.5 ≤ VIN≤ 30)(17.5 ≤ VIN≤ 30)V
−55°C ≤ TJ≤50120150mV
+150°C
ΔV
IN
(8 ≤ VIN≤ 20)(15 ≤ VIN≤ 27)(18.5 ≤ VIN≤ 30)V
IO≤ 1ATJ= 25°C50120150mV
ΔV
IN
(7.5 ≤ VIN≤ 20)(14.6 ≤ VIN≤ 27)(17.7 ≤ VIN≤ 30)V
−55°C ≤ TJ≤256075mV
+150°C
ΔV
IN
(8 ≤ VIN≤ 12)(16 ≤ VIN≤ 22)(20 ≤ VIN≤ 26)V
250 mA ≤ IP≤256075mV
750 mA
−55°C ≤ TJ≤ +150°C,50120150mV
5 mA ≤ IO≤ 1A
−55°C ≤ TJ≤777mA
+150°C
TJ= 25°C, IO≤ 1A0.80.80.8mA
V
MIN
≤ VIN≤ V
MAX
(8 ≤ VIN≤ 20)(15 ≤ VIN≤ 27)(18.5 ≤ VIN≤ 30)V
IO= 500 mA, −55°C ≤ TJ≤0.80.80.8mA
+150°C
V
MIN
≤ VIN≤ V
MAX
(8 ≤ VIN≤ 25)(15 ≤ VIN≤ 30)(18.5 ≤ VIN≤ 30)V
IO≤ 500 mA,686160dB
V
MIN
−55°C ≤ T
≤+150°C
≤ VIN≤ V
MAX
J
(8 ≤ VIN≤ 18)(15 ≤ VIN≤ 25)(18.5 ≤ VIN≤ 28.5)V
mA
(1) All characteristics are measured with a 0.22 μF capacitor from input to ground and a 0.1 μF capacitor from output to ground. All
characteristics except noise voltage and ripple rejection ratio are measured using pulse techniques (tw≤ 10 ms, duty cycle ≤ 5%).
Output voltage changes due to changes in internal temperature must be taken into account separately.
Output VoltageTJ= 25°C, 5 mA ≤ IO≤ 1A4.855.211.51212.514.41515.6V
O
PD≤ 15W, 5 mA ≤ IO≤ 1A4.755.2511.412.614.2515.75V
V
≤ VIN≤ V
MIN
Line Regulation IO= 500TJ= 25°C35041204150mV
O
mA
ΔV
MAX
IN
(7.5 ≤ VIN≤ 20)(14.5 ≤ VIN≤ 27)(17.5 ≤ VIN≤ 30)V
(7 ≤ VIN≤ 25)(14.5 ≤ VIN≤ 30)(17.5 ≤ VIN≤ 30)V
0°C ≤ TJ≤50120150mV
+125°C
ΔV
IN
(8 ≤ VIN≤ 20)(15 ≤ VIN≤ 27)(18.5 ≤ VIN≤ 30)V
IO≤ 1ATJ= 25°C50120150mV
ΔV
IN
(7.5 ≤ VIN≤ 20)(14.6 ≤ VIN≤ 27)(17.7 ≤ VIN≤ 30)V
0°C ≤ TJ≤256075mV
+125°C
ΔV
IN
Load Regulation TJ=5 mA ≤ IO≤10501212012150mV
O
25°C1.5A
(8 ≤ VIN≤ 12)(16 ≤ VIN≤ 22)(20 ≤ VIN≤ 26)V
250 mA ≤ IO≤256075mV
750 mA
5 mA ≤ IO≤ 1A, 0°C ≤ T
≤ +125°C
J
50120150mV
QuiescentIO≤ 1ATJ= 25°C888mA
Current
0°C ≤ TJ≤8.58.58.5mA
+125°C
Quiescent5 mA ≤ IO≤ 1A0.50.50.5mA
Q
Current Change
TJ= 25°C, IO≤ 1A1.01.01.0mA
V
MIN
≤ VIN≤ V
MAX
(7.5 ≤ VIN≤ 20)(14.8 ≤ VIN≤ 27)(17.9 ≤ VIN≤ 30)V
IO≤ 500 mA, 0°C ≤ TJ≤1.01.01.0mA
+125°C
V
≤ VIN≤ V
MIN
Output NoiseTA= 25°C, 10 Hz ≤ f ≤407590μV
N
Voltage100 kHz
MAX
(7 ≤ VIN≤ 25)(14.5 ≤ VIN≤ 30)(17.5 ≤ VIN≤ 30)V
Ripple RejectionIO≤ 1A, TJ=628055725470dB
25°C
f = 120
Hz
V
MIN
≤ VIN≤ V
or IO≤ 500625554dB
mA,
0°C ≤ T
+125°C
MAX
≤
J
(8 ≤ VIN≤ 18)(15 ≤ VIN≤ 25)(18.5 ≤ VIN≤ 28.5)V
characteristics except noise voltage and ripple rejection ratio are measured using pulse techniques (tw≤ 10 ms, duty cycle ≤ 5%).
Output voltage changes due to changes in internal temperature must be taken into account separately.
Product Folder Links: LM340-N LM78xx
LM340-N, LM78xx
www.ti.com
LM340-N Electrical Characteristics
(1)
(continued)
SNOSBT0J –FEBRUARY 2000–REVISED DECEMBER 2013
0°C ≤ TJ≤ +125°C unless otherwise specified
Output Voltage5V12V15V
SymbolInput Voltage (unless otherwise noted)10V19V23VUnits
ParameterConditionsMinTypMaxMinTypMaxMinTypMax
R
Dropout Voltage TJ= 25°C, IO= 1A2.02.02.0V
O
Outputf = 1 kHz81819mΩ
Resistance
Short-CircuitTJ= 25°C2.11.51.2A
Current
Peak OutputTJ= 25°C2.42.42.4A
Current
Average TC of0°C ≤ TJ≤ +125°C, IO= 5−0.6−1.5−1.8mV/°C
V
Output VoltageTJ= 25°C7.78.08.3V
Line RegulationTJ= 25°C10.5V ≤ VI≤ 25V6.0160mV
O
Load RegulationTJ= 25°C5.0 mA ≤ IO≤ 1.5A12160mV
O
Output Voltage11.5V ≤ VI≤ 23V, 5.0 mA ≤ IO≤ 1.0A, P ≤ 15W7.68.4V
Quiescent CurrentTJ= 25°C4.38.0mA
QuiescentWith Line11.5V ≤ VI≤ 25V1.0mA
Current ChangeWith Load5.0 mA ≤ IO≤ 1.0A0.5
V
N
NoiseTA= 25°C, 10 Hz ≤ f ≤ 100 kHz52μV
ΔVI/ΔVORipple Rejectionf = 120 Hz, IO= 350 mA, TJ= 25°C5672dB
V
DO
R
O
I
OS
I
PK
Dropout VoltageIO= 1.0A, TJ= 25°C2.0V
Output Resistancef = 1.0 kHz16mΩ
Output Short Circuit CurrentTJ= 25°C, VI= 35V0.45A
Peak Output CurrentTJ= 25°C2.2A
ΔVO/ΔTAverage Temperature Coefficient of IO= 5.0 mA
Output Voltage
(1)
LM7808CUnits
MinTypMax
11.0V ≤ VI≤ 17V2.080
250 mA ≤ IO≤ 750 mA4.080
0.8mV/°C
(1) All characteristics are measured with a 0.22 μF capacitor from input to ground and a 0.1 μF capacitor from output to ground. All
characteristics except noise voltage and ripple rejection ratio are measured using pulse techniques (tw≤ 10 ms, duty cycle ≤ 5%).
Output voltage changes due to changes in internal temperature must be taken into account separately.
The LM340-N/LM78XX series is designed with thermal protection, output short-circuit protection and output
transistor safe area protection. However, as with any IC regulator, it becomes necessary to take precautions to
assure that the regulator is not inadvertently damaged. The following describes possible misapplications and
methods to prevent damage to the regulator.
SHORTING THE REGULATOR INPUT
When using large capacitors at the output of these regulators, a protection diode connected input to output
(Figure 21) may be required if the input is shorted to ground. Without the protection diode, an input short will
cause the input to rapidly approach ground potential, while the output remains near the initial V
because of the
OUT
stored charge in the large output capacitor. The capacitor will then discharge through a large internal input to
output diode and parasitic transistors. If the energy released by the capacitor is large enough, this diode, low
current metal and the regulator will be destroyed. The fast diode in Figure 21 will shunt most of the capacitors
discharge current around the regulator. Generally no protection diode is required for values of output capacitance
≤ 10 μF.
RAISING THE OUTPUT VOLTAGE ABOVE THE INPUT VOLTAGE
Since the output of the device does not sink current, forcing the output high can cause damage to internal low
current paths in a manner similar to that just described in the “Shorting the Regulator Input” section.
REGULATOR FLOATING GROUND (Figure 22)
When the ground pin alone becomes disconnected, the output approaches the unregulated input, causing
possible damage to other circuits connected to V
also occur to the regulator. This fault is most likely to occur when plugging in regulators or modules with on card
regulators into powered up sockets. Power should be turned off first, thermal limit ceases operating, or ground
should be connected first if power must be left on.
. If ground is reconnected with power “ON”, damage may
OUT
TRANSIENT VOLTAGES
If transients exceed the maximum rated input voltage of the device, or reach more than 0.8V below ground and
have sufficient energy, they will damage the regulator. The solution is to use a large input capacitor, a series
input breakdown diode, a choke, a transient suppressor or a combination of these.
is found using the equation shown, a heatsink must be selected that has a value that is
(H–A)
less than or equal to this number.
θ
is specified numerically by the heatsink manufacturer in this catalog, or shown in a curve that plots
(H–A)
temperature rise vs power dissipation for the heatsink.
HEATSINKING DDPAK/TO-263 AND SOT-223 PACKAGE PARTS
Both the DDPAK/TO-263 (KTT) and SOT-223 (DCY) packages use a copper plane on the PCB and the PCB
itself as a heatsink. To optimize the heat sinking ability of the plane and PCB, solder the tab of the plane.
shows for the DDPAK/TO-263 the measured values of θ
with 1 ounce copper and no solder mask over the copper area used for heatsinking.
for different copper area sizes using a typical PCB
(J–A)
Figure 24. θ
vs Copper (1 ounce) Area for the DDPAK/TO-263 Package
(J–A)
As shown in the figure, increasing the copper area beyond 1 square inch produces very little improvement. It
should also be observed that the minimum value of θ
for the DDPAK/TO-263 package mounted to a PCB is
(J–A)
32°C/W.
As a design aid, Figure 25 shows the maximum allowable power dissipation compared to ambient temperature
Changes from Revision I (March 2013) to Revision JPage
•Changed 0.5 from typ to max ............................................................................................................................................... 4
LM340AT-5.0NRNDTO-220NDE345TBDCall TICall TI0 to 70LM340AT
LM340AT-5.0/NOPBACTIVETO-220NDE345Pb-Free (RoHS
LM340K-5.0ACTIVETO-3NDS250TBDCall TICall TI0 to 70LM340K
LM340K-5.0/NOPBACTIVETO-3NDS250Green (RoHS
LM340MP-5.0NRNDSOT-223DCY41000TBDCall TICall TI0 to 70N00A
LM340MP-5.0/NOPBACTIVESOT-223DCY41000Green (RoHS
LM340MPX-5.0/NOPBACTIVESOT-223DCY42000Green (RoHS
LM340S-12/NOPBACTIVEDDPAK/
LM340S-5.0NRNDDDPAK/
LM340S-5.0/NOPBACTIVEDDPAK/
LM340SX-12/NOPBACTIVEDDPAK/
LM340SX-5.0NRNDDDPAK/
LM340SX-5.0/NOPBACTIVEDDPAK/
LM340T-12NRNDTO-220NDE345TBDCall TICall TI0 to 70LM340T12
LM340T-12/NOPBACTIVETO-220NDE345Green (RoHS
LM340T-15NRNDTO-220NDE345TBDCall TICall TI0 to 70LM340T15
LM340T-15/NOPBACTIVETO-220NDE345Green (RoHS
LM340T-5.0NRNDTO-220NDE345TBDCall TICall TI0 to 70LM340T5
Package Type Package
(1)
TO-263
TO-263
TO-263
TO-263
TO-263
TO-263
Drawing
Qty
KTT345Pb-Free (RoHS
KTT345TBDCall TICall TI0 to 70LM340S
KTT345Pb-Free (RoHS
KTT3500Pb-Free (RoHS
KTT3500TBDCall TICall TI0 to 70LM340S
KTT3500Pb-Free (RoHS
Pins Package
Eco Plan
(2)
Exempt)
& no Sb/Br)
& no Sb/Br)
& no Sb/Br)
Exempt)
Exempt)
Exempt)
Exempt)
& no Sb/Br)
& no Sb/Br)
Lead/Ball Finish
(6)
MSL Peak Temp
(3)
Op Temp (°C)Device Marking
CU SNLevel-1-NA-UNLIM0 to 70LM340AT
Call TILevel-1-NA-UNLIM0 to 70LM340K
CU SNLevel-1-260C-UNLIM0 to 70N00A
CU SNLevel-1-260C-UNLIM0 to 70N00A
CU SNLevel-3-245C-168 HR0 to 70LM340S
CU SNLevel-3-245C-168 HR0 to 70LM340S
CU SNLevel-3-245C-168 HR0 to 70LM340S
CU SNLevel-3-245C-168 HR0 to 70LM340S
CU SNLevel-1-NA-UNLIM0 to 70LM340T12
CU SNLevel-1-NA-UNLIM0 to 70LM340T15
11-Feb-2015
Samples
(4/5)
5.0 P+
5.0 P+
-5.0 7805P+
-5.0 7805P+
-12 P+
-5.0 P+
-5.0 P+
-12 P+
-5.0 P+
-5.0 P+
7812 P+
7812 P+
7815 P+
7815 P+
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
Orderable DeviceStatus
LM340T-5.0/LF01ACTIVETO-220NDG345Pb-Free (RoHS
LM340T-5.0/NOPBACTIVETO-220NDE345Pb-Free (RoHS
LM7812CT/NOPBACTIVETO-220NDE345Green (RoHS
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
Package Type Package
(1)
Drawing
Pins Package
Qty
Eco Plan
(2)
Exempt)
Exempt)
& no Sb/Br)
Lead/Ball Finish
(6)
CU SNLevel-4-260C-72 HRLM340T5
CU SNLevel-1-NA-UNLIM0 to 70LM340T5
CU SNLevel-1-NA-UNLIM0 to 70LM340T12
MSL Peak Temp
(3)
Op Temp (°C)Device Marking
7805 P+
7805 P+
7805 P+
7812 P+
11-Feb-2015
(4/5)
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
Samples
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
11-Feb-2015
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
NOTES: A. All linear dimensions are in millimeters (inches).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion.
D. Falls within JEDEC TO-261 Variation AA.
3,70 (0.146)
3,30 (0.130)
0,84 (0.033)
0,66 (0.026)
0,10 (0.004)
1,70 (0.067)
1,50 (0.059)
Seating Plane
M
0,08 (0.003)
0°–10°
Gauge Plane
0,25 (0.010)
0,75 (0.030) MIN
0,35 (0.014)
0,23 (0.009)
4202506/B 06/2002
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
KTT0003B
MECHANICAL DATA
BOTTOM SIDE OF PACKAGE
TS3B (Rev F)
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