TEAC EU-68 Service manual

SERVICE MANUAL

EU-68

68cm CTV

Effective: JANUARY,2000 EU68SERV

TECHNICAL BULLETIN 02-Jun-00

MODEL: PROBLEM:

EU-51/80 ST

Power supply problem

File: EU51-80 chopper tb.doc

The chopper transistor Q802 is damaged as a consequence of a fault in D816. This problem normally occurs when a diode type UF5407 is used in the position D816.

Instructions

Replace damaged components. Use only a diode type BMY36D for the position D816.

Regards,

Alcides Berta

TEAC Australia Pty Ltd.

Page 1 of 1

TECHNICAL BULLETIN 26-Jun-00

MODEL: PROBLEM: CRT output IC protection

EU 51 / 66 / 68 / 80 ST

File: EU51-80 spgap tb.doc

This is a tentative solution to avoid damages to the output video amplifier IC901 (TDA6107) caused by electric discharges between electrodes of the CRT. The modification should be applied to units found with damaged video amplifier IC.

Instructions

Add the following components to the CRT board. Refer to the figure and table below for parts location and specifications.

Components information

Item Part Number Description From To Comments

1 EUSPARK 300V Spark gap Point G Aqua 2 EUSPARK 300V Spark gap Ground Aqua

3 QDTBOUZ6R2BS Zenner diode

6V2 400 mW

Regards, Alcides Berta

TEAC Australia Pty Ltd.

1-PL901 (Cathode)

Page 1 of 1

Ground (Anode)

Spark gap devices have no polarity

DO NOT CHANGE ANY MODULE UNLESS THE SET IS SWITCH OFF

The mains supply side of the switch mode power supply transformer is live. Use an isolating transformer. The receivers fulfill completely the safety requirements.

Safety precautions:

Servicing of this TV should only be carried out by a qualified person.

- Components marked with the warning symbol on the circuit diagram are critical for safety and must only be replaced with an identical component.

- Power resistor and fusable resistors must be mounted in an identical manner to the original component.

- When servicing this TV, check that the EHT does not exceed 26kV.

TV Set switched off:

Make short-circuit between HV-CRT clip and CRT ground layer. Short C804 (150mF) before changing IC802 or other components in primary side of SMPS.

Measurements:

Voltage readings and oscilloscope traces are measured under following conditions. Antenna signal 60dB from colourbar generator. (100% white, 75% colour saturation) Brightness, contrast, colour set for a normal picture. Mains supply, 220VAC, 50Hz.

PERI-TV SOCKET

SCART 1 (SC050) SCART 2 (SC051)

1 Audio right output 0.5Vrms / 1K 1 Audio right output 0.5Vrms / 1K 2 Audio right input 0.5Vrms / 10K 2 Audio right input 0.5Vrms / 10K 3 Audio left output 0.5Vrms / 1K 3 Audio left output 0.5Vrms / 1K 4 Ground AF 4 Ground AF 5 Ground Blue 5 Ground Blue 6 Audio left input 0.5Vrms / 10K 6 Audio left input 0.5Vrms / 10K 7 Blue input 0.7Vpp / 75ohm 7 Blue input 0.7Vpp / 75ohm 8 AV switching input 0-12VDC /10K 8 AV switching input 0-12VDC /10K 9 Ground Green 9 Ground Green 10 - 10 11 Green input 0.7Vpp / 75ohm 11 12 - 12 13 Ground Red 13 Ground Red 14 Ground Blanking 14 Ground Blanking 15 Red input 0.7Vpp / 75ohm 15 16 Blanking input 0-0.4VDC, 1-3VDC / 75ohm 16 17 Ground CVS output 17 Ground CVS output 18 Ground CVS input 18 Ground CVS input 19 CVS output 1Vpp / 75ohm 19 CVS output 1Vpp / 75ohm 20 CVS input 1Vpp / 75ohm 20 CVS input 1Vpp / 75ohm 21 Ground 21 Ground

* * ALL WIRES TO FRONT PANEL & LOUD SPEAKERS MUST BE ZIP-TIED TOGETHER AFTER ANY KIND OF REPAIREMENT

1. INTRODUCTION

11AK19 is a 90ø and 110ø chassis capable of driving 20-21,24,25,28-29,32,33 tubes at appropriate currents. The chassis is capable of working in both PAL and SECAM. The sound system is capable of giving 6watts RMS output into a load of 8ohms. One 8 page simple TELETEXT, TOPTEXT and FASTEXT is provided. The chassis is equipped with 21-pin scart connectors which can accept via scart the SVHS format from VCRs so equipped.

2. SMALL SIGNAL PART WITH TDA884X

The TDA8840/8842/8844 combine all small signal functions required for a colour TV receiver, except tuning.

2.1. Vision IF amplifier

The IF-amplifier contains 3 AC-coupled control stages with a total gain control range which is higher than 66dB. The sensitivity of the circuit is comparable with that of modern IF-IC s. The video signal is demodulated by means of a PLL carrier regenerator. This circuit contains a frequency detector and a phase detector. The AFC output is obtained by using the VCO control voltage of the PLL and can be read via the I²C-bus. For fast search tuning systems the window of the AFC can be increased with a factor 3. The setting is realised with the AFW bit. Depending on the type the AGC-detector operates on top-sync level (single standard versions) or on top sync and top white-level (multi standard versions). The demodulation polarity is switched via the I²C-bus. The AGC detector time-constant capacitor is connected externally. This mainly because of the flexibility of the application. The time-constant of the AGC system during positive

modulation is rather long to avoid visible variations of the signal amplitude. To improve the speed of the AGC system a circuit has been included which detects whether the AGC detector is activated every frame period. When during 3 frame periods no action is detected the speed of the system is increased. For signals without peak white information the system switches automatically to a gated black level AGC. Because a black level clamp pulse is required for this way of operation the circuit will only switch to black level AGC in the internal mode. The circuits contain a video identification circuit which is independent of the synchronisation circuit. Therefore search tuning is possible when the display section of the receiver is used as a monitor. The ident output is supplied to the tuning system via the I²C-bus. The video ident circuit can be made less sensitive by means of the STM bit. This mode can be used during search tuning to avoid that the tuning system will stop at very weak input signals.

2.2. Video Switches

The circuits have two CVBS inputs (internal and external CVBS) and Y/C input. When the Y/C input is not required the Y input can be used as third CVBS input. The selection of the various sources is made via the I²C-bus. The circuit has one CVBS output.

2.3. Sound Circuit

The sound band pass and trap filters have to be connected externally. The filtered intercarrier signal is fed to a limiter circuit and is demodulated by means of a PLL demodulator. This PLL circuit tunes itself automatically to the incoming carrier signal so that no adjustment is required. The volume is controlled via the I²C-bus. The deemphasis capacitor has to be connected externally. The non-controlled audio signal can be obtained from this pin. The FM demodulator can be muted via the I²C-bus. This function can be used to switch-off the sound during a channel change so that high output peaks are prevented. The TDA8840/8842 contain an automatic volume levelling (AVL) circuit which automatically stabilises the audio output signal to a certain level which can be set by the viewer by means of the volume control. This function prevents big audio output fluctuations due to variations of the modulation depth of the transmitter. The AVL function can be activated via the I²C-bus.

2.4. Synchronisation circuit

The sync seperator is preceded by a controlled amplifier which adjusts the sync pulse amplitude to a fixed level. These pulses are fed to the slicing stage which is operating at 50% of the amplitude. The separated sync pulses are fed to the first phase detector and to the coincidence detector. This coincidence detector is used to detect whether the line oscillator is synchronised and can also be used for transmitter identification. The first PLL has a very high statical steepness so that the phase of the picture is independent of the line frequency. The horizontal output signal is generated by means of an oscillator which is running at twice the line frequency. Its frequency is divided by 2 to lock the first control loop to the incoming signal. The time-constant of the loop can be forced by the I²C-bus (fast or slow). If required the IC can select the time-constant depending on the noise content of the incoming video signal. To protect the horizontal output transistor, the horizontal drive is immediately switched off when a power-on-reset is detected. The drive signal is switched-on again when the normal switch-on procedure is followed. Via the I²C-bus, adjustments can be made of the horizontal and vertical geometry. The vertical sawtooth generator drives the vertical output drive circuit which has a differrential output current. For the EW drive a single ended current output is available. When the horizontal scan is reduced to display 4 : 3 pictures on a 16 : 9 picture tube an accurate video blanking can be switched on to obtain well defined edges on the screen. Overvoltage conditions can be detected via the EHT tracking pin.When an overvoltage condition is detected the horizontal output drive signal will be switched-off via the slow stop procedure but it is also possible that the drive is not switched-off and that just a protection indication is given in the I²C-bus output byte. The choice is made via the input bit PRD.

2.5. Chroma and Luminance processing

The circuits contain a chroma bandpass and trap circuit. The filters are realised by means of gyrator circuits and they are automatically calibrated by comparing the tuning frequency with the X-tal frequency of the decoder. The luminance delay line and the delay for the peaking circuit are also realised by means of gyrator circuits. The centre frequency of the chroma bandpass filter is switchable via the I²C-bus so that the performance can be optimised for front-end signals and external CVBS signals. During SECAM reception the centre frequency of the chroma trap is reduced to get a better suppression of the SECAM carrier frequencies.

2.6. Colour Decoder

The decoder contains an alignment-free X-tal oscillator, a killer circuit and two colour difference demodulators. The 90° phase shift for the reference signal is made internally. The IC contains an automatic colour limiting (ACL) circuit which prevents that oversaturation occurs when signals with a high chroma-to-burst ratio are received. The ACL circuit is designed such that it only reduces the chroma signal and not the burst signal. This has the advantage that the colour sensitivity is not affected by this function. The base-band delay line is integrated in the PAL/SECAM IC s. The demodulated colour difference signals are internally supplied to the delay line. The matrixed signals are externally available. The colour difference matrix switches automatically between PAL/SECAM and NTSC, however, it is also possible to fix the matrix in the PAL standard. Which colour standard the IC can decode depends on the external X-tals. The X-tal to be connected to pin 34 must have a frequency of 3.5 MHz (NTSC-M, PAL-M or PAL-N) and pin 35 can handle X-tals with a frequency of 4.4 and 3.5 MHz. To prevent calibration problems of the horizontal oscillator the external switching between the 2 X-tals should be carried out when the oscillator is forced to pin 35. For a reliable calibration of the horizontal oscillator it is very important that the X-tal indication bits (XA and XB) are not corrupted. For this reason the X-tal bits can be read in the output bytes so that the software can check the I²C-bus transmission.

2.7. RGB output circuit and black-current stabilisation

The colour-difference signals are matrixed with the luminance signal to obtain the RGB-signals. The TDA 884X device has one linear RGB input. This RGB signal can be controlled on contrast and brightness. The output signal has an amplitude of about 2 volts black-to-white at nominal input signals and nominal settings of the controls. To increase the flexibility of the IC it is possible to insert OSD and/or teletext signals directly at the RGB outputs. This insertion mode is controlled via the insertion input (pin 26 in the S-DIP 56- and pin 38 in the QFP-64 level). This blanking action at the RGB outputs has some delay which must be compansated externally. To obtain an accurate biasing of the picture tube a Continuous Cathode Calibration circuit has been developed. This function is realised by means of a 2-point black level stabilisation circuit. When the TV receiver is switched-on, the RGB output signals are blanked and the black current loop will try to set the right picture tube bias levels.Via the AST bit a choice can be made between automatic start-up or a start-up via the m-processor.

3. TUNER

Either a PLL or a VST tuner is used as a tuner. UV1316 (VHF/UHF) is used as a PLL tuner. For only PALM/N, NTSC M applications UV 1336 is used as the PLL tuner. UV 1315 (VHF/ UHF) is used as a VST Tuner.

Channel coverage of UV1316:

BAND

Low Band E2 to C 48.25 to 82.25 (1) S01 to S08 69.25 to 154.25

Mid Band E5 to E12 175.25 to 224.25 S09 to S38 161.25 to 439.25

High Band E21 to E69 471.25 to 855.25 (2) S39 to S41 447.25 to 463.25

(1). Enough margin is available to tune down to 45.25 MHz. (2). Enough margin is available to tune up to 863.25 MHz.

OFF-AIR CHANNELS CABLE CHANNELS

CHANNELS FREQUENCY CHANNELS FREQUENCY RANGE (MHz) RANGE (MHz)

Noise Typical Max. Gain Min. Typical Max.

Low band : 5dB 9dB All channels : 38dB 44dB 52dB Mid band : 5dB 9dB Gain Taper (of-air channels) : - - 8dB High band : 6dB 9dB

Channel Coverage UV1336:

BAND CHANNELS FREQUENCY

RANGE (MHz)

Low Band 2 to D 55.25 to 139.25

Mid Band E to PP 145.25 to 391.25

High Band QQ to 69 397.25 to 801.25

Noise is typically 6dB for all channels. Gain is minimum 38dB and maximum 50dB for all channels.

Channel Coverage of UV1315:

BAND

Low Band E2 to C 48.25 to 82.25 (1) S01 to S10 69.25 to 168.25

Mid Band E5 to E12 175.25 to 224.25 S11 to S39 231.25 to 447.25

High Band E21 to E69 471.25 to 855.25 (2) S40 to S41 455.25 to 463.25

(1). Enough margin is available to tune down to 45.25 MHz. (2). Enough margin is available to tune up to 863.25 MHz.

Noise Typ. Max. Gain Min. Typ. Max.

Low band : 6dB 9dB All Channels 38dB 44dB 50dB Mid band : 6dB 10dB Gain Taper - - 8dB High band : 6dB 11dB (off-air channels)

4.VIDEO SWITCH TEA6415C

In case of three or more external sources are used, the video switch IC TEA6415C is used. The main function of this device is to switch 8 video input sources on the 6 outputs. Each output can be switched on only one of each input. On each input an alignment of the lowest level of the signal is made (bottom of sync. top for CVBS or black level for RGB signals). Each nominal gain between any input and output is 6.5dB.For D2MAC or Chroma signal the alignment is switched off by forcing, with an external resistor bridge, 5VDC on the input. Each input can be used as a normal input or as a MAC or Chroma input (with external resistor bridge). All the switching possibilities are changed through the BUS. Driving 75ohm load needs an external resistor. It is possible to have the same input connected to several outputs.

OFF-AIR CHANNELS CABLE CHANNELS

CHANNELS FREQUENCY CHANNELS FREQUENCY

RANGE (MHz) RANGE (MHz)

5. AM DEMODULATOR TDA9830

The TDA9830 is designed for AM-sound demodulation used in L and L standard.

Sound IF Input:

The sound IF amplifier consists of three AC-coupled differential amplifier stages each with approximately 20dB gain. At the output of each stage is a multiplier for gain controlling. The overall control range is approximately -6 to +60dB and the frequency response (-3dB) of the IF amplifier is approximately 6 to 70MHz. The steepness of gain control is approximately 10mV/dB.

IF AGC:

The automatic gain control voltage to maintain the AM demodulator output signal at a constant level is generated by a mean level detector.The AGC-detector charges and discharges the capacitor at pin 3 controlled by the output signal of the AM-demodulator compared to an internal reference voltage.The maximum charge/discharge current is approximately 5 mA.

AM-demodulator

The IF amplifier output signal is fed to a limiting amplifier (two stages) and to a multiplier circuit. However the limiter output signal (which is not any more AM modulated) is also fed to the multiplier, which provides AM demodulation (in phase demodulation). After lowpass filtering (fg @ 400kHz) for carrier rejection and buffering, the demodulator output signal is present at pin 6.

Audio Switch

This circuit is an operational amplifier with three input stages and internal feedback network determining gain (0dB) and frequency response (fg @ 700kHz). Two of the input stages are connected to pin 7 and pin 9, the third input stage to an internal reference voltage. Controlled by the switching pins 10 and 12, one of the three input stages can be activated and a choice made between two different AF signals or mute state. The selected signal is present at pin 8. The decoupling capacitors at the input pins are needed, because the internally generated bias voltage for the input stages must not be influenced by the application in order to avoid DC-plop in case of switching.

Reference Circuit:

This circuit is a band gap stabiliser in combination with a voltage regulation amplifier, which provides an internal reference voltage of about 3.6V nearly independent from supply voltage and temperature. This reference voltage is filtered by the capacitor at pin 4 in order to reduce noise. It is used as a reference to generate all important voltages and currents of the circuit. For application in 12V power supply concepts, there is an internal voltage divider in combination with a Darlington transistor in order to reduce the supply voltage for all IC function blocks to approximately 6V.

6. DIGITAL TV SOUND PROCESSOR TDA9875

The TDA9875 is a single-chip Digital TV Sound Processor. Supported standards are M, B/G, D/K, I and L.

Description of the demodulator and decoder section: SIF Input:

Two input pins are provided, SIF1 e.g. for terrestrial TV and SIF2 e.g. for a satellite tuner. The selected signal is passed through an AGC circuit and then digitized by an 8-bit ADC operating at 24.576MHz.

AGC:

The gain of the AGC amplifier is controlled from the ADC output by means of a digital control loop employing hysteresis. The AGC has a fast attack behaviour to prevent ADC overloads and slow decay behaviour AGC oscillations. For AM demodulation AGC must be switched off.

Mixer

The digitized input signal is fed to the mixers, which mix one or both input sound carriers down to zero IF. A 24-bit control word for each carrier sets the required frequency.

FM and AM Demodulation

An FM or AM input signal is fed via a band-limiting filter to a demodulator that can be used for either FM or AM demodulation. Apart from the standard (fixed) de-emphasis characteristic, an adaptive de-emphasis is available for encoded satellite programs. A stereo decoder recovers the left and right signal channels from the demodulated sound carriers.

FM Identification:

The identification of the FM sound mode is performed by AM synchronous demodulation of the pilot signal and narrow-band detection of the identification frequencies. The result is available via the I²C-bus interface.

NICAM Demodulation:

The NICAM signal is transmitted in a DQPSK code at a bit rate of 728 kbit/s. The NICAM demodulator performs DQPSK demodulation and feeds the resulting bitstream and clock signal onto the NICAM decoder and, for evaluation purposes, to PCLK (pin 1) and NICAM (pin 2).

NICAM Decoder:

The device performs all decoding functions in accordance with the EBU NICAM 728 specification. After locking to the frame alignment word, the data is descrambled by applying the defined pseudo-random binary sequence; the device will then synchronise to the periodic frame flag bit C0. The status of the NICAM decoder can be read out from the NICAM status register by the user. The OSB bit indicates that the decoder has locked to the NICAM data. The VDSP bit indicates that the decoder has locked to the NICAM data and that the data is valid sound data.

7. SOUND OUTPUT STAGE TDA2614/TDA2615/TDA2616Q

TDA2614 is used as the AF output amplifier for mono applications. It is supplied by ±12VDC coming from a separate winding in the SMPS transformer. An output power of 2*6W (THD=0.5%) can be delivered into an 8ohm load. TDA2615 is used as the AF output amplifier for stereo applications. It is supplied by ±12VDC coming from a separate winding in the SMPS transformer. An output power of 2*6W (THD=0.5%) can be delivered into an 8ohm load. TDA2616Q is used as the AF output amplifier for stereo and dolby prologic applications. It is supplied by ±16VDC coming from a separate winding in the SMPS transformer. An output power of 2*12W (THD=0.5%) can be delivered into an 8ohm load.

8. VERTICAL OUTPUT STAGE WITH TDA8351/8356

The TDA8351/8356 vertical deflection circuit can be used in 90° and 110° deflection systems with field frequencies from 50 up to 120Hz. With its bridge configuration the deflection output can be DC coupled with few external components. Only a single supply voltage for the scan and a second supply for the flyback are needed. The TDA8356 is intended for 90° systems and the TDA8351 is intended for 110° systems. The drive voltage is amplified by an amplifier and fed to two amplifiers, one is inverting and the other is a non inverting amplifier. The outputs (pins 7 and 4) are connected to the series connection of the vertical deflection coil and feedback resistor Rsense (R702//R703). The voltage across Rsense is fed via pin 9 to correction amplifier, to obtain a deflection current which is proportional to the drive voltage. The supply voltage for the TDA8351/8356 is 15VDC at pin 3. The supply voltage generator has a separate supply voltage of 45VDC at pin 6.

9. VIDEO OUTPUT AMPLIFIER TDA6107Q

The TDA6107Q consists of three monolithic video output amplifiers. The amplifier can be seen as an operational amplifier with negative feedback. The advantage of negative feedback is that the amplifier characteristics do not play an important role up to certain frequencies. The internal flash diodes protect the amplifiers against flash over in the picture tube. The only protections required at the cathode outputs are a flash resistor and a sparkgap. The TDA6107Q has an internal thermal protection circuit which gives a decrease of the slew rate at high temperatures. Furthermore, the device needs only one power supply voltage (Vdd). In contrast to previous types of DMOS video amplifiers, all the external resistors (Rf, Ri and Ra) are integrated, so the gain is fixed and saves 9 resistors. Furthermore, the reference voltage is integrated, it saves a resistor divider and a decoupling capacitor. So, the replacement value of the TDA6107Q is very high. The TDA6107Q is provided with a black current data pin. Since TDA884X is used as drive device, no adjustments are required for gain and black setting, as the TDA884X has I²C white point adjustment and black current set-up.

10. SINGLE/MULTISTANDARD VIF/SIF-PLL and FM-PLL/AM DEMODULATOR TDA9818

The TDA9818is an IC for multistandard vision IF signal processing, sound AM and FM demodulation. It is a gain controlled wide band VIF-amplifier (AC-coupled). It is applicable for IF frequencies of 38.9 MHz, 45.75 MHz and 58.75 MHz. True synchronous demodulation is provided with active carrier regeneration. It has a VCO frequency which can be switchable between L and L accent (alignment external) picture carrier frequency. The TDA9818 has a SIF input for single reference QSS mode (PLL controlled). SIF AGC detector is to provide gain controlled SIF amplifier. The AM demodulator is without extra reference circuit. The supply voltage is +5VDC at pin 21.

11. COMBFILTER SAA4961

The SAA 4961 is a one-chip, PAL/NTSC combfilter IC with internal delay lines, filters, clock control, synchronisation and signal switches. The combfilter function is realised in a switched capacitor technique, so it has time discrete but amplitude continuous processing. The Y/CVBS input is first clamped and then fed to the delay-line and combfilter section via a low pass pre-filter. This filter can be bypassed via the external LPF-on pin. This pin is internally pulled up, to put the filter default on. The Y/CVBs input is also fed to the sync seperator, where horizontal and vertical reference pulses are made. Bypass mode can be forced via BYP (pin 3).FSC (pin 1) is the subcarrier input which is connected to the colour decoder. Input FSCSW pin indicates if fsc or 2*fsc is used. The Sys1,2 pins (20, 23) indicate which system standard is processed. Sys2 is internally pulled up, Sys1 is internally pulled down. Therefore when the Sys1,2 inputs are left open, automatically PAL 4.43MHz is forced. SAA4961output pin 15 CVBS can be used for parallel-synced teletext decoders, to guarantee that the teletext display always has a correct timing relation with the main picture. Comb filter is disabled by setting SAA4961 pin 3 BYP high.

12. POWER SUPPLY (SMPS)

The DC voltages required at various parts of the chassis are provided by an SMPS transformer controlled by the IC MC44604 which is designed for driving, controlling and protecting switching transistor of SMPS. The transformer produces 150/115V for FBT input, ±14V for audio output IC, S+5V for microcontroller, +15V for vertical output (field scan) and +33V for tuner and some other ICs and transistors.

13. MICROCONTROLLER SDA525X

The device is TV TEXT tuning and control system based on the SDA 525X TV TEXT microcontroller. It is designed for a low cost mono TV-SET with analogue picture and sound control. Neverthless the system offers an on screen display (OSD) and IR remote control of all functions.

SDA525X has the following features:

- Display of program number, channel number, TV standard, analogue values, sleep timer, parental control, and mute is done by OSD.

- Single LED for IR active, standby and on mode indication.

- 1 Control line to select external source.

- 3 Control lines for TV standard selection.

- Frequency synthesis tuning (62.5 kHz steps)

- 192 step fine tuning

- Channels corresponding to standards B/G, OIRT, L and I (I+)

- Mono sound control by analogue voltage

- System configuration with service mode

14. SERIAL ACCESS CMOS 8K (1024*8) EEPROM ST24C08

The ST24C08 is a 8Kbit electrically erasable programmable memory (EEPROM), organised as 4 blocks of 256*8 bits. The memory is compatible with the I²C standard, two wire serial interface which uses a bi-directional data bus and serial clock. The memory carries a built-in 4 bit, unique device identification code (1010) corresponding to the I²C bus definition. This is used together with 1 chip enable input (E) so that up to 2*8K devices may be attached to the I²C bus and selected individually.

15. CLASS AB STEREO HEADPHONE DRIVER

The TDA1308 is an integrated class AB stereo headphone driver contained in a DIP8 plastic package. The device is fabricated in a 1 mm CMOS process and has been primarily developed for portable digital audio applications.

16. SAW FILTERS Saw filter type : Model: G1965M : PAL-SECAM B/G MONO G3962M : PAL-SECAM B/G GER&NIC STEREO, PAL I NIC STEREO, INT-1 G1984 : PAL-SECAM B/G GER&NIC STEREO INT-2 J1951M : PAL-I MONO J3950M : PAL-I NIC STEREO J1956M : PAL-I MONO K2955M : PAL-SECAM B/G-D/K MONO, PAL-SECAM B/G-D/K-I, MONO, PAL-SECAM B/G-D/K-L MONO K2958M : PAL-SECAM B/G-D/K (38) MONO K2962M : PAL-SECAM B/G-L/L MONO G3957M : PAL-SECAM B/G-L/L GER&NIC BG/L STEREO K6256K : PAL-SECAM B/G-D/K-I-L/L MONO, PAL-SECAM B/G-D/K-I, L/L GER&NIC BG/L STEREO,

PAL-SECAM B/G-D/K-I-L/L I, NICAM STEREO, PAL-SECAM B/G-D/K-I-L/L GER&NIC I-B/G-L, STEREO

K6259K : PAL-SECAM B/G-D/K-I-M/N (EURO) MONO M1963M : PAL M/N MONO, NTSC M MONO, PAL M/N-NTSC M MONO

17. BTSC STEREO/SAP/DBX-DECODER and AUDIO PROCESSOR TDA9855

The TDA9855 is a BTSC stereo/SAP/dbx decoder and audio processor. It performs all functions to transform the composite baseband signal into the appropriate audio output signals to line out and to the loudspeaker output stages.

IC DESCRIPTIONS AND INTERNAL BLOCK DIAGRAM

n TDA8840/8842/8844 n TUNER (UV1315, UV1316, UV1336) n TEA6415C n TDA9830 n TDA2614/2615/2616Q n TDA8351/8356 n TDA6107Q n SAA4961 n MC44604 n SDA525X n TDA9875 n TDA9818 n ST24C08 n TDA1308 n G1965M n TDA9855

TDA1308

TDA8840/8842/8844:

The TDA884X is IýC-bus controlled single chip TV processor which is intended to be applied in PAL, NTSC, PAL/NTSC and multi-standard television receivers. These IC s are nearly pin compatible with the TDA837X TV processors but have a higher degree of integration because the delay line (TDA4665 function) and the SECAM decoder have been integrated. In addition to these functions some additional features have been added like Continuous Cathode Calibration (2-point black current loop which results in an accurate biasing of the 3 guns), adjustable luminance delay time, blue stretching and dynamic skin tone control.

Features:

n Vision IF circuit with PLL demodulator n Alignment-free multi-standard FM sound demodulator (4.5 MHz to 6.5 MHz) n Audio switch n Flexible source selection with CVBS switch and Y(CVBS)/C input so that a comb filter can be applied n Integrated chrominance trap circuit n Integrated luminance delay line n Asymmetrical peaking in the luminance channel with a noise coring function n Black stretching of non-standard CVBS or luminance signals n Integrated chroma band-pass filter with switchable center frequency n Blue stretch circuit which offsets colours near white towards blue n RGB control circuit with Continuous Cathode Calibration and white point adjustment n Linear RGB inputs and fast blanking n Possibility to insert a blue black option when no video signal is available n Horizontal synchronisation with two control loops and alignment-free horizontal oscillator n Vertical count-down circuit n Vertical driver optimised for DC-coupled vertical output stages n IýC-bus control of various functions n Low dissipation (850 mW)

Functional Differences between the 8840/8842/8844:

IC VERSION (TDA) 8840 8842 8844

Multi-standard IF X X Automatic Volume Limiting X X PAL Decoder X X X SECAM Decoder X X NTSC Decoder X X Dynamic Skin Control X Colour Matrix PAL/NTSC (Japan) X X Colour Matrix NTSC Japan/USA YUV interface X Base-band delay line X X X Adjustable luminance delay time X Horizontal geometry X Horizontal and vertical zoom X Vertical scroll X

PINNING PIN VALUE

1. Sound IF input : 1mVrms

2. External audio input : 500mVrms

3. IF demodulator tuned circuit 1

4. IF demodulator tuned circuit 2

5. IF-PLL loop filter : Min:32-Max:60 MHz

6. IF video output : 4.7V (Negative Modulation), 2V (Positive Modulation)

7. Serial clock input : Low level max:1.5 V, High level min 3.5V

8. Serial data input/output : Low level max:1.5 V, High level min 3.5V

9. Bandgap decoupling

10. Chrominance input (S-VHS) : 1Vpp, Max:1.4Vpp

11. External CVBS/Y input : 1Vpp, Max:1.4Vpp

12. Main supply voltage 1 : 8V, Min:7.2V, Max:8.8V

13. Internal CVBS input : 1Vpp, Max:1.4Vpp

14. Ground 1

15. Audio output : 700mVrms, Min:500mVrms, Max:900mVrms

16. SECAM PLL decoupling

17. External CVBS input : Vpp, Max:1.4Vpp

18. Black-current input : Amplitude of low reference current : 8mA Amplitude of high reference current : 20mA

19. Blue output : 2Vpp

20. Green output : 2Vpp

21. Red output : 2Vpp

22. Beam current limiter input/V-guard input

23. Red input for insertion : 0.7Vpp, Max:0.8Vpp

24. Green input for insertion : 0.7Vpp, Max:0.8Vpp

25. Blue input for insertion : 0.7Vpp, Max:0.8Vpp

26. RGB insertion input : Max:0.3V

27. Luminance input : 1.4Vpp

28. Luminance output : 1.4Vpp

29. (B-Y) signal output : 1.05Vpp

30. (R-Y) signal output : 1.05Vpp

31. (B-Y) signal input : 1.05Vpp

32. (R-Y) signal input : 1.05Vpp

33. Subcarrier reference output : 3.58/4.43 MHz

34. 3.58 MHz crystal connection

35. 4.43/3.58 MHz crystal connection

36. Loop filter phase detector

37. 2nd

supply voltage 1 : 8V, Min:7.2V, Max:8.8V

38. CVBS output : 1Vpp, Max:1.4Vpp

39. Decoupling digital supply : 1.8V

40. Horizontal output : Max: 0.3V

41. Flyback input/sandcastle output : Min:100ma, Max:300mA

42. Phase-2 filter : 150 ms/ms

43. Phase-1 filter : ±0.9 kHz, Max: ±1.2 kHz

44. Ground 2

45. East-west drive output

46. Vertical drive A output : 0.95mA

47. Vertical drive B output : 0.95mA

48. IF input 1

49. IF input 2

50. EHT/overvoltage protection input : Min:1.2V, Max : 2.8V

51. Vertical sawtooth capacitor : 3Vpp

52. Reference current input : 3Vpp

53. AGC decoupling capacitor

54. Tuner AGC output : Max:9V (Maximum tuner AGC

output voltage), 300mV (Output saturation voltage)

55. Audio deemphasis : 500mVrms

56. Decoupling sound demodulator

UV1315, UV1316, UV1336

General description of UV1315:

The UV1315 tuner belongs to the UV 1300 familiy of tuners, which are designed to meet a wide range of applications. It is a combined VHF, UHF tuner suitable for CCIR systems B/G, H, L, L, I and I. The low IF output impedance has been designed for direct drive of a wide variety of SAW filters with sufficient suppression of triple transient.

Features of UV1315:

n Member of the UV1300 family small sized UHF/VHF tuners n Systems CCIR:B/G, H, L, L, I and I; OIRT:D/K n Voltage synthesized tuning (VST) n Off-air channels, S-cable channels and Hyperband n Standardized mechanical dimensions and pinning n Compact size

PINNING PIN VALUE

1. Gain control voltage (AGC) : 4.0V, Max:4.5V

2. Tuning voltage

3. High band switch : 5V, Min:4.75V, Max:5.5V

4. Mid band switch : 5V, Min:4.75V, Max:5.5V

5. Low band switch : 5V, Min:4.75V, Max:5.5V

6. Supply voltage : 5V, Min:4.75V, Max:5.5V

7. Not connected

8. Not connected

9. Not connected

10. Symmetrical IF output 1

11. Symmetrical IF output 2

Bandswitching table:

Pin 3 Pin 4 Pin 5

Low band 0V 0V +5V Mid band 0V +5V 0V High band +5V 0V 0V

General description of

The UV1316 tuner belongs to the UV 1300 family of tuners, which are designed to meet a wide range of applications. It is a combined VHF, UHF tuner suitable for CCIR systems B/G, H, L, L, I and I. The low IF output impedance has been designed for direct drive of a wide variety of SAW filters with sufficient suppression of triple transient.

Features of UV1316:

n Member of the UV1300 family small sized UHF/VHF tuners n Systems CCIR: B/G, H, L, L, I and I; OIRT: D/K n Digitally controlled (PLL) tuning via IýC-bus n Off-air channels, S-cable channels and Hyperband n World standardized mechanical dimensions and world standard pinning n Compact size n Complies to CENELEC EN55020 and EN55013

PINNING PIN VALUE

1. Gain control voltage (AGC) : 4.0V, Max:4.5V

2. Tuning voltage

3. I²C-bus address select : Max:5.5V

4. I²C-bus serial clock : Min:-0.3V, Max:5.5V

5. I²C-bus serial data : Min:-0.3V, Max:5.5V

6. Not connected

7. PLL supply voltage : 5.0V, Min:4.75V, Max:5.5V

8. ADC input

9. Tuner supply voltage : 33V, Min:30V, Max:35V

10. Symmetrical IF output 1

11. Symmetrical IF output 2

UV1316:

General description of

UV1336 series is developed for reception of channels broadcast in accordance with the M, N standard. The tuning is available through built-in digitally controlled IýC bus (PLL).

Features of UV1336:

n Global standard pinning n Integrated Mixer-Oscillator&PLL function n Conforms to CISPR 13, FCC and DOC (Canada) regulations n Low power consumption n Both Phono connector and F connector are available

UV1336:

PINNING PIN VALUE

1. Gain control voltage : 4.0V, Max:4.5V

2. Tuning voltage

3. Address select : Max:5.5V

4. Serial clock : Min:-0.3V, Max:5.5V

5. Serial data : Min:-0.3V, Max:5.5V

6. Not connected

7. Supply voltage : 5.0V, Min:4.75V, Max:5.5V

8. ADC input (optional)

9. Tuning supply voltage : 33V, Min:30V, Max:35V

10. Ground

11. IF output

TEA6415C:

General Description:

The main function of the TEA6415C is to switch 8 video input sources on the 6 outputs. Each output can be switched to only one of the inputs whereas but any same input may be connected to several outputs. All switching possibilities are controlled through the IýC-bus.

Features:

n 20 MHz Bandwith n Cascadable with another TEA6415C (Internal address can be changed by pin 7 voltage) n 8 inputs (CVBS, RGB, Mac, CHROMA, ) n 6 Outputs n Possibility of MAC or chroma signal for each input by switching-off the clamp with an external resistor bridge n Bus controlled n 6.5dB gain between any input and output n -55dB crosstaljk at 5MHz n Fully ESD protected

PINNING PIN VALUE

1. Input : Max : 2Vpp, Input Current : 1mA, Max : 3mA

2. Data : Low level : -0.3V Max:1.5V, High level : 3.0V Max : Vcc+0.5V

3. Input : Max : 2Vpp, Input Current : 1mA, Max : 3mA

4. Clock : Low level : -0.3V Max:1.5V, High level : 3.0V Max : Vcc+0.5V

5. Input : Max : 2Vpp, Input Current : 1mA, Max : 3mA

6. Input : Max : 2Vpp, Input Current : 1mA, Max : 3mA

7. Prog

8. Input : Max : 2Vpp, Input Current : 1mA, Max : 3mA

9. Vcc : 12V

10. Input : Max : 2Vpp, Input Current : 1mA, Max : 3mA

11. Input : Max : 2Vpp, Input Current : 1mA, Max : 3mA

12. Ground

13. Output : 5.5Vpp, Min : 4.5Vpp

14. Output : 5.5Vpp, Min : 4.5Vpp

15. Output : 5.5Vpp, Min : 4.5Vpp

16. Output : 5.5Vpp, Min : 4.5Vpp

17. Output : 5.5Vpp, Min : 4.5Vpp

18. Output : 5.5Vpp, Min : 4.5Vpp

19. Ground

20. Input : Max : 2Vpp, Input Current : 1mA, Max : 3mA

TDA9830:

General description:

The TDA9830, a monolithic integrated circuit, is designed for AM-sound demodulation used in L- and L-standard. The IC provides an audio source selector and also mute switch.

Features:

n Adjustment free wideband synchronous AM demodulator n Audio source-mute switch (low noise) n Audio level according EN50049 n 5 to 8V power supply or 12 V alternative n Low power consumption

PINNING PIN VALUE

1. Sound IF differential input signal : Minimum IF input signal (between pins 1 and 16):60mV

Max:100mV Maximum IF input signal (between pins 1 and 16) :120mV Min :70mV

2. Not connected

3. AGC capacitor

4. REF voltage filtering capacitor

5. Not connected

6. AM demodulator output : THD:0.8%, Max:2%; S/N:53dB, Min:47%; DC potential:2.15V, Min : 2.00V Max :2.30V

7. Input signal (from AM) to audio switch : Max:1.2V

8. Output signal from audio switch : 80dB, Min : 70dB

9. Input signal (from external) to audio switch : Max:1.2V

10. Switch input select control : Audio switching voltage to activate pin7 : Min :0V, Max :0.8V

Audio switching voltage to activate pin9 : Min:1.5V, Max :Vp

11. Supply voltage : 12V, Min:10.8V, Max:13.2V

12. Mute control : For Mute-ON Min : 0V, Max : 0.8V For Mute-OFF Min : 1.5V, Max : Vp

13. Ground

14. Supply voltage : 5V, Min : 4.5V, Max : 8.8V

15. Not connected

16. Sound IF differential input signal : Look at pin 1

TDA2614/TDA2615/TDA2616Q:

General Description of TDA2614:

The TDA2614 is a power amplifier in a 9-lead single-in-line (SIL9) plastic medium power package. It has been especially designed for mains fed applications.

Features:

n Requires very few external components n No switch-on/switch-off clicks n Input mute during switch-on and switch-off n Low offset voltage between output and ground n Hi-fi in accordance with IEC 268 and DIN 45500 n Short-circuit proof and thermal protected n Mute possibility

PINNING PIN VALUE

1. Not connected

2. Mute input : 300mA (For mute to activate)

3. Ground

4. Not connected

5. Supply voltage (negative) : -12VDC

6. Output : 6.9Vrms

7. Supply voltage (positive) : +12VDC

8. Inverting input (Ground) : 0V

9. Non-inverting input : 700mVrms, Min : 500mVrms, Max : 900mVrms

General Description of

The TDA2615 is a dual power amplifier in a 9-lead single-in-line (SIL9). It has been especially designed for mains fed applications.

Features:

n Requires very few external components n No switch-on/switch-off clicks n Input mute during switch-on and switch-off n Low offset voltage between output and ground n Excellent gain balance of both amplifiers n Hi-fi in accordance with IEC 268 and DIN 45500 n Short-circuit proof and thermal protected n Mute possibility

PINNING PIN VALUE

1. Non-inverting input 1 : 700mVrms, Min :500mVrms, Max : 900mVrms

2. Mute input : 300mA (For mute to activate)

3. Ground

4. Output 1 : 6.9Vrms

5. Supply voltage (negative) : -12VDC

6. Output 2 : 6.9Vrms

7. Supply voltage (positive) : +12VDC

8. Inverting inputs 1 and 2 (Ground) : 0V

9. Non-inverting input 2 : 700mVrms, Min : 500mVrms, Max : 900mVrms

General Description of

The TDA2616Q is a dual power amplifier. It is supplied in a 9-lead SIL-bent-to DIL plastic power package (SOT157). It has been especially designed for mains fed applications.

TDA2615:

TDA2616Q:

Features:

PINNING PIN VALUE

1. Non-inverting input 1 : 700mVrms, Min : 500mVrms, Max : 900mVrms

2. Mute input : 300mA (For mute to activate)

3. Ground

4. Output 1 : 9.8Vrms

5. Supply voltage (negative) : -16VDC

6. Output 2 : 9.8Vrms

7. Supply voltage (positive) : +16VDC

8. Inverting inputs 1 and 2 (Ground) : 0V

9. Non-inverting input 2 : 700mVrms, Min : 500mVrms, Max : 900mVrms

TDA8351/8356:

General Description:

The TDA8356 is a power circuit for use in 90ø colour deflection system for field frequencies of 50 to 120 Hz. The circuit operates as a highly efficient class G system. The TDA8351 is a power circuit for use in 110ø colour deflection system for field frequencies of 50 to 120 Hz. The circuit operates as a highly efficient class G system.

Features:

n Few external components n Highly efficient fully DC-coupled vertical output bridge circuit n Vertical flyback switch n Guard circuit n Protection against:

- short-circuit of the output pins (7 and 4)

- short-circuit of the output pins to Vp

n Temperature (thermal) protection n High EMC immunity because of common mode inputs n A guard signal in zoom mode

PINNING PIN VALUE

1. Input power-stage (positive); includes Ii(sb) signal bias : 400mA, Min : 50mA, Max : 500mA

2. Input power-stage (negative); includes Ii(sb) signal bias : 400mA, Min : 50mA, Max : 500mA

3. Operating supply voltage : +15VDC

4. Output voltage B : Max : 52V Output current : 2App (TDA8356) 3App (TDA8351)

5. Ground

6. Input flyback supply voltage : Min : Vp, Max : 50V

7. Output voltage A : Max : 52V Output current : 2App (TDA8356) 3App (TDA8351)

8. Guard output voltage : Max:5.5V (Io:100mA)

9. Input feedback voltage : Max:52V

TDA6107Q:

The TDA6107Q includes three video output amplifiers in a SIL 9 MP (Single In Line 9 pins Medium Power) package SOT111BE, using high-voltage DMOS technology, and is intended to drive the three cathodes of a colour picture tube. In contrast to previous types of DMOS video amplifiers, all external resistors (Rf, Ri and Ra) are integrated, so the gain is fixed and it saves 9 resistors. To obtain maximum performance, the amplifier should be used with black-current control and mounted on the CRT panel.

Features:

n Bandwith: 4.0 MHz typ at 100Vpp (Measured in appli,cation set-up, with Rfl=1K5 and Cl=Ctube+Cpcb=10pF) n Slewrate: 950V/ms n Fixed gain of 50 times n No external components, only the well known supply decoupling n Very simple application with a variety of colour decoders n Black-current measurement output for automatic black current stabilization n Only one supply voltage needed n Internal protection against positive appearing CRT flash-over discharges n Protection against ESD n Internal reference voltage n Thermal protection n Controllable switch-off behaviour n Very small PCB dimensions n Very high replacement value

PINNING PIN VALUE

1. Inverting input 1 : 2Vpp

2. Inverting input 2 : 2Vpp

3. Inverting input 3 : 2Vpp

4. Ground

5. BSC-output : Max:7V

6. Supply voltage : 200VDC

7. Cathode output 3 : 20mA, 100Vpp

8. Cathode output 2 : 20mA, 100Vpp

9. Cathode output 1 : 20mA, 100Vpp

SAA4961:

The SAA4961 is an adaptive alignment-free one chip comb filter compatible with both PAL and NTSC systems and provides high performance in Y/C separation.

Features:

n One chip adaptive multi-standard comb filter n Time discrete but continuous amplitude signal processing with analogue interfaces n Internal delay lines, filters, clock processing and signal switches n Alignment-free n No hanging dots or residual cross colour on vertical transients n Few external components

It is possible to switch the comb filter into one of the following 3 modes:

1. Comb mode : In this mode, luminance and chrominance comb filter function are active.

Chrominance output pin (pin 12) outputs comb filtered chrominance signal, luminance output pin (pin 14) outputs comb filtered luminance signal and CVBS output pin (pin 15) outputs delay compensated CVBS signal.

2. Comboff mode : In this mode, luminance comb filter function is turned off, but chrominance comb filter function operates.

Chrominance output pin (pin 12) outputs comb filtered chrominance signal, luminance output pin (pin 14) outputs delay compensated CVBS signal and CVBS output pin (pin 15) outputs delay compensated CVBS signal.

3. Bypass mode : In this mode, no IC-function is active. Cext is bypassed to chrominance output pin (pin 12) and Yext/CVBS

is bypassed to luminance output pin (pin 14) and CVBS output pin (pin 15).

PINNING PIN VALUE

1. Subcarrier frequency input : 200mVpp, Min : 100mVpp, Max : 400mVpp

2. Internal connected

3. Bypass mode forcing : HIGH level input voltage Min : 2.4VDC, Max : Vcc

4. Internal connected

5. Decoupling capacitor : 1.25VDC, Min : 1.1VDC, Max : 1.4VDC

6. Internal connected

7. Analogue supply voltage : 5VDC, Min : 4.75VDC, Max : 5.5VDC

8. Analogue supply voltage output buffer : 5VDC, Min : 4.75VDC, Max : 5.5VDC

9. Analogue ground

10. External chrominance input : 0.7Vpp, Max : 1Vpp

11. Analogue ground output buffer

12. Chrominance output signal : 0mV, Min : -400mV, (DC offset voltage related to input) Max : +400mV

BYPASS-mode:Co/Cext : 0dB, Min : -1dB, Max : +1dB

13. fsc reference selection : HIGH level input voltage Min : 2V, Max : Vcc

: Low level input voltage Min : 0V, Max : 0.8V

14. Luminance output signal : 1Vpp, Min : 0.6Vpp, Max : 1.54Vpp

15. CVBS and Y output signal : 1Vpp, Min : 0.6Vpp, Max : 1.54Vpp

16. Internal connected

17. CVBS and Y input signal : 1Vpp, Min : 0.7Vpp, Max : 1.4Vpp

18. Disable prefilter : HIGH level input voltage Min : 2.0VDC, Max : Vcc

LOW level input voltage Min : 0VDC, Max : 0.8VDC

19. Storage Capacitor : 2.5VDC, Min : 1.8VDC, Max : Vcc

20. Standard select 1 : HIGH level input voltage Min : 2.0VDC, Max : Vcc

LOW level input voltage Min : 0VDC, Max : 0.8VDC

21. Digital ground

22. Digital supply voltage : 5VDC, Min : 4.75VDC, Max : 5.5VDC

23. Standard select 2 : HIGH level input voltage Min : 2.0VDC, Max : Vcc

LOW level input voltage Min : 0VDC, Max : 0.8VDC

24. Decoupling capacitor : 1.25VDC, Min : 1.1VDC, Max : 1.4VDC

25. Controlling I/O pin : HIGH level input voltage Min : 2.4VDC, Max : Vcc

LOW level input voltage Min : 0VDC, Max : 1.5VDC

26. Analogue ground PLL

27. Analogue supply voltage PLL : 5VDC, Min : 4.75VDC, Max : 5.5VDC

28. Internal connected

MC44604:

General description:

The MC44604 is an enhanced high performance controller that is specifically designed for off-line and DC-to-DC converter applications. It offers a really safe and reliable power management thanks particularly to its protection features (foldback, overvoltage detection, soft start, accurate demagnetization detection). Its high current totem pole output is also ideally suited for driving a power MOSFET, but can also be used for driving a bipolar transistor in low power converters. In addition to these features, the MC44604 offers an efficient stand-by mode.

Features:

Current Mode Controller

n Operation up to 250 kHz Output Switching Frequency n Inherent Feed Forward Compensation n Latching PWM for Cycle-by-Cycle Current Limiting n Oscillator with Precise Frequency Control

High Flexibility

n Externally Programmable Reference Current n Secondary or Primary Sensing n High Current Totem Pole Output n Undervoltage Lockout with Hysteresis

Safety/Protection Features

n Overvoltage Protection Facility against Open Loop n Protection against Short Circuit on Oscillator Pin n Fully Programmable Foldback n Soft-Start Feature n Accurate max Duty Cycle Setting n Demagnetization (Zero Current Detection) Protection n Internally Trimmed Reference

Green Controller

n Low Start-Up and Operating Current n Patented Stand-by Pulsed Mode for low stand-by losses n Low dV/dT for Low EMI radiations

PINNING PIN VALUE

1. Output Supply Voltage (Vcc) : 12VDC

2. Output Supply Voltage (Vc) : 12VDC

3. Output voltage : LOW Level Drop Voltage 1VDC, Max : 1.2VDC (Isink=100mA)

1.4VDC, Max : 2VDC (Isink=500mA)

HIGH Level Drop Voltage 1.5VDC, Max : 2VDC (Isource=200mA)

2VDC, Max : 2.7VDC (Isource=500mA)

4. Ground

5. Foldback input : 0.9VDC, Min:-0.3VDC, Max : Vcc+0.3VDC

6. Overvoltage protection (OVP) : 0.78VDC, Min:-0.3VDC, Max : Vcc+0.3VDC

7. Current sense input : Min:-0.3VDC, Max : Vcc+0.3VDC

8. Demagnetization detection input : Idemag-ib (source):-4mA Idemag-ib (sink) : 10mA

9. Standby current set : Ipeak-stby/Iref : 0.40 Min : 0.37 Max : 0.43

10. Oscillator voltage swing : 2Vpp

11. Soft start/Dmax/Voltage mode : Idischarge : 5mA, Min : 1.5mA (Vsoft start=1V)

12. Clamp E/A input : 4.7VDC, Min : 4.5VDC Max : 4.9VDC

13. E/A output : HIGH State: 6.5VDC, Min : 5.5VDC, Max : 7.5VDC LOW State : 1.0VDC, 1.1VDC

14. E/A input : 2.5VDC, Min : 2.4VDC, Max : 2.6VDC

15. Stand-by management : Stand-by On Detection current ratio : Idet/Iref : 0.38, Min : 0.34, Max : 0.42

Stand-by regulation current ratio : Ireg/Iref : 20.5, Min : 18, Max : 23

16. Rref input : 2.5VDC, Min : 2.4VDC, Max : 2.6VDC

SDA525X:

General description:

The SDA525X is designed for a low cost mono TV-set with analogue picture and sound control. IN SDA525X the following IC s are used and supported:

Non-volatile memory : SDA 2526 or SDA2546 PLL : SDA 3202-3, SDA 3302 IR transmitter : SDA 2208-3 or SDA 2218 IR preamplifier : SFH 506-32

Features: General:

n Display of program number, channel number, TV standard, analogue values, sleep timer, parental control, and mute is done by

OSD

n Single LED for IR active, standby and on mode indication n Local control (8 keys) n IR remote control n Control of volume, contrast, brightness, and saturation by analogue voltages n Non-volatile memory for 50 or 100 programs, optimum analogue values and system parameters n Individual delta volume for each program n 1 control line to select external source n 3 control lines for TV standard selection n Automatic muting if no carrier detected n Automatic switch-off when carrier disappears for more than 5 minutes n Software protection against tube flashovers with internal watchdog timer n Sleep timer n Parental control n IF 38 MHz or 38.9 MHz selectable

Tuning:

n Frequency synthesis tuning (62.5 kHz steps) n 192 step fine tuning n Channels corresponding to standards n 100 programs selectable by directly entering a program number or by up/down function depending on the NVM size n Channel selection by directly entering a channel number or by up/down function n Channel search function in two directions

Sound:

n Mono sound control by analogue voltage

Service Mode:

n System configuration with service mode

PINNING PIN VALUE

1. Crystal selection output 1 : LOW level : 0V

2. Volume + switch input : LOW level : 0V

3. Volume - switch input : LOW level : 0V

4. Program - switch input : LOW level : 0V

5. Program + switch input: : LOW level : 0V

6. LED output : LOW level : 0V

7. Filter (sound standard) selection output 1 : LOW level : 0V

8. Filter (sound standard) selection output 2 : LOW level : 0V

9. Mod-switch selection output : LOW level : 0V

10. Ground

11. Supply voltage : +5V

12. 18 MHz crystal connection 1 : 2Vpp

13. 18 MHz crystal connection 2 : 2Vpp

14. L-ACC output : LOW level : 0V

15. RESET output LOW level : 0V

16. Comb filter PAL/SECAM selection output : LOW level : 0V

17. Tuning output : LOW level : 0V

18. Audio switch transistor selection 1 : LOW level : 0V

19. Audio switch transistor selection 2 : LOW level : 0V

20. Audio switch transistor selection 3 : LOW level : 0V

21. Audio switch transistor selection 4 : LOW level : 0V

22. Comb filter standard selection 1 : LOW level : 0V

23. Comb filter standard selection 2 : LOW level : 0V

24. Analogue ground

25. Filter 3

26. Filter 2

27. Filter 1

28. Analogue supply voltage : 5VDC

29. Reference current input

30. CVBS input : 1Vpp

31. Service output : LOW level : 0V

32. AV2-status input : LOW level : 0V

33. AV1-status input : LOW level : 0V

34. AFC output : 600mVpp

35. Ground

36. IR-input : LOW level : 0V

37. Supply voltage : 5V

38. LC input : 5Vpp

39. LC output : 5Vpp

40. Mute output : LOW level : 0V

41. St-by output : LOW level : 0V

42. Clock signal output

43. Data output

44. Local connection : LOW : 0V

45. SAND input : 4Vpp

46. ODD/EVEN output : 1.8V

47. OSD-red output : LOW level : 0V

48. OSD-green output : LOW level : 0V

49. OSD-blue output : LOW level : 0V

50. OSD-blanking output : LOW level : 0Vh

51. COR output : LOW level : 0V

52. Crystal selection output 2 : LOW level : 0V

HIGH level : 4.2V

HIGH level : 5V

HIGH level : 4.2VDC

HIGH level : 4.2V

HIGH level : 3.6V

HIGH level : 5V

HIGH level : 3.4V

HIGH level : 5V

HIGH level : 4.2V

HIGH level : 1.4V

HIGH : 5V

HIGH level : 5V

HIGH level : 4.2V

TDA9875:

General description:

The TDA9875 is a single-chip Digital TV Sound Processor (DTVSP) for analogue and digital multi-channel sound systems.

Features:

Demodulator and decoder section:

n Sound IF (SIF) input switch e.g. to select between terrestrial TV SIF and SAT SIF sources n SIF AGC with 21dB control range n SIF 8-bit Analogue-to-Digital Converter (ADC) n DQPSK demodulation for different standards, simultaneously with 1-channel FM demodulation n NICAM decoding (B/G, I and L standard) n Two-carrier multistandard FM demodulation (B/G, D/K and M standard) n Decoding for three analogue multi-channel systems (A2, A2+ and A2*) and satellite sound n Optional AM demodulation for system L, simultaneously with NICAM n Programmable identification (B/G, D/K and M standard) and different identification times

DSP section:

n Digital crossbar switch for all digital signal sources and destinations n Control of volume, balance, contour, bass, treble, pseudo stereo, spatial, bass boost and soft-mute n Plop-free volume control n Automatic Volume Level (AVL) control n Adaptive de-emphasis for satellite n Programmable beeper n Monitor selection for FM/AM DC values and signals, with peak detection option n I²S-bus interface for a feature extension (e.g. Dolby surround) with matrix, level adjust and mute.

Analogue audio section:

n Analogue crossbar switch with inputs for mono and stereo, SCART 1 input/output, SCART2 input/output and line output n User defined full-level/-3dB scaling for SCART outputs n Output selection of mono, stereo, dual A/B, dual A or dual B n 20 kHz bandwith for SCART-to-SCART copies n Standby mode with functionality for SCART copies n Dual audio digital-to-analogue converter from DSP to analogue crossbar switch, bandwith 15kHz n Dual audio ADC from analogue inputs to DSP n Two dual audio Digital-to-Analogue Converters (DACs) for loudspeakers (Main) and headphone (Auxiliary) outputs;

also applicable for L, R, C and S in the Dolby Pro Logic mode with feature extension.

PINNING PIN VALUE

1. NICAM clock output (728kHz) : LOW level input voltage : Max : 0.8V

2. Serial NICAM DATA output (728kHz) : LOW level input voltage : Max : 0.8V

3. First I²C-bus slave address modifier : LOW level input voltage : Max : 0.8V

4. SCL (I²C-bus clock) : LOW level input voltage : Max : 1.6V

5. SDA (I²C-bus data) : LOW level input voltage : Max : 0.8V

6. Analogue supply ground 1 : 0V

7. Analogue supply voltage 1 : 5V, Min : 4.75V, Max : 5.5V

8. Resistor for reference current generator : Iref : 220mA, Min : 170mA, Max : 260mA

9. First general purpose I/O pin

10. Sound IF input 2 : Min : 21Vrms, Max : 250mVrms

11. Reference voltage for demodulator part : Vdda1/Vssa1 : 50%, Min : 35%, Max : 65%

12. Sound IF input 1 : Min : 21Vrms, Max : 250mVrms

13. Second I²C-bus slave address modifier : LOW level input voltage : Max : 0.8V

14. Digital supply ground 1 : 0V

15. Digital supply voltage 1 : 5V, Min : 4.75V, Max : 5.5V

16. Capacitor for power-on reset : LOW level input voltage : Max : 1.6V

17. Crystal oscillator output

18. Crystal oscillator input

19. Tuning voltage output for crystal oscillator

20. Second general purpose I/O pin

21. System clock output : LOW level input voltage : Max : 0.5V

22. I²S-bus clock : LOW level input voltage : Max : 0.8V

23. I²S-bus word select : LOW level input voltage : Max : 0.8V

24. I²S-bus data output 2 : LOW level input voltage : Max : 0.8V

25. I²S-bus data output 1 : LOW level input voltage : Max : 0.8V

26. I²S-bus data input 2 : LOW level input voltage : Max : 0.8V

27. I²S-bus data input 1 : LOW level input voltage : Max : 0.8V

28. First test pin; connected to ground for normal operation

29. Audio mono input : 500mVrms

30.Second test pin; connected to ground for normal operation

31. External audio input right channel : 350mVrms

HIGH level input voltage : Min : 2.0V

HIGH level input voltage : Min : 3.0V

HIGH level input voltage : Min : 2.0V

HIGH level input voltage : Min : 3.0V

HIGH level input voltage : Min : 2.9V

HIGH level input voltage : Min : 2.0V

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