TEAC EU-34-TB Service manual

SERVICE MANUAL

34 cm CTV

Effective: MAY 2000 EU34TBSERV

CONTENTS

Contents ................................................................................................................................................................................... 1

Safety Precautions ................................................................................................................................................................... 2

TV Set switched off .................................................................................................................................................................. 2

Measurements .......................................................................................................................................................................... 2

PERI-TV SOCKET ................................................................................................................................................................... 2

SCART 1 ................................................................................................................................................................................... 2

INTRODUCTION ......................................................................................................................................................................... 2

SMALL SIGNAL PART WITH TDA884X .................................................................................................................................. 2-3

TUNER...................................................................................................................................................................................... 4

SOUND OUTPUT STAGE TDA2614 .......................................................................................................................................... 4

VERTICAL OUTPUT STAGE WITH TDATDA8356 ..................................................................................................................... 4

VIDEO OUTPUT AMPLIFIER TDA6107Q .................................................................................................................................... 4

POWER SUPPLY (SMPS) .......................................................................................................................................................... 4

MICROCONTROLLER SDA545X ............................................................................................................................................... 5

SERIAL ACCESS CMOS 8K (1024*8) EEPROM ST24C08 ........................................................................................................ 5

SAW FILTERS ........................................................................................................................................................................... 5

IC DESCRIPTIONS AND INTERNAL BLOCK DIAGRAM ............................................................................................................. 5

TDA8840/TDA8842 ............................................................................................................................................................ 5-6

UV1316/UV1336 ................................................................................................................................................................ 7

TDA2614 ............................................................................................................................................................................ 7-8

TDA8356 ............................................................................................................................................................................ 8

TDA6107Q .......................................................................................................................................................................... 8

MC44604 ............................................................................................................................................................................ 9

SDA545X ............................................................................................................................................................................ 9-11

ST24C08 ............................................................................................................................................................................. 11

G1965M .............................................................................................................................................................................. 11

AK26 CHASSIS MANUAL ADJUSTMENT PROCEDURE .......................................................................................................... 11

For Adjust Settings ............................................................................................................................................................. 11

WHITE BALANCE ADJUSTMENT ........................................................................................................................................ 11

AGC ADJUSTMENT ............................................................................................................................................................ 11

IF-PLL NEGATIVE ADJUSTMENT ........................................................................................................................................ 12

4 : 3 HORIZONTAL SHIFT ADJUSTMENT ....................................................................................................................... 12

4 : 3 VERTICAL SLOPE ADJUSTMENT ........................................................................................................................... 12

4 : 3 VERTICAL AMPLITUDE ADJUSTMENT ................................................................................................................... 12

4 : 3 S-CORRECTION ADJUSTMENT .............................................................................................................................. 12

4 : 3 VERTICAL SHIFT ADJUSTMENT ............................................................................................................................ 12

For Option Settings ................................................................................................................................................................... 12

OPTION 00 .......................................................................................................................................................................... 12-13

OPTION 01 .......................................................................................................................................................................... 13-14

OPTION 02 .......................................................................................................................................................................... 13

OPTION 03 .......................................................................................................................................................................... 14

OPTION 04 .......................................................................................................................................................................... 14

OPTION 05 .......................................................................................................................................................................... 14

OPTION 06 .......................................................................................................................................................................... 14

OPTION 07 .......................................................................................................................................................................... 15

GENERAL BLOCK DIAGRAM OF CHASSIS AK26 ................................................................................................................... 16

ELECTRONIC COMPONENT PART LIST .................................................................................................................................... 17-18

DO NOT CHANGE ANY MODULE UNLESS THE SET IS SWITCH OFF

The mains supply side of the switch mode power supply transformer is live. Use an isolating transformer. The receivers fulfill completely the safety requirements.

Safety precautions:

Servicing of this TV should only be carried out by a qualified person.

- Components marked with the warning symbol on the circuit diagram are critical for safety and must only be replaced with an identical component.

- Power resistor and fusable resistors must be mounted in an identical manner to the original component.

- When servicing this TV, check that the EHT does not exceed 26kV.

TV Set switched off:

Make short-circuit between HV-CRT clip and CRT ground layer. Short C804 (150mF) before changing IC802 or other components in primary side of SMPS.

Measurements:

Voltage readings and oscilloscope traces are measured under following conditions. Antenna signal 60dB from colourbar generator. (100% white, 75% colour saturation) Brightness, contrast, colour set for a normal picture. Mains supply, 110VAC, 60Hz.

PERI-TV SOCKET

SCART 1 (SC050)

1 Audio right output 0.5Vrms / 1K 2 Audio right input 0.5Vrms / 10K 3 Audio left output 0.5Vrms / 1K 4 Ground AF 5 Ground Blue 6 Audio left input 0.5Vrms / 10K 7 Blue input 0.7Vpp / 75ohm 8 AV switching input 0-12VDC /10K 9 Ground Green 10 11 Green input 0.7Vpp / 75ohm 12 13 Ground Red 14 Ground Blanking 15 Red input 0.7Vpp / 75ohm 16 Blanking input 0-0.4VDC, 1-3VDC / 75ohm 17 Ground CVS output 18 Ground CVS input 19 CVS output 1Vpp / 75ohm 20 CVS input 1Vpp / 75ohm 21 Ground

1. INTRODUCTION

11AK26 is a 90ø chassis capable of driving 14 tubes at appropriate currents. The chassis is capable of working in PAL M, PAL N, PAL B/G and NTSC M. The sound system is capable of giving 2.5 watts RMS output into a load of 16 ohms.

2. SMALL SIGNAL PART WITH TDA884X

The TDA8840/8842/8844 combine all small signal functions required for a colour TV receiver, except tuning.

2.1. Vision IF amplifier

The IF-amplifier contains 3 AC-coupled control stages with a total gain control range which is higher than 66dB. The sensitivity of the circuit is comparable with that of modern IF-IC s. The video signal is demodulated by means of a PLL carrier regenerator. This circuit contains a frequency detector and a phase detector. The AFC output is obtained by using the VCO control voltage of the PLL and can be read via the I²C-bus. For fast search tuning systems the window of the AFC can be increased with a factor 3. The setting is realised with the AFW bit. Depending on the type the AGC-detector operates on top-sync level (single standard versions) or on top sync and top white-level (multi standard versions). The demodulation polarity is switched via the I²C-bus. The AGC detector time-constant capacitor is connected externally. This mainly because of the flexibility of the application. The time-constant of the AGC system during positive

modulation is rather long to avoid visible variations of the signal amplitude. To improve the speed of the AGC system a circuit has been included which detects whether the AGC detector is activated every frame period. When during 3 frame periods no action is detected the speed of the system is increased. For signals without peak white information the system switches automatically to a gated black level AGC. Because a black level clamp pulse is required for this way of operation the circuit will only switch to black level AGC in the internal mode. The circuits contain a video identification circuit which is independent of the synchronisation circuit. Therefore search tuning is possible when the display section of the receiver is used as a monitor. The ident output is supplied to the tuning system via the I²C-bus. The video ident circuit can be made less sensitive by means of the STM bit. This mode can be used during search tuning to avoid that the tuning system will stop at very weak input signals.

2.2. Video Switches

The circuits have two CVBS inputs (internal and external CVBS) and Y/C input. When the Y/C input is not required the Y input can be used as third CVBS input. The selection of the various sources is made via the I²C-bus. The circuit has one CVBS output.

2.3. Sound Circuit

The sound band pass and trap filters have to be connected externally. The filtered intercarrier signal is fed to a limiter circuit and is demodulated by means of a PLL demodulator. This PLL circuit tunes itself automatically to the incoming carrier signal so that no adjustment is required. The volume is controlled via the I²C-bus. The deemphasis capacitor has to be connected externally. The non-controlled audio signal can be obtained from this pin. The FM demodulator can be muted via the I²C-bus. This function can be used to switch-off the sound during a channel change so that high output peaks are prevented. The TDA8840/8842 contain an automatic volume levelling (AVL) circuit which automatically stabilises the audio output signal to a certain level which can be set by the viewer by means of the volume control. This function prevents big audio output fluctuations due to variations of the modulation depth of the transmitter. The AVL function can be activated via the I²C-bus.

2.4. Synchronisation circuit

The sync seperator is preceded by a controlled amplifier which adjusts the sync pulse amplitude to a fixed level. These pulses are fed to the slicing stage which is operating at 50% of the amplitude. The separated sync pulses are fed to the first phase detector and to the coincidence detector. This coincidence detector is used to detect whether the line oscillator is synchronised and can also be used for transmitter identification. The first PLL has a very high statical steepness so that the phase of the picture is independent of the line frequency. The horizontal output signal is generated by means of an oscillator which is running at twice the line frequency. Its frequency is divided by 2 to lock the first control loop to the incoming signal. The time-constant of the loop can be forced by the I²C-bus (fast or slow). If required the IC can select the time-constant depending on the noise content of the incoming video signal. To protect the horizontal output transistor, the horizontal drive is immediately switched off when a power-on-reset is detected. The drive signal is switched-on again when the normal switch-on procedure is followed. Via the I²C-bus, adjustments can be made of the horizontal and vertical geometry. The vertical sawtooth generator drives the vertical output drive circuit which has a differrential output current. For the EW drive a single ended current output is available. When the horizontal scan is reduced to display 4 : 3 pictures on a 16 : 9 picture tube an accurate video blanking can be switched on to obtain well defined edges on the screen. Overvoltage conditions can be detected via the EHT tracking pin.When an overvoltage condition is detected the horizontal output drive signal will be switched-off via the slow stop procedure but it is also possible that the drive is not switched-off and that just a protection indication is given in the I²C-bus output byte. The choice is made via the input bit PRD.

2.5. Chroma and Luminance processing

The circuits contain a chroma bandpass and trap circuit. The filters are realised by means of gyrator circuits and they are automatically calibrated by comparing the tuning frequency with the X-tal frequency of the decoder. The luminance delay line and the delay for the peaking circuit are also realised by means of gyrator circuits. The centre frequency of the chroma bandpass filter is switchable via the I²C-bus so that the performance can be optimised for front-end signals and external CVBS signals. During SECAM reception the centre frequency of the chroma trap is reduced to get a better suppression of the SECAM carrier frequencies.

2.6. Colour Decoder

The decoder contains an alignment-free X-tal oscillator, a killer circuit and two colour difference demodulators. The 90° phase shift for the reference signal is made internally. The IC contains an automatic colour limiting (ACL) circuit which prevents that oversaturation occurs when signals with a high chroma-to-burst ratio are received. The ACL circuit is designed such that it only reduces the chroma signal and not the burst signal. This has the advantage that the colour sensitivity is not affected by this function. The base-band delay line is integrated in the PAL/SECAM IC s. The demodulated colour difference signals are internally supplied to the delay line. The matrixed signals are externally available. The colour difference matrix switches automatically between PAL/SECAM and NTSC, however, it is also possible to fix the matrix in the PAL standard. Which colour standard the IC can decode depends on the external X-tals. The X-tal to be connected to pin 34 must have a frequency of 3.5 MHz (NTSC-M, PAL-M or PAL-N) and pin 35 can handle X-tals with a frequency of 4.4 and 3.5 MHz. To prevent calibration problems of the horizontal oscillator the external switching between the 2 X-tals should be carried out when the oscillator is forced to pin 35. For a reliable calibration of the horizontal oscillator it is very important that the X-tal indication bits (XA and XB) are not corrupted. For this reason the X-tal bits can be read in the output bytes so that the software can check the I²C-bus transmission.

2.7. RGB output circuit and black-current stabilisation

The colour-difference signals are matrixed with the luminance signal to obtain the RGB-signals. The TDA 884X device has one linear RGB input. This RGB signal can be controlled on contrast and brightness. The output signal has an amplitude of about 2 volts black-to-white at nominal input signals and nominal settings of the controls. To increase the flexibility of the IC it is possible to insert OSD and/or teletext signals directly at the RGB outputs. This insertion mode is controlled via the insertion input (pin 26 in the S-DIP 56- and pin 38 in the QFP-64 level). This blanking action at the RGB outputs has some delay which must be compansated externally. To obtain an accurate biasing of the picture tube a Continuous Cathode Calibration circuit has been developed. This function is realised by means of a 2-point black level stabilisation circuit. When the TV receiver is switched-on, the RGB output signals are blanked and the black current loop will try to set the right picture tube bias levels.Via the AST bit a choice can be made between automatic start-up or a start-up via the m-processor.

3. TUNER

Either a PLL or a VST tuner is used as a tuner. UV1336 (VHF/UHF) is used as a PLL tuner. For only PAL B/G applications UV 1316 is used as the PLL tuner.

Channel coverage of UV1316:

BAND

Low Band E2 to C 48.25 to 82.25 (1) S01 to S08 69.25 to 154.25

Mid Band E5 to E12 175.25 to 224.25 S09 to S38 161.25 to 439.25

High Band E21 to E69 471.25 to 855.25 (2) S39 to S41 447.25 to 463.25

(1). Enough margin is available to tune down to 45.25 MHz. (2). Enough margin is available to tune up to 863.25 MHz.

OFF-AIR CHANNELS CABLE CHANNELS

CHANNELS FREQUENCY CHANNELS FREQUENCY RANGE (MHz) RANGE (MHz)

Noise Typical Max. Gain Min. Typical Max.

Low band : 5dB 9dB All channels : 38dB 44dB 52dB Mid band : 5dB 9dB Gain Taper (of-air channels) : - - 8dB High band : 6dB 9dB

Channel Coverage UV1336:

BAND CHANNELS FREQUENCY

RANGE (MHz)

Low Band 2 to D 55.25 to 139.25

Mid Band E to PP 145.25 to 391.25

High Band QQ to 69 397.25 to 801.25

Noise is typically 6dB for all channels. Gain is minimum 38dB and maximum 50dB for all channels.

4. SOUND OUTPUT STAGE TDA2614

TDA2614 is used as the AF output amplifier for mono applications. It is supplied by ±12VDC coming from a separate winding in the SMPS transformer. An output power of 2.5W (THD=0.5%) can be delivered into an 16 ohm load.

5. VERTICAL OUTPUT STAGE WITH TDA 8356

The TDA 8356 vertical deflection circuit is used in 90° deflection systems with field frequencies from 50 up to 120Hz. With its bridge configuration the deflection output can be DC coupled with few external components. Only a single supply voltage for the scan and a second supply for the flyback are needed. The drive voltage is amplified by an amplifier and fed to two amplifiers, one is inverting and the other is a non inverting amplifier. The outputs (pins 7 and 4) are connected to the series connection of the vertical deflection coil and feedback resistor Rsense (R702//R703). The voltage across Rsense is fed via pin 9 to correction amplifier, to obtain a deflection current which is proportional to the drive voltage. The supply voltage for the TDA 8356 is 15VDC at pin 3. The supply voltage generator has a separate supply voltage of 45VDC at pin 6.

6. VIDEO OUTPUT AMPLIFIER TDA6107Q

The TDA6107Q consists of three monolithic video output amplifiers. The amplifier can be seen as an operational amplifier with negative feedback. The advantage of negative feedback is that the amplifier characteristics do not play an important role up to certain frequencies. The internal flash diodes protect the amplifiers against flash over in the picture tube. The only protections required at the cathode outputs are a flash resistor and a sparkgap. The TDA6107Q has an internal thermal protection circuit which gives a decrease of the slew rate at high temperatures. Furthermore, the device needs only one power supply voltage (Vdd). In contrast to previous types of DMOS video amplifiers, all the external resistors (Rf, Ri and Ra) are integrated, so the gain is fixed and saves 9 resistors. Furthermore, the reference voltage is integrated, it saves a resistor divider and a decoupling capacitor. So, the replacement value of the TDA6107Q is very high. The TDA6107Q is provided with a black current data pin. Since TDA884X is used as drive device, no adjustments are required for gain and black setting, as the TDA884X has I²C white point adjustment and black current set-up.

7. POWER SUPPLY (SMPS)

The DC voltages required at various parts of the chassis are provided by an SMPS transformer controlled by the IC MC44604 which is designed for driving, controlling and protecting switching transistor of SMPS. The transformer produces 150/115V for FBT input, ±14V for audio output IC, S+5V for microcontroller, +15V for vertical output (field scan) and +33V for tuner and some other ICs and transistors.

8. MICROCONTROLLER SDA545X

The device is a control system based on the SDA 545X TV microcontroller. It is designed for a low cost mono TV-SET with analogue picture and sound control. Neverthless the system offers an on screen display (OSD) and IR remote control of all functions.

SDA545X has the following features:

- Display of program number, channel number, TV standard, analogue values, sleep timer, parental control, and mute is done by OSD.

- Single LED for IR active, standby and on mode indication.

- 1 Control line to select external source.

- 3 Control lines for TV standard selection.

- Frequency synthesis tuning (62.5 kHz steps)

- 192 step fine tuning

- Channels corresponding to standards PAL M/N NTSC M

- Mono sound control by analogue voltage

- System configuration with service mode

9. SERIAL ACCESS CMOS 8K (1024*8) EEPROM ST24C08

The ST24C08 is a 8Kbit electrically erasable programmable memory (EEPROM), organised as 4 blocks of 256*8 bits. The memory is compatible with the I²C standard, two wire serial interface which uses a bi-directional data bus and serial clock. The memory carries a built-in 4 bit, unique device identification code (1010) corresponding to the I²C bus definition. This is used together with 1 chip enable input (E) so that up to 2*8K devices may be attached to the I²C bus and selected individually.

10. SAW FILTERS Saw filter type : Model: G1965M : PAL-SECAM B/G MONO K2955M : PAL-SECAM B/G-D/K MONO, PAL-SECAM B/G-D/K-I, MONO, PAL-SECAM B/G-D/K-L MONO K2958M : PAL-SECAM B/G-D/K (38) MONO K2962M : PAL-SECAM B/G-L/L MONO K6259K : PAL-SECAM B/G-D/K-I-M/N (EURO) MONO M1963M : PAL M/N MONO, NTSC M MONO, PAL M/N-NTSC M MONO

IC DESCRIPTIONS AND INTERNAL BLOCK DIAGRAM

n TDA8840/8842/8844 n TUNER (UV1316, UV1336) n TDA2614 n TDA8356 n TDA6107Q n MC44604 n SDA545X n ST24C08

TDA8840/8842:

The TDA884X is I^2C-bus controlled single chip TV processor which is intended to be applied in PAL, NTSC, PAL/NTSC and multi-standard television receivers. These IC s are nearly pin compatible with the TDA837X TV processors but have a higher degree of integration because the delay line (TDA4665 function) and the SECAM decoder have been integrated. In addition to these functions some additional features have been added like Continuous Cathode Calibration (2-point black current loop which results in an accurate biasing of the 3 guns), adjustable luminance delay time, blue stretching and dynamic skin tone control.

Features:

n Vision IF circuit with PLL demodulator n Alignment-free multi-standard FM sound demodulator (4.5 MHz to 6.5 MHz) n Audio switch n Flexible source selection with CVBS switch and Y(CVBS)/C input so that a comb filter can be applied n Integrated chrominance trap circuit n Integrated luminance delay line n Asymmetrical peaking in the luminance channel with a noise coring function n Black stretching of non-standard CVBS or luminance signals n Integrated chroma band-pass filter with switchable center frequency n Blue stretch circuit which offsets colours near white towards blue n RGB control circuit with Continuous Cathode Calibration and white point adjustment n Linear RGB inputs and fast blanking n Possibility to insert a blue black option when no video signal is available n Horizontal synchronisation with two control loops and alignment-free horizontal oscillator n Vertical count-down circuit n Vertical driver optimised for DC-coupled vertical output stages n I^2C-bus control of various functions n Low dissipation (850 mW)

Functional Differences between 8840 and 8842

IC VERSION (TDA) 8840 8842

Multi-standard IF X Automatic Volume Limiting X X PAL Decoder X X SECAM Decoder X NTSC Decoder X Dynamic Skin Control Colour Matrix PAL/NTSC (Japan) X Colour Matrix NTSC Japan/USA YUV interface Base-band delay line X X Vertical zoom X X

PINNING PIN VALUE

1. Sound IF input : 1mVrms

2. External audio input : 500mVrms

3. IF demodulator tuned circuit 1

4. IF demodulator tuned circuit 2

5. IF-PLL loop filter : Min:32-Max:60 MHz

6. IF video output : 4.7V (Negative Modulation), 2V (Positive Modulation)

7. Serial clock input : Low level max:1.5 V, High level min 3.5V

8. Serial data input/output : Low level max:1.5 V, High level min 3.5V

9. Bandgap decoupling

10. Chrominance input (S-VHS) : 1Vpp, Max:1.4Vpp

11. External CVBS/Y input : 1Vpp, Max:1.4Vpp

12. Main supply voltage 1 : 8V, Min:7.2V, Max:8.8V

13. Internal CVBS input : 1Vpp, Max:1.4Vpp

14. Ground 1

15. Audio output : 700mVrms, Min:500mVrms, Max:900mVrms

16. SECAM PLL decoupling

17. External CVBS input : Vpp, Max:1.4Vpp

18. Black-current input : Amplitude of low reference current : 8mA Amplitude of high reference current : 20mA

19. Blue output : 2Vpp

20. Green output : 2Vpp

21. Red output : 2Vpp

22. Beam current limiter input/V-guard input

23. Red input for insertion : 0.7Vpp, Max:0.8Vpp

24. Green input for insertion : 0.7Vpp, Max:0.8Vpp

25. Blue input for insertion : 0.7Vpp, Max:0.8Vpp

26. RGB insertion input : Max:0.3V

27. Luminance input : 1.4Vpp

28. Luminance output : 1.4Vpp

29. (B-Y) signal output : 1.05Vpp

30. (R-Y) signal output : 1.05Vpp

31. (B-Y) signal input : 1.05Vpp

32. (R-Y) signal input : 1.05Vpp

33. Subcarrier reference output : 3.58/4.43 MHz

34. 3.58 MHz crystal connection

35. 4.43/3.58 MHz crystal connection

36. Loop filter phase detector

37. 2nd

supply voltage 1 : 8V, Min:7.2V, Max:8.8V

38. CVBS output : 1Vpp, Max:1.4Vpp

39. Decoupling digital supply : 1.8V

40. Horizontal output : Max: 0.3V

41. Flyback input/sandcastle output : Min:100ma, Max:300mA

42. Phase-2 filter : 150 ms/ms

43. Phase-1 filter : ±0.9 kHz, Max: ±1.2 kHz

44. Ground 2

45. East-west drive output

46. Vertical drive A output : 0.95mA

47. Vertical drive B output : 0.95mA

48. IF input 1

49. IF input 2

50. EHT/overvoltage protection input : Min:1.2V, Max : 2.8V

51. Vertical sawtooth capacitor : 3Vpp

52. Reference current input : 3Vpp

53. AGC decoupling capacitor

54. Tuner AGC output : Max:9V (Maximum tuner AGC output voltage), 300mV (Output saturation voltage)

55.Audio deemphasis : 500mVrms

56. Decoupling sound demodulator

UV1316, UV1336

General description of UV1316:

The UV1316 tuner belongs to the UV 1300 family of tuners, which are designed to meet a wide range of applications. It is a combined VHF, UHF tuner suitable for CCIR systems B/G, H, L, L, I and I. The low IF output impedance has been designed for direct drive of a wide variety of SAW filters with sufficient suppression of triple transient.

Features of UV1316:

n Member of the UV1300 family small sized UHF/VHF tuners n Systems CCIR: B/G, H, L, L, I and I; OIRT: D/K n Digitally controlled (PLL) tuning via IýC-bus n Off-air channels, S-cable channels and Hyperband n World standardized mechanical dimensions and world standard pinning n Compact size n Complies to CENELEC EN55020 and EN55013

PINNING PIN VALUE

1. Gain control voltage (AGC) : 4.0V, Max:4.5V

2. Tuning voltage

3. I²C-bus address select : Max:5.5V

4. I²C-bus serial clock : Min:-0.3V, Max:5.5V

5. I²C-bus serial data : Min:-0.3V, Max:5.5V

6. Not connected

7. PLL supply voltage : 5.0V, Min:4.75V, Max:5.5V

8. ADC input

9. Tuner supply voltage : 33V, Min:30V, Max:35V

10. Symmetrical IF output 1

11. Symmetrical IF output 2

General description of

UV1336 series is developed for reception of channels broadcast in accordance with the M, N standard. The tuning is available through built-in digitally controlled IýC bus (PLL).

Features of UV1336:

n Global standard pinning n Integrated Mixer-Oscillator&PLL function n Conforms to CISPR 13, FCC and DOC (Canada) regulations n Low power consumption n Both Phono connector and F connector are available

PINNING PIN VALUE

1. Gain control voltage : 4.0V, Max:4.5V

2. Tuning voltage

3. Address select : Max:5.5V

4. Serial clock : Min:-0.3V, Max:5.5V

5. Serial data : Min:-0.3V, Max:5.5V

6. Not connected

7. Supply voltage : 5.0V, Min:4.75V, Max:5.5V

8. ADC input (optional)

9. Tuning supply voltage : 33V, Min:30V, Max:35V

10. Ground

11. IF output

UV1336:

TDA2614:

General Description of TDA2614:

The TDA2614 is a power amplifier in a 9-lead single-in-line (SIL9) plastic medium power package. It has been especially designed for mains fed applications.

Features:

n Requires very few external components n No switch-on/switch-off clicks n Input mute during switch-on and switch-off n Low offset voltage between output and ground n Hi-fi in accordance with IEC 268 and DIN 45500 n Short-circuit proof and thermal protected n Mute possibility

PINNING PIN VALUE

1. Not connected

2. Mute input : 300mA (For mute to activate)

3. Ground

4. Not connected

5. Supply voltage (negative) : -12VDC

6. Output : 6.9Vrms

7. Supply voltage (positive) : +12VDC

8. Inverting input (Ground) : 0V

9. Non-inverting input : 700mVrms, Min : 500mVrms, Max : 900mVrms

TDA8356:

General Description:

The TDA8356 is a power circuit for use in 90ø colour deflection system for field frequencies of 50 to 120 Hz. The circuit operates as a highly efficient class G system.

Features:

n Few external components n Highly efficient fully DC-coupled vertical output bridge circuit n Vertical flyback switch n Guard circuit n Protection against:

- short-circuit of the output pins (7 and 4)

- short-circuit of the output pins to Vp

n Temperature (thermal) protection n High EMC immunity because of common mode inputs n A guard signal in zoom mode

PINNING PIN VALUE

1. Input power-stage (positive); includes Ii(sb) signal bias : 400mA, Min : 50mA, Max : 500mA

2. Input power-stage (negative); includes Ii(sb) signal bias : 400mA, Min : 50mA, Max : 500mA

3. Operating supply voltage : +15VDC

4. Output voltage B : Max : 52V Output current : 2App (TDA8356) 3App (TDA8351)

5. Ground

6. Input flyback supply voltage : Min : Vp, Max : 50V

7. Output voltage A : Max : 52V Output current : 2App (TDA8356) 3App (TDA8351)

8. Guard output voltage : Max:5.5V (Io:100mA)

9. Input feedback voltage : Max:52V

TDA6107Q:

The TDA6107Q includes three video output amplifiers in a SIL 9 MP (Single In Line 9 pins Medium Power) package SOT111BE, using high-voltage DMOS technology, and is intended to drive the three cathodes of a colour picture tube. In contrast to previous types of DMOS video amplifiers, all external resistors (Rf, Ri and Ra) are integrated, so the gain is fixed and it saves 9 resistors. To obtain maximum performance, the amplifier should be used with black-current control and mounted on the CRT panel.

Features:

n Bandwith: 4.0 MHz typ at 100Vpp (Measured in appli,cation set-up, with Rfl=1K5 and Cl=Ctube+Cpcb=10pF) n Slewrate: 950V/ms n Fixed gain of 50 times n No external components, only the well known supply decoupling n Very simple application with a variety of colour decoders n Black-current measurement output for automatic black current stabilization n Only one supply voltage needed n Internal protection against positive appearing CRT flash-over discharges n Protection against ESD n Internal reference voltage n Thermal protection n Controllable switch-off behaviour n Very small PCB dimensions n Very high replacement value

PINNING PIN VALUE

1. Inverting input 1 : 2Vpp

2. Inverting input 2 : 2Vpp

3. Inverting input 3 : 2Vpp

4. Ground

5. BSC-output : Max:7V

6. Supply voltage : 200VDC

7. Cathode output 3 : 20mA, 100Vpp

8. Cathode output 2 : 20mA, 100Vpp

9. Cathode output 1 : 20mA, 100Vpp

MC44604:

General description:

The MC44604 is an enhanced high performance controller that is specifically designed for off-line and DC-to-DC converter applications. It offers a really safe and reliable power management thanks particularly to its protection features (foldback, overvoltage detection, soft start, accurate demagnetization detection). Its high current totem pole output is also ideally suited for driving a power MOSFET, but can also be used for driving a bipolar transistor in low power converters. In addition to these features, the MC44604 offers an efficient stand-by mode.

Features:

Current Mode Controller

n Operation up to 250 kHz Output Switching Frequency n Inherent Feed Forward Compensation n Latching PWM for Cycle-by-Cycle Current Limiting n Oscillator with Precise Frequency Control

High Flexibility

n Externally Programmable Reference Current n Secondary or Primary Sensing n High Current Totem Pole Output n Undervoltage Lockout with Hysteresis

Safety/Protection Features

n Overvoltage Protection Facility against Open Loop n Protection against Short Circuit on Oscillator Pin n Fully Programmable Foldback n Soft-Start Feature n Accurate max Duty Cycle Setting n Demagnetization (Zero Current Detection) Protection n Internally Trimmed Reference

Green Controller

n Low Start-Up and Operating Current n Patented Stand-by Pulsed Mode for low stand-by losses n Low dV/dT for Low EMI radiations

PINNING PIN VALUE

1. Output Supply Voltage (Vcc) : 12VDC

2. Output Supply Voltage (Vc) : 12VDC

3. Output voltage : LOW Level Drop Voltage 1VDC, Max : 1.2VDC (Isink=100mA)

1.4VDC, Max : 2VDC (Isink=500mA)

HIGH Level Drop Voltage 1.5VDC, Max : 2VDC (Isource=200mA)

2VDC, Max : 2.7VDC (Isource=500mA)

4. Ground

5. Foldback input : 0.9VDC, Min:-0.3VDC, Max : Vcc+0.3VDC

6. Overvoltage protection (OVP) : 0.78VDC, Min:-0.3VDC, Max : Vcc+0.3VDC

7. Current sense input : Min:-0.3VDC, Max : Vcc+0.3VDC

8. Demagnetization detection input : Idemag-ib (source):-4mA Idemag-ib (sink) : 10mA

9. Standby current set : Ipeak-stby/Iref : 0.40 Min : 0.37 Max : 0.43

10. Oscillator voltage swing : 2Vpp

11. Soft start/Dmax/Voltage mode : Idischarge : 5mA, Min : 1.5mA (Vsoft start=1V)

12. Clamp E/A input : 4.7VDC, Min : 4.5VDC Max : 4.9VDC

13. E/A output : HIGH State: 6.5VDC, Min : 5.5VDC, Max : 7.5VDC LOW State : 1.0VDC, 1.1VDC

14. E/A input : 2.5VDC, Min : 2.4VDC, Max : 2.6VDC

15. Stand-by management : Stand-by On Detection current ratio : Idet/Iref : 0.38, Min : 0.34, Max : 0.42

Stand-by regulation current ratio : Ireg/Iref : 20.5, Min : 18, Max : 23

16. Rref input : 2.5VDC, Min : 2.4VDC, Max : 2.6VDC

SDA545X:

General description:

The SDA545X is designed for a low cost mono TV-set with analogue picture and sound control. IN SDA545X the following IC s are used and supported:

Non-volatile memory : SDA 2526 or SDA2546 PLL : SDA 3202-3, SDA 3302 IR transmitter : SDA 2208-3 or SDA 2218 IR preamplifier : SFH 506-32

Features: General:

n Display of program number, channel number, TV standard, analogue values, sleep timer, parental control, and mute is done by

OSD

n Single LED for IR active, standby and on mode indication n Local control (8 keys) n IR remote control n Control of volume, contrast, brightness, and saturation by analogue voltages n Non-volatile memory for 50 or 100 programs, optimum analogue values and system parameters n Individual delta volume for each program

n 1 control line to select external source n 3 control lines for TV standard selection n Automatic muting if no carrier detected n Automatic switch-off when carrier disappears for more than 5 minutes n Software protection against tube flashovers with internal watchdog timer n Sleep timer n Parental control n IF 45.75 MHz or 38.9 MHz selectable

Tuning:

n Frequency synthesis tuning (62.5 kHz steps) n 192 step fine tuning n Channels corresponding to standards n 100 programs selectable by directly entering a program number or by up/down function depending on the NVM size n Channel selection by directly entering a channel number or by up/down function n Channel search function in two directions

Sound:

n Mono sound control by analogue voltage

Service Mode:

n System configuration with service mode

PINNING PIN VALUE

1. Crystal selection output 1 : LOW level : 0V

2. Volume + switch input : LOW level : 0V

3. Volume - switch input : LOW level : 0V

4. Program - switch input : LOW level : 0V

5. Program + switch input: : LOW level : 0V

6. LED output : LOW level : 0V

7. Filter (sound standard) selection output 1 : LOW level : 0V

8. Filter (sound standard) selection output 2 : LOW level : 0V

9. Mod-switch selection output : LOW level : 0V

10. Ground

11. Supply voltage : +5V

12. 6 MHz crystal connection 1 : 2Vpp

13. 6 MHz crystal connection 2 : 2Vpp

14. L-ACC output : LOW level : 0V

15. RESET output LOW level : 0V

16. Comb filter PAL/SECAM selection output : LOW level : 0V

17. Tuning output : LOW level : 0V

18. Audio switch transistor selection 1 : LOW level : 0V

19. Audio switch transistor selection 2 : LOW level : 0V

20. Audio switch transistor selection 3 : LOW level : 0V

21. Audio switch transistor selection 4 : LOW level : 0V

22. Comb filter standard selection 1 : LOW level : 0V

23. Comb filter standard selection 2 : LOW level : 0V

24. Analogue ground

25. Filter 3

26. Filter 2

27. Filter 1

28. Analogue supply voltage : 5VDC

29. Reference current input

30. CVBS input : 1Vpp

31. Service output : LOW level : 0V

32. AV2-status input : LOW level : 0V

33. AV1-status input : LOW level : 0V

34. AFC output : 600mVpp

35. Ground

36. IR-input : LOW level : 0V

37. Supply voltage : 5V

38. LC input : 5Vpp

HIGH level : 4.2V

HIGH level : 5V

HIGH level : 4.2VDC

HIGH level : 4.2V

HIGH level : 3.6V

HIGH level : 5V

HIGH level : 3.4V

HIGH level : 5V

39. LC output : 5Vpp

40. Mute output : LOW level : 0V

41. St-by output : LOW level : 0V / HIGH level : 1.4V

42. Clock signal output

43. Data output

44. Local connection : LOW : 0V / HIGH : 5V

45. SAND input : 4Vpp

46. ODD/EVEN output : 1.8V

47. OSD-red output : LOW level : 0V / HIGH level : 5V

48. OSD-green output : LOW level : 0V / HIGH level : 5V

49. OSD-blue output : LOW level : 0V / HIGH level : 5V

50. OSD-blanking output : LOW level : 0V / HIGH level : 5V

51. COR output : LOW level : 0V / HIGH level : 5V

52. Crystal selection output 2 : LOW level : 0V / HIGH level : 4.2V

HIGH level : 4.2V

ST24C08:

General description:

The ST24C08 is a 8Kbit electrically erasable programmable memory (EEPROM), organized as 4 blocks of 256 * 8 bits. The memory operates with a power supply value as low as 2.5V. Both Plastic Dual-in-Line and Plastic Small Outline packages are available.

Features:

n Minimum 1 million ERASE/WRITE cycles with over 10 years data retention n Single supply voltage:4.5 to 5.5V n Two wire serial interface, fully IýC-bus compatible n Byte and Multibyte write (up to 8 bytes) n Page write (up to 16 bytes) n Byte, random and sequential read modes n Self timed programming cycle

PINNING PIN VALUE

1. Write protect enable (Ground) : 0V

2. Not connected (Ground) : 0V

3. Chip enable input (Ground) : 0V

4. Ground : 0V

5. Serial data address input/output : Input LOW voltage : Min : -0.3V, Max : 0.3*Vcc

Input HIGH voltage: Min : 0.7*Vcc, Max : Vcc+1

6. Serial clock : Input LOW voltage : Min: -0.3V, Max : 0.3*Vcc

Input HIGH voltage: Min : 0.7*Vcc, Max : Vcc+1

7. Multibyte/Page write mode : Input LOW voltage : Min: -0.3V, Max :0.5V

Input HIGH voltage: Min : Vcc-0.5, Max : Vcc+1

8. Supply voltage : Min : 2.5V, Max : 5.5V

G1965M:

Features:

n TV IF filter with Nyquist slope and sound shelf at typ. 20.4dB n High colour carrier level at typ. 1.0dB n Constant group delay n Insertion attenuation typ. 15.0dB

PINNING

1. Input

2. Input-ground

3. Chip carrier-ground

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