4-12
Summary of Product
Samsung Electronics
Service Manual
* Direct connection up to 4 Flash ROM banks
- Burst capability
- Programmable timing per bank
- Up to 16MB address per bank (Limited to 8MB per bank when nDREQ0 is enabled)
* Direct connection up to 6 I/O banks & 4 DMA I/O banks
- Programmable timing per bank
- Programmable recovery timing per bank for slow devices
- Up to 16MB address per bank (Limited to 8MB per bank when nDREQ0 is enabled)
* Direct connection up to 5 SDRAM arrays
- SDRAM controller supports PC-66, PC-100 and PC-133 SDRAMs running at 60MHz
- Up to 128MB per array, up to 512MB totally
- Wide support of various SDRAM configurations, including programmable band and column
address
- Programmable SDRAM refresh time interval
* 4 General Purpose DMA controllers
- Extensible architecture allows peripheral devices such as scan devices to have access to SDRAM
arrays through DMA channels
- 8bits, 16bits and 32bits Data Transfer Modes are supported
- IO to Memory, Memory to IO, Memory to Memory transfer support
* IEEE1284 compliant parallel port interface
- Compatible ECP communications are supported
- Direct support for IEEE1284 compliant data transceivers
* RSH
- Fully Hardware Rotator, Scaler and Halftoner support
- Variable Image Scaler and Image Halftoning Unit for PCL6
- Pattern & Gamma Table Memory : 1024 x 8, 256 x 8 x 4
* Graphic Execution Unit for Banding support of Printer Languages
- Support up to 256 Bit Block Transfer
- Scan Line Transfer
- Polygon Filling
- Enhanced Graphic Order
* Compression / Decompression
- CODEC : Simplified JBIG algorithm for band compression / decompression
- HCT : Halftone Compression Technology (Byte Run-Length Type)
- Independent use of both Codec, but enabling only one Codec is desirable for bus traffic
* UART
- 3 Independent Full Duplex UART channels
- Max 16 bytes FIFO to handle SIR Bit Rate Speed
- DMA support for RX and TX of Channel0
* Printer Video Controller for LBP engines
- 20MHz video rate are targeted
- Two different kinds of Printer Video Controller (Selected by Software)
- PVC : Printer Video Controller without RET Algorithm
- HPVC : Printer Video Controller with RET algorithm
(Line Memory & Lookup Table Memory : 512 x 8 , 4096 x 16)
- High performance DMA based Interface to Printer Engine
- Engine Controller
- Motor Control Unit
- Motor Speed Lookup Table Memory (128 x 16 x 2)
- Pulse Width Modulation Unit
- 4 Channels are supported
- ADC Interface Unit
- 3 ADC Channels are available
- ADC Core (ADC8MUX8) maximum clock frequency : 3 MHz
- Coversion time : 4.3us (@3MHz)
- LSU Interface Unit