NEC UPB1005GS-E1, UPB1005GS Datasheet

DATA SHEET

BIPOLAR ANALOG + DIGITAL INTEGRATED CIRCUIT

PB1005GS

µµµµ

REFERENCE FREQUENCY 16.368 MHz, 2ND IF FREQUENCY 4.092 MHz

RF/IF FREQUENCY DOWN-CONVERTER +

PLL FREQUENCY SYNTHESIZER IC FOR GPS RECEIVER

DESCRIPTION

The µPB1005GS is a silicon monolithic integrated circuit for GPS receiver. This IC is designed as double

conversion RF block integrated RF/IF down-converter + PLL frequency synthesizer on 1 chip.

The µPB1005GS features shrink package, fixed prescaler and supply voltage. The 30-pin plastic SSOP package is suitable for high density surface mounting. The fixed division internal prescaler is needless to input serial counter data. Supply voltage is 3 V. Thus, the µPB1005GS can make RF block fewer components and lower power consumption.

This IC is manufactured using NEC’s 20 GHz fT NESATTMIII silicon bipolar process. This process uses direct silicon nitride passivation film and gold electrodes. These materials can protect the chip surface from pollution and prevent corrosion/migration. Thus, this IC realizes excellent performance, uniformity and reliability.

FEATURES

• Double conversion : f

• Integrated RF block : RF/IF frequency down-converter + PLL frequency synthesizer

• High-density surface mountable : 30-pin plastic SSOP (9.85 × 6.1 × 2.0 mm)

• Needless to input counter data : fixed division internal prescaler

• VCO side division :÷ 200 (÷ 25, ÷ 8 serial prescaler)

• Reference division :÷ 2

• Supply voltage : VCC = 2.7 to 3.3 V

• Low current consumption : ICC = 45.0 mA TYP.@VCC = 3.0 V

• Gain adjustable externally : Gain control voltage pin (control voltage up vs. gain down)

REFin

= 16.368 MHz, f

2ndIFout

= 4.092 MHz

APPLICATION

• Consumer use GPS receiver of reference frequency 16.368 MHz, 2nd IF frequency 4.092 MHz

ORDERING INFORMATION

Part Number Package Supplying Form

µ

PB1005GS-E1 30-pin plastic SSOP

(7.62 mm (300))

Embossed tape 16 mm wide. Pin 1 is in tape pull-out direc tion. QTY 2.5 kpcs/reel.

Remark

Document No. P13860EJ3V0DS00 (3rd edition) Date Published April 2000 N CP(K) Printed in Japan

To order evaluation samples, please contact your local NEC sales office. (Part number for sample order:

The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.

PB1005GS)

µ

Caution Electro-static sensitive devices

The mark shows major revised points.

©

1998, 2000

PIN CONNECTIONS AND INTERNAL BLOCK DIAGRAM

IF-MIX

in

1

GND (IF-MIX)

RF-MIX

VCC (RF-MIX)

RF-MIX

GND (RF-MIX)

V

CC

(1stLO-OSC)

1stLO-OSC1 1stLO-OSC2

GND (1stLO-OSC)

V

CC

(phase detector)

PD-V PD-V PD-V

GND (phase detector)

2

out

3 4

in

5 6

÷

25

7 8

÷

9

8

10 11

out

3

12

out

2

13

out

1

14

PD

÷

2

15

30

CC

(IF-MIX)

V

29

V

GC

(IF-MIX)

28

IF-MIX

out

27

GND (2ndIF-AMP)

26

2ndlF

in

1

25

2ndlF

in

2

24

2ndlFbypass

23

V

CC

(2ndIF-AMP)

22

2ndIF

out

21

REF

out

20

VCC (reference block)

19

REF

in

18

GND (divider block) LO

out

17 16

VCC (divider block)

µµµµ

PB1005GS

2

Data Sheet P13860EJ3V0DS00

µµµµ

PB1005GS

PRODUCT LINE-UP (TA = +25

Type Part Number

General

PC2756T 6-pin

µ

Purpose Wideband Separate

PC2756TB

µ

IC

PC2753GR IF down-converter with gain

µ

Clock

PB1003GS RF/IF down-converter

µ

Frequency Specific 1 chip IC

PB1004GS

µ

PB1005GS

µ

Remark

Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail. To know the associated products, please refer to their latest data sheets.

RF down-converter with osc. Tr

control amplifier

+ PLL synthesizer REF = 18.414 1stIF = 28.644/2ndIF = 1.023

RF/IF down-converter + PLL synthesizer REF = 16.368 1stIF = 61.380/2ndIF = 4.092

Functions

(Frequency unit: MHz)

C, VCC = 3.0 V)

°°°°

CC

V

(V)

2.7 to 3.3

CC

I

(mA)

CG

(dB)

614

(°C) 40 to

−

85

+

A

T

6.5 60 to 79

37.5 72 to 92−20 to 85

+

37.5 72 to 92−20 to 85

+

45.0 72 to 92−40 to 85

+

Package Status

Available

minimold 6-pin super

minimold 20-pin plastic

SSOP 30-pin plastic

Discontinued

SSOP

Available

SYSTEM APPLICATION EXAMPLE

GPS receiver RF block diagram

60f

0

BPF

IF-MIX

out

RF-MIX

BPF

0

1540f

OSC

RF-MIX

0

1600f

0

1stLO-OSC21stLO-OSC1

1575.42 MHz from

Antenna

LNA 1540f

µ

PC2749TBexample:

Caution This diagram schematically shows only the

This diagram does not present the actual application circuits.

in

IF-MIX

1/25 1/8 P D

64f

0

40f

IF-MIX

V

GC

0

LO

8f

out

LPF

out

LOOP

0

AMP

PB1005GS’s internal functions on the system.

µµµµ

2ndlFin1

2ndlFbypass

2ndlF-Amp

8f

0

1/2

16f

TCXO

V

CC

16.368 MHz

• f0 = 1.023 MHz in the diagram.

• PB1005GS is in .

µ

2ndlF

in

2

4.092 MHz

4f

0

Buff

16.368 MHz

16f

0

Buff

REF

0

to Demodulator

Data Sheet P13860EJ3V0DS00

3

ABSOLUTE MAXIMUM RATINGS

Parameter Symbol Conditions Ratings Unit

µµµµ

PB1005GS

Supply Voltage V Total Circuit Current I Power Dissipation P

Operating Ambient Temperature T Storage Temperature T

CC

D

A

stg

RECOMMENDED OPERATING RANGE

Parameter Symbol MIN. TYP. MAX. Unit

RFin

1stLOin

1stIFin

2ndLOin

2ndIFin

2ndIFout

f

REFin

REFout

f

CC

A

Supply Voltage V Operating Ambient Temperature T RF Input Frequency f 1stLO Oscillating Frequency f 1stIF Input Frequency f 2ndLO Input Frequency f 2ndIF Input/output Frequency f

Reference Input/output Frequency f

TA = +25°C3.6V TA = +25°C 128 mA Mounted on double-sided copper clad

50 × 50 × 1.6 mm epoxy glass P WB at T

A

= +85°C

464 mW

40 to +85

−

55 to +150

−

C

°

C

°

2.7 3.0 3.3 V 40 +25 +85

− 

1575.42



C

°

MHz

1616.80 1636.80 1656.80 MHz

  



61.380

65.472

4.092

16.368

  



MHz MHz MHz

MHz

4

Data Sheet P13860EJ3V0DS00

µµµµ

PB1005GS

ELECTRICAL CHARACTERISTICS (Unless otherwise specified, TA = +25

C, VCC = 3.0 V)

°°°°

Parameter Symbol Conditions MIN. TYP. MAX. Unit

Total Circuit Current ICCtotal ICC1 + ICC2 + ICC3 + ICC4 32.0 45.0 60.0 mA RF Down-converter Block (f

RFin

= 1575.42 MHz, f

1stLOin

= 1636.80 MHz, P

LOin

= −10 dBm, ZL = ZS = 50 Ω) Circuit Current 1 ICC1 No Signals 6.0 10.0 14.0 mA RF Conversion Gain CG RF-SSB Noise Figure NF Maximum IF Output Power P IF Down-converter Block (f

O(sat)RF

1stIFIn

= 61.38 MHz, f

RF

RFin

P

= −40 dBm 12.5 15.5 18.5 dB

RFin

P

= −40 dBm 7 10 13 dB

RFin

P

= −10 dBm

2ndLOIn

= 65.472 MHz, ZS = 50 Ω, ZL = 2 kΩ)

5.5

−

2.5 +0.5 dBm

−

Circuit Current 2 ICC2 No Signals 3.4 5.3 7. 2 mA IF Voltage Conversion Gain CG IF-SSB Noise Figure NF Maximum 2nd IF Output

O(sat)IF

P

(GV)IF

IF

at Maximum Gain, P at Maximum Gain, P at Maximum Gain, P

1stIFin

= −50 dBm 38 41 44 dB

1stIFin

= −50 dBm 8.5 11.5 14.5 dB

1stIFin

= −20 dBm

9.5

−

6.5

−

3.5 dBm

−

Power Gain Control Voltage V Gain Control Range D 2nd IF Amplifier (f

2ndIF

= 4.092 MHz, ZS = 50 Ω, ZL = 2 kΩ)

GC

Voltage at Maximum Gain of CG

1stIFin

P

= −50 dBm 20

IF



1.0 V



Circuit Current 3 ICC3 No Signals 1.55 2.40 3.25 mA Voltage Gain G Maximum Output Power P

V

O(sat)

2ndIFin

P

= −60 dBm 37 40 43 dB

2ndIFin

P

= −30 dBm

−

14.5

−

11.5

−

8.5 dBm PLL Synthesizer Block Circuit Current 4 ICC4 PLL All Block Operati ng 18.5 28.5 38.5 mA Phase Comparing

PD

f

PLL Loop 8.0 8.184 8.4 MHz

Frequency Reference Input Minimum

Level Loop Filter Output Level (H) V Loop Filter Output Level (L) V Reference Output Swing V

V

REFout

REFin

LP(H)

LP(L)

ZL = 10 kΩ//20 pF (Impedance of measurement equipment)

ZL = 10 kΩ//2 pF (Impedance of

200

2.8



1.0



0.4 V

measurement equipment)

mV

V

dB

P-P

V

P-P

Data Sheet P13860EJ3V0DS00

5

µµµµ

PB1005GS

STANDARD CHARACTERISTICS (Unless otherwise specified TA = +25

Parameter Symbol Conditions Reference Unit RF Down-converter Block (P LO Leakage to IF Pin LO LO Leakage to RF Pin LO Input 3rd Order Intercept

Point IF Down-converter Block (1stLO oscillating, ZS = 50 Ω, ZL = 2 kΩ) LO Leakage to 2nd IF Pin LO LO Leakage to 1st IF Pin LO Input 3rd Order Intercept

Point

1stLOin

= −10 dBm, ZL = ZS = 50 Ω)

if

1stLOin

f

rf

1stLOin

f

IIP3RF f

2ndif

1stif

IIP3IF f

RFin

1 = 1600 MHz, f

1stLOin

f

2ndLOin

f

2ndLOin

f

1stIFin 2ndLOin

f

= 1636.80 MHz = 1636.80 MHz

= 1660 MHz

= 65.472 MHz = 65.472 MHz

1 = 61.38 MHz, f

= 65.472 MHz

RFin

2 = 1605 MHz

1stIFIn

2 = 61.48 MHz

C, VCC = 3.0 V)

°°°°

30 dBm

−

30 dBm

−

13 dBm

−

20 dBm

−

40 dBm

−

34 dBm

−

6

Data Sheet P13860EJ3V0DS00