NEC Electronics Inc UPB1505GR-E1, UPB1505GR Datasheet
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DATA SHEET
BIPOLAR DIGITAL INTEGRATED CIRCUIT
μPB1505GR
3.0 GHz PRESCALER DIVIDED BY 256, 128, 64
FOR BS/CS TUNER
DESCRIPTION
μPB1505GR is a silicon prescaler IC operating up to 3.0 GHz and divided by 256, 128, 64. Due to 3.0 GHz operation and high division, this IC can contribute to produce BS/CS tuners with kit-use of 17K series DTS controller or standard CMOS PLL IC. The package is 8 pin plastic SOP suitable for surface mounting.
This IC is manufactured using NEC’s 20 GHz fT NESATä III silicon bipolar process. This process uses silicon nitride passivation film and gold electrodes. These materials can protect the chips from external pollution and prevent corrosion/ migration. Thus, this IC has with excellent performance, uniformity and reliability.
FEATURES
•High toggle-frequency : 0.5 GHz to 3.0 GHz
•Low power-consumption : 14 mA TYP. at 5 V
•High divide-ratio : ¸256, ¸128, ¸64
•High input-sensitivity : –14 to +10 dBm @ 1.0 GHz to 2.7 GHz
•Wide output-swing : 1.6 Vp-p (CL = 8 pF load)
ORDERING INFORMATION
PART NUMBER |
PACKAGE |
SUPPLYING FORM |
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μPB1505GR-E1 |
8 pin plastic SOP |
Embossed tape 12 mm wide. QTY 2.5 k/reel |
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(225 mil) |
Pin 1 is in tape pull-out direction. |
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Remarks To order evaluation samples, please contact your local NEC sales office. (Order number : μPB1505GR)
PIN ASSIGNMENT (Top View)
IN |
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1 |
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8 |
IN |
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VCC |
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2 |
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7 |
GND |
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SW1 |
3 |
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6 |
SW2 |
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OUT |
4 |
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5 |
GND |
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Caution electro-static sensitive devices
The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.
Document No. P10872EJ3V0DS00 (3rd edition) |
The mark shows major revised points. |
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Date Published October 1999 N CP(K) |
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Printed in Japan |
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1996,1999 |
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μPB1505GR |
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SELECTOR GUIDE |
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FEATURES |
PRODUCT |
ICC |
fin |
VCC |
PACKAGE |
PIN ASSIGNMENT |
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NUMBER |
(mA) |
(GHz) |
(V) |
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2.5 |
GHz / ÷512, ÷256 |
μPB586G |
28 |
0.5 to 2.5 |
5 |
8 pin SOP |
NEC original |
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2.5 |
GHz / ÷128, ÷64 |
μPB588G |
26 |
0.5 to 2.5 |
5 |
8 pin SOP |
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3.0 GHz / ÷256, ÷128, ÷64 |
μPB1505GR |
14 |
0.5 to 3.0 |
5 |
8 pin SOP |
Typical of prescaler |
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Notice Typical performance. Please refer to Electrical Characteristics in detail.
To know the associated products, please refer to their latest data sheets.
INTERNAL BLOCK DIAGRAM
VCC
2
INPUT |
1 |
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1 / 64 |
1 / 2 |
1 / 2 |
Buff. |
BYPASS |
8 |
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4 OUTPUT |
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5, 7 |
3 |
6 |
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GND |
SW1 |
SW2 |
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PIN DESCRIPTIONS |
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PIN NO. |
SYMBOL |
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ASSIGNMENT |
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FUNCTIONS AND EXPLANATION |
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1 |
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Frequency input |
Input frequency from an external VCO output. |
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pin |
Must be coupled with capacitor (e.g. 1 000 pF) for DC cut. |
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2 |
VCC |
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Power supply pin |
Supply voltage 5.0±0.5 V for operation. Must be connected bypass capacitor |
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(e.g. 1 000 pF) to minimize ground impedance. |
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3 |
SW1 |
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Divided ratio |
Divided ratio control can be governed by following input data to these pins. |
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control input pin 1 |
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SW2 |
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SW2 |
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Divided ratio |
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H |
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L |
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control input pin 2 |
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SW1 |
H |
1/64 |
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1/128 |
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L |
1/128 |
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1/256 |
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4 |
OUT |
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Divided frequency |
This frequency output can be interfaced to CMOS PLL. |
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output pin |
Must be coupled with capacitor (e.g. 1 000 pF) for DC cut. |
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5 |
GND |
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Ground pin |
This pin must be connected to the system ground with minimum inductance. |
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7 |
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Ground pattern on the board should be formed as wide as possible. |
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(Track length should be kept as short as possible.) |
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8 |
IN |
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Frequency-input |
This pin must be connected bypass capacitor (e.g. 1 000 pF) to minimize ground |
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bypass pin |
impedance. |
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2 |
Data Sheet P10872EJ3V0DS00 |
μPB1505GR
ABSOLUTE MAXIMUM RATINGS
PARAMETER |
SYMBOL |
RATING |
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UNIT |
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CONDITIONS |
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Supply voltage |
VCC |
–0.5 to +6 |
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V |
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TA = +25 °C |
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Input voltage |
VIN |
–0.5 to VCC +0.5 |
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V |
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TA = +25 °C |
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Power dissipation |
PD |
250 |
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mW |
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Mounted on 50 × 50 × 1.6 mm double copper clad |
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epoxy glass PWB (TA = +85 °C) |
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Operating temperature |
Topt |
–40 to +85 |
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°C |
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Storage temperature |
Tstg |
–55 to +150 |
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°C |
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RECOMMENDED OPERATING RANGE |
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PARAMETER |
SYMBOL |
MIN. |
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TYP. |
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MAX. |
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UNIT |
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Supply voltage |
VCC |
4.5 |
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5.0 |
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5.5 |
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V |
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Operating temperature |
Topt |
–40 |
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+25 |
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+85 |
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°C |
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ELECTRICAL CHARACTERISTICS (TA = –40 to +85°C, VCC = 4.5 to 5.5 V)
PARAMETER |
SYMBOL |
MIN. |
TYP. |
MAX. |
UNIT |
CONDITIONS |
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Circuit current |
ICC |
9.0 |
14.0 |
19.5 |
mA |
No input signal |
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Upper response frequency 1 |
fin(U)1 |
3.0 |
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GHz |
Pin = –10 to +10 dBm |
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Upper response frequency 2 |
fin(U)2 |
2.7 |
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GHz |
Pin = –14 to –10 dBm |
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Lower response frequency 1 |
fin(L)1 |
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0.5 |
GHz |
Pin = –10 to +8 dBm |
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Lower response frequency 2 |
fin(L)2 |
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1.0 |
GHz |
Pin = –14 to –10 dBm, +8 to +10 dBm |
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Input sensitivity 1 |
Pin1 |
–10 |
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+8 |
dBm |
fin = 0.5 to 1.0 GHz |
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Input sensitivity 2 |
Pin2 |
–14 |
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+10 |
dBm |
fin = 1.0 to 2.7 GHz |
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Input sensitivity 3 |
Pin3 |
–10 |
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+10 |
dBm |
fin = 2.7 to 3.0 GHz |
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Output Swing |
VOUT |
1.3 |
1.6 |
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VP-P |
CL = 8 pF |
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SW1 input voltage (H) |
VIH1 |
VCC |
VCC |
VCC |
V |
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SW1 input voltage (L) |
VIL1 |
OPEN |
OPEN |
OPEN |
V |
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SW2 input voltage (H) |
VIH2 |
VCC |
VCC |
VCC |
V |
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SW2 input voltage (L) |
VIL2 |
OPEN |
OPEN |
OPEN |
V |
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Data Sheet P10872EJ3V0DS00 |
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