NEC Electronics Inc UPB1505GR-E1, UPB1505GR Datasheet

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NEC Electronics Inc UPB1505GR-E1, UPB1505GR Datasheet

DATA SHEET

BIPOLAR DIGITAL INTEGRATED CIRCUIT

μPB1505GR

3.0 GHz PRESCALER DIVIDED BY 256, 128, 64

FOR BS/CS TUNER

DESCRIPTION

μPB1505GR is a silicon prescaler IC operating up to 3.0 GHz and divided by 256, 128, 64. Due to 3.0 GHz operation and high division, this IC can contribute to produce BS/CS tuners with kit-use of 17K series DTS controller or standard CMOS PLL IC. The package is 8 pin plastic SOP suitable for surface mounting.

This IC is manufactured using NEC’s 20 GHz fT NESATä III silicon bipolar process. This process uses silicon nitride passivation film and gold electrodes. These materials can protect the chips from external pollution and prevent corrosion/ migration. Thus, this IC has with excellent performance, uniformity and reliability.

FEATURES

High toggle-frequency : 0.5 GHz to 3.0 GHz

Low power-consumption : 14 mA TYP. at 5 V

High divide-ratio : ¸256, ¸128, ¸64

High input-sensitivity : –14 to +10 dBm @ 1.0 GHz to 2.7 GHz

Wide output-swing : 1.6 Vp-p (CL = 8 pF load)

ORDERING INFORMATION

PART NUMBER

PACKAGE

SUPPLYING FORM

 

 

 

μPB1505GR-E1

8 pin plastic SOP

Embossed tape 12 mm wide. QTY 2.5 k/reel

(225 mil)

Pin 1 is in tape pull-out direction.

 

 

 

 

Remarks To order evaluation samples, please contact your local NEC sales office. (Order number : μPB1505GR)

PIN ASSIGNMENT (Top View)

IN

 

 

 

 

1

 

8

IN

VCC

 

 

 

 

 

 

 

 

2

 

7

GND

 

 

 

 

 

 

 

 

 

 

SW1

3

 

6

SW2

 

 

 

 

 

 

 

 

 

 

OUT

4

 

5

GND

 

 

 

 

 

 

 

 

 

 

Caution electro-static sensitive devices

The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.

Document No. P10872EJ3V0DS00 (3rd edition)

The mark shows major revised points.

 

 

Date Published October 1999 N CP(K)

 

 

 

Printed in Japan

©

 

1996,1999

 

 

 

 

 

 

 

 

 

 

 

 

 

 

μPB1505GR

 

SELECTOR GUIDE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FEATURES

PRODUCT

ICC

fin

VCC

PACKAGE

PIN ASSIGNMENT

 

 

 

NUMBER

(mA)

(GHz)

(V)

 

 

 

 

 

 

 

 

2.5

GHz / ÷512, ÷256

μPB586G

28

0.5 to 2.5

5

8 pin SOP

NEC original

 

 

 

 

 

 

 

 

 

 

 

2.5

GHz / ÷128, ÷64

μPB588G

26

0.5 to 2.5

5

8 pin SOP

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3.0 GHz / ÷256, ÷128, ÷64

μPB1505GR

14

0.5 to 3.0

5

8 pin SOP

Typical of prescaler

 

 

 

 

 

 

 

 

 

 

 

Notice Typical performance. Please refer to Electrical Characteristics in detail.

To know the associated products, please refer to their latest data sheets.

INTERNAL BLOCK DIAGRAM

VCC

2

INPUT

1

 

 

 

 

1 / 64

1 / 2

1 / 2

Buff.

BYPASS

8

 

 

4 OUTPUT

 

 

 

 

 

5, 7

3

6

 

 

 

 

 

 

 

 

 

 

GND

SW1

SW2

 

 

 

 

PIN DESCRIPTIONS

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PIN NO.

SYMBOL

 

ASSIGNMENT

 

FUNCTIONS AND EXPLANATION

 

 

 

 

 

 

 

 

 

 

 

 

 

1

IN

 

Frequency input

Input frequency from an external VCO output.

 

 

 

 

 

 

 

pin

Must be coupled with capacitor (e.g. 1 000 pF) for DC cut.

 

 

 

 

 

 

 

 

 

 

 

 

2

VCC

 

Power supply pin

Supply voltage 5.0±0.5 V for operation. Must be connected bypass capacitor

 

 

 

 

 

 

(e.g. 1 000 pF) to minimize ground impedance.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

3

SW1

 

Divided ratio

Divided ratio control can be governed by following input data to these pins.

 

 

 

 

 

control input pin 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SW2

 

 

 

 

 

 

 

 

 

 

 

 

 

6

SW2

 

Divided ratio

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

H

 

L

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

control input pin 2

 

 

 

 

 

 

 

 

 

 

 

 

 

SW1

H

1/64

 

1/128

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

L

1/128

 

1/256

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

4

OUT

 

Divided frequency

This frequency output can be interfaced to CMOS PLL.

 

 

 

 

 

output pin

Must be coupled with capacitor (e.g. 1 000 pF) for DC cut.

 

 

 

 

 

 

 

 

 

 

 

 

5

GND

 

Ground pin

This pin must be connected to the system ground with minimum inductance.

7

 

 

 

 

 

Ground pattern on the board should be formed as wide as possible.

 

 

 

 

 

 

(Track length should be kept as short as possible.)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

8

IN

 

Frequency-input

This pin must be connected bypass capacitor (e.g. 1 000 pF) to minimize ground

 

 

 

 

 

bypass pin

impedance.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

2

Data Sheet P10872EJ3V0DS00

μPB1505GR

ABSOLUTE MAXIMUM RATINGS

PARAMETER

SYMBOL

RATING

 

 

UNIT

 

 

 

CONDITIONS

 

 

 

 

 

 

 

 

 

 

 

 

Supply voltage

VCC

–0.5 to +6

 

 

 

V

 

TA = +25 °C

 

 

 

 

 

 

 

 

 

 

 

Input voltage

VIN

–0.5 to VCC +0.5

 

 

V

 

TA = +25 °C

 

 

 

 

 

 

 

 

 

 

 

 

Power dissipation

PD

250

 

 

 

mW

 

Mounted on 50 × 50 × 1.6 mm double copper clad

 

 

 

 

epoxy glass PWB (TA = +85 °C)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Operating temperature

Topt

–40 to +85

 

 

 

°C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Storage temperature

Tstg

–55 to +150

 

 

°C

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

RECOMMENDED OPERATING RANGE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PARAMETER

SYMBOL

MIN.

 

TYP.

 

MAX.

 

UNIT

 

 

 

 

 

 

 

 

 

 

 

 

 

Supply voltage

VCC

4.5

 

5.0

 

 

5.5

 

 

V

 

 

 

 

 

 

 

 

 

 

 

 

 

Operating temperature

Topt

–40

 

+25

 

 

+85

 

 

°C

 

 

 

 

 

 

 

 

 

 

 

 

 

ELECTRICAL CHARACTERISTICS (TA = –40 to +85°C, VCC = 4.5 to 5.5 V)

PARAMETER

SYMBOL

MIN.

TYP.

MAX.

UNIT

CONDITIONS

 

 

 

 

 

 

 

Circuit current

ICC

9.0

14.0

19.5

mA

No input signal

 

 

 

 

 

 

 

Upper response frequency 1

fin(U)1

3.0

 

 

GHz

Pin = –10 to +10 dBm

 

 

 

 

 

 

 

Upper response frequency 2

fin(U)2

2.7

 

 

GHz

Pin = –14 to –10 dBm

 

 

 

 

 

 

 

Lower response frequency 1

fin(L)1

 

 

0.5

GHz

Pin = –10 to +8 dBm

 

 

 

 

 

 

 

Lower response frequency 2

fin(L)2

 

 

1.0

GHz

Pin = –14 to –10 dBm, +8 to +10 dBm

 

 

 

 

 

 

 

Input sensitivity 1

Pin1

–10

 

+8

dBm

fin = 0.5 to 1.0 GHz

 

 

 

 

 

 

 

Input sensitivity 2

Pin2

–14

 

+10

dBm

fin = 1.0 to 2.7 GHz

 

 

 

 

 

 

 

Input sensitivity 3

Pin3

–10

 

+10

dBm

fin = 2.7 to 3.0 GHz

 

 

 

 

 

 

 

Output Swing

VOUT

1.3

1.6

 

VP-P

CL = 8 pF

 

 

 

 

 

 

 

SW1 input voltage (H)

VIH1

VCC

VCC

VCC

V

 

 

 

 

 

 

 

 

SW1 input voltage (L)

VIL1

OPEN

OPEN

OPEN

V

 

 

 

 

 

 

 

 

SW2 input voltage (H)

VIH2

VCC

VCC

VCC

V

 

 

 

 

 

 

 

 

SW2 input voltage (L)

VIL2

OPEN

OPEN

OPEN

V

 

 

 

 

 

 

 

 

Data Sheet P10872EJ3V0DS00

3

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