MSI MS-6717 Schematics
5
4
3
2
1
CONTENT
D D
MS-6717 V.100
Cover Page
Block Diagram
Clock Gen.& Clock Buffer
CPU: AMD Socket-462 Processor
AMD Socket A
PAGE
1
2
3-4
5-6
SiS 746 Host / AGP 7
Chipset: SIS 746
SIS 963 SOUTH BRIDGE
LPC I/O: W83697HF
C C
B B
AC'97 CODEC:Realtek ALC650
Expansion:
BIOS
Single
Color
Dual
Color
Note :
1). 1Hz means Blinking frequence of ACPILED signal.
2). VDIM is no voltage in S5 state.
PCI Slot * 5
MSI Power On / Suspend LED State
BIOS
Single
Color
Dual Off
Color
Green: MSI_LED1=' 1' MSI_LED2=' 0'
Red : MSI_LED1=' 0' MSI_LED2=' 1'
Single Color S1/S3 status:
MSI_LED1=' 0' MSI_LED2=' 1'
ACPILED:Low
VDIM :Hi
ACPILED:Low ACPILED:Hi & VDIM:Hi ACPILED:Hi-z
VDIM :Hi
S0
Green
MSI ACPILED & VDIM state
S0
ACPILED:Hi & VDIM:Hi ACPILED:Hi-z
S1/S3
Off
Red
S1/S3
VDIM :Low
VDIM :Low
S5
OffGreen
S5
SiS 746 Memory
746 MuTiol/Other
746 POWER
SIS 963
DDR SLOT 1-3
DDR Termination
AGP Slot
PCI slot 1~6
LAN PHY(RTL8201) & RJ45
IDE Connector
USB connector
KB/MS Connector
AC'97 CODEC
Audio Connector
10
11-14
15-16
17
18
19-21
22
23
24
25
26
27
LPC I/O W83697HF 28
Flash & FAN & H/WMonitor
Parallel Port
Serial Port
PWM ST6911D
ACPI Contorller
Front Panel&ATX power CONN.
29
30
31
32
33
34
SCREW MENU 35
8
9
A A
MICRO-STAR INT'L CO.,LTD.
Title
COVER SHEET
Size Document Number Rev
MS-6717 0B
Custom
5
4
3
2
Date: Sheet
1
of
136Wednesday, November 06, 2002
5
4
3
2
1
MS-6717 Block Diagram
D D
VRM 9.0
APICCLK0
AGP SLOT
C C
UltraDMA
IDE Primary
33/66/100
IDE Secondary
USB Port 1
USB Port 2
B B
USB Port 3
USB Port 4
USB
961PCLK
OSCI
K7 462-Pin Socket Processor
ADDR(In-Out)
PWR-MNG
DATA
SIS746
Hyper Zip
SIS963
CPUCLK
CPUCLK#
INT & PWR-MNG
740CCLK
740DCLK
ZCLK0
ZCLK1
PCI CNTRL
PCI ADDR/DATA
APICCLK1
Clock
DDRCLK[0..5]
DDRCLK-[0..5]
3 DDR
Modules
PC2700
FWDCLK_DDR from SiS740
PCI 2.2
PCI Conn 1
PCI Conn 2
PCI Conn 3
PCI Conn 4
PCI Conn 5
USB Port 5
LPC
USB Port 6
Onboard
AC'97 Link
AC'97 Codec
A A
5
I/O set to 48MHz
SIOPCLK
SIO24M
4
WINBOND
W83697HF
Floopy
3
Parallel
Serial
MICRO-STAR INT'L CO.,LTD.
Title
BLOCK DIAGRAM
Size Document Number Rev
MS-6717 0B
Custom
2
Date: Sheet
1
of
236Wednesday, November 06, 2002
5
CP27
4
3
2
1
1 2
C261
0.1u
X_COPPER
L36
120S_0805
4.7U_0805
X_4.7U_0805
1 2
VCC3
C200
C236
L32
X_120S_0805
CP18
X_COPPER
C217
0.1u
VCC3
CLK2_5V
L33
1 2
X_120S_0805
CP20
X_COPPER
C234
0.1u
VCC3
VCC3
C247
0.1u
C246
0.1u
R146 X_1K
C214
0.1u
R25 10K
R4 10K
*100:ADD R4
C216
0.1u
CLK3_3V
C248
0.1u
CLK2_5V
C229
0.1u
C203
102p
VCC3
D D
C C
VCC2_5
B B
CLK2
CLOCK GEN (746)
1
VDDREF
11
VDDZ
13
VDDPCI
19
VDDPCI
28
VDD48
29
VDDAGP
12
PCI_STOP#
5
GNDREF
8
GNDZ
18
GNDPCI
24
GNDPCI
25
GND48
32
GNDAGP
42
RESET#
38
VDDCPU
48
VDDAPIC
41
GNDCPU
45
GNDAPIC
44
CPUSTOP#
33
PD#
36
VDDA
37
GNDA
X1
6
Y1
14.318MHz
C235
10p
CPUCLK_0T
CPUCLK_0C
CPUCLK_1T
IOAPIC1
IOAPIC0
AGPCLK0
AGPCLK1
FS2/PCICLK_F0
FS3/PCICLK_F1
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
FS0/REF0
FS1/REF1
24_48MHz
X2
7
C232
10p
ZCLK0
ZCLK1
48MHz
SCLK
SDATA
100:CHANGE VALUE 10 OHM TO 33 OHM
40
39
43
47
46
31
30
9
10
14
15
16
17
20
21
22
23
2
3
4
NC
27
26
pin 26 set to 48MHz
35
34
R147 33
R148 33
R145 0
R143 10
R144 10
R149 22
R150 22
R166 22
R167 22
RN70 10_8P4R
FS2
FS3 PCICLK1
FS0
FS1
FS4
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
RN71 10_8P4R
R164 33
R165 X_33
R151 22
R152 22
CPUCLK
CPUCLK#
746CCLK
APICCLK0
APICCLK1
AGPCLK0
AGPCLK1
ZCLK1
ZCLK0
96XPCLK
SIOPCLK
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
OSCI
VOSCIN
UCLK48M
SIO24M
This pin has 120K pull down -->
This pin has 120K pull down -->
This pin has 120K pull down -->
CPUCLK (5)
CPUCLK# (5)
746CCLK (7)
APICCLK0 (5)
APICCLK1 (12)
AGPCLK0 (7)
AGPCLK1 (18)
ZCLK1 (11)
ZCLK0 (9)
96XPCLK (11)
SIOPCLK (28)
PCICLK1 (19)
PCICLK2 (20)
PCICLK3 (20)
PCICLK4 (21)
PCICLK5 (21)
OSCI (12)
UCLK48M (13)
SIO24M (28)
SMCLK (4,12,15,16,33)
SMDATA (4,12,15,16,33)
By-Pass Capacitors Place near to the Clock Buffer
R184 10K
FS2
R170 10K
FS3
RN72 X_10K_8P4R
FS4
FS1
FS0
1 2
3 4
5 6
7 8
C197 10p
746CCLK
C198 15p
CPUCLK
CPUCLK#
C199 15p
C201 10p
APICCLK0
APICCLK1
C202 10p
C204 10p
AGPCLK0
C205 10p
AGPCLK1
96XPCLK
7 8
SIOPCLK
5 6
3 4
1 2
CN23 X_8P4C-10P
PCICLK2
7 8
PCICLK3
5 6
PCICLK4
3 4
PCICLK5
1 2
CN24 X_8P4C-10P
UCLK48M
C206 X_10p
SIO24M
C207 X_10p
C259 X_10p
ZCLK1MULSEL
C260 X_10p
ZCLK0
C257 10p
OSCI
VOSCIN
C258 X_10p
VCC3
VCC3
100:ADD 15P
Default freq CPU:100/ZCLK:133/AGP:66
A A
MICRO-STAR INT'L CO.,LTD.
Title
CLOCK GEN
Size Document Number Rev
MS-6717 0B
Custom
5
4
3
2
Date: Sheet
1
of
336Monday, November 11, 2002
8
A
7
6
5
4
3
2
1
Clock Buffer ( FOR 3 DDR SDRAM DIMMS )
DDRCLK8
DDRCLK5
DDRCLK2
DDRCLK6
DDRCLK3
DDRCLK0
DDRCLK7
DDRCLK4
DDRCLK1
DDRCLK#8
DDRCLK#5
DDRCLK#2
DDRCLK#6
DDRCLK#3
DDRCLK#0
DDRCLK#7
DDRCLK#4
DDRCLK#1
DDRCLK[0..8]
DDRCLK#[0..8]
R55 22
D D
VCC2_5
C94
C95
C80
33p
103p
33p
C C
X_80-0805
SDCLKO_DDR(8)
VCC2_5
L13
SMCLK(3,12,15,16,33)
SMDATA(3,12,15,16,33)
C145
10u-0805
CP5
X_COPPER
C122
0.1uF
SMCLK
SMDATA
SDCLKO_DDR
CBVDD
FB_OUT
CBVDD
CLK_BUF_AVDD
C123
0.01uF
15
4
11
21
28
34
38
45
16
17
12
37
13
14
35
36
CLK1
ICS 93735
VDDI2C
VDD
VDD
VDD
VDD
VDD
VDD
VDD
AVDD
AGND
SCLK
SDATA
CLK_IN
CLK_IN#
FB_IN
FB_IN#
178182425314142
GND
GND
GND
GND
GND
GND
GND
FB_OUT#
GND
GND
CLK0
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
CLK7
CLK8
CLK9
CLK#0
CLK#1
CLK#2
CLK#3
CLK#4
CLK#5
CLK#6
CLK#7
CLK#8
CLK#9
FB_OUT
GND
48
3
5
10
20
22
46
44
39
29
27
2
6
9
19
23
47
43
40
30
26
BFB_OUT FB_OUT
33
32
DDRCLK[0..8] (15,16)
DDRCLK#[0..8] (15,16)
By-Pass Capacitors
Place near to the Clock Buffer
DDRCLK8
DDRCLK5
DDRCLK2
DDRCLK6
DDRCLK3
DDRCLK0
DDRCLK7
DDRCLK4
DDRCLK1
DDRCLK#8
DDRCLK#5
DDRCLK#2
DDRCLK#6
DDRCLK#3
DDRCLK#0
DDRCLK#7
DDRCLK#4
DDRCLK#1
C136 X_10P
C137 X_10P
C140 X_10P
C142 X_10P
C143 X_10P
C57 X_10P
C58 X_10P
C61 X_10P
C64 X_10P
C135 X_10P
C138 X_10P
C139 X_10P
C141 X_10P
C144 X_10P
C56 X_10P
C59 X_10P
C60 X_10P
C63 X_10P
B B
FB_OUT
C62 10pF
CP4
EC16
X_22u
C148
0.1uF
X_COPPER
L12 X_80-0805
C147
0.01uF
EC14
X_22u
C124
0.01uF
C65
0.1uF
C106
0.1uF
CBVDD
C121
0.1uF
C66
0.1uF
CBVDDVCC2_5
C103
0.1uF
VCC5
C150
0.1u
U4
YLT1087S-SOT89-0.8A
3 2
VIN VOUT
ADJ
1
C151
X_0.1u
R92
200
R103
200
C111
X_0.1u
VCC2_5
EC15
47u
A
*100:NO STUFF
8
7
6
5
4
3
MICRO-STAR INT'L CO.,LTD.
Title
CLOCK BUFFER
Size Document Number Rev
MS-6717 0B
Custom
Date: Sheet
2
of
436Wednesday, November 06, 2002
1
5
AMD 462PGA Socket - Signals
AA35
W37
W35
Y35
U35
U33
S37
S33
AA33
AE37
AC33
AC37
Y37
AA37
AC35
S35
Q37
Q35
N37
J33
G33
G37
E37
G35
Q33
N33
L33
N35
L37
J37
A37
E35
E31
E29
A27
A25
E21
C23
C27
A23
A35
C35
C33
C31
A29
C29
E23
C25
E17
E13
E11
C15
A13
C21
A21
E19
C19
C17
A11
A17
A15
W33
J35
E27
E15
AN33
AE35
C37
A33
C11
AL31
AJ29
AL29
AG33
AJ37
AL35
AE33
AJ35
AG37
AL33
AN37
AL37
AG35
AN29
AN35
AN31
AJ33
AJ21
AL23
AN23
AJ31
E9
C9
A9
CPU1A
SDATA0
SDATA1
SDATA2
SDATA3
SDATA4
SDATA5
SDATA6
SDATA7
SDATA8
SDATA9
SDATA10
SDATA11
SDATA12
SDATA13
SDATA14
SDATA15
SDATA16
SDATA17
SDATA18
SDATA19
SDATA20
SDATA21
SDATA22
SDATA23
SDATA24
SDATA25
SDATA26
SDATA27
SDATA28
SDATA29
SDATA30
SDATA31
SDATA32
SDATA33
SDATA34
SDATA35
SDATA36
SDATA37
SDATA38
SDATA39
SDATA40
SDATA41
SDATA42
SDATA43
SDATA44
SDATA45
SDATA46
SDATA47
SDATA48
SDATA49
SDATA50
SDATA51
SDATA52
SDATA53
SDATA54
SDATA55
SDATA56
SDATA57
SDATA58
SDATA59
SDATA60
SDATA61
SDATA62
SDATA63
SDATAINCLK0
SDATAINCLK1
SDATAINCLK2
SDATAINCLK3
SDATAINVAL
SDATAOUTCLK0
SDATAOUTCLK1
SDATAOUTCLK2
SDATAOUTCLK3
SDTATOUTVAL
SADDIN0
SADDIN1
SADDIN2
SADDIN3
SADDIN4
SADDIN5
SADDIN6
SADDIN7
SADDIN8
SADDIN9
SADDIN10
SADDIN11
SADDIN12
SADDIN13
SADDIN14
SADDINCLK
CLKFWDRST
CONNECT
PROCRDY
SFILLVAL
PGA-D462
5
SDATA#0
SDATA#1
SDATA#2
SDATA#3
SDATA#4
SDATA#5
SDATA#6
SDATA#7
SDATA#8
SDATA#9
SDATA#10
SDATA#11
SDATA#12
SDATA#13
SDATA#14
SDATA#15
SDATA#16
SDATA#17
SDATA#18
SDATA#19
SDATA#20
SDATA#21
SDATA#22
SDATA#23
SDATA#24
SDATA#25
SDATA#26
SDATA#27
SDATA#28
SDATA#29
SDATA#30
SDATA#31
SDATA#32
SDATA#33
SDATA#34
SDATA#35
SDATA#36
SDATA#37
SDATA#38
SDATA#39
SDATA#40
SDATA#41
SDATA#42
SDATA#43
SDATA#44
SDATA#45
SDATA#46
SDATA#47
SDATA#48
SDATA#49
SDATA#50
SDATA#51
SDATA#52
SDATA#53
SDATA#54
SDATA#55
SDATA#56
SDATA#57
SDATA#58
SDATA#59
SDATA#60
SDATA#61
SDATA#62
SDATA#63
SDINCLK#0
SDINCLK#1
SDINCLK#2
SDINCLK#3
SDIVAL#
SDOCLK#0
SDOCLK#1
SDOCLK#2
SDOCLK#3
SDOVAL#
SADI#0
SADI#1
SADI#2
SADI#3
SADI#4
SADI#5
SADI#6
SADI#7
SADI#8
SADI#9
SADI#10
SADI#11
SADI#12
SADI#13
SADI#14
SDINCLK#
CFWDRST
CONNECT
PROCRDY
SFILLVAL#
SDATA#[0..63](7)
D D
C C
B B
SDOCLK#[0..3](7)
SADI#[2..14](7)
A A
SDIVAL#(7)
CFWDRST(7)
CONNECT(7)
PROCRDY(7)
4
A20M
FERR
INIT
INTR
IGNNE
NMI
RESET
SMI
STPCLK
PWROK
PICCLK
PICD0/BYPASSCLK
PICD1/BYPASSCLK
COREFB-
COREFB+
CLKIN
CLKIN
RSTCLK
RSTCLK
K7CLKOUT
K7CLKOUT
ANALOG
SYSVREFMODE
VREF_SYS
PLLBYPASS
PLLBYPASSCLK
PLLBYPASSCLK
PLLMON1
PLLMON2
PLLTEST
SCANCLK1
SCANCLK2
SCANINTEVAL
SCANSHIFTEN
DBRDY
DBREQ
FLUSH
TCK
TDO
TMS
TRST
VID0
VID1
VID2
VID3
VID4
FID0
FID1
FID2
FID3
SCHECK0
SCHECK1
SCHECK2
SCHECK3
SCHECK4
SCHECK5
SCHECK6
SCHECK7
SADDOUT0
SADDOUT1
SADDOUT2
SADDOUT3
SADDOUT4
SADDOUT5
SADDOUT6
SADDOUT7
SADDOUT8
SADDOUT9
SADDOUT10
SADDOUT11
SADDOUT12
SADDOUT13
SADDOUT14
SADDOUTCLK
4
3
SADDINCLK#
SDATAINCLK#0
X_33p
3
CPURST# (7)
C37
SDATAINCLK#1
SDATAINCLK#2
SDATAINCLK#3
APICD0(12)
APICD1(12)
SDINCLK#
SDINCLK#0
SDINCLK#1
SDINCLK#2
SDINCLK#3
A20M#
AE1
FERR
AG1
HINIT#
AJ3
INTR
AL1
IGNNE#
AJ1
NMI
AN3
CPURST#
AG3
SMI#
AN5
STPCLK#
AC1
CPU_PWOK
AE3
APICCLK0
N1
APICD0
N3
APICD1
N5
COREFB-
AG13
COREFB+
AG11
SYSCLK
AN17
SYSCLK#
AL17
AN19
AL19
K7CLKOUT
AL21
K7CLKOUT#
AN21
AJ13
VREFMODE
AA5
VREF_SYS
W5
ZN
AC5
ZN
ZP
TDI
AE5
AJ25
AN15
AL15
AN13
AL13
AC3
S1
S5
S3
Q5
AA1
AA3
AL3
Q1
U1
U5
Q3
U3
L1
L3
L5
L7
J7
W1
W3
Y1
Y3
U37
Y33
L35
E33
E25
A31
C13
A19
J1
J3
C7
A7
E5
A5
E7
C1
C5
C3
G1
E1
A3
G5
G3
E3
ZP
PLLBP#
PLLBYCLK
PLLBYCLK#
PLLMON1
PLLMON2
PLLTEST#
SCANCLK1
SCANCLK2
SINTVAL
SSHIFTEN
DBREQ#
FLUSH#
TCK
TDI
TMS
TRST#
VID0
VID1
VID2
VID3
VID4
FID0
FID1
FID2
FID3
SADO#2
SADO#3
SADO#4
SADO#5
SADO#6
SADO#7
SADO#8
SADO#9
SADO#10
SADO#11
SADO#12
SADO#13
SADO#14
SADOCLK#
A20M# (6,12)
HINIT# (6,12)
INTR (6,12)
IGNNE# (6,12)
NMI (6,12)
SMI# (6,12)
STPCLK# (6,12)
CPU_PWOK (33)
APICCLK0 (3)
APICD0 (12)
APICD1 (12)
COREFB- (32)
COREFB+ (32)
PLLBP# (6)
PLLBYCLK (6)
PLLBYCLK# (6)
PLLMON1 (6)
PLLMON2 (6)
PLLTEST# (6)
SCANCLK1 (6)
SCANCLK2 (6)
SINTVAL (6)
SSHIFTEN (6)
DBREQ# (6)
FLUSH# (6)
TCK (6)
TDI (6)
TMS (6)
TRST# (6)
VID[0..4] (32)
FID[0..3] (9)
SADO#[2..14] (7)
SADOCLK# (7)
SADDINCLK# (7)
SDATAINCLK#[0..3] (7)
CPU_PWOK
12
C36
68p
CPURST#
R24 680
SADI#0
R85 680
SADI#1
R88 680
SFILLVAL#
R87 270
SDOVAL#
R89 270
VREFMODE
R21 270
CPU APIC BLOCK
L21
10nH
L16
L15
10nH
L18
10nH
L14
10nH
APICD0
APICD1
10nH
R27 330
R26 330
L28
10nH
C164
5p
L22
10nH
C156
5p
L20
10nH
C155
5p
L17
10nH
C157
5p
L19
10nH
C159
5p
2
V_CORE
VCC2_5
SADDINCLK#
SDATAINCLK#0
SDATAINCLK#1
SDATAINCLK#2
SDATAINCLK#3
2
VCC3
1
R47
510
FERR# (12)
C
Q12
2N3904
E
CPU FERR BLOCK
V_CORE
R41
680
FERR
B
CPU SYSCLK BLOCK
V_CORE
SYSCLK
SYSCLK#
CPUCLK(3)
C91 680p
C92 680p
CPUCLK#(3)
R61 60.4_1%
R64
301_1%
R62 60.4_1%
Near socket-A
CPU SYSCLK REFERNCE BLOCK
V_CORE
R14
C34
0.1u
60.4_1%
R16
60.4_1%
0.5 * VCORE
VREF_SYS
C27
103p
C35
473p
CPU ZN / ZP BLOCK
ZN
R20 40.2_1%
ZP
R19 56.2 1%
match the transmission line
Push-pull compensation circuit
V_CORE
*100:FOR S2K PMOS DRIVING
CPU K7CLKOUT BLOCK
K7CLKOUT#
K7CLKOUT
* Trace lengths of CLKOUT and -CLKOUT
are between 2" and 3"
MICRO-STAR INT'L CO.,LTD.
Title
SOCKET A SIGNALS
Size Document Number Rev
MS-6717 0B
Custom
Date: Sheet
RN33
1 2
3 4
5 6
7 8
100_8P4R
V_CORE
of
536Wednesday, November 06, 2002
1
5
4
3
2
1
B12B8B4
VCC_CORE98
VCCA_PLL
0~100 mA
2.25~2.75V
AC7
VCC_Z
NC1
NC2
NC3
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC15
NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24
NC25
NC27
NC28
NC29
NC30
NC31
NC32
NC33
NC34
NC35
NC36
NC37
NC42
NC43
NC44
NC45
BP0_CUT
BP1_CUT
BP2_CUT
BP3_CUT
CPU1B
AJ23
VCC_A
AA31
AC31
AE31
AG23
AG25
AG31
AG5
AJ11
AJ15
AJ17
AJ19
AJ27
AL11
AN11
AN9
G11
G13
G27
G29
G31
J31
J5
L31
N31
Q31
S31
S7
U31
U7
W31
W7
Y31
Y5
AG19
G21
AG21
G19
AN27
AL27
AN25
AL25
AJ5
VCC_CORE99
VCC_CORE100
VCC_CORE101
AMD 462PGA Socket -
V_CORE
Power
H12
H16
H20
H24M8P30R8T30V8X30Z8AB30
D D
VCC_CORE1
VCC_CORE2
VCC_CORE3
VCC_CORE4
VCC_CORE5
VCC_SRAM1
VCC_SRAM2
VCC_SRAM3
VCC_SRAM4
VCC_SRAM5
VCC_SRAM6
VCC_SRAM7
VCC_SRAM8
VCC_SRAM9
VCC_SRAM11
VCC_SRAM13
VCC_SRAM14
VCC_SRAM16
VCC_SRAM17
VCC_SRAM19
VCC_SRAM20
VCC_SRAM21
VCC_SRAM22
VCC_SRAM23
VCC_SRAM24
VCC_SRAM25
VCC_SRAM26
VCC_SRAM27
VCC_SRAM28
VCC_SRAM29
VCC_SRAM30
VCC_SRAM31
KEY4
KEY6
KEY8
KEY10
KEY12
KEY14
KEY16
KEY18
VCC_CORE6
AD30
AD8
AF10
AF28
AF30
AF32
AF6
AF8
AH30
AH8
AJ9
AK8
AL9
AM8
F30
F8
H10
H28
H30
H32
H6
H8
C C
K30
AJ7
AL7
AN7
G25
G17
AG7
AG15
AG29
K8
G9
N7
Y7
VCC_CORE7
VCC_CORE8
VCC_CORE9
VCC_CORE10
AF14
AF18
AF22
AF26
AM34
AK36
AK34
AK30
AK26
AK22
AK18
AK14
AK10
AL5
AH26
AM30
AH22
AH18
AH14
AH10
AH4
AH2
AF36
AF34
AD6
AM26
AD4
AD2
AB36
AB34
AB32Z6Z4Z2X36
X34
AM22
X32V6V4V2T36
T34
T32R6R4R2AM18
P36
P34
P32M4M6M2K36
K34
K32H4H2
AM14
F36
F34
F32
F28
F24
F20
F16
F12
D32
D28
AM10
D24
D20
D16
D12D8D4D2B36
B32
AM2
B28
B24
B20
B16
VCC_CORE11
VCC_CORE12
VCC_CORE13
VCC_CORE14
VCC_CORE15
VCC_CORE16
VCC_CORE17
VCC_CORE18
VCC_CORE19
VCC_CORE20
VCC_CORE21
VCC_CORE22
VCC_CORE23
VCC_CORE24
VCC_CORE25
VCC_CORE26
VCC_CORE27
VCC_CORE28
VCC_CORE29
VCC_CORE30
VCC_CORE31
VCC_CORE32
VCC_CORE33
VCC_CORE34
VCC_CORE35
VCC_CORE36
VCC_CORE37
VCC_CORE38
VCC_CORE39
VCC_CORE40
VCC_CORE41
VCC_CORE42
VCC_CORE43
VCC_CORE44
VCC_CORE45
VCC_CORE46
VCC_CORE47
VCC_CORE48
VCC_CORE49
VCC_CORE50
VCC_CORE51
VCC_CORE52
VCC_CORE53
VCC_CORE54
VCC_CORE55
VCC_CORE56
VCC_CORE57
VCC_CORE58
VCC_CORE59
VCC_CORE60
VCC_CORE61
VCC_CORE62
VCC_CORE63
VCC_CORE64
VCC_CORE65
VCC_CORE66
VCC_CORE67
VCC_CORE68
VCC_CORE69
VCC_CORE70
VCC_CORE71
VCC_CORE72
VCC_CORE73
VCC_CORE74
VCC_CORE75
VCC_CORE76
VCC_CORE77
VCC_CORE78
VCC_CORE79
VCC_CORE80
VCC_CORE81
VCC_CORE82
VCC_CORE83
VCC_CORE84
VCC_CORE85
VCC_CORE86
VCC_CORE87
VCC_CORE88
VCC_CORE89
VCC_CORE90
VCC_CORE91
VCC_CORE92
VCC_CORE93
VCC_CORE94
VCC_CORE95
VCC_CORE96
VCC_CORE97
VCCA_PLL
C102 X_1u_0805
R18 X_0
*100:NO STUFF
VTIN3 (29)
VTIN2 (28,29)
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS_Z
H14
H18
H22
H26
M30P8R30T8V30X8Z30
B B
CPU DECOUPLING CAPACITORS
V_CORE
A A
V_CORE
C129 224P
C83 224P C130 39P
C127 224P
C132 224P
C131 X_224P
C76 224P
C74 X_224P
C71 224P
C104 224P
C73 224P
C97 224P
C146 224P
C75 224P
C79 224P
V_CORE
C100 224P
C72 224P
C125 224P
5
AB8
V_CORE
AF12
AF16
AF20
C133 33p
C105 33p
C77 33p
C69 33p
AF24
AM36
AK32
AK28
AK24
AK20
AK16
AK12
AK4
AK2
AH36
AM32
AH34
AH32
AH28
AH24
AH20
AH16
DECOUPLING CAPACITOR
,Place on Inside socket.
V_CORE V_CORE
C134 33p
C113 X_33p
C93 33p
C90 X_33p
C126 33p
C68 33p
V_CORE
C116 106P/1206
C117 106P/1206
C109 X_106P/1206
C89 106P/1206
C84 106P/1206
C88 106P/1206
C85 X_106P/1206
C110 106P/1206
4
AH12
AF4
AF2
AD36
AD34
AD32
AB6
AB4
AB2
Z36
Z34
Z32X6AM28X4X2
C128 39P
C114 39P
C112 39P
C98 39P
C81 39P
C87 39P
V36
V34
V32T6T4T2R36
R34
place on
solder side
inside socket
V_CORE
C431 X_224P
C425 X_224P
C70 X_33p
C78 X_224P
C118 X_39P
C428 X_224P
C434 X_224P
C432 X_33p
C429 X_33p
C427 X_33p
C426 X_33p
C433 X_33p
C430 X_33p
AM24
R32P6P4P2M36
M34
M32K6K4K2AM20
H36
H34
F26
F22
F18
F14
F10F6F4F2AM16
D36
D34
D30
D26
D22
D18
D14
D10D6B34
AM12
B30
B26
B22
B18
B14
B10B6B2
AM4
AK6
AM6
AE7
PGA-D462
**All CPU interface are
2.5V tolerant**
CPU PULL-UP / DOWN BLOCK
PLLTEST#(5)
V_CORE
IGNNE#
IGNNE#(5,12)
A20M#
A20M#(5,12)
STPCLK#(5,12)
PLLMON1(5)
PLLMON2(5)
PLLBYCLK(5)
PLLBYCLK#(5)
3
STPCLK#
HINIT#
HINIT#(5,12)
SMI#
SMI#(5,12)
INTR
INTR(5,12)
NMI
NMI(5,12)
FLUSH#
FLUSH#(5)
PLLBP#
PLLBP#(5)
PLLMON1
PLLMON2
PLLBYCLK
PLLBYCLK#
RN76
1 2
3 4
5 6
7 8
680_8P4R
RN77
1 2
3 4
5 6
7 8
680_8P4R
R45 680
R82 680
R63 56
R60 56
RN30
1 2
3 4
5 6
7 8
100_8P4R
2
DBREQ#(5)
SCANCLK1(5)
SCANCLK2(5)
MICRO-STAR INT'L CO.,LTD.
Title
SOCKET A POWER
Size Document Number Rev
MS-6717 0B
Custom
Date: Sheet
PLLTEST#
DBREQ#
TCK
TCK(5)
TMS
TMS(5)
TDI
TDI(5)
TRST#
TRST#(5)
SINTVAL
SINTVAL(5)
SCANCLK1
SCANCLK2
SSHIFTEN(5)
SSHIFTEN
RN9
1 2
3 4
5 6
7 8
510_8P4R
RN8
1 2
3 4
5 6
7 8
510_8P4R
1 2
3 4
5 6
7 8
1
RN7
270_8P4R
636Thursday, November 07, 2002
V_CORE
of
A
VCC3
C165
CP6
1uF
X_COPPER
VCC3
SDATAINCLK#[0..3](5)
SDOCLK#[0..3](5)
V_CORE
C191
1uF
R112
60.4_1%
SADI#[2..14](5)
746CCLK
CP19
X_COPPER
SADDINCLK#(5)
SADOCLK#(5)
Put near 746
chip
D D
C C
B B
SADO#[2..14](5)
Place near the 746 chip.
V_CORE
R131
30_1%
R137
30_1%
746CCLK(3)
SDIVAL#(5)
CPURST#(5)
PROCRDY(5)
CONNECT(5)
CFWDRST(5)
CPUCLKAVDD
C166
0.01uF
CPUCLKAVSS
C193
0.01uF
S2KCOMPND
S2KCOMPPD
V_CORE
CPUPHYAVDD
CPUPHYAVSS
VDDREFA
VSSREFA
VDDREFB
VSSREFB
HSTLVREFA
HSTLVREFB
746CCLK
SDIVAL#
CPURST#
PROCRDY
CONNECT
CLKFWDRST
SADDINCLK#
SADOCLK#
SDATAINCLK#0
SDATAINCLK#1
SDATAINCLK#2
SDATAINCLK#3
SDOCLK#0
SDOCLK#1
SDOCLK#2
SDOCLK#3
SADI#2
SADI#3
SADI#4
SADI#5
SADI#6
SADI#7
SADI#8
SADI#9
SADI#10
SADI#11
SADI#12
SADI#13
SADI#14
SADO#2
SADO#3
SADO#4
SADO#5
SADO#6
SADO#7
SADO#8
SADO#9
SADO#10
SADO#11
SADO#12
SADO#13
SADO#14
CPUCLKAVDD
CPUCLKAVSS
CPUPHYAVDD
CPUPHYAVSS
R110
100_1%
8
Place near the 740 chip.
15 mils trace width
R109
CP11
100_1%
X_COPPER
8
C174
0.01uF
C175
0.01uF
7
M27
M29
A23
C23
L29
B23
W29
E20
D18
D19
C19
F18
A22
U29
A26
E27
K29
P29
A24
G28
H29
R28
F21
D21
B21
E22
F20
D22
C20
C21
D20
C22
A20
A21
F19
U24
T27
W24
U25
U27
W26
U28
V25
W27
V27
U26
Y25
V29
Y26
Y27
B19
A19
HSTLVREFA
7
SDATA#[0..63]
S2KCOMPND
E18
VDDREFA
VSSREFA
S2KCOMPND
VDDREFB
VSSREFB
HSTLVREFA
HSTLVREFB
CPUCLK
SDATAINVAL#
CPURST#
PROCRDY
CONNECT
CLKFWDRST
SADDINCLK#
SADDOUTCLK#
SDATAINCLK#0
SDATAINCLK#1
SDATAINCLK#2
SDATAINCLK#3
SDATAOUTCLK#0
SDATAOUTCLK#1
SDATAOUTCLK#2
SDATAOUTCLK#3
SADDIN#2
SADDIN#3
SADDIN#4
SADDIN#5
SADDIN#6
SADDIN#7
SADDIN#8
SADDIN#9
SADDIN#10
SADDIN#11
SADDIN#12
SADDIN#13
SADDIN#14
SADDOUT#2
SADDOUT#3
SADDOUT#4
SADDOUT#5
SADDOUT#6
SADDOUT#7
SADDOUT#8
SADDOUT#9
SADDOUT#10
SADDOUT#11
SADDOUT#12
SADDOUT#13
SADDOUT#14
CPUAVDD
CPUAVSS
CPUPHYAVDD
CPUPHYAVSS
U8A
746
V_CORE
R124
100_1%
R125
100_1%
SDATA#[0..63](5)
SDATA#2
SDATA#0
SDATA#1
S2KCOMPPD
C25
F24
E24
D17
SDATA#0
SDATA#1
S2KCOMPPD
HOST
C188
0.01uF
HSTLVREFB
(15 mil trace)
C186
0.01uF
CP16
X_COPPER
SDATA#5
SDATA#4
SDATA#3
D25
C26
SDATA#2
SDATA#3
SDATA#4
6
SDATA#6
SDATA#7
F23
A27
C27
SDATA#5
SDATA#6
6
SDATA#[0..63]
SDATA#10
SDATA#11
SDATA#8
SDATA#9
A25
D23
F22
C24
SDATA#7
SDATA#8
SDATA#9
SDATA#10
SDATA#13
SDATA#12
SDATA#14
D26
B25
D24
SDATA#11
SDATA#12
SDATA#13
VCC1_8
SDATA#16
SDATA#15
SDATA#17
B27
F26
E26
SDATA#14
SDATA#15
SDATA#16
SDATA#17
SBA7
SBA6
SBA5
E11
F12
C11
SBA6
SBA7
SBA5
C183
1uF
5
SDATA#18
SDATA#20
SDATA#19
D27
D29
E28
SDATA#18
SDATA#19
SDATA#20
SDATA#22
SDATA#21
SDATA#23
E29
F29
F27
SDATA#21
SDATA#22
SDATA#23
SDATA#25
SDATA#26
G24
F25
C29
SDATA#24
SDATA#25
SDATA#28
SDATA#27
SDATA#29
C28
G26
H25
SDATA#26
SDATA#27
SDATA#28
SDATA#29
SDATA#30
SDATA#31
SDATA#32
G29
G27
SDATA#30
SDATA#31
SDATA#24
746-1
SBA4
SBA3
SBA2
SBA1
SBA0
ST0
ST1
ST2
AAD0
AAD1
AAD2
AAD3
A10
C12
D12
E13
F14
F15
A14
E14H2J6G1H4J4G3F3G4E2E4D2G6F5D3C1D4D7B5E7F8A6C6E8F9C8D9
ST2
AAD3
AAD0
AAD2
AAD1
SBA2
SBA4
SBA3
X_COPPER
CP15
X_COPPER
CP14
SBA1
SBA0
ST0
ST1
C185
0.01uF
5
AAD4
SBA[0..7] (18)
VDDREFB
VSSREFB
SDATA#34
SDATA#33
J25
K25
L24
SDATA#32
SDATA#33
SDATA#34
AAD4
AAD5
AAD6
AAD5
AAD6
SDATA#37
SDATA#36
SDATA#38
SDATA#35
K27
M26
L28
L25
SDATA#35
SDATA#36
SDATA#37
AAD7
AAD8
AAD9
AAD10
AAD9
AAD7
AAD8
ST[0..2] (18)
SDATA#41
SDATA#39
SDATA#40
L27
J24
J26
SDATA#38
SDATA#39
SDATA#40
AAD10
AAD11
AAD12
AAD11
AAD12
AAD13
SDATA#42
SDATA#43
SDATA#44
H27
J27
J29
SDATA#41
SDATA#42
SDATA#43
SDATA#44
AAD13
AAD14
AAD15
AAD16
AAD14
AAD15
AAD16
VCC1_8
1uF
4
SDATA#47
SDATA#46
SDATA#45
SDATA#48
J28
M24
L26
SDATA#45
SDATA#46
SDATA#47
AAD17
AAD18
AAD19
AAD17
AAD20
AAD19
AAD18
C163
4
N26
SDATA#48
AAD20
CP13
X_COPPER
CP12
X_COPPER
SDATA#52
SDATA#49
SDATA#54
SDATA#53
SDATA#50
SDATA#56
SDATA#55
SDATA#51
R25
R26
P27
T26
R27
T24
T29
N27
SDATA#49
SDATA#50
SDATA#51
SDATA#52
SDATA#53
SDATA#54
SDATA#55
SDATA#56
GC_DET#/AGP8XDET#
AGP
AAD21
AAD22
AAD23
AAD24
AAD25
AAD26
AAD27
AAD28
E10C9F11A9B10
AAD23
AAD26
AAD24
AAD25
AAD22
AAD21
AAD27
AAD28
VDDREFA
C177
0.01uF
VSSREFA
SDATA#59
SDATA#57
SDATA#58
N24
N25
N28
SDATA#57
SDATA#58
SDATA#59
AAD29
AAD30
AAD31
D10
AAD30
AAD29
AAD31
SDATA#62
SDATA#60
SDATA#61
SDATA#63
P25
R29
N29
R24
SDATA#60
SDATA#61
SDATA#62
SDATA#63
AC/BE3#
AC/BE2#
AC/BE1#
AC/BE0#
AREQ#
AGNT#
AFRAME#
AIRDY#
ATRDY#
ADEVSEL#
ASERR#
ASTOP#
APAR#
RBF#
WBF#
PIPE#/DBI_HI
DBI_LO
SB_STBF
SB_STBS
AD_STBF0
AD_STBS0
AD_STBF1
AD_STBS1
AGPCLK
AGPRCOMP
AGPRCOMN
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
AGPVREF
AGPVSSREF
AAD[0..31] (18)
3
ACBE#3
B7
ACBE#2
C5
ACBE#1
C3
ACBE#0
H5
AREQ#
D15
AGNT#
E16
AFRAME#
F6
AIRDY#
A4
ATRDY#
E5
ADEVSEL#
D6
ASERR#
B4
ASTOP#
A3
APAR
B2
RBF#
C14
WBF#
B13
GCDET#
C15
DBI_HI
A13
DBI_LOW
D13
SBSTB
A12
SBSTB#
B11
ADSTB0
E1
ADSTB#0
F2
ADSTB1
B8
ADSTB#1
A7
AGPCLK0
C16
AGPRCOMP
J3
AGPRCOMN
J1
A1XAVDD
A16
A1XAVSS
B16
A4XAVDD
B15
A4XAVSS
A15
VREF4X_IN
H1
J2
MICRO-STAR INT'L CO.,LTD.
Title
746-1
Size Document Number Rev
MS-6717 0B
Custom
Date: Sheet
3
2
AGPRCOMN
AGPRCOMP
AREQ# (18)
AGNT# (18)
AFRAME# (18)
AIRDY# (18)
ATRDY# (18)
ADEVSEL# (18)
ASERR# (18)
ASTOP# (18)
APAR (18)
RBF# (18)
WBF# (18)
GCDET# (18)
DBI_HI (18)
DBI_LOW (18)
SBSTB (18)
SBSTB# (18)
ADSTB0 (18)
ADSTB#0 (18)
ADSTB1 (18)
ADSTB#1 (18)
AGPCLK0 (3)
VREF4X_IN (18)
A1XAVDD
C220
0.1uF
A1XAVSS
A4XAVDD
C228
0.1uF
A4XAVSS
2
AGP3.0 = 50 ohm
ACBE#[0..3] (18)
L34
X_80-0805
X_COPPER
L35
R185
49.9_1%
R187
49.9_1%
CP23
X_COPPER
CP21
X_COPPER
CP24
X_80-0805
CP25
X_COPPER
VDDQ
VCC3
C231
10uF_1206
C218
10uF_1206
of
736Wednesday, November 06, 2002
1
VCC3
1
A
8
A
RN4 10
RMD3
RMD1
RMD5
RMD7
D D
C C
B B
RMD0
RMD2
RDQM0
RDQS0
RMD12
RMD8
RMD4
RMD6
RDQM1
RDQS1
RMD13
RMD10
RMD15
RMD14
RMD9
RMD11
RMD16
RMD17
RMD20
RMD22
RMD27
RMD30
RMD26
RMD31
RDQM3
RDQS3
RMD25
RMD28
RMD32
RMD36
RMD33
RMD37
RMD45
RMD42
RMD39
RMD34
RMD35
RMD38
RDQS4
RDQM4
RMD40
RMD44
RMD47
RMD43
RMD54
RMD52
RMD48
RMD55
RMD51
RMD53
RDQM6
RDQS6
RMD59
RMD61
RMD50
RMD49
RDQM7
RDQS7
RMD57
RMD60
RMD56
RMD62
RMD63
RMD58
RMD21
RMD18
RDQM2
RDQS2
RMD24
RMD29
RMD23
RMD19
RDQM5
RDQS5
RMD46
RMD41
1 2
3 4
5 6
7 8
RN5 10
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN10 10
1 2
3 4
5 6
7 8
RN12 10
1 2
3 4
5 6
7 8
RN14 10
1 2
3 4
5 6
7 8
RN16 10
1 2
3 4
5 6
7 8
RN34 10
1 2
3 4
5 6
7 8
RN31 10
1 2
3 4
5 6
7 8
RN46 10
1 2
3 4
5 6
7 8
RN50 10
1 2
3 4
5 6
7 8
RN48 10
1 2
3 4
5 6
7 8
RN58 10
1 2
3 4
5 6
7 8
RN60 10
1 2
3 4
5 6
7 8
RN62 10
1 2
3 4
5 6
7 8
RN65 10
1 2
3 4
5 6
7 8
RN67 10
1 2
3 4
5 6
7 8
RN69 10
1 2
3 4
5 6
7 8
RN20 10
1 2
3 4
5 6
7 8
RN25 10
1 2
3 4
5 6
7 8
RN56 10
VCC_M VCC_M
7
RMD[0..63] MA[0..14]
RDQM[0..7]
RDQS[0..7] CS#[0..5]
MD3
MD1
MD5
MD7
MD0
MD2
DQM0
DQS0
MD12
MD8
MD4
MD6
DQM1
DQS1
MD13
MD10
MD15
MD14
MD9
MD11
MD16
MD17
MD20
MD22
MD27
MD30
MD26
MD31
DQM3
DQS3
MD25
MD28
MD32
MD36
MD33
MD37
MD45
MD42
MD39
MD34
MD35
MD38
DQS4
DQM4
MD40
MD44
MD47
MD43
MD54
MD52
MD48
MD55
MD51
MD53
DQM6
DQS6
MD59
MD61
MD50
MD49
DQM7
DQS7
MD57
MD60
MD56
MD62
MD63
MD58
MD21
MD18
DQM2
DQS2
MD24
MD29
MD23
MD19
DQM5
DQS5
MD46
MD41
RMD[0..63] (15,16,17)
RDQM[0..7] (15,16,17)
RDQS[0..7] (15,16,17)
6
AD25
AH28
AD24
AH26
AF27
AG25
AF26
AG27
AJ26
AJ27
AE25
AE23
AG24
AH23
AF24
AH25
AE22
AD21
AD22
AJ24
AH22
AG22
AF20
AH20
AE20
AF21
AE19
AJ20
AG21
AJ21
AE16
AH17
AF15
AJ15
AF17
AD16
AG15
AH16
AG16
AJ17
AJ12
AF12
AG10
AF11
AG12
AD12
AE11
AH10
AH11
AJ11
AF6
AE7
AH4
AH7
AG7
AG6
AF5
AJ5
AH5
AD7
AE5
AE4
AF2
AG4
AF3
AG3
AD6
AH2
AG1
AC2
AE1
AB3
AD3
AE2
AC6
AD5
AC4
AB5
AD1
AJ6
U8B
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM0
CSB#0/DQS0
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
DQM1
CSB#1/DQS1
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
DQM2
CSB#2/DQS2
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
CSB#3/DQS3
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
DQM4
CSB#4/DQS4
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5
CSB#5/DQS5
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
CSB#6/DQS6
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
CSB#7/DQS7
746
MD0 MA0
MD1 MA1
MD2 MA2
MD3
MD4
MD5 MA5
MD6 MA6
MD7 MA7
DQM0 MA8
DQS0 MA9
MD8 MA10
MD9 MA11
MD10 MA12
MD11 MA13
MD12 MA14
MD13
MD14
MD15
DQM1
DQS1
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
DQM2
DQS2
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
DQS3
MD32
MD33
MD34
MD35 CS#0
MD36 CS#1
MD37 CS#2
MD38 CS#3
MD39 CS#4
DQM4 CS#5
DQS4
MD40
MD41
MD42 DDRVREFA
MD43
MD44
MD45
MD46
MD47
DQM5
DQS5
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7
5
746-2
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MAA14
MAA15
RAMRWA#
SRASA#
SCASA#
Reserved
CS0#
CS1#
CS2#
CS3#
CS4#
CS5#
DDRVREFA
DDRVREFB
DLLAVDD
DLLAVSS
SDRCLKI
FWDSDCLKO
DDRAVDD
DDRAVSS
CKE0
CKE1
CKE2
CKE3
CKE4
CKE5
S3AUXSW#
DDRCOMP
DDRCOMN
4
AE13
AJ14
AH14
AE14
AD15
AD18
AJ18
AF18
AG18
AH19
AF14
AE10
AD13
AG19
AD19
AF23
AF9
AG9
AJ9
AE17
AD9
AD10
AJ8
AE8
AF8
AH8
AJ23
AJ3
AA29
AA28
AG13
AH13
Y29
Y28
AA6
AB6
AA5
AA3
AB4
AA4
Y6
AB2
AB1
MA3
MA4
SWE#
SRAS#
SCAS#
S3AUXSW-
DDRCOMP
DDRCOMN
DDRVREFB
DLLAVDD
DLLAVSS
FWDSDCLKO
DDRAVDD
DDRAVSS
CKE0
CKE1
CKE2
CKE3
CKE4
CKE5
3
CKE0 (15)
CKE1 (15)
CKE2 (15)
CKE3 (15)
CKE4 (16)
CKE5 (16)
S3AUXSW# (33)
FWDSDCLKO
RMA[0..14] (15,16,17)
RCS#[0..5] (15,16,17)
SRAS#
SWE#
SCAS#
Put near 746 chip.
R157 10
2
RSRAS# (15,16,17)
RSWE# (15,16,17)
RSCAS# (15,16,17)
DDRCOMN
DDRCOMP
R169 40.2
R168 40.2
SDCLKO_DDR (4)
1
VCC_M
VP46
R111
CP17
X_COPPER
150_1%
R116
150_1%
25-mil clearance
or shielded by
VSS trace and
VDD trace
C184
X_0.1uF
DDRVREFA DDRVREFB
( 10-mil trace ) ( 10-mil trace )
25-mil clearance
or shielded by
VSS trace and
VDD trace
C187
0.1uF
8
CP7
X_COPPER
L25
X_80-0805
CP8
X_COPPER
VCC3
C168
10U_0805
3
MICRO-STAR INT'L CO.,LTD.
Title
746-2
Size Document Number Rev
MS-6717 0B
Custom
Date: Sheet
2
L26
C172
0.01uF
X_COPPER
5
CP9
X_COPPER
X_80-0805
CP10
VCC3
C167
10U_0805
DLLAVDD
DLLAVSS
C171
0.1uF
4
C176
0.01uF
R159
CP26
X_COPPER
150_1%
R161
150_1%
DDRAVDD
C178
0.1uF
DDRAVSS
6
C241
X_0.1uF
C244
0.1uF
7
10pF
C221
A
of
836Tuesday, November 12, 2002
1
8
A
7
6
5
4
3
2
1
The differences between
the traces of MuTIOL
Strobes and Data should
be smaller than 0.05"
ZSTB0(11)
ZSTB-0(11)
D D
C C
ZSTB1(11)
ZSTB-1(11)
ZUREQ(11)
ZDREQ(11)
The differences between
the traces of MuTIOL
Strobes and Data should
be smaller than 0.05"
ZSTB0
ZSTB-0
ZSTB1
ZSTB-1 TRAP0
Z1XAVDD TRAP3
Z1XAVSS
Z4XAVDD
Z4XAVSS
ZCMP_N DRAM_SEL
ZCMP_P
ZVREF
ZUREQ
ZDREQ
ZCLK0
ZCLK0(3)
ZAD[0..16](11)
B B
W1
U1
V2
P2
R1
Y2
Y1
AA1
AA2
W2
W4
W3
W6
V3
ZAD[0..16]
U8C
746
ZCLK
ZSTB0
ZSTB0#
ZSTB1
ZSTB1#
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
ZCMP_N
ZCMP_P
ZVREF
ZUREQ
ZDREQ
746-3
MuTIOL
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
V4T2U5T5U3T4R3T6P6P1R5P4N2N5N3N6V6
ZAD6
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD7
ZAD8
ZAD9
ZAD11
ZAD10
ZAD13
ZAD12
ZAD14
ZAD15
TRAP0
TRAP1
TRAP2
TRAP3
ZAD15
ZAD16
ZAD16
TESTMODE0
TESTMODE1
TESTMODE2
TRAP0
TRAP1
TRAP2
TRAP3
TRAP4
ENTEST
DLLEN#
DRAM_SEL
PCIRST#
PWROK
AUXOK
B18
A18
F17
E17
C17
B17
A17
F16
D16
C18
Y4
W5
Y5
Y3
R130 X_4.7K
R133 X_4.7K
R138 X_4.7K
TRAP1
TRAP2
TRAP4
R129 X_4.7K
R134 X_4.7K
R181
PWROK
AUXOK
C268
X_10P
VCC3
123456
78
RN49
10K
VCC3
X_0
PWROK (12,32,33)
AUXOK (12,33)
C262
X_1uF
R94
R95
R84
R93 X_0
PCIRST0# (11)
DS
X_0
DS
X_0
DS
X_0
DS
VCC3
VCC3
VCC3SBY
Q15
G
YFET-NDS7002AS
Q16
G
YFET-NDS7002AS
Q14
G
YFET-NDS7002AS
Q17
G
YFET-NDS7002AS
VCC2_5
10K
R83
123456
VCC2_5
78
RN43
680
FID0 (5)
FID1 (5)
FID2 (5)
FID3 (5)
Place near 746 chip.
C243
VCC1_8
R160
150_1%
R162
49.9_1%
CP29
X_COPPER
R180 56
C255
0.1uF
C256
0.1uF
R183 56
4
ZCMP_N
*100:CHANGE VALUE-->0.1U
ZVREF
ZCMP_P
3
MICRO-STAR INT'L CO.,LTD.
Title
746-3
Size Document Number Rev
MS-6717 0B
Custom
Date: Sheet
2
of
936Wednesday, November 06, 2002
1
A
CP31
VCC3
X_COPPER
L39
C274
10uF_1206
X_80-0805
CP30
X_COPPER
8
Z4XAVDD Z1XAVDD
C263
0.1uF
Z4XAVSS
7
VCC3
C276
10uF_1206
L38
X_80-0805
CP32
X_COPPER
CP33
X_COPPER
C265
0.1uF
Z1XAVSS
6
10uF_1206
5
8
A
VDDQ
D D
C269 10uF_1206
C271
0.1uF
C272
0.1uF
VDDQ
VCC1_8
C C
V_CORE
B B
C450
0.01uF
8
VCC3
C270
1uF
VCC1_8SBY
VCC3SBY
C264
X_10uF_1206
7
U8D
H8
VDDQ
H9
VDDQ
J8
VDDQ
J9
VDDQ
K10
VDDQ
K11
VDDQ
K13
VDDQ
K14
VDDQ
L10
VDDQ
L11
VDDQ
L12
VDDQ
L13
VDDQ
L14
VDDQ
L15
VDDQ
M10
VDDQ
M11
VDDQ
N11
VDDQ
J10
IVDD
J11
IVDD
J13
IVDD
J14
IVDD
J15
IVDD
J17
IVDD
J19
IVDD
K9
IVDD
K12
IVDD
K15
IVDD
K16
IVDD
K18
IVDD
K20
IVDD
L9
IVDD
L20
IVDD
M9
IVDD
M20
IVDD
N9
IVDD
N10
IVDD
N21
IVDD
P9
IVDD
P21
IVDD
R9
IVDD
R21
IVDD
T21
IVDD
U21
IVDD
V9
IVDD
V20
IVDD
Y9
IVDD
Y12
IVDD
Y15
IVDD
Y18
IVDD
Y19
IVDD
AA10
IVDD
AA14
IVDD
AA15
IVDD
AA16
IVDD
AA20
IVDD
AB13
IVDD
AB17
IVDD
H21
S2KOVDD
H22
S2KOVDD
J20
S2KOVDD
J21
S2KOVDD
J22
S2KOVDD
K17
S2KOVDD
K19
S2KOVDD
L16
S2KOVDD
L17
S2KOVDD
L18
S2KOVDD
L19
S2KOVDD
M19
S2KOVDD
N19
S2KOVDD
N20
S2KOVDD
P19
S2KOVDD
P20
S2KOVDD
R19
S2KOVDD
R20
S2KOVDD
T19
S2KOVDD
T20
S2KOVDD
H16 M15
VDD3.3 VSSQ
J16
VDD3.3
T9
AUX1.8
U9
AUX3.3
746
746-4
Power(inside)
VSS
VSS
VSS
VSS
VSS
VSS
R17
R18
T17
T18
P17
P18
VDDZ
VDDZ
VDDZ
VDDZ
VDDZ
IVDD
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
VDDM
PVDDM
PVDDM
PVDDM
PVDDM
PVDDM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSS
VSS
VSS
VSS
VSS
VSS
N17
N18
M16
M17
M18
N16
7
T10
R11
R10
P11
P10
W20
T11
U10
U11
U19
U20
V10
V11
V19
W10
W11
W12
W13
W14
W15
W16
W17
W18
W19
Y10
Y13
Y14
Y16
Y17
Y20
AA8
AA9
AA21
AA22
AB8
AB9
AB21
AB22
W9
Y11
Y21
AA13
AA17
P12
P13
P14
P15
P16
R12
R13
R14
R15
R16
T12
T13
T14
T15
T16
U12
U13
U14
U15
U16
U17
U18
V12
V13
V14
V15
V16
V17
V18
M12
M13
M14
N12
N13
N14
N15
6
VCC1_8
6
VCC_M
VCC1_8
VCC_M
V_CORE
5
U8E
VDDQ
K1
VDDQ
K2
VDDQ
K3
VDDQ
K4
VDDQ
K5
VDDQ
K6
VDDQ
L1
VDDQ
L2
VDDQ
L3
VDDQ
L4
VDDQ
L5
VDDQ
L6
VDDQ
M1
VDDQ
M2
VDDQ
M3
VDDQ
M4
VDDQ
M5
VDDQ
M6
VDDQ
N1
VDDZ
P3
VDDZ
R2
VDDZ
T1
VDDZ
T3
VDDZ
U2
VDDZ
V1
VDDZ
Y24
VDDM
AA24
VDDM
AA25
VDDM
AA26
VDDM
AA27
VDDM
AB24
VDDM
AB25
VDDM
AB26
VDDM
AB27
VDDM
AB28
VDDM
AB29
VDDM
AC24
VDDM
AC25
VDDM
AC26
VDDM
AC27
VDDM
AC28
VDDM
AC29
VDDM
AD26
VDDM
AD27
VDDM
AD28
VDDM
AD29
VDDM
AE26
VDDM
AE27
VDDM
AE28
VDDM
AE29
VDDM
AF28
VDDM
AF29
VDDM
AG29
VDDM
VP70
B20
S2KOVDD
B22
S2KOVDD
B24
S2KOVDD
B26
S2KOVDD
B28
S2KOVDD
D28
S2KOVDD
F28
S2KOVDD
H28
S2KOVDD
K28
S2KOVDD
M28
S2KOVDD
P28
S2KOVDD
T28 AJ4
S2KOVDD VSSM
V28
S2KOVDD
W28
S2KOVDD
746
746-5
. Power
(outside)
VSS
VSS
VSS
VSS
E25
E19
E21
E23
5
VSS
G25
H24
N4P5R4R6U4U6V5
VSS
VSS
VSS
H26
K24
K26
VSSZ
VSS
M25
4
VSSZ
VSS
P24
4
VSSZ
VSS
P26
VSSZ
VSS
T25
VSSZ
VSS
V24
VSSZ
VSS
V26
VSSZ
VSS
W25
VSS
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
VSSM
A5
A8
A11
B3
B6
B9
B12
B14
C2
C4
C7
C10
C13
D1
D5
D8
D11
D14
E3
E6
E9
E12
E15
F1
F4
F7
F10
F13
G2
G5
H3
H6
J5
AC1
AC3
AC5
AD2
AD4
AD8
AD11
AD14
AD17
AD20
AD23
AE3
AE6
AE9
AE12
AE15
AE18
AE21
AE24
AF1
AF4
AF7
AF10
AF13
AF16
AF19
AF22
AF25
AG2
AG5
AG8
AG11
AG14
AG17
AG20
AG23
AG26
AG28
AH3
AH6
AH9
AH12
AH15
AH18
AH21
AH24
AH27
AJ7
AJ10
AJ13
AJ16
AJ19
AJ22
AJ25
3
VCC3
C436
0.1uF
VCC_M
C179
X_1uF
C210
1uF
C196
X_0.1uF
Place these capacitors under 746
solder side.
VDDQ
C448
C452
C449
VCC1_8
V_CORE
C437
C438 2200pF
MICRO-STAR INT'L CO.,LTD.
Title
746-4
Size Document Number Rev
MS-6717 0B
Custom
Date: Sheet
3
0.1uF
0.1uF
0.1uF
C443 0.1uF
C446
C451
C460
2200pF
C173
2
C160 X_10uF_1206
C212 10uF_1206
C161 X_10uF_1206
0.1uF
0.1uF
0.1uF
0.1uF
2
VCC1_8
C273 10uF_1206
C447
VCC_M
C445
C439
C441
C435
C440
C442
0.1uF
0.1uF
C444
10 36Thursday, November 07, 2002
1
0.1uF
0.1uF
0.1uF
2200pF
0.1uF
0.1uF
of
1
A
8
A
INTD#
INTB#
INTC#
INTA#
RN90
8.2KX4
D D
C C
PCIRST0#(9)
PCIRST#(33)
PCIRSTA#(18)
VCC3
12
34
56
78
PREQ#4(19,21)
PREQ#3(19,21)
PREQ#2(19,20)
PREQ#1(19,20)
PREQ#0(19)
PGNT#4(19,21)
PGNT#3(19,21)
PGNT#2(19,20)
PGNT#1(19,20)
PGNT#0(19)
C/BE#[0..3](19,20,21)
INTA#(18,19,20,21)
INTB#(18,19,20,21)
INTC#(19,20,21)
INTD#(19,20,21)
FRAME#(19,20,21)
IRDY#(19,20,21)
TRDY#(19,20,21)
STOP#(19,20,21)
SERR#(19,20,21)
PAR(19,20,21)
DEVSEL#(19,20,21)
PLOCK#(19,20,21)
96XPCLK(3)
PCIRST0# IDECS#B0
PCIRST#
PCIRSTA#
ZUREQ(9)
ZDREQ(9)
B B
Analog Power supplies of Transzip function for 963 Chip.
VCC3 VCC3
CP38
X_COPPER
L42
X_80-0805
JP3
SHORT
12
C295
1uF
8
7
AD[0..31](19,20,21)
PREQ#4
PREQ#3
PREQ#2
PREQ#1
PREQ#0
PGNT#4
PGNT#3
PGNT#2
PGNT#1
PGNT#0
C/BE#[0..3]
INTA#
INTB#
INTC# ICHRDYB
INTD# IDEREQB
FRAME# CBLIDB
IRDY#
TRDY# IDEIOR-B
STOP# IDEIOW-B
SERR#
PAR IDESAB2
DEVSEL# IDESAB1
PLOCK# IDESAB0
96XCLK IDECS#B1
R259 33
R252 33
R251 33
ZCLK1(3)
ZSTB0(9)
ZSTB-0(9)
ZSTB1(9)
ZSTB-1(9)
C296
0.01uF
C/BE#3
C/BE#2
C/BE#1
C/BE#0
ZCLK1 IDEDA4
ZSTB0 IDEDA6
ZSTB-0 IDEDA7
ZSTB1 IDEDA9
ZSTB-1 IDEDA10
ZUREQ IDEDA13
ZDREQ IDEDA14
VDDZCMP
SZCMP_N IDEDB1
SZCMP_P IDEDB3
VSSZCMP
SZ1XAVDD IDEDB7
SZ1XAVSS IDEDB8
SZ4XAVDD IDEDB10
SZ4XAVSS IDEDB11
SZVREF IDEDB13
ZAD[0..16](9)
SZ1XAVDD
SZ1XAVSS
ZAD[0..16]
M19
V20
N20
K20
N16
N17
R19
N18
R18
P18
U20
U19
R20
F1
F2
E1
H5
F3
H3
G1
G2
G3
H4
K3
M4
P1
R4
E3
F4
E2
G4
M3
M1
M2
N4
M5
N3
N1
N2
Y2
C3
J20
T20
T19
7
AD[0..31]
PREQ#4
PREQ#3
PREQ#2
PREQ#1
PREQ#0
PGNT#4
PGNT#3
PGNT#2
PGNT#1
PGNT#0
C/BE#3
C/BE#2
C/BE#1
C/BE#0
INT#A
INT#B
INT#C
INT#D
FRAME#
IRDY#
TRDY#
STOP#
SERR#
PAR
DEVSEL#
PLOCK#
PCICLK
PCIRST#
ZCLK
ZSTB0
ZSTB0#
ZSTB1
ZSTB1#
ZUREQ
ZDREQ
VDDZCMP
ZCMP_N
ZCMP_P
VSSZCMP
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
ZVREF
CP37
X_COPPER
L41
6
AD31 ZAD0
AD30 ZAD1
AD29 ZAD2
AD28 ZAD3
AD27 ZAD4
AD26 ZAD5
J5J4H2H1J3K4J2J1K5K2L3K1L1L4L5L2N5P2P3P4R2R3R1T1P5T2U1U2T3R5U3
AD31
AD30
AD29
AD28
AD27
AD26
PCI
963-1
MuTIOL
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
M18
N19
M17
M16
M20
L16
X_80-0805
JP2
SHORT
C289
C290
1uF
12
0.01uF
6
AD25 ZAD6
AD25
ZAD6
L20
AD24 ZAD7
AD24
ZAD7
L18
K18
AD23 ZAD8
AD22 ZAD9
AD21 ZAD10
AD23
AD22
AD21
ZAD8
ZAD9
ZAD10
K19
K17
SZ4XAVDD
SZ4XAVSS
AD20 ZAD11
AD20
ZAD11
K16
AD19 ZAD12
AD19
ZAD12
H20
J18
5
AD18 ZAD13
AD17 ZAD14
AD18
AD17
ZAD13
ZAD14
H19
5
AD16 ZAD15
AD16
ZAD15
H18
P20
AD15
AD14
AD15
ZAD16
ZAD16
AD14
AD13
AD13
AD12
AD12
AD11
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD9
AD8
AD7
AD6
AD5
AD10
IDE
VCC1_8
AD4
AD3
AD4
AD3
R198
150_1%
R199
49.9_1%
AD2
AD2
JP1
SHORT
AD1
AD1
AD0
V1
AD0
12
4
R205 56
C288
0.1uF
C287
0.1uF
R206 56
4
IDEAVDD
IDEAVSS
ICHRDYA
IDREQA
IIRQA
CBLIDA
IIOR#A
IIOW#A
IDACK#A
IDSAA2
IDSAA1
IDSAA0
IDECSA#1
IDECSA#0
ICHRDYB
IDREQB
IIRQB
CBLIDB
IIOR#B
IIOW#B
IDACK#B
IDSAB2
IDSAB1
IDSAB0
IDECSB#1
IDECSB#0
IDA0
IDA1
IDA2
IDA3
IDA4
IDA5
IDA6
IDA7
IDA8
IDA9
IDA10
IDA11
IDA12
IDA13
IDA14
IDA15
IDB0
IDB1
IDB2
IDB3
IDB4
IDB5
IDB6
IDB7
IDB8
IDB9
IDB10
IDB11
IDB12
IDB13
IDB14
IDB15
U10A
Y3
Y4
W10
V10
Y11
U12
V11
Y9
Y10
T11
U11
W11
T12
V12
W17
Y17
T16
U17
T14
W16
V16
Y18
T15
V17
U16
W18
U10
V9
W8
T9
Y7
V7
Y6
Y5
W6
U8
W7
V8
U9
Y8
T10
W9
Y16
V15
U14
W14
V13
T13
Y13
Y12
W12
W13
U13
Y14
V14
W15
Y15
U15
963_4
VDDZCMP
SZCMP_N
SZVREF
SZCMP_P
VSSZCMP
3
IDESAA2
IDESAA1
IDESAA0
IDECS#A1
IDECS#A0
IDEDA0
IDEDA1
IDEDA2
IDEDA3
IDEDA5
IDEDA8
IDEDA11
IDEDA12
IDEDA15
IDEDB0
IDEDB2
IDEDB4
IDEDB5
IDEDB6
IDEDB9
IDEDB12
IDEDB14
IDEDB15
3
C350
0.01uF
IDESAA[0..2]
IDECS#A[0..1]
IDESAB[0..2]
IDECS#B[0..1]
ZSTB0
ZSTB1
ZSTB-0
ZSTB-1
MICRO-STAR INT'L CO.,LTD.
Title
963-1
Size Document Number Rev
MS-6717 0B
Custom
Date: Sheet
2
VCC1_8
C349
1uF
ICHRDYA
IDEREQA
IDEIRQA
CBLIDA
IDEIOR-A
IDEIOW-A
IDACK-A
IDESAA[0..2] (23)
IDECS#A[0..1] (23)
IDEIRQB
IDACK-B
IDESAB[0..2] (23)
IDECS#B[0..1] (23)
Put near 963 Chip.
R195 X_0
R203 X_0
R196 X_0
R204 X_0
2
ICHRDYA (23)
IDEREQA (23)
IDEIRQA (23)
CBLIDA (23)
IDEIOR-A (23)
IDEIOW-A (23)
IDACK-A (23)
ICHRDYB (23)
IDEREQB (23)
IDEIRQB (23)
CBLIDB (23)
IDEIOR-B (23)
IDEIOW-B (23)
IDACK-B (23)
IDEDA[0..15] (23)
IDEDB[0..15] (23)
11 36Wednesday, November 06, 2002
1
VCC1_8
of
1
A
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