MSI MS-6589 Schematics

5

4

3

2

1

D D

MS-6589 uATX

Title Page

Cover Sheet 1
Block Diagram

AMD Clawhammer
Clock Synthesizer 7
AMD Lokar
System Memory
DDR Terminations

C C

AGP 8X SLOT 15
AMD Thor
PCI Connectors
AC'97 Codec
AUDIO PORT
Gigabit LAN
USB Port
IDE Connectors
LPC I/O & H/W mornitor
System ROM

B B

Dual Power & AGP Power
PWROK & USB PWR & ATX CONN.
Front Panel and FAN
Pull-up resistors
BULK / Decopuling
K8 Core Power
NEC USB 2.0 Controller
Menu Parts

2
3History
4,5,6

8,9,10
11,12
13,14

16,17,18
19,20
21
22
23
24
25
26
27
28I/O Connectors
29DDR Power & HT Power
30
31
32
33
34
35
36
37

A A

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

1

Cover Sheet

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1 36

of

Rev

20

5

D D

32

25

VCC

VDD

1

U24_1

VPP

DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
RFU

CE

GND

GND1

27

3
4
5
6
7
8
9

2

VCCA

CLK
MODE

A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0

RESET_L
WE_L
OE_L

C C

31
29

30

10
11
12

23
24

B B

4

PCB

21
20
19
18
17
15
14
13
22

28

16
26

_

JAUD1(5-6)

1
2

JC-D2-GN-SB

JBAT1(1-2)

1
2

JC-D2-GN-SB

3

COM1

COMPORT

JAUD1(3-4)

1
2

JC-D2-GN-SB

JROM(1-2)

1
2

JC-D2-GN-SB

VBAT1-1

HS1

_

2

1

HS2

_

A A

Title

Size Document Number Rev

5

4

3

Date: Sheet of

<Title>

<Doc> <RevCode>

A

2

1 1Thursday, August 22, 2002

1

5

4

3

2

1

Block
Diagram

D D

System Functional Blocks

Clock Generator

Clawhammer

Power Supplies

C C

B B

System Management

BCM5702

NEC USB2.0

PCI Slots x4

32b/33MHz

LINK 0

LINK 1

IN

IN

16x16

OUT

Lokar

8x8

OUT

Thor

Unbuffered

DDR333 SDRAM

8X AGP Port

EIDE (ATA/133) x2

USB 2.0 x6

USB Ports: 2 to backplane,

4 to header

AC'97 Audio

ATX P.S.U

VCC

VCC5_SB

VCC3

+12V

ISL6525

MOSFET

YLT1084

+

MOSFET

ISL6525

LM358MX

(OP + MOS)

TL431L

ISL6569

78L05

VDD_18

VCC5_DUAL

VCC3_SB

VDD_12_A

VDD_15

VDDA_PLL

VDD_CORE

+5VR

ISL6525

VDD18_SB

EZ1117A

TL431L

VDD_25_SB

VTT_DDR_SUS

VDD_25_SUS

SWITCH

(45N02)

VDD_25

Power up:

1. VDDA_PLL after POK vaild.

LPC ROM

A A

5

LPC

LPC Super I/O

Floppy Disk Drive

PS/2 Keyboard & Mouse

Parallel & Serial Port

4

3

2. VDDA_PLL before VDD_CORE.

3. VDD_25_SUS before VDD_CORE.

4. VTT_DDR_SUS before VDD_CORE.

5. VTT_DDR_SUS before or with VDD_25_SUS.

6. VDD_18 before VDD_12.

7. VDD_CORE before VDD_12.

Power down:

1. VDD_12 before VDD_CORE.

2. VDD_CORE before VDD_25_SUS.

3. VDD_25_SUS before or with VTT_DDR_SUS.

4. VDD_12 before or with VDD_18.

5. VDD_CORE before or with VDDA_PLL.

2

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

1

Block Diagram

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

2 36

Rev

20

of

5

4

3

2

1

MS-6589 Rev.0A to Rev.2.0

1. Add NEC USB2.0 controller.

4. Remove F customer SPEC.

6. For AGP 8X Vref, AMD8151 output Vref=480mV, so, we need add extra Vref circurt show on page 15.

7. AGP feedback and main clock need to add a 33 ohms series resistor and a 10pF cap to implement SI and EMI.

D D

8. USB dual power fix.

C C

B B

A A

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

GPIO Spec.

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

3 36

1

Rev

20

of

5

4

3

2

1

VREF_DDR_CLAWVDD_25_SUS

VREF_DDR_CLAW

VTT_SENSE29

VTT_DDR_SUS

D D

VDD_25_SUS

R556 51

R3 44.2RST
R4 34.8RST

MEMZN
MEMZP

AE13

AG12

D14
C14

VTT_SENSE

MEMVREF1
MEMZN

MEMZP

U1B

VTT_A4
VTT_A1
VTT_A2
VTT_A3
VTT_B1
VTT_B2
VTT_B3
VTT_B4

MEMRESET_L

MEMCKEA

MD63

MD[63..0]14

C C

B B

-MDQS[8..0]14

A A

5

MD62
MD61
MD60
MD59
MD58
MD57
MD56
MD55
MD54
MD53
MD52
MD51
MD50
MD49
MD48
MD47
MD46
MD45
MD44
MD43
MD42
MD41
MD40
MD39
MD38
MD37
MD36
MD35
MD34
MD33
MD32
MD31
MD30
MD29
MD28
MD27
MD26
MD25
MD24
MD23
MD22
MD21
MD20
MD19
MD18
MD17
MD16
MD15
MD14
MD13
MD12
MD11
MD10
MD9
MD8
MD7
MD6
MD5
MD4
MD3
MD2
MD1
MD0

-MDQS8

-MDQS7

-MDQS6

-MDQS5

-MDQS4

-MDQS3

-MDQS2

-MDQS1

-MDQS0

AJ10

AH11

AJ11

AH15

AJ15

AG11

AJ12
AJ14
AJ16

AH13

AJ13

A16
B15
A12
B11
A17
A15
C13
A11
A10

C7

C11

C5

G2
G1

G3

M1
W1
W3

AC1
AC3

W2

AC2
AD1
AE1
AE3
AG3
AJ4
AE2
AF1
AH3
AJ3
AJ5
AJ6
AJ7
AH9
AG5
AH5
AJ9

A13

C2

AA1
AG1
AH7

A14

D1

AB1
AJ2
AJ8

B9
A6
A9

A5
B5

A4
E2
E1
A3
B3
E3
F1

L3
L1

J2
L2

Y1

R1
A7
H1

T1
A8
J1

MEMDATA63
MEMDATA62
MEMDATA61
MEMDATA60
MEMDATA59
MEMDATA58
MEMDATA57
MEMDATA56
MEMDATA55
MEMDATA54
MEMDATA53
MEMDATA52
MEMDATA51
MEMDATA50
MEMDATA49
MEMDATA48
MEMDATA47
MEMDATA46
MEMDATA45
MEMDATA44
MEMDATA43
MEMDATA42
MEMDATA41
MEMDATA40
MEMDATA39
MEMDATA38
MEMDATA37
MEMDATA36
MEMDATA35
MEMDATA34
MEMDATA33
MEMDATA32
MEMDATA31
MEMDATA30
MEMDATA29
MEMDATA28
MEMDATA27
MEMDATA26
MEMDATA25
MEMDATA24
MEMDATA23
MEMDATA22
MEMDATA21
MEMDATA20
MEMDATA19
MEMDATA18
MEMDATA17
MEMDATA16
MEMDATA15
MEMDATA14
MEMDATA13
MEMDATA12
MEMDATA11
MEMDATA10
MEMDATA9
MEMDATA8
MEMDATA7
MEMDATA6
MEMDATA5
MEMDATA4
MEMDATA3
MEMDATA2
MEMDATA1
MEMDATA0

MEMDQS17
MEMDQS16
MEMDQS15
MEMDQS14
MEMDQS13
MEMDQS12
MEMDQS11
MEMDQS10
MEMDQS9
MEMDQS8
MEMDQS7
MEMDQS6
MEMDQS5
MEMDQS4
MEMDQS3
MEMDQS2
MEMDQS1
MEMDQS0

MEMORY INTERFAC E

MEMCKEB

MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4
MEMCLK_H3
MEMCLK_L3
MEMCLK_H2
MEMCLK_L2
MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0

MEMCS_L7
MEMCS_L6
MEMCS_L5
MEMCS_L4
MEMCS_L3
MEMCS_L2
MEMCS_L1
MEMCS_L0

MEMRASA_L
MEMCASA_L

MEMWEA_L

MEMBANKA1
MEMBANKA0

RSVD_MEMADDA15
RSVD_MEMADDA14

MEMADDA13
MEMADDA12
MEMADDA11
MEMADDA10

MEMADDA9
MEMADDA8
MEMADDA7
MEMADDA6
MEMADDA5
MEMADDA4
MEMADDA3
MEMADDA2
MEMADDA1
MEMADDA0

MEMRASB_L
MEMCASB_L

MEMWEB_L

MEMBANKB1
MEMBANKB0

RSVD_MEMADDB15
RSVD_MEMADDB14

MEMADDB13
MEMADDB12
MEMADDB11
MEMADDB10

MEMADDB9
MEMADDB8
MEMADDB7
MEMADDB6
MEMADDB5
MEMADDB4
MEMADDB3
MEMADDB2
MEMADDB1
MEMADDB0

MEMCHECK7
MEMCHECK6
MEMCHECK5
MEMCHECK4
MEMCHECK3
MEMCHECK2
MEMCHECK1
MEMCHECK0

4

D17
A18
B17
C17
AF16
AG16
AH16
AJ17

AG10
AE8

AE7
D10

C10
E12
E11
AF8
AG8
AF10
AE10
V3
V4
K5
K4
R5
P5
P3
P4

D8
C8
E8
E7
D6
E6
C4
E5

H5
D4
G5

K3
H3

E13
C12
E10
AE6
AF3
M5
AE5
AB5
AD3
Y5
AB4
Y3
V5
T5
T3
N5

H4
F5
F4

L5
J5

E14
D12
E9
AF6
AF4
M4
AD5
AC5
AD4
AA5
AB3
Y4
W5
U5
T4
M3

N3
N1
U3
V1
N2
P1
U1
U2

VTT_DDR_SUS

MEMRESET

MEMCLK_H7
MEMCLK_L7
MEMCLK_H6
MEMCLK_L6
MEMCLK_H5
MEMCLK_L5
MEMCLK_H4
MEMCLK_L4

MEMCLK_H1
MEMCLK_L1
MEMCLK_H0
MEMCLK_L0

-MCS3

-MCS2

-MCS1

-MCS0

MAA13
MAA12
MAA11
MAA10
MAA9
MAA8
MAA7
MAA6
MAA5
MAA4
MAA3
MAA2
MAA1
MAA0

MAB13
MAB12
MAB11
MAB10
MAB9
MAB8
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0

MEMCHECK7
MEMCHECK6
MEMCHECK5
MEMCHECK4
MEMCHECK3
MEMCHECK2
MEMCHECK1
MEMCHECK0

MCKE0
MCKE1

-MSRASA

-MSCASA

R5 X_0

-MCS[3..0]

R1
100RST

R2
100RST

MEMRESET_L 11,12
MCKE0 11,12,13

MCKE1 11,12,13
MEMCLK_H[7..0] 11,12,13

MEMCLK_L[7..0] 11,12,13

-MCS[3..0] 11,12,13

-MSRASA 11,13

-MSCASA 11,13

-MSWEA 11,13
MEMBANKA1 11,13

MEMBANKA0 11,13

MAA[13..0] 11,13

-MSRASB 12,13

-MSCASB 12,13

-MSWEB 12,13
MEMBAKB1 12,13

MEMBAKB0 12,13

MAB[13..0] 12,13

MEMCHECK[7..0] 14

C1
104P

C2

C746

104P

1000P

VDD_12_A

R6 49.9RST
R7 49.9RST

L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3

L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0

L0_CTLIN_H1
L0_CTLIN_L1

L0_CADIN_H[0..15]8
L0_CADIN_L[0..15]8 L0_CADOUT_L[0..15] 8

L0_CLKIN_H18
L0_CLKIN_L18
L0_CLKIN_H08
L0_CLKIN_L08

L0_CTLIN_H08
L0_CTLIN_L08

3

VLDT0

VDD_12_A

D29
D27
D25
C28
C26

B29
B27

T25
R25
U27
U26
V25

U25
W27
W26

AA27
AA26
AB25
AA25
AC27
AC26
AD25
AC25

T27

T28

V29

U29

V27

V28

Y29
W29

AB29
AA29
AB27
AB28
AD29
AC29
AD27
AD28

Y25
W25

Y27

Y28

R27

R26

T29

R29

C810

0.22u

VLDT0_A6
VLDT0_A5
VLDT0_A4
VLDT0_A3
VLDT0_A2
VLDT0_A1
VLDT0_A0

L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0

L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0

L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLIN_L0

2

C811

C812

0.22u

0.22u

U1A

HYPER TRANSPORT - LINK0

C814

C813

0.22u

0.22u

VLDT0_B6
VLDT0_B5
VLDT0_B4
VLDT0_B3
VLDT0_B2
VLDT0_B1
VLDT0_B0

L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10

L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0

L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0

L0_CTLOUT_H1

L0_CTLOUT_L1

L0_CTLOUT_H0

L0_CTLOUT_L0

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

C815

0.22u

C816

0.22u

C817

0.22u

C818

0.22u

VLDT0

AH29
AH27
AG28
AG26
AF29
AE28
AF25

N26
N27
L25
M25
L26
L27
J25
K25
G25
H25
G26
G27
E25
F25
E26
E27
N29
P29
M28
M27
L29
M29
K28
K27
H28
H27
G29
H29
F28
F27
E29
F29

J26
J27
J29
K29

N25
P25
P28
P27

L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2L0_CADIN_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0

L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0

L0_CTLOUT_H0
L0_CTLOUT_L0

C747

4.7u/1206

L0_CADOUT_H[0..15] 8

L0_CLKOUT_H1 8
L0_CLKOUT_L1 8
L0_CLKOUT_H0 8
L0_CLKOUT_L0 8

L0_CTLOUT_H0 8
L0_CTLOUT_L0 8

Micro Star Restricted Secret

K8 DDR & HT

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

4 36

1

Rev

20

of

5

4

3

2

VCCA_PLL trace length from the VR1 to the
PGA must be 0.75".

1

Place al filters close to the PGA.

Keep all power and signal trce away from

D D

VCCA_PLL

C5

C4
39P

3300p

C6

0.22u

the VR1.

Place a cut in the GND plane around the
VCCA_PLL regulator circuit.

Q1

VCCA_CTRL

C10
39P

123456

NDS351AN-S-SOT23

D

78

RN121

X_8P4R-1K

S

G

2

YREG431LS

3 1

VDD_25

VCCA_PL

VCCA_REF

VR1

C7

1000P

1
3
5
7

9
11
13
15
17
19
21
23

FB33

A

C748

JHDT

KEY

X_ASP-68200-07

+12V

VCC3

R9
1K

C C

VDD_PWGD_231,35

YFET-NDS7002AS

B B

DBREQ_L
DBRDY
TCK
TMS
TDI
TRST_L
TDO

A A

VCC5_SB

Q91

VDD_25_SUS

VDD_25

123456

5

C9

4.7u/0805

R747
1K

PLL_CTRL

Q90

YFET-NDS7002AS

HDT Connectors

78

RN120

X_8P4R-1K

100u/10V

4

180nH/1210

2
4
6
8
10
12
14
16
18
20
22
24
26

VCCA_PLL

C8

4.7u/0805

VDD_25_SUS

NC_AJ18
NC_AG17
NC_AF21
NC_AF22

NC_C19
NC_D20
NC_C18
NC_D18

NC_C21
NC_B19
NC_A19

VLDT0

R11 44.2RST
R12 44.2RST

VCCA_PLL

C11
1000P

RN122

8P4R-1K
RN123

8P4R-1K
RN124

8P4R-1K

LAYOUT: Route VDDA trace approx.
50 mils wide (use 2x25 mil traces to
exit ball field) and 500 mils long.

RESET_CPU_L16

ALL_POWERGOOD9,17,31

HTSTOP_L9,16

3

COREFB35

COREFB_L35

VDDIO_SENSE29

C13 3900P

C14 3900P

VTT_DDR_SUS

R14 1K
R16 1K

R26
1K

R557 51

R27
1K

12
34
56
78

12
34
56
78

12
34
56
78

C12

1000P

VDD_25_SUS

CPUCLK0_H7

CPUCLK0_L7

VDD_25

VDD_25

L0_REF1
L0_REF0

VDDIO_SENSE

CLKIN_H

R13 169RST

NC_AJ23
NC_AH23

DBRDY

TMS
TCK
TRST_L
TDI

NC_C18

NC_A19

NC_AE23
NC_AF23
NC_AF22
NC_AF21

CLKIN_L

AH25
AJ25

AF20
AE18
AJ27

AF27
AE26

AE12
AF12
AE11

AJ21
AH21

AJ23
AH23

AE24
AF24

AG15
AH17

AJ28
AE23

AF23
AF22
AF21

AE21

A23
A24
B23

C16

C15
E20

E17
B21
A21

C18
A19
A28

AA2

AG2

B18

AH1
C20

AG4
AG6

AE9
AG9

C1

J3

R3
D3

C6

VDDA1
VDDA2

RESET_L
PWROK
LDTSTOP_L

L0_REF1
L0_REF0

COREFB_H
COREFB_L
CORE_SENSE

VDDIOFB_H
VDDIOFB_L
VDDIO_SENSE

CLKIN_H
CLKIN_L

NC_AJ23
NC_AH23

NC_AE24
NC_AF24

VTT_A5
VTT_B5

DBRDY
NC_C15
TMS

TCK
TRST_L
TDI

NC_C18
NC_A19
KEY1

KEY0
NC_AE23

NC_AF23
NC_AF22
NC_AF21

FREE29
FREE31
FREE33
FREE35
FREE1
FREE37
FREE4
FREE38
FREE41
FREE7
FREE11
FREE12
FREE13
FREE14
FREE40

U1C

THERMTRIP_L

THERMDA
THERMDC

VID4
VID3
VID2
VID1
VID0

NC_AG18
NC_AH18
NC_AG17

NC_AJ18

A20
A26

A27
AG13

AF14
AG14
AF15
AE15

AG18
AH18
AG17
AJ18

VID4
VID3
VID2
VID1
VID0

NC_AG17
NC_AJ18

THERMTRIP_CPU_L 17
THERMDA_CPU 26

THERMDC_CPU 26
VID[4..0] 26,35

LAYOUT: Route FBCLKOUT_H/L

FBCLKOUT_H

DBREQ_L

NC_D20
NC_C21
NC_D18
NC_C19
NC_B19

NC_AF18

RSVD_SCL
RSVD_SDA

FREE26
FREE28
FREE30
FREE32
FREE34
FREE36
FREE10
FREE18
FREE19
FREE42
FREE24
FREE25
FREE27

TDO

AH19
AJ19

AE19
D20

C21
D18
C19
B19

A22

AF18

D22
C22

B13
B7
C3
K1
R2
AA3
F3
C23
AG7
AE22
C24
A25
C9

Title
Document Number

FBCLKOUT_L

DBREQ_L
NC_D20

NC_C21
NC_D18
NC_C19
NC_B19

TDO

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

G_FBCLKOUT_H
G_FBCLKOUT_L

2

differentially with 20/8/5/8/20
spacing and trace width.

R15

80.6RST

Micro Star Restricted Secret

K8 HDT & MISC

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

5 36

1

of

Rev

20

5

U1E

B2

VSS1

AH20

VSS3

AB21

VSS4

W22

VSS5

M23

VSS6

L24

VSS7

AG25

VSS8

AG27

VSS9

AA10

AE16

AA20
AC20
AE20
AG20

AJ20

AD21
AG21

AG29
AA22
AC22
AG22
AH22

AJ22

AB23
AD23
AG23

AA24
AC24
AG24

AJ24

AD26
AF26
AH26

AB17
AD17

AA18
AC18

AB19
AD19
AF19

D2

VSS10

AF2

VSS11

W6

VSS12

Y7

VSS13

AA8

VSS14

AB9

VSS15
VSS16

J12

VSS17

B14

VSS18

Y15

VSS19
VSS20

J18

VSS21

G20

VSS22

R20

VSS23

U20

VSS24

W20

VSS25
VSS26
VSS27
VSS28
VSS29
VSS30

D21

VSS31

F21

VSS32

H21

VSS33

K21

VSS34

M21

VSS35

P21

VSS36

T21

VSS37

V21

VSS38

Y21

VSS39
VSS40
VSS41

B22

VSS42

E22

VSS43

G22

VSS44

J22

VSS45

L22

VSS46

N22

VSS47

R22

VSS48

U22

VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55

D23

VSS56

F23

VSS57

H23

VSS58

K23

VSS59

P23

VSS60

T23

VSS61

V23

VSS62

Y23

VSS63
VSS64
VSS65
VSS66

E24

VSS67

G24

VSS68

J24

VSS69

N24

VSS70

R24

VSS71

U24

VSS72

W24

VSS73
VSS74
VSS75
VSS76
VSS77

B25

VSS78

C25

VSS79

B26

VSS80

D26

VSS81

H26

VSS82

M26

VSS83

T26

VSS84

Y26

VSS85
VSS86
VSS87
VSS88

C27

VSS89

B28

VSS90

D28

VSS91

G28

VSS92

F15

VSS187

H15

VSS188
VSS206
VSS207

B16

VSS208

G18

VSS209
VSS210
VSS211

D19

VSS212

F19

VSS213

H19

VSS214

K19

VSS215

Y19

VSS216
VSS217
VSS218
VSS219

J20

VSS220

L20

VSS221

N20

VSS222

GROUND

5

D D

C C

B B

A A

VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
VSS161
VSS162
VSS163
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS171
VSS172
VSS173
VSS174
VSS175
VSS176
VSS177
VSS178
VSS179
VSS180
VSS181
VSS182
VSS183
VSS184
VSS185
VSS186
VSS189
VSS190
VSS191
VSS192
VSS194
VSS195
VSS196
VSS197
VSS198
VSS199
VSS223
VSS201
VSS202
VSS203
VSS204
VSS205

L28
R28
W28
AC28
AF28
AH28
C29
F2
H2
K2
M2
P2
T2
V2
Y2
AB2
AD2
AH2
B4
AH4
B6
G6
J6
L6
N6
R6
U6
AA6
AC6
AH6
F7
H7
K7
M7
P7
T7
V7
AB7
AD7
B8
G8
J8
L8
N8
R8
U8
W8
AC8
AH8
F9
H9
K9
M9
P9
T9
V9
Y9
AD9
B10
G10
J10
L10
N10
R10
U10
W10
AC10
AH10
F11
H11
K11
Y11
AB11
AD11
B12
G12
AA12
AC12
AH12
F13
H13
K13
Y13
AB13
AD13
AF17
G14
J14
AA14
AC14
AE14
D16
E15
K15
AB15
AD15
AH14
E16
G16
J16
AA16
AC16
AE29
AJ26
E18
F17
H17
K17
Y17

GNDGND

VDD_CORE

AC15

AB14

AA15

AB16

AA17

AC17

AE17

AB18
AD18
AG19

AC19

AA19

AB20
AD20

AA21
AC21

AB22
AD22

AA23
AC23

AB24
AD24

AH24

AE25

U1D

L7

VDD1
VDD2

H18

VDD3

B20

VDD4

E21

VDD5

H22

VDD6

J23

VDD7

H24

VDD8

F26

VDD9

N7

VDD10

L9

VDD11

V10

VDD12

G13

VDD13

K14

VDD14

Y14

VDD15
VDD16

G15

VDD17

J15

VDD18
VDD19

H16

VDD20

K16

VDD21

Y16

VDD22
VDD23

G17

VDD24

J17

VDD25
VDD26
VDD27
VDD28

F18

VDD29

K18

VDD30

Y18

VDD31
VDD32
VDD33
VDD34

E19

VDD35

G19

VDD36
VDD39
VDD38

J19

VDD37

F20

VDD40

H20

VDD41

K20

VDD42

M20

VDD43

P20

VDD44

T20

VDD45

V20

VDD46

Y20

VDD47
VDD48
VDD49

G21

VDD50

J21

VDD51

L21

VDD52

N21

VDD53

R21

VDD54

U21

VDD55

W21

VDD56
VDD57
VDD58

F22

VDD59

K22

VDD60

M22

VDD61

P22

VDD62

T22

VDD63

V22

VDD64

Y22

VDD65
VDD66
VDD67

E23

VDD68

G23

VDD69

L23

VDD70

N23

VDD71

R23

VDD72

U23

VDD73

W23

VDD74
VDD75
VDD76

B24

VDD77

D24

VDD78

F24

VDD79

K24

VDD80

M24

VDD81

P24

VDD82

T24

VDD83

V24

VDD84

Y24

VDD85
VDD86
VDD87
VDD88
VDD89

K26

VDD90

P26

VDD91

V26

VDD92

POWER

VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO7
VDDIO8

VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
VDDIO28
VDDIO29
VDDIO30
VDDIO31
VDDIO32
VDDIO33
VDDIO34
VDDIO35
VDDIO36
VDDIO37
VDDIO38
VDDIO39
VDDIO40
VDDIO41
VDDIO42
VDDIO43
VDDIO44
VDDIO45
VDDIO46
VDDIO47
VDDIO48
VDDIO49
VDDIO50

VDDIO6

VDD96
VDD97
VDD98

VDD99
VDD100
VDD101
VDD102
VDD103
VDD104
VDD105
VDD106
VDD107
VDD108
VDD109
VDD110
VDD111
VDD112
VDD113
VDD114
VDD115
VDD116
VDD117
VDD118
VDD119
VDD120
VDD121
VDD122
VDD123
VDD124
VDD125
VDD126
VDD127
VDD128
VDD129
VDD130
VDD131
VDD132
VDD133

VDD93

VDD94

VDD95

4

VDD_25_SUS

E4
G4
J4
L4
N4
U4
W4
AA4
AC4
AE4
D5
AF5
F6
H6
K6
M6
P6
T6
V6
Y6
AB6
AD6
D7
G7
J7
AA7
AC7
AF7
F8
H8
AB8
AD8
D9
G9
AC9
AF9
F10
AD10
D11
AF11
F12
AD12
D13
AF13
F14
AD14
F16
AD16
D15
R4

N28
U28
AA28
AE27
R7
U7
W7
K8
M8
P8
T8
V8
Y8
J9
N9
R9
U9
W9
AA9
H10
K10
M10
P10
T10
Y10
AB10
G11
J11
AA11
AC11
H12
K12
Y12
AB12
J13
AA13
AC13
H14
AB26
E28
J28

4

of HT link, and 12 along

VDD_CORE

3

EMI

VDD_CORE

C22

6.8pF

6.8pF

6.8pF

C25

C24

C23

6.8pF

C27

6.8pF

6.8pF

C28

6.8pF

C26

LAYOUT: Place 6 EMI capsalong bottom right side of Clawhammer, 2 in middle

X_6.8pF/BOT

C71

<nopop>

X_6.8pF/BOT

0.22u

C96

X_0.22uF

C51

X_6.8pF/BOT

C97

<nopop>

GND

hammer.

C52

X_6.8pF/BOT

C72

<nopop>

X_6.8pF/BOT

<nopop>

X_0.22uF

<nopop>

VDD_CORE

C44

X_6.8pF/BOT

bottom left side of Claw-

C47

C46

X_6.8pF/BOT

VDD_CORE

C67

LAYOUT: Place beside processor.

VDD_25_SUS

C39

C38

0.22u

VDD_25_SUS

C62

C61

4.7u/0805

X_6.8pF/BOT

C68

<nopop>

X_6.8pF

0.22u

C63

4.7u/0805

C48

X_6.8pF/BOT

C40

4.7u/0805

C49

X_6.8pF/BOT

<nopop>

C41

0.22u

C64

GND

X_6.8pF/BOT

C70

0.22u

VDD_25_SUS

4.7u/0805

3

C50

C43

GND

LAYOUT: Place 1 capacitor every 1-1.5"
along VDD_CORE perimiter.

C30

6.8pF

C54

X_6.8pF/BOT

<nopop>

X_6.8pF/BOT

C33

6.8pF

X_6.8pF/BOT

C55

6.8pF

X_6.8pF/BOT

6.8pF

C56

GND

C29

C53

X_6.8pF/BOT

C73

GND

C34

LAYOUT: Place on backside of processor.

VDD_25_SUS VTT_DDR_SUS

LAYOUT: Place beside DDR slots.

VDD_25_SUS

C66

C65

4.7u/0805

GND

2

C37

6.8pF

GND

VDD_CORE

C76

C75

C74

1000P

1000P

X_6.8pF/BOT

LAYOUT: Place 1000pF capacitors
between VRM & CPU.

C132

X_0.22uF

<nopop>

4.7u/0805

2

1

NOTE: Populate 270uF
caps or 100uF caps

C77

1000P

1000P

GND

in these footprints.

VDD_25_SUS

+

EC26

100u-16V

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

+

EC27
100u-16V

GND

Micro Star Restricted Secret

K8 POWER & GND

VDD_25_SUS

EC28

100u-16V

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

+

GND

6 36

of

Rev

20

5

4

3

2

1

Clock Synthesizer

CLKVCC3

C133 104P

CLKVCC3

C135 104P

D D

C143

4.7u/0805

CLKVCC3

C144
104P

VCC3

FB1 120S/0805

C141

C140

104P

39P

C C

C142
39P

CLKVCC3

CLKVCC3

CLKVCC3

CLKVCC3

CLKVCC3

CLKVCC3

CLKVCC3

CLKVCC3

C139 104P

C147 104P

C149 104P

C150 104P

C151 104P

C152 104P

C153 104P

C154 104P

U6

46

VDD_46

47

VSS_47

2

VDD_2

5

VSS_5

32

VDDF

33

VSSF

PCI33_HT66_1/PCI33_HT66SEL1

9

VDD_9

10

VSS_10

16

VDD_16

15

VSS_15

19

VDD_19

20

VSS_20

29

VDD_29

30

VSS_30

27

VSS_27

38

VDD_38

39

VSS_39

35

VDD_35

34

VSS_34

43

VDDA

42

VSSA

PCI33_HT66_0/PCI33_HT66SEL0

PCI33_HT66_2
PCI33_HT66_3

PCI_SEL/PCI33_F

PCI33_6/PCISTOP

24_48MHZ/SEL

CY28331

FS0/REF0
FS1/REF1
FS2/REF2

XOUT

48MHZ/FS3

PCI33_0
PCI33_1
PCI33_2
PCI33_3

PCI33_4
PCI33_5

PCI33_7

SDATA

SCLK

CPUT_0
CPUC_0

CPUT_1
CPUC_1

SRESET/PD

X1

14.318MHZ

SB_OSC14
CODEC_14
SIO_14M

C134 10P

C137 10P

USBCLK

PCICLK1
PCICLK2
PCICLK4
PCICLK3
SB_PCLK
FWH_PCLK
SIO_PCLK
USB_PCLK
LAN_PCLK

HTCLK

SB_OSC14 16
CODEC_14 21
SIO_14M 26

USBCLK 17

PCICLK1 19
PCICLK2 19
PCICLK4 20
PCICLK3 20
SB_PCLK 17
FWH_PCLK 27
SIO_PCLK 26
USB_PCLK 36
LAN_PCLK 23

SMBDATA1 11,12,26,33
SMBCLK1 11,12,26,33

CPUCLK0_H 5
CPUCLK0_L 5

HTCLK 9

CLKVCC3

FS0

1

FS1

48

FS2

45

CLKX1

3

XIN

CLKX2

4

48MHz

31
7

8
11

R_PCICLK1

13

R_PCICLK2

14

R_PCICLK3

17

R_PCICLK4

18

R_PCLCLKF

23

R_PCICLK5

21

R_PCICLK6

22

R_PCICLK7

24

R_PCICLK8

12

SEL_24

28

SMBDATA1

26

SMBCLK1

25

R_CPU_CLK

41

-R_CPU_CLK

40
37

36

HT_66

6

SPREAD

44

R40 33
R41 33
R47 33

R42 33

RN1 8P4R-33

7 8
5 6
3 4
1 2

R630 33

R38 33

R37 33

R46 33

R39 33

R48 15RST

R49 15RST

R43 22

R55 10K

SIO_14M
SB_OSC14
CODEC_14

PCICLK1
PCICLK2
PCICLK4
PCICLK3

SIO_PCLK
FWH_PCLK
SB_PCLK
USB_PCLK
LAN_PCLK

USBCLK

HTCLK

CPUCLK0_H
CPUCLK0_L

SEL_24

R_PCLCLKF

FS2
FS1

C863 X_5P
C859 X_5P
C860 X_5P

CN25

X_8P4C-22P

C902 X_5P
C903 X_5P
C904 X_5P
C861 X_5P
C862 X_5P

C952 X_5P

C865 X_5P

C136 X_5P
C138 X_5P

R50 X_10K
R51 10K

R52 X_10K
R53 X_10K

12
34
56
78

CLKVCC3
CLKVCC3

Input Configuration

FS0
1
0
1
0
1
0
1
1
0
X
X
X
X
X
X
X
X

PCI_HT#
X
X
X
X

X
1
0
X
0
1
X
X
0
0
1
1

5

FS1

B B

FS2
1
1

1
1

1

0

1
0

1 -

0

1

0

0

0

0

0

0

X

X

X

X

X

X

X

A A

X
X

X

X

X

X
X

X 24 or 48100,133.33,166.66,200

PCISTOP#
1
1
1
1
1
1
1
1
1
1
1
1
1
0
1
0
1

Clock Generator Output
24_48SEL#

X
X
X
X

CPU (MHz)
200

166.66

133.330

100
X
X
X
X
X
X
X
1
0
X
X
X

- -

X1 input

X1 input

Hi-Z

100,133.33,166.66,200

100,133.33,166.66,200

100,133.33,166.66,200

100,133.33,166.66,200

100,133.33,166.66,200

100,133.33,166.66,200

100,133.33,166.66,200X
X

PCI33 (MHz)

33.33

33.33

33.33

33.33

-

PCI33_HT66 (MHz)

33.33 or 66.66

33.33 or 66.66

33.33 or 66.66

33.33 or 66.66

-

­X1/6
X1/6
Hi-Z

33.33

33.33

33.33 24

33.33
0

33.33
0

33.33

4

X1/6
X1/3
Hi-Z

66.66

33.33

33.33 or 66.66

33.33 or 66.66

66.66

66.66
0

33.33

24_48 (MHz)
24 or 48
24 or 48
24 or 48
24 or 48

-

­0
0
Hi-Z
24 or 48
24 or 48

48
24 or 48
24 or 48
24 or 48

3

14.318 (MHz)

14.318

14.318

14.318

14.318

-X

­0
0
Hi-Z

14.318

14.318

14.318

14.318

14.318

14.318

14.318

14.318

Comment

Normal Hammer operation
Reserved
Athlon compatible
Athlon compatible
Reserved
Reserved
Bypass mode
Bypass mode
Tri-state mode

33.33 vs. 66.66 MHz output select

33.33 vs. 66.66 MHz output select
24 vs. 48 MHz output select
24 vs. 48 MHz output select
PCISTOP vs. 33.33/66.66 MHz selects
PCISTOP vs. 33.33/66.66 MHz selects
PCISTOP vs. 33.33/66.66 MHz selects
PCISTOP vs. 33.33/66.66 MHz selects

2

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

Clock Synthesizer

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

7 36

of

Rev

20

5

4

3

2

1

VDD_12_A VDD_12_A1

J17

VLDT0_A10

H18

VLDT0_A9

H19

VLDT0_A8

H20

VLDT0_A7

D D

L1_CADIN_H[0..7]16

L1_CADIN_L[0..7]16

Link 1 Is Lokar <--> Thor

C C

L1_CLKIN_H16
L1_CLKIN_L16

L1_CTLIN_H16
L1_CTLIN_L16

L0_CADOUT_H[0..15]4
L0_CADOUT_L[0..15]4

Link 0 Is Clawhammer <--> Lokar

B B

L0_CLKOUT_H14
L0_CLKOUT_L14

L0_CLKOUT_H04
L0_CLKOUT_L04

L0_CTLOUT_H04
L0_CTLOUT_L04

A A

5

VDD_12_A0

C749

4.7u/1206

L1_CADIN_H7
L1_CADIN_L7
L1_CADIN_H6
L1_CADIN_L6
L1_CADIN_H5
L1_CADIN_L5
L1_CADIN_H4
L1_CADIN_L4
L1_CADIN_H3
L1_CADIN_L3
L1_CADIN_H2
L1_CADIN_L2
L1_CADIN_H1
L1_CADIN_L1
L1_CADIN_H0
L1_CADIN_L0

L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8

L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0

G21

VLDT0_A6

F22

VLDT0_A5

E23

VLDT0_A4

D24

VLDT0_A3

C24

VLDT0_A2

B23

VLDT0_A1

H6

VLDT0_B10

G5

VLDT0_B9

G4

VLDT0_B8

F4

VLDT0_B7

G3

VLDT0_B6

F2

VLDT0_B5

E1

VLDT0_B4

D2

VLDT0_B3

C1

VLDT0_B2

B2

VLDT0_B1

J7

VLDT0_B11

J8

VLDT0_B12

J9

VLDT0_B13

R22

L1_CADIN_H7

R21

L1_CADIN_L7

T20

L1_CADIN_H6

R20

L1_CADIN_L6

U22

L1_CADIN_H5

U21

L1_CADIN_L5

V20

L1_CADIN_H4

U20

L1_CADIN_L4

V24

L1_CADIN_H3

U24

L1_CADIN_L3

V22

L1_CADIN_H2

V23

L1_CADIN_L2

Y24

L1_CADIN_H1

W24

L1_CADIN_L1

Y22

L1_CADIN_H0

Y23

L1_CADIN_L0

T22

L1_CLKIN_H0

T23

L1_CLKIN_L0

T24

L1_CTLIN_H0

R24

L1_CTLIN_L0

E14

L0_CADIN_H15

E13

L0_CADIN_L15

C15

L0_CADIN_H14

D15

L0_CADIN_L14

E16

L0_CADIN_H13

E15

L0_CADIN_L13

C17

L0_CADIN_H12

D17

L0_CADIN_L12

C19

L0_CADIN_H11

D19

L0_CADIN_L11

E20

L0_CADIN_H10

E19

L0_CADIN_L10

C21

L0_CADIN_H9

D21

L0_CADIN_L9

E22

L0_CADIN_H8

E21

L0_CADIN_L8

C14

L0_CADIN_H7

B14

L0_CADIN_L7

A16

L0_CADIN_H6

A15

L0_CADIN_L6

C16

L0_CADIN_H5

B16

L0_CADIN_L5

A18

L0_CADIN_H4

A17

L0_CADIN_L4

A20

L0_CADIN_H3

A19

L0_CADIN_L3

C20

L0_CADIN_H2

B20

L0_CADIN_L2

A22

L0_CADIN_H1

A21

L0_CADIN_L1

C22

L0_CADIN_H0

B22

L0_CADIN_L0

E18

L0_CLKIN_H1

E17

L0_CLKIN_L1

C18

L0_CLKIN_H0

B18

L0_CLKIN_L0

A14

L0_CTLIN_H0

A13

L0_CTLIN_L0

4

U2A

HYPER TRANSPORT LINK 0/1

VLDT1_A8
VLDT1_A7
VLDT1_A6
VLDT1_A5
VLDT1_A4
VLDT1_A3
VLDT1_A2
VLDT1_A1

VLDT1_A9
VLDT1_A10
VLDT1_A11
VLDT1_A12
VLDT1_A13

VLDT1_B8

VLDT1_B7

VLDT1_B6

VLDT1_B5

VLDT1_B4

VLDT1_B3

VLDT1_B2

VLDT1_B1

L1_CADOUT_H7
L1_CADOUT_L7
L1_CADOUT_H6
L1_CADOUT_L6
L1_CADOUT_H5
L1_CADOUT_L5
L1_CADOUT_H4
L1_CADOUT_L4
L1_CADOUT_H3
L1_CADOUT_L3
L1_CADOUT_H2
L1_CADOUT_L2
L1_CADOUT_H1
L1_CADOUT_L1
L1_CADOUT_H0
L1_CADOUT_L0

L1_CLKOUT_H0
L1_CLKOUT_L0

L1_CTLOUT_H0

L1_CTLOUT_L0

L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10

L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8

L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0

L0_CLKOUT_H1
L0_CLKOUT_L1

L0_CLKOUT_H0
L0_CLKOUT_L0

L0_CTLOUT_H0

L0_CTLOUT_L0

LDTCOMP3
LDTCOMP2
LDTCOMP1
LDTCOMP0

AA19
AB20
AB21
AA21
AB22
AA23
AC23
AB24
Y18
W17
V16
U16
T16

K18
J19
J20
J21
H22
G23
G24
F24

N20
P20
N21
N22
L20
M20
L21
L22
M23
M22
L24
M24
K23
K22
J24
K24

N24
P24

P23
P22

D11
C11
E9
E10
D9
C9
E7
E8
E5
E6
D5
C5
E3
E4
D3
C3

A11
A12
B10
C10
A9
A10
B8
C8
B6
C6
A5
A6
B4
C4
A3
A4

D7
C7

A7
A8

B12
C12

Y20
W22
W21
W20

L1_CADOUT_H7

L1_CADOUT_L7

L1_CADOUT_H6

L1_CADOUT_L6

L1_CADOUT_H5

L1_CADOUT_L5

L1_CADOUT_H4

L1_CADOUT_L4

L1_CADOUT_H3

L1_CADOUT_L3

L1_CADOUT_H2

L1_CADOUT_L2

L1_CADOUT_H1

L1_CADOUT_L1
L1_CADOUT_H0
L1_CADOUT_L0

L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8

L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0

LOKAR_HTCOMP3
LOKAR_HTCOMP2
LOKAR_HTCOMP1
LOKAR_HTCOMP0

3

C750

4.7u/1206

VDD_12_A

C155
1000P

C156
1000P

C157
1000P/BOT

C158
1000P

L1_CADOUT_H[0..7] 16
L1_CADOUT_L[0..7] 16

L1_CLKOUT_H 16
L1_CLKOUT_L 16

L1_CTLOUT_H 16
L1_CTLOUT_L 16

L0_CADIN_H[0..15] 4
L0_CADIN_L[0..15] 4

L0_CLKIN_H1 4
L0_CLKIN_L1 4

L0_CLKIN_H0 4
L0_CLKIN_L0 4

L0_CTLIN_H0 4
L0_CTLIN_L0 4

R56 121RST
R57 56.2RST/BOT

R58 56.2RST

VDD_12_A

2

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

LOKAR HT

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

8 36

of

Rev

20

5

4

3

2

1

NOTE: Pulldown to enable automatic link compensation

VCC3

R59

R61 100

C159 3900P

X_100

LOKAR_CMPOVR

LOKAR_TEST

A_SBA7
A_SBA6
A_SBA5
A_SBA4
A_SBA3
A_SBA2
A_SBA1
A_SBA0

A_CALD
A_CALD_L
A_CALS
A_CALS_L

LOKAR_STRAP0
LOKAR_STRAP1
LOKAR_STRAP2
LOKAR_STRAP3
LOKAR_STRAP4
LOKAR_STRAP5

AC17
AB16
AC18
AA17
AD18
AB18

AC11
AD11

AD10

AB10
AA12

AA11

AD20

AB13
AA14

AD3
AC5

AB9
AA9
AB8

AA5

AA6
AB6

AA8

K1
K2

N2
M1
L1
L2
J1
H1
H2
G1

V1

W2
W3

N4
Y5

Y7

F1
G2

K4

H3
J4

Y11

Y8
Y9
P5
J5
L5
J3

CMPOVR
REFCLK
LDTSTOP_L
TEST
PWROK
RESET_L

A_SBSTB_P
A_SBSTB_N

A_SBA7
A_SBA6
A_SBA5
A_SBA4
A_SBA3
A_SBA2
A_SBA1
A_SBA0

A_ADSTB0_P
A_ADSTB0_N
A_ADSTB1_P
A_ADSTB1_N

A_CBE_L3
A_CBE_L2
A_CBE_L1
A_CBE_L0

A_DEVSEL_L
A_FRAME_L
A_IRDY_L
A_TRDY_L
A_PAR
A_REQ_L
A_STOP_L
A_RBF_L
A_WBF_L

A_CALD
A_CALD_L
A_CALS
A_CALS_L

A_DBIH
A_DBIL

A_TYPEDET_L

A_GC8XDET_L

STRAPL0
STRAPL1
STRAPL2
STRAPL3
STRAPL4
STRAPL5
STRAPL6
STRAPL7
STRAPL8
STRAPL9
STRAPL10

D D

HTCLK7

HTSTOP_L5,16

ALL_POWERGOOD

RESET_TNL_L16

A_SBSTB_P15

A_SBSTB_N15

A_SBA[7..0]15

A_ADSTB0_P15
A_ADSTB0_N15
A_ADSTB1_P15
A_ADSTB1_N15

A_CBE3_L15
A_CBE2_L15

VDD_15

A_TYPEDET_L15

A_GC8XDET_L15

A_CBE1_L15
A_CBE0_L15

A_DEVSEL_L15

A_FRAME_L15

A_IRDY_L15
A_TRDY_L15

A_PAR15

A_REQ_L15
A_STOP_L15
A_RBF_L15
A_WBF_L15

A_REFGC15

A_DBIH15
A_DBIL15

C C

B B

R60 100

R72 43.2RST/BOT
R73 43.2RST/BOT
R74 43.2RST/BOT
R75 43.2RST/BOT

C870 3900P

U2B

AGP8X/MISC/STRAPS

FREE2
FREE1
FREE3
FREE4
FREE5
FREE6
FREE7

A_PCLK

A_PLLCLKI

A_PLLCLKO
A_RESET_L

A_AD31
A_AD30
A_AD29
A_AD28
A_AD27
A_AD26
A_AD25
A_AD24
A_AD23
A_AD22
A_AD21
A_AD20
A_AD19
A_AD18
A_AD17
A_AD16
A_AD15
A_AD14
A_AD13
A_AD12
A_AD11
A_AD10

A_AD9
A_AD8
A_AD7
A_AD6
A_AD5
A_AD4
A_AD3
A_AD2
A_AD1
A_AD0

A_REFCGA_REFGC

A_GNT_L

A_ST2
A_ST1
A_ST0

A_MB8XDET_L

STRAPL11
STRAPL13
STRAPL14
STRAPL15
STRAPL16
STRAPL17
STRAPL18
STRAPL19
STRAPL20
STRAPL21
STRAPL22

Y4

NC0

N3

NC1

R3
K3
T3
C13
D13
E12
E11

AC19
AB15
AA15

AD19
N1

P2
P1
R1
T2
T1
U1
U2
W1
Y2
Y1
AA1
AB1
AB3
AB2
AC3
AD5
AC6
AD6
AC8
AD7
AD8
AC9
AD9
AD12
AC12
AB12
AD13
AD14
AC14
AC15
AD15

AD17AD16
L4
V3

U4
T4

W4

M3
P4
AA3
AB4
AB7
AD4
Y12
Y13
Y15
Y16
AA16

MB8X_L

AGPCLK_R
A_PLLCLKI
A_PLLCLKO

A_AD31
A_AD30
A_AD29
A_AD28
A_AD27
A_AD26
A_AD25
A_AD24
A_AD23
A_AD22
A_AD21
A_AD20
A_AD19
A_AD18
A_AD17
A_AD16
A_AD15
A_AD14
A_AD13
A_AD12
A_AD11
A_AD10
A_AD9
A_AD8
A_AD7
A_AD6
A_AD5
A_AD4
A_AD3
A_AD2
A_AD1
A_AD0

R775 X_0

R692 33
R63 33

A_MB8XDET_TNL_L

C895 10P

C896 10P

A_GC8XDET_L

A_MB8XDET_TNL_L

A_REFCG 15
A_GNT_L 15

A_ST2 15
A_ST1 15
A_ST0 15

A_MB8XDET_L 15

LAYOUT: This trace should be
the length of AGPCLK + 2500 mils.

AGPCLK 15

A_RESET_L 15
A_AD[31..0] 15

R592 1K

R593 0

VDD_15

POWER UP

HT FREQUENCY

*200 MHz

400 MHz

600 MHz

Lokar Configuration Straps

LOKAR_STRAP5

LOKAR_STRAP4

LOKAR_STRAP3

LOKAR_STRAP2

LOKAR_STRAP0
LOKAR_STRAP1

LOKAR_STRAP(5)

0

1

1800 MHz

R64 X_100/BOT

R65 100/BOT

R66 X_100/BOT

R67 100/BOT

R68 X_100

R69 100

R70 100

R71 100
R631 100

LOKAR_STRAP(4)

0

10

0

0

VDD_15

LOKAR_STRAP(3)

0

0

0

1

NOTE: Ground LOKAR_STRAP(22) through LOKAR_STRAP(6), LOKAR_STRAP(2), and
LOKAR_STRAP(0) for normal operation.
* Default frequency.

A A

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

LOKAR AGP & MISC

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

9 36

Rev

20

of

5

D D

VDD_18 VDDA_18

FB34 600_0805

C781

C782

VDD_18

0.22u

C783
39P

VDD_15VDD_15

C780

AD22

M12
M14
M16
M18
N11
N13
N15
N17
N19
N23
P10
P12
P14
P16
P18
P21
R11
R13
R15
R17
R19
K16
T18
U17
U19
U23
V18
V21
W19
J15
K21
L11
L13
L15
L17
L19
M10

T6
T8
U11
U13
U7
U9
V10
V12
V14
V6
V8
W11
W13
V4
W7
W9
AA13
Y14
R4
T14

4700p

4.7u/1206

VCC3 VDDA_18

VDD_18

C C

B B

A A

AC21
AD21

AA10

U2C

VDD33_1

VDDA18

VDD33_2

B13

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36

VAGP1
VAGP2
VAGP3
VAGP4
VAGP5
VAGP6
VAGP7
VAGP8
VAGP9
VAGP10
VAGP11
VAGP12
VAGP13
VAGP14
VAGP15
VAGP16
VAGP17
VAGP18
VAGP19
VAGP20

POWER

VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDD55
VDD56
VDD57
VDD58
VDD59
VDD60
VDD61
VDD62
VDD63
VDD64
VDD65
VDD66
VDD67
VDD68
VDD69
VDD70
VDD71
VDD72
VDD73
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
VDD43

VAGP22
VAGP23
VAGP24
VAGP25
VAGP26
VAGP27
VAGP28
VAGP29
VAGP30
VAGP31
VAGP32
VAGP33
VAGP34
VAGP35
VAGP36
VAGP37
VAGP38
VAGP39
VAGP21
VAGP40

B17
B21

B5

B9
D12
D16
D20

D4

D8
F10
F12
F14
F16
F18
F20

F6

F8
G11
G13
G15
G17
G19

G7

G9
H10
H12
H14
H16

H8
J11
J13
J23
K10
K12
K14

W15
AA4
AA7

H4

K6

K8

L7

L9
M6
M8
M4
N7
N9
P6
P8
R7
R9

T10
T12

5

4

U2D

V11

VSS139

V13

VSS140

V15

VSS141

V17

VSS142

V19

VSS143

V7

VSS144

V9

VSS145

W10

VSS146

W12

VSS147

W14

VSS148

W16

VSS149

W18

VSS150

V2

VSS151

W23

VSS152

W6

VSS153

W8

VSS154

Y17

VSS155

Y19

VSS156

Y21

VSS157

AA18

VSS1

AA20

VSS2

AA22

VSS3

AA24

VSS4

AB19

VSS5

U15

VSS6

AB23

VSS7

AA2

VSS8

AC10

VSS9

AC13

VSS10

AB17

VSS11

AC20

VSS12

AC22

VSS13

AC4

VSS14

AC7

VSS15

Y3

VSS16

B11

VSS17

B15

VSS18

B19

VSS19

B3

VSS20

B7

VSS21

C2

VSS22

C23

VSS23

D1

VSS24

D10

VSS25

D14

VSS26

D18

VSS27

D22

VSS28

D23

VSS29

D6

VSS30

E2

VSS31

E24

VSS32

P3

VSS33

F11

VSS34

F13

VSS35

F15

VSS36

F17

VSS37

F19

VSS38

F21

VSS39

F23

VSS40

J6

VSS73

H5

VSS74

K11

VSS75

U5

VSS158

K5

VSS159

N5

VSS160

U3

VSS161

T5

VSS162

M5

VSS163

AB5

VSS164

V5

VSS165

AB11

VSS166

AC16

VSS167

AB14

VSS168

W5

VSS169

N12

VSS101

N14

VSS102

N16

VSS103

N18

VSS104

M2

VSS105

N6

VSS106

N8

VSS107

P11

VSS108

P13

VSS109

P15

VSS110

P17

VSS111

4

GROUND

VSS137
VSS138
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136

VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99

VSS100

U6
U8
P19
P7
P9
R10
R12
R14
R16
R18
R23
R6
R8
T11
T13
T15
T17
T19
R2
T21
T7
T9
U10
U12
U14
Y10
U18
F3
F5
F7
F9
G10
G12
G14
G16
G18
L3
G20
G22
R5
G6
G8
H11
H13
H15
H17
Y6
H21
H23
H24
AC2
H7
H9
J10
J12
J14
J16
J18
J22
K13
K15
K17
K19
J2
K20
K7
K9
L10
L12
L14
L16
L18
L23
L6
L8
M11
M13
M15
M17
M19
M21
M7
M9
N10

3

VDD_18

C762

C763

0.22u

C764

0.22u

0.22u

VDD_15

C771

VDD_12_A

VDD_12_A

C770

0.22u/BOT

C784

0.22u

C794

0.22u

0.22u/BOT

C785

0.22u

C795

0.22u

C772

C773

0.22u/BOT

4700p/BOT

Put on LDT pour.

C786

C787

0.22u

0.22u

Put on LDT plan.

C796

C797

0.22u

0.22u

VCC3

C804

0.22u

3

C788
X_0.22u

C798

0.22u

C774

4700p/BOT

2

C789

0.22u

C799

0.22u

2

C775
4700p

C790

0.22u

C800

0.22u

VDD_18

A

C760

C776
1500p/BOT

100u/10V

C791

0.22u

C801
X_0.22u

C761

4.7u/1206

C777
1500p/BOT

C792

0.22u

C802
X_0.22u

C160

CT21

470u/16V

VDD_15

C769

104P/BOT

A

100u/10V

+

C779

X_39P
C778
1500p/BOT

VDD_12_A

A

C793

100u/10V

VDD_12_A

A

C803

100u/10V

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

LOKAR POWER & GND

1

C161

X_104P/BOT

+

CT22

470u/16V

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

VDD_18

C162
X_104P/BOT

10 36

Rev

20

of

5

4

3

2

1

SYSTEM MEMORY

VDD_25_SUS

D D

738467085

108

120

148

168223054627796

VDD0

VDD1

VDD2

VDD3

VDD4

VDD5

VDD6

DR_MD[63..0]12,13,14

C C

B B

VDD_25_SUS

-MSWEA4,13

VDD_25_SUS

A A

R77 1KST

DR_MD[63..0]

R76 4.7K

C163

R78

1000P

1KST

Place 104p Cap. near the DIMM

DDR_VREF

DR_MD0
DR_MD1
DR_MD2
DR_MD3
DR_MD4
DR_MD5
DR_MD6
DR_MD7
DR_MD8
DR_MD9
DR_MD10
DR_MD11
DR_MD12
DR_MD13
DR_MD14
DR_MD15
DR_MD16
DR_MD17
DR_MD18
DR_MD19
DR_MD20
DR_MD21
DR_MD22
DR_MD23
DR_MD24
DR_MD25
DR_MD26
DR_MD27
DR_MD28
DR_MD29
DR_MD30
DR_MD31
DR_MD32
DR_MD33
DR_MD34
DR_MD35
DR_MD36
DR_MD37
DR_MD38
DR_MD39
DR_MD40
DR_MD41
DR_MD42
DR_MD43
DR_MD44
DR_MD45
DR_MD46
DR_MD47
DR_MD48
DR_MD49
DR_MD50
DR_MD51
DR_MD52
DR_MD53
DR_MD54
DR_MD55
DR_MD56
DR_MD57
DR_MD58
DR_MD59
DR_MD60
DR_MD61
DR_MD62
DR_MD63

WP1

-MSWEA

C164
104P

2

DQ0

4

DQ1

6

DQ2

8

DQ3

94

DQ4

95

DQ5

98

DQ6

99

DQ7

12

DQ8

13

DQ9

19

DQ10

20

DQ11

105

DQ12

106

DQ13

109

DQ14

110

DQ15

23

DQ16

24

DQ17

28

DQ18

31

DQ19

114

DQ20

117

DQ21

121

DQ22

123

DQ23

33

DQ24

35

DQ25

39

DQ26

40

DQ27

126

DQ28

127

DQ29

131

DQ30

133

DQ31

53

DQ32

55

DQ33

57

DQ34

60

DQ35

146

DQ36

147

DQ37

150

DQ38

151

DQ39

61

DQ40

64

DQ41

68

DQ42

69

DQ43

153

DQ44

155

DQ45

161

DQ46

162

DQ47

72

DQ48

73

DQ49

79

DQ50

80

DQ51

165

DQ52

166

DQ53

170

DQ54

171

DQ55

83

DQ56

84

DQ57

87

DQ58

88

DQ59

174

DQ60

175

DQ61

178

DQ62

179

DQ63

90

WP(NC)

63

WE#

1

VREF

9

NC2

101

NC3

102

NC4

VDD7

SLAVE ADDRESS = 1010000B

VSS0

VSS1

VSS2

VSS3

VSS4

3111826344250586674818993

104

112

128

VDD8

VDDQ0

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VDDQ5

VDDQ6

VDDQ7

VDDQ8

DDR DIMM

SOCKET

VSS5

VSS6

VSS7

VSS8

VSS9

VSS10

VSS11

VSS12

VSS13

VSS14

100

116

136

143

156

164

VDDQ9

VDDQ10

VDDQ11

VDDQ12

184

PIN

VSS15

VSS16

VSS17

VSS18

124

132

139

145

172

1801582

VDDQ13

VSS19

152

160

VDDQ14

VDDQ15

CK0#(DU)
CK1(CK0)

CK1#(CK0#)

CK2#(DU)

NC(RESET#)

VSS20

VSS21

176

VDDID

CS0#
CS1#
CS2#
CS3#

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

FETEN

A10_AP

CK0(DU)

CK2(DU)

CKE0
CKE1
CAS#
RAS#

184

VDDSPD

157
158
71
163

5
14
25
36
56
67
78
86
47

167
48

A0

43

A1

41

A2

130

A3

37

A4

32

A5

125

A6

29

A7

122

A8

27

A9

141
118

A11

115

A12

103

A13

59

BA0

52

BA1

113

BA2

92

SCL

91

SDA

181

SA0

182

SA1

183

SA2

DR_CHECK0 DR_CHECK[7..0]

44

CB0

DR_CHECK1

45

CB1

DR_CHECK2

49

CB2

DR_CHECK3

51

CB3

DR_CHECK4

134

CB4

DR_CHECK5

135

CB5

DR_CHECK6

142

CB6

DR_CHECK7

144

CB7

16
17
137
138
76
75

173

NC5

10
21

111
65
154

97

DM0

107

DM1

119

DM2

129

DM3

149

DM4

159

DM5

169

DM6

177

DM7

140

DM8

DDR1
DDRDIMM_184

-MCS0

-MCS1

-DR_MDQS0

-DR_MDQS1

-DR_MDQS2

-DR_MDQS3

-DR_MDQS4

-DR_MDQS5

-DR_MDQS6

-DR_MDQS7

-DR_MDQS8
MAA13
MAA0

MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12

SMBCLK1
SMBDATA1

MEMCLK_H5
MEMCLK_L5
MEMCLK_H0
MEMCLK_L0
MEMCLK_H7
MEMCLK_L7

MEMRESET_L

MCKE0
MCKE1

-MSCASA

-MSRASA

-MCS0 4,13

-MCS1 4,13

-DR_MDQS0 12,13,14

-DR_MDQS1 12,13,14

-DR_MDQS2 12,13,14

-DR_MDQS3 12,13,14

-DR_MDQS4 12,13,14

-DR_MDQS5 12,13,14

-DR_MDQS6 12,13,14

-DR_MDQS7 12,13,14

-DR_MDQS8 12,13,14

MAA[14..0]

MEMBANKA0 4,13
MEMBANKA1 4,13

SMBCLK1 7,12,26,33
SMBDATA1 7,12,26,33

MEMCLK_H5 4,13
MEMCLK_L5 4,13
MEMCLK_H0 4,13
MEMCLK_L0 4,13
MEMCLK_H7 4,13
MEMCLK_L7 4,13

MEMRESET_L 4,12
MCKE0 4,12,13

MCKE1 4,12,13

-MSCASA 4,13

-MSRASA 4,13

MAA[14..0] 4,13

DR_CHECK[7..0] 12,13,14

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

System Memory : DDR DIMM 1

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

11 36

Rev

20

of

5

SYSTEM MEMORY

4

3

2

1

D D

C165
104P

DR_MD0
DR_MD1
DR_MD2
DR_MD3
DR_MD4
DR_MD5
DR_MD6
DR_MD7
DR_MD8
DR_MD9
DR_MD10
DR_MD11
DR_MD12
DR_MD13
DR_MD14
DR_MD15
DR_MD16
DR_MD17
DR_MD18
DR_MD19
DR_MD20
DR_MD21
DR_MD22
DR_MD23
DR_MD24
DR_MD25
DR_MD26
DR_MD27
DR_MD28
DR_MD29
DR_MD30
DR_MD31
DR_MD32
DR_MD33
DR_MD34
DR_MD35
DR_MD36
DR_MD37
DR_MD38
DR_MD39
DR_MD40
DR_MD41
DR_MD42
DR_MD43
DR_MD44
DR_MD45
DR_MD46
DR_MD47
DR_MD48
DR_MD49
DR_MD50
DR_MD51
DR_MD52
DR_MD53
DR_MD54
DR_MD55
DR_MD56
DR_MD57
DR_MD58
DR_MD59
DR_MD60
DR_MD61
DR_MD62
DR_MD63

WP2

-MSWEB

C751
1000P

2

DQ0

4

DQ1

6

DQ2

8

DQ3

94

DQ4

95

DQ5

98

DQ6

99

DQ7

12

DQ8

13

DQ9

19

DQ10

20

DQ11

105

DQ12

106

DQ13

109

DQ14

110

DQ15

23

DQ16

24

DQ17

28

DQ18

31

DQ19

114

DQ20

117

DQ21

121

DQ22

123

DQ23

33

DQ24

35

DQ25

39

DQ26

40

DQ27

126

DQ28

127

DQ29

131

DQ30

133

DQ31

53

DQ32

55

DQ33

57

DQ34

60

DQ35

146

DQ36

147

DQ37

150

DQ38

151

DQ39

61

DQ40

64

DQ41

68

DQ42

69

DQ43

153

DQ44

155

DQ45

161

DQ46

162

DQ47

72

DQ48

73

DQ49

79

DQ50

80

DQ51

165

DQ52

166

DQ53

170

DQ54

171

DQ55

83

DQ56

84

DQ57

87

DQ58

88

DQ59

174

DQ60

175

DQ61

178

DQ62

179

DQ63

90

WP(NC)

63

WE#

1

VREF

9

NC2

101

NC3

102

NC4

VDD_25_SUS

DR_MD[63..0]

R79 4.7K

-MSWEB4,13

DDR_VREF

DR_MD[63..0]11,13,14

C C

B B

Place 104p and 1000p Cap.
near the DIMM

A A

VDD_25_SUS

738467085

108

120

148

VDD0

VDD1

VDD2

VDD3

VDD4

VDD5

168223054627796

VDD6

VDD7

VDD8

VDDQ0

VDDQ1

VDDQ2

VDDQ3

VDDQ4

VDDQ5

104

VDDQ6

112

VDDQ7

128

VDDQ8

136

143

VDDQ9

VDDQ10

156

184

DDR DIMM

SOCKET

SLAVE ADDRESS = 1010001B

VSS0

VSS1

VSS2

VSS3

VSS4

VSS5

VSS6

VSS7

VSS8

VSS9

VSS10

VSS11

VSS12

VSS13

VSS14

VSS15

VSS16

3111826344250586674818993

100

116

124

132

139

164

172

1801582

VDDQ11

VDDQ12

VDDQ13

PIN

VSS17

VSS18

VSS19

145

152

160

VDDQ14

VDDQ15

CK0#(DU)
CK1(CK0)

CK1#(CK0#)

CK2#(DU)

NC(RESET#)

VSS20

VSS21

176

VDDID

CS0#
CS1#
CS2#
CS3#

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8

FETEN

A10_AP

CK0(DU)

CK2(DU)

CKE0
CKE1
CAS#

RAS#

184

VDDSPD

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9

A11
A12
A13

BA0
BA1
BA2
SCL

SDA

SA0
SA1
SA2

CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7

NC5

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8

157
158
71
163

5
14
25
36
56
67
78
86
47

167
48

43
41
130
37
32
125
29
122
27
141
118
115
103

59
52
113
92
91
181
182
183

DR_CHECK0

44

DR_CHECK1

45

DR_CHECK2

49

DR_CHECK3

51

DR_CHECK4

134

DR_CHECK5

135

DR_CHECK6

142

DR_CHECK7

144
16

17
137
138
76
75

173
10

21
111
65
154

97
107
119
129
149
159
169
177
140

DDR2
DDRDIMM_184

-MCS2

-MCS3

-DR_MDQS0

-DR_MDQS1

-DR_MDQS2

-DR_MDQS3

-DR_MDQS4

-DR_MDQS5

-DR_MDQS6

-DR_MDQS7

-DR_MDQS8
MAB13
MAB0

MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12

SMBCLK1
SMBDATA1

VDD_25_SUS

MEMCLK_H4
MEMCLK_L4
MEMCLK_H1
MEMCLK_L1
MEMCLK_H6
MEMCLK_L6

MEMRESET_L
MCKE0

MCKE1

-MSCASB

-MSRASB

-MCS2 4,13

-MCS3 4,13

-DR_MDQS0 11,13,14

-DR_MDQS1 11,13,14

-DR_MDQS2 11,13,14

-DR_MDQS3 11,13,14

-DR_MDQS4 11,13,14

-DR_MDQS5 11,13,14

-DR_MDQS6 11,13,14

-DR_MDQS7 11,13,14

-DR_MDQS8 11,13,14

MAB[14..0]

SMBCLK1 7,11,26,33
SMBDATA1 7,11,26,33

DR_CHECK[7..0]

MEMCLK_H4 4,13
MEMCLK_L4 4,13
MEMCLK_H1 4,13
MEMCLK_L1 4,13
MEMCLK_H6 4,13
MEMCLK_L6 4,13

MEMRESET_L 4,11

MCKE0 4,11,13
MCKE1 4,11,13

-MSCASB 4,13

-MSRASB 4,13

MAB[14..0] 4,13

MEMBAKB0 4,13
MEMBAKB1 4,13

DR_CHECK[7..0] 11,13,14

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

System Memory : DDR DIMM 2

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

12 36

Rev

20

of

5

DDR Terminations

4

3

2

1

VTT_DDR_SUS

-DR_MDQS4
DR_MD37
DR_MD33
DR_MD36

MAB8
MAA7
DR_MD22
DR_MD18

DR_CHECK5
MAB1
DR_CHECK4
MAA2

DR_MD30
DR_MD26
MAB3
MAA4

DR_MD59
DR_MD63
DR_MD58
DR_MD62

MAB5
DR_MD23
MAA8
DR_MD19

DR_MD11

MCKE04,11,12
MCKE14,11,12

DR_MD10

DR_MD43
DR_MD42

-DR_MDQS5

-MSCASB

-MSCASB4,12

MAA1

-DR_MDQS8
DR_CHECK1

DR_MD41
DR_MD45
DR_MD44
DR_MD40

RN3 8P4R-47

DR_MD1

D D

C C

DR_MD5
DR_MD4
DR_MD0

DR_MD7
DR_MD6
DR_MD2

-DR_MDQS0

DR_MD12
DR_MD9
DR_MD8
DR_MD3

DR_MD15
DR_MD14
DR_MD13

-DR_MDQS1

DR_MD17
MAB12
DR_MD16
DR_MD20

MAB11
MAA12
DR_MD21

-DR_MDQS2

MAB7
MAB9
MAA9
MAA11

DR_MD31

MAB2
MAA3

-DR_MDQS3
DR_MD29
DR_MD25

B B

MEMBANKA14,11

DR_MD28

MEMBAKB14,12

DR_CHECK6
MAB10

DR_CHECK2
MAB0
MAA10
MAA0

7 8
5 6
3 4
1 2

RN6 8P4R-47

7 8
5 6
3 4
1 2

RN9 8P4R-47

7 8
5 6
3 4
1 2

RN12 8P4R-47

7 8
5 6
3 4
1 2

RN15 8P4R-47

7 8
5 6
3 4
1 2

RN18 8P4R-47

7 8
5 6
3 4
1 2

RN21 8P4R-47

7 8
5 6
3 4
1 2

RN24 8P4R-47

7 8
5 6
3 4
1 2

RN27 8P4R-47

7 8
5 6
3 4
1 2

RN30 8P4R-47

7 8
5 6
3 4
1 2

RN33 8P4R-47

7 8
5 6
3 4
1 2

-MSWEA4,11

-MSRASA4,11

-MSRASB4,12

MEMBANKA04,11

-MSWEB4,12

-MCS14,11

-MSCASA4,11

-MCS04,11

-MCS34,12

-MCS24,12

MEMBAKB04,12

RN4 8P4R-47

-MSWEA

-MSRASA

-MSRASB

RN7 8P4R-47

DR_MD35
DR_MD39
DR_MD38
DR_MD34

RN10 8P4R-47

-MSWEB

-MCS1

-MSCASA

-MCS0

RN13 8P4R-47

DR_MD47

-MCS3

-MCS2
DR_MD46

RN16 8P4R-47

DR_MD49
MAA13
MAB13
DR_MD48

RN19 8P4R-47

DR_MD54

-DR_MDQS6
DR_MD53
DR_MD52

RN22 8P4R-47

DR_MD60
DR_MD51
DR_MD55
DR_MD50

RN25 8P4R-47

-DR_MDQS7DR_MD27
DR_MD57
DR_MD61
DR_MD56

RN28 8P4R-47

MAB4 DR_CHECK0
MAA6
MAB6
MAA5

DR_MD24

RN34 8P4R-47

DR_MD32
DR_CHECK7
DR_CHECK3

7 8
5 6
3 4
1 2

7 8
5 6
3 4
1 2

7 8
5 6
3 4
1 2

7 8
5 6
3 4
1 2

7 8
5 6
3 4
1 2

7 8
5 6
3 4
1 2

7 8
5 6
3 4
1 2

7 8
5 6
3 4
1 2

7 8
5 6
3 4
1 2

R627 47

7 8
5 6
3 4
1 2

VTT_DDR_SUS

RN2 8P4R-47

7 8
5 6
3 4
1 2

RN5 8P4R-47

7 8
5 6
3 4
1 2

RN8 8P4R-47

7 8
5 6
3 4
1 2

RN11 8P4R-47

7 8
5 6
3 4
1 2

RN14 8P4R-47

7 8
5 6
3 4
1 2

RN17 8P4R-47

7 8
5 6
3 4
1 2

RN20 8P4R-47

7 8
5 6
3 4
1 2

RN23 8P4R-47

7 8
5 6
3 4
1 2

RN26 8P4R-47

7 8
5 6
3 4
1 2

RN29 8P4R-47

7 8
5 6
3 4
1 2

VTT_DDR_SUS

-MCS2

-MCS24,12

-MCS3

-MCS34,12
MAB13

MAA13

MAB12
MAA12
MAB11
MAA11

MAB1
MAA1

MAB3
MAA3
MAB2
MAA2

MAB6

MAA6
MAB4
MAA4

MAB8
MAA8
MAB5

MAA5

MAA0

MAA10

MAB0

MAB10

-MSCASB

-MSCASB4,12

-MCS0

-MCS04,11

-MSCASA

-MSCASA4,11

-MCS1

-MCS14,11

MAA9
MAB9
MAB7
MAA7

-MSRASB

-MSRASB4,12

-MSRASA

-MSRASA4,11

-MSWEA

-MSWEA4,11

-MSWEB

-MSWEB4,12

MEMBAKB14,12

MEMBANKA14,11

MEMBAKB04,12

MEMBANKA04,11

MCKE14,11,12

MCKE04,11,12

CN1

8P4C-22P
CN2

8P4C-22P
CN3

8P4C-22P
CN4

8P4C-22P
CN5

8P4C-22P
CN6

8P4C-22P
CN7

8P4C-22P
CN8

8P4C-22P
CN9

8P4C-22P
CN10

8P4C-22P
CN11

8P4C-22P
CN12

8P4C-22P

12
34
56
78

12
34
56
78

12
34
56
78

12
34
56
78

12
34
56
78

12
34
56
78

12
34
56
78

12
34
56
78

12
34
56
78

12
34
56
78

12
34
56
78

12
34
56
78

MEMCLK_H5
MEMCLK_H4
MEMCLK_H7
MEMCLK_H6
MEMCLK_H1
MEMCLK_H0

MEMCLK_L[7..0]4,11,12

MEMCLK_H[7..0]4,11,12

-DR_MDQS[8..0]11,12,14

DR_MD[63..0]11,12,14

DR_CHECK[7..0]11,12,14

MAB[14..0]4,12
MAA[14..0]4,11

R80 120RST
R81 120RST
R82 120RST
R83 120RST
R84 120RST
R85 120RST

MEMCLK_L[7..0]
MEMCLK_H[7..0]

-DR_MDQS[8..0]

DR_MD[63..0]
MAB[14..0]
MAA[14..0]

DR_CHECK[7..0]

MEMCLK_L5
MEMCLK_L4
MEMCLK_L7
MEMCLK_L6
MEMCLK_L1
MEMCLK_L0

A A

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

DDR Terminations Bank 0

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

13 36

Rev

20

of

5

4

3

2

1

LAYOUT: Place on backside,

DDR Terminations

D D

C C

B B

MEMCHECK4
MEMCHECK5

MEMCHECK0
MEMCHECK1

-MDQS[8..0]4

-DR_MDQS[8..0]11,12,13

A A

DR_MD[63..0]11,12,13

MD[63..0]4

MEMCHECK[7..0]4

DR_CHECK[7..0]11,12,13

RN36 8P4R-10

MD0

1 2

MD4

3 4

MD5

5 6

MD1

7 8

RN38 8P4R-10

-MDQS0

1 2
3 4

MD6 DR_MD6

5 6

MD7 DR_MD7

7 8

RN40 8P4R-10

1 2

MD8 DR_MD8

3 4

MD9 DR_MD9

5 6
7 8

RN44 8P4R-10

-MDQS1

1 2

MD13 DR_MD13

3 4

MD14

5 6

MD15 DR_MD15

7 8

RN46 8P4R-10

1 2

-MDQS2

3 4

MD21 DR_MD21

5 6

MD18

7 8

RN48 8P4R-10

MD10

1 2
3 4

MD20 DR_MD20

5 6

MD16 DR_MD16

7 8

RN50 8P4R-10

1 2

MD19 DR_MD19

3 4
5 6

MD24

7 8

RN52 8P4R-10

1 2

MD25

3 4
5 6

-MDQS3

7 8

RN54 8P4R-10

MD26

1 2
3 4

MD27

5 6

MD31 DR_MD31

7 8

1 2
3 4
5 6
7 8

RN56

-DR_MDQS0
DR_MD2MD2

DR_MD3MD3

DR_MD12MD12

-DR_MDQS1
DR_MD14

DR_MD17MD17

-DR_MDQS2
DR_MD18

DR_MD10
DR_MD11MD11

DR_MD22MD22
DR_MD23MD23

DR_MD24

DR_MD28MD28
DR_MD25
DR_MD29MD29

-DR_MDQS3

DR_MD26
DR_MD30MD30
DR_MD27

DR_CHECK4
DR_CHECK5

DR_CHECK0
DR_CHECK1

8P4R-10

-MDQS[8..0]

-DR_MDQS[8..0]
DR_MD[63..0]
MD[63..0]
MEMCHECK[7..0]

DR_CHECK[7..0]

5

DR_MD0
DR_MD4
DR_MD5
DR_MD1

RN37 8P4R-10

MEMCHECK3 DR_CHECK3

-MDQS8
MEMCHECK2

1 2
3 4
5 6
7 8

RN39 8P4R-10

1 2

MD37 DR_MD37

3 4

-MDQS4

5 6

MD34 DR_MD34

7 8

RN41 8P4R-10

1 2

MD38 DR_MD38

3 4
5 6

MD35 DR_MD35

7 8

RN43 8P4R-10

1 2

MD44 DR_MD44

3 4

MD45

5 6

MD41 DR_MD41

7 8

RN45 8P4R-10

-MDQS5

1 2
3 4

MD42 DR_MD42

5 6
7 8

RN47 8P4R-10

1 2
3 4

MD48 DR_MD48

5 6
7 8

RN49 8P4R-10

1 2
3 4

-MDQS6

5 6

MD54

7 8

RN51 8P4R-10

1 2

MD55

3 4

MD51 DR_MD51

5 6

MD60 DR_MD60

7 8

RN53 8P4R-10

MD56

1 2

MD61

3 4

MD57 DR_MD57

5 6

-MDQS7

7 8

RN55 8P4R-10

1 2
3 4

MD63 DR_MD63

5 6
7 8

1 2
3 4
5 6

MEMCHECK6

7 8

-DR_MDQS4

-DR_MDQS5

-DR_MDQS6

-DR_MDQS7

RN57

DR_CHECK2

DR_CHECK7MEMCHECK7
DR_MD32MD32
DR_MD36MD36

DR_MD33MD33

DR_MD39MD39

DR_MD40MD40
DR_MD45

DR_MD43MD43

DR_MD46MD46
DR_MD47MD47

DR_MD49MD49

DR_MD52MD52
DR_MD53MD53

DR_MD54

DR_MD50MD50
DR_MD55

DR_MD56
DR_MD61

DR_MD62MD62
DR_MD58MD58

DR_MD59MD59

-DR_MDQS8

DR_CHECK6

8P4R-10

4

evenly spaced around VTT fill.

VDD_25_SUS VDD_25_SUS

VTT_DDR_SUS VTT_DDR_SUS

C199

X_0.22uF

<nopop>

C201

X_0.22uF

<nopop>

C208

X_0.22uF

<nopop>

C210

X_0.22uF

<nopop>

C212

X_0.22uF

<nopop>

VDD_25_SUS VDD_25_SUS VDD_25_SUS VDD_25_SUS VDD_25_SUS

VTT_DDR_SUS

104P

C248

VTT_DDR_SUS

104P

C265

LAYOUT: Add 100pF and 1000pF on VTT fill near
Clawhammer and near DIMMs (both sides).

VTT_DDR_SUS

C284

VTT_DDR_SUS

3

C844

4.7u/0805

C845

4.7u/0805

C200

X_0.22uF

<nopop>

C202

X_0.22uF

<nopop>

C209

X_0.22uF

<nopop>

C211

X_0.22uF

<nopop>

C213

X_0.22uF

<nopop>

C214

104P
C219

104P
C224

104P
C229

104P

C234

104P

C239

104P
C244

104P

104P

104P

C249

C250

104P

104P

C267

C266

C215

104P
C220

104P

C225

104P
C230

104P

C235

104P

C240

104P

C245

104P

104P

104P

C252

C251

C268

C253

104P

104P

C270

C269

LAYOUT: Place alternating caps to GND and VDD_2.5_SUS
in a single line along VTT island.

LAYOUT: Locate close to Clawhammer socket.

VTT_DDR_SUS

A

A

C203

C216

104P
C221

104P
C226

104P

C231

104P

C236

104P

C241

104P

C246

104P

104P

C255

104P

C254

104P

104P

104P

C271

104P

C256

104P

104P

C273

C272

C205

C204

100u/10V

100u/10V

104P

C257

104P

C258

104P

C275

104P

C274

VDD_25_SUS

0.22u

C206

4.7u/1206

GND

C217

104P

C222

104P

C227

104P

C232

104P

C237

104P

C242

104P

C247

104P

104P

C259

C260

104P

C276

C277

VTT_DDR_SUS

C207

A

220uF

VTT_DDR_SUSVTT_DDR_SUSVTT_DDR_SUSVTT_DDR_SUSVTT_DDR_SUS

C218

104P

C223

104P

C228

104P

C233

104P

C238

104P

C243

104P

104P

C262

104P

104P

C261

104P

104P

104P

C278

C279

104P

104P

C264

C263

GND

104P

104P

C280

C281

GND

LAYOUT: Place one 1210 10uF capacitor

on each end of the VTT island.

VTT_DDR_SUS

0.22u

C850

0.22u

C851

C852

100P

100P

C287

C286

C285

1000P

C846

4.7u/0805

C847

4.7u/0805

C288

1000P

1000P

C848

4.7u/0805

100P

100P

C291

C290

C289

2

GND

GND

C849

4.7u/0805

1000P

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

VTT_DDR_SUS

0.22u

0.22u

C853

CT18

CT19

10u/16V/1210

GND

Micro Star Restricted Secret

10u/16V/1210

GND

DDR Terminations Bank 1

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

14 36

1

of

Rev

20

5

4

3

2

1

VDD_15

D D

-PIRQB17,19,20,23,33,36

AGPCLK9 A_RESET_L 9

A_REQ_L9

A_ST09 A_ST1 9
A_ST29

A_RBF_L9

A_DBIL9

C C

A_ADSTB1_P9

VDD_15

A_CBE2_L9

B B

A_SBA[7..0]9

A_AD[31..0]9

A A

A_CBE1_L9

A_ADSTB0_P9 A_ADSTB0_N 9

A_REFCG9

A_SBA[7..0]

A_AD[31..0]

AGP 2X/4X/8X SLOT(AGP VER:3.0 COMPLY)

VCC = 50mils trace /
15 mils space

VCC

VCC3

A_SBA0
A_SBA2

A_SBA4
A_SBA6

A_AD31
A_AD29

A_AD27
A_AD25

A_AD23
A_AD21

A_AD19
A_AD17

-GPERR

-GSERR

A_AD14
A_AD12

A_AD10
A_AD8

A_AD7
A_AD5

A_AD3
A_AD1

R566 X_0

5

V_CG V_GC

C311 104P

AGP1

B1

-OVRCNT

B2

5V

B3

5V

B4

USB+

B5

GND

B6

-INTB

B7

CLK

B8

-REQ

B9

3.3V

B10

ST0

B11

ST2

B12

-RBF

B13

GND

B14

RESERVED

B15

SBA0

B16

3.3V

B17

SBA2

B18

SB_STB

B19

GND

B20

SBA4

B21

SBA6

B22

RESERVED

B23

GND

B24

AUX3V

B25

3.3V

B26

AD31

B27

AD29

B28

3.3V

B29

AD27

B30

AD25

B31

GND

B32

AD_STB1

B33

AD23

B34

VDDQ

B35

AD21

B36

AD19

B37

GND

B38

AD17

B39

C/-BE2

B40

VDDQ

B41

-IRDY

B42

AUX3V

B43

GND

B44

RESERVED

B45

3.3V

B46

-DEVSEL

B47

VDDQ

B48

-PERR

B49

GND

B50

-SERR

B51

C/-BE1

B52

VDDQ

B53

AD14

B54

AD12

B55

GND

B56

AD10

B57

AD8

B58

VDDQ

B59

AD_STB0

B60

AD7

B61

GND

B62

AD5

B63

AD3

B64

VDDQ

B65

AD1

B66

VREF_CG

AGP_V3.0

FRAME_L
IRDY_L
DEVSEL_L
TRDY_L

-TYPEDET

RESERVED

USB-

-INTA

-RST

-GNT

RESERVED

-PIPE

-WBF
SBA1

SBA3

-SB_STB
SBA5

SBA7

RESERVED
RESERVED

AD30
AD28

AD26
AD24

-AD_STB1
C/-BE3

VDDQ

AD22
AD20

AD18
AD16

VDDQ

-FRAME

RESERVED
RESERVED

-TRDY

-STOP

-PME

AD15

VDDQ

AD13
AD11

C/-BE0

VDDQ

-AD_STB0

VDDQ

VREF_GC

1 2
3 4
5 6
7 8

12V

GND

3.3V
ST1

GND

3.3V

GND

GND

3.3V

3.3V

GND

GND

GND

3.3V

GND
PAR

GND

AD9

AD6

GND

AD4
AD2

AD0

8P4R-10

RN119

VCC3

R594

+12V

A_SBA1
A_SBA3

A_SBA5
A_SBA7

A_AD30
A_AD28

A_AD26
A_AD24

A_AD22
A_AD20

A_AD18
A_AD16

FRAME_LIRDY_L

TRDY_LDEVSEL_L

A_AD15
A_AD13

A_AD11
A_AD9

A_AD6
A_AD4

A_AD2
A_AD0

R567 X_0

1K

R685 10K

A_GC8XDET_L 9

-PIRQA 17,19,20,33,36
A_GNT_L 9

VCC3

A_MB8XDET_L 9
A_DBIH 9

A_WBF_L 9

A_SBSTB_N 9A_SBSTB_P9

A_ADSTB1_N 9
A_CBE3_L 9

VDD_15

A_STOP_L 9

-PCI_PME 17,19,20,23,26,28,33,36
A_PAR 9

A_CBE0_L 9

A_REFGC 9

GC8X

A_TYPEDET_L 9

GC8X

A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49
A50
A51
A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62
A63
A64
A65
A66

VCC

R562

R559

1.02KST

1K

REFGC REFCG

GC8XDET GC8XDET

Q82

2N3904S

CE

B

YFET-NDS7002AS

Q68

AGP SLOT DECOUPLING CAPACITORS

VDD_15 VCC3+12V

C294 104P
C298 104P/BOT
C301 104P/BOT C302 104P
C303 104P
C305 104P
C306 104P
C307 104P
C309 104P
C310 104P
C312 104P/BOT
C313 104P/BOT
C314 104P

CLOSE TO AGP SLOT.

A_FRAME_L 9
A_IRDY_L 9
A_DEVSEL_L 9
A_TRDY_L 9

4

3

R560

2.37KST

A_REFGC

R564

2.37KST

Q69

YFET-NDS7002AS

FOR AGP_VREF TEST.

AGP2.0 AGP3.0

R562 1.30K 1.02K 1.02K
R560 2.32K 2.32K 2.32K
R564 1.54K 2.32K 3.32K

C292 104P
C295 104P

600mv 750mv 350mv

VCC

+

CT2
470u/16V

C296 104P
C299 104P

VCC

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

2

http://www.msi.com.tw

VDD_15

R561

2.37KST

V_CG

R563

1.02KST

C293 104P
C297 104P
C300 104P

C304 104P

C308 104P

R565

2.37KST

VCC3

+

VCC3

Micro Star Restricted Secret

AGP Slot

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

CT3
1000u/6.3V

15 36

of

Rev

20

5

D D

4

3

2

1

R87

LDRQ1_L

X_100K

VCC3

NOTE: LDRQ1_L is pulled-up
because it is not used (LPC
Specification v. 1.0, Section 10.1).

C C

Link 1 Is Lokar <--> Thor

VDD_25_SB

C315
104P

HTRST_L

B B

To Clawhammer

RESET_CPU_L5

To Lokar

RESET_TNL_L9

LAYOUT: Put series resistors as
close to AND gate as possible.

53

1
2

R97 33

R101 33

U47

NC7WZ08

HTRST_BUF_L

4

HTRST_BUF_L

L1_CADOUT_H[7..0]8
L1_CADOUT_L[7..0]8

JHT_RST

2
1

YJ102

SB_OSC147

-LPC_FRAME26,27
LPC_AD326,27
LPC_AD226,27
LPC_AD126,27
LPC_AD026,27

LDRQ1_L26

-LPC_REQ33

L1_CLKOUT_H8
L1_CLKOUT_L8

L1_CTLOUT_H8
L1_CTLOUT_L8

HT_RST

VCC3

LDRQ1_L

L1_CADOUT_H7
L1_CADOUT_L7
L1_CADOUT_H6
L1_CADOUT_L6
L1_CADOUT_H5
L1_CADOUT_L5
L1_CADOUT_H4
L1_CADOUT_L4
L1_CADOUT_H3
L1_CADOUT_L3
L1_CADOUT_H2
L1_CADOUT_L2
L1_CADOUT_H1
L1_CADOUT_L1
L1_CADOUT_H0
L1_CADOUT_L0

R824 100
R93 470

R92 10K

MII_TX_CLK
MII_RX_CLK
MII_COL
MII_CRS

MII_RXD3
MII_RXD2
MII_RXD1
MII_RXD0

MII_RX_DV MII_RX_ER

HTRST_L

-LDTREQ

MII_RX_ER

NOTE: LDTREQ_L is only used
on mobile systems to leave
C3 low-power state.

PWRON_L17,31

AB18

AA26

W22
W23

AD26
AC25
AB23
AB25

AA22

C20
A24

A21
A20
D22
B22

D21
A19

L3
L4
K5
L5
J3
J4
H5
J5
F1

G1

F3
F2

D1

E1
D3
D2

H3

H2

K1

L1

P24

Y22

Y23

OSC
LFRAME_L

LAD3
LAD2
LAD1
LAD0

LDRQ1_L
LDRQ0_L

L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0

L0_CLKIN_H0
L0_CLKIN_L0

L0_CTLIN_H0
L0_CTLIN_L0

LDTRST_L
LDTREQ_L
M1_TX_CLK

M1_RX_CLK
M1_COL
M1_CRS

M1_RXD3
M1_RXD2
M1_RXD1
M1_RXD0

M1_RX_DV
M1_RX_ER

NOTE: HTSTOP_L needs to be
driven low during suspend states

A A

5

4

U3A

LPC/LEGACY SUPPORT

LDT

MII

LPC/LDT/MII

MII_MDIO

AC_SDIN017,21
AC_SDIN117

ACRTST_IN017

3

AC_SDIN0
MII_RXD1
AC_SDIN1
GPIO28

GPIO2817

GPIO17

GPIO1717

ACRTST_IN0
MII_RX_DV

SPKR

L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0

L0_CLKOUT_H0
L0_CLKOUT_L0

L0_CTLOUT_H0

L0_CTLOUT_L0

L0_COMP3
L0_COMP2
L0_COMP1
L0_COMP0

LDTSTOP_L

M1_TXD3
M1_TXD2
M1_TXD1
M1_TXD0

M1_MDC

M1_PHY_RST

M1_TX_EN

M1_MDIO

B21

L1_CADIN_H7

N5

L1_CADIN_L7

M5

L1_CADIN_H6

N4

L1_CADIN_L6

N3

L1_CADIN_H5

R5

L1_CADIN_L5

P5

L1_CADIN_H4

R4

L1_CADIN_L4

R3

L1_CADIN_H3

T2

L1_CADIN_L3

T3

L1_CADIN_H2

U1

L1_CADIN_L2

T1

L1_CADIN_H1

V2

L1_CADIN_L1

V3

L1_CADIN_H0

W1

L1_CADIN_L0

V1
R1

P1
M2

M3

L1_COMP3_IOH

U5

L1_COMP2_IOH

T5

L1_COMP1_IOH

G4

L1_COMP0_IOH

G3
AB15
AC24

AC26
AB24
AB26

AE26
Y24
AA24
AF25

YFET-NDS7002AS

RN112

1

1

2

2

3

3

4

4

6

6

7

7

8

8

9

9510

10P8R-10K

C826
X_105p

Q2

5

10

SPKR 18,32

L1_CADIN_H[7..0] 8
L1_CADIN_L[7..0] 8

L1_CLKIN_H 8
L1_CLKIN_L 8

L1_CTLIN_H 8
L1_CTLIN_L 8

R88 100RST
R89 49.9RST

R91 4.7K

MII_TX_EN
MII_MDIO

R90 49.9RST

VDD_25

HTSTOP_L 5,9

NOTE: MII_MDIO is pulled-down
because MII is connected through
a physical connector.

a physical connector. If it were on
the board, then it would need to be
pulled-up.

2

C736

C737

1000P

C738

1000P

1000P

VDD_12_AVDD_25

MII Termination

MII_RX_CLK
MII_RXD0

MII_RXD2

MII_RXD3
MII_TX_CLK

MII_COL
MII_CRS

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

THOR HT & LPC & MII

L1_COMP3_IOH
L1_COMP2_IOH
L1_COMP1_IOH
L1_COMP0_IOH

C739
1000P

RN111

1

1

2

2

3

3

4

4

6

6

7

7

8

8

9

9510

10P8R-10K

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

5

10

16 36

of

Rev

20

5

4

3

2

1

NOTE: Diode is for possible Clawhammer

VCC3

D D

C C

B B

A A

1 2
3 4
5 6
7 8

RN114 8P4R-10K

FERR_IOH_L

PICCLK_IOH
PICD0_IOH_L
PICD1_IOH_L

SB_PCLK7

-STOP19,20,23,33,36

-SERR19,20,23,33,36

-PERR19,20,23,33,36

-FRAME19,20,23,33,36

-IRDY19,20,23,33,36

-TRDY19,20,23,33,36

-DEVSEL19,20,23,33,36
PAR19,20,23,33,36

PREQ_L33

-PREQ[6..0]19,20,23,33,36

AD[31..0]18,19,20,23,36

C_-BE319,20,23,36
C_-BE219,20,23,36
C_-BE119,20,23,36
C_-BE019,20,23,36

-PIRQA15,19,20,33,36

-PIRQB15,19,20,23,33,36

-PIRQC19,20,33,36

-PIRQD19,20,33

DDRQP25
DRDYP25
DDRQS25
DRDYS25

5

-PREQ6

-PREQ5

-PREQ4

-PREQ3

-PREQ2

-PREQ1

-PREQ0
AD31

AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

AD14

AE20
AF13

AB13
AE12
AC12
AF11
AD11
AB11

AB10
AF10
AD10

B5

D5

E4
B4

AF5

AE6
AD6
AB5
AC5
AD5
AE5
AF6

AA5
AA3
AB1
AB2
AB3
AC1
AC3
AD1
AE1
AF1
AF2
AD3
AE3
AF3
AD4
AB4
AB6
AF7
AB7
AD8
AD7
AE8
AF8
AC8
AD9
AE9
AF9
AB9
AC9

AD2
AF4
AC6
AB8

Y5

AA1

Y4

AA2

A15

E15

C9

A8

FERR_L

PICCLK
PICD0_L
PICD1_L

PCLK
STOP_L

SERR_L
PERR_L
FRAME_L
IRDY_L
TRDY_L
DEVSEL_L
PAR

PREQ_L
REQ6_L

REQ5_L
REQ4_L
REQ3_L
REQ2_L
REQ1_L
REQ0_L

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

CBE_L3
CBE_L2
CBE_L1
CBE_L0

PIRQA_L
PIRQB_L
PIRQC_L
PIRQD_L

DDRQP
DRDYP
DDRQS
DRDYS

PCI/ULTRA DMA IDE

U3B

A20M_L

IGNNE_L

INIT_L

SMI_L

STPCLK_L

PGNT_L
GNT6_L

GNT5_L
GNT4_L
GNT3_L
GNT2_L
GNT1_L
GNT0_L

DDATA_P15
DDATA_P14
DDATA_P13
DDATA_P12
DDATA_P11
DDATA_P10

DDATA_P9
DDATA_P8
DDATA_P7
DDATA_P6
DDATA_P5
DDATA_P4
DDATA_P3
DDATA_P2
DDATA_P1
DDATA_P0

DDATA_S15
DDATA_S14
DDATA_S13
DDATA_S12
DDATA_S11
DDATA_S10

DDATA_S9
DDATA_S8
DDATA_S7
DDATA_S6
DDATA_S5
DDATA_S4
DDATA_S3
DDATA_S2
DDATA_S1
DDATA_S0

DRSTP_L
DIOWP_L

DIORP_L
DDACKP_L
DADDR_P2
DADDR_P1
DADDR_P0

DCS1P_L
DCS3P_L

DRSTS_L
DIOWS_L

DIORS_L
DADDR_S2
DADDR_S1
DADDR_S0

DCS1S_L
DCS3S_L

DDACKS_L

INTR

A3
E5

A5
C6
A6

NMI

C5
A4

THERMTRIP_CPU_L5

AD15
AB14

-PGNT5

AD13

-PGNT4

AF12

-PGNT3

AD12

-PGNT2

AB12

-PGNT1

AE11

-PGNT0

AC11

DDATA_P15

D16

DDATA_P14

C16

DDATA_P13

A16

DDATA_P12

E17

DDATA_P11

D18

DDATA_P10

C18

DDATA_P9

A18

DDATA_P8

E19

DDATA_P7

C19

DDATA_P6

D19

DDATA_P5

B18

DDATA_P4

E18

DDATA_P3

A17

DDATA_P2

C17

DDATA_P1

B16

DDATA_P0

E16

DDATA_S15

B9

DDATA_S14

D10

DDATA_S13

C10

DDATA_S12

A10

DDATA_S11

E11

DDATA_S10

D12

DDATA_S9

C12

DDATA_S8

A12

DDATA_S7

D13

DDATA_S6

B12

DDATA_S5

E12

DDATA_S4

A11

DDATA_S3

C11

DDATA_S2

B10

DDATA_S1

E10

DDATA_S0

A9
B19

B15
C15
D15
A13
E14
C14
B13
C13

E13
E9
D9
C7
A7
B7
E7
D7
E8

4

THERMTRIP_L leakage during S3

VDD_25

1K
R114

D19

THERMTRIP_IO_L

AC

1N4148S

NOTE: For USB 1.1, NOPOP FB and

use 10K resistor in place of 0.01uF cap.

-PGNT[6..0] 19,20,23,36

DDATA_P[15..0] 25

DDATA_S[15..0] 25

RESET_IDEP_L 25
DIOWP_L 25
DIORP_L 25
DDACKP_L 25
DADDR_P2 25
DADDR_P1 25
DADDR_P0 25
DCS1P_L 25
DCS3P_L 25

RESET_IDES_L 25
DIOWS_L 25
DIORS_L 25
DADDR_S2 25
DADDR_S1 25
DADDR_S0 25
DCS1S_L 25
DCS3S_L 25
DDACKS_L 25

VCC18_SB

FB2 X_120S/0603

VCC3_SB

FB3 120S/0603

C317
X_103P/BOT

X_104P/BOT

C319

104P/BOT

C323

0.022u

C320 15P

C321 15P

SR_S3_PLL_LF

SMBDATA1 & SMBCLK1 ARE USB1.0 COMPLIANT
SMBDATA2 & SMBCLK2 ARE USB2.0 COMPLIANT

SMBDATA2_SB19,33
SMBDATA1_SB26,33

VCC3_SB

SMBCLK2_SB19,33
SMBCLK1_SB26,33

3

AC_BITCLK21

AC_SDIN016,21
AC_SDIN116

ACRTST_IN016

USBCLK7
USB1_P224

USB1_N224
USB1_P124
USB1_N124
USB1_P024
USB1_N024

R830 10K

C318

LAYOUT: One 0.01uF

10K/BOT

cap goes on bottom.

USB0_P224
USB0_N224
USB0_P124
USB0_N124
USB0_P024
USB0_N024

USB0_OC_L31,36

32.768KHZ
Y1

-EXTSMI26

VCC3

THERM_L26

INTRUDER_L32

RI_L28

KBRC_L26

PWRBTIN32

ALL_POWERGOOD5,9,31

-PCI_PME15,19,20,23,26,28,33,36

R142 8.2K

C324
1200P

R776 200
R616 200

IRQ1525,33
IRQ1425,33

KA20G26

SMBALT136

AC_BITCLK
AC_SDIN0
AC_SDIN1

ACRTST_IN1
ACRTST_IN0

USB1_OC_L

USB_18VDD_IOH

USB_VDD_IOH

USB_VREF
USB_REXT

USB_IBIAS
RTC_IN

RTC_OUT
BATLOW_L

ACAV
CLKRUN_L

-EXTSMI

R595 8.2K

THERMTRIP_IO_L

FANRPM_IOH

LID
RI_L

IRQ12
IRQ6
IRQ1
INTIRQ8_L

SLPBTN_L
PWRBTIN

PNPIRQ2
PNPIRQ1
PNPIRQ0
PRDY

S3_PLL_LF
S3_PLL_LF_VSS

SMBCK2
SMBCK1

TEST_L

SMBALT1
SMBALT0

AB16

ACCLK

AF24

ACSDI0

AD23

ACSDI1

AD20

IPB_IN1

AB21

IPB_IN0

AF14

USBCLK

F26

USB1_USBP2

F25

USB1_USBN2

E25

USB1_USBP1

E24

USB1_USBN1

D26

USB1_USBP0

D25

USB1_USBN0

H23

USBOC1_L

K22

USB_18VDD0

L22

USB_18VDD1

J25

USB0_USBP2

J26

USB0_USBN2

K24

USB0_USBP1

K25

USB0_USBN1

L25

USB0_USBP0

L26

USB0_USBN0

G23

USBOC0_L

G26

USB_VDD0

H26

USB_VDD1

H24

USB_VREF

J23

USB_REXT

G24

USB_IBIAS

N25

RTCX_IN

N23

RTCX_OUT

W26

BATLOW_L

U25

ACAV

G22

CLKRUN_L

R26

EXTSMI_L

AD17

THERMTRIP_L

AF18

THERM_L

AF16

FANRPM

N24

INTRUDER_L

U23

LID

W25

RI_L

C8

IRQ15

A14

IRQ14

E22

IRQ12

A22

IRQ6

B24

IRQ1

C21

INTIRQ8_L

A25

KA20G

C22

KBRC_L

T26

SLPBTN_L

R24

PWRBTN_L

P26

PWROK

Y25

PME_L

AC14

PNPIRQ2

AF15

PNPIRQ1

AE15

PNPIRQ0

E21

PRDY

N26

S3_PLL_LF

P25

S3_PLL_LF_VSS

U26

SMBALERT1_L

T25

SMBALERT0_L

V26

SMBUSC_1

P22

SMBUSC_0

U22

SMBUSD_1

N22

SMBUSD_0

F22

TEST_L

GPIO30
AC_BITCLK
FANRPM_IOH
PNPIRQ1
PNPIRQ0
ACRTST_TDCLK
GPIO16
ACRTST_IN1

U3C

ACRST_L

ACSDO

ACSYNC

AC97

IPB INTERFACE

USB

IPB_OUT1
IPB_OUT0

IPB_RST_L
IPB_RDFRAME
IPB_TDFRAME

IPB_RDCLK
IPB_TDCLK

GPIO31
GPIO30
GPIO29
GPIO28
GPIO27
GPIO26
GPIO17
GPIO16
GPIO14

GPIO8
GPIO4

C32KHZ

CPUSLEEP_L

CPUSTOP_L

DCSTOP_L

AGPSTOP_L

FANCON1
FANCON0

SERIRQ

RESET_L

SYS MANG/MISC

PCISTOP_L

SUSPEND_L

PWRON_L

RPWRON

MISC FUNCTIONAL BLOCKS

RN117

1

5

1

2

2

3

3

4

4

6

6

7

7

8

8

9

10

9510

10P8R-10K

2

NC10
NC13
NC14
NC15
NC19
NC22
NC23
NC26
NC28
NC32
NC33

R141 1K

Q3

X_NDS351AN-S-SOT23

ON_PROT

R144

G

10K

S

R147 0

INTRUDER_L

THOR,PCI,IDE,AC97,MISC,USB

VCC3

RN113 8P4R-10K

1 2
3 4
5 6
7 8

R111 10K

VCC3_SB

R748 10K
R570 10K

R742 10KC316

R569 10K

RN115 8P4R-10K

-EXTSMI

1 2

SLPBTN_L

3 4

SMBALT0

5 6

SMBALT1

7 8

GPIO8

PNPIRQ2

GPIO29

PRDY

USB_REXT

ACRTST_RDCLK

RN116 8P4R-10K

GPIO14
ACAV
LID
BATLOW_L

THERMTRIP_IO_L

VCC3_SB

RPWRON 29,30,32

VCC5_SB

R143

X_10M

C325
X_104P

D

PWRON_L 16,31

INTRUDER_L 32

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

17 36

1

CLKRUN_L
IRQ12
TEST_L
IRQ1

IRQ6

RI_L
PWRBTIN

-CDC_DN
GPIO4

R119 10K
R121 10K
R126 10K
R130 10K

R131 3.09KST

R135 10K

1 2
3 4
5 6
7 8

VCC3_SB

C322 X_104P

of

VCC3_SB

Rev

20

AF23
AF19
AF20

AB19
AC20
AE23
AD21
AF21

AB17
AC18

F23
AC17
E20
AF22
AD18
B26
AE21
AD19
P23
C24
AD22

C32KHZ

W24

AE17
AF17
T23
AE18

AD16
AC15

C23
Y26

AE14
V24

U24
T24

H1

NC1

J1

NC2

M1

NC3

N1

NC4

K2

NC5

P2

NC6

K3

NC8

P3

NC9

U4
E3
AB20
T22
U3
F5
G5
E6
A1
A2
H22

-AC_RST 21
AC_SDOUT 21
AC_SYNC 21

ACRTST_RDCLK
ACRTST_TDCLK

-CDC_DN
GPIO30
GPIO29
GPIO28

GPIO28 16
DCABLEIDP_L 25
DCABLEIDS_L 25

GPIO17

GPIO17 16

GPIO16
GPIO14
GPIO8
GPIO4

-PCIRST

PWRON_IOH_L
RPWRON

VCC5_SB

PWRON_IOH_L

VBAT

R338 10K

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

C32KHZ 26

FANCON1_IOH 32
FANCON0_IOH 32

SERIRQ 26,33

-PCIRST 18

Micro Star Restricted Secret

5

VDD_18

F10

F9

VCC3

VCC3_SB

VCC18_SB

VDD_12_B1

VDD_12_A

C806
104P

AA10

AC21

AC10
AC13

AA17
AA18
AA19
AA20
AC16
AC19

AB22

AA23
AC23
AD24
AE25

AA21

W21

F8
F7
Y6

W6

V6
U6
K6
J6

H6
AA8
AA9

D17

D6

AC4
AC7

D8
D11
D14

AA4

F17
F18
F19
F20
D23

D20

M22

R22
V22

M23

R23
V23

K21
J21
H21
G21

Y21
V21

U21

Y1

Y2

Y3

W4

C1

C2

C3

D4
A26

A23

J22
K23
L23
D24
G25
H25

M25

C26
E26

M26

B20

D D

C C

C805
104P/BOT

B B

C752

4.7u/1206

VCC5_SB

VBAT

A A

VDD_CORE11
VDD_CORE10
VDD_CORE9
VDD_CORE8
VDD_CORE7
VDD_CORE6
VDD_CORE5
VDD_CORE4
VDD_CORE3
VDD_CORE2
VDD_CORE1
VDD_CORE12
VDD_CORE13
VDD_CORE14

VDD_IO22
VDD_IO23
VDD_IO1
VDD_IO2
VDD_IO3
VDD_IO4
VDD_IO5
VDD_IO6
VDD_IO7
VDD_IO8
VDD_IO9
VDD_IO10
VDD_IO12
VDD_IO13
VDD_IO14
VDD_IO15
VDD_IO16
VDD_IO17
VDD_IO18
VDD_IO19
VDD_IO20
VDD_IO21
VDD_IO122

VDDIOX1
VDDIOX2
VDDIOX3
VDDIOX4
VDDIOX5
VDDIOX6
VDDIOX7
VDDIOX8
VDDIOX9
VDDIOX10
VDDIOX11

VDD_COREXA4
VDD_COREXA3
VDD_COREXA2
VDD_COREXA1
VDD_COREXB5
VDD_COREXB4
VDD_COREXB3
VDD_COREXB2
VDD_COREXB1

VLDT0_A0
VLDT0_A1
VLDT0_A2
VLDT0_A3

VLDT0_B0
VLDT0_B1
VLDT0_B2
VLDT0_B3

VDD_REF
VDD_RTC

VSS25
VSS92
VSS93
VSS94
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105

POWER/GROUND

5

U3D

E23

VSS91

B6

VSS14

F24

VSS95

J24

VSS96

L24

VSS97

M24

VSS98

AC22

VSS1

B1

VSS2

B2

VSS3

E2

VSS4

G2

VSS5

J2

VSS6

L2

VSS7

N2

VSS8

R2

VSS9

U2

VSS10

W2

VSS11

AC2

VSS12

AE2

VSS13

B3

VSS15

W3

VSS16

C4

VSS17

F4

VSS18

H4

VSS19

K4

VSS20

M4

VSS21

P4

VSS22

T4

VSS23

V4

VSS24

AE4

VSS26

V5

VSS27

W5

VSS28

F6

VSS30

G6

VSS31

AA6

VSS32

AE7

VSS33

AA7

VSS34

B8

VSS35

AE10

VSS36

L11

VSS37

M11

VSS38

N11

VSS39

P11

VSS40

R11

VSS41

T11

VSS42

B11

VSS43

L12

VSS44

M12

VSS45

N12

VSS46

P12

VSS47

R12

VSS48

T12

VSS49

AE13

VSS50

L13

VSS51

M13

VSS52

N13

VSS53

P13

VSS54

R13

VSS55

T13

VSS56

L14

VSS57

M14

VSS58

N14

VSS59

P14

VSS60

R14

VSS61

T14

VSS62

B14

VSS63

L15

VSS64

M15

VSS65

N15

VSS66

P15

VSS67

R15

VSS68

T15

VSS69

AE16

VSS70

L16

VSS71

M16

VSS72

N16

VSS73

P16

VSS74

R16

VSS75

T16

VSS76

B17

VSS77

AE19

VSS78

B23

VSS79

F21

VSS80

AE22

VSS81

B25

VSS82

AE24

VSS83

C25

VSS84

K26

VSS85

R25

VSS86

V25

VSS87

AA25

VSS88

AD25

VSS89

AF26

VSS90

AD[31..0]17,19,20,23,36

SPKR16,32

AD15

R150 4.7K

AD14

R152 4.7K

AD13

R153 4.7K

AD11

R154 X_4.7K

R155 4.7K

AD10

R156 4.7K

AD9

R157 4.7K

AD8

R158 X_4.7K

R159 4.7K

AD7

R160 X_4.7K

R161 4.7K

AD6

R162 4.7K

AD5

R163 4.7K

R164 X_4.7K

AD4

R165 4.7K

AD3

R166 4.7K

AD2

R167 4.7K

AD1

R168 4.7K

AD0

R169 X_4.7K

R170 4.7K

R171 4.7K

4

-PCIRST17

VCC3

PIN

AD(15)

AD(14)

AD(13)

AD(12)

AD(10)

AD(9)

AD(8)

AD(7)

AD(6)

AD(5)

AD(4)

AD(3)

AD(2)

AD(1)

AD(0)

SPKR

NOTE: Change 47 Ohm resistor to
2k on a future revision of Thor.

4

3

VCC3_SB

C326 104P

VCC3_SB

R148 1K

YFET-NDS7002AS

STATE

1
0
1
0
1

0
1
0
1
0*
1*
0
1
0*
1
0*
1
0*
1
0*
1*
0
1
0*
1
0
1
0*
1
0*
1

1 BIOS ADDRESS SPACE IS LOCATED ON THE PCI BU S.
0*
1*

1
0

PCIRST

Q4

DESCRIPTION (AMD PERIPHERAL BUS CONTROLLER DevB:3x48)

RESERVED
RESERVED
RESERVED
RESERVED
RESERVED

RESERVED
THERE IS NO STRAPPING OPTION ASSOCIATED WITH AD(12).
THERE IS NO STRAPPING OPTION ASSOCIATED WITH AD(12).
THE COMPENSATION VALUES SPECIFIED BY DevA:0xE0 ARE USED BY THE HT PHY.AD(11)
THE AUTOMATIC PHY COMPENSATION CIRCUIT VALUES ARE USED BY THE HT PHY.
DO NOT REBOOT THE SYSTEM WHEN A DOUBLE TCO TIMER TIME OUT OCCURS.
REBOOT SYSTEM AS SPECIFIED BY PORTCF9 WHEN PM46 IS SET.
ACCESSES TO BIOS USE THE FWHUB PROTOCOL OVER THE LPC BUS.
NORMAL LPC PROTOCOL IS USED FOR BIOS ACCESES.
THE DEFAULT BASE UNIT ID IS 01h.
THE DEFAULT BASE UNIT ID IS 00h.
HT MESSAGES ARE NOT USED FOR INTR,NMI,SMI#,INIT#,STPCLK#,IGNNE#,A20M#,PICD0#,PICD1#,PICCLK, AND FERR#.
HT MESSAGES ARE UTILIZED TO TRANSMIT THE STATE OF THE CPU SIGNALS LISTED ABOVE.
THE 400 MHZ OUTPUT OF THE VCO IS DRIVEN BY THE GPIO26 PIN.
THE PLL OPERATES NORMALLY.
THE NORMAL, GREATER THAN 1.5ms, RESET PULSE (AFTER PWROK GOES HIGH) IS SEL ECTED.
THE FAST, APPROXIMATELY 1.5us, RESET PULSE IS SELECTED.
GPIO PINS SPECIFIED BY PM[DF:C0] ARE IN TEST MODE FOR THE RNG AND PLL.
GPIO PINS ARE NOT IN TEST MODE.
RESERVED
RESERVED
400 MHZ HT CLOCK FREQUENCY.
200 MHZ HT CLOCK FREQUENCY.
THE SECONDARY PCI BUS BELONGS TO BUS 0.
THE SECONDARY PCI BUS IS ENBALED.

BIOS ADDRESS SPACE IS LOCATED ON THE LPC BUS.
SETS BIT 12 IN REGISTER DevB:3x48 TO 1.
SETS BIT 12 IN REGISTER DevB:3x48 TO 0.

52

1 6

U15A
NC7WZ14

VCC3_SB

52

3 4

NC7WZ14

U15B

-PCIRST_A

-PCIRST_B

R149 33

R151 33

* DEFAULT VALUE

VBAT1

BAT+ R_BAT+

R172 2.2K

12

BATTERY

3

2

-PCIRST1 23,26,27

-PCIRST2 19,20,36

VBAT

C327
1000P

2

JBAT1

1
2
3

YJ103

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

THOR POWER & STRIP

1

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

18 36

of

Rev

20

5

IDSEL=
AD20

PCI Connectors

4

AD[31..0]17,18,20,23,36

VCC3 VCC3 VCC3

VCC VCC VCC VCC

+12V

C_-BE[3..0]17,20,23,36

3

AD[31..0]

C_-BE[3..0]

2

1

VCC3

+12V

D D

C C

B B

PTCK20

-PIRQB15,17,20,23,33,36

-PIRQD17,20,33

PCICLK17 PCICLK27

-PREQ017,33

-IRDY17,20,23,33,36

-DEVSEL17,20,23,33,36

-PLOCK20,33

-PERR17,20,23,33,36

-SERR17,20,23,33,36

-ACK6420 -REQ64 20

-12V

PTCK

-PIRQB

-PIRQD
PCI1_PRS1

C827 103P

PCI1_PRS2 PCI2_PRS2

C829 103P

PCICLK1

-PREQ0
AD31 AD30

AD29
AD27 AD26

AD25
C_-BE3

AD23
AD21 AD20

AD19
AD17 AD16

C_-BE2

-IRDY

-DEVSEL

-PERR SMBCLK2

-SERR
C_-BE1

AD14
AD12 AD11

AD10

AD8 C_-BE0
AD7

AD5 AD4
AD3

AD1 AD0

-ACK64 -ACK64-REQ64 -REQ64

PCI1

B1

-12V

B2

TCK

B3

GND

B4

TDO

B5

+5V

B6

+5V

B7

INTB#

B8

INTD#

B9

PRSNT1#

B10

RSVD2

B11

PRSNT2#

B12

GND

B13

GND

B14

RSVD5

B15

GND

B16

CLK

B17

GND

B18

REQ#

B19

+5V

B20

AD31

B21

AD29

B22

GND

B23

AD27

B24

AD25

B25

+3.3V

B26

C/BE3#

B27

AD23

B28

GND

B29

AD21

B30

AD19

B31

+3.3V

B32

AD17

B33

C/BE2#

B34

GND

B35

IRDY#

B36

+3.3V

B37

DEVSEL#

B38

GND

B39

LOCK#

B40

PERR#

B41

+3.3V

B42

SERR#

B43

+3.3V

B44

C/BE1#

B45

AD14

B46

GND

B47

AD12

B48

AD10

B49

GND

B52

AD8

B53

AD7

B54

+3.3V

B55

AD5

B56

AD3

B57

GND

B58

AD1

B59

+5V

B60

ACK64#

B61

+5V

B62

+5V

YSLOT120

TRST#

+12V

TMS

INTA#

INTC#
RSVD1
RSVD3

GND
GND

RSVD4

RST#
GNT#

GND

RSVD6

AD30

+3.3V

AD28
AD26

GND

AD24

IDSEL#

+3.3V

AD22
AD20

GND
AD18
AD16

+3.3V

FRAME#

GND

TRDY#

GND

STOP#

+3.3V

SDONE

SBO#

GND

PAR
AD15

+3.3V

AD13
AD11

GND

C/BE0#

+3.3V

GND

REQ64#

A1
A2
A3
A4

TDI

A5

+5V

A6
A7
A8

+5V

A9
A10

+5V

A11
A12
A13
A14
A15
A16

+5V

A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49

AD9

A52
A53
A54

AD6

A55

AD4

A56
A57

AD2

A58

AD0

A59

+5V

A60
A61

+5V

A62

+5V

-PTRST

-PTRST 20

PTMS

PTMS 20

PTDI PTDI

PTDI 20

-PIRQA

-PIRQA 15,17,20,33,36

-PIRQC

-PIRQC 17,20,33,36

-PCIRST2

-PGNT0

-PCI_PME

AD28

AD24
AD20 AD21

AD22

AD18

-FRAME

-TRDY

-STOP

SMBDATA2
PAR

AD15
AD13

AD9

AD6

AD2

-PCIRST2 18,20,36

-PGNT0 17

-PCI_PME 15,17,20,23,26,28,33,36

-FRAME 17,20,23,33,36

-TRDY 17,20,23,33,36

-STOP 17,20,23,33,36
SMBCLK2 20,23,33

SMBDATA2 20,23,33
PAR 17,20,23,33,36

VCC3_SB

C328
X_104P

-PREQ117,33

IDSEL= AD20
INT#= A, B, C, D

C828
C830

PTCK

-PIRQC

-PIRQA
PCI2_PRS1

103P
103P

PCICLK2

-PREQ1

AD31
AD29

AD27
AD25

C_-BE3
AD23

AD21
AD19

AD17
C_-BE2

-IRDY

-DEVSEL

-PLOCK-PLOCK

-PERR

-SERR

C_-BE1
AD14

AD12
AD10

AD8
AD7

AD5
AD3

AD1

-12V

PCI2

B1

-12V

B2

TCK

B3

GND

B4

TDO

B5

+5V

B6

+5V

B7

INTB#

B8

INTD#

B9

PRSNT1#

B10

RSVD2

B11

PRSNT2#

B12

GND

B13

GND

B14

RSVD5

B15

GND

B16

CLK

B17

GND

B18

REQ#

B19

+5V

B20

AD31

B21

AD29

B22

GND

B23

AD27

B24

AD25

B25

+3.3V

B26

C/BE3#

B27

AD23

B28

GND

B29

AD21

B30

AD19

B31

+3.3V

B32

AD17

B33

C/BE2#

B34

GND

B35

IRDY#

B36

+3.3V

B37

DEVSEL#

B38

GND

B39

LOCK#

B40

PERR#

B41

+3.3V

B42

SERR#

B43

+3.3V

B44

C/BE1#

B45

AD14

B46

GND

B47

AD12

B48

AD10

B49

GND

B52

AD8

B53

AD7

B54

+3.3V

B55

AD5

B56

AD3

B57

GND

B58

AD1

B59

+5V

B60

ACK64#

B61

+5V

B62

+5V

YSLOT120

TRST#

+12V

INTA#

INTC#
RSVD1
RSVD3

RSVD4

RST#
GNT#

RSVD6

AD30

+3.3V

AD28
AD26

AD24

IDSEL#

+3.3V

AD22
AD20

AD18
AD16

+3.3V

FRAME#

TRDY#
STOP#

+3.3V

SDONE

SBO#

AD15

+3.3V

AD13
AD11

C/BE0#

+3.3V

REQ64#

A1
A2
A3

TMS

A4

TDI

A5

+5V

A6
A7
A8

+5V

A9
A10

+5V

A11
A12

GND

A13

GND

A14
A15
A16

+5V

A17
A18

GND

A19
A20
A21
A22
A23
A24

GND

A25
A26
A27
A28
A29
A30

GND

A31
A32
A33
A34
A35

GND

A36
A37

GND

A38
A39
A40
A41
A42

GND

A43

PAR

A44
A45
A46
A47
A48

GND

A49

AD9

A52
A53
A54

AD6

A55

AD4

A56

GND

A57

AD2

A58

AD0

A59

+5V

A60
A61

+5V

A62

+5V

-PTRST

-PIRQB

-PIRQD

-PCIRST2

-PGNT1

-PCI_PME
AD30

AD28
AD26

AD24

AD22
AD20

AD18
AD16

-FRAME

-TRDY

-STOP
SMBCLK2

SMBDATA2
PAR

AD15
AD13

AD11
AD9

C_-BE0
AD6

AD4
AD2

AD0

PTMS

VCC3_SBVCC3_SB

-PGNT1 17

IDSEL= AD21
INT#= B, C, D, A

SMBCLK2_SB

+12V

R173

Q6

3.3K
R174

SMB2_GR SMB2_G

10K

3

A A

-VDD_PWGD_526,31

5

4

YFET-NDS7002AS

Q5

YFET-NDS7002AS

SMBCLK2

SMBDATA2_SB

Q7

YFET-NDS7002AS

SMBDATA2

SMBCLK2_SB 17,33

R535

X_0

SMBDATA2_SB 17,33

R536

X_0

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

2

http://www.msi.com.tw

PCI Connector 1 & 2

MS-6589

Last Revision Date:

Sheet

1

Thursday, August 22, 2002

19 36

Rev

20

of

5

4

3

2

1

PCI Connectors

D D

PTCK19

-PIRQD17,19,33

-PIRQB15,17,19,23,33,36

C831
C833

PCICLK37

-PREQ217,33

C C

-IRDY17,19,23,33,36

-DEVSEL17,19,23,33,36

-PLOCK19,33

-PERR17,19,23,33,36

-SERR17,19,23,33,36

B B

VCC3 VCC3

VCC VCC

-12V

PTCK

-PIRQD

-PIRQB
PCI3_PRS1

103P

PCI3_PRS2

103P

PCICLK3

-PREQ2
AD31

AD29
AD27

AD25
C_-BE3

AD23
AD21

AD19
AD17

C_-BE2

-IRDY

-DEVSEL

-PERR

-SERR
C_-BE1

AD14
AD12

AD10

AD8
AD7

AD5
AD3

AD1

-ACK64

PCI3

B1

-12V

B2

TCK

B3

GND

B4

TDO

B5

+5V

B6

+5V

B7

INTB#

B8

INTD#

B9

PRSNT1#

B10

RSVD2

B11

PRSNT2#

B12

GND

B13

GND

B14

RSVD5

B15

GND

B16

CLK

B17

GND

B18

REQ#

B19

+5V

B20

AD31

B21

AD29

B22

GND

B23

AD27

B24

AD25

B25

+3.3V

B26

C/BE3#

B27

AD23

B28

GND

B29

AD21

B30

AD19

B31

+3.3V

B32

AD17

B33

C/BE2#

B34

GND

B35

IRDY#

B36

+3.3V

B37

DEVSEL#

B38

GND

B39

LOCK#

B40

PERR#

B41

+3.3V

B42

SERR#

B43

+3.3V

B44

C/BE1#

B45

AD14

B46

GND

B47

AD12

B48

AD10

B49

GND

B52

AD8

B53

AD7

B54

+3.3V

B55

AD5

B56

AD3

B57

GND

B58

AD1

B59

+5V

B60

ACK64#

B61

+5V

B62

+5V

TRST#

+12V

INTA#

INTC#
RSVD1
RSVD3

RSVD4

RST#
GNT#

RSVD6

AD30

+3.3V

AD28
AD26

AD24

IDSEL#

+3.3V

AD22
AD20

AD18
AD16

+3.3V

FRAME#

TRDY#
STOP#

+3.3V
SDONE

SBO#

AD15

+3.3V

AD13
AD11

C/BE0#

+3.3V

REQ64#

VCC3

+12V

C832
C834

-12V

PTCK

-PIRQA

-PIRQC
PCI4_PRS1

103P

PCI4_PRS2

103P

PCICLK4

-PREQ3
AD31

AD29
AD27

AD25
C_-BE3

AD23
AD21

AD19
AD17

C_-BE2

-IRDY

-DEVSEL

-PLOCK-PLOCK

-PERR

-SERR
C_-BE1

AD14
AD12

AD10

AD8
AD7

AD5
AD3

AD1

-ACK64

A1
A2
A3

TMS

A4

TDI

A5

+5V

A6
A7
A8

+5V

A9
A10

+5V

A11
A12

GND

A13

GND

A14
A15
A16

+5V

A17
A18

GND

A19
A20
A21
A22
A23
A24

GND

A25
A26
A27
A28
A29
A30

GND

A31
A32
A33
A34
A35

GND

A36
A37

GND

A38
A39
A40
A41
A42

GND

A43

PAR

A44
A45
A46
A47
A48

GND

A49

AD9

A52
A53
A54

AD6

A55

AD4

A56

GND

A57

AD2

A58

AD0

A59

+5V

A60
A61

+5V

A62

+5V

-PTRST

-PIRQC

-PIRQA

-PCIRST2

-PGNT2

-PCI_PME
AD30

AD28
AD26

AD24
AD22

AD22
AD20

AD18
AD16

-FRAME

-TRDY

-STOP
SMBCLK2

SMBDATA2

PAR
AD15

AD13
AD11

AD9

C_-BE0
AD6

AD4
AD2

AD0

-REQ64

-PTRST 19

PTMS

PTMS 19

PTDI

PTDI 19

-PIRQC 17,19,33,36

-PIRQA 15,17,19,33,36

VCC3_SB

-PCIRST2 18,19,36

-PGNT2 17

-PCI_PME 15,17,19,23,26,28,33,36

-FRAME 17,19,23,33,36

-TRDY 17,19,23,33,36

-STOP 17,19,23,33,36
SMBCLK2 19,23,33

SMBDATA2 19,23,33
PAR 17,19,23,33,36

-REQ64 19-ACK6419

PTCK19

-PIRQA15,17,19,33,36

-PIRQC17,19,33,36

PCICLK47

-PREQ317,33

-IRDY17,19,23,33,36

-DEVSEL17,19,23,33,36

-PERR17,19,23,33,36

-SERR17,19,23,33,36

-ACK6419

PCI4

B1

-12V

B2

TCK

B3

GND

B4

TDO

B5

+5V

B6

+5V

B7

INTB#

B8

INTD#

B9

PRSNT1#

B10

RSVD2

B11

PRSNT2#

B12

GND

B13

GND

B14

RSVD5

B15

GND

B16

CLK

B17

GND

B18

REQ#

B19

+5V

B20

AD31

B21

AD29

B22

GND

B23

AD27

B24

AD25

B25

+3.3V

B26

C/BE3#

B27

AD23

B28

GND

B29

AD21

B30

AD19

B31

+3.3V

B32

AD17

B33

C/BE2#

B34

GND

B35

IRDY#

B36

+3.3V

B37

DEVSEL#

B38

GND

B39

LOCK#

B40

PERR#

B41

+3.3V

B42

SERR#

B43

+3.3V

B44

C/BE1#

B45

AD14

B46

GND

B47

AD12

B48

AD10

B49

GND

B52

AD8

B53

AD7

B54

+3.3V

B55

AD5

B56

AD3

B57

GND

B58

AD1

B59

+5V

B60

ACK64#

B61

+5V

B62

+5V

TRST#

+12V

INTA#

INTC#
RSVD1
RSVD3

RSVD4

RST#
GNT#

RSVD6

AD30

+3.3V

AD28
AD26

AD24

IDSEL#

+3.3V

AD22
AD20

AD18
AD16

+3.3V

FRAME#

TRDY#
STOP#

+3.3V

SDONE

SBO#

AD15

+3.3V

AD13
AD11

C/BE0#

+3.3V

REQ64#

TMS

+5V

+5V
+5V

GND
GND

+5V

GND

GND

GND

GND
GND

GND
PAR

GND

AD9

AD6
AD4

GND

AD2
AD0
+5V

+5V
+5V

VCC3

VCC

+12VVCC

A1
A2
A3
A4

TDI

A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
A23
A24
A25
A26
A27
A28
A29
A30
A31
A32
A33
A34
A35
A36
A37
A38
A39
A40
A41
A42
A43
A44
A45
A46
A47
A48
A49

A52
A53
A54
A55
A56
A57
A58
A59
A60
A61
A62

-PTRST

-PIRQD

-PIRQB

VCC3_SB

-PCIRST2

-PGNT3

-PCI_PME
AD30

AD28
AD26

AD24
AD23

AD22
AD20

AD18
AD16

-FRAME

-TRDY

-STOP
SMBCLK2

SMBDATA2

PAR
AD15

AD13
AD11

AD9

C_-BE0
AD6

AD4
AD2

AD0

-REQ64

-PTRST 19

PTMS

PTMS 19

PTDI

PTDI 19

-PIRQD 17,19,33

-PIRQB 15,17,19,23,33,36

-PCIRST2 18,19,36

-PGNT3 17

-PCI_PME 15,17,19,23,26,28,33,36

-FRAME 17,19,23,33,36

-TRDY 17,19,23,33,36

-STOP 17,19,23,33,36

PAR 17,19,23,33,36

-REQ64 19

YSLOT120

IDSEL= AD22

YSLOT120

IDSEL= AD23

INT#= C, D, A, B INT#= D, A, B, C

R175 4.7K
R176 4.7K

R177 4.7K
R178 4.7K

R179 4.7K
R180 4.7K

AD[31..0]

C_-BE[3..0]

VCC

VCC3_SB

4

C329
X_104P

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

3

2

http://www.msi.com.tw

PCI Connector 3 & 4

MS-6589

Last Revision Date:

Sheet

1

Thursday, August 22, 2002

20 36

Rev

20

of

AD[31..0]17,18,19,23,36

C_-BE[3..0]17,19,23,36

A A

5

-REQ64

-ACK64
PTMS

PTDI
PTCK

-PTRST

5

4

3

2

1

AC97 CODEC

C332

10u/16V

C356
270p

+5VR+12V

12

C333

+

104p

AGND

C357
270p

LINE_IN_R 22

LINE_IN_L 22

MIC2_IN
MIC1_IN

MIC2_IN 22
MIC1_IN 22

U17
L78L00-TO92-100mA

3 1

VIN VOUT

C350

+5VR

C351
104p

105p/0805

12

+

C331
10u-35V

C927

R-L-IN-R

R-L-IN-L

R201 4.7K

FMIC1_IN 22

GND

2

FB25 120S/0805

FB26 120S/0805

C355

C354

270p

270p

R198 4.7K

R199 4.7K

R200 4.7K

Install R -> Apply "CODEC_14" clock
not Install R -> Apply "24.576 Crystal" clock

D D

C343
104p

ID0

ID1

AGND

AGND

R766 1K

R190 1K

VCC3

CODEC_147

C344

X_10P

C C

AC_SDOUT17
AC_BITCLK17

R196 15

BITCLK

AC_SDIN016,17

AC_SYNC17

-AC_RST17

C348
22p

C349
X_10p

1
2
3
4
5
6
7
8

9
10
11
12

DVDD1
XTL_IN
XTL_OUT
DVSS1
SDATA_OUT
BIT_CLK
DVSS2
SDATA_IN
DVDD2
SYNC
RESET#
NC

+5VR

C925

104p

4847464544424140394338

NC

ID1

ID0

EAPD

AVSS3

AVSS2

AVDD3

SPDIFO

PHONE_IN

AUX-L

AUX-R

JS1

JS0

HP_OUT_R

CD-L

CD-GND_REF

CD-R

MIC1

1314151617181920212223

AGND

C926
104p

37

AVDD2

HP_OUT_L

MONO_OUT

LINE_OUT_R
LINE_OUT_L

NC/MIC2

LINE-IN-L

LINE-IN-R

AD1981A/B

24

MONO_OUT

AVDD4

AVSS4
AFILT4
AFILT3
AFILT2
AFILT1

VREFOUT

VREF

AVSS1

AVDD1

LINE_OUT_R 22
LINE_OUT_L 22

U18

+5VR

36
35
34
33
32
31
30
29
28
27
26
25

L-IN-R

L-IN-L

C345 104p

AFILT4
AFILT3
AFILT2
AFILT1

VREF_OUT

VREF

C347
104p

C359 105p/0805

C360 105p/0805

C353

10u/16V

10u/16V

R197 X_2.2K

PU_MIC

MIC2

C362 X_105p/0805

MIC1

B B

C364 105p/0805

R_MIC2
R_MIC1

R624 X_2.2K

R203 X_1K
R204 1K
R202 1K

JCD1

CD_R C_CD_R

C368 105p/0805

CD_GND

C369 105p/0805

CD_L

C370 105p/0805

R217

4.7K

C_CD_GND

C_CD_L

R218

2.7K

R206 4.7K

R212 2.7K

R215 4.7K

R219

4.7K

AGND

AUX_R

C373 105p/0805

AUX_L

C374 105p/0805

A A

5

4

C_AUX_R

C_AUX_L AUXL

R226

4.7K

AGND

3

R224 4.7K

R225 4.7K

R227

4.7K

CD-D1x4-BK-SBTJ

CCINR

CCING

CCINL

AUX-D1x4-YL

AUXR

X_YFET-NDS7002AS

FNTA_P922

JAUX1

4
3
2
1

C901

4

105p/0805

3
2
1

FNTA_P9

-P9

Q92

DS

G

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

2

http://www.msi.com.tw

Audio Codec

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

21 36

Rev

20

of

5

4

3

2

1

D D

+5VR

LINE_OUT_R21

LINE_OUT_L21

LINE_OUT_R

LINE_OUT_L SPEAKER_L

EC1 100u-16V

+

EC2 100u-16V

+

OUT_R

OUT_L

FB27

120S/0603

FB28

120S/0603

SPEAKER_R

R230

1.5K

MICP_DIV

FMIC1_IN21

R232 2.7K

C876
105p

C377 X_470P

SPEAKER_L

SPEAKER_R

C379
X_470P

FMIC1_IN

MIC_PWR

C380
X_470P

Dell Front Audio Connector

F_AUDIO

SPKR_L
SPKR_R

FNTA_P9

FNTA_P10

FNTA_P1026

R749 10K

R234 X_0
R235 X_0

HT110_520

1 2
1 2

1
2
3
4
5
6

8
9
10

SPKR_L
SPKR_R

Short pin 5 & 6 , Short pin 9 & 10.

FNTA_P9

C C

MIC2_IN

C382
470P

C381
470P

C384 470P
C385 470P

MIC1_IN

C386
470P

C392
470P

R237
100K

R767
X_2K

AUD1

14
15
16

1
2
3
4
5

6
7
8
9

10
11
12
13

17
18

N54-13F0021-F02

R768
2KR216

R236

100K

SPKR_R

MONO_R

MONO_R32

MONO_L

MONO_L32

B B

SPKR_L

LINE_IN_R21

LINE_IN_L21

MIC2_IN21

+5VR

R207

1.5K

MIC1_IN21

2.7K

MICP

C371

A A

105p

FNTA_P921

Micro Star Restricted Secret

Reserved for special MIC-Phone

5

4

3

2

Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

Title

Audio & GAME PORT

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

22 36

Rev

20

of

5

4

3

2

1

F13

AVDDL

F12

AVDDL

L11

L14M8M9

VDD_PLL2
VDD_PLL1

VCC3VCC3

H14P7J14

VDD_PLL

VDD_PLL

M11N8N9P9C8

TR_D0+

TR_D0-

VDD_XTAL

TR_D1+

TR_D1-

TR_D2+

TR_D2-

TR_D3+

TR_D3-

REG_SEN12
REG_SUP12

REG_CTL12

REG_SEN25
REG_SUP25

REG_CTL25

GPIO0
GPIO1
GPIO2

SPD100/LEDB

SPD10000/LEDB

LINK/LEDB

TRAFFIC/LEDB

SMB_CLK

SMB_DATA

EECLK

EEDATA

VESD1
VESD2
VESD3

RDAC

SCLK

BIASVDD

VAUX/PRSNT

DC

CS#

SO

SI

XI

XO

TR_D0+

B13

TR_D0-

B14

TR_D1+

C13

TR_D1-

C14

TR_D2+

D13

TR_D2-

D14

TR_D3+

E13

TR_D3-

E14

A9
B9
B10

C10
B11
C11

H12

-WP

K13
J13

S100

H13

S1000

G12
G13

LILED

G14
A10

C9

EECLK

M10

EEDATA

P10
P1

G2
A1

G11
H11
E10

RDAC

D10

E11

N11

R762 X_330K
R822 X_0

N10

LAN_BIAS

A14

J12

R252 49.9RST
R253 49.9RST

R751 49.9RST
R752 49.9RST

R753 49.9RST
R754 49.9RST

R755 49.9RST
R756 49.9RST

R760 10K
R761 10K

1 2

FB4 120S

C912 104P

Q93

BCP69

Q94
BCP69

R251 1.24KST

LAN_X1

LAN_X2

R764 4.7K

R823

47K

LAN2_5

DEPOPULATE FOR 4401

4

1

3 2

4

1

3 2

12

+

CT29

SMBCLK2 19,20,33
SMBDATA2 19,20,33

VCC3_SB
VCC3_SB

VCC3

C394 18P
25MHz

32pF
+-30PPM

C396 18P

C920 104P

BECOME 1.8V FOR 4401

LAN1_2

12

+

C909

CT27

104P

10u/16V

D24
RL201

12

+

C910

CT28

104P

10u/16V

VCC3_SB

C911
104P

10u/16V

DEPOPULATE FOR 4401

C403 104P
C406 104P

LAN1_2

C409 104P
C918 104P

X2

LAN2_5

VCC3_SB

VCC3_SB

VCC3_SB

VCC3_SB

FB37 120S
FB36 120S
FB38 120S
FB39 120S

LAN2_5

LAN2_5

R750 330

LILED

TR_D3+

C905 103P

TR_D3­TR_D2+

C906 103P

TR_D2­TR_D1+

C907 103P

TR_D1­TR_D0+

C908 103P

TR_D0-

R820 330

S1000
S100

R821 330

LAN_25 BECOME 3.3V FOR 4401

C957 104P

VDD_PLL2

C958 104P

VDD_PLL1

C921 104P

AVDDL2

C923 104P

AVDDL1

LAN_USB1B

AMBER+

22

AMBER-

21

TRD3+

16

TRCT3

15

TRD3-

17

TRD2+

11

TRCT2

9

TRD2-

10

TRD1+

12

TRCT1

14

TRD1-

13

TRD0+

19

TRCT0

20

TRD0-

18

GREEN+

24

GREEN-

23

2.2u/0805C953

2.2u/0805C954

2.2u/0805C955

2.2u/0805C956

YMD20

AVDDL2
AVDDL1

N14P8P12

P13

P14

A13

F14

AVDD

VDDC

VDDC

VDDC

AVDD

VDDC

VDDC

VDDC

VDDC

VDDC

GND

GND

GND

GND

GNDNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC

N12

N13H4H10J4J11K4K11L7L8

VDD_PCI

VDD_PCI

VDD_PCI

GND

GND

GND

LAN1_2

E12H5H6H7H8J5J6J7J8J9J10K5K6K7K8K9K10

VDDC

VDDC

VDDC

VDDC

VDDC

VDDC

GND

GND

GND

GND

GND

GND

VDDC

GND

VDD_PCI

VDD_PCI

GND

GND

VDD_PCI

VDD_PCI

GND

GND

GND

VDDC

GND

VDDC

GND

VDDC

GND

VDDC

VDDC

GND

GND

G10K2H9

VDDC

GND

VDDC

VDDC

GND

GND

M12

M13M6L6L9N1

VDDC

GND

M14L5L10

VDDC

GND

VCC3_SB

LAN2_5 LAN2_5

K14

L13

P11

A11

F11

K12

D D

AD[0..31]17,18,19,20,36

C C

C_-BE[0..3]

B B

R763 4.7K

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C_-BE0
C_-BE1
C_-BE2
C_-BE3

-FRAME17,19,20,33,36

-IRDY17,19,20,33,36

-TRDY17,19,20,33,36

-DEVSEL17,19,20,33,36

-STOP17,19,20,33,36
PAR17,19,20,33,36

-PERR17,19,20,33,36

-SERR17,19,20,33,36

-PREQ517,33

-PGNT517

-PIRQB15,17,19,20,33,36

-PCI_PME15,17,19,20,26,28,33,36

LAN_PCLK7

-PCIRST118,26,27

N7
M7
P6
P5
N5
M5
P4
N4
P3
N3
N2
M1
M2
M3
L1
L2
K1
E3
D1
D2
D3
C1
B1
B2
B4
A5
B5
B6
C6
C7
A8
B8

M4
L3
F3
C4

F2
F1
G3
H3
H1

J1
J2
A2

C3
J3

AD25

A4
H2
A6
A3
C2

D12

B12
A12

C12

-TRST

D11

F4

Broadcom BCM5702/4401

U62

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C_BE#0
C_BE#1
C_BE#2
C_BE#3

FRAME#
IRDY#
TRDY#
DEVSEL#
STOP#

PAR
PERR#
SERR#

REQ#
GNT#

IDSEL
INTA#
PME#
PCICLK
PCI_RST#
TDI

TDO
TMS
TCK
TRST#

M66EN

L12A7B3C5E1E4G1K3L4N6P2

VDDP

VDDP

VDDP

VDD_IO

VDD_IO

VDD_IO

VDD_IO

VDD_PCI

VDD_PCI

VDD_PCI

GND

GND

GND

GND

GND

GND

B7D4D5D6D7D8D9E2E5E6E7E8E9F5F6F7F8F9F10G4G5G6G7G8G9

EEDI

BCM5702 DECOUPLING CAPACITORS

IDSEL = AD25

MASTER = PREQ5

EEDO

IF USE 5702 POPULATE 24C64.
IF USE 4410 POPULATE 93C46.

1

A0

2

A1

3

A2

AT24C64 / SOIC8

4

VCC
WP#

SDAGND

VCC3_SB

U63

8

-WP

R765 10K

7
6

SCL

54

EEDATA
EECLK

EEDI
EEDO

C914
104P

U20

1

CS

2

SK

3

DI

4

DO

3

X_93C46

8

VCC

7

NC

PU_EEPROM

6

NC

5

GND

R256 X_10K

VCC3_SB

2

C401

104P

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

BCM5702 PCI LAN

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

23 36

of

Rev

20

C404
X_104P/BOT
C407

X_104P/BOT

C917
104P

VCC3

C402
104P
C405
104P
C408
104P
C410
104P
C411
104P
C412
104P

A A

LAN1_2

5

C913
104P
C915
104P
C916
104P
C919
104P
C922
104P
C924
104P

LAN2_5

5

4

3

2

1

D D

C C

FRONT PANEL USB CONNECTOR FOR USB PORT 0-0, 0-1 REAR PANEL USB CONNECTOR FOR USB PORT 1-0, 1-1

USB_N3_NEC_F36

USB_P3_NEC_F36 USB_N0_NEC_R36

USB_N2_NEC_F36

USB_P2_NEC_F36

FB8 X_0

1 2

FB6 X_0
FB10 X_0

1 2

FB13 X_0

4 3

4 3

L6

90ohm_0603

90ohm_0603
L8

SBD1­SBD1+

SBD0­SBD0+

SBD1- 32
SBD1+ 32

SBD0- 32
SBD0+ 32

USB_P0_NEC_R36

USB_P1_NEC_R36

USB_N1_NEC_R36

CP6 X_COPPER
FB11 X_600_0805
C421 X_0.1u

FB5 X_0

12

FB7 X_0

FB9 X_0

12

FB12 X_0

43

L5
90ohm_0603

43

L7
90ohm_0603

NEAR USB
CONNECTOR

B1_N1
B1_P1

B1_N0
B1_P0

USBVCC2

LAN_USB1A

5
6
7
8
1
2
3
4

USB/NET_1

UP

DOWN

27
28
29
30
25
26
31
32

FRONT PANEL USB CONNECTOR FOR USB PORT 0-2 & 1-2

USB0_P1_F_THOR

USB0_N1_F_THOR
USB0_N0_F_THOR

USB0_P0_F_THOR

B B

FB14 X_0

12

FB15 X_0

FB16 X_0

1 2

FB17 X_0

43

4 3

L9
90ohm_0603

90ohm_0603

L10

NEAR USB
CONNECTOR

B0_P2

USBVCC1

R_USB1

9
1

2
3
4

12 11

USBx2-D8-BK

USBVCC1

10
5

B1_N2B0_N2

6

B1_P2

7
8

* USB Trace width : 7.5 mils
* USB Trace Spacing : 22.5 mils
* Differential USB Signlas Trace, Spacing : 7.5 mils
* USB Power Trace must be 50mils width

4

USB0_P1_F_THOR
USB0_N1_F_THOR
USB0_P0_F_THOR
USB0_N0_F_THOR

USB1_N0_R
USB1_P0_R
USB1_P1_R
USB1_N1_R

USB1_N2_F_THOR
USB1_P2_F_THOR
USB0_P2_F_THOR
USB0_N2_F_THOR

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

3

2

http://www.msi.com.tw

USB Port

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

24 36

1

Rev

20

of

USB0_P117
USB0_N117
USB0_P017
USB0_N017

USB1_N017
USB1_P017
USB1_P117
USB1_N117

USB1_N217
USB1_P217

A A

USB0_P217
USB0_N217

RN105 8P4R-22

RN107 X_8P4R-22

RN109 X_8P4R-22

5

1 2
3 4
5 6
7 8

1 2
3 4
5 6
7 8

1 2
3 4
5 6
7 8

1 2
3 4
5 6
7 8

RN106 8P4R-15K

1 2
3 4
5 6
7 8

RN108 8P4R-15K

1 2
3 4
5 6
7 8

RN110 8P4R-15K

5

ATA 33/66/100 Connector

4

3

2

1

PRIMARY IDE CONN.

R282 10K

D D

C C

B B

VCC3

RESET_IDEP_L17

-IDEACTP32

VCC3

RESET_IDES_L17

-IDEACTS32

R283 33

PDD_7
PDD_6
PDD_5
PDD_4
PDD_3
PDD_2
PDD_1
PDD_0

PDREQ_R

-PDIOW_R

-PDIOR_R
PIORDY_R

-PDDACK_R
IRQ14_R
PDA1_R
PDA0_R PDA2_R

-PDCS1_R

-IDEACTP

R287 10K

SDD_7

SDD_6

SDD_5

SDD_4 SDD_11

SDD_3 SDD_12

SDD_2

SDD_1 SDD_14

SDD_0 SDD_15

SDREQ_R

-SDIOW_R

-SDIOR_R

SIORDY_R

-SDDACK_R

IRQ15_R

SDA1_R

SDA0_R

-SDCS1_R

-IDEACTS

-P_IDE_RST

PRIMAR

CN-BH-D2x20-1:21-BK-A-S3

1

2

12
1615

22
24
26
28
30
32
34
36
38
4039

-S_IDE_RST

2

12
1615

22
24
26
28
30
32
34
36
38
4039

PDD_8
PDD_9
PDD_10
PDD_11
PDD_12
PDD_13
PDD_14
PDD_15

P28

-PDCS3_R

SDD_8
SDD_9
SDD_10

SDD_13

S28

ATADET1_R
SDA2_R

-SDCS3_R

R284

470

R290

470

3 4
5 6
7 8

91110
13 14
17 18

19
21
23
25
27
29
31
33
35
37

SECONDARY IDE CONN.

SECON

CN-BH-D2x20-1:21-BK-A-S3

R288

1
3 4

33

5 6
7 8

91110
13 14
17 18

19
21
23
25
27
29
31
33
35
37

C426
473P

DCABLEIDP_L 17

R286

15K

R291

C427
473P

DCABLEIDS_L 17

15K

DDATA_P[15..0]17

DDATA_S[15..0]17

DDATA_P1

DDATA_P14

DDATA_P0

DDATA_P15

DDATA_P11

DDATA_P4

DDATA_P10

DDATA_P5

DDATA_P7
DDATA_P8
DDATA_P6
DDATA_P9

DDATA_P3

DDATA_P12

DDATA_P2

DDATA_P13

DDATA_S1 SDD_1

DDATA_S14

DDATA_S0 SDD_0

DDATA_S15

DDATA_S10 SDD_10

DDATA_S4 SDD_4

DDATA_S11 SDD_11

DDATA_S7 SDD_7
DDATA_S8 SDD_8

DDATA_S3

DDATA_S12

DDATA_S2

DDATA_S13

RN65

7 8
5 6
3 4
1 2

8P4R-33

RN67

1 2
3 4
5 6
7 8

8P4R-33

RN69

7 8
5 6
3 4
1 2

8P4R-33

RN71

7 8
5 6
3 4
1 2

8P4R-33

RN72

7 8
5 6
3 4
1 2

8P4R-33

RN74

7 8
5 6
3 4
1 2

8P4R-33

RN76

7 8
5 6
3 4
1 2

8P4R-33

RN78

7 8
5 6
3 4
1 2

8P4R-33

PDD_1
PDD_14
PDD_0
PDD_15

PDD_11
PDD_4
PDD_10
PDD_5

PDD_7
PDD_8
PDD_6
PDD_9

PDD_3
PDD_12
PDD_2
PDD_13

SDD_14
SDD_15

SDD_5DDATA_S5

SDD_6DDATA_S6
SDD_9DDATA_S9

SDD_3
SDD_12
SDD_2
SDD_13

DDRQP17

IRQ1417,33

DRDYP17

DIOWP_L17

DIORP_L17

DDACKP_L17

DADDR_P117

DADDR_P017
DADDR_P217

DCS1P_L17
DCS3P_L17

DDRQS17
DRDYS17

IRQ1517,33

DIOWS_L17

DIORS_L17

DDACKS_L17

DADDR_S117

DADDR_S017
DADDR_S217

DCS1S_L17
DCS3S_L17

DDRQP

DRDYP

DDRQS SDREQ_R
DRDYS SIORDY_R

RN66

7 8
5 6
3 4
1 2

8P4R-82

RN68

7 8
5 6
3 4
1 2

8P4R-22

R285 33

RN70

7 8
5 6
3 4
1 2

8P4R-33

RN73

7 8
5 6
3 4
1 2

8P4R-82

RN75

7 8
5 6
3 4
1 2

8P4R-22

R289 33

RN77

7 8
5 6
3 4
1 2

8P4R-33

PDREQ_R
IRQ14_R

PIORDY_R

-PDIOW_R

-PDIOR_R

-PDDACK_R

PDA1_R

PDA0_R
PDA2_R

-PDCS1_R

-PDCS3_R

IRQ15_R

-SDIOW_R

-SDIOR_R

-SDDACK_R

SDA1_R

SDA0_R
SDA2_R

-SDCS1_R

-SDCS3_R

12

12

12

12

12

DRDYP

DRDYS

A A

-IDEACTP

-IDEACTS

R292 4.7K S_FM1

R294 4.7K

R296 10K

R298 10K

5

VCC3

VCC

DDRQP

DDRQS

PDD_7

SDD_7

R293 5.6KST

R295 5.6KST

R297 10K

R299 10K

4

12

12

12

FM1

FM2

FM

FM

12

12

FM5

FM6

FM

FM

12

FM3

FM4

FM

FM

12

12

FM7

FM8

FM

FM

3

12

FM

S_FM7
FM

S_FM2

S_FM3
FM

S_FM9
FM

2

S_FM4
FM

12

S_FM10
FM

FM

12

12

S_FM8
FM

12

S_FM5

S_FM6

FM

FM

12

S_FM11
FM

12

Title
Document Number

12

S_FM12
FM

S_FM13
FM

Micro Star Restricted Secret

IDE CONNECTOR

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

25 36

1

Rev

20

of

5

4

3

2

1

LPC SUPER I/O 49M192

U21

BEEP

GP20L

26

PCI_RESET#

29

PCI_CLK

30

SER_IRQ

25

LDRQ#

24

LFRAME#

-PD

27

LPC_PD#

20

LAD0

21

LAD1

22

LAD2

23

LAD3

32

J1B1/GP10

33

J1B2/GP11

34

J2B1/GP12

35

J2B2/GP13

36

JX1/GP14

37

JY1/GP15

38

JX2/GP16

39

JY2/GP17

41

GP20/P17

46

MIDI_IN/GP25

47

MIDI_OUT/GP26

55

FAN_CTL1/GP33

54

FAN_CTL2/GP32

52

FAN_SEN1/GP31

51

FAN_SEN2/GP30

48

LED1/GP60

49

LED2/GP61

45

SYSOPT/GP24

50

IO_SMI#/GP27

-PME

17

IO_PME#/GP42

28

DDRC/GP43

103

SDA

104

SCLK

106

VID0

107

VID1

108

VID2

109

VID3

110

+12V_IN/VID4

112

HGND

118

VCCP_IN

119

NC1(+1.8V_IN)

120

NC2(+1.5V_IN)

121

HVCC

113

D0-(XNOR_IN)

114

D0+

115

+5V_IN

116

+3.3V_IN

117

+2.5V_IN

-OVT

105

A0/RESET#/THERM#(XNOR_OUT)

6

SUSCLK

19

D+
D-

CLK_14M

123

NC3(D1+)

124

NC4(D1-)

44

VREF

53

VCC

65

VCC

93

VCC

101

HGND

125

NC5(HGND)

126

NC6(HGND)

127

HGND

128

HGND

SMSC LPC47M192

DRVDEN0/GP40
DRVDEN1/GP41

DS#1/GP21/P16

MTR#1/GP22/P12

PD2/WRTPRT#
PD4/SDKCHG#

SLCT/WGATE#

SLCTIN#/STEP#

ERR#/HDSEL#

ALF#/DRVDEN0#

RXD2/GP52/IRRX

TXD2/GP53/IRTX

KBRST#/GP36

-PCIRST118,23,27

SIO_PCLK7

SERIRQ17,33

LDRQ1_L16

-LPC_FRAME16,27

VCC3

R816 4.7K

D D

C C

THERMDC_CPU5

THERMDA_CPU5

B B

VCC

LPC_AD016,27
LPC_AD116,27
LPC_AD216,27
LPC_AD316,27

GPI_PCSPKDET32

DLED127

DLED227
GPI_LOB032
GPI_LOB132

GPI_FRONT_CABLE32

FNTA_P1022

DLED327
DLED427

CPU_CTRL32

SYS_CTRL32

CPU_FAN32
SYS_FAN32

POWER_LED32

SUS_LED_SIO32

-EXTSMI17

-PCI_PME15,17,19,20,23,28,33,36

GPI_ESUPPORT_LED32

VID[4..0]5,35

VDD_CORE

THERM_L17

C32KHZ17

SIO_14M7

VCC3

CB4
104P

VDD_18
VDD_15

VCC3

VCC3

VDD_25

CB5
104P

THERMDC_CPU
THERMDA_CPU

VCC

R313 0

SIO_ADDR

R314 0

SMBDATA1
SMBCLK1

VID0
VID1
VID2
VID3
VID4

INDEX#

MTR#0

STEP#
WDATA#
WGATE#

TRACK0#

RDATA#

HEAD#

DSKCHG#

PD0/INDEX#

PD1/TRK0#

PD3/RDATA#

PD6/MTR0#

PE/WDATA#

BUSY/MTR1#

ACK#/DS1#

INIT#/DIR#

STB#/DS0#

IRRX2/GP34

IRTX2/GP35

RXD1

CTS#1

DCD#1
DSR#1

RTS#1

DTR#1

RI2#/GP50

CTS#2/GP56

DCD#2/GP51

DSR#2/GP54

RTS#2/GP55

DTR2#/GP57

GA20/GP37

KBDATA

KBCLK

MSDATA

MSCLK

HVCC
HVCC
HVCC

AGND

DS#0
DIR#

WP#

RI#1

TXD1

GND
GND
GND
GND

1
2
13
3
42
5
43
8
9
10
11
14
15
16
12
4

68
69
70
71
72
73

PD5

74
75

PD7

77
78
79
80
67
66
81
82
83

61
62

90
84
88
91
86
85
87
89

92
95
99
94
97
96
98
100

64
63
56
57
58
59

18

VTR

111
122
102

40
7
31
60
76

LP0
LP1 LP_D1
LP2
LP3
LP4
LP5
LP6
LP7
SLCT
PE
BUSY

-ACK

-SLIN

R825 33

-INIT

R826 33

-ERR

R827 33

-AFD

R828 33

-STB

R308 33

GP35

7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2

LP_D0
LP_D2

LP_D3
LP_D4
LP_D5
LP_D6
LP_D7

RN81
8P4R-33

BIOS_P 27

SINA 28

-CTSA 28

-DCDA 28

-DSRA 28
SOUTA 28

-RTSA 28

-DTRA 28

INTRUDER_CABLE_L 32
GPI_ESUPPORT 32

KA20G 17
KBRC_L 17
KBDATA 28
KBCLK 28
MSDATA 28
MSCLK 28

VCC3_SB

VCC3

DRVDEN0 28
DRVDEN1 28

-INDEX 28

-MOT_A 28

-DRV_B 28

-DRV_A 28

-MOT_B 28

-DIR 28

-STEP 28

-WT_DT 28

-WT_EN 28

-TRACK0 28

-FDD_WP 28

-RDATA 28

-HEAD 28

-DSKCHG 28

8P4R-33

RN79

8P4R-33

RN80

LP_SLCT 28
LP_PE 28
LP_BUSY 28

-LP_ACK 28

-LP_SLIN 28

-LP_INIT 28

-LP_ERR 28

-LP_AFD 28

-LP_STB 28

LP_D[0..7] 28

JROM

YJ103

THERMAL SENSOR BLOCK

THERMDC_CPU

CB3

THERMDA_CPU

1000P

BIOS Configuration Mode Block

GP20L
GP35

R817 4.7K
R818 4.7K

1
2
3

VCC3
VCC3

CB37
1000P

D+

CE

B

Q110
2N3904S

D-

BIOS Function
1-2 : Normal
2-3 : Configuration Mode
REMOVED : BIOS Recovery

( From FDD )

SMBus Isolation SPEAKER BLOCK

G

G

SMBCLK1_SB

DS

Q13
YFET-NDS7002AS

SMBCLK1

SMBDATA1_SB

DS

Q16
YFET-NDS7002AS

SMBDATA1

+12V

SMB_ON

R320

3.3K

A A

-VDD_PWGD_519,31

R_SMB_ON

Q15

YFET-NDS7002AS

5

R322

10K

SMBCLK1_SB 17,33

SMBCLK1 7,11,12,33

SMBDATA1_SB 17,33

SMBDATA1 7,11,12,33

4

BEEP

VCC3

R321
10K

R323

4.7K

VCC3

R819
10K

ALARM 32

CE

BEP

B

Q14
2N3904S

3

LPC I/O DECOUPLING CAPACITORS

VCC3

CB7
104P
CB8
104P
CB9
104P
CB10
104P

2

SUPER I/O STRAPPING RESISTOR

R317 X_4.7K

VCC3

R318 4.7K

SIO_ADDR
H: 0x04E
L: 0x02E

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

SIO_ADDR

(DEFAULT)

LPC I/O & HW MONITOR

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

26 36

Rev

20

of

5

4

3

2

1

VCC3

R324

D D

FWH_PCLK7

R326 1K

BIOS_P26

NOTE: INIT and RESET have

the same function internally.

-PCIRST118,23,26

-LPC_FRAME16,26

VCC3

1K

R329 10K

R325
1K

LPC_MODE_L
GPI4

GPI3
GPI2
GPI1
GPI0
SIO_WP
BIOS_P
ID3
ID2
ID1
ID0

INIT_ROM_L

VCC3

LPC ROM

32

25

1

27

VCCA

31

CLK

29

MODE

30

A10

3

A9

4

A8

5

A7

6

A6

7

A5

8

A4

9

A3

10

A2

11

A1

12

A0

2

RESET_L

23

WE_L

24

OE_L

VCC

VDD

VPP

GND1

U24

DQ7

21

DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
RFU

CE

GND

DQ6

20

DQ5

19

DQ4

18

LAD3

17

LAD2

15

LAD1

14

LAD0

13

RFU

22

SIO_CE

28

16
26

R327 10K

R328 10K

LPC_AD3 16,26
LPC_AD2 16,26
LPC_AD1 16,26
LPC_AD0 16,26

RN83

ID3

7
5
3
1

X_8P4R_0

8
6
4
2

ID2
ID1
ID0

LPC ROM RESISTORS LPC ROM DECOUPLING CAPACITORS

C C

B B

NOTE: Pull all unused DQ pins low.

1
3
5
7

8P4R_10K

RN84

2
4
6
8

DQ7
DQ6
DQ5
DQ4

SIMULATION TRACE

J3

VCC

X_PIN1*2

J4

X_PIN1*2

NOTE: GPI pins must not be left floating.

GPI0
GPI1
GPI2
GPI3

GPI4

8P4R_10K

1

2

3

4

5

6

7

8

RN85

R330 10K

VCC

RN88
8P4R-330

1 2

3 4

5 6

7 8

DLED1

DLED2

DLED3

DLED4

DLED126
DLED226
DLED326
DLED426

VCC3

CB11
104P

LAYOUT: Place 0.01uF cap <1cm

DLED1

DLED2

DLED4

2 1

4 3

DLED3

D_GN_RD-D-5V-CR-A

D_LED

C431
104P

C433

C432

104P

104P

DLED4

123456

78

CN15

X_102p

DLED3
DLED2
DLED1

FOR EMI AND ESD

DDLED1
DDLED2
DDLED3

56

NC

78

DDLED4

RN87

7 8
5 6
3 4
1 2

8P4R-470

VCC

RN89
8P4R-1K

1 2

3 4

5 6

7 8

A A

5

4

G_DLED4

G_DLED3
G_DLED2
G_DLED1

Q18

2

1 3

2N3904S

3

2N3904S

Q17

2

1 3

2N3904S

Q19

2

1 3

2

2N3904S

Q20

1 3

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

2

http://www.msi.com.tw

LPC ROM & D_LED

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

27 36

Rev

20

of

5

4

3

2

1

SERIAL PORT 1

DCDA
RXDA

CTSA
DSRA

D5

1N4148S

104P

U26

20

VCC

2

RIN1

3

RIN2

4

RIN3

7

RIN4

9

RIN5

16

DIN1

15

DIN2

13

DIN3

11

GND

75232-1

CB12

104P

C436 104P

D D

-DTRA26

-RTSA26
SOUTA26

-12V +12V

CB14

ROUT1
ROUT2
ROUT3
ROUT4
ROUT5

DOUT1
DOUT2
DOUT3

+12VCVCC

C437 X_0.1u

1

V+

19
18
17
14
12

5
6
8

C439 X_0.1u

10

V-

-12VC

DTRA
RTSA
TXDA

1N4148S

CB15

104P

D6

-DCDA 26
SINA 26

-CTSA 26

-DSRA 26

+12VC-12VC

CB13

104P

RIA
DCDA
RXDA
DTRA

RTSA
CTSA
TXDA
DSRA

DCDA
RXDA RTSA
TXDA
DTRA

1

2
4
6
8

2
4
6
8

26
27
28
29
30

FB30 X_80_0805

CP4 X_COPPER

3
5
7

1
3
5
7

4749

31
32
33
34

LPT-D25-BK-BI

LPT1B

CN16
8P4C-220P

CN18
8P4C-220P

DSRA
CTSA

RIA

PARALLAL PORT

PS2 KEYBOARD & MOUSE CONNECTOR

D7 1N4148S

1 2
3 4
5 6
7 8
7 8
5 6
3 4
1 2

1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8

R332 2.2K

LP_VCC

RN90
8P4R-2.2K

RN92
8P4R-2.2K

RN93
8P4R-2.2K

RN94
8P4R-2.2K

VCC

C C

LP_D[0..7]26

-LP_SLIN

-LP_SLIN26
LP_D3

LP_D326

-LP_INIT

-LP_INIT26
LP_D2

LP_D4
LP_D5
LP_D6
LP_D7

LP_SLCT

LP_SLCT26

LP_PE

LP_PE26

LP_BUSY

LP_BUSY26

-LP_ACK

-LP_ACK26

-LP_ERR

-LP_ERR26
LP_D1

LP_D126

-LP_AFD

-LP_AFD26
LP_D0

LP_D026

-LP_STB

-LP_STB26

LP_D2

-LP_INIT
LP_D3

-LP_SLIN

LP_D4
LP_D5
LP_D6
LP_D7

-LP_ACK
LP_BUSY
LP_PE
LP_SLCT

LP_D0

-LP_AFD
LP_D1

-LP_ERR

-LP_STB

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

33PC443

CN20
8P4C-220P

CN21
8P4C-220P

CN22
8P4C-220P

CN23
8P4C-220P

-LP_STB
LP_D0
LP_D1
LP_D2
LP_D3
LP_D4
LP_D5
LP_D6
LP_D7

-LP_ACK
LP_BUSY
LP_PE
LP_SLCT

CP7 X_COPPER

1
2
3
4
5
6
7
8

9
10
11
12
13

51

52

LPT-D25-BK-BI

FB20

X_80_0805

LPT1A

-LP_AFD

14

-LP_ERR

15

-LP_INIT

16

-LP_SLIN

17
18
19
20
21
22
23
24
25
48

MSDATA26

MSCLK26

KBDATA26

KBCLK26

1 2

3 4

5 6

7 8

RN91
8P4R-4.7K

L11 301S
L12 301S

L13 301S
L14 301S

R331
1K

MS_DT
MS_CK

KB_DT
KB_CK

135

246

7

8

KBMS1

YMD12P-1

7
8

11
12

1
2
5
6

CN24
8P4C-220P

10

9

MS

4

3

KB

FB21
X_80_0805

CP8 X_COPPER

VDD_PS2_KBMS 31

B B

A A

FLOPPY CONNECTOR

FDD1

1 2
3 4

7 8

9 10
11 12
13 14
15 16
17 18
19
21 22
23 24
25 26
27 28
29 30
31 32
33 34

FLOPPY

5

Wake On Ring

6

20

DRVDEN0 26
DRVDEN1 26

-INDEX 26

-MOT_A 26

-DRV_B 26

-DRV_A 26

-MOT_B 26

-DIR 26

-STEP 26

-WT_DT 26

-WT_EN 26

-TRACK0 26

-FDD_WP 26

-RDATA 26

-HEAD 26

-DSKCHG 26

RI_L 17

VCCVCCVCC

CB16
104P

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

2

http://www.msi.com.tw

CB17
104P

I/O CONNECTOR

MS-6589

Last Revision Date:

Sheet

1

CB18
104P

Thursday, August 22, 2002

28 36

of

Rev

20

R334
1K

CE

Q21

B

2N3904S

RIA

D8 1N4148S

VCC3_SB

R335
10K

-PCI_PME 15,17,19,20,23,26,33,36

4

3

D_RI RI_G

R333 1K

5

D D

VTT_DDR_SUS_PG31

VCC5_DUAL

C C

R360 1K

VDD_25_SUS

VCC_OK130

-VTT_DDR_SUS_PG

Q24

YFET-NDS7002AS

Q31

YFET-NDS7002AS

C475
39p

VDD_2.5_SUS_CTL

C476
104P

Q23
YFET-NDS7002AS

VDD_25

R374

DISCHARGE PATH,

X_47K

DEFAULT
NON-STUFF

VDD_2.5_SUS_PG31

VTT_DDR_SUS_PG31

(VDD_2.5_RUN)

4

Irms=Iout*(D-D^2)^(1/2)=9.5*0.5=4.75A

1000u/10V Low ESR Capacitor, it's ripple current
Assume ambit temperature lower 70 degree C, the capacitor ripple 1.45A * 1.7 =

1.45A.

2.465A.
N CAPACITOR-INPUT = Irms / Capacitor
RIPPLE-CURRENT = 4.75A / 2.465A= 1.9 pcs

U64

28

VCC

C474
104P

1

AGND

15

PG1

8

EN1

25_IL1

11

ILIM1

12

SS1

9 10

FPWM1# VSEN1

14

VIN

16

PG2/REF2OUT

21

EN2

TT_IL2

18

ILIM2/REF2

17

SS2

20

FPWM2#

13

DDR

ISL6225-TSSOP28PIN

Phigh-gate = Vin/Vout * Iout^2 * Rds(on) = (1.25V / 5V) * 5.21^2 * 0.04 = 0.27W
Plow-gate = (1-D) * Iout^2 * Rds(on) = [1- (1.25V / 5V)] * 5.21^2 * 0.019 = 0.39W

BOOT1
HDRV1

SW1
LDRV1
PGND1

ISNS1

BOOT2
HDRV2

SW2
LDRV2
PGND2

ISNS2

VSEN2

VCC5_DUAL

VCC5_DUAL

VDD_25_SUS

VCC5_DUAL

RPWRON17,30,32

VTT_DDR_SUS

VCC5_DUAL

R362 1K

VDD_2.5_SUS_CTL

R365 1K
R779 64.2KST

VCC5_DUAL

R381 1K

VTT_DDR_SUS_PG

R773 1K

R783 61.9KST

R361 1K

25_SS3

1000PC507

EN_TT
TT_SS4

1000PC487

E_DDR1

Ptotal = Phigh-gate + Plow-gate = 0.66W
1inch square thermal copper required

3

6
5
4
2
3
7

23
24
25
27
26
22

19

BO1

C928 103P

HDRV1

PHASE_2V5

LDRV1

1SNS1
VSENSE_2V5

BO2

C929 103P

HDRV2
PHASE_1V5
LDRV2

1SNS2
SENSE_1V25

D20

1N5817S

R780 1.62KST

1N5817S

R786 1.21K

VCC5_DUAL

8

D

7

D

6

Q95 FDS4410

4 5

G D

3

S

2

S

1

S

Q96

3

S1G1D1

4
2

G2

1

S2

FDS6930-SO8

EC40 1000uF-10V

+

EC31 1000uF-10V

+

Q32FDS4410

1

S

2

S

3

SGDD

45

6

D

7

D

8

D

5
6

D1

7

D2

8

D2

2

Phigh-gate = Vin/Vout * Iout^2 * Rds(on) = (2.5V / 5V) * 9.5A^2 * 0.0135 = 0.61W
Plow-gate = (1-D) * Iout^2 * Rds(on) = (1- 2.5V / 5V) * 9.5A^2 * 0.0135 = 0.61W

1

1inch square thermal copper required

3.3UH

3.3UH

R777 10KST

+

R389
X_10KST

9.5A * ESR< 100mV => ESR < 10.5m ohm.

R781

5.6KSTD21

R782 6.81KST

R787

17.4KST

16 // 16 = 8m ohm.

R785
X_6.81KST

+

5.21A * ESR< 50mV => ESR < 9.6m ohm.
16 // 16 = 8m ohm.

CHOCK2

PHASE_2V5

VCC5_DUAL

EC41 1000uF-10V

+

CHOCK1

PHASE_1V25

Irms=Iout*(D-D^2)^(1/2)=5.21*0.43=2.24A
1000u/10V Low ESR Capacitor, it's ripple current 1.45A.
Assume ambit temperature lower 70 degree C, the capacitor ripple 1.45A * 1.7 = 2.465A.
N CAPACITOR-INPUT = Irms / Capacitor
RIPPLE-CURRENT = 2.24A / 2.465A= 0.9 pcs

EC29

1500u/6.3V

EC7

1500u/6.3V

VDDIO_SENSE 5

VDD_25_SUS

+

EC30

1500u/6.3V

VTT_SENSE 4

VTT_DDR_SUS

+

EC42

1500u/6.3V

Irms1 = Iout*(D-D^2)^(1/2)=2.5*0.48 = 1.2A
1000u/10V Low ESR Capacitor, it's ripple current 1.45A.

Assume ambit temperature lower 70 degree C, the capacitor ripple 1.45A * 1.7 = 2.465A.
N CAPACITOR-INPUT = Irms1 / Capacitor

RIPPLE-CURRENT = 1.2A / 2.465A= 0.5 pcs

VCC

R396 1K

VCC

V1.2R
V1.2R_L

VDD_1.8_RUN_PG31

VDD_HT0A_RUN_PG31

Q99

YFET-NDS7002AS

R774 1K

VCC

VDD_18

R403 1K

VCC

VCC

VDD_12_A

VDD_1.8_RUN_PG 31

4

R789 1K
R790 64.2KST

1000PC932

VCC

-V1.2R_SD

R793 1K

R794 64.2KST

1000PC934

R798 1K

18_SS1

12_SS2

E_DDR2

B B

-V1.2R_SD
V1.2R_SD

R642 1K

YFET-NDS7002AS

R401 1K

5

R414 1K

-HT_EN

Q43

HT_EN

Q41

2N3904S

CE

Q39

B

2N3904S

CE

B

VCC5_DUAL

VDD_CORE_RUN_PG31,35

PWRON_ATX_L31

A A

U65

28

VCC

C931
104P

1

AGND

15

PG1

EN_18

8

EN1

18_IL1

11

ILIM1

12

SS1

9 10

FPWM1# VSEN1

14

VIN

16

PG2/REF2OUT

21

EN2

12_IL2

18

ILIM2/REF2

17

SS2

20

FPWM2#

13

DDR

ISL6225-TSSOP28PIN

Phigh-gate = Vin/Vout * Iout^2 * Rds(on) = (1.2V / 5V) * 3^2 * 0.04 = 0.0864W
Plow-gate = (1-D) * Iout^2 * Rds(on) = [1- (1.2V / 5V)] * 3^2 * 0.019 = 0.13W

Ptotal = Phigh-gate + Plow-gate = 0.22W

BOOT1

HDRV1

SW1

LDRV1

PGND1

ISNS1

BOOT2

HDRV2

SW2

LDRV2

PGND2

ISNS2

VSEN2

3

BO1

C930 103P

6

HDRV1

5

PHASE_2V5

4

LDRV1

2
3

1SNS1

R791 536RST

7

BO2

C933 103P

23

HDRV2

24

PHASE_1V5

25

LDRV2

27
26

1SNS2

R796 665RST

22
19

1N5817S

D23

1N5817S

VCC

EC43 1000uF-10V

Q97

S1G1D1

G2
S2

Q98

S1G1D1

G2
S2

+

5
6

D1

7

D2

8

D2

5
6

D1

7

D2

8

D2

D22

3
4
2
1

FDS6930-SO8

3
4
2
1

FDS6930-SO8

Phigh-gate = Vin/Vout * Iout^2 * Rds(on) = (1.8V / 5V) * 2.5A^2 * 0.04 = 0.09W
Plow-gate = (1-D) * Iout^2 * Rds(on) = (1- 1.8V / 5V) * 2.5A^2 * 0.019 = 0.076W

Ptotal = Phigh-gate + Plow-gate = 0.166W

R788

1.82KST

VDD_18

+

EC11

1500u/6.3V

PHASE_2V5

CHOCK3

3.3UH

2.5A * ESR< 90mV => ESR < 36m ohm.

VSENSE_2V5

VCC3

EC44 1000uF-10V

+

PHASE_1V25

CHOCK10 3.3UH

SENSE_1V25

R792

1.82KST

R795

6.81KST

R797

17.4KST

VDD_12_A

+

CT4

1500u/6.3V

3A * ESR< 60mV => ESR < 20m ohm.

Irms2 = Iout*(D-D^2)^(1/2)=3*0.427 = 1.281A
1000u/10V Low ESR Capacitor, it's ripple current 1.45A.
Assume ambit temperature lower 70 degree C, the capacitor ripple 1.45A * 1.7 = 2.465A.

N CAPACITOR-INPUT = Irms2 / Capacitor
RIPPLE-CURRENT = 1.281A / 2.465A= 0.52 pcs

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

2

http://www.msi.com.tw

DDR POWER & MISC1

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

29 36

of

Rev

20

5

VR4
YLT1084S-TO263-4.5A

R814

5
6

20K

+12V

C936
104P

+

-

4 8

3 2

VIN VOUT

VOUT

ADJ

VCC3

3V_G1A

3VSB

3V_G2A

C943
104P

U36B

R809 1K
R811 1K

7

NS-LM358MX-SOIC8

VCC5_SB

C935

X_104P

D D

R803 1K

+12V

X_104PC942

VCC

VCC5_SB

R804 1K

VCC5_SB

R805 1K

YFET-NDS7002AS

R815 1K

X_104PC945

YFET-NDS7002AS

R810 1K
R812 1K

Q104

Q105

ATX_PWR_OK31,35

ATX_PWR_OK31,35

C C

4

1

C940

C944
104P

4

R799
200

R801
332X_104P

Q103

1

S1

D

2

G1

D

3

S2

D

4 5

G2 D

SI4532DY-SO8

VCC_OK1

VCC_OK

R813

1K

C937
104P

8
7
6

VCC_OK1 29

+

CT34
100u_25V

3VSB

+

VCC3_SB

CT35
100u_25V

VCC_OK

R369 4.7K

S3_L

VCC5_SB

3

R628

4.7K

YFET-NDS7002AS

Q81

VCC5_SB

RPWRON17,29,32

+12V

R800 1K

-5V_SW_MAIN

Q101

YFET-NDS7002AS

R802 1K

5V_SW_AUX

Q102

YFET-NDS7002AS

VCC_OK_L

12
13

5V_G1_USB

VCC5_SB

VCC_OK_L

VCC3_SB

147

VCC

5V_G2_USB

C522

39p

C941

+12V

R807 1K

VCC5_SB

U56D
74LCX08-SOIC14

11

2

R806 1K

-5V_SW_MAIN

YFET-NDS7002AS

R808 1K

5V_SW_AUX

YFET-NDS7002AS

Q100

1

S1

2

G1

3

S2

4 5

G2 D

SI4532DYH-SO8

C948

C949

104P

104P39p

Q107

Q109

1

8

D

7

D

6

D

VDD5_DUAL_REAR

C938
39p

C939
104P

VCC

C950
104P

5V_G1

5V_G2

S

G

G

NIKO-P3055LD-TO252
Q106

D

NDS352AP SOT-23

Q108

S D

C951
104P

VCC5_DUAL

VCC5_SB

B B

C743 104P

YREG431LS

VR3

3 1

A A

5

R586 330

2

C744 1000P

C511 105p

YFET-NDS7002AS

VCC

25_PG

R418

680RST

Q48

YFET-NDS7002AS

R416
432RST

VDD_1.5_VREF

C512 104P

-RUN_MODE

Q51

VDD_1.5_FB

R_MODE

+12V

3

+

2

-

4 8

R422 1K

R425 10

C509 104P

V1.5_CL V1.5_G

1

U36A
NS-LM358MX-SOIC8

R420 10

VCC5_SB

4

1000u/6.3V

R417 10

123456

ATX_PWR_OK 31,35

CT23

78

1000u/6.3V
RN104
8P4R-200

VCC3

EC12

G

C510 105P/0805

DS

Q47
15N03

+

C514
104P

R426

4.7K

VDD_15

(VDD_1.5_RUN)

C513 105P/0805

R423
1K

C516
1000P

3

R424 4.7K

VCC5_SB

R421
1K

-V1.5_PG

V1.5_PGV1.5_DIV

Q50

2N3904S

+

VCC5_SB

R419
1K

C515
1000P

VDD_1.5_AGP BLOCK

VDD_1.5_RUN_PG 31

Q49
YFET-NDS7002AS

2

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

HT CORE POWER & MISC2

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

30 36

1

Rev

20

of

5

D D

FS7

1.5A-miniSMDC200-S

VDD5_DUAL_REAR

C C

USB0_OC_L17,36

VDD5_DUAL_REAR

B B

1.5A-miniSMDC200-S

1.1A-S POLY SWITCH

FS3

VCC5_DUAL

FS5

VDD_USB_R2

VDD_USB_R1

X_0.1uC547

C558
39p

FB35 80S/0805

FB22 80S/0805

R435

2.7K
C538
39p

R436

5.1K

(VDD5_DUAL_REAL)

FB23 80S/0805

C549
39p

105P/0805

FB24 80S/0805

C559
104P

105P/0805

C550

C539

C551
39p

C560
39p

4

+

USBVCC1

EC15
470u-16V

C561
104P

+

USBVCCF

VDD_PS2_KBMSVDD_PS2

EC14
470u-16V

USBVCC2

C858
39p

+

(VDD5_DUAL_KB/MS)

VDD_PS2_KBMS 28

EC38
470u-16V

3

VCC3_SB

4
5

PWRON_ATX_L29

U56B

147

74LCX08-SOIC14

2

VCC3 VCC3

11

-12V
12

13

PWRON_L16,17

R428 33

PWRON_ATX_L

14
15

C521
39p

16
17

-5V
18

VCC

19
20

POWER

+12V

JPW1

3

4

D2x2

C536

C535

33p

103P

PLACE CAP 0.1u/39pF PAIR ON EACH PINS.

VCC3_SB

C548
104P

6

VCC5_SB

C555
104P

3 2

74QST3384S-QALY

Q88

3 2

VIN VOUT

REF.=1.25V
SOT-223

74QST3384S-QALY

3.3V

3.3V

3.3V

-12V
GND

GND

5V

PSON

GND

GND

5V

GND

GND

GND

POK

-5V

5VSB

5V

12V

5V

GND

12V

GND

12V

Q54

VIN VOUT

VOUT

REF.=1.25V
SOT-223

(EZ1117A)

VOUT

ADJ

1
2
3
4
5
6
7
8

VCC5_SB

9
10

VCC5_SB

VCC

ATX_PWR_OK 30,35

ATX_PWR_OK

+12V

EC18

+

10u/16V

(ATX_PSU_CONNECTOR)

VCC

R430
1K

R431 X_33

C526
39p

VCC3

1

C531

2

104P
C533
104P

-5V +12V

C541
104P

4

1

ADJ

4

Q88_ADJ

1

V1.8_FB

C553
1000P

C556
1000P

R437
348RST

22u/1206
R440
150RST

R441
348RST

R443
348RST

C946

C557
104P

1

POK

VCC

C527
1000P

C530
104P

C542
104P

(VDD_1.8_DUAL)

VCC18_SB

C552
104P

(VDD_2.5_ALWAYS)

VDD_25_SB

C947
22u/1206

-12V

C543
104P

POK

R454 33

VDD_2.5_SUS_PG29

VTT_DDR_SUS_PG29

R455 33
R456 33

VDD_PWGD3
VDD_PWGD4

-FP_RST

4
5

VCC3_SB

U55B

147

74LCX08-SOIC14

1
2

6

VDD_PWGD_2

C563 104P

VCC3_SB

VDD_1.8_RUN_PG29

A A

VDD_CORE_RUN_PG29,35

VDD_1.5_RUN_PG30

VDD_HT0A_RUN_PG29

R452 33

R448 33
R449 33

R457 33

VDD_PWGD5

VDD_PWGD6
VDD_PWGD7

VDD_PWGD8

10

VCC3_SB

9

U55C

147

74LCX08-SOIC14

12
13

U55_8

8

147

VCC3_SB

U55D
74LCX08-SOIC14

147

POWER GOOD CIRCUIT

U55A

U55_3

3

74LCX08-SOIC14

VDD_PWGD_2 5,35

VCC3_SB

U55_11

9

11

10

U56_8

147

74LCX08-SOIC14

C843 104P

1
2

8

U56C

ALL_GOOD_3

YFET-NDS7002AS

VCC3_SB

147

Q56

U56A

74LCX08-SOIC14

3

VCC5_SB

R453
1K

YFET-NDS7002AS

-VDD_PWGD_5

CB36
1u-0805

VDD_25_SB

R451
1K

Q55

R450 X_1K

ALL_GOOD

VDD_25_SB

53

1
2

NC7WZ08

R458 X_0

C564 104P

4

U12

-FP_RST32

-VDD_PWGD_5 19,26

5

4

3

2

-FP_RST

C562
X_104P

ALL_POWERGOOD 5,9,17

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

PWROK & USB PWR & ATX CONN.

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

31 36

of

Rev

20

5

R680

330

R467

D D

POWER_LED26

SUS_LED_SIO26 RPWRON 17,29,30

4.7K

VCC5_SB VCC5_SB

R683

330

R468

4.7K

VCC5_SBVCC

R679
1K

PWR_LEDG

CE

PLED

B

Q84

2N3904S

R682
1K

SUS_LEDG

CE

SLED Q87_G

B

Q86

2N3904S

2N3904S

VCC5_SB

B

Q58

B

PWR_LED

CE

R769 44.2RST

VCC5_SB

SUS_LED

CE

Q59
2N3904S

R463

330

AUX_LED

R464

330

4

STR_LED

1 2
CE

AUX_LED

1 2

SUPER-YEL-2.1V

VCC5_SB

GN-D-2.1V

B

Q85

2N3904S

CE

R681
1K

-RPWRON

Q87

B

2N3904S

R684

4.7K

3

CB19104P

2

CPU FAN

R489

4.7K

CFAN

Q57
FMMT618

CPU_FAN 26

CB21104P

FANCON1_IOH17

+12V

R486 4.7K

D14 1N4148S

SYS_CTRL26

R575 X_4.7K
R576 4.7K

SFAN_T

R47810

SFAN_12V

R47910

+

CT7
10u-35V

FANCON0_IOH17

CPU_CTRL26

+12V

R484 4.7K

D13 1N4148S

R46010
R46110 SYS_FAN1

CT20

10u-35V

R573 X_4.7K
R574 4.7K

CFAN_CTRL

CFAN_T

R485 10K

CFAN_12V

+

3
2

CFAN SFAN

1

CPUFAN1
D1x3-WH-SN

1

SYSTEM FAN

SFAN_CTRL

R487

10K

3
2
1

D1x3-WH-SN

R490

4.7K

SFAN

Q61
FMMT618

SYS_FAN 26

Intel Front Panel

VCC5_SB

R482
1K

C565
105P/0805

R772

4.7K

GPI_LOB1 26
GPI_FRONT_CABLE 26
SBD0- 24

SBD1+ 24

GPI_ESUPPORT_LED 26

GPI_ESUPPORT 26
INTRUDER_L 17
INTRUDER_CABLE_L 26

PWRBTIN 17

BUZZER

SPK

R492 220

ALARM26

SPKR_G

SPKR16,18

ALARM26

R495 1K

R494 220

CE

Q62

B

2N3904S

R493 0

A C

D15
1N4148S

VCC

SPK2

C568

104P

SPEAKER1
BUZZER

VCC3

R770

4.7K

PWR_LED
SUS_LED

PC_R

JFP1 JFP1

1
3
5 6
7
9

PLED

HDD+

SLED

HDD­RESET- PWSW+
RESET+

PWSW-

NC

JFP2

1 2
3
5
7 8

9 10
11 12
13 14
15 16
17 18
19

23 24
25 26
27 28
29 30
31 32
33 34

HEAD2X17_2MM

USBVCCF

4
6

20
22

2
4

8

VCC3_SB

PWRBTINPWRSW­IDE_LED

INTRUDER_L

PC_N

PWR_LED
SUS_LED
PWRBTIN
PWRSW-

R771

4.7K

R488
100

VCC3 VCC3

R481
330

R483 100

-FP_RST31

SBD0+24

SBD1-24

R831 10K

VCC3

+12V

CB22
1000P

HDD+
IDE_LED

RESET-

-FP_RST

C C

B B

VCC

GPI_LOB026

USB1_OC_NEC36

GPI_PCSPKDET26

VCC3_SB

PLED0SUSLED

S0

1

S1

0

S3

0

S5

A A

SPKR

R745

20K

0
1
1
0

R743 20K

R744 20K

C899 104P

-IN

5

+IN

MO_R

MO_L

1
2
3
4

C897 1u-0805

C898 1u-0805

U61

SD
BYPASS
+IN

-IN

SSM2211S-SOIC8

R746 20K

VOUT_B

VOUT_A

REGULATORS
OUTPUT DECOUPLING
CAPACITORS

MONO_R

MONO_L

8
7

-V

6

+V

5

C900
104P

PC_R

PC_N

MONO_R 22

MONO_L 22

+5VR

4

VCC5_SB

3

CB24 1u-0805

VCC3_SB

CB29
104P
CB30
104P

2

-IDEACTP25

-IDEACTS25

D16 1N4148S
D17 1N4148S

C569 470P

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

FRONT PANNEL & FAN

IDE_LED

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

32 36

of

Rev

20

5

4

3

2

1

PULL-UP RESISTORS

D D

SB Pull up resistors

IRQ1417,25
IRQ1517,25

-LPC_REQ16
SERIRQ17,26

-PCI_PME15,17,19,20,23,26,28,36

SMBCLK2_SB17,19

SMBDATA2_SB17,19

SMBCLK1_SB17,26

SMBDATA1_SB17,26

SMBCLK219,20,23

SMBDATA219,20,23

SMBCLK17,11,12,26

SMBDATA17,11,12,26

C C

-DEVSEL17,19,20,23,36

-TRDY17,19,20,23,36

-IRDY17,19,20,23,36

-FRAME17,19,20,23,36

-SERR17,19,20,23,36

-PERR17,19,20,23,36

-STOP17,19,20,23,36

-PIRQA15,17,19,20,36

-PREQ417,36

-PIRQB15,17,19,20,23,36

-PIRQC17,19,20,36

-PIRQD17,19,20

-PREQ017,19

B B

-PREQ117,19

-PREQ217,20

-PREQ317,20

PREQ_L17

-PREQ517,23

-PREQ617
PAR17,19,20,23,36

-PLOCK19,20

IRQ14
IRQ15

-LPC_REQ
SERIRQ

-PCI_PME

PCI BUS

-DEVSEL

-TRDY

-IRDY

-FRAME

-SERR

-PERR

-STOP

-PIRQA

-PREQ4

-PIRQB

-PIRQC

-PIRQD

-PREQ0

-PREQ1

-PREQ2

-PREQ3

PREQ_L

-PREQ5

-PREQ6
PAR

-PLOCK

R577 8.2K
R578 8.2K
R579 8.2K
R580 4.7K
R582 8.2K

R583 4.7K
R584 4.7K
R511 4.7K
R512 4.7K

R513 4.7K
R514 4.7K
R515 4.7K
R516 4.7K

RN99

1

1

2

2

3

3

4

4

6

6

7

7

8

8

9

9510

10P8R-8.2K

R501

8.2K

R829

8.2K

7 8
5 6
3 4
1 2

1 2
3 4
5 6
7 8

R553 8.2K
R554 8.2K
R555 8.2K
R571 8.2K
R572 8.2K

VCC
VCC
VCC3
VCC3

VCC3_SB

VCC3_SB

VCC3

VCC3

5

C572
X_104P

10

VCC3

For EMI

8P4R-8.2K
RN125

RN126
8P4R-8.2K

A A

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan

5

4

3

2

http://www.msi.com.tw

Pull up Resistor

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

33 36

1

Rev

20

of

5

BULK / Decopuling

4

3

2

1

SYSTEM

PCB OTHER COMPONENT

CPU

D D

C C

VDD_CORE

LAYOUT: Place on inside of processor.

C573

C574

C575

C576

0.22u

C594

0.22u

C628
X_0.22u/BOT

C577

0.22u

C595

0.22u

C629
X_0.22u/BOT

C646

0.22u

C596

0.22u

0.22u

C591

0.22u

0.22u

C592

0.22u

C626
X_0.22u/BOT

C643

0.22u

0.22u

C593

0.22u

C627
X_0.22u/BOT

C644
X_0.22u/BOT

VDD_12_A

VDD_18

VDD_18

LAYOUT: Place on backside of processor.

VDD_CORE

Bulk Decoupling

C679

C678

4.7u/1206

4.7u/1206

B B

C680

4.7u/1206

VDD_CORE

C768
1000P

C681

4.7u/1206

C766
1000P

VDD_18

C758

4.7u/1206

C35
1000P/BOT

C759

4.7u/1206

C765
1000P/BOT

C757

4.7u/1206

C767
1000P

LAYOUT: Place on next to Thor.

C602
104P

C614
1000P

C579

0.22u

C580

0.22u

C603
X_104P/BOT

VDD_12_AVDD_12_A

C582

0.22u

C604

104P

C623
1000P/BOT

VDD_12_A

C599

0.22u

C605
1000P/BOT

VCC3

C600

0.22u

C606

X_104P/BOT

C622
1000P/BOT

C874
1000P

C601

0.22u

C607
1000P/BOT

VDD_18

VCC3

VCC

104P/BOT

C621
1000P/BOT

C871
1000P

C753

0.22u

C608

VCC3

GND_CP1

VDD_18

104P

GND_CP2

GND_CP3

GND_CP4

X_BS1

C686

C589
104P/BOT

C648
104P

C658
104P

CB26
1000P

104P

C659

VCC

C636
104P

C661
104P

C534
1000P

VCC5_SB

C647
104P

VCC3

EC19

+

1000u/6.3V

VCC3

C660
1000P

VCC

EC20

+

1000u/6.3V

VCC3 VCC3 VCC3 VCC3

C683

C537

1000P

1000P

VCC

VCC VCC VCC VCC

C532
1000P

C637
104P

C638
104P

C808
1000P

C809

+

VDD_18

VCC3VDD_18VDD_18

C639
104P

VCC3_SB

100u-16V

C590
1000P

C684

104P

+12V

C640
104P

C662
104P

C685
104P

C641
104P

9

61

2

3 874

5 10

9

61

2

3 874

5 10

9

61

2

3 874

5 10

9

61

2

3 874

5 10

VDD_CORE

A A

C872
1000P

VCC

5

4

3

2

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

BULK / Decopuling

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

34 36

of

Rev

20

5

4

3

2

1

K8 Voltage Regular Module

D D

+12V

C700
104P 39p

VCC

C705 104P

53

VID[4..0]5,26

COREFB5

R522 10K

VDD_CORE

1

4

2

U41

NC7WZ08

VDD_CORE_EN

R523 0
R524 154KST CB34

COMP1

R533 51
R534 51

22pC709

R531
1K

C708 5600p

R527 10K

R530
0

VID4
VID3
VID2
VID1
VID0

CORE_PG

FS_ISL

COMP
FB_ISL

VDIFF
IDROOP

24

3
4
5
6
7

22
23

9

10

12
11

ATX_PWR_OK30,31
VDD_PWGD_25,31

C C

VCC

VDD_CORE_RUN_PG29,31

Droop Compensation

COREFB_L5

B B

VID4 VID3 VID2 VID1 VID0 Vout
1 1 1 1 0 0.800
1 1 1 0 1 0.825
1 1 1 0 0 0.850
1 1 0 1 1 0.875
1 1 0 1 0 0.900
1 1 0 0 1 0.925
1 1 0 0 0 0.950

1 0 1 1 0 1.000
1 0 1 0 1 1.025
1 0 1 0 0 1.050
1 0 0 1 1 1.075
1 0 0 1 0 1.100

A A

1 0 0 0 1 1.125
1 0 0 0 0 1.150
0 1 1 1 1 1.175

5

CHOK1 1.1uH-25A

C701

U42

EN
VID4

VID3
VID2
VID1
VID0
PGOOD

FS/DIS

COMP

FB

VDIFF
IDROOP

ISL6569CB

C702 CT8
39p

16

VCC

18

GND

15

GND

1

GND

20

PWM1

21

ISEN1

19

PWM2

17

ISEN2

8

OFS

2

OVP

13

VSEN

14

RGND

VDD5_I

ISEN1

ISEN2

OFS

820u-25V

VCC

R519
0

CB33
105P/0805

R521 3KST

R525 3KST

R529

2.2K

Offset Adjustment

VID4 VID3 VID2 VID1 VID0 Vout
0 1 1 1 0 1.200
0 1 1 0 1 1.225
0 1 1 0 0 1.250
0 1 0 1 1 1.275
0 1 0 1 0 1300
0 1 0 0 1 1.325
0 1 0 0 0 1.350
0 0 1 1 1 1.3751 0 1 1 1 0.975
0 0 1 1 0 1.400
0 0 1 0 1 1.425
0 0 1 0 0 1.450
0 0 0 1 1 1.475
0 0 0 1 0 1.500
0 0 0 0 1 1.525
0 0 0 0 0 1.550
1 1 1 1 1 Shutdown

4

VDD_12_VRM

CT9
820u-25V

CT10

CT11

820u-25V

+12V

R517

5.1

VDD_P0

CB32
105P/0805

PWM1

+12V

R526

5.1

VDD_P1

CB35
105P/0805

PWM2

INPUT CAPACITOR SOURCE

1. NCC C94-1521641-N07

2. RUBYCON C94-1521641-R07

3. NICHICON C94-1521641-N10

4. PANASONIC

OUTPUT CAPACITOR SOURCE

1. RUBYCON C94-2220611-R07

2. NCC C94-2220611-N07

3. NICHICON C94-2220611-N10

4. PANASONIC

High Side MOSFET
Main source:
IPB15N03=>D03-15N030B-I14
Second source:
FDB6035AL=>D03-6035ALB-F01
P55N02LS=>D03-55N020B-N03

Low Side MOSFET
Main source:
FDB6670AL=>D03-6670ALB-F01
Second source:
IPB07N03L=> D03-07N031B-I14
SUB85N03-07P=>D03-85N030B-V02

820u-25V

U40A

14

VCC

U_G1

BOOT1

PHASE1

3

GND

1

PWM1

HIP6602B

U40B

5 9

PVCC U_G2

BOOT2

PHASE2

6

PGND

2

PWM2

HIP6602B

3

C703

C704

4.7u/1206

4.7u/1206

PBT1

U_G1

12

R599 2.2

11

C706
104P

13

C707
1000P

L_G1 L_G1A

4

L_G1

PBT2

U_G2

2.2

10

R600

C710
104P

8

C711
1000P

7

L_G2

CB31

105P/0805

R518 2.2

BOOT1

R520 0

105P/0805

R528 2.2

BOOT2

R532 0

VDD_25

VDD_25

U_G1A

PHASE1

U_G2A

PHASE2

L_G2AL_G2

31

4

2

31

4

2

31

4

2

31

4

2

RN118

7 8
5 6
3 4
1 2

X_8P4R-1K

R629 X_1K

2

Q64
15N03

CHOK2 1.1uH/25A

Q65
6670A

Q66
15N03

CHOK3 1.1uH/25A

Q67
6670A

VDD_CORE

C854

X_4.7u/1206/BOT

VID1
VID2
VID3
VID4

VID0

CT13
2200u

CT36
2200u

C855

X_4.7u/1206/BOT

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

VDD_CORE

CT25

CT14
2200u

0.8V~1.55V/45A

CT37
2200u

C856

X_4.7u/1206/BOT

2200u

CT38
2200u

CT15
2200u

CT39
2200u

C857
X_4.7u/1206/BOT

VDD_CORE

Micro Star Restricted Secret

K8 CORE POWER

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

35 36

1

CT26
2200u

CT40
2200u

Rev

20

of

5

4

3

2

1

USB 2.0 Host Controller

D D

VCC3_SB

VCC3

VCC3_SB

-PCI_PME15,17,19,20,23,26,28,33

-PCIRST218,19,20
SMBALT117

C892
1000P

AD[31..0]

C_-BE[0..3]

-FRAME17,19,20,23,33

-DEVSEL17,19,20,23,33

-PREQ417,33

-PGNT417

-PERR17,19,20,23,33

-PIRQA15,17,19,20,33

-PIRQB15,17,19,20,23,33

-PIRQC17,19,20,33

USB_PCLK7

VCC3_SB

-SERR17,19,20,23,33

PAR17,19,20,23,33

-IRDY17,19,20,23,33

-TRDY17,19,20,23,33

-STOP17,19,20,23,33

C887 104P

R670 1.5K

R671 0
R672 0

R686 1.5K
R687 1.5K

R688 1.5K

For
Test

R676 X_1.5K
R677 1.5K

AD[31..0]17,18,19,20,23

C C

C_-BE[0..3]17,19,20,23

B B

VCC3_SB

VCC3_SB

C890
1000P

VCC3_SB

VCC3

5

C891
1000P

A A

C889
1000P

VCC3 VCC3

AD24

USB_PCLK

AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

C_-BE3
C_-BE2
C_-BE1
C_-BE0

CRUN0

VCC5_SB

VBBRST

RST0
SMI0

LEGC

X_104P/BOT

H14

AVDD

AVDD

AVSS(R)

AVSS

H16

C882

U57
uPD720100A

CLKSEL

XT1/SCLK

RSDM1

RSDP1

RSDM2

RSDP2

RSDM3

RSDP3

RSDM4

RSDP4

RSDM5

RSDP5

PPON1
PPON2
PPON3
PPON4
PPON5

NANDTEST

NTEST1
NTEST2

SIN/TIN

SOT/TOUT

SCK/TCLK

SRCLK
SRDTA

SRMOD

USB_AVDD

XT2

DM1

DP1

DM2

DP2

DM3

DP3

DM4

DP4

DM5

DP5

RREF

PC1
PC2

OCI1
OCI2
OCI3
OCI4
OCI5

N.C.1
N.C.2
N.C.3
N.C.4
N.C.5
N.C.6
N.C.7
N.C.8
N.C.9

SMC

TEB

AMC

TEST

C883

104P

CLKSEL

T11
C15
C14

RSDM1

P16
P17
P15

RSDP1

N16

RSDM2

N17
M16
M17

RSDP2

L16

RSDM3

F17
G16
F16

RSDP3

E17

RSDM4

E16
D15
D16

RSDP4

C17

T12
U13
T13
R14

RREF

H15
J17

J16

T7
T8
U8
R8

OCI5

U7
R7

P10
U10
T10
R11
U3
U15
U16
R17
D17
A2
T14
T16
J15
A15
A16
B14
D1
C3
D3
U11
T9
R10
A14
R6
T6
U6

EC39

+

22U/16V/S

R643 10K

XT1
XT2

R644 36

R647 36

R650 36

R653 36

R656 36

R659 36

R662 36

R665 36

R668 6.81KST

R669 10K

VCC3_SB VCC3_SB

SRCLK
SRDATA
SRMOD

C881

VSS

VCC5_SB

J1

U5

VDD_PCI

VDD_PCI

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

C1

L1

T1

U12

U14

T17

A13

C2

R2

104P

B7

AD31

C6

AD30

A5

AD29

C5

AD28

B5

AD27

C4

AD26

A4

AD25

B4

AD24

D2

AD23

E2

AD22

E3

AD21

E1

AD20

F2

AD19

F1

AD18

G2

AD17

G3

AD16

L3

AD15

M1

AD14

L2

AD13

M2

AD12

N1

AD11

N3

AD10

N2

AD9

P3

AD8

P2

AD7

R1

AD6

U2

AD5

T4

AD4

U4

AD3

R3

AD2

R4

AD1

T5

AD0

A3

CBE30

G1

CBE20

K2

CBE10

P1

CBE00

K3

PAR

H2

FRAME0

H3

IRDY0

J2

TRDY0

J3

STOP0

B2

IDSEL

H1

DEVSEL0

A6

REQ0

C7

GNT0

K4

PERR0

K1

SERR0

A8

INTA0

C8

INTB0

B8

INTC0

B9

PCLK

A10

VBBRST0

R5

CRUN0

C10

PME0

B12

VCCRST0

C12

SMI0

A7

PIN_EN

B13

LEGC

IRI1

A12

IRI1

IRI2

B11

IRI2

C11

IRO1

A11

IRO2

B10

A20S

B1

4

D8

VDD_PCI

VSS

T2

R16

VSS

VCC3_SB

U9

L17

G17

B17

A9

T3

T15

B15

B3

F3

M3

R13

R15

K15

F15

C13

M15

J4

D9

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VDD

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

C16

B16

B6

R9

R12

N15

L15

G15

E15C9H4P8P9

VSS

VSS

VSS

AVSS

AVSS

VSS

VSS

VSS

K17

K16

H17

K14

J14

D10

3

L15

L02-8008044-J07

1=>48MHz
0=>30MHz

R673
X_1.5K

R675
0

VCC3_SB

R674

1.5K

USB0_OC_L 17,31
USB1_OC_NEC 32

VCC3_SB

U58

6

SCLK

5

SDA

7

WP

ATMEL AT24C01A-10PC-2.7

2

VCC3_SB

Y4

R648 15K
R649 15K

R654 15K
R655 15K

R660 15K
R661 15K

R666 15K
R667 15K

8

VCC

1

A0

2

A1

3

A2

4

GND

30MHZ

C877

104P

VCC3_SB

C878

C879

104P

104P

C884

22P
C886

L16

X_B_L02-8008044-J07

22P

Micro Star Restricted Secret

Title
Document Number

MICRO-STAR INT'L
CO.,LTD.

No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw

C880

104P

XT1_OPT

C885

X_B_10P

Oscillator option

USB_N0_NEC_R 24
USB_P0_NEC_R 24

USB_N1_NEC_R 24
USB_P1_NEC_R 24

USB_N2_NEC_F 24
USB_P2_NEC_F 24

USB_N3_NEC_F 24
USB_P3_NEC_F 24

VCC3VCC3

C893

C894

1000P

1000P

USB 2.0 Host Controller

MS-6589

Last Revision Date:

Thursday, August 22, 2002

Sheet

1

36 36

of

Rev

20