MSI MS-6549 Schematics
8
7
6
5
4
3
2
1
Version 0A
MS-6549E
INTEL (R) Brookdale-E Chipset
Willamette/Northwood 478pin mPGA-B Processor Schematics
D D
04/08/2002 Update
CPU:
Willamette/Northwood mPGA-478B Processor
Cover Sheet
Block Diagram
Power Delivery Map
GPIO Spec.
Clock ICS950213AF & ATA100 IDE CONNECTORS
mPGA478-B INTEL CPU Sockets
System Brookdale-E Chipset:
INTEL MCH (North Bridge) +
INTEL ICH4 (South Bridge)
On Board Chipset:
C C
BIOS -- FWH
LPC Super I/O -- W83627HF
Clock Generator -- ICS950213AF
PCI SOUND -- C-MEDIA CMI8738MX
PCI 1394 -- TI TSB43AB22
INTEL Brookdale-E MCH -- North Bridge
DDR DIMMM1,2
DDR Damping & DDR Termination
INTEL ICH4 -- South Bridge
PCI AUDIO - CMI8738
PCI SLOT 1 & 2 & 3
AGP Slot & PCI 4
FWH
LPC I/O W83627HF
Expansion Slots:
AGP2.0 SLOT * 1
B B
PCI2.2 SLOT * 4
Front Panel & Connectors
USB & FAN Connectors
L6719B CPU Power ( PWM )-VRM9.0
IO Connectors
ERP BOM
601-6549E-A10
601-6549E-A20
Function Description
MS-6549E 00A Without 1394.
Standard
MS-6549E 00A With 1394.
Opt : A
LG SPEC.
LG SPEC.
TI 43AB22 1394
JUMPER SETTING
1
2
3
4
5
6 - 7
8 - 9
10
11
12-13
14-16
17
18
19
20
21
22
23ACPI Controller
24
25
26
27
28History I
A A
Title
Micro-Star
Document Number
Last Revision Date:
8
7
6
5
4
3
2
MS-6549E
Cover Sheet
Sheet of
Rev
00A
1 33Monday, April 08, 2002
1
8
D D
AGP
4X(1.5V)
AGP CONN
7
Power
Supply
CONN
AGP 4X
(1.5V)
6
VRM
9.0
4X (66MHz) AGP
(593PINS/FCBGA)
5
(478PINS)
Willamette/Northwood
Socket (mPGA478-B)
(400/533MHz)
Scalable Bus
MCH: Memory
Controller HUB
4
(100/133MHz)
(100/133MHz)
Scalable Bus/2
(200/266MHz)
3
CK408 Clock
DDR DIMM 1:2
2
1
( 66MHz X 4 )
C C
Heceta Hardware
Monitor
SM Bus
(421PINS/EBGA)
IDE CONN 1&2
(48MHz)
USB Port 0:3
LPC Bus
FWH: Firmware HUB
TI TSB43AB22
SIO
HUB Interface
ICH4: I/O
Controller HUB
(33MHz)
(33MHz)
(14.318MHz)
PCI (33MHz)
PCI Audio /
C-MEDIA
CMI8738
CD-ROM
Audio In
Line In
PCI Slots 1:4
Telephone In
MIC In
SPDIF/OUT
Line Out
1394
B B
PS2 Mouse &
Keyboard
A A
Parallel (1)
Serial (2)
Floppy Disk
Drive CONN
Title
Micro-Star
Document Number
Last Revision Date:
8
7
6
5
4
3
Wednesday, March 20, 2002
2
MS-6549E
Block Diagram
Sheet of
Rev
00A
2 33
1
8
Power Delivery Map
7
6
5
4
3
2
1
D D
ATX 12V POWER Supply
3.3V 5V 5VSB1A12V
VRM9.0
Processor Core
Processor Vtt
Power
Translator
ACPI IC
1.5V VREG
MCH Core 1.5V
MCH Vtt
MCH AGP
C C
OP
1.8V VREG
MCH HUB Interface 1.8V
MCH Memory DDR 2.5V
3.3V
DUAL
3.3V VREG
FET
DDR System Memory 2.5V
ICH2 Core 1.8V
ICH2 I/O 3.3V
ICH2 Resume 3.3V
1.8V VREG
5V TO 3.3V
RESISTOR
B B
ICH2 Resume I/O 1.8V
ICH2 RTC 3.3V
ICH2 5V
FWH 3.3V
LPC Super I/O 3.3V
CLOCK GEN 3.3V
NOTE1 --- MCH
VCC_AGP
NOTE2 --- DIMM
S0 STATE --- 2.0A * 2 = 4.0A ---> V_DIMM
S1/S3 STATE --- 200mA * 2 = 400mA ---> V_DIMM
V_DIMM -->400mA*2.5V/3.3V=303mA --> VCC3_SB
NOTE3 --- ICH4
HARDWARE AUDIO 3.3V
PCI LAN 3.3V/2.5V
VCC3_SB
5VDual For USB and K/B
VCC1_8SB
VCC5_SB
VCCP VCC_AGP
CPU
69.0A NOTE40
MCH
2.4A NOTE1
ICH4
ICS950213
FWH -SST
W83627HF
DIMM
PCI
USB
AGP
1.8V
VCC_AGP 550mA 266mA N/A
VCC1_5SB
VCC3(I/O)
VCC3_SB 167mA
0
0
0
0
0
0
0
0
= VCC1_5 (1.5A) VCC_AGP (0.37A)+
S0Power S3/S4/S5
132mA
82mA
528mA
=
=
= VCC3_SB VCC1_8SB+
POWER CONSUMPTION
VCC1_8
VCC3_DIMM VCC3 VCC5 VCC5_SB
0
0
0 0
0.2A
0
0
0
0
0
0 0
S1
99mA
52mA
0.76mA
1mA
2.0A 0 0
NOTE3 NOTE3 NOTE3
0
0
0
NOTE2
0
0
0
N/A
25mA
N/A
0.8mA / N/A
0
0
0
0
0
0
0
0
0
0
0
0
6.0A 1.0A8.0A 2.0A
0
0
0 0
0
NOTE2
+12V
0
0
0
0
0
0
0
0
0
0
0
?
-12V
0
0
0
0
0
0
0
0
A A
Title
Micro-Star
Document Number
Last Revision Date:
8
7
6
5
4
3
Wednesday, March 20, 2002
2
MS-6549E
Power Delivery Map
Sheet of
Rev
3 33
1
5
General Purpose I/O Spec.
4
3
2
1
D D
ICH4
FunctionTypeGPIO Pin
GPIO 0
GPIO 1
GPIO 2
GPIO 3
GPIO 4
C C
GPIO 5
GPIO 6~7
GPIO 8
GPIO 9~10
GPIO 11
GPIO 12~13
GPIO 14~15
GPIO 16
GPIO 17
GPIO 18~21
B B
GPIO 22
GPIO 23 O
GPIO 24~27
GPIO 28
GPIO 29~47
I
REQ#A
I
REQ#5
I
IRQE#
I
IRQF#
I
IRQG#
I
IRQH#
I
Not Implemented
I
SIO_PME#
I
Not Implemented
I
External SMI
I
Not Implemented
I
Not Implemented
O
Non Connect
O
GNT#5
O
Non Connect
O/D
Non Connect
BIOS Protect
I/O
Non Connect
I/O
LAN DISABLED(ICH4)
Non Connect
I/O
FWH
GPIO Pin Type Function
GPI 0
GPI 1
GPI 2
GPI 3
DEVICE
PCI Slot 1
PCI Slot 2 INTB#
PCI Slot 3
PCI AUDIO INTF# AD25 AUDPCLK
I
ATA IDE 1 Detect
I
ATA IDE 2 Detect
Reserved
I
I
Reserved
ICH INT Pin
INTA#
INTB#
INTC#
INTD#
INTC#
INTD#
INTA#
INTC#
INTD#
INTA#
INTB#
INTD# AD19PCI Slot 4
INTA#
INTB#
INTC#
IDSEL
AD16
AD17
AD18
CLOCK
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCI 1394 INTH#
A A
5
4
3
AD23
1394PCLK
Title
Micro-Star
Document Number
Last Revision Date:
2
Wednesday, March 20, 2002
MS-6549E
GPIO Spec.
Sheet of
1
Rev
00A
4 33
8
CB148
104P
filtering from 10K~1M
FB14 X_80_0805
CP12 X_COPPER
CB153
104P
VCC3
R265
VCCP
220
R254 X_10K
VCC3
SKTOCC#6
FB13 30S/0805
CB196
104P
R280 1K
B
R255
X_220
CB157
X_476P/0805
CE
Q27
3904
B
VDDA3V
VCC3
D D
* Put GND copper under Clock Gen.
connect to every GND pin
* 40 mils Trace on Layer 4
with GND copper around
it
* put close to every power pin
*
Trace Width 7mils.
*
Same Group spacing 15mils
*
Different Group spacing 30mils
*
Differentical mode spacing 7mils on itself
VCC3
C C
CB151
X_106P/0805
SMBDATA_ISO10,20,23
CE
Q24
X_3904
7
CLOCK GENERATOR BLOCK
VCC3V
CB152
X_104P
SMBCLK_ISO10,20,23
R279
X_1K
CB168
104P
CB171
104P
CB150
104P
CB149
104P
CB154
104P
C181
103P
C194
103P
C189
103P
SMBCLK_ISO
SMBDATA_ISO
39
36
46
43
29
18
13
24
21
47
34
33
26
25
19
U13
CPU_VDD
CPU_GND
MREF_VDD
MREF_GND
3V66_GND
9
PCI_VDD
5
PCI_GND
PCI_VDD
PCI_GND
48_VDD
48_GND
2
REF_VDD
REF_GND
CORE_VDD
CORE_GND
SCLK
SDATA
VTT_GD#
ICS950213AF
6
CPUCLK0
CPUCLK0#
CPUCLK1
CPUCLK1#
CPUCLK2
CPUCLK2#
3V66_03V66_VDD
3V66_1
3V66_2
3V66_48/SEL66_48#
FS2/PCI0
FS3/PCI1
SEL48_24#/PCI2
FS4/PCI3
FS0/48MHz
FS1/24_48MHz
MUL0/REF0
MUL1/REF1
RESET#
PWR_DN#
5
4
*Trace < 0.5"
CPU0
R227 27.4RST
CPU0#
R228 27.4RST
CPU1
R229 27.4RST
CPU1# MCHCLK#
R230 27.4RST
RN57
1 2
3 4
5 6
7 8
SEL48_2
FS2
FS3
SEL48_1
R252 33
7 8
FS4
5 6
RN63
3 4
8P4R-33 1 2
7 8
RN64
5 6
8P4R-33
3 4
1 2
FS0
R247 33
FS1 SIO_48
R241 33
MUL0 ICH_14
R232 33
MUL1 MUL0
R354 33
X1
X1 14M-32pf-HC49S-D
X2
R231 475RST
PWR_DN# VCC3V
R226 1K
VCC3 VCC3 VCC3 VCC3
CB167
104P
IREF
41
40
38
37
45
44
3132
30
28
27
6
7
8
10
11
PCI4
12
PCI5
14
PCI6
15
PCI7
16
PCI8
17
PCI9
22
23
48
1
3
X1
4
X2
35
20
42
CPUCLK
CPUCLK#
MCHCLK
8P4R-33
MCH_66
ICH_66
AGPCLK
PCICLK0
PCICLK1
PCICLK2
AUDPCLK
SIO_PCLK
FWH_PCLK
ICH_PCLK
ICH_48
AUDIO_14 AUDIO_14
10PC192
10PC187
CB147
104P
Iref = 2.32mA
CB170
104P
CPUCLK 6
CPUCLK# 6
MCHCLK 8
MCHCLK# 8
MCH_66 8
ICH_66 13
AGPCLK 18
1394PCLK 26
PCICLK3 18
PCICLK0 17
PCICLK1 17
PCICLK2 17
AUDPCLK 14
SIO_PCLK 20
FWH_PCLK 19
ICH_PCLK 12
ICH_48 13
SIO_48 20
ICH_14 13
AUDIO_14 14
CB146
104P
3
Shut Source Termination Resistors
CPUCLK
R221 49.9RST
CPUCLK#
R222 49.9RST
MCHCLK
R219 49.9RST
MCHCLK#
R223 49.9RST
Trace less 0.2"
49.9ohm for 50ohm M/B impedance
CLOCK STRAPPING RESISTORS
FS0 VCC3V
FS1
SEL48_1
FS3
FS2
FS4
SEL48_2
MUL1
1 1 1 1 1
SMBCLK_ISO
SMBDATA_ISO
R246 1K
R239 X_10K
R240 10K
RN65
1 2
3 4
5 6
7 8
8P4R-10K
R225 10K
R220 10K
R233 4.7K
R234 4.7K
VCC3V
VCC3V
FSB (MHz)FS4 FS3 FS2 FS1 FS0
100 MHz1 1 1 0 1
133 MHz
MUL0=0
MUL1=1
VCC3
2
1
Pull-Down Capacitors
CPUCLK
CPUCLK#
MCHCLK
MCHCLK#
AGPCLK
ICH_66
MCH_66
PCICLK3
PCICLK0
PCICLK1
PCICLK2
AUDPCLK
SIO_PCLK
FWH_PCLK
ICH_PCLK
1394PCLK
ICH_14
SIO_48
ICH_48
Ioh=6*Iref
Voh=0.71V
used only for EMI issue
X_10pC175
X_10pC176
X_10pC178
X_10pC177
1
2
3
4
5
6
7
8
7
8R353 33
5
6
3
4
1
2
1
2
3
4
5
6
7
8
X_10PC251
10PC174
10PC252
X_10PC180R248 X_10K
X_10PC193
Trace less 0.2"
CN12
X_8P4C-10P
CN13
X_8P4C-10P
CN14
X_8P4C-10P
B B
CPU (MHz)FS4 FS3 FS2 FS1 FS0
100 MHz1 1 1 0 1
1 1 1 1 1 133 MHz
VCC_AGP
R147
1.5K
A C
R148
D10
1K
Q17
2N3904SBE
X_1N4148S
C
ST19,18
A A
BSEL0 6
R128
2.2K
R129
2.2K
R130
X_8.2K
FS1
PDD[0..7]13
PD_IORDY13
PD_DACK#13
HD_RST#
HD_RST#23
PDD7
PDD6
PDD5
PDD4
PDD3
PDD2
PDD1
PDD0
PD_DREQ13
PD_IOW#13
PD_IOR#13
IRQ1412
PD_A113
PD_A013
PD_CS#113
PD_LED21
R92
4.7K
VCC5
ATA100 IDE CONNECTORS
8
7
6
PRIMARY IDE BLOCK
C107
X_220P
1
3 4
5 6
7 8
91110
13 14
17 18
19
21
23
25
27
29
31
33
35
37
R118
10K
VCC3
5
R180 33
IDE1
YJ220-CB-1
2
12
1615
22
24
26
28
30
32
34
36
38
4039
HD_RST#
PDD8
PDD9
PDD10
PDD11
PDD12
PDD13
PDD14
PDD15
C101 473P
473P
PDD[8..15] 13
PD_DET 19
PD_A2 13
PD_CS#3 13
4
SDD[0..7]13
SD_DREQ13
SD_IOW#13
SD_IOR#13
SD_IORDY13
SD_DACK#13
SD_CS#113
* Trace Width : 5mils
* Trace Spacing : 7mils
* Length(longest)-Length(shortest)<0.5"
* Trace Length less than 5"
SDD7
SDD6
SDD5
SDD4
SDD3
SDD2
SDD1
SDD0
IRQ1512
SD_A113
SD_A013
SD_LED21
R88
4.7K
VCC5
3
SECONDARY IDE BLOCK
IDE2
YJ220-CW-1
1
R117
10K
VCC3
3 4
5 6
7 8
91110
13 14
17 18
19
21
23
25
27
29
31
33
35
37
2
12
1615
22
24
26
28
30
32
34
36
38
4039
R177 33
C108
X_220P
Micro-Star
Document Number
Last Revision Date:
Wednesday, April 03, 2002
2
SDD8
SDD9
SDD10
SDD11
SDD12
SDD13
SDD14
SDD15
C100
Title
MS-6549E
Clock & ATA100 IDE
Sheet of
SDD[8..15] 13
SD_DET 19
SD_A2 13
SD_CS#3 13
5 33
1
Rev
00A
8
D D
HDEFER#8
CPURST#8
8
STPCLK#12
HDBSY#8
HDRDY#8
HTRDY#8
HLOCK#8
HBPRI#8
IGNNE#12
BSEL0
CPU_GD13
HDBI#0
HDBI#1
HDBI#2
HDBI#3
FERR#12
HINIT#12
HADS#8
HBNR#8
HIT#8
HITM#8
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
HSMI#12
A20M#12
SLP#12
CPU_GD
CPURST#
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
HDBI#[0..3]8
C C
CPU_TMPA;VTIN_GND
Trace : 10 mil
width 10mil space
B B
A A
CPU_TMPA20
VTIN_GND20
THERMTRIP#12
SKTOCC#5
PROCHOT#13
100/133 select
R27 1K
VCC3
BSEL05
HD#[0..63]8
HA#[3..31]8
AF26
AB26
AE21
AF24
AF25
AB23
AB25
AA24
AA22
AA25
W25
W26
E21
G25
P26
V21
AC3
AA3
W5
AB2
H5
H2
G1
G4
G2
D2
C1
D5
D4
C4
C3
C6
A22
AD2
AD3
AD6
AD5
Y21
Y24
Y23
Y26
V24
U3A
DBI0#
DBI1#
DBI2#
DBI3#
IERR#
V6
MCERR#
B6
FERR#
Y4
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
J6
TRDY#
ADS#
LOCK#
BNR#
F3
HIT#
E3
HITM#
BPRI#
E2
DEFER#
TDI
TDO
F7
TMS
E6
TRST#
TCK
B3
THERMDA
THERMDC
A2
THERMTRIP#
GND/SKTOCC#
PROCHOT#
B2
IGNNE#
B5
SMI#
A20M#
SLP#
RESERVED0
A7
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
BSEL0
BSEL1
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
7
HA#27
HA#28
HA#30
HA#29
HA#31
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
V22
U21
V25
U23
HD#53
HD#51
HD#50
HD#52
7
D43#
U24
U26
T23
T22
T25
T26
R24
R25
HD#48
HD#47
HD#46
HD#45
HD#42
HD#44
HD#43
HD#49
A27#
D42#
P24
6
HA#22
HA#25
HA#23
HA#26
A26#
D41#
R21
HD#41
HD#40
A25#
D40#
N25
HA#18
HA#24
HA#21
A24#
A23#
A22#
D39#
D38#
D37#
N26
M26
N23
HD#39
HD#37
HD#38
HD#36
A21#
D36#
M24
6
HA#14
HA#15
HA#16
HA#20
HA#19
HA#17
HA#13
HA#12
A20#
A19#
A18#
A17#
A16#
A15#
A14#
A13#
D35#
D34#
D33#
D32#
D31#
D30#
D29#
D28#
P21
N22
M23
H25
K23
J24
L22
M21
HD#32
HD#29
HD#34
HD#30
HD#28
HD#31
HD#35
HD#33
HD#27
A12#
D27#
H24
5
CPU SIGNAL BLOCK
HA#8
HA#9
HA#5
HA#4
A10#
D25#
L21
HA#3
HA#7
HA#6
AE25A5A4
A9#
A8#
A7#
A6#
A5#
A4#
A3#
DBR#
Differential
Host Data
Strobes
D24#
D23#
D22#
D21#
D20#
D19#
D18#
D17#
D16#
D15#
D26
F26
E25
HD#23
HD#22
HD#24
HD#21
D14#
F24
F23
G23
E24
H22
D25
J21
D23
HD#19
HD#14
HD#16
HD#20
HD#18
HD#15
HD#17
HD#13
5
AD26
ITP_CLK1
VSS_SENSE
VCC_SENSE
D13#
D12#
D11#
D10#
C26
H21
G22
HD#10
HD#11
HD#12
AC26
ITP_CLK0
D9#
B25
C24
HD#8
HD#9
VID4
VID3
AE1
AE2
VID4#
VID3#
D8#
D7#
D6#
D5#
C23
B24
D22
HD#5
HD#7
HD#6
HA#10
HA#11
A11#
D26#
G26
HD#26
HD#25
VID2
AE3
VID2#
D4#
C21
HD#4
VID1
VID0
AE4
AE5
VID1#
VID0#
D3#
D2#
A25
A23
HD#2
HD#3
4
VID[0..4] 20,24
GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D1#
D0#
B22
B21
PGA-S478-F02
HD#0
HD#1
4
AA21
AA6
F20
F6
AB4
AA5
Y6
AC4
AB5
AC6
H3
J3
J4
K5
J1
AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
F4
G5
F1
V5
AC1
H6
P1
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
GTLREF1
GTLREF2
BPM#5
BPM#4
BPM#1
BPM#0
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
R30 62
R34 62
R68 62
R16 62
HRS#2
HRS#1
HRS#0
R26 49.9RST
R65 49.9RST
3
HREQ#[0..4] 8
VCCP
CPUCLK# 5
CPUCLK 5
HRS#[0..2] 8
HBR#0 8
* Short trace
HADSTB#1 8
HADSTB#0 8
HDSTBP#3 8
HDSTBP#2 8
HDSTBP#1 8
HDSTBP#0 8
HDSTBN#3 8
HDSTBN#2 8
HDSTBN#1 8
HDSTBN#0 8
NMI 12
INTR 12
3
2
1
CPU GTL REFERNCE VOLTAGE BLOCK
VCCP
X_1u
C66
105P
C13
VCCP
R66
49.9RST
R67
100RST
R13
X_49.9
R14
X_100
GTLREF1
GTLREF2
C46
220P
C38
X_220p
2/3*Vccp
C47
220P
2/3*Vccp
C37
X_220P
Every pin put one 220pF cap near it.
Trace Width 10mils, Space 15mils.
Keep the voltage dividers within 1.5 inches of the
first GTLREF Pin
CPU ITP BLOCK
ITP_TMS
ITP_TDO
ITP_TDI
ITP_TRST#
ITP_TCK
R17 39
R18 75
R20 150
R33 680
R19 27RST
VCCP
ALL COMPONENTS CLOSE TO CPU
CPU STRAPPING RESISTORS
PROCHOT#
CPU_GD
HBR#0
CPURST#
THERMTRIP#
HINIT#
BPM#0
BPM#1
BPM#4
BPM#5
Micro-Star
Document Number
Last Revision Date:
2
R9 62
R63 300
R45 49.9RST
R62 49.9RST
R46 X_62
R32 300
R28 49.9RST
R29 49.9RST
R31 49.9RST
R15 49.9RST
Title
MS-6549E
INTEL mPGA478-B CPU1
Sheet of
VCCP
VCCP
6 33Wednesday, April 03, 2002
1
Rev
00A
8
VCCP
A10
A12
A14
A16
A18
A20A8AA10
AA12
VCC
VSS
AD16
VCC
VSS
AD18
VCC
VSS
AD21
VCC
VSS
AD23
VCC
VSS
AA14
VCC
VCC
VCC
VSS
VSS
VSS
AD4
AD8
AE11
U3B
VCC
D D
D10
A11
A13
A15
A17
A19
A21
A24
A26
A3
A9
AA1
AA11
AA13
AA15
AA17
AA19
AA23
AA26
AA4
AA7
AA9
AB10
AB12
AB14
AB16
AB18
AB20
C C
AB21
AB24
AB3
AB6
AB8
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
AD1
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD10
AD12
AD14
AA16
AE13
VCC
VSS
AA18
AE15
VCC
VSS
AA8
AE17
VCC
VSS
AB11
AE19
VCC
VSS
AB13
AE22
VCC
VSS
AB15
AE24
VCC
VSS
AB17
AE26
7
VCC
VSS
AB19
AE7
VCC
VSS
6
CPU VOLTAGE BLOCK
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B23
B20
B26B4B8
C11
C13
C15
C17C2C19
C22
C25C5C7C9D12
VSS
AF7
VCC
VSS
VCC
VSS
AF9
B11
VCC
VSS
D14
D16
5
B13
B15
B17
B19B7B9
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
D18
D20
D21D3D24D6D8E1E11
VCC
VSS
VCC
VSS
VCC
VSS
4
C10
C12
C14
C16
C18
C20C8D11
D13
D15
D17
D19D7D9
E10
E12
E14
E16
E18
E20E8F11
F13
F15
F17
F19
AF4
F9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E13
E15
E17
E19
E23
E7E9F10
F12
F14
F16
E4
E26
F18F2F22
F25F5F8
G21G6G24
VSS
VSS
G3H1H23
VSS
VSS
H26H4J2
AF3
VCC-VID
VSS
VSS
AD20
AE23
VCC-IOPLL
VCC-VIDPRG
VSS
VSS
VSS
VSS
J22
J25J5K21
3
VCCA
VSSA
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
PGA-S478-F02
AD22
Y5
Y25
Y22
Y2
W6
W3
W24
W21
V4
V26
V23
V1
U5
U25
U22
U2
T6
T3
T24
T21
R4
R26
R23
R1
P5
P25
P22
P2
N6
N3
N24
N21
M5
M25
M22
M2
L4
L26
L23
L1
K6
K3
K24
VCC_VID 23
C64
106P/1206
C59
106P/1206
2
C63
X_22u-1206
L8 4.7u-10%
L7 4.7u-10%
C58
X_22u-1206
1
VCCP
B B
CPU DECOUPLING CAPACITORS
VCCP
A A
CB52
106P/1206
CB31
106P/1206
CB54
106P/1206
8
VCCP VCCPVCCP
CB35
X_106P/1206
CB36
106P/1206
CB20
106P/1206
CB48
106P/1206
CB18
106P/1206
PLACE CAPS WITHIN CPU CAVITY
7
CB24
X_106P/1206
CB33
106P/1206
106P/1206
CB41
106P/1206
CB43
106P/1206
CB34
106P/1206
CB19
X_106P/1206
CB38
106P/1206
CB14
X_106P/1206
CB32
106P/1206
CB37
106P/1206
CB28
106P/1206
Reserve if necessary.
6
CB44
106P/1206
CB42
106P/1206
CB15
X_106P/1206CB17
CB56
X_106P/1206
CB21
106P/1206
CB27
106P/1206
CB22
106P/1206
5
VCCPVCCP
C23
X_106P/1206
C53
X_106P/1206
C45
X_106P/1206
PLACE CAPS WITHIN CPU CAVITY SOLDER
4
3
Micro-Star
Document Number
Last Revision Date:
Wednesday, April 03, 2002
2
Title
MS-6549E
INTEL mPGA478-B CPU2
Sheet of
1
Rev
00A
7 33
5
HA#[3..31]6
D D
HLOCK#6
HREQ#[0..4]6
C C
HDEFER#6
HRS#[0..2]6
B B
HL[0..10]12
A A
HTRDY#6
HDBSY#6
HDRDY#6
HADSTB#06
HADSTB#16
HDSTBN#06
HDSTBP#06
HDSTBN#16
HDSTBP#16
HDSTBN#26
HDSTBP#26
HDSTBN#36
HDSTBP#36
HDBI#[0..3]6
MCHCLK5
MCHCLK#5
HL[0..10]
HL_STB#12
HA#3
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HBR#06
HBNR#6
HBPRI#6
HADS#6
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HIT#6
HITM#6
HRS#0
HRS#1
HRS#2
HDBI#0
HDBI#1
HDBI#2
HDBI#3
R85 24.9RST
R107
HL0
HL1
HL2
HL3
HL4
HL5
HL_STB12
VCCP
5
24.9RST
AE11
AD11
AC15
AC16
AD15
AC13
AB18
AB20
AC19
AD18
AD20
AE19
AE21
AF18
AF20
AG19
AG21
AG23
AJ19
AJ21
AJ23
W3
W5
W2
W7
W6
AD4
AD3
AE6
AE7
AD5
AG4
AH9
AC2
P25
P24
N27
P23
M26
M25
N25
N24
AA9
AB8
T4
T5
T3
U3
R3
P7
R2
P4
R6
P5
P3
N2
N7
N3
K4
M4
M3
L3
L5
K3
J2
M5
J3
L2
H4
N5
G2
M6
L7
V7
Y7
V3
U6
T7
R7
U5
U2
Y5
Y3
Y4
U7
V5
V4
R5
N6
J8
K8
M8
U8
U7A
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
BR0#
BNR#
BPRI#
HLOCK#
ADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HIT#
HITM#
DEFER#
HTRDY#
RS0#
RS1#
RS2#
DBSY#
DRDY#
HAD_STB0#
HAD_STB1#
HD_STBN0#
HD_STBP0#
HD_STBN1#
HD_STBP1#
HD_STBN2#
HD_STBP2#
HD_STBN3#
HD_STBP3#
DBI0#
DBI1#
DBI2#
DBI3#
BCLK
BCLK#
H_RCOMP0
H_RCOMP1
HI0
HI1
HI2
HI3
HI4
HI5
HI_STB
HI_STB#
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
82845-E
HOST
HUB LINK
POWER
4
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
RSTIN#
CPURST#
H_VREF0
H_VREF1
H_VREF2
H_VREF3
H_VREF4
H_SWNG0
H_SWNG1
HI10
HI_REF
HL_RCOMP
VCC1_8
VCC1_8
VCC1_8
VCC1_8
VCC1_8
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD7
RSVD8
RSVD9
NC0
NC1
4
3
HD#0
AA2
HD#1
AB5
HD#2
AA5
AB3
HD#3
HD#4
AB4
HD#5
AC5
HD#6
AA3
HD#7
AA6
HD#8
AE3
HD#9
AB7
HD#10
AD7
HD#11
AC7
HD#12
AC6
AC3
HD#13
HD#14
AC8
HD#15
AE2
HD#16
AG5
HD#17
AG2
HD#18
AE8
HD#19
AF6
HD#20
AH2
HD#21
AF3
HD#22
AG3
AE5
HD#23
HD#24
AH7
HD#25
AH3
HD#26
AF4
HD#27
AG8
HD#28
AG7
HD#29
AG6
HD#30
AF8
HD#31
AH5
HD#32
AC11
AC12
HD#33
HD#34
AE9
HD#35
AC9
HD#36
AE10
HD#37
AD9
HD#38
AG9
HD#39
AC10
HD#40
AE12
HD#41
AF10
HD#42
AG11
AG10
HD#43
HD#44
AH11
HD#45
AG12
HD#46
AE13
HD#47
AF12
HD#48
AG13
HD#49
AH13
HD#50
AC14
HD#51
AF14
HD#52
AG14
AE14
HD#53
HD#54
AG15
HD#55
AG16
HD#56
AG17
HD#57
AH15
HD#58
AC17
HD#59
AF16
HD#60
AE15
HD#61
AH17
HD#62
AD17
AE16
HD#63
P22
66IN
J27
AE17
HVREF
M7
R8
Y8
AB11
AB17
HSWNG
AA7
AD13
HL6
L28
HI6
HL7
L27
HI7
HL8
M27
HI8
HL9
N28
HI9
HL10
M24
HUB_MREF
P26
P27
R149 40.2RST
L25
L29
M22
N23
N26
G9
G10
H6
J25
J23
G16
G17
H7
H27
K23
K25
AD26
AD27
VCC1_8
HD#[0..63] 6
MCH_66 5
PCIRST#1 14,19,20,23,26
CPURST# 6
PCIRST#1
HL[0..10]
VCC1_8
VCC_AGP
V_DIMM
C250
X_100P
3
VTT1
VTT2
VTT_GND1
VTT_GND2
W22
W29
AA22
AA26
AB21
AC29
AD21
AD23
AE26
AF23
AG29
AJ25
AD12
AD14
AD16
AD19
AD22
AE18
AE20
AE29
AF11
AF13
AF15
AF17
AF19
AF21
AF25
AG18
AG20
AG22
AH19
AH21
AH23
AJ11
AJ13
AJ15
AJ17
AJ27
U7C
R22
VCC1_5
R29
U22
U26
N14
N16
P13
P15
P17
R14
R16
T15
U14
U16
T13
T17
A5
A9
A13
A17
A21
A25
C1
C29
D7
D11
D15
D19
D23
D25
F6
F10
F14
F18
F22
G1
G4
G29
H8
H10
H12
H14
H16
H18
H20
H22
H24
J5
J7
K6
K22
K24
K26
L23
U13
U17
AE1
AE4
AF5
AF7
AF9
AG1
AJ3
AJ5
AJ7
AJ9
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCC1_5
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
82845-E
POWER
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
2
A3
A7
A11
A15
A19
A23
A27
D5
D9
D13
D17
D21
E1
E4
E26
E29
F8
F12
F16
F20
F24
G26
H9
H11
H13
H15
H17
H19
H21
J1
J4
J6
J22
J26
J29
K5
K7
K27
L1
L4
L6
L8
L22
L24
L26
M23
N1
N4
N8
N13
N15
N17
N22
N29
P6
P8
P14
P16
R1
R4
R13
R15
R17
R26
T6
T8
T14
T16
T22
U1
U4
U15
U29
V6
V8
V22
W1
W4
W8
W26
Y6
Y22
AA1
AA4
AA8
AA29
AB6
AB9
AB10
AB12
AB13
AB14
AB15
AB16
AB19
AB22
AC1
AC4
AC18
AC20
AC21
AC23
AC26
AD6
AD8
AD10
2
MCH REFERENCE BLOCK
VTT1
VTT_GND1
VTT2
VTT_GND2
Trace/Space=5/10mils <1.5"
CB98
X_22u-1206
104P
CB99
104P
106P/1206
HSWNG
C88
104P
Place 1 Cap. as Close as possible to
every pin of MCH
Trace width use 15 mils and 15mils space
HVREF
C118
103P
Place 1 Cap. as Close as possible to
every pin of MCH
Trace width use 15 mils and 15mils space
C90
103P
HUB_MREF
C89
103P
C137
103P
Place 0.01uF Cap. as Close as possible to MCH
Trace width use 15 mils and 15mils space
MCH Trace Decoupling Capacitors
VCCP VCCP VCC1_8
CB16
X_0.1u
CB10
X_0.1u
CB26
X_0.1u
ADDRESS
Micro-Star
Document Number
Last Revision Date:
Wednesday, April 03, 2002
Title
1
L11 4.7u-10%
C126
C129
106P/1206
L10 4.7u-10%
C128
C125
X_22u-1206
VCCP
C110
C112
103P
103P
VCCP
C91
C111 C92
103P
103P
VCC1_8
C139
C138
104P
104P
CB65
X_0.1u
CB47
X_0.1u
CB55
X_0.1u
CB62
X_0.1u
MCH & ICH2
DATA
MS-6549E
Brookdale MCH1
Sheet of
1
VCC_AGP
VCC_AGP
R112
301RST
R116
150RST
R84
49.9RST
R83
100RST
104P
R153
150RST
R150
150RST
CB138
104P
Rev
00A
8 33
1" trace
D D
C C
B B
A A
GC_BE#[0..3]18
5
MD[0..63]11
1" Trace
GAD[0..31]18
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
GAD0
GAD1
GAD2
GAD3
GAD4
GAD5
GAD6
GAD7
GAD8
GAD9
GAD10
GAD11
GAD12
GAD13
GAD14
GAD15
GAD16
GAD17
GAD18
GAD19
GAD20
GAD21
GAD22
GAD23
GAD24
GAD25
GAD26
GAD27
GAD28
GAD29
GAD30
GAD31
GC_BE#0
GC_BE#1
GC_BE#2
GC_BE#3
5
AA28
AB25
AB27
AA27
AB26
AB23
AA24
AA25
AB24
AC25
AC24
AC22
AD24
AA23
G28
F27
C28
E28
H25
G27
F25
B28
E27
C27
B25
C25
B27
D27
D26
E25
D24
E23
C22
E21
C24
B23
D22
B21
C21
D20
C19
D18
C20
E19
C18
E17
E13
C12
B11
C10
B13
C13
C11
D10
E10
C9
D8
E11
C7
C6
D6
D4
C4
C3
D3
F4
F3
C2
G5
G3
H3
R27
R28
T25
R25
T26
T27
U27
U28
V26
V27
T23
U23
T24
U24
U25
V24
Y27
Y26
Y23
V25
V23
Y25
E8
B9
B7
B3
E6
B5
E5
B2
E2
U7B
82845-E
SDQ0
SDQ1
SDQ2
SDQ3
SDQ4
SDQ5
SDQ6
SDQ7
SDQ8
SDQ9
SDQ10
SDQ11
SDQ12
SDQ13
SDQ14
SDQ15
SDQ16
SDQ17
SDQ18
SDQ19
SDQ20
SDQ21
SDQ22
SDQ23
SDQ24
SDQ25
SDQ26
SDQ27
SDQ28
SDQ29
SDQ30
SDQ31
SDQ32
SDQ33
SDQ34
SDQ35
SDQ36
SDQ37
SDQ38
SDQ39
SDQ40
SDQ41
SDQ42
SDQ43
SDQ44
SDQ45
SDQ46
SDQ47
SDQ48
SDQ49
SDQ50
SDQ51
SDQ52
SDQ53
SDQ54
SDQ55
SDQ56
SDQ57
SDQ58
SDQ59
SDQ60
SDQ61
SDQ62
SDQ63
RCVENIN#
RCVENOUT#
G_AD0
G_AD1
G_AD2
G_AD3
G_AD4
G_AD5
G_AD6
G_AD7
G_AD8
G_AD9
G_AD10
G_AD11
G_AD12
G_AD13
G_AD14
G_AD15
G_AD16
G_AD17
G_AD18
G_AD19
G_AD20
G_AD21
G_AD22
G_AD23
G_AD24
G_AD25
G_AD26
G_AD27
G_AD28
G_AD29
G_AD30
G_AD31
G_C/BE0#
G_C/BE1#
G_C/BE2#
G_C/BE3#
DDR
AGP
Tri-Stated
during
RSTIN#
assertion
4
SM_RCOMP
SD_REF0
SD_REF1
G_FRAME#
G_IRDY#
G_TRDY#
G_DEVSEL#
G_STOP#
G_REQ#
G_GNT#
AD_STB0
AD_STB0#
AD_STB1
AD_STB1#
G_RCOMP
4
SMA0
SMA1
SMA2
SMA3
SMA4
SMA5
SMA6
SMA7
SMA8
SMA9
SMA10
SMA11
SMA12
SCS#0
SCS#1
SCS#2
SCS#3
SCB0
SCB1
SCB2
SCB3
SCB4
SCB5
SCB6
SCB7
SDQS0
SDQS1
SDQS2
SDQS3
SDQS4
SDQS5
SDQS6
SDQS7
SDQS8
SCK0
SCK#0
SCK1
SCK#1
SCK2
SCK#2
SCK3
SCK#3
SCK4
SCK#4
SCK5
SCK#5
SCKE0
SCKE1
SCKE2
SCKE3
SRAS#
SCAS#
SWE#
SBS0
SBS1
G_PAR
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
SB_STB
SB_STB#
PIPE#
RBF#
WBF#
AGPREF
TESTIN#
3
DDRMA0
E12
DDRMA1
F17
DDRMA2
E16
DDRMA3
G18
DDRMA4
G19
DDRMA5
E18
DDRMA6
F19
DDRMA7
G21
DDRMA8
G20
DDRMA9
F21
DDRMA10
F13
DDRMA11
E20
DDRMA12
G22
CS#0
E9
CS#1
F7
CS#2
F9
CS#3
E7
CB0
C16
CB1
D16
CB2
B15
C14
CB3
CB4
B17
CB5
C17
CB6
C15
CB7
D14
SDQS0
F26
SDQS1
C26
SDQS2
C23
SDQS3
B19
D12
SDQS4
SDQS5
C8
SDQS6
C5
SDQS7
E3
SDQS8
E15
DCLK0
E14
F15
J24
G25
G6
G7
G15
G14
E24
G24
H5
F5
G23
E22
H23
F23
F11
G8
G11
G12
G13
J28
J9
J21
Y24
W27
W24
W28
W23
W25
AG24
AH25
AH28
AH27
AG28
AG27
AE28
AE27
AE24
AE25
AF27
AF26
AG25
ST0
AF24
ST1
AG26
ST2
R24
R23
AC27
AC28
AF22
AE22
AE23
CB209 X_0.1u
AA21
AD25
H26
DCLK#0
DCLK1
DCLK#1
DCLK2
DCLK#2
DCLK3
DCLK#3
DCLK4
DCLK#4
DCLK5
DCLK#5
DDRCKE0
DDRCKE1
DDRCKE2
DDRCKE3
RASA#
CASA#
WEA#
BS0
BS1
MRCOMP
SM_REF
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
ST0
ST1
ST2
5020
R145 40.2RST
R144 X_4.7K
DCLK0 10
DCLK#0 10
DCLK1 10
DCLK#1 10
DCLK2 10
DCLK#2 10
DCLK3 10
DCLK#3 10
DCLK4 10
DCLK#4 10
DCLK5 10
DCLK#5 10
BS0 10,11
BS1 10,11
DDRMA[0..12] 10,11
CS#[0..3]
CB[0..7]
DDRCKE0 10,11
DDRCKE1 10,11
DDRCKE2 10,11
DDRCKE3 10,11
RASA# 10,11
CASA# 10,11
WEA# 10,11
GFRAME# 18
GIRDY# 18
GTRDY# 18
GDEVSEL# 18
GSTOP# 18
GPAR 18
GREQ# 18
GGNT# 18
SBA[0..7] 18
SB_STB 18
SB_STB# 18
ST[0..2] 5,18
GAD_STB0 18
GAD_STB#0 18
GAD_STB1 18
GAD_STB#1 18
PIPE# 18
RBF# 18
WBF# 18
AGPREF 18
VCC1_8
CS#[0..3] 10,11
CB[0..7] 11
SDQS[0..8] 11
3
MCH MEMORY CLOCK RC CIRCUITS
MRCOMP
VCCP
CB88
104P
CB93
104P
CB95
103P
CB92
106P/1206
CB89
X_106P/1206
C135 103P
BACK
VCCP
CB203 X_0.1u
VCC_AGP V_DIMM
CB207 X_0.1u
CB205 X_0.1u
CB211 X_0.1u
CB206 X_0.1u
CB210 X_0.1u
HI: SDRAM
LO:DDR
ST0
2
MCH REFERENCE VOLTAGE
DDR_VTT
R146
30RST
C141
X_104P
CB110
104P
SM_REF
MCH DECOUPLING CAPACITOR
VCC1_8 V_DIMM
CB108
104P
CB107
104P
5020
5020
5020
5020
5020
5020
AGPREF
CB208 X_0.1u
CB204 X_0.1u
R166 2K
104PC136
VCC_AGP
5020
5020
Micro-Star
Document Number
Last Revision Date:
2
Wednesday, April 03, 2002
CB109
104P
CB106
104P
CB112
104P
CB105
104P
CB97
104P
5020
Title
1
DIMMREF
C122
C248
104P
X_0.1u
MS-6549E
Brookdale MCH 2
Sheet of
1
CB91
104P
CB102
104P
CB96
104P
CB84
104P
CB77
104P
CB86
104P
CB81
104P
9 33
Rev
00A
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