8
7
6
5
4
3
2
1
Cover Sheet
Block Diagram
MAIN CLOCK GEN
D D
DDR CLOCK BUFFER
mPGA478-B INTEL CPU Sockets
SIS 650 A1 NORTH BRIDGE
DDR SLOT
DDR TERMINATOR
SIS 961A2 SOUTH BRIDGE
SIS301B & DVI + TV-OUT
PCI SLOT 19
LAN CONTROLLER RTL8101 20
C C
IDE CONNECTOR
FRONT USB CONNECTOR
KB/MS & REAR USB CONNECTOR
AC'97 CODEC ALC201/ALC650
FRONT & REAR AUDIO CONNECTOR
LPC I/O(W83697HF)
HARDWARE MONITOR
SERIAL PORT
PARALLEL PORT
B B
FLASH MEMORY
VRM 9. X
ATX POWER CON & V GA CO N
FRONT PANEL
CARDBUS OZ6933 & PCMCIA SOCKET
ACPI CONTROLLER W83302 MS-5
MEMORY STICK W83L518D & SOCKET
2-PORT 1394 - NEC72874
Decoupling Capacitor
A A
1
2
3
4
5 - 6
7- 10
11-12
12
13-16
17-18
21RJ45 CONNECTOR
22
23
24
25
26
27
28
29
30
31
32
33
34
35-36
37
38
39
40
41HISTORY
Last Schematic Update Date:
6/11/2002 V01
MS-6535
SIS 650 CHIPSET
Willamette/Northwood 478pin mPGA-B Processor Schematics
CPU:
Willamette/Northwood mPGA-478B Processor
System SIS650 Chipset:
On Board Chip:
Expansion Slots:
SIS 650A1 (North Bridge) +
961A2 (South Bridge)
LPC Super I/O -- W83697HF
BIOS -- ISA
AC' 97 CODEC -- ALC650 Ver:D
CLOCK GENERATION -- ICS 952001
LAN -- RTL8101L
PCMCIA -- OZ6933
DVO -- SIS301B DVI + TV-OUT + 2nd CRT
1394 -- NEC72874- 2ports
MEMORY STICK -- W83L518D Ver:B
PCI2.2 SLOT* 1 ( RISER CARD PCI*2 )
VERSION:10B
MICRO-STAR INT'L CO.,LTD.
Title
COVER PAGE
Size Document Number Rev
MS-6535 1.0B
C
8
7
6
5
4
3
Date: Sheet
2
of
141Tuesday, June 11, 2002
1
8
System Block Diagram
D D
C C
DVI-A
AV &
S-VIDEO
7
TMDS LCD
TV-OUT
2nd CRT
VGA
CONNECTOR
6
Simultaneous
display
SIS301B
ENCODER
SOCKET-478
110MHz
SIS650A1
5
Host Bus
400MHz
4
DDR266
SSTL-2 Termination
(Only for DDR)
DIMM 1 DIMM 2
1GB / per DIMM
3
2
PCI DEVICE ROUTING TABLE
DEVICE
1394
LAN
INT pin IDSEL
INTD#
INTC#
1
AD23
AD26
INTB#MODEM
VGA
PCMCIA
PCI SLOT
Rtt
FRONT
INTA#
INTB#
INTB#
INTC#
INTD#
INTA#
AD25
AD17
Support 6 PCI Devices
33MHz
IDE 2
IEEE
1394
REAR
LAN
RTL8101
RJ45
B B
IDE 1
A A
8
FRONT
KEYBOARD
PS/2 MOUSE
7
CARDBUS
OZ6933
PCMCIA
SOCKET
FAN1 FAN2
Legacy
ROM
PCI
SLOT 1
PS/2
FAN
CONTROL
ISA
GPIOs
6
SiS961A2
HyperZip
533MB/s
LPC
Bus
LPC Super I/O
W83697HF
COM2
COM1 PARALLEL FLOPPY
5
AC'97
USB1.1 12MHz
M.S.
W83L518D
VOLTAGE MONITOR
TEMPERATURE MONITOR
4
Audio Codec
ALC650
USB 0
USB 1
REAR
PORT
MEMORY
STICK
FRONT
USB 2
USB 3
REAR
FRONT PORT
3
Audio port
USB 4
USB 5
PCI RISER
DEVICE
PCI #1
PCI #2
MICRO-STAR INT'L CO.,LTD.
Title
System Block Diagram
Size Document Number Rev
MS-6535 1.0B
Custom
Date: Sheet
INT pin
INTB#
INTC#
INTD#
INTA#
INTC#
INTD#
INTA#
INTB#
2
241Tuesday, June 11, 2002
IDSEL
AD17
AD18
of
1
8
VCC3
C121
104p
C1
103p
C143
104p
L13
CP13
X_80-0805
D D
C148
X_4.7u-0805
X_COPPER
C132
104p
VCC3
C C
VCCP
R179
10K
B B
R178
10K
Q10
NPN-3904LT1-S-SOT23
NPN-3904LT1-S-SOT23
C131
103p
C120
104p
VCC3
Q9
C198
X_4.7u-0805
7
C188
103p
C167
104p
R159
10K
CP23 X_COPPER
VCC3
C197
104p
VCC3
EC9
10u
C166
104p
R170
L33
X_80-0805
C146
104p
104p
C181
6
5
4
3
2
1
Main Clock Generator
By-Pass Capacitors
U10
ICS952001AF / ICW28342
1
VDDREF
11
VDDZ
13
VDDPCI
19
VDDPCI
28
100P
C165
VDD48
29
VDDAGP
42
VDDCPU
48
VDDSD
12
PCI_STOP#
45
CPU_STOP#
5
VSSREF
8
VSSZ
18
VSSPCI
24
VSSPCI
25
VSS48
32
VSSAGP
41
VSSCPU
46
VSSSD
33
PD#/VTT_PWRGD
38
IREF
36
VDDA
37
VSSA
XIN
6
Y3
14M-32pf-HC49S-D
C145
27p
CPUCLK0
CPUCLK#0
CPUCLK1
CPUCLK#1
SDCLK
AGPCLK0
AGPCLK1
ZCLK0
ZCLK1
PCICLK_F0/FS3
PCICLK_F1/FS4
PCICLK0
PCICLK1
PCICLK2
PCICLK3
PCICLK4
PCICLK5
REF0/FS0
REF1/FS1
REF2/FS2
24_48M/MULTISEL
SCLK
SDATA
XOUT
7
C149
27p
40
39
44
43
47
31
30
9
10
14
15
16
17
20
21
22
23
2
3
4
27
48M
26
35
34
C163
104p
475RST
C187
104p
C108
100P
Damping Resistors
Place near to the
Clock Outputs
R172
R171
R174
R173
R175
R167
R116
R115
RN21 33
FS3
FS4
RN19 33
MULTISEL
RN20 33
R118
R166
R165
R164
FS0
FS1
FS2
VCC3
R105 X_2.7K
R117 X_2.7K
R103 X_2.7K
R102 X_2.7K
ICS952001A : Stuff R120
ICW28342 : Stuff R119
CPUCLK0
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
33
CPUCLK-0
33
CPUCLK1
33
CPUCLK-1
33
SDCLK
22
AGPCLK0
22
ZCLK0
22
ZCLK1
22
96XPCLK
SIOPCLK
PCICLK1
PCICLK2
CARD_CLK
1394PCLK
PCICLK5
MS_CLK
33
SIO48M
22
UCLK48M
22
22
SMBCLK
SMBDAT
FS1
FS2
FS3
FS4
CPUCLK0 5
CPUCLK-0 5
CPUCLK1 7
CPUCLK-1 7
SDCLK 8
AGPCLK0 7
ZCLK0 9
ZCLK1 13
96XPCLK 13
SIOPCLK 27
PCICLK1 19
PCICLK2 19
CARD_CLK 35
1394PCLK 39
PCICLK5 20
MS_CLK 38
REFCLK0
REFCLK0 9
REFCLK1
REFCLK1 14
APICCLK APICCLK
APICCLK 14
REFCLK3
REFCLK3 17
SCLK
SCLK 35,36
SIO48M 27
UCLK48M 15
MS_48 38
SMBCLK 4,11,14,37
SMBDAT 4,11,14,37
Frequency Selection
VCC3 VCC3
R120
4.7K
FS0 MULTISEL
R119
X_2.7K
R162
4.7K
R163
X_0
Place near to the Clock Outputs
CPUCLK0
CPUCLK-0
CPUCLK1
CPUCLK-1
SDCLK
AGPCLK0
ZCLK0
ZCLK1
PCICLK2
PCICLK1
SIOPCLK
96XPCLK
MS_CLK
PCICLK5
1394PCLK
CARD_CLK
R187
R186
R189
R188
C185 X_10p
C186 X_10p
C103 X_10p
C102 X_10p
CN4 X_10p
1 2
3 4
5 6
7 8
CN3 X_10p
1 2
3 4
5 6
7 8
C105 10p
REFCLK0
REFCLK1
SCLK
REFCLK3
UCLK48M
SIO48M
MS_48
C107 10p
C106 10p
C26 10p
C104 10p
C184 10p
C183 10p
C182 10p
49.9RST
49.9RST
49.9RST
49.9RST
FS4 FS1FS2FS3 FS0
0
0
0
0
0
0
0
0
0
A A
0
0
0
0
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
SIS650 CLOCK SIS650 CLOCK
000
001
010
011
101
11
111
000
001
010
011
101
11
111
8
001
0
001
0
SDRAM
CPU PCI
(MHz) (MHz) (MHz)
66.67 66.67 66.67 66.67 33.33
100
100
100
200
100
133
100
150
100
125
100
160
100
133
100
200
100
166
100
166
80.00
133
80.00
133
95.00
95.00
95.00
126
66.67
66.67
7
ZCLK
(MHz)
66.67
66.67
66.67
60.00
62.50
66.67
80.00
66.67
62.50
71.43
66.67
66.67
63.33
63.33
50.00
AGPCLK
(MHz)
66.67
66.67
66.67
60.00
62.50
66.67
66.67
66.67
62.50
83.33
66.67
66.67
63.33
63.33
50.00
6
33.33
33.33
33.33
30.00
31.25
33.33
33.33
33.33
31.25
41.67
33.33
33.33
31.67
31.67
25.00
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
000
0
001
0
010
0
011
0
0
0
101
0
11
0
111
1
000
1
001
1
010
1
011
1
1
101
1
11
1
111
5
001
0
001
0
SDRAM
CPU PCI
(MHz) (MHz) (MHz)
140
105
100
100
144
108
134
100
112
149
133
100
133
133
133
166
133
100
100
100
166
100
160
133
133
100
100
100
166
100
160
133
4
ZCLKFS4 FS1FS2FS3 FS0
70.00
67.27
72.00
67.27
74.67
66.67
66.67
66.67 66.67
80.00
80.00
83.33
80.00
100
100
100
100
AGPCLK
(MHz)(MHz)
70.00 35.00
67.27
72.00
67.27
74.67
66.67
66.67
66.67
66.67
62.50
66.67
66.67
66.67
62.50
66.67
3
33.63
36.00
33.63
37.33
33.33
33.33
33.33
33.33
33.33
MICRO-STAR INT'L CO.,LTD.
31.25
33.33
33.33
Title
33.33
31.25
33.33
MAIN CLOCK GEN
Size Document Number Rev
MS-6535 1.0B
Custom
Date: Sheet
2
of
341Tuesday, June 11, 2002
1
8
7
6
5
4
3
2
1
D D
CP58 X_COPPER
VCC2.5V
C429
104p
C C
B B
VCC2.5V
CP57 X_COPPER
L75
X_80-0805
VCC2.5V
PART
R640
R641
C642
L77
X_80-0805
C408
103p
C410
X_4.7u-0805
R390
X_10KST
R391
X_10KST
C458
X_104p
ICW28353 ICS93722
10KST
10KST
104p
C412
104p
FWDSDCLKO
C424
X_4.7u-0805
SMBCLK
SMBDAT
X
X
X
C427
103p
CP59
X_COPPER
CP60 X_COPPER
FB_OUT
1.25V
ICW28352
C426
104p
X
X
X
Clock Buffer (DDR)
(OPTIONS)
1: (ICS-93705)
CBVDD
CBVDD
C459
104p
U23
ICS93722 / ICW28352
3
VDD
12
VDD
23
VDD
10
AVDD
7
SCLK
22
SDATA
8
CLK_IN
20
FB_IN
9
NC
18
NC
21
NC
C434
104p
2
CLK0
4
CLK1
13
CLK2
17
CLK3
24
CLK4
26
CLK5
1
CLK#0
5
CLK#1
14
CLK#2
16
CLK#3
25
CLK#4
27
CLK#5
19
FB_OUT
GND
GND
GND
GND
111528
6
R359
R358
R367
R383
R378
R380
R360
R357
R365
R382
R379
R381
R384
DDRCLK[0..8]
DDRCLK-[0..8]
SMBCLK
SMBDAT
FWDSDCLKO
DDRCLK8
0
DDRCLK7
0
DDRCLK2
0
DDRCLK3
0
DDRCLK0
0
DDRCLK1
0
DDRCLK-8
0
DDRCLK-7
0
DDRCLK-2
0
DDRCLK-3
0
DDRCLK-0
0
DDRCLK-1
0
22
FB_OUT
C471
22p
DDRCLK[0..8] 11
DDRCLK-[0..8] 11
SMBCLK 3,11,14,37
SMBDAT 3,11,14,37
FWDSDCLKO 8
By-Pass Capacitors
Place near to the Clock Buffer
DDRCLK0
DDRCLK1
DDRCLK2
DDRCLK3
DDRCLK8
DDRCLK7
DDRCLK-0
DDRCLK-1
DDRCLK-2
DDRCLK-3
DDRCLK-8
DDRCLK-7
C465 X_10p
C467 X_10p
C452 X_10p
C470 X_10p
C415 X_10p
C414 X_10p
C466 X_10p
C468 X_10p
C437 X_10p
C469 X_10p
C416 X_10p
C413 X_10p
A A
MICRO-STAR INT'L CO.,LTD.
Title
DDR CLOCK BUFFER
Size Document Number Rev
MS-6535 1.0B
Custom
8
7
6
5
4
3
Date: Sheet
2
of
441Tuesday, June 11, 2002
1
8
7
6
5
4
3
2
1
CPU GTL REFERNCE VOLTAGE BLOCKCPU SIGNAL BLO CK
HA#[3..31]7
D D
C C
B B
A A
A3~A16#, HREQ#0~4 is strobed by HADSTB#0
A17~A35# is strobed by HADSTB#1
HDBI#[0..3]7
Trace : 10
mil width
10mil space
HD#[0..63]7
HDBI#0
HDBI#1
HDBI#2
HDBI#3
FERR#14
STPCLK#14
INIT#14
HDBSY#7
HDRDY#7
HTRDY#7
HADS#7
HLOCK#7
HBNR#7
HIT#7
HITM#7
HBPRI#7
HDEFER#7
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
CPU_TMPA
CPU_TMPA28 VCCP
THERMTRIP#
R232 X_33
IGNNE#14
SMI#14
A20M#14
CPUSLP#14
CPU_GD
CPU_GD7
CPURST#
CPURST#7
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
8
PROCHOT#
IGNNE#
SMI#
A20M#
CPUSLP#
AF26
AB26
AE21
AF24
AF25
AB23
AB25
AA24
AA22
AA25
E21
G25
P26
V21
AC3
AA3
W5
AB2
A22
AD2
AD3
AD6
AD5
Y21
Y24
Y23
W25
Y26
W26
V24
U19A
V6
B6
Y4
H5
H2
J6
G1
G4
G2
F3
E3
D2
E2
C1
D5
F7
E6
D4
B3
C4
A2
C3
B2
B5
C6
A7
DBI0#
DBI1#
DBI2#
DBI3#
IERR#
MCERR#
FERR#
STPCLK#
BINIT#
INIT#
RSP#
DBSY#
DRDY#
TRDY#
ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#
TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5
RESERVED6
BSEL0
BSEL1
PWRGOOD
RESET#
D63#
D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#
7
HA#30
HA#31
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
A31#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
V22
U21
V25
U23
U24
U26
T23
T22
HD#53
HD#48
HD#47
HD#51
HD#50
HD#46
HD#45
HD#49
HD#52
HA#22
HA#25
HA#23
HA#26
HA#27
HA#28
HA#29
A30#
A29#
A28#
A27#
D45#
D44#
D43#
D42#
T25
T26
R24
R25
HD#42
HD#44
HD#43
HA#18
HA#24
HA#16
HA#21
HA#20
HA#19
HA#17
A26#
A25#
A24#
A23#
A22#
A21#
A20#
A19#
A18#
A17#
D41#
D40#
D39#
D38#
D37#
D36#
D35#
D34#
D33#
P24
R21
HD#41
HD#40
D32#
N25
N26
M26
N23
M24
P21
N22
M23
H25
HD#32
HD#39
HD#34
HD#31
HD#37
HD#35
HD#33
HD#36
HD#38
6
HA#8
HA#9
HA#5
HA#4
HA#14
HA#15
HA#13
HA#12
A16#
A15#
A14#
A13#
A12#
D31#
D30#
D29#
D28#
D27#
K23
J24
L22
M21
HD#29
HD#30
HD#28
HD#27
HA#3
HA#10
HA#11
HA#7
HA#6
AE25A5A4
A9#
A8#
A7#
A6#
A5#
A4#
A3#
A11#
A10#
D26#
D25#
D24#
H24
G26
L21
D26
HD#26
HD#23
HD#24
HD#25
DBR#
Differential
Host Data
Strobes
D23#
D22#
D21#
D20#
D19#
D18#
D17#
D16#
D15#
F26
E25
F24
F23
G23
E24
H22
D25
HD#19
HD#16
HD#22
HD#20
HD#18
HD#15
HD#21
HD#17
5
VID4
AD26
AC26
AE1
ITP_CLK1
ITP_CLK0
VSS_SENSE
VCC_SENSE
D14#
D13#
D12#
D11#
D10#
D9#
D8#
D7#
J21
D23
C26
H21
G22
B25
C24
C23
B24
HD#8
HD#7
HD#9
HD#6
HD#10
HD#14
HD#11
HD#12
HD#13
VID[0..4] 32
VID1
VID0
VID2
VID3
AE2
AE3
AE4
AE5
VID4#
VID3#
VID2#
VID1#
VID0#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D6#
D5#
D4#
D3#
D2#
D1#
D0#
D22
C21
A25
A23
B22
B21
HD#5
HD#0
HD#2
HD#4
HD#3
HD#1
GTLREF1
AA21
GTLREF2
AA6
F20
F6
BPM#5
AB4
BPM#4
AA5
Y6
AC4
BPM#1
AB5
BPM#0
AC6
HREQ#4
H3
HREQ#3
J3
HREQ#2
J4
HREQ#1
K5
HREQ#0
J1
R410 56
AD25
R231 56
A6
Y3
R331 56
W4
U6
AB22
AA20
R221 56
AC23
AC24
AC20
AC21
R409 56
AA2
R225 56
AD24
AF23
AF22
RS#2
F4
RS#1
G5
RS#0
F1
V5
AC1
H6
R343 49.9RST
P1
R233 49.9RST
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
D0~D15, HDBI#0 is strobed by HDSTBN/P#0
D16~D31, HDBI#1 is strobed by HDSTBN/P#1
D32~D47, HDBI#2 is strobed by HDSTBN/P#2
PGA-S478-F02
D48~D63, HDBI#3 is strobed by HDSTBN/P#3
4
CPUCLK-0 3
CPUCLK0 3
RS#[0..2] 7
HBR#0 7
* Short trace
HADSTB#1 7
HADSTB#0 7
HDSTBP#3 7
HDSTBP#2 7
HDSTBP#1 7
HDSTBP#0 7
HDSTBN#3 7
HDSTBN#2 7
HDSTBN#1 7
HDSTBN#0 7
NMI 14
INTR 14
HREQ#[0..4] 7
3
Length < 1.5inch.
GTLREF1
C260
220p
Length < 1.5inch.
GTLREF2
C316
220p
Every pin put one 220pF cap near it.
Trace Width 15mils, Space 15mils.
Keep the voltage dividers within 1.5 inches of the
first GTLREF Pin
CPU ITP BLOCK
ITP_TMS
R337 39
ITP_TDO
R332 75
ITP_TCK
R344 27
CPU STRAPPING RESISTO RS
ALL COMPONENTS CLOSE TO CPU
PROCHOT#
CPU_GD
HBR#0
CPURST#
THERMTRIP#
BPM#0
1 2
BPM#1
3 4
BPM#4
5 6
BPM#5
7 8
ITP_TDI
ITP_TRST#
CPU_GD
CPURST#
CPUSLP#
MICRO-STAR INT'L CO.,LTD.
Title
mPGA478 CPU-1
Size Document Number Rev
MS-6535 1.0B
Custom
Date: Sheet
2
2/3*Vccp
C261
C237
220p
1u
2/3*Vccp
C317
220p
R345 62
R224 300
R290 49.9RST
R222 49.9RST
R293 62
RN4647
R297 150
R330 680
X_102pC236
X_102pC234
X_223pC235
VCCP
R227
49.9RST
R226
100RST
R336
X_49.9RST
Reserved dummy PAD
VCCP
VCCP
VCCP
VCCP
541Tuesday, June 11, 2002
1
of
8
VCCP
A10
A12
A14
A16
A18
A20A8AA10
U19B
D D
D10
VSS
A11
VSS
A13
VSS
A15
VSS
A17
VSS
A19
VSS
A21
VSS
A24
VSS
A26
VSS
A3
VSS
A9
VSS
AA1
VSS
AA11
VSS
AA13
VSS
AA15
VSS
AA17
VSS
AA19
VSS
AA23
VSS
AA26
VSS
AA4
VSS
AA7
VSS
AA9
VSS
AB10
VSS
AB12
VSS
AB14
VSS
AB16
VSS
AB18
VSS
AB20
AB21
AB24
AC11
AC13
AC15
AC17
AC19
AC22
AC25
VSS
VSS
VSS
AB3
VSS
AB6
VSS
AB8
VSS
VSS
VSS
VSS
VSS
VSS
AC2
VSS
VSS
VSS
AC5
VSS
AC7
VSS
AC9
VSS
AD1
VSS
C C
B B
AA12
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD10
VSS
AD12
AD14
AD16
AD18
AD21
AD4
AD23
AD8
AA14
AE11
7
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AE13
AE15
AE17
AE19
AE22
AE24
AE26
AE7
AE9
AF1
VSS
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
6
CPU VOLTAGE B LOCK
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B10
B12
B14
B16
VSS
B18
B23
B20
B26B4B8
C11
C13
5
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
C10
C12
C14
C16
C18
C20C8D11
D13
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C15
C17C2C19
C22
C25C5C7C9D12
D14
D16
D18
D20
D21D3D24D6D8E1E11
VSS
E13
E15
E17
E19
E23
E26
4
D15
D17
D19D7D9
E10
E12
E14
E16
E18
E20E8F11
F13
F15
F17
F19
F9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F18F2F22
F25F5F8
G21G6G24
VSS
VSS
G3H1H23
VSS
VSS
VSS
E7E9F10
F12
F14
F16
E4
VSS
AF4
VCC-VID
VSS
H26H4J2
3
VCC_VID 37
AD20
AE23
AF3
VCCA
VCC-IOPLL
VCC-VIDPRG
VSS
VSS
VSS
VSS
VSS
VSS
J22
J25J5K21
AD22
VSSA
Y5
VSS
Y25
VSS
Y22
VSS
Y2
VSS
W6
VSS
W3
VSS
W24
VSS
W21
VSS
V4
VSS
V26
VSS
V23
VSS
V1
VSS
U5
VSS
U25
VSS
U22
VSS
U2
VSS
T6
VSS
T3
VSS
T24
VSS
T21
VSS
R4
VSS
R26
VSS
R23
VSS
R1
VSS
P5
VSS
P25
VSS
P22
VSS
P2
VSS
N6
VSS
N3
VSS
N24
VSS
N21
VSS
M5
VSS
M25
VSS
M22
VSS
M2
VSS
L4
VSS
L26
VSS
L23
VSS
L1
VSS
K6
VSS
K3
VSS
K24
VSS
PGA-S478-F02
C239
X_10u-1206
C248
X_10u-1206
2
C238
22u-1206
L44 4.7u-10%-120 6
L51 4.7u-10%-120 6
C249
22u-1206
1
VCCP
CPU DECOUPLING CAP ACITORS
VCCP
C268
10u-1206
C295
10u-1206
C281
10u-1206
C259
X_10u-1206
C276
10u-1206
C341
10u-1206
C283
10u-1206
C304
10u-1206
A A
C270
X_10u-1206
C262
10u-1206
PLACE CAPS WITHIN CPU CAVITY
8
7
VCCP
C282
10u-1206
C309
X_10u-1206
C292
X_10u-1206
C254
10u-1206
C334
X_10u-1206
C269
10u-1206
C256
X_10u-1206
C252
10u-1206
C272
X_10u-1206
VCCP
C325
10u-1206
C324
X_10u-1206
C310
X_10u-1206
C266
10u-1206
C297
10u-1206
C264
10u-1206
C288
X_10u-1206
C296
10u-1206
VCCP
C346
X_10u-1206
MICRO-STAR INT'L CO.,LTD.
Title
mPGA478 CPU-2
Size Document Number Rev
MS-6535 1.0B
Custom
6
5
4
3
Date: Sheet
2
of
641Tuesday, June 11, 2002
1
8
D D
CPUCLK1
CPUCLK13
CPUCLK-1
CPUCLK-13
HDEFER#
HDEFER#5
HLOCK#
HLOCK#5
HTRDY#
HTRDY#5
CPURST#
CPURST#5
CPU_GD
CPU_GD5
HBPRI#
HBPRI#5
HBR#0
HBR#05
RS#[0..2]
RS#[0..2]5
HDRDY#5
C C
HREQ#[0..4]5
HA#[3..31]5
B B
VCCP
VCCP VCCP
A A
HADS#5
HITM#5
HIT#5
HDBSY#5
HBNR#5
HREQ#[0..4]
R200
75RST
R204
150RST
8
HA#[3..31]
R217
20RST
R216
110RST
HADS#
HITM#
HIT#
HDRDY#
HDBSY#
HBNR#
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
HADSTB#15
HADSTB#05
HNCOMP
Rds-on(n) = 10 ohm
HNCVERF = 1/3 VCCP
HPCOMP
Rds-on(p) = 56 ohm
HPCVERF = 2/3 VCCP
HD#[0..63]5
C206
X_103p
C514
C214
X_104p
104p
place this capacitor
under 650 solder side
RS#2
RS#1
RS#0
HADSTB#1
HADSTB#0
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
HD#[0..63]
AJ26
AH26
AD24
AA24
AF26
AE25
AH28
AD26
AG29
AE26
AF28
AC24
AG28
AE29
AD28
AC25
AD27
AE28
AF27
AB24
AB26
AC28
AC26
AC29
AA26
AB28
AB27
AA25
AA29
AA28
R201
150RST
R205
75RST
U26
U24
V26
C20
D19
U25
U29
V28
U28
W26
V24
V27
W28
W29
W24
W25
7
T27
T24
T26
T28
Y27
Y26
Y24
Y28
7
CPUCLK
CPUCLK#
DEFER#
HLOCK#
HTRDY#
CPURST#
CPUPWRGD
BPRI#
BREQ0#
RS#2
RS#1
RS#0
ADS#
HITM#
HIT#
DRDY#
DBSY#
BNR#
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
HASTB#1
HASTB#0
HA#31
HA#30
HA#29
HA#28
HA#27
HA#26
HA#25
HA#24
HA#23
HA#22
HA#21
HA#20
HA#19
HA#18
HA#17
HA#16
HA#15
HA#14
HA#13
HA#12
HA#11
HA#10
HA#9
HA#8
HA#7
HA#6
HA#5
HA#4
HA#3
C207
X_103p
HNCVREF
C215
103p
B21
HD#63
C1XAVSS
C1XAVDD
C4XAVSS
AH25
AJ25
AH27
C1XAVSS
C4XAVSS
C1XAVDD
HOST
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
F19
A21
E19
D22
D20
B22
C22
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
C1XAVDD
C1XAVSS
6
C4XAVDD
HVREF
HPCOMP
HNCOMP
HNCVREF
VBD7
VBD6
AJ27
U21
T21
P21
N21
J17
B20
B19
A19A7F9B7M6M5M4L3L6L4K6L2K3J3K4J2J6J4J1H6F4F1G6E3F5E2E4E1D3D4C2F7C3E6B2D5D6A3D7C5A5C6D8
ST0
ST1
ST2
AAD0
HVREF0
HVREF1
HVREF2
HVREF3
HVREF4
C4XAVDD
AAD1
HPCOMP
HNCOMP
HNCOMPVREF
650-1
HD#55
HD#54
HD#53
HD#52
HD#51
HD#50
HD#49
HD#48
HD#47
HD#46
HD#45
HD#44
HD#43
HD#42
HD#41
HD#40
B23
A23
D21
F22
D24
D23
C24
B24
E25
HD#55
HD#54
HD#53
HD#52
HD#51
HD#50
HD#49
HD#48
HD#47
C362
103p
6
E23
D25
A25
HD#46
HD#45
HD#44
CP54
1 2
X_COPPER
L69
X_80-0603
CP52
1 2
X_COPPER
HD#39
C26
B26
B27
D26
B28
HD#43
HD#42
HD#41
HD#40
HD#39
VAD[0..11]
VBD[0..11]
VBD5
VBD4
AAD2
AAD3
HD#38
HD#37
E26
F28
HD#38
HD#37
VCC3
5
VAD[0..11] 17
VBD[0..11] 17
VBD3
VBD2
VBD1
VBD0
VAD6
VAD5
VAD4
VAD7
VAD8
VAD9
VAD10
VAD11
AAD16
AAD17
AAD18
VBD11
VBD10
AAD4
AAD5
AAD6
AAD7
AAD8
AAD9
AAD10
AAD11
AAD12
AAD13
AAD14
AAD15
AAD16
AAD17
AAD18
AAD19
AAD20
HD#36
HD#35
HD#34
HD#33
HD#32
HD#31
HD#30
HD#29
HD#28
HD#27
HD#26
HD#25
HD#24
HD#23
HD#22
HD#21
G25
F27
F26
G24
H24
G29
J26
G26
J25
HD#36
HD#35
HD#33
HD#32
HD#31
HD#30
HD#29
HD#34
HD#28
C4XAVDDHVREF
C376
X_1u
C4XAVSS
5
HD#20
H26
G28
H28
J24
K28
J29
K27
J28
M24
HD#27
HD#26
HD#25
HD#24
HD#23
HD#22
HD#21
HD#20
HD#19
VBD8
VBD9
VAD1
AAD21
AAD22
AAD23
HD#19
HD#18
HD#17
L26
K26
HD#18
HD#17
1 2
X_COPPER
C363
103p
1 2
X_COPPER
VAD0
VAD2
VAD3
AAD24
AAD25
HD#16
HD#15
L25
L28
M26
HD#16
HD#15
HD#14
CP55
L70
X_80-0603
CP53
4
AAD26
AAD27
AAD28
AAD29
AAD30
AGP
HD#14
HD#13
HD#12
HD#11
HD#10
P26
L29
N24
N26
M27
HD#9
HD#13
HD#12
HD#11
HD#10
4
AAD31
HD#9
HD#8
VCC3
HD#8
N28
P27
HD#7
VBBLANK
VBCTL0
VBCTL1
VBHSYNC
VBVSYNC
SBA7
SBA6
HD#7
HD#6
N29
R24
HD#6
HD#5
SBA5
SBA4
HD#5
HD#4
R28
M28
HD#4
HD#3
A4XAVDD
A4XAVSS
SBA3
HD#3
SBA2
HD#2
P28
HD#2
C7
SBA1
SBA0
HD#1
HD#0
R26
R29
HD#1
HD#0
VBBLANK 17
VBCTL0 17
VBCTL1 17
VBHSYNC 17
VBVSYNC 17
VBCLK
AC/BE#3
AC/BE#2
AC/BE#1
AC/BE#0
AREQ#
AGNT#
AFRAME#
AIRDY#
ATRDY#
ADEVSEL#
ASERR#
ASTOP#
APAR
RBF#
WBF#
PIPE#
AGP8XDET
ADBIH
ADBIL
SB_STB
SB_STB#
AD_STB0
AD_STB#0
AD_STB1
AD_STB#1
AGPCLK
AGPRCOMP
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
AGPVREF
AGPVSSREF
HDSTBN#3
HDSTBN#2
HDSTBN#1
HDSTBN#0
HDSTBP#3
HDSTBP#2
HDSTBP#1
HDSTBP#0
DBI#3
DBI#2
DBI#1
DBI#0
E21
A27
H27
R25
HDBI#3
HDBI#2
HDBI#1
HDBI#0
C223
C227
103p
104p
3
VBCLK 17
F6
F3
H4
K5
C9
A6
G2
G1
G3
G4
H5
H1
H3
E8
F8
D9
D10
B3
C4
B5
A4
K1
L1
C1
D1
B10
M1
B9
A9
B8
A8
M3
M2
F20
F23
K24
P24
F21
F24
L24
N25
CP30
1 2
X_COPPER
L42
X_80-0603
1 2
X_COPPER
3
U18A
AGPRCOMP
SIS650GX
CP32
ADSTB#0
VGCLK
ADSTB#1
AGPCLK0
A1XAVDD
A1XAVSS
A4XAVDD
A4XAVSS
R257 8.2K
HDSTBN#3
HDSTBN#2
HDSTBN#1
HDSTBN#0
HDSTBP#3
HDSTBP#2
HDSTBP#1
HDSTBP#0
HDBI#[0..3] 5
VCC3
2
U18-1
N.B HEAT SINK
VBCAD 17
AAD16
AAD17
VCC3
AAD18
ADSTB0
RN45 X_8.2K
ADSTB#0ADSTB0
R243 8.2K
ADSTB#1
R234 8.2K
CP29
1 2
C224
104p
X_COPPER
C228
103p
X_COPPER
L43
X_80-0603
1 2
A1XAVDD
A1XAVSS
2
VBHCLK 17
VGCLK 17
AGPCLK0 3
R249 62
HDSTBN#3 5
HDSTBN#2 5
HDSTBN#1 5
HDSTBN#0 5
HDSTBP#3 5
HDSTBP#2 5
HDSTBP#1 5
HDSTBP#0 5
MICRO-STAR INT'L CO.,LTD.
C218
X_1u
Title
SIS645/65 0-1
Size Document Number Rev
MS-6535 1.0B
Custom
Date: Sheet
CP33
1
VDDQ
12
34
56
78
VCC3
C217
X_1u
of
741Tuesday, June 11, 2002
1
8
7
6
5
4
3
2
1
MA7
MA8
MA5
MA6
MA14
MA13
D D
The L of RN to DDR1 is 0.4"
Rs place close to DDR1
RMD1 MD1 MD0
RN73
RMD5 MD5 MD1
RMD0 MD0 MD2
RMD4 MD4 MD3
RMD6 MD6 MD4
RMD2 MD2 MD5
RDQM0 DQM0 MD6
RDQS0 DQS0 MD7
RMD9 MD9 DQM0
RMD8 MD8 DQS0
RMD7 MD7 MD8
RMD3 MD3 MD9
RMD11 MD11 MD10
RMD10 MD10 MD11
RMD15 MD15 MD12
RMD14 MD14 MD13
RDQM1 DQM1 MD14 MA7
RMD13 MD13 MD15 MA8
RDQS1 DQS1 DQM1 MA9
RMD12 MD12 DQS1
RMD21 MD21 MD16
C C
B B
A A
RMD17 MD17 MD17
RMD16 MD16 MD18
RMD20 MD20 MD19
RMD22 MD22 MD20
RMD18 MD18 MD21
RDQM2
RMA9
RMD28 MD28 DQM2
RMD24 MD24 DQS2
RMD19
RMD23
RMD31
RMD27 MD27 MD27
RMD30 MD30 MD28
RMD26 MD26 MD29
RDQM3 DQM3 MD30
RDQS3 DQS3 MD31
RMD25 MD25 DQM3
RMD29 MD29 DQS3
RMD33 MD33 MD32 CKE0
RMD37 MD37 MD33 CKE1
RMD36 MD36 MD34 CKE2
RMD32 MD32 MD35 CKE3
RMD38 MD38 MD36
RMD34 MD34 MD37
RDQM4 DQM4 MD38
RDQS4
RMD40
RMD35 MD35 MD40 SDCLK
RMD39 MD39 MD41
RDQS5 DQS5 MD42
RDQM5 DQM5 MD43
RMD41 MD41 MD44
RMD45 MD45 MD45
RMD47 MD47 MD46
RMD43 MD43
RMD42 MD42 DQS5
RMD55 MD55 MD48 SDAVSS
RDQS6 DQS6 MD49
RMD54 MD54 MD50
RDQM6 DQM6 MD51 DDRAVDD
RMD53 MD53 MD52
RMD52 MD52 MD53 DDRAVSS
RMD49 MD49
RMD48 MD48 MD55
RMD56 MD56 DQM6
RMD60 MD60 DQS6 DDRVREFA
RMD51 MD51 MD56 DDRVREFB
RMD50 MD50 MD57
RMD62 MD62
RDQM7 DQM7 MD59
RMD57 MD57
RMD61 MD61 MD61
RMD63 MD63
RMD58 MD58
RDQS7 DQS7
1 2
3 4
5 6
10
7 8
RN72
1 2
3 4
5 6
7 8
10
RN71
1 2
3 4
5 6
7 8
10
RN69101 2
3 4
5 6
7 8
RN70101 2
3 4
5 6
7 8
RN67
1 2
3 4
5 6
10
7 8
RN65
1 2
3 4
5 6
10
7 8
RN63
1 2
3 4
5 6
10
7 8
RN61101 2
3 4
5 6
7 8
RN62101 2
3 4
5 6
7 8
RN58
1 2
3 4
5 6
10
7 8
RN57
1 2
3 4
5 6
7 8
10
RN56
1 2
3 4
5 6
7 8
10
RN53101 2
3 4
5 6
7 8
RN52101 2
3 4
5 6
7 8
RN50
1 2
3 4
5 6
10
7 8
RN51
1 2
3 4
5 6
10
7 8
RN49
1 2
3 4
5 6
10
7 8
RN48101 2
3 4
5 6
7 8
1 2
3 4
RN47
5 6
10
7 8
L = 2"~4"
DQM2
MA9
MD19
MD23
MD31 MD26
DQS4 MD39
MD40 DQS4
MD22
MD23
MD24
MD25
DQM4
MD47RMD46 MD46
DQM5 SDAVDD
MD54
MD58
MD60
MD62RMD59 MD59
MD63
DQM7
DQS7
AG22
AH21
AD23
AE23
AF22
AF21
AD22
AH22
AD21
AG20
AE19
AF19
AE21
AD20
AD19
AH19
AF20
AH20
AF18
AG18
AH17
AD16
AD18
AD17
AF17
AE17
AH18
AD14
AG14
AE13
AF14
AD13
AF13
AH13
AH14
AD10
AH10
AG10
AF10
AJ23
AJ21
AJ17
AJ13
AJ15
AE9
AD8
AH9
AF9
AD9
AJ9
AH5
AG4
AE5
AH3
AG6
AF6
AF5
AF4
AH4
AJ3
AE4
AD6
AE2
AC5
AG2
AG1
AF3
AC6
AD4
AF2
AB6
AD3
AA6
AB3
AC4
AE1
AD2
AC1
AB4
AC2
U18B
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
DQM0
DQS0/CSB#0
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
DQM1
DQS1/CSB#1
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
DQM2
DQS2/CSB#2
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
DQM3
DQS3/CSB#3
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
DQM4
DQS4/CSB#4
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
DQM5
DQS5/CSB#5
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
DQM6
DQS6/CSB#6
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
DQM7
DQS7/CSB#7
650-2
DQS2
SRAS#
SCAS#
SWE#
CKE0
CKE1
CKE2
CKE3
CKE4
CKE5
S3AUXSW#
SDCLK
FWDSDCLKO
SDRCLKI
SDAVDD
SDAVSS
DDRAVDD
DDRAVSS
DDRVREFA
DDRVREFB
DRAM_SEL
RN64
RN66
MA0
AH11
MA0
MA1
AF12
MA1
MA2
AH12
MA2
MA3
AG12
MA3
MA4
AD12
MA4
MA5
AH15
MA5
MA6
AF15
MA6
AH16
MA7
AE15
MA8
AD15
MA9
MA10
AF11
MA10
MA11
AG8
MA11
MA12
AJ11
MA12
MA13 RMA10
AG16
MA13
MA14
AF16
MA14
SRAS#
AH8
SCAS#
AJ7
SWE#
AH7
MD44
L = 1" ~ 3"
CS-0
AE7
CS#0
CS#1
CS#2
CS#3
CS#4
CS#5
AF7
AH6
AJ5
AF8
AD7
AB2
AA4
AB1
Y6
AA5
Y5
Y4
AA3
AD11
AE11
Y1
Y2
AA1
AA2
AJ19
AH2
W3
CS-1
CS-2
CS-3
R311 22
R282 4.7K
RMA7
78
RMA8
56
RMA5
34
RMA6
12
0
78
RMA14
56
RMA13
34
RDQS2
12
0
Rs place close to DDR1
L = 1"~ 3" L = 0.4" from RN to DDR1
RN60
12
34
56
78
0
RN59
12
34
56
78
0
R411 0
R412 0
R413 0
RSCAS#
RSWE#
RMD44
RN54 0
S3AUXSW#
R286 4.7K
FWDSDCLKO
C364
X_10p
Near SIS650
78
56
34
12
VCC3SBY
SIS650GX
RSRAS#
RSRAS#11,12
8
R427 0
SRAS#
7
6
5
4
3
RMD[0..63]
RDQM[0..7]
RDQS[0..7]
RMA[0..14]
RCS-[0..3]
CKE[0..3]
RMD[0..63] 11,12
RDQM[0..7] 11,12
RDQS[0..7] 11,12
RMA[0..14] 11,12
RCS-[0..3] 11,12
CKE[0..3] 11
C357
X_103p
DDRVREFA
C329
104p
C377
103p
RMA2
RMA3
RMA1
RMA4
RMA11
RMA12
RMA0
RSCAS# 11,12
RSWE# 11,12
RCS-0
RCS-2
RCS-1
RCS-3
S3AUXSW# 37
VCC3SBY
SDCLK 3
FWDSDCLKO 4
L = 1.2"
DDRVREFB
SDAVDD
SDAVSS
DDRAVDD
C336
C335
104p
DDRAVSS
X_103p
MICRO-STAR INT'L CO.,LTD.
Title
650GX-2
Size Document Number Rev
MS-6535 1.0B
Custom
Date: Sheet
2
VCCM
C353
X_103p
C374
103p
C330
X_103p
X_COPPER
CP50
1 2
X_COPPER
L64
X_80-0603
CP49
1 2
X_COPPER
VCCM
CP48
1 2
X_COPPER
L62
X_80-0603
CP47
1 2
841Tuesday, June 11, 2002
R309
150RST
R322
150RST
R308
150RST
R321
150RST
1
VCC3
VCC3
C403
X_1u
of
8
7
6
5
4
3
2
1
NOTE: This page is for universal PCB design( suitable for both 645 or 650)
NB Hardware Trap Table
0
DLLEN#
DRAM_SEL
TRAP0
D D
ZAD[0..15]13
ZSTB[0..1]13
ZSTB-[0..1]13
C C
ZAD[0..15]
ZSTB[0..1]
ZSTB-[0..1]
TRAP1
CSYNC
RSYNC
LSYNC
ZCLK03
ZUREQ13
ZDREQ13
VCC1_8
R277
C298
X_104p
150RST
ZVREF
C289
R276
104p
150RST
B B
CP43
1 2
VCC3
X_COPPER
L57
X_80-0603
C331
X_1u
VCC3
CP44
1 2
X_COPPER
CP41
1 2
X_COPPER
L55
X_80-0603
A A
CP40
1 2
X_COPPER
C305
104p
104p
C299
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
VCC1_8
C278
X_1u
enable PLL disable PLL
SDR DDR
normal NB debug mode
TV selection, NTSC/PAL(0/1) 0
enable VB
enable VGA interface
enable panel link
U18C
ZCLK0
ZUREQ
ZDREQ
ZSTB0 ROUT
ZSTB-0 GOUT
ZSTB1
ZSTB-1 HSYNC
ZAD0
ZAD1 DDC1CLK TRAP1
ZAD2
ZAD3 CSYNC
ZAD4
ZAD5 INTA# LSYNC
ZAD6
ZAD7
ZAD8 CSYNC
ZAD9 RSYNC
ZAD10 LSYNC
ZAD11
ZAD12
ZAD13 VCOMP
ZAD14 VRSET
ZAD15 VVBWN ENTEST
ZVREF
ZCMP_N
ZCMP_P DACAVSS1/2
VSSZCMP
Z1XAVDD DCLKAVSS
Z1XAVSS
Z4XAVDD ECLKAVSS
Z4XAVSS
1 2
X_COPPER
X_80-0603
1 2
X_COPPER
SIS650GX
V3
ZCLK
U6
ZUREQ
U1
ZDREQ
T3
ZSTB0
T1
ZSTB#0
P1
ZSTB1
P3
ZSTB#1
T4
ZAD0
R3
ZAD1
T5
ZAD2
T6
ZAD3
R2
ZAD4
R6
ZAD5
R1
ZAD6
R4
ZAD7
P4
ZAD8
N3
ZAD9
P5
ZAD10
P6
ZAD11
N1
ZAD12
N6
ZAD13
N2
ZAD14
N4
ZAD15
U3
ZVREF
V5
VDDZCMP
U4
ZCMP_N
U2
ZCMP_P
V6
VSSZCMP
W1
Z1XAVDD
W2
Z1XAVSS
V2
Z4XAVDD
V1
Z4XAVSS
PCIRST#1
PCIRST#117,27,37
PWRGD
PWRGD14,37
AUXOK
AUXOK14,37
CP36
L52
C273
104p
CP37
1
HyperZip
650-3
PCIRST#
PWROK
Y3W4W6
R266 56
R271 56
AUXOK
VGA
Stereo
Glass
D11
TRAP1
TRAP1
TRAP0
E10
TESTMODE2
TESTMODE1
A10
F11
VDDZCMP
ZCMP_N
ZCMP_P
VSSZCMP
C11
Default
1(DDR)
TESTMODE0
E11
0
0
0
1
0
DLLEN#
F10
ENTEST
ENTEST
embedded pull-low
(30~50K Ohm)
yes
yes
yes
VOSCI
ROUT
GOUT
BOUT
HSYNC
VSYNC
VGPIO0
VGPIO1
INT#A
CSYNC
RSYNC
LSYNC
VCOMP
VRSET
VVBWN
DACAVDD1
DACAVSS1
DACAVDD2
DACAVSS2
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
C15
R218
A12
R219
B13
R220
A13
R210 33
F13
R211 33
E13
R213 100
D13
R212 100
D12
B11
E12
A11
F12
E14
D14
F14
B12
C12
C13
C14
B15
A15
B14
A14
DCLKAVDD
DCLKAVSS
ECLKAVDD
ECLKAVSS
BOUT
W = 5mil
REFCLK0 3
ROUT 33
GOUT 33
BOUT 33
HSYNC 33
VSYNC 33
DDC1CLK 33
DDC1DATA 33
REFCLK0
0
0
0
VSYNC RSYNC
DDC1DATA
INTA# 13,17,19
DACAVDD1/2
DCLKAVDD
ECLKAVDD
CP26
C212
C219
104p
104p
1 2
X_COPPER
L38
1 2
X_COPPER
X_80-0603
1 2
X_COPPER
L39 X_80-0603
1 2
X_COPPER
L40 X_80 -0603
X_80-0603
CP28
CP31
CP27
VCC3
C506
X_1u
L41
VVBWN VRSET
VCOMP
VCC3
DACAVDD1/2
DACAVSS1/2
for 650 only
PWRGDVDDZCMP
C220
104p
C221
104p
C222
104p
Near B12 pin Near C13 pin
R214 4.7K
R215 4.7K
R206 4.7K
R207 4.7K
R209 4.7K
C320 X_104p
CP24
1 2
X_COPPER
L36
CP25
1 2
C216
1u
X_COPPER
L37 X_80 -0603
X_80-0603
VCC1_8
VCC3
C263
X_1u
R203
130RST
MICRO-STAR INT'L CO.,LTD.
Title
SIS645/650
Size Document Number Rev
MS-6535 1.0B
Custom
8
7
6
5
4
3
Date: Sheet
2
941Tuesday, June 11, 2002
of
1
8
7
6
5
4
3
2
1
VCCP VCC1_8 VCC3
H21
H22
J16
J20
J21
J22
K16
K17
K18
K19
K20
K21
L20
M20
N20
P20
R20
R21
T20
U20
V20
W20
Y20
Y21
AA20
AA21
AA22
AB21
AB22
L12
L14
L15
L16
L18
M11
M19
N11
P19
R11
T19
U11
V19
W11
W13
W15
W17
VCCP
A16
VTT
A17
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VSS
VSS
VSS
VSS
VSS
P15
P16
P17
P18
VTT
IVDD
IVDD
IVDD
IVDD
650-4
Power
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
R12
VSS
R13
R14
R15
R16
R17
R18
T12
T13
6
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
VSS
VSS
VSS
VSS
VSS
VSS
T14
T15
T16
T17
T18
U12
VTT
A18
VTT
VDDQ
B16
VTT
B17
VTT
B18
VTT
C16
VTT
C17
VTT
C18
VTT
D15
VTT
D16
VTT
D17
VTT
D18
VTT
E15
VTT
E16
VTT
E17
VTT
E18
VTT
F15
VTT
F16
VTT
F17
VTT
F18
VTT
AB5
VDDM
AD5
VDDM
AE6
VDDM
AE8
VDDM
AE10
VDDM
AE12
VDDM
AE14
VDDM
AE16
VDDM
AE18
VDDM
AE20
VDDM
AE22
VDDM
V10
VDDM
V11
VDDM
W18
VDDM
Y9
VDDM
Y10
VDDM
Y12
VDDM
Y14
VDDM
Y16
VDDM
Y18
VDDM
Y19
VDDM
AA8
VDDM
AA9
VDDM
AA10
VDDM
AA13
VDDM
AA14
VDDM
AA15
VDDM
AA16
VDDM
AA17
VDDM
AB8
VDDM
AB9
VDDM
AB13
VDDM
AB17
VDDM
E5
VDDQ
E7
VDDQ
E9
VDDQ
G5
VDDQ
J5
VDDQ
L5
VDDQ
H8
VDDQ
H9
VDDQ
J8
VDDQ
J9
VDDQ
J10
VDDQ
J13
VDDQ
K9
VDDQ
K11
VDDQ
K13
VDDQ
L10
VDDQ
N9
VDDQ
N10
VDDQ
N5
VDDZ
R5
VDDZ
U5
VDDZ
W5
VDDZ
P9
VDDZ
P10
VDDZ
R9
VDDZ
R10
VDDZ
T9
VDDZ
T10
VDDZ
T11
VDDZ
PVDDP
PVDDP
PVDDP
PVDDP
PVDDP
PVDDP
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L17
L19
N19
R19
U19
W19
M12
M13
M14
M15
M16
M17
M18
N12
VCC1_8
8
VSS
N13
N14
N15
N16
N17
N18
P12
P13
P14
7
D D
VCCM
C C
B B
VCC1_8
A A
P11
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
IVDD
PVDDZ
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
U13
VSS
U14
U15
U16
U17
U18
V12
V13
V14
VCC3SBY
J14
J15
K15
K10
K12
K14
M10
W10
Y11
Y13
Y15
PVDD
PVDD
PVDD
PVDD
OVDD
OVDD
OVDD
PVDDM
PVDDM
PVDDM
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
V15
V16
V17
V18
5
VSS
B25
C28
C29
D27
D28
E28
E29
AF23
U18D
Y17
U10
AH24
VSS
U9
A20
A22
A24
A26
C19
C21
C23
C25
C27
E20
E22
E24
F25
H25
K25
M25
P25
T25
V25
Y25
AB25
AD25
E27
G27
J27
L27
N27
R27
U27
W27
AA27
AC27
AE27
D29
F29
H29
K29
M29
P29
T29
V29
Y29
AB29
AD29
AF29
AE24
AG25
B4
B6
C8
C10
D2
F2
H2
K2
P2
T2
V4
AD1
AF1
AC3
AE3
AG3
AG5
AG7
AG9
AG11
AG13
AG15
AG17
AG19
AG21
AG23
AJ4
AJ6
AJ8
AJ10
AJ12
AJ14
AJ16
AJ18
AJ20
AJ22
AJ24
AG27
SIS650GX
4
VCC1_8SBY
VCC3SBY
VDDQ
C231
104p
C232
104p
Place these capacitors under 650 solder
side, DO NOT stuff
VCCP
C524
X_104p
C520
X_104p
C516
X_104p
C521
X_104p
AUX1.8
AUX3.3
PVDDM
PVDDM
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AF24
AF25
AG24
AG26
AH23
VCCP
VCC1_8
3
VCC3SBY
C286
1u
C209
1u
C358
1u
C226
104p
C233
104p
X_1u-0805
X_1u-0805
X_1u-0805
X_1u-0805
C522
C517
C518
C519
VCC3
C326
1u
C322
1u
C368
104p
VCCM
X_10u-0805
X_10u-0805
VCCM
MICRO-STAR INT'L CO.,LTD.
Title
Size Document Number Rev
Custom
Date: Sheet
C337
104p
C225
104p
VCC1_8SBY
C395
104p
C213
104p
C347
104p
C208
104p
C359
C361
C528
X_104p
C529
VCC3
X_104p
C527
X_104p
C526
X_104p
SIS645/650-4
MS-6535 1.0B
2
C512
X_104p
C515
X_104p
C355
104p
C375
104p
C265
1u
C267
104p
VCC3SBY
VDDQ
C356
1u
C354
104p
C523
X_104p
C525
X_104p
C511
X_104p
C513
X_104p
of
10 41Tuesday, June 11, 2002
1
8
7
6
5
4
3
2
1
RMD[0..63]8,12
RMA[0..14] RMA[0..14]
RMA[0..14]8,12
RDQM[0..7] RDQM[0..7]
RDQM[0..7]8,12
RDQS[0..7] RDQS[0..7]
RDQS[0..7]8,12
D D
NOTE:
VDDID IS A TRAP ON THE DDR
MODULE TO INDICATE:
MEMORY MUX TABLE:
C C
VDDID
OPEN
GND
SDR
CS0
CS1
CS2
CS3
CS4
CS5 CS5
CSB0
CSB1
CSB2
CSB3
CSB4
CSB5
CSB6
CSB7
REQUIRED POWER
VDD=VDDQ
VDD!=VDDQ
DDR
CS0
CS1
CS2
CS3
CS4
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
VCCM VCCM
R371 X_8. 2K R370 X_8. 2K
DDRVREF GEN. & DECOUPLING
VCCM
R393
75RST
R392
75RST
B B
A A
C472
X_103p
DDRVREF
C473
C448
103p
103p
RSRAS#8,12
RSCAS#8,12
RSWE#8,12
RCS-[0..3]
RCS-[0..3]8,12
CKE[0..3]
CKE[0..3]8
DDRCLK[0..8]4
DDRCLK-[0..8]4
8
DDRCLK[0..8]
DDRCLK-[0..8]
VCCM
DDR1
15223054627796
104
112
128
136
143
156
164
172
180738467085108
VDD
VDD
VDD
VDD
VDD
VDD
120
VDD
148
VDD
168
VDD
184
130
125
122
141
118
115
103
113
107
119
129
149
159
169
177
140
134
135
142
144
101
102
173
167
154
157
158
163
111
137
138
48
43
41
37
32
29
27
59
52
97
5
14
25
36
56
67
78
86
47
44
45
49
51
9
10
65
63
71
21
16
76
17
75
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC
NC(RESET#)
NC
NC
NC
NC(FETEN)
RAS#
CAS#
WE#
S0#
S1#
NC(S2#)
NC(S3#)
CKE0
CKE1
CK0
CK1
CK2
CK0#
CK1#
CK2#
VSS
VSS
VSS
152
160
176
VSS
VSS
132
139
145
RMA0 RMD4
RMA1 RMD5
RMA2 RMD6
RMA3 RMD7
RMA4 RMD8
RMA5 RMD9
RMA6 RMD10
RMA7 RMD11
RMA8 RMD12
RMA9 RMD13
RMA10 RMD14
RMA13 RMD15
RMA14 RMD16
RMA11 RMA11 RMD19
RMA12 RMA12 RMD20
RDQM0 RMD23
RDQM1 RMD24
RDQM2 RMD25
RDQM3 RMD26
RDQM4 RMD27
RDQM5 RMD28
RDQM6 RMD29
RDQM7 RMD30
RDQS0 RMD33
RDQS1 RMD34
RDQS2 RMD35
RDQS3 RMD36
RDQS4 RMD37
RDQS5 RMD38
RDQS6 RMD39
RDQS7 RMD40
RSRAS# RSRAS# RMD59
RSCAS# RSCAS# RMD60
RSWE# RSWE# RMD61
RCS-0 RCS-2 RMD63
RCS-1 RCS-3
CKE0 WP CKE2
CKE1 SMBCLK CKE3
DDRCLK1
DDRCLK8
DDRCLK2
DDRCLK-1
DDRCLK-8
DDRCLK-2
7
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
addr =
1010000b
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
100
116
124
6
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
RMD0
2
DQ0
RMD1
4
DQ1
RMD2
6
DQ2
RMD3
8
DQ3
RMD4
94
DQ4
RMD5
95
DQ5
RMD6
98
DQ6
RMD7
99
DQ7
RMD8
12
DQ8
RMD9
13
DQ9
RMD10
19
DQ10
RMD11
20
DQ11
RMD12
105
DQ12
RMD13
106
DQ13
RMD14
109
DQ14
RMD15
110
DQ15
RMD16
23
DQ16
RMD17
24
DQ17
RMD18
28
DQ18
RMD19
31
DQ19
RMD20
114
DQ20
RMD21
117
DQ21
RMD22
121
DQ22
RMD23
123
DQ23
RMD24
33
DQ24
RMD25
35
DQ25
RMD26
39
DQ26
RMD27
40
DQ27
RMD28
126
DQ28
RMD29
127
DQ29
RMD30
131
DQ30
RMD31
133
DQ31
RMD32
53
DQ32
RMD33
55
DQ33
RMD34
57
DQ34
RMD35
60
DQ35
RMD36
146
DQ36
RMD37
147
DQ37
RMD38
150
DQ38
RMD39
151
DQ39
RMD40
61
DQ40
RMD41
64
DQ41
RMD42
68
DQ42
RMD43
69
DQ43
RMD44
153
DQ44
RMD45
155
DQ45
RMD46
161
DQ46
RMD47
162
DQ47
RMD48
72
DQ48
RMD49
73
DQ49
RMD50
79
DQ50
RMD51
80
DQ51
RMD52
165
DQ52
RMD53
166
DQ53
RMD54
170
DQ54
RMD55
171
DQ55
RMD56
83
DQ56
RMD57
84
DQ57
RMD58
87
DQ58
RMD59
88
DQ59
RMD60
174
DQ60
RMD61
175
DQ61
RMD62
178
DQ62
RMD63
179
DQ63
DDRVREF DDRVREF
1
VREF
82
VDDID
90
WP
92
SCL
SDA
SA0
SA1
SA2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
3111826344250586674818993
91
181
182
183
VSS
DDR SDRAM DIMM
SMBDAT
5
RMD[0..63]
CKE2
CKE0
CKE3
CKE1
470
4
RN68
1 2
3 4
5 6
7 8
RDQM0
RDQM1
RDQM2
RDQM3
RDQM4
RDQM5
RDQM6
RDQM7
RDQS0
RDQS1
RDQS2
RDQS3
RDQS4
RDQS5
RDQS6
RDQS7
DDRCLK0
DDRCLK7
DDRCLK3
DDRCLK-0
DDRCLK-7
DDRCLK-3
RMA0
RMA1
RMA2
RMA3
RMA4
RMA5
RMA6
RMA7
RMA8
RMA9
RMA10
RMA13
RMA14
VCCM
VCCM
120
148
168
184
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
97
107
119
129
149
159
169
177
140
14
25
36
56
67
78
86
47
44
45
49
51
134
135
142
144
10
101
102
173
167
154
65
63
157
158
71
163
21
111
137
16
76
138
17
75
5
9
VDD
VDD
VDD
VDD
VDD
VDD
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC
NC(RESET#)
NC
NC
NC
NC(FETEN)
RAS#
CAS#
WE#
S0#
S1#
NC(S2#)
NC(S3#)
CKE0
CKE1
CK0
CK1
CK2
CK0#
CK1#
CK2#
VSS
VSS
VSS
152
160
176
3
DDR2
15223054627796
104
112
128
136
143
156
164
172
180738467085108
VDD
VDD
VDD
VSS
VSS
132
139
145
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
addr =
1010001b
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
100
116
124
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
RMD0
2
DQ0
RMD1
4
DQ1
RMD2
6
DQ2
RMD3
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
RMD17
24
DQ17
RMD18
28
DQ18
31
DQ19
114
DQ20
RMD21
117
DQ21
RMD22
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
RMD31
133
DQ31
RMD32
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
RMD41
64
DQ41
RMD42
68
DQ42
RMD43
69
DQ43
RMD44
153
DQ44
RMD45
155
DQ45
RMD46
161
DQ46
RMD47
162
DQ47
RMD48
72
DQ48
RMD49
73
DQ49
RMD50
79
DQ50
RMD51
80
DQ51
RMD52
165
DQ52
RMD53
166
DQ53
RMD54
170
DQ54
RMD55
171
DQ55
RMD56
83
DQ56
RMD57
84
DQ57
RMD58
87
DQ58
88
DQ59
174
DQ60
175
DQ61
RMD62
178
DQ62
179
DQ63
1
VREF
VDDID
WP
SCL
SDA
SA0
SA1
SA2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
82
90
92
91
181
182
183
VSS
DDR SDRAM DIMM
3111826344250586674818993
R369 4.7K
WP
SMBCLK
SMBDAT
DDR DECOUPLING,
STUFF 2, THE OTHER
RESERVED
VCCM
SMBCLK 3,4,14,37
SMBDAT 3,4,14,37
VCCM
C441
104p
C442
104p
C440
X_104p
C444
X_104p
C445
X_104p
C446
X_104p
C449
X_104p
C447
X_104p
C443
X_104p
VCCM
MICRO-STAR INT'L CO.,LTD.
Title
DDR1 & DDR2
Size Document Number Rev
MS-6535 1.0B
Custom
Date: Sheet
2
of
11 41Tuesday, June 11, 2002
1
SSTL-2 Termination Resistors
RMD[0..63]
RDQM[0..7]
RDQS[0..7]
RMA[0..14]
RCS-[0..3]
L = 0.4"
RMD1
RMD5
RMD0
RMD4
RMD6
RMD2
RDQM0
RDQS0
RMD9
RMD8
RMD7
RMD3
RDQM1
RMD13
RDQS1 RMD47
RMD12 RMD46
RMD11
RMD10
RMD14
RMA9
RMA13
RDQS2
RMD21
RMD17
RMA14
RMD16
RMD20
RMD19
RMD23
RMA5
RMA8
RMD27
RMD30
RMD26
RMA3
RDQM3
RMA4
RDQS3
RMD29
RMA7
RMD22
RMD18
RDQM2
RMD25
RMD28
RMA6
RMD24
RMA0
RMA1
RMA2
RMD31
RMD39
RMA11
RMD38
RMD34
RN88 47
RN87 47
RN86 47
RN85 47
RN84 47
RN82 47
RN83 47
RN80 47
RN77 47
RN78 47
RN81 47
RN79 47
RN76 47
RN99 47
RMD[0..63] 8,11
RDQM[0..7] 8,11
RDQS[0..7] 8,11
RMA[0..14] 8,11
RCS-[0..3] 8,11
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
MD/DQM(/DQS)
MA/Control
CS
CKE
RMD36
RMD32
RMA12
RMA10
RDQM4
RDQS4
RMD33
RMD37
RSRAS#
RSRAS#8,11
RMD44
RMD40
RMD35
RMD43
RMD42
RCS-3RMD15
RCS-2
RCS-0
RMD53
RMD52
RMD49
RMD48
RMD55
RDQS6
RMD54
RDQM6
RMD59
RMD63
RMD58
RDQS7
RMD56
RMD60
RMD51
RMD50
RMD62
RDQM7
RMD57
RMD61
RDQS5
RDQM5
RCS-1
RSCAS#
RSCAS#8,11
RMD41
RMD45
RSWE#
RSWE#8,11
L = 0.4" except RSC0~3 ( L=1.2" )
SDR
LV-CMOS
LV-CMOS
LV-CMOS
OD 3.3V OD 2.5V
RN101 47
RN100 47
RN98 47
RN94 47
RN96 47
RN93 47
RN92 47
RN89 47
RN91 47
RN90 47
RN97 47
RN95 47
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
12
34
56
78
DDR
Rs
SSTL-2
0/10/- 47
SSTL-2
10
SSTL-2
0
DDR_VTT
DDR_VTT
Rs
Rtt
10
0
47
0
47
DECOUPLING CAPACITOR FOR SSTL-2 END TERMIANTION VTT ISLAND
DDR_VTT
0603 Package placed within 200mils of VTT Termination R-packs
C474
1u
C475
1u
C476
X_1u
C477
1u
DDR_VTT
C490
1u
C491
X_1u
C492
1u
C493
1u
Did not stuff C476,C479,C482,C485,C488,C491,C494,C497,C500,C503 for DDR_VTT OK
C478
1u
C479
X_1u
C480
1u
C481
1u
C494
X_1u
C495
1u
C496
1u
C497
X_1u
C482
X_1u
C483
1u
C484
1u
C485
X_1u
C498
1u
C499
1u
C500
X_1u
C501
1u
C486
1u
C487
1u
C488
X_1u
C489
1u
Add 10uF-1206 Cap at the center
of DIMM conn for DDR_VTT DC power
C502
1u
C503
X_1u
C504
1u
C505
1u
C540
10u-1206
MICRO-STAR INT'L CO.,LTD.
Title
DDR TERMINATOR
Size Document Number Rev
MS-6535 1.0B
Custom
Date: Sheet
of
12 41Tuesday, June 11, 2002
8
INTB#
INTA#
INTC#
INTD#
D D
INTA#9,17,19
INTB#19,20,35
INTC#19,20,35
INTD#19,39
FRAME#19,20,35,39
IRDY#19,20,35,39
TRDY#19,20,35,39
STOP#19,20,35,39
SERR#19,20,35,39
C C
VCC1_8
B B
A A
R93
150RST
R87
150RST
Analog Power supplies of Transzip function for 962 Chip.
1 2
VCC3 VCC3
X_COPPER
X_80-0603
1 2
X_COPPER
8
PAR19,20,35,39
DEVSEL#19,20,35,39
PLOCK#19
96XPCLK3
PCIRST#37
ZCLK13
ZSTB09
ZSTB-09
ZSTB19
ZSTB-19
ZUREQ9
ZDREQ9
C88
X_104p
SZVREF IDEDB12
C91
104p
CP5
L8
C82
104p
CP6
7
VCC3
RN25
12
34
56
78
8.2K
PREQ#419,20
PREQ#319,39
PREQ#219,35
PREQ#119
PREQ#019
PGNT#419,20
PGNT#319,39
PGNT#219,35
PGNT#119
PGNT#019
C/BE#[0..3]19,20,35,39
INTA#
INTB#
INTC# ICHRDYB
INTD# IDEREQB
FRAME# CBLIDB
IRDY#
TRDY# IDEIOR-B
STOP# IDEIOW-B
SERR#
PAR IDESAB2
DEVSEL# IDESAB1
PLOCK# IDESAB0
96XPCLK IDECS-B1
PCIRST# IDECS-B0
ZCLK1 IDEDA4
ZSTB0 IDEDA6
ZSTB-0 IDEDA7
ZSTB1 IDEDA9
ZSTB-1 IDEDA10
ZUREQ IDEDA13
ZDREQ IDEDA14
10
ZAD[0..15]9
SZ1XAVDD
SZ1XAVSS
7
AD[0..31]19,20,35,39
PREQ#4
PREQ#3
PREQ#2
PREQ#1
PREQ#0
PGNT#4
PGNT#3 IDEIOR-A
PGNT#2 IDEIOW-A
PGNT#1 IDACK-A
PGNT#0
C/BE#3 IDESAA1
C/BE#2 IDESAA0
C/BE#1
C/BE#0 IDECS-A1
R169 33
SVDDZCMP IDEDB0
SZCMP_N IDEDB1
SZCMP_P IDEDB3
SVSSZCMP IDEDB4
SZ1XAVDD IDEDB7
SZ1XAVSS IDEDB8
SZ4XAVDD IDEDB10
SZ4XAVSS IDEDB11
SZVREF IDEDB13
C81
X_1u
F1
F2
E1
H5
F3
H3
G1
G2
G3
H4
K3
M4
P1
R4
E3
F4
E2
G4
M3
M1
M2
N4
M5
N3
N1
N2
Y2
C3
V20
N19
N20
K20
K19
N16
N17
R19
N18
R18
P18
U20
U19
T20
T19
R20
P20
CP7
1 2
X_COPPER
L9
X_80-0603
CP8
1 2
X_COPPER
6
AD[0..31]
PREQ#4
PREQ#3
PREQ#2
PREQ#1
PREQ#0
PGNT#4
PCI
PGNT#3
PGNT#2
PGNT#1
PGNT#0
C/BE#3
C/BE#2
C/BE#1
C/BE#0
INT#A
INT#B
INT#C
INT#D
FRAME#
IRDY#
TRDY#
STOP#
SERR#
PAR
DEVSEL#
PLOCK#
PCICLK
PCIRST#
ZCLK
ZSTB0
ZSTB0#
ZSTB1
ZSTB1#
ZUREQ
ZDREQ
VDDZCMP
ZCMP_N
ZCMP_P
VSSZCMP
Z1XAVDD
Z1XAVSS
Z4XAVDD
Z4XAVSS
HyperZip
VZREF
ZVSSREF
C85
104p
6
5
AD31 ZAD0
AD30 ZAD1
AD29 ZAD2
AD28 ZAD3
AD27 ZAD4
AD26 ZAD5
AD25 ZAD6
AD24 ZAD7
AD23 ZAD8
AD22 ZAD9
AD21 ZAD10
AD20 ZAD11
AD19 ZAD12
AD18 ZAD13
AD17 ZAD14
AD16 ZAD15
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
J5J4H2H1J3K4J2J1K5K2L3K1L1L4L5L2N5P2P3P4R2R3R1T1P5T2U1U2T3R5U3
AD9
AD8
AD7
AD6
AD31
AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD5
AD13
AD12
AD11
AD10
IDE
961A-1
ZAD0
ZAD1
ZAD2
ZAD3
ZAD4
ZAD5
ZAD6
ZAD7
ZAD8
ZAD9
ZAD10
ZAD11
ZAD12
ZAD13
ZAD14
M18
M19
SZ4XAVDD
SZ4XAVSS
M17
M16
M20
L16
L20
L18
ZAD15
K18
J20
K17
K16
H20
J18
H19
H18
CP11
1 2
VCC1_8
X_COPPER
L11
X_80-0603
C96
X_1u
CP10
1 2
X_COPPER
5
4
AD4
AD3
AD2
AD1
AD0
U8A
V1
AD4
AD3
AD2
AD1
AD0
C109
104p
4
IDECSA#1
IDECSA#0
IDECSB#1
IDECSB#0
R106 56
R98 56
IDEAVDD
IDEAVSS
ICHRDYA
IDREQA
IIRQA
CBLIDA
IIOR#A
IIOW#A
IDACK#A
IDSAA2
IDSAA1
IDSAA0
ICHRDYB
IDREQB
IIRQB
CBLIDB
IIOR#B
IIOW#B
IDACK#B
IDSAB2
IDSAB1
IDSAB0
IDA10
IDA11
IDA12
IDA13
IDA14
IDA15
IDB10
IDB11
IDB12
IDB13
IDB14
IDB15
IDA0
IDA1
IDA2
IDA3
IDA4
IDA5
IDA6
IDA7
IDA8
IDA9
IDB0
IDB1
IDB2
IDB3
IDB4
IDB5
IDB6
IDB7
IDB8
IDB9
Y3
Y4
W10
V10
Y11
U12
V11
Y9
Y10
T11
U11
W11
T12
V12
W17
Y17
T16
U17
T14
W16
V16
Y18
T15
V17
U16
W18
U10
V9
W8
T9
Y7
V7
Y6
Y5
W6
U8
W7
V8
U9
Y8
T10
W9
Y16
V15
U14
W14
V13
T13
Y13
Y12
W12
W13
U13
Y14
V14
W15
Y15
U15
SIS961
SVDDZCMP
SZCMP_N
SZCMP_P
SVSSZCMP
3
IDESAA2
IDECS-A0
IDEDA0
IDEDA1
IDEDA2
IDEDA3
IDEDA5
IDEDA8
IDEDA11
IDEDA12
IDEDA15
IDEDB2
IDEDB5
IDEDB6
IDEDB9
IDEDB14
IDEDB15
Title
Size Document Number Rev
Custom
3
Date: Sheet
2
VCC1_8
R78
C80
103p
IDESAA[0..2]
IDECS-A[0..1]
IDESAB[0..2]
IDECS-B[0..1]
MICRO-STAR INT'L CO.,LTD.
SIS961A-1
MS-6535 1.0B
0
C79
104p
ICHRDYA
IDEREQA
IDEIRQA
CBLIDA
IDEIRQB
IDACK-B
Put near 961A Chip.
ZSTB0
ZSTB1
ZSTB-0
ZSTB-1
2
IDESAA[0..2] 22
IDECS-A[0..1] 22
IDESAB[0..2] 22
IDECS-B[0..1] 22
IDEDA[0..15] 22
IDEDB[0..15] 22
R110 X_4. 7K
R135 X_4. 7K
R112 X_4. 7K
R132 X_4. 7K
C75
104p
ICHRDYA 22
IDEREQA 22
IDEIRQA 22
CBLIDA 22
IDEIOR-A 22
IDEIOW-A 22
IDACK-A 22
ICHRDYB 22
IDEREQB 22
IDEIRQB 22
CBLIDB 22
IDEIOR-B 22
IDEIOW-B 22
IDACK-B 22
VCC1_8
13 41Tuesday, June 11, 2002
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