MSI MS-6382 Schematic
5
4
3
2
1
MS-6382 MICRO-ATX
Title Page
D D
AMD PGA 462 Processor
VIA VT8366A / VT8233A Chipset
Winbond 83697HF-AW LPC I/O
C C
B B
A A
Cover Sheet 1
Block Diagram
2
3GPIO SPEC
4,5AMD 462 PGA Socket
Clock Synthesizer 6
VT8366 7,8,9
System Memory
DDR Terminations
10,11
12, 13
AGP PRO SLOT 14
VT8233
PCI Connectors
CNR RISER
AC'97 Codec
LAN
15,16,17
18,19
20
21
22
23AUDIO PORT
ATA 66/100 Connectors
Front USB Port
24
25
26Rear USB Port
LPC I/O
Hardware monitor
System ROM
Keyboard/Mouse Connectors
LPT/COM Port
Game Port
VRM 9.0/ L6911D
VCC25 POWER
APIC CONTROLLER ( MS-5)
Power Mangement
PowerOK Circuit
Front Panel
Pull up Rsistor
BULK / Decopuling
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41HISTORY
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
1
Cover Sheet
MS-6382
Last Revision Date:
Monday, December 03, 2001
Sheet
1 41
of
Rev
20
5
D D
4
3
2
1
COM2
COMPORT
JAUD1(9-10)
1
2
JC-D2-GN-SB
JBAT1(1-2)
1
2
JC-D2-GN-SB
BAT1
12
BAT-CR2032-3V-210mAh
U14_X
1
2
3
EON-256Kx8-PLCC32
J10(2-3)
1
2
JC-D2-GN-SB
JFP2(4-6)
1
2
JC-D2-GN-SB
PCB
C C
_
COM1
COMPORT
JAUD1(5-6)
1
2
JC-D2-GN-SB
SW1(2-3)
1
2
JC-D2-GN-SB
B B
A A
Title
{Title}
Size Document Number Rev
{Doc} {RevCode}
Custom
5
4
3
2
Date: Sheet of
1 1Monday, December 03, 2001
1
5
4
3
2
1
Block
Diagram
D D
AMD Socket 462
FSB
A
AGP 4X /Fast Write
C C
3 PCI Slots
G
P
VT8366
DDR
VLINK
PCI-33
B B
VT8233
IEEE 802.3MAC( MII)
C
N
R
USB
Dual ATA 100
LPC BUS
SUPER I/O ROM
AC-LINK
X BUS
A A
AC'97 Codec
USB 1.1 6 Ports
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
1
Block Diagram
MS-6382
Last Revision Date:
Monday, December 03, 2001
Sheet
2 41
of
Rev
20
5
GPIO FUNCTION
4
3
2
1
VT8233 GPIO Function Define
PIN NAME
D D
GPO0 (VSUS33)
GPO1/SUSA#(VSUS33)
GPO2/SUSB#(VSUS33)
GPO3/SUSST1#(VSUS33)
GPO4/SUSCLK(VSUS33)
GPO0
SUSA#
SUSB#
SUSST#
SUSCLK
GPO5/CPUSTP#
GPO6/PCISTP#
GPO7/SLP#
SLP#
GPO8/GPI8/IPBIN0
GPO9/GPI9/IPBIN1
C C
GPO10/GPI10/IPBRDFR
GPO10(PRI_DOWN)
GPO11/GPI11/IPBRDCK
GPO12/GPI12/IPBOUT0
GPO13/GPI13/IPBOUT1
GPO12
GPO13
GPO14/GPI14/IPBTDFR
GPO15/GPI15/IPBTDCK
GPO16/SA16/STRAP
GPO17/SA17/STRAP
PIN NAME Function defineFunction define
GPI0
GPI1
GPI2/EXTSMI#
GPI3/RING#
GPI4/LID#
GPI5/BATLOW#
GPI6/PME#
GPI7/SMBALRT#
GPI16/INTRUDER#
GPI17/CPUMISS
GPI18/AOLGP1/THRM#
GPI19/IORDY
GPI0
ATADET0=>Detect IDE1 ATA100/66
EXTSMI#
RING#
ATADET1=>Detect IDE2 ATA100/66
Exteranl Pull up to 3VDUAL
PME#
Exteranl Pull up to 3VDUAL
Exteranl Pull down
Exteranl Pull up to 3VDUAL
THRM#
Exteranl Pull up to VCC3
W697HF-AW
PIN NAME Function define
GP23/PLED
GP24/WDTO
GP32/PWROK
GP33/RSMRST#
GP34/CIRRX
GP35/SUSLED
PCI
DEVICES
PCI SLOT 1
PCI SLOT 2
PCI SLOT 3
LAN INT#D AD19
INT#
INT#A
INT#B
INT#C
INT#D
INT#B
INT#C
INT#D
INT#A
INT#C
INT#D
INT#A
INT#B
INT#B PCICLK4
IDSEL
AD16
AD17
AD18
AD21
REQ#/GNT#
PREQ#0
PGNT#0
PREQ#1
PGNT#1
PREQ#2
PGNT#2
PREQ#4
PGNT#4
PREQ#3
PGNT#3
CLOCK
PCICLK1
PCICLK2
PCICLK3
5880PCLK
GPO18/SA18/STRAP
GPO19/SA19/STRAP
B B
GPO20/GPI20
/ACSDIN2/PCS0#/EI
GPO21/GPI21/ACSDIN3
/PCS1#/SLPBTN#
GPO22/GPI22/IOR#
GPO23/GPI23/IOW#
GPO20
GPO21
GPO22
GPO23
GPO24/GPI24/GPIOA
GPO25/GPI25/GPIOC
GPO26/GPI26/SMBDT2
(VSUS33)
GPO27/GPI27/SMBCK2
(VSUS33)
GPO28/GPI28/
APICD0/APICCS#
GPO29/GPI29/
A A
APICD1/APICACK#
GPO30/GPI30/GPIOD
GPO31/GPI31/GPIOE
SMBDATA2/Slave SMBUS
SMBCLK2/Slave SMBUS
5
Revsin ID
Revsin ID
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
4
3
2
http://www.msi.com.tw
GPIO Spec.
MS-6382
Last Revision Date:
Monday, December 03, 2001
Sheet
3 41
1
Rev
20
of
5
4
3
2
1
**All CPU interface are 2.5V tolerant**
SOCKET 462 Part 1
R41
680
123456
RN7
VCC3
R421 680
RN6
1 2
3 4
5 6
7 8
8P4R-330
8P4R-1K
VCORE
R57
510
Q12
2N3904S
-FERR
CLKVCC2
VCC3
2
C251
39P
-FERR 15
-DBREQ
R23 510
-PLLTEST
R24 510
CPUCLK_R
-CPUCLK_R
CPU_TCK
CPU_TMS
CPU_TDI
-CPU_TRST
CPUCLK6
-CPUCLK6
VREFMODE
VREF_SYS
C88
680P
C82
680P
1 2
3 4
5 6
7 8
VCORE
VREFMODE=Low=No voltage scaling
ZN
R71 40.2RST
ZP
R63 56.2RST
match the transmission line
Push-pull compensation circuit
CLKOUT
-CLKOUT
* Trace lengths of CLKOUT
and -CLKOUT are between
2" and 3"
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
SOCKET 462 Part 1
MS-6382
-SDATA[0..63]7
D D
C C
-DICLK[0..3]7
B B
-DOCLK[0..3]7
-AIN[2..14]7
A A
-SDATA[0..63]
-DICLK[0..3]
-DOCLK[0..3]
-AIN[2..14]
CFWDRST7
CONNECT7
PROCDRY7
-SDATA0
-SDATA1
-SDATA2
-SDATA3
-SDATA4
-SDATA5
-SDATA6
-SDATA7
-SDATA8
-SDATA9
-SDATA10
-SDATA11
-SDATA12
-SDATA13
-SDATA14
-SDATA15
-SDATA16
-SDATA17
-SDATA18
-SDATA19
-SDATA20
-SDATA21
-SDATA22
-SDATA23
-SDATA24
-SDATA25
-SDATA26
-SDATA27
-SDATA28
-SDATA29
-SDATA30
-SDATA31
-SDATA32
-SDATA33
-SDATA34
-SDATA35
-SDATA36
-SDATA37
-SDATA38
-SDATA39
-SDATA40
-SDATA41
-SDATA42
-SDATA43
-SDATA44
-SDATA45
-SDATA46
-SDATA47
-SDATA48
-SDATA49
-SDATA50
-SDATA51
-SDATA52
-SDATA53
-SDATA54
-SDATA55
-SDATA56
-SDATA57
-SDATA58
-SDATA59
-SDATA60
-SDATA61
-SDATA62
-SDATA63
-DICLK0
-DICLK1
-DICLK2
-DICLK3
-DIVAL
-DIVAL7
-DOCLK0
-DOCLK1
-DOCLK2
-DOCLK3
-AICLK7
5
-DOVAL
-AIN0
-AIN1
-AIN2
-AIN3
-AIN4
-AIN5
-AIN6
-AIN7
-AIN8
-AIN9
-AIN10
-AIN11
-AIN12
-AIN13
-AIN14
CFWDRST
CONNECT
PROCRDY
-FILVAL
AA35
W37
W35
AA33
AE37
AC33
AC37
AA37
AC35
W33
AN33
AE35
AL31
AJ29
AL29
AG33
AJ37
AL35
AE33
AJ35
AG37
AL33
AN37
AL37
AG35
AN29
AN35
AN31
AJ33
AJ21
AL23
AN23
AJ31
Y35
U35
U33
S37
S33
Y37
S35
Q37
Q35
N37
J33
G33
G37
E37
G35
Q33
N33
L33
N35
L37
J37
A37
E35
E31
E29
A27
A25
E21
C23
C27
A23
A35
C35
C33
C31
A29
C29
E23
C25
E17
E13
E11
C15
E9
A13
C9
A9
C21
A21
E19
C19
C17
A11
A17
A15
J35
E27
E15
C37
A33
C11
SDATA0
SDATA1
SDATA2
SDATA3
SDATA4
SDATA5
SDATA6
SDATA7
SDATA8
SDATA9
SDATA10
SDATA11
SDATA12
SDATA13
SDATA14
SDATA15
SDATA16
SDATA17
SDATA18
SDATA19
SDATA20
SDATA21
SDATA22
SDATA23
SDATA24
SDATA25
SDATA26
SDATA27
SDATA28
SDATA29
SDATA30
SDATA31
SDATA32
SDATA33
SDATA34
SDATA35
SDATA36
SDATA37
SDATA38
SDATA39
SDATA40
SDATA41
SDATA42
SDATA43
SDATA44
SDATA45
SDATA46
SDATA47
SDATA48
SDATA49
SDATA50
SDATA51
SDATA52
SDATA53
SDATA54
SDATA55
SDATA56
SDATA57
SDATA58
SDATA59
SDATA60
SDATA61
SDATA62
SDATA63
SDATAINCLK0
SDATAINCLK1
SDATAINCLK2
SDATAINCLK3
SDATAINVAL
SDATAOUTCLK0
SDATAOUTCLK1
SDATAOUTCLK2
SDATAOUTCLK3
SDTATOUTVAL
SADDIN0
SADDIN1
SADDIN2
SADDIN3
SADDIN4
SADDIN5
SADDIN6
SADDIN7
SADDIN8
SADDIN9
SADDIN10
SADDIN11
SADDIN12
SADDIN13
SADDIN14
SADDINCLK
CLKFWDRST
CONNECT
PROCRDY
SFILLVAL
4
CPU1A
A20M
FERR
IGNNE
RESET
STPCLK
PWROK
PICCLK
PICD0/BYPASSCLK
PICD1/BYPASSCLK
COREFB-
COREFB+
CLKIN
CLKIN
RSTCLK
RSTCLK
K7CLKOUT
K7CLKOUT
ANALOG
SYSVREFMODE
VREF_SYS
PLLBYPASS
PLLBYPASSCLK
PLLBYPASSCLK
PLLMON1
PLLMON2
PLLTEST
SCANCLK1
SCANCLK2
SCANINTEVAL
SCANSHIFTEN
DBRDY
DBREQ
FLUSH
SCHECK0
SCHECK1
SCHECK2
SCHECK3
SCHECK4
SCHECK5
SCHECK6
SCHECK7
SADDOUT0
SADDOUT1
SADDOUT2
SADDOUT3
SADDOUT4
SADDOUT5
SADDOUT6
SADDOUT7
SADDOUT8
SADDOUT9
SADDOUT10
SADDOUT11
SADDOUT12
SADDOUT13
SADDOUT14
SADDOUTCLK
INTR
TRST
VID0
VID1
VID2
VID3
VID4
FID0
FID1
FID2
FID3
INIT
NMI
SMI
ZN
ZP
TCK
TDI
TDO
TMS
AE1
AG1
AJ3
AL1
AJ1
AN3
AG3
AN5
AC1
AE3
C483
68P
APICCLK_CPU
N1
N3
N5
AG13
AG11
AN17
AL17
AN19
AL19
AL21
AN21
AJ13
AA5
W5
AC5
AE5
AJ25
AN15
AL15
AN13
AL13
AC3
S1
S5
S3
Q5
AA1
AA3
AL3
Q1
U1
U5
Q3
U3
L1
L3
L5
L7
J7
W1
W3
Y1
Y3
U37
Y33
L35
E33
E25
A31
C13
A19
J1
J3
-AOUT2
C7
-AOUT3
A7
-AOUT4
E5
-AOUT5
A5
-AOUT6
E7
-AOUT7
C1
-AOUT8
C5
-AOUT9
C3
-AOUT10
G1
-AOUT11
E1
-AOUT12
A3
-AOUT13
G5
-AOUT14
G3
E3
N12-4620011-F02
-A20M
FERR
-CPUINIT
INTR
-IGNNE
NMI
-CPURST
-SMI
-STPCLK
-APICD0
-APICD1
-COREFB
COREFB
CPUCLK_R
-CPUCLK_R
CLKOUT
-CLKOUT
VREFMODE
VREF_SYS
ZN
ZP
-PLLBP
PLLMON1
PLLMON2
-PLLTEST
SCANCLK1
SCANCLK2
SINTVAL
SSHIFTEN
-DBREQ
-FLUSH
CPU_TCK
CPU_TDI
CPU_TMS
-CPU_TRST
VID0
VID1
VID2
VID3
VID4
FID0
FID1
FID2
FID3
-A20M 15
-CPUINIT 15
INTR 15
-IGNNE 15
NMI 15
-CPURST 35
-SMI 15
-STPCLK 15
PWGD_CPU 35
APICCLK_CPU 6
-APICD0 15
-APICD1 15
-COREFB 33
COREFB 33
VCORE
R101
100
R100
100
VID0 33
VID1 33
VID2 33
VID3 33
VID4 33
FID0 17
FID1 17
FID2 17
FID3 17
-AOUT[2..14]
-AOCLK 7
R93
100
R92
100
-CPURST
-AOUT[2..14] 7
3
C421
270P
-APICD0
-APICD1
-CPUINIT
-IGNNE
-A20M
-STPCLK
-SMI
NMI
INTR
-FLUSH
-PLLBP
PLLMON1
PLLMON2
-AIN0
-AIN1
-DOVAL
-FILVAL
SINTVAL
SCANCLK1
SCANCLK2
SSHIFTEN
FERR
APICCLK_CPU
C15 39P
VCORE
for test only
Pull to 2.5V
78
RN12
1 2
3 4
5 6
7 8
8P4R-680
RN19
1 2
3 4
5 6
7 8
8P4R-680
R45 680
R120 680
R88 56
R87 56
R123 270
R124 270
R126 270
R127 270
RN3
1 2
3 4
5 6
7 8
8P4R-270
VCORE
RN4
8P4R-510
VCORE
0.5 * VCORE
C54
C53
103P
473P
R110 60.4RST
R108
301RST
R104 60.4RST
close Socket 462
R74
for internal
X_1K
VREFSYS
R75
270
VCORE
RN28
1 2
3 4
5 6
7 8
8P4R-100
Last Revision Date:
Monday, December 03, 2001
Sheet
4 41
1
R86
120RST
R89
120RST
VCORE
VCORE
of
Rev
20
5
4
3
2
1
SOCKET 462 Part 2
D D
VCORE
H12
H16
H20
H24M8P30R8T30V8X30Z8AB30
VCC_CORE1
VCC_CORE2
VCC_CORE3
VCC_CORE4
AD30
C C
B B
A A
AD8
AF10
AF28
AF30
AF32
AF6
AF8
AH30
AH8
AJ9
AK8
AL9
AM8
F30
F8
H10
H28
H30
H32
H6
H8
K30
K8
AJ7
AL7
AN7
G25
G17
G9
N7
Y7
AG7
AG15
AG29 AN27
A01
A02
A03
A04
XX1
XX2
YY1
YY2
YY3
YY4
YY5
YY6
YY7
YY8
YY9
YY10
VCC_CORE5
VCC_SRAM1
VCC_SRAM2
VCC_SRAM3
VCC_SRAM4
VCC_SRAM5
VCC_SRAM6
VCC_SRAM7
VCC_SRAM8
VCC_SRAM9
VCC_SRAM11
VCC_SRAM13
VCC_SRAM14
VCC_SRAM16
VCC_SRAM17
VCC_SRAM19
VCC_SRAM20
VCC_SRAM21
VCC_SRAM22
VCC_SRAM23
VCC_SRAM24
VCC_SRAM25
VCC_SRAM26
VCC_SRAM27
VCC_SRAM28
VCC_SRAM29
VCC_SRAM30
VCC_SRAM31
KEY4
KEY6
KEY8
KEY10
KEY12
KEY14
KEY16
KEY18 BP0_CUT
H1
H2
H3
H4
EMI_GND
EMI_GND
H_GND
H_GND
H_GND
H_GND
H_GND
H_GND
H_GND
H_GND
H_GND
H_GND
VSS1
VSS2
VSS3
VSS4
VSS5
H14
H18
H22
H26
M30P8R30T8V30X8Z30
VCC_CORE6
VCC_CORE7
VCC_CORE8
VCC_CORE9
VSS6
VSS7
VSS8
VSS9
AF14
AF18
VCC_CORE10
VCC_CORE11
VCC_CORE12
VCC_CORE13
VCC_CORE14
VSS10
VSS11
VSS12
VSS13
VSS14
AB8
AF12
AF16
AF22
AF26
AM34
AK36
VCC_CORE15
VCC_CORE16
VCC_CORE17
VCC_CORE18
VSS15
VSS16
VSS17
VSS18
AF20
AF24
AM36
AK32
AK34
AK30
AK26
AK22
VCC_CORE19
VCC_CORE20
VCC_CORE21
VCC_CORE22
VSS19
VSS20
VSS21
VSS22
AK28
AK24
AK20
AK16
AK18
AK14
AK10
AL5
VCC_CORE23
VCC_CORE24
VCC_CORE25
VCC_CORE26
VSS23
VSS25
VSS26
VSS27
AK12
AK4
AK2
AH36
AH26
AM30
AH22
AH18
VCC_CORE27
VCC_CORE28
VCC_CORE29
VCC_CORE30
VSS28
VSS29
VSS30
VSS31
AM32
AH34
AH32
AH28
AH14
AH10
AH4
AH2
VCC_CORE31
VCC_CORE32
VCC_CORE33
VCC_CORE34
VSS32
VSS33
VSS34
VSS35
AH24
AH20
AH16
AH12
AF36
AF34
AD6
AM26
VCC_CORE35
VCC_CORE36
VCC_CORE37
VCC_CORE38
VSS37
VSS38
VSS39
VSS40
AF4
AF2
AD36
AD34
AD4
AD2
AB36
AB34
VCC_CORE39
VCC_CORE40
VCC_CORE41
VCC_CORE42
VSS41
VSS42
VSS43
VSS44
AD32
AB6
AB4
AB2
AB32Z6Z4Z2X36
VCC_CORE43
VCC_CORE44
VCC_CORE45
VCC_CORE46
VSS45
VSS46
VSS47
VSS48
Z36
Z34
Z32X6AM28X4X2
X34
AM22
X32V6V4V2T36
VCC_CORE47
VCC_CORE48
VCC_CORE49
VCC_CORE50
VCC_CORE51
VSS49
VSS50
VSS51
VSS52
VSS53
V36
V34
V32T6T4T2R36
* 25 mils Trace/ 12 mils
Space
2.5V
C111
39P
T34
T32R6R4R2AM18
P36
P34
VCC_CORE52
VCC_CORE53
VCC_CORE54
VCC_CORE55
VCC_CORE56
VCC_CORE57
VCC_CORE58
VCC_CORE59
VCC_CORE60
VCC_CORE61
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
R34
AM24
R32P6P4P2M36
R116 10
C116
39P
P32M4M6M2K36
VCC_CORE62
VCC_CORE63
VCC_CORE64
VCC_CORE65
VCC_CORE66
VSS64
VSS65
VSS66
VSS67
VSS68
M34
M32K6K4K2AM20
VCCA_PLL1VCCA_PLL
K34
K32H4H2
VCC_CORE67
VCC_CORE68
VCC_CORE69
VCC_CORE70
VCC_CORE71
VSS69
VSS70
VSS71
VSS72
VSS73
H36
H34
C20
39P
AM14
F36
F34
F32
VCC_CORE72
VCC_CORE73
VCC_CORE74
VCC_CORE75
VSS74
VSS75
VSS76
VSS77
F26
F22
F18
F14
F28
F24
F20
F16
F12
VCC_CORE76
VCC_CORE77
VCC_CORE78
VCC_CORE79
VCC_CORE80
VSS78
VSS79
VSS80
VSS81
VSS82
F10F6F4F2AM16
D32
D28
AM10
D24
VCC_CORE81
VCC_CORE82
VCC_CORE83
VCC_CORE84
VSS83
VSS84
VSS85
VSS86
D36
D34
D30
D26
D20
D16
D12D8D4D2B36
VCC_CORE85
VCC_CORE86
VCC_CORE87
VCC_CORE88
VSS87
VSS88
VSS89
VSS90
D22
D18
D14
D10D6B34
B32
AM2
VCC_CORE89
VCC_CORE90
VCC_CORE91
VCC_CORE92
VSS91
VSS92
VSS93
VSS94
AM12
B30
B26
VCCA_PLL trace length from the VR1 to the
PGA must be 0.75".
Place al filters close to the PGA.
Keep all power and signal trce away from
the VR1.
Place a cut in the GND plane around the
VCCA_PLL regulator circuit.
VCCA_PLL
0~32 mA,
2.25~2.75V
B28
B24
B20
B16
VCC_CORE93
VCC_CORE94
VCC_CORE95
VCC_CORE96
VCC_CORE97
VSS95
VSS96
VSS97
VSS98
VSS99
B22
B18
B14
B10B6B2
B12B8B4
VCC_CORE98
VCC_CORE99
VCC_CORE100
VSS100
VSS101
VSS102
AM4
AJ5
AC7
VCC_Z
NC1
VCC_CORE101
NC2
NC3
NC6
NC7
NC8
NC9
NC10
NC11
NC12
NC13
NC15
NC16
NC17
NC18
NC19
NC20
NC21
NC22
NC23
NC24
NC25
NC27
NC28
NC29
NC30
NC31
NC32
NC33
NC34
NC35
NC36
NC37
NC42
NC43
NC44
NC45
BP1_CUT
BP2_CUT
BP3_CUT
H_GND
H_GND
H_GND
H_GND
H_GND
H_GND
H_GND
H_GND
H_GND
H_GND
H_GND
H_GND
H_GND
H_GND
VSS103
VSS104
AK6
AM6
AE7
AJ23
VCC_A
VSS_Z
CPU1B
N12-4620011-F02
AA31
AC31
AE31
AG23
AG25
AG31
AG5
AJ11
AJ15
AJ17
AJ19
AJ27
AL11
AN11
AN9
G11
G13
G27
G29
G31
J31
J5
L31
N31
Q31
S31
S7
U31
U7
W31
W7
Y31
Y5
AG19
G21
AG21
G19
AL27
AN25
AL25
YY11
YY12
YY13
YY14
YY15
YY16
YY17
YY18
YY19
YY20
YY21
YY22
YY23
YY24
CPU_TMP+ 27
CPU_TMP- 27
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
SOCKET 462 Part 2
MS-6382
Last Revision Date:
Monday, December 03, 2001
Sheet
1
5 41
Rev
20
of
5
4
3
2
1
Clock Synthesizer
CP19 X_COPPER
L21
1 2
C485
4.7u-0805
SB_OSC14
SIO48M
USBCLK_SB
AGPCLK
AGPCLK_NB
VCLK
SB_PCLK
SIOPCLK
PCICLK1
PCICLK2
PCICLK3
5880PCLK
PCICLK4
CPUCLK
-CPUCLK
HCLK
-HCLK
DCLK5
-DCLK5
DCLK2
-DCLK2
DCLK4
-DCLK4
DCLK1
-DCLK1
DCLK0
-DCLK0
DCLK3
-DCLK3
X_80S/0805
VCC25CLKVCC2
SB_OSC14 16
SIO48M 27
USBCLK_SB 17
AGPCLK 14
AGPCLK_NB 9
VCLK 15
SB_PCLK 15
SIOPCLK 27
PCICLK1 18
PCICLK2 18
PCICLK3 19
5880PCLK 22
PCICLK4 22
CPUCLK 4
-CPUCLK 4
HCLK 7
-HCLK 7
DCLK5 11
-DCLK5 11
DCLK2 10
-DCLK2 10
DCLK4 11
-DCLK4 11
DCLK1 10
-DCLK1 10
DCLK0 10
-DCLK0 10
DCLK3 11
VCC VCC3
C235 102P
C250 102P
For CPUCLK and -CPUCLK
de_copuling used.
C502
104P
CP18 X_COPPER
L24
1 2
C259
X_80S/0805
104P
C314
10P
C306
10P
Y1
14.318MHZ
APICCLK_CPU4
CLKVCC3
C339
C294
C484
4.7u-0805
CLKVCC3
APICCLK15,39
CLKVCC2
DCLKO8
DCLKI8 -DCLK3 11
C319
104P
SMBDATA110,11,16,35
APICCLK
APICCLK_CPU
C310
104P
SMBCLK110,11,16,35
R275 10K
R414 22
R415 22
R152 680
REF1
-SEL_DDR
-SEL_P4
FS0
FS2
FS3
MUL_SEL
CLKX1
CLKX2
C333
104P
104P
CLKVCC3
CLKVCC2
SMBDATA1
SMBCLK1
R146 10
R509 10K
R463 10K
R464 10K
R465 X_10K
FS1_R
R253 10K
R466 10K
R467 10K
R468 10K
R469 X_10K
CLK_IREF
REF1
104P
CLKVCC3
CLKVCC3
CLKVCC3
C334
104P
U35
5
VDDAGP
51
VDDCPU
16
VDDPCI
55
VDDREF
22
VDD48M
23
VDD
50
VDDCPU_CS
34
VDDMEM1
40
VDDMEM2
9
GNDAGP
13
GNDPCI
54
GNDCPU
2
GNDREF
33
GNDMEM1
39
GNDMEM2
19
GND48M
47
GNDCPU_CS
24
GND
3
XIN
4
XOUT
28
SDATA
27
SCLK
26
PD/RST
25
IREF
56
VTT_PWRGD/REF1
45
BUF_IN
46
FBOUT
CY28341_1
FS1_R 16
C302
C291
104P
104P
FS0/REF0
48MHZ/FS3
24_48MHZ/FS2
AGP1/SELK7_P4
PCI_F/FS1
PCI1/SEL_SDR_DDR
PCI2/MULT_SEL
DDRT0
DDRC0
DDRT1
DDRC1
DDRT2
DDRC2
DDRT3
DDRC3
DDRT4
DDRC4
DDRT5
DDRC5
AGP0
AGP2
PCI3
PCI4
PCI5
PCI6
CPU1
CPU1
HCLK
HCLK
1
20
21
6
7
8
10
11
12
14
15
17
18
53
52
48
49
44
43
42
41
38
37
36
35
32
31
30
29
C290
104P
FS0
FS3
FS2
R_GCLK_NB
-SEL_P4
R_VCLK
FS1_R
-SEL_DDR
MUL_SEL
R_PCICLK0
R_PCICLK1
R_PCICLK2
R_CPU_CLK
-R_CPU_CLK
R_HCLK
-R_HCLK
R_DCLK0
-R_DCLK0
R_DCLK1
-R_DCLK1
R_DCLK2
-R_DCLK2
R_DCLK3
-R_DCLK3
R_DCLK4
-R_DCLK4
R_DCLK5
-R_DCLK5
C470
C257
104P
104P
R250 22
R282 33
R283 33
R249 22
R248 22
R247 22
R276 22
R277 22
7 8
5 6
3 4
1 2
RN99 8P4R-22
R525 33
R240 10
R241 10
R242 10
R243 10
RN51 8P4R-10
1 2
3 4
5 6
7 8
RN123 8P4R-10
1 2
3 4
5 6
7 8
1 2
3 4
5 6
7 8
RN44 8P4R-10
VCC3
C499
D D
104P
C C
B B
C500
104P
C501
104P
PCICLK4
PCICLK1
PCICLK2
PCICLK3
5880PCLK
SB_PCLK
SIOPCLK
AGPCLK
AGPCLK_NB
CPUCLK
-CPUCLK
HCLK
-HCLK
SIO48M
USBCLK_SB
SB_OSC14
VCLK
APICCLK
APICCLK_CPU
-DCLK2
DCLK2
-DCLK5
DCLK5
-DCLK3
DCLK3
-DCLK0
DCLK0
-DCLK1
DCLK1
-DCLK4
DCLK4
C505 33P
CN18
7 8
5 6
3 4
1 2
8P4C-22P
C337 10P
C338 10P
C273 10P
C272 10P
C267 5P
C268 5P
C269 10P
C270 10P
C343 10P
C342 10P
C266 10P
C271 10P
C450 33P
C451 33P
CN10 8P4C-10P
7 8
5 6
3 4
1 2
CN21 8P4C-10P
7 8
5 6
3 4
1 2
CN7 8P4C-10P
7 8
5 6
3 4
1 2
R_GCLK_NB
R470 X_10K
CLKVCC3
Adjust other Frequency by BIOS.
A A
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
Clock Synthesizer
MS-6382
Last Revision Date:
Monday, December 03, 2001
Sheet
1
6 41
Rev
20
of
5
4
3
2
1
VCOREVCC25 AVDD1
C401
104P/BOT
K18
J18
J17
J14
G23
F19
D23
D21
D18
D15
G21
H22
D D
-AIN[14..2]4
-AIN2
-AIN3
-AIN4
-AIN5
-AIN6
-AIN7
-AIN8
-AIN9
-AIN10
-AIN11
-AIN12
-AIN13
-AIN14
-AICLK_R
-AOUT[14..2]4
C C
-DOCLK[0..3]4
-AOUT[14..2]
-AOCLK4
-DOCLK[0..3]
-DIVAL4
CFWDRST4
CONNECT4
PROCDRY4
R140 68RST
C397
104P/BOT
HCLK6
-HCLK6
-VID37
C392
104P/BOT
VCORE
R131
B B
100RST
C155
R125
100RST C157
104P
C154
103P
S2K_VREF
-AOUT2
-AOUT3
-AOUT4
-AOUT5
-AOUT6
-AOUT7
-AOUT8
-AOUT9
-AOUT10
-AOUT11
-AOUT12
-AOUT13
-AOUT14
-AOCLK
-DICLK0_R
-DICLK1_R
-DICLK2_R
-DICLK3_R
-DOCLK0
-DOCLK1
-DOCLK2
-DOCLK3
-DIVAL
CFWDRST
CONNECT
PROCRDY
HCLK
-HCLK
-VID
R176
820
D17
AIN2
B17
AIN3
D16
AIN4
E18
AIN5
A17
AIN6
C17
AIN7
F15
AIN8
A15
AIN9
C16
AIN10
C18
AIN11
B15
AIN12
A16
AIN13
E15
AIN14
E17
AINCLK
R25
AOUT2
R26
AOUT3
R23
AOUT4
T24
AOUT5
R24
AOUT6
V25
AOUT7
T22
AOUT8
T25
AOUT9
V24
AOUT10
U23
AOUT11
U26
AOUT12
U24
AOUT13
V26
AOUT14
T26
AOUTCLK
D19
DICLK0
B26
DICLK1
F24
DICLK2
M23
DICLK3
C19
DOCLK0
D26
DOCLK1
G26
DOCLK2
N26
DOCLK3
E16
DINVAL
C14
CFWDRST
C15
CONNECT
E14
PROCRDY
H21
HCLK
J21
HCLK
J1
VID
G22
S2KCOMP
F16
S2KVREF
T21
S2KVREF
VTS2K
VDS2K
VSS2K
F22
VTT
VTT
GND
GND
B19
B16
VTT
VTT
VTT
VTT
VTT
VTT
VTT
GND
GND
GND
GND
GND
GND
GND
F21
F20
F18
F17
F14
E25
B25
B22
VTT
GND
T23
R21
P18
N23
N18
K23
K21
VTT
GND
H25
L21
VTT
GND
K22
U9A
VTT
VTT
VTT
VTT
VTT
GND
GND
GND
GND
GND
L25
P21
P25
U25
L22
AVDD1
AGND1
J22
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
D32
D33
D34
D35
D36
D37
D38
D39
D40
D41
D42
D43
D44
D45
D46
D47
D48
D49
D50
D51
D52
D53
D54
D55
D56
D57
D58
D59
D60
D61
D62
D63
VT8366
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
AGND1
-SDATA0
D20
-SDATA1
A21
-SDATA2
E21
-SDATA3
B21
-SDATA4
D22
-SDATA5
C20
-SDATA6
C22
-SDATA7
C21
-SDATA8
B20
-SDATA9
B18
-SDATA10
A19
-SDATA11
A18
-SDATA12
A20
-SDATA13
E20
-SDATA14
E19
-SDATA15
A22
-SDATA16
C23
-SDATA17
A23
-SDATA18
A24
-SDATA19
E23
-SDATA20
E24
-SDATA21
C25
-SDATA22
D24
-SDATA23
C26
-SDATA24
B23
-SDATA25
C24
-SDATA26
E22
-SDATA27
B24
-SDATA28
A25
-SDATA29
A26
-SDATA30
E26
-SDATA31
D25
-SDATA32
F23
-SDATA33
F25
-SDATA34
J26
-SDATA35
K24
-SDATA36
H24
-SDATA37
K25
-SDATA38
J25
-SDATA39
K26
-SDATA40
G24
-SDATA41
F26
-SDATA42
G25
-SDATA43
H26
-SDATA44
J24
-SDATA45
J23
-SDATA46
H23
-SDATA47
L23
-SDATA48
M22
-SDATA49
P22
-SDATA50
P23
-SDATA51
N21
-SDATA52
N24
-SDATA53
N25
-SDATA54
P24
-SDATA55
R22
-SDATA56
L26
-SDATA57
M24
-SDATA58
L24
-SDATA59
M21
-SDATA60
M25
-SDATA61
P26
-SDATA62
M26
-SDATA63
N22
-SDATA[63..0]-AIN[14..2]
-SDATA[63..0] 4
103P
C156
104P
AGND1
12
H_S
HEAT_SINK
L16
120S
L15
VCC25AVDD1
120S
-DICLK[0..3]4
A A
-DICLK[0..3]
-AICLK4
5
4
-DICLK0
L41 10N-5%-1008/BOT
-DICLK1
L43 10N-5%-1008 L44 10N-5%-1008
-DICLK2
L45 10N-5%-1008/BOT L46 10N-5%-1008/BOT
-DICLK3
-AICLK
C416 5P/BOT
C417 5P
C418 5P/BOT
C419 5P/BOT
C420 5P/BOT
3
L42 10N-5%-1008/BOT
L48 10N-5%-1008/BOTL47 10N-5%-1008/BOT
L50 10N-5%-1008/BOTL49 10N-5%-1008/BOT
-DICLK0_R
-DICLK1_R
-DICLK2_R
-DICLK3_R
-AICLK_R
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
VT8366 CPU
MS-6382
Last Revision Date:
Monday, December 03, 2001
Sheet
7 41
1
Rev
20
of
5
4
3
2
1
VCC25
D D
C C
B B
MD[63..0]13
MD[63..0]
MCKE[3..0]10,11
DCLKI6
DCLKO6
Place as close
as to VT8366
MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
MCKE0MCKE[3..0]
MCKE1
MCKE2
MCKE3
R132 10
C141
5P
C172
X_10P
AA25
AA23
AD26
AB26
AC26
AF25
AE24
AE22
AE21
AF24
AD23
AD22
AF22
AB19
AC19
AC18
AF18
AF21
AF19
AD18
AE18
AE17
AC15
AC14
AE14
AF17
AD15
AD14
AF14
AB10
AA10
AE12
AF12
AD10
AF10
AC12
AD12
AE10
AC10
W23
Y26
Y25
AF9
AF8
AF6
AE9
AD7
AC7
AD3
AC1
AB3
AB1
AD2
AD1
AA4
AA3
AA2
AA1
V3
V1
W3
V5
V4
V2
U5
U1
R1
R3
U6
U4
T5
R2
V21
V22
P9R6T1T2T6U9U18V9V10
MD0
MD1
VCCM
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63
MECC0/CKE0
MECC1/CKE1
MECC2/CKE2
MECC3/CKE3
MECC4/CKE4
MECC5/CKE5
MECC6/CKE6
MECC7/CKE7
MCLKF
MCLK
VCCM
VCCM
VCCM
T3T4V23Y3Y4
VCCM
GND
VCCM
GND
VCCM
GND
VCCM
GND
V13
VCCM
GND
Y21
V14
VCCM
VCCM
GND
GND
Y24W6AA6
V17
V18
VCCM
GND
W21
VCCM
GND
AA8
W22
VCCM
GND
AA11
VCCM
GND
W25
W26Y1Y2Y6AA7
VCCM
VCCM
VCCM
GND
GND
GND
AA13
AA16
AA21
VCCM
GND
AB23
AB25
VCCM
GND
AC2
AA9
VCCM
GND
AC5
AA12
VCCM
GND
AC8
AA14
VCCM
GND
AC11
AA15
VCCM
GND
AC13
AA17
VCCM
GND
AC16
AA20
VCCM
GND
AD20
AB9
VCCM
GND
AD21
AB12
VCCM
GND
AE5
AB17
VCCM
GND
AE8
AB20
VCCM
GND
AE11
AE26
VCCM
GND
AE13
AF1
VCCM
GND
AE16
AF2
VCCM
GND
AE23
AF7
VCCM
GND
AE25
AF13
VCCM
GND
VCCM
AVDD2 AVDD3
AF16
AF20
AF26
VCCM
VCCM
VCCM
U21
AGND2
U22
AGND2
AVCC2
AA18
AVCC3
CS6/GCKE
CS7/FENA
DQM0/CKE0
DQM1/CKE1
DQM2/CKE2
DQM3/CKE3
DQM4/CKE4
DQM5/CKE5
DQM6/CKE6
DQM7/CKE7
DQS0/CKE0
DQS1/CKE1
DQS2/CKE2
DQS3/CKE3
DQS4/CKE4
DQS5/CKE5
DQS6/CKE6
DQS7/CKE7
AGND3
AB18
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MAA14
SRASA
SCASA
SWEA
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
MAB14
SRASB
SCASB
SWEB
DQM8
DQS8
DQSFB
MVREF
MVREF
VT8366
U9B
AD11
AB13
AB15
AB16
AC17
AB21
AC20
AD24
AA22
AC24
AB8
AB4
AB6
AB24
Y23
AC6
AE3
AF5
AC9
AD13
AB14
AD16
AD17
AC21
AE20
AC23
AB22
AD25
AB7
AC4
AB5
AC25
Y22
AE6
AF4
AD6
AF3
CS0
AD4
CS1
AE2
CS2
AE1
CS3
AE4
CS4
AD5
CS5
AA5
Y5
AA24
AC22
AE19
AF15
AE7
AB2
W2
U2
AB11
AA26
AF23
AD19
AE15
AD8
AC3
W1
U3
AF11
AD9
AA19
V6
MAA[14..0]
-MSRASA 10,12
-MSCASA 10,12
-MSWEA 10,12
MAB[14..0]
-MSRASB 11,12
-MSCASB 11,12
-MSWEB 11,12
-MCS0 10,12
-MCS1 10,12
-MCS2 11,12
-MCS3 11,12
RN60D 8P4R-10
7 8
RN65D 8P4R-10
7 8
RN60C 8P4R-10
5 6
RN60B 8P4R-10
3 4
RN65A 8P4R-10
1 2
RN60A 8P4R-10
1 2
RN65C 8P4R-10
5 6
R167 10
RN65B 8P4R-10
3 4
R169 10
-MDQM0
-MDQM1
-MDQM2
-MDQM3
-MDQM4
-MDQM5
-MDQM6
-MDQM7
-MDQS0
-MDQS1
-MDQS2
-MDQS3
-MDQS4
-MDQS5
-MDQS6
-MDQS7
-MDQS8
-MDQSFB
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MAA14
-MSRASA
-MSCASA
-MSWEA
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB11
MAB12
MAB13
MAB14
-MSRASB
-MSCASB
-MSWEB
-MCS0
-MCS1
-MCS2
-MCS3
-MDQM0 13
-MDQM1 13
-MDQM2 13
-MDQM3 13
-MDQM4 13
-MDQM5 13
-MDQM6 13
-MDQM7 13
-MDQS0 13
-MDQS1 13
-MDQS2 13
-MDQS3 13
-MDQS4 13
-MDQS5 13
-MDQS6 13
-MDQS7 13
-MDQS8 13
-MDQSFB 11
MVREF_NB MVREF_NB
MAA[14..0] 10,12
MAB[14..0] 11,12
AVDD3
C422
104P/BOT
4.7u-0805
C145
103P
C407
C396
104P/BOT
120S
C144
104P
AGND2
C395
104P/BOT
L18
VCC25
VCC25AVDD2
L14
120S
L13
120S
VCC2_5
R153
1KST
R154
1KST
A A
Micro Star Restricted Secret
Title
Place resistors as close as to
NB;Length is 2.5"~3".
5
4
3
2
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
VT8366 Memory
MS-6382
Last Revision Date:
Sheet
1
Monday, December 03, 2001
8 41
Rev
20
of
5
4
3
2
1
L20
120S
AVCC4
GFRAM
AGPREF
TESTIN
PWROK
RESETX
GD0
GD1
GD2
GD3
GD4
GD5
GD6
GD7
GD8
GD9
GD10
GD11
GD12
GD13
GD14
GD15
GD16
GD17
GD18
GD19
GD20
GD21
GD22
GD23
GD24
GD25
GD26
GD27
GD28
GD29
GD30
GD31
GBE0
GBE1
GBE2
GBE3
GIRDY
GTRDY
GDSEL
GSTOP
GPIPE
GRBF
GWBF
GREQ
GGNT
SBS
SBS
GDS0
GDS0
GDS1
GDS1
SBA0
SBA1
SBA2
SBA3
SBA4
SBA5
SBA6
SBA7
GCLK
SUST
C209
104P
U9C
GAD0
H3
GAD1
H1
GAD2
H4
GAD3
H2
GAD4
F2
GAD5
G1
GAD6
F3
GAD7
F1
GAD8
D1
GAD9
F5
GAD10
E4
GAD11
C1
GAD12
C2
GAD13
C3
GAD14
C4
GAD15
B1
GAD16
A3
GAD17
A4
GAD18
D5
GAD19
C5
GAD20
C6
GAD21
B5
GAD22
C7
GAD23
A7
GAD24
A8
GAD25
D8
GAD26
C8
GAD27
B8
GAD28
A9
GAD29
F9
GAD30
B9
GAD31
C9
GC/-BE0
D3
GC/-BE1
B2
GC/-BE2
B3
GC/-BE3
B7
-GFRAME
E7
-GIRDY
F11
-GTRDY
E6
-GDEVSEL
D7
-GSTOP
E5
GPAR
G5
-PIPE
D11
-RBF
C10
-WBF
E9
-GREQ
D14
-GGNT
C13
ST0
D9
ST0
ST1
ST2
ST1
E13
ST2
D10
SBSTB
B12
-SBSTB
A12
ADSTB0
F4
-ADSTB0
E3
ADSTB1
E8
-ADSTB1
F8
SBA0
A13
SBA1
B13
SBA2
D13
SBA3
D12
SBA4
B11
SBA5
C11
SBA6
E11
SBA7
A11
VREF4X_IN
A5
AGPCOMP
J2
AGPCLK_NB
G3
-SUSST
R5
-TESTIN
W24
-PWROK_NB
P3
-PCIRST_NB
P4
VT8366
A1A2A6
VCCAGP
VCCAGP
VDDQ
A10
A14B6B10
VCCAGP
VCCAGP
VCCAGP
VCCAGP
GND
GND
GND
B4
C12D2D4D6E10F6F7
B14E1E2
VCCAGP
VCCAGP
GND
GND
3
E12
VCCAGP
VCCAGP
GND
GND
F12G6H6J9J10
VCCAGP
VCCAGP
VCCAGP
VCCAGP
GND
GND
GND
GND
F10
F13G2G4J5J6
J13
VCCAGP
VCCAGP
GND
GND
K9
VCCAGP
VCCAGP
GND
H5
VCCQQ
GNDQQ
J3
W5
GPAR/GCKRUN
AGPCOMP
AGND4
W4
VCC25
VCC2_5
VCCVL
VCCVL
GND
GND
VCCVL
VCCVL
VCCVL
VCCVL
R4
VSUS25
D D
VLAD015
VLAD115
VLAD215
VLAD315
VLAD415
VLAD515
VLAD615
VLAD715
-VBE015
VPAR15
UPSTB15
-UPSTB15
DNSTB15
-DNSTB15
UPCMD15
DNCMD15
R178 120RST
C C
VCC25
R177
8.2K
B B
VPAR
VCC25
R174
2KST
C217
X_104P
VLREF_NB
R175
1.13KRST
A A
C216
104P
VLREF_NB is 0.9V
VLAD0
VLAD1
VLAD2
VLAD3
VLAD4
VLAD5
VLAD6
VLAD7
-VBE0
VPAR
UPSTB
-UPSTB
DNSTB
-DNSTB
UPCMD
DNCMD
VLREF_NB
VCOMPP_NB
VCC25
J4
K6
L6
N5
L5
N4
N2
N3
K4
L4
K1
K2
L2
L3
K3
L1
K5
P1
J11
J12
J15
J16
L9
L18
M9
M18
R9
R18
T9
T18
V11
V12
V15
V16
L11
L12
L13
L14
L15
L16
M11
M12
M13
M14
M15
M16
N11
N12
N13
N14
N15
N16
P11
P12
P13
P14
P15
P16
R11
R12
R13
R14
R15
R16
T11
T12
T13
T14
T15
T16
VD0
VD1
VD2
VD3
VD4
VD5
VD6
VD7
VBE
VPAR
UPSTB
UPSTB
DNSTB
DNSTB
UPCMD
DNCMD
VLREF
VCOMPP
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
N1M1M2M5M6N6N9
VCCVK
GND
GND
GND
M3M4P2P5P6
5
4
VCC25
GAD0 14
GAD1 14
GAD2 14
GAD3 14
GAD4 14
GAD5 14
GAD6 14
GAD7 14
GAD8 14
GAD9 14
GAD10 14
GAD11 14
GAD12 14
GAD13 14
GAD14 14
GAD15 14
GAD16 14
GAD17 14
GAD18 14
GAD19 14
GAD20 14
GAD21 14
GAD22 14
GAD23 14
GAD24 14
GAD25 14
GAD26 14
GAD27 14
GAD28 14
GAD29 14
GAD30 14
GAD31 14
GC/-BE0 14
GC/-BE1 14
GC/-BE2 14
GC/-BE3 14
-GFRAME 14
-GIRDY 14
-GTRDY 14
-GDEVSEL 14
-GSTOP 14
GPAR 14
-PIPE 14
-RBF 14
-WBF 14
-GREQ 14
-GGNT 14
ST0 14
ST1 14
ST2 14
SBSTB 14
-SBSTB 14
ADSTB0 14
-ADSTB0 14
ADSTB1 14
-ADSTB1 14
SBA0 14
SBA1 14
SBA2 14
SBA3 14
SBA4 14
SBA5 14
SBA6 14
SBA7 14
VREF4X_IN 14
R173 60.4RST
AGPCLK_NB 6
-SUSST 16,39
R137 4.7K
-PWROK_NB 16,39
-PCIRST1 10,14,35
2
VDDQ
VCC25
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
VDDQ
C182
104P
C181
104P
C208
104P
VREF4X_IN
C408
104P/BOT
Micro Star Restricted Secret
VT8366 AGP
MS-6382
Last Revision Date:
Tuesday, December 04, 2001
Sheet
9 41
1
of
Rev
20
5
4
3
2
1
SYSTEM MEMORY
VCC2_5
VDDID
VDDQ15
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
A10_AP
CK0(DU)
CK0#(DU)
CK1(CK0)
CK1#(CK0#)
CK2(DU)
CK2#(DU)
NC(RESET#)
CKE0
CKE1
CAS#
RAS#
VSS21
184
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
A13
BA0
BA1
BA2
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC5
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
R181 10K
157
158
71
163
5
14
25
36
56
67
78
86
47
167
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
92
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
10
21
111
65
154
97
107
119
129
149
159
169
177
140
DDR1
DDRDIMM_184
-MCS0
-MCS1
-DR_MDQS0
-DR_MDQS1
-DR_MDQS2
-DR_MDQS3
-DR_MDQS4
-DR_MDQS5
-DR_MDQS6
-DR_MDQS7
-DR_MDQS8
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA13
MAA14
MAA11
MAA12
SMBCLK1
SMBDATA1
DCLK0
-DCLK0
DCLK1
-DCLK1
DCLK2
-DCLK2
-DDR_RESET
MCKE0
MCKE1
-MSCASA
-MSRASA
-DR_MDQM0
-DR_MDQM1
-DR_MDQM2
-DR_MDQM3
-DR_MDQM4
-DR_MDQM5
-DR_MDQM6
-DR_MDQM7
-DR_MDQM8
-MCS0 8,12
-MCS1 8,12
-DR_MDQS0 11,12,13
-DR_MDQS1 11,12,13
-DR_MDQS2 11,12,13
-DR_MDQS3 11,12,13
-DR_MDQS4 11,12,13
-DR_MDQS5 11,12,13
-DR_MDQS6 11,12,13
-DR_MDQS7 11,12,13
-DR_MDQS8 11,12,13
MAA[14..0]
SMBCLK1 6,11,16,35
SMBDATA1 6,11,16,35
DCLK0 6
-DCLK0 6
DCLK1 6
-DCLK1 6
DCLK2 6
-DCLK2 6
MCKE0 8
MCKE1 8
-MSCASA 8,12
-MSRASA 8,12
-DR_MDQM0 11,12,13
-DR_MDQM1 11,12,13
-DR_MDQM2 11,12,13
-DR_MDQM3 11,12,13
-DR_MDQM4 11,12,13
-DR_MDQM5 11,12,13
-DR_MDQM6 11,12,13
-DR_MDQM7 11,12,13
MAA[14..0] 8,12
R90
75RST
-DDR_RESET
R84
X_2.2K
C41
X_10P
-DDR_RESET 11-PCIRST19,14,35
D D
738467085
108
120
148
168223054627796
DR_MD[63..0]11,12,13
C C
B B
VCC2_5
R498 1K
A A
DR_MD[63..0]
VCC2_5
R183 4.7K
DDR_VREF
R499
1K
Place 104p Cap. near the DIMM
-MSWEA8,12
DDR_VREF
C438
103P
DR_MD0
DR_MD1
DR_MD2
DR_MD3
DR_MD4
DR_MD5
DR_MD6
DR_MD7
DR_MD8
DR_MD9
DR_MD10
DR_MD11
DR_MD12
DR_MD13
DR_MD14
DR_MD15
DR_MD16
DR_MD17
DR_MD18
DR_MD19
DR_MD20
DR_MD21
DR_MD22
DR_MD23
DR_MD24
DR_MD25
DR_MD26
DR_MD27
DR_MD28
DR_MD29
DR_MD30
DR_MD31
DR_MD32
DR_MD33
DR_MD34
DR_MD35
DR_MD36
DR_MD37
DR_MD38
DR_MD39
DR_MD40
DR_MD41
DR_MD42
DR_MD43
DR_MD44
DR_MD45
DR_MD46
DR_MD47
DR_MD48
DR_MD49
DR_MD50
DR_MD51
DR_MD52
DR_MD53
DR_MD54
DR_MD55
DR_MD56
DR_MD57
DR_MD58
DR_MD59
DR_MD60
DR_MD61
DR_MD62
DR_MD63
-MSWEA
C441
104P
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
178
DQ62
179
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
101
NC3
102
NC4
VDD7
SLAVE ADDRESS = 1010000B
VSS0
VSS1
VSS2
VSS3
VSS4
3111826344250586674818993
104
112
128
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
DDR DIMM
SOCKET
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
100
116
136
143
156
164
VDDQ9
VDDQ10
VDDQ11
VDDQ12
184
PIN
VSS15
VSS16
VSS17
VSS18
124
132
139
145
172
1801582
VDDQ13
VSS19
152
160
VDDQ14
VSS20
176
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
5
4
3
2
http://www.msi.com.tw
System Memory : DDR DIMM 1
MS-6382
Last Revision Date:
Monday, December 03, 2001
Sheet
1
10 41
Rev
20
of
5
SYSTEM MEMORY
4
3
2
1
D D
VCC2_5
DR_MD[63..0]
R182 4.7K
DR_MD0
DR_MD1
DR_MD2
DR_MD3
DR_MD4
DR_MD5
DR_MD6
DR_MD7
DR_MD8
DR_MD9
DR_MD10
DR_MD11
DR_MD12
DR_MD13
DR_MD14
DR_MD15
DR_MD16
DR_MD17
DR_MD18
DR_MD19
DR_MD20
DR_MD21
DR_MD22
DR_MD23
DR_MD24
DR_MD25
DR_MD26
DR_MD27
DR_MD28
DR_MD29
DR_MD30
DR_MD31
DR_MD32
DR_MD33
DR_MD34
DR_MD35
DR_MD36
DR_MD37
DR_MD38
DR_MD39
DR_MD40
DR_MD41
DR_MD42
DR_MD43
DR_MD44
DR_MD45
DR_MD46
DR_MD47
DR_MD48
DR_MD49
DR_MD50
DR_MD51
DR_MD52
DR_MD53
DR_MD54
DR_MD55
DR_MD56
DR_MD57
DR_MD58
DR_MD59
DR_MD60
DR_MD61
DR_MD62
DR_MD63
-MSWEB8,12
-MSWEB
DDR_VREF
C17
104P
2
DQ0
4
DQ1
6
DQ2
8
DQ3
94
DQ4
95
DQ5
98
DQ6
99
DQ7
12
DQ8
13
DQ9
19
DQ10
20
DQ11
105
DQ12
106
DQ13
109
DQ14
110
DQ15
23
DQ16
24
DQ17
28
DQ18
31
DQ19
114
DQ20
117
DQ21
121
DQ22
123
DQ23
33
DQ24
35
DQ25
39
DQ26
40
DQ27
126
DQ28
127
DQ29
131
DQ30
133
DQ31
53
DQ32
55
DQ33
57
DQ34
60
DQ35
146
DQ36
147
DQ37
150
DQ38
151
DQ39
61
DQ40
64
DQ41
68
DQ42
69
DQ43
153
DQ44
155
DQ45
161
DQ46
162
DQ47
72
DQ48
73
DQ49
79
DQ50
80
DQ51
165
DQ52
166
DQ53
170
DQ54
171
DQ55
83
DQ56
84
DQ57
87
DQ58
88
DQ59
174
DQ60
175
DQ61
178
DQ62
179
DQ63
90
WP(NC)
63
WE#
1
VREF
9
NC2
101
NC3
102
NC4
DR_MD[63..0]10,12,13
C C
B B
A A
Place 104p Cap. near the DIMM
5
4
VCC2_5
738467085
108
120
148
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
168223054627796
VDD6
VDD7
VDD8
VDDQ0
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
104
VDDQ6
112
VDDQ7
128
VDDQ8
136
VDDQ9
143
156
VDDQ10
184
DDR DIMM
SOCKET
SLAVE ADDRESS = 1010001B
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
3111826344250586674818993
100
116
124
132
139
164
172
1801582
VDDQ11
VDDQ12
VDDQ13
PIN
VSS17
VSS18
VSS19
145
152
160
3
VDDQ14
VDDQ15
CK1#(CK0#)
NC(RESET#)
VSS20
VSS21
176
VDDID
CS0#
CS1#
CS2#
CS3#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS8
FETEN
A10_AP
CK0(DU)
CK0#(DU)
CK1(CK0)
CK2(DU)
CK2#(DU)
CKE0
CKE1
CAS#
RAS#
184
VDDSPD
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
A13
BA0
BA1
BA2
SCL
SDA
SA0
SA1
SA2
CB0
CB1
CB2
CB3
CB4
CB5
CB6
CB7
NC5
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DM8
R180 10K
157
158
71
163
5
14
25
36
56
67
78
86
47
167
48
43
41
130
37
32
125
29
122
27
141
118
115
103
59
52
113
92
91
181
182
183
44
45
49
51
134
135
142
144
16
17
137
138
76
75
173
10
21
111
65
154
97
107
119
129
149
159
169
177
140
DDR2
DDRDIMM_184
-MCS2
-MCS3
-DR_MDQS0
-DR_MDQS1
-DR_MDQS2
-DR_MDQS3
-DR_MDQS4
-DR_MDQS5
-DR_MDQS6
-DR_MDQS7
-DR_MDQS8
MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8
MAB9
MAB10
MAB13
MAB14
MAB11
MAB12
SMBCLK1
SMBDATA1
VCC2_5
DCLK3
-DCLK3
DCLK4
-DCLK4
DCLK5
-DCLK5
-DDR_RESET
MCKE2
MCKE3
-MSCASB
-MSRASB
-DR_MDQM0
-DR_MDQM1
-DR_MDQM2
-DR_MDQM3
-DR_MDQM4
-DR_MDQM5
-DR_MDQM6
-DR_MDQM7
-DR_MDQM8
-MCS2 8,12
-MCS3 8,12
-DR_MDQS0 10,12,13
-DR_MDQS1 10,12,13
-DR_MDQS2 10,12,13
-DR_MDQS3 10,12,13
-DR_MDQS4 10,12,13
-DR_MDQS5 10,12,13
-DR_MDQS6 10,12,13
-DR_MDQS7 10,12,13
-DR_MDQS8 10,12,13
MAB[14..0]
SMBCLK1 6,10,16,35
SMBDATA1 6,10,16,35
DCLK3 6
-DCLK3 6
DCLK4 6
-DCLK4 6
DCLK5 6
-DCLK5 6
-DDR_RESET 10
MCKE2 8
MCKE3 8
-MSCASB 8,12
-MSRASB 8,12
-DR_MDQM0 10,12,13
-DR_MDQM1 10,12,13
-DR_MDQM2 10,12,13
-DR_MDQM3 10,12,13
-DR_MDQM4 10,12,13
-DR_MDQM5 10,12,13
-DR_MDQM6 10,12,13
-DR_MDQM7 10,12,13
2
DDR DATA STROBE FEEDBACK FROM DDR DIMM2.
-DR_MDQS4 -MDQSFB
MAB[14..0] 8,12
R165 X_22
C185
X_10P
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
http://www.msi.com.tw
System Memory : DDR DIMM 2
-MDQSFB 8
MS-6382
Last Revision Date:
Monday, December 03, 2001
Sheet
1
11 41
of
Rev
20
5
4
3
2
1
DDR Terminations
VTT_DDR
VTT_DDR
DR_MD1
D D
C C
B B
DR_MD5
DR_MD4
DR_MD0
DR_MD2
DR_MD6
-DR_MDQM0
-DR_MDQS0
DR_MD13
DR_MD8
DR_MD3
DR_MD7
-DR_MDQM1
-DR_MDQS1
DR_MD9
DR_MD12
DR_MD15
DR_MD10
DR_MD14
DR_MD16
DR_MD20
DR_MD11
-DR_MDQS2
DR_MD21
MAB14
DR_MD17
DR_MD28
MAB6
DR_MD24
MAA5
MAB4
-DR_MDQS3
DR_MD25
DR_MD29
MAA3
MAB3
-DR_MDQM3
MAA4
RN13
7 8
5 6
3 4
1 2
8P4R-33
RN15
7 8
5 6
3 4
1 2
8P4R-33
RN18
7 8
5 6
3 4
1 2
8P4R-33
RN22
7 8
5 6
3 4
1 2
8P4R-33
RN24
7 8
5 6
3 4
1 2
8P4R-33
RN26
7 8
5 6
3 4
1 2
8P4R-33
RN29
7 8
5 6
3 4
1 2
8P4R-33
RN38
7 8
5 6
3 4
1 2
8P4R-33
RN41
7 8
5 6
3 4
1 2
8P4R-33
RN42
7 8
5 6
3 4
1 2
8P4R-33
DR_MD33
7 8
DR_MD37
5 6
DR_MD36
3 4
DR_MD32
1 2
DR_MD38
7 8
-DR_MDQM4
5 6
DR_MD34
3 4
-DR_MDQS4
1 2
DR_MD44
7 8
DR_MD40
5 6
DR_MD35
3 4
DR_MD39
1 2
DR_MD41
7 8
-MSWEB
DR_MD45
-MSRASB
DR_MD47
DR_MD46
DR_MD43
DR_MD42
DR_MD53
DR_MD52
DR_MD49
DR_MD48
DR_MD50
DR_MD54
-DR_MDQS6
-DR_MDQM6
DR_MD57
DR_MD60
DR_MD51
DR_MD55
DR_MD59
DR_MD63
DR_MD58
DR_MD62
-DR_MDQS7
-DR_MDQM7
DR_MD56
DR_MD61
MAA10
MAB10
MAB12
MAA12
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
7 8
5 6
3 4
1 2
-MSWEB8,11
-MSRASB8,11
RN54
8P4R-33
RN56
8P4R-33
RN58
8P4R-33
RN61
8P4R-33
RN67
8P4R-33
RN69
8P4R-33
RN72
8P4R-33
RN74
8P4R-33
RN78
8P4R-33
RN76
8P4R-33
RN52
8P4R-33
VTT_DDR
MAA7
MAB9
DR_MD18
-DR_MDQM2
MAA9
MAA13
MAB13
MAA14
MAA1
MAB1
MAB2
MAA2
DR_MD31
DR_MD30
DR_MD27
DR_MD26
MAA6
MAB5
DR_MD19
DR_MD23
MAB8
MAA8
MAB7
DR_MD22
MAB0
MAA0
-DR_MDQS8
-MCS1
-MCS18,10
-MSCASA
-MSCASA8,10
-MCS0
-MCS08,10
-MSCASB
-MSCASB8,11
-MSWEA
-MSWEA8,10
-MSRASA
-MSRASA8,10
MAA11
MAB11
-DR_MDQS5
-MCS3
-MCS38,11
-DR_MDQM5
-MCS2
-MCS28,11
RN32
7 8
5 6
3 4
1 2
8P4R-33
RN30
7 8
5 6
3 4
1 2
8P4R-33
RN48
7 8
5 6
3 4
1 2
8P4R-33
RN46
7 8
5 6
3 4
1 2
8P4R-33
RN37
7 8
5 6
3 4
1 2
8P4R-33
RN34
7 8
5 6
3 4
1 2
8P4R-33
RN49
7 8
5 6
3 4
1 2
8P4R-33
RN64
7 8
5 6
3 4
1 2
8P4R-33
RN57
7 8
5 6
3 4
1 2
8P4R-33
RN63
7 8
5 6
3 4
1 2
8P4R-33
-DR_MDQS[8..0]10,11,13
-DR_MDQM[7..0]10,11,13
DR_MD[63..0]10,11,13
MAB[14..0]8,11
MAA[14..0]8,10
-DR_MDQS[8..0]
-DR_MDQM[7..0]
DR_MD[63..0]
MAB[14..0]
MAA[14..0]
VTT_DDRVTT_DDR
C211
C76
C63
104P
C183
104P
C95
104P
C191
104P
104P
C192
104P
C150
104P
C199
104P
C210
104P
C205
104P
C162
C114
104P
C215
104P
4
104P
C222
104P
C176
104P
C68
104P
A A
VTT_DDR VTT_DDR
C170
104P
5
C83
C84
104P
C189
104P
Place these decoupling capacitors close to VTT_DDR termination resistors.
One decoupling capacitor for each R-pack.
104P
C36
104P
104P
C33
104P
3
C42
104P
C28
104P
C75
104P
C187
104P
C196
104P
C193
104P
C201
104P
C206
104P
C96
104P
C214
104P
Micro Star Restricted Secret
Title
Document Number
MICRO-STAR INT'L
CO.,LTD.
No. 69, Li-De St, Jung-He City,
Taipei Hsien, Taiwan
2
http://www.msi.com.tw
DDR Terminations Bank 0
MS-6382
Last Revision Date:
Monday, December 03, 2001
Sheet
1
12 41
Rev
20
of
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