Page 1
5
MS-56111-0B
SHEET01:
SHEET02:
SHEET03:
D D
SHEET04:
SHEET05:
SHEET06:
SHEET07:
SHEET08:
SHEET09:
SHEET10:
SHEET11:
SHEET12:
SHEET13:
REVISION HISTORY:
C C
REV 0A : 12/8/2006 release
REV 0A-0302 : 3/2/2007 release
B B
REV 0A-0305 : 3/5/2007 release
REV 0A-0307 : 3/7/2007 release
REV 0A-0313 : 3/13/2007 release
A A
INDEX (This page)
BLOCK DIAGRAM
AP10_1 PROCESSOR
AP10_2 WiFi & Video & GPIO
AP10_3 POWER
AP10_4 AUDIO
FM tuner
Memory (SDRAM/Harp/EEPROM)
LCD and switch
Docking
AS3517
Micro-SD and JTAG
BOOTSTRAP
Page-3 BMM3_CMD / MM3_CMD change pin
Add SM3_CS2#, SM3_CS3#
Page-4 WLAN_AFE termination, 9.6MHz Osc. R28-33R,
C11-0.1uF
Page-5 R43 connect to VCC_3V3
Page-6 U1.E18~E20, B20~B21 floating
VDL,VDR connect to VCC_3V0
Add R69~R71
D1,D2,L13 connect to AGND_HP
R58,R59 change to 15 Ohm
Page-7 Add U20 and Y4 to provide 32k to FM chip
Page-8 Delete U6 NAND and add these signal to Harp CN
Page-9 Delete U19 chip antenna
Page-10 Add R203~R206 and Q9 to LED control
Page-12 Modify LDO5 for BT power, HC_LDO not used
Use Vsys on PMU_ONKEY power source
Page-14 Bootstrap resistor modified
Page-3 Add U3 for 32k level shift
MM3 bus re-connect to test point
Page-8 Harp interface re-connect to bus switch
Page-13 Add U8 and U9 for HSM3 bus switch
Page-13 Remove bus switch and add resistor to select
harp or u-SD
JTAG modify to 8-pin
Page-3 Add ADP_5V_SENSE to GPIO
Add to DOCK_3V_EN GPIO
Add BMM3 port to micro-SD
Add I2S bus
Page-7 Delete R75, R76
Page-11 Add R188 and R189 to provide VDD_5V sense
to CPU
Add 3.3V LDO out to docking pin-19
Page-12 Add Q4 and Q5 to control backlight power
Add D15 to limit backlight power under 15V
Change L14 to 22uH
Add U6 LDO for docking 3.3V output
Add sub-battery for backup power
Add Q7 and D19 for VDD_5V / USB5V power switch
Add I2S bus
Add TP1 and TP2 for HPOUT
Remove R185 for reset double pull high
Page-13 BMM3 bus connect to micro-SD
5
4
REV 0A-0314 : 3/14/2007 release
REV 0A-0316 : 3/16/2007 release
REV 0A-0319 : 3/19/2007 release
REV 0A-0320 : 3/20/2007 release
REV 0A-0321 : 3/21/2007 release
Page-3 Delete TP7, TP61 and R10
Page-6 Delete de-pop circuit, add D6 change C107 to 10uF/0805
REV 0A-0323 : 3/23/2007 release
Page-3 Add RTCK from PM3_PWM0 to JTAG
Page-12 Add USB IF circuit
Add R19, R20, R192
REV 0A-0326 : 3/26/2007 release
Page-9 Delete J8
Page-13 Add R185
REV 0A-0327 : 3/27/2007 release
Page-8 SDRAM Resistor pack pin / signal swap
REV 0A-0328 : 3/28/2007 release
Page-3 R6 not stuff, R12 33R->0R
Change RTCK to FM_RESET#
Page-4 R25 1.15K-->205K
Page-6 U1.D19 connect to U1.E18
Add C139 for EMI, add C117
Page-7 R78 change to 200R
Page-8 R84, R87 pull high to VCC_HARP
Page-9 Add C140 for EMI
Page-11 Add R140 and J5.9 / J5.10 connect to VDD_5V
Page-13 Change R185 to connect J6.5 and J6.8
Page-14 Delete R307~R309, add R332
REV 0A-0329 : 3/29/2007 release
Page-4 R25 205K-->2.05K
Page-11 Fix J5.7 short to DGND
Page-12 Delete R96~R98, Q4, Q5
REV 0A-0330 : 3/30/2007 release
Page-9 Add con5 for 50 Ohm impedance control measurement
REV 0B-0517 : 5/17/2007 release
Page-3 Delete NAND and UART interface
Delete some GPIO for power control (BT,DOCKING)
Page-8 Delete SDRAM bus resistor pack
Modify HARP connector to 20-pin
Page-9 Modify LCD J4 connector to B-B and pin-assignment
Modify SW1 Power/hold switch and SW12 menu key
J7 pin-assignment swap
Page-10 Add R141 and R142 pull high for
docking signal
Page-11 Delete 1 LDO instead of PVDD1 for docking 3.3V
Delete sub-battery
Page-3 Add CLK_SUS_OUT for WLAN_PLL
Page-4 Delete 9.6MHz osc. and use CLK_SUS_OUT
Page-13 Use HSM3_MUX port for Micro-SD
Page-3 Change C230 to 1uF/0603
Page-9 Add U8 chip antenna and R75 for BT power
Page-12 Change reset to Powergood pin
Add D30, change sub-batt out to RTC only
Change VCC_2V7 to VCC_VB3_TBD
Page-4 Delete TP15~TP18,TP21 and TP22
Page-5 Floating U1.E11, E13, B3
Page-9 Add R75 to reserve VCC_3V3_FIX to BT
Page-5 Floating U1.E11, E13, B3
Page-12 Add D5 for main batt to RTC power in
Add R76 for VCC_3V3_FIX
Add R15, R16 for CVDD3 1.2V 3.3V select
Delete VREF and AGND's cap.
Page-3 Delete R4 and R7
Page-6 Add FM_ANT to HP_JACK_GND
Page-9 Change R75 to VCC_3V3 power rail
Page-12 Add TP1 to VPRG1
3
2
REV 0B-0606 : 6/6/2007 release
Page-6 Update J2 librbry and footprint
Delete some resistorsport and TP.
Page-8 Adjust J11 pin direction for Harp6 new define
Add R,C filter for Harp clock
Page-9 Modify J4 pin direction for LCM B-B CN
Page-11 Modify U19 to SC70 package
Update J12 footprint to JAM part
REV 0B-0607-C : 6/7/2007 release
Page-3 Add C193, C194 for LCD_PCLK and WLAN
CLK for EMI issue.
Page-9 Update J7 footprint from 25 to 23 pins
REV 0B-0608-A : 6/8/2007 release
Page-3 Change MM3_CD#, DOCK_I2C_OE and
VIDEO_SENSE to AT3_HD5~7.
Change jog-wheel key to LCD_DB18~23
Page-4 LED1~4 change to GP3_PR4~7
Change PMU_ONKEY and hold to GP3_PT0~1
Delete R180,R61,R49,C235,C239,C236
No stuff C88, C240, C95
Page-6 Connect MICDET to AGND_A
Add TP57 for MHPCOM
Page-9 Jt footprint modify
REV 0B-0612-B : 6/12/2007 release
Page-3 Change FM_RESET# to U1.W9
Page-5 Remove C24, 27, 29, 34, 40, 26, 44, 37,
38
Page-8 Modify Harp B-B connector pin-definition
REV 0B-0613-A : 6/13/2007 release
Page-5 Remove R39, R40, C35, C41
Page-8 Modify Harp B-B connector pin-22 to floating
Page-11 Add R4 33 Ohm to Reset#
REV 0B-0614-B : 6/14/2007 release
Page-3 Add 3-wire bus to I2S GPIO-N
Add R333/R334 to GPIO-G for Mode configuration
Page-4 Add C249 for EMI
Page-5 Change C49 to VCC_3V3
Page-6 Add C250, C251 for EMI
Add R70 for AGND_A to DGND
Page-7 Change FM I2C to 3-wire interface
Page-8 Update harp pin-assignment
Add C161, C162 for EMI
Page-10 Add PAD1~PAD5 for EMI
Page-11 Add C235,236,239,241,242,252,253,254 for EMI
Add R192, R195 connect DGND and PGND
1
REV 0B-0615-A : 6/15/2007 release
Page-3 Change FM_RESET# to U1.W9
Page-5 Remove L3, L5, C18, C28, C30
Change C47, C52 to 0.01uF
Page-12 R161 change to VCC_3V3 and value change
to 100k
REV 0B-0615-A : 6/15/2007 release
Page-2 Add Mictor Connector releated signals.
Page-14 Add Mictor Connector releated signals page.
Page-13 R292, R315 pull down, Delete SW10, R311 use 0 ohm
REV 0B-0530 : 5/30/2007 release
Page-3 Add LED1~4 and LCD BL control to KSO
port. Add LED5-6-7 / LED8-9-10 to KSI port
Page-8 Modify HARP connector to 40-pin
Page-9 Modify SW1 and SW11 circuit
Page-11 Add Q4, Q5 to control LCD BL
4
3
2
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc> 0B
C
<Doc> 0B
C
<Doc> 0B
C
Date: Sheet
Date: Sheet
Date: Sheet
INDEX
INDEX
INDEX
1
[email protected]
886-2-232345599 ext 8481
886-2-232345599 ext 8481
886-2-232345599 ext 8481
Drawn by Phil Chen
Drawn by Phil Chen
Drawn by Phil Chen
MS-5611
MS-5611
MS-5611
of
of
of
114Tuesday, July 17, 2007
114Tuesday, July 17, 2007
114Tuesday, July 17, 2007
Page 2
5
4
3
2
1
GoForce6100 SYSTEM BLOCK DIAGRAM
DEBUG
D D
12MHz
CRYSTAL
XTAL
PORT
RESET DBG
Micro-SD
CONNECTOR
HSM3_MUX
HARP
HSM3
DOCKING
CONNECTOR
USB2.0
Video Out
LINE-IN
ANT.
5V
C C
Line-OUT
HEADPHONE
DP,DM,VBUS
VIDEO OUT
LINE-IN
LINE-OUT
MHPOUT R/L
GoForce6100
LCD_DB[0..23]
GPIOs
GP3_PT
QVGA+ 2.4"
TFT LCD
Menu BUTTON
and
PWR/Slide
switch
PWR / Slide
switch
DIFFERENTIAL
MIC
MMICBIAS2
MMICIN2
MMICIN3_0
SDRAM
I2C
3-wire
I2C
VBUS
PWGD
B B
AS3517
DC/DC
POWER SUPPLY,
&
LI-ION BATTERY
CHARGER
1.2V
1.8V
3.0V
3.0V
3.0V
3.0V
3.3V
AP10 CORE,PLLs
AP10,SDRAM
64Kb
EEPROM
Audio AMP
LCD
FM
AP10 audio codec
I/O, AP10, Peripherals, BT
CLK_32K_IN
Si4702
FM
module
74AVC1T45
32k clock
WLAN_AFE_PLL
TFT BL
CLK_SUS_OUT
Power rail
VCC_1V2
VCC_1V8
VCC_3V3
VCC_LDO3
VCC_3V0
VCC_3V0LCD
VCC_3V3_FIX
BVDD
USB_VBUS
VDD_5V
LED+/-
Jog-wheel with
5 buttons
10-LED
1.8V
MOBILE
SDRAM
16MBX32
GND plane
PGND
DGND
AGND_A
AGND_HP
AGND_V
A A
32.768 KHz
CRYSTAL
5
Battery
[email protected]
886-2-232345599 ext 8481
886-2-232345599 ext 8481
886-2-232345599 ext 8481
Drawn by Phil Chen
Drawn by Phil Chen
Drawn by Phil Chen
MS-5611
MS-5611
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet
Date: Sheet
4
3
2
Date: Sheet
Block diagram
Block diagram
Block diagram
PAGE02 : BLOCK DIAGRAM
PAGE02 : BLOCK DIAGRAM
PAGE02 : BLOCK DIAGRAM
1
MS-5611
214Tuesday, July 17, 2007
214Tuesday, July 17, 2007
214Tuesday, July 17, 2007
0B
0B
0B
of
of
of
Page 3
5
U1-1
AA15
AB16
AA16
AA18
AA17
AC17
AC16
AB18
AC19
AA19
AB19
AC18
AB17
AA20
AA7
AA8
AC7
AC8
AA9
Y16
Y17
W19
W16
Y18
U19
R20
Y19
Y20
V19
T20
V20
U20
W20
T19
W6
Y6
W7
Y8
G4
K3
L2
E4
F4
L4
M1
H4
M4
N1
N3
N4
N2
P4
P2
P1
P3
R3
U3
R1
R4
T5
T1
T4
R2
U5
U1
V5
U4
T3
V4
W4
E3
F1
D3
E2
G2
D4
H2
G1
G3
H3
H1
J4
J3
E5
J1
F2
E6
K1
E7
D6
L3
K2
E1
D1
F3
J2
M3
K4
M2
L1
D2
C3
B1
U1-1
AP10
AP10
DTV3_XCLK
DTV3_PD0
DTV3_PD1
DTV3_PD2
DTV3_PD3
DTV3_PD4
DTV3_PD5
DTV3_PD6
DTV3_PD7
LCD3_AA0
LCD3_CS2
LCD3_RD
LCD3_RST
LCD3_RW
LCD3_DB0
LCD3_DB1
LCD3_DB2
LCD3_DB3
LCD3_DB4
LCD3_DB5
LCD3_DB6
LCD3_DB7
LCD3_DB8
LCD3_DB9
LCD3_DB10
LCD3_DB11
LCD3_DB12
LCD3_DB13
LCD3_DB14
LCD3_DB15
LCD3_DB16
LCD3_DB17
LCD3_DB18
LCD3_DB19
LCD3_DB20
LCD3_DB21
LCD3_DB22
LCD3_DB23
XM2_MD00
XM2_MD01
XM2_MD02
XM2_MD03
XM2_MD04
XM2_MD05
XM2_MD06
XM2_MD07
XM2_MD08
XM2_MD09
XM2_MD10
XM2_MD11
XM2_MD12
XM2_MD13
XM2_MD14
XM2_MD15
XM2_MD16
XM2_MD17
XM2_MD18
XM2_MD19
XM2_MD20
XM2_MD21
XM2_MD22
XM2_MD23
XM2_MD24
XM2_MD25
XM2_MD26
XM2_MD27
XM2_MD28
XM2_MD29
XM2_MD30
XM2_MD31
XM2_MA00
XM2_MA01
XM2_MA02
XM2_MA03
XM2_MA04
XM2_MA05
XM2_MA06
XM2_MA07
XM2_MA08
XM2_MA09
XM2_MA10
XM2_MA11
XM2_MA12
XM2_MA13
XM2_MA14
XM2_MA15
XM2_MA16
XM2_MA17
XM2_MA18
XM2_MA19
XM2_MA20
XM2_CKE
XM2_CS_A
XM2_CS_B
XM2_CS_C
XM2_CS_D
XM2_DQM_H
XM2_DQM_L
XM2_LDQS
XM2_UDQS
XM2_MIO_RDY
XM2_RE
XM2_WE
HSM3_MUX_CLK12
HSM3_MUX_D[0..3]12
Mux HSMMC
LCD3_XRESET9
D D
LCD3_DE9
LCD3_HSYNC9
LCD3_PCLK9
LCD3_VSYNC9
LCD3_DB[0..17]9
TFT LCD 18-BIT RGB I/F
XM2_MD[0..31]8,14
SDRAM DATA BUS
C C
XM2_MA[0..20]13
SDRAM ADDRESS BUS
B B
XM2_MIO.RDY14
SDRAM CONTROL
VCC_1V8
1 2
LCD3_DB[0..17]
XM2_MD[0..31]
XM2_MA[0..20]
R14
R14
10K
10K
12
C193
C193
X_10pF
X_10pF
UP9
DOWN9
MENU9
FORWARD9
ENTER9
REVERSE9
12
10pF
10pF
SDR_CKE8,14
XM2_CS.A#14
XM2_CS.B#14
XM2_CS_C#8,14
XM2_CS.D#14
XM2_DQM18
XM2_DQM08
XM2_DQM38
XM2_DQM28,14
1 2
C189
C189
HSM3_MUX_CLK
HSM3_MUX_D0
HSM3_MUX_D1
HSM3_MUX_D2
HSM3_MUX_D3
R133 R133
R29110R291
1 2
10
LCD3_XRESET
LCD3_DE
LCD3_HSYNC
LCD3_PCLKR
LCD3_VSYNC
LCD3_DB0
LCD3_DB1
LCD3_DB2
LCD3_DB3
LCD3_DB4
LCD3_DB5
LCD3_DB6
LCD3_DB7
LCD3_DB8
LCD3_DB9
LCD3_DB10
LCD3_DB11
LCD3_DB12
LCD3_DB13
LCD3_DB14
LCD3_DB15
LCD3_DB16
LCD3_DB17
UP
DOWN
MENU
FORWARD
ENTER
REVERSE
XM2_MD0
XM2_MD1
XM2_MD2
XM2_MD3
XM2_MD4
XM2_MD5
XM2_MD6
XM2_MD7
XM2_MD8
XM2_MD9
XM2_MD10
XM2_MD11
XM2_MD12
XM2_MD13
XM2_MD14
XM2_MD15
XM2_MD16
XM2_MD17
XM2_MD18
XM2_MD19
XM2_MD20
XM2_MD21
XM2_MD22
XM2_MD23
XM2_MD24
XM2_MD25
XM2_MD26
XM2_MD27
XM2_MD28
XM2_MD29
XM2_MD30
XM2_MD31
XM2_MA0
XM2_MA1
XM2_MA2
XM2_MA3
XM2_MA4
XM2_MA5
XM2_MA6
XM2_MA7
XM2_MA8
XM2_MA9
XM2_MA10
XM2_MA11
XM2_MA12
XM2_MA13
XM2_MA14
XM2_MA15
XM2_MA16
XM2_MA17
XM2_MA18
XM2_MA19
XM2_MA20
XM2_CKE
XM2_CS.A#
XM2_CS.B#
XM2_CS_C#
XM2_CS.D#
XM2_DQM1
XM2_DQM0
XM2_MIO_RDY
XM2_DQM3
XM2_DQM2
LCD INTERFACE
LCD INTERFACE
4
K19
CNF3_TST
DBG3_TRST
JTAG &
CONFIG
JTAG &
CONFIG
GPIOI2CI2SUSB
GPIOI2CI2SUSB
XTAL_12M_OUT
CLK3_SYS_OUT
CLK3_SYS_OUT_N
CLK3_SUS_OUT
CLOCKS
CLOCKS
CLK3_DEV_OUT
AT3_HDMARQ
AT3_HDMACK
AT3_S_HDMACK
AT3_S_HDMARQ
ATAPI/EDID INTERFACE
ATAPI/EDID INTERFACE
PWMUART D LCD
PWMUART D LCD
DBG3_TMS
DBG3_TDO
DBG3_TDI
DBG3_TCK
BM3_KSO_7
BM3_KSO_6
BM3_KSO_5
BM3_KSO_4
BM3_KSO_3
BM3_KSO_2
BM3_KSO_1
BM3_KSO_0
BM3_KSI_7
BM3_KSI_6
BM3_KSI_5
BM3_KSI_4
BM3_KSI_3
BM3_KSI_2
BM3_KSI_1
BM3_KSI_0
RM3_SDA
RM3_SCL
I2S_SCLK
I2S_DOUT
I2S_DIN
I2S_LRCK
SPDIF_IN
SPDIF_OUT
USB_BP
USB_BN
XTAL_12M_IN
CLK_32K_IN
AT3_HD15
AT3_HD14
AT3_HD13
AT3_HD12
AT3_HD11
AT3_HD10
AT3_HD09
AT3_HD08
AT3_HD07
AT3_HD06
AT3_HD05
AT3_HD04
AT3_HD03
AT3_HD02
AT3_HD01
AT3_HD00
AT3_HA2
AT3_HA1
AT3_HA0
AT3_HIOW
AT3_HIOR
AT3_HIORDY
AT3_HRESET
AT3_HIRQ0
AT3_HIRQ1
AT3_HCS0
AT3_HCS1
AT3_S_HIOR
AT3_S_HIOW
D_LCD3_RST
D_LCD3_RW
D_LCD3_RD
D_LCD3_DB7
D_LCD3_DB6
D_LCD3_DB5
D_LCD3_DB4
D_LCD3_DB3
D_LCD3_DB2
D_LCD3_DB1
D_LCD3_DB0
D_LCD3_AA0
D_LCD3_CS2
PM3_PWM1
PM3_PWM0
IR3_TXD
IR3_RXD
UA3_TXD
UA3_RXD
DTV
DTV
SDRAM, SRAM, FLASH ROM
MEMORY INTERFACE
SDRAM, SRAM, FLASH ROM
MEMORY INTERFACE
PP6110A-TFBGA441
PP6110A-TFBGA441
VBUS
REXT
RESET
DBG3_TRST
H22
DBG3_TMS
K21
DBG3_TDO
L20
DBG3_TDI
P21
DBG3_TCK
L22
Y9
W9
HSM3_MUX_CMD
Y7
Y22
AB21
Y21
W21
AC20
USB_VBUS_SENSE
U23
R22
T22
N21
J19
PMU_IRQ
T21
U22
V21
I2C_DATA
H20
I2C_CLK
J20
K23
J21
L23
J23
J22
K22
USB_BP
AA23
USB_BN
AB23
AA22
USB_RREF GND_USB_IO
W23
XTAL_12M_IN
P23
XTAL_12M_OUT
P22
CLK_32K_IN
C1
CLK_SYS_OUT
L5
M5
AC9
M19
AB6
AC5
AB5
AC2
AB2
AC1
AA3
AB1
AB3
W1
AA4
V3
AA2
AA1
W2
Y1
T2
Y5
Y2
AC6
Y4
W3
AB4
V2
AC3
Y3
AC4
V1
U2
AC21
AC22
AB20
AC23
Y11
AB10
AC12
Y13
AC10
AA11
AA10
Y12
Y10
AB9
AB11
AA12
AC11
W17
W12
V22
R21
N19
P20
M23
CLK_DEV.OUT_M 14
HSM3_D3
HSM3_D2
HSM3_D1
HSM3_D0
VIDEO_SENSE
DOCK_I2C_OE
MM3_CD#
R333
R333
1 2
R334
R334
1 2
RESET#
3
DBG3_TRST 12
DBG3_TMS 12
DBG3_TDO 12
DBG3_TDI 12
DBG3_TCK 12
FM_RESET# 7
HSM3_MUX_CMD 12
R9 33R9 33
R120R12
1 2
LCD3_XCS 9
LCD3_SCL 9
LCD3_SDOUT 9
LCD3_SDI 9
X_100K, 5%
X_100K, 5%
X_100K, 5%
X_100K, 5%
BL_ON 11
USB_VBUS_SENSE 10
VBUS_ON 11
PHASE_1 9
PHASE_2 9
ADP_5V_SENSE 10
PMU_IRQ# 11
LED5-6-7 9
LED8-9-10 9
3WIRE_CLK 7
3WIRE_DATA 7
TP74TP74
1 2
0
12
C194
C194
X_10pF
X_10pF
LCD SPI I/F
VIDEO_SENSE 10
DOCK_I2C_OE 10
MM3_CD# 12
R2
10KR210K
R8
1 2
6.04K, 1%R86.04K, 1%
CLK_SUS_OUT 4
1 2
VCC_3V3
3
4
Reserved for Sandisk different mode setting
HSM3_CLK
HSM3_CMD
12
C230
C230
X_1U/16V/0603
X_1U/16V/0603
SD_PWR_OFF# 12
HARP_PWR_OFF# 8
DOCKING_IRQ 10
DOCKING_DETECT 10
RESET# 11,12,14
PDN 9
I2C_WP 8
FM3_SEN# 7
HSM3_CLK 8
HSM3_CMD 8
JTAG
Primary SDIO1 I/F(MM3)
R3
10KR310K
1 2
I2C_DATA 8,10,11
I2C_CLK 8,10,11
T1
2
1
90 OHMST190 OHMS
C190
C190
1 2
X_10pF
X_10pF
GND_USB_IO 5
SDR_CLK 8,14
HSM3_D[0..3]
For the Harp
HSMMC control
FM
2
USB_DP 10
USB_DN 10
XTAL_12M_IN
XTAL_12M_OUT
HSM3_D[0..3] 8
HSMMC data
CLK_32K_IN
R5
VCCB
12
10MR510M
Y1
1
4
DIR
B
12.00MHZY112.00MHZ
A2
B2
C2
2
3
33PFC233PF
R1033R10
33
1 2
12
C1
33PFC133PF
VCC_1V8 VCC_3V3
U3
U3
A1
VCCA
B1
GND
C1
A
SN74AVC1T45YZP
SN74AVC1T45YZP
VCC_3V3
VCC_3V3 4,5,8,9,10,11,12,14
VCC_1V8
VCC_1V8 5,8,11,13
DGND 4,5,6,8,9,10,11,12,13,14
12
C2
1
XTAL_GND 5
CLK_32K 7,11
A A
PRELIMINARY SCHEMATICS ONLY - NOT TESTED AND NOT
QUALIFIED FOR MANUFACTURING
[email protected]
886-2-232345599 ext 8481
886-2-232345599 ext 8481
886-2-232345599 ext 8481
Drawn by Phil Chen
Drawn by Phil Chen
Drawn by Phil Chen
MS-5611
MS-5611
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
AP10_1: PROCESSOR
AP10_1: PROCESSOR
AP10_1: PROCESSOR
PAGE03 : AP10_1: PROCESSOR 0B
PAGE03 : AP10_1: PROCESSOR 0B
PAGE03 : AP10_1: PROCESSOR 0B
MS-5611
314Tuesday, July 17, 2007
314Tuesday, July 17, 2007
314Tuesday, July 17, 2007
of
of
1
of
Page 4
5
VCC_1V2
4
3
2
1
R3291KR329
D D
CLK_SUS_OUT3
VCC_1V2
VCC_1V2 5,11
C C
B B
VCC_3V3
VCC_3V3 3,5,8,9,10,11,12,14
VCC_1V8
VCC_1V8 3,5,8,11,13
DGND 3,5,6,8,9,10,11,12,13,14
PMU_ONKEY11
AGND_V 5,10,11
AGND_V
1K
WLAN_AFE_PLLIN
WLAN_AFE_VINPI
WLAN_AFE_VINNI
WLAN_AFE_VINPQ
WLAN_AFE_VINNQ
LED19
LED29
LED39
LED49
HOLD9
U1-2
U1-2
AP10
AP10
C13
WLAN_AFE_PLLIN
A2
WLAN_AFE_VINPI
A3
WLAN_AFE_VINNI
B4
WLAN_AFE_VINPQ
A4
WLAN_AFE_VINNQ
D8
WLAN_AFE_VAINP_0
D7
WLAN_AFE_VAINN_0
C8
WLAN_AFE_VAINP_1
C7
WLAN_AFE_VAINN_1
C5
WLAN_AFE_VREFP
C4
WLAN_AFE_VREFN
B5
WLAN_AFE_VBG
A1
WLAN_AFE_VCM
A9
WLAN_AFE_IBEXT
C9
BT_RX_ACTIVE
E9
BT_TX_ACTIVE
C18
GP3_PR0
B15
GP3_PR1
E17
GP3_PR2
C16
GP3_PR3
D17
GP3_PR4
D18
GP3_PR5
E16
GP3_PR6
A15
GP3_PR7
C17
GP3_PS0
A14
GP3_PS1
C15
GP3_PS2
D16
GP3_PS3
D15
GP3_PS4
B14
GP3_PS5
C14
GP3_PS6
B13
GP3_PS7
N22
GP3_PT0
K20
GP3_PT1
V23
GP3_PT2
U21
GP3_PT3
AB8
GP3_PT4
AA5
GP3_PT5
AA6
GP3_PT6
AB7
GP3_PT7
WLAN_LDO_CTRL_EN
WLAN_LDO_EN
WLAN_LDO_PWR_OK
WLAN_AFE_VOUTPI
WLAN_AFE_VOUTNI
WLAN_AFE_VOUTPQ
WLAN_AFE_VOUTNQ
WLAN_AFE_VOUT
WLAN_RFSPI_CLK
WLAN_RFSPI_CSB
WLAN_RFSPI_WDATA
WLAN_RF_SLEEP
WLAN_RX_ON
WLAN_HP_FILTER_ENABLE
WLAN_TX_ON
WLAN_TX_PA_ON_G
WLAN_ANT_SEL
WLAN_ANT_SEL_B
WLAN_ALP_GAIN_3
WLAN_ALP_GAIN_4
WLAN_ALP_GAIN_5
WLAN_ALP_GAIN_6
WLAN_ALP_GAIN_7
WLAN_ALP_GAIN_8
WLAN_ALP_GAIN_9
WLAN_RX_ACTIVE
WLAN_TX_ACTIVE
VDAC_IOUTP0
VDAC_IOUTN0
VDAC_IOUTP1
VDAC_IOUTN1
VDAC_IOUTP2
VDAC_IOUTN2
VDAC_IREF
VDAC_VDREF
B8
A10
B12
A7
A6
B7
C6
A8
D10
D9
C11
E8
D11
B10
E10
B11
D14
A13
C12
A12
D12
E14
D13
E15
A11
B9
C10
AC15
AA14
AC13
AB14
AC14
AA13
AB12
AB13
12
VCC_3V3
R290R29
1 2
0
VDAC0
VDAC1
VDAC2
AGND_V
C8
0.1UFC80.1UF
12
C9
R25
R25
1UF/6.3VC91UF/6.3V
1 2
AGND_V AGND_V AGND_V
EMI
2.05K, 1%
2.05K, 1%
AGND_V
C249
C249
X_0.1UF
X_0.1UF
1 2
R24
R24
75, 1%
75, 1%
R181 0R181 0
1 2
L23
1 2
C88 X_22PFC88 X_22PF
AGND_V AGND_V AGND_V
R88 0R88 0
R23
R23
R182
R182
75, 1%
75, 1%
75, 1%
75, 1%
1 2
1 2
1 2
1 2
C240 X_22PFC240 X_22PF
AGND_V
R50 0R50 0
1 2
1 2
C95 X_22PFC95 X_22PF
AGND_V AGND_V AGND_V
L23
1 2
2.7UH
2.7UH
LQM21NN2R7K10 COMPOSITE
12
C233
C233
560PF
560PF
12
C237
C237
560PF
560PF
LQM21NN2R7K10
12
C231
C231
560PF
560PF
1 2
LQM21NN2R7K10
1 2
12
L24
L24
2.7UH
2.7UH
12
AGND_V AGND_V
L22
L22
2.7UH
2.7UH
12
C234
C234
560PF
560PF
C238
C238
560PF
560PF
C232
C232
560PF
560PF
D17
D17
BAT54S
BAT54S
D18
D18
BAT54S
BAT54S
D16
D16
BAT54S
BAT54S
VCC_3V3
Y_OUT
C_OUT
CVBS_OUT 10
Y_OUT 10
C_OUT 10
3
1
2
VCC_3V3
3
1
2
VCC_3V3
3
1
2
A A
5
4
3
PRELIMINARY SCHEMATICS ONLY - NOT TESTED AND NOT
QUALIFIED FOR MANUFACTURING
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
2
Date: Sheet of
AP10_2: WiFi & Video
AP10_2: WiFi & Video
AP10_2: WiFi & Video
PAGE04 : AP10_2: WiFi & Video 0B
PAGE04 : AP10_2: WiFi & Video 0B
PAGE04 : AP10_2: WiFi & Video 0B
1
[email protected]
886-2-232345599 ext 8481
886-2-232345599 ext 8481
886-2-232345599 ext 8481
Drawn by Phil Chen
Drawn by Phil Chen
Drawn by Phil Chen
MS-5611
MS-5611
MS-5611
414Tuesday, July 17, 2007
414Tuesday, July 17, 2007
414Tuesday, July 17, 2007
of
of
Page 5
5
4
3
2
1
VCC_3V3
D D
VCC_3V3
VCC_3V3
VCC_3V3
C C
VCC_3V3
VCC_3V3
VCC_3V3
B B
VCC_3V3
VCC_1V8
R300R30
1 2
0
R320R32
1 2
0
R350R35
1 2
0
R360R36
1 2
0
R380R38
1 2
0
R410R41
1 2
0
R420R42
1 2
0
R430R43
1 2
0
R440R44
1 2
0
VDD_IO
VDD_IO_DBG
VDD_IO_I2S
VDD_IO_DTV
VDD_IO_AT
VDD_IO_DLCD
VDD_IO_WLAN
VDD_IO_MEM
12
C14
C14
0.1UF
0.1UF
12
C19
C19
0.1UF
0.1UF
12
C25
C25
0.1UF
0.1UF
12
C31
C31
0.1UF
0.1UF
12
C36
C36
0.1UF
0.1UF
12
C42
C42
0.1UF
0.1UF
12
C43
C43
0.1UF
0.1UF
12
C68
C68
0.1UF
0.1UF
12
C69
C69
0.1UF
0.1UF
GND_USB_IO3
VCC_1V2
12
C45
C45
0.1UF
0.1UF
12
12
12
C70
C70
C71
C71
C72
0.1UF
0.1UF
C72
0.1UF
0.1UF
0.1UF
0.1UF
VCC_1V2
L10L1
1 2
0
VCC_3V3
L40L4
1 2
0
VCC_3V3
L20L2
1 2
0
VCC_3V3
VCC_1V2
VCC_1V2
L60L6
1 2
0
12
12
12
C48
C48
0.1UF
0.1UF
C50
C50
0.1UF
0.1UF
VCC_3V3
12
C52
C52
C51
C51
0.01UF
0.01UF
0.1UF
0.1UF
1 2
12
C49
C49
0.1UF
0.1UF
C46
C46
0.1UF
0.1UF
12
C73
C73
0.1UF
0.1UF
C47
C47
0.01UF
0.01UF
1 2
R34 0R34 0
1 2
R31 0R31 0
1 2
R33 0R33 0
1 2
R37 0R37 0
1 2
12
12
12
12
C15
C15
1UF/6.3V
1UF/6.3V
C16
C16
1UF/6.3V
1UF/6.3V
C20
C20
1UF/6.3V
1UF/6.3V
C32
C32
1UF/6.3V
1UF/6.3V
12
C13
C13
0.1UF
0.1UF
12
C17
C17
0.1UF
0.1UF
12
12
C22
C22
C21
C21
0.1UF
0.1UF
0.1UF
0.1UF
12
C33
C33
0.1UF
0.1UF
12
C23
C23
0.1UF
0.1UF
VDD_USB
GND_USB
VCC_3VA
GND_USB_IO
VDAC_AVDD
GND_VDAC_GNDA
WLAN_AFE_AVDD33
WLAN_AFE_AVDD
WLAN_AFE_AVDD
VCC_1V2PA
GND_PA
VCC_1V2PC
GND_PC
VCC_1V2PP
GND_PP
VDD_IO_WLAN
VDD_IO_MEM
VDD_IO_ATVDD_IO_LCD
VDD_IO_DBG
VDD_IO_DLCD
VDD_IO_DTV
VDD_IO_I2S
VDD_IO_LCD
VDD_IO
U1-3
U1-3
AP10
AP10
W22
USB_VDDP
Y23
USB_VSSP
AB22
USB_VDDA
AA21
USB_VSSA
AB15
VDAC_AVDD1
W15
VDAC_AVDD2
Y14
VDAC_AVDD3
Y15
VDAC_AGND2
W14
VDAC_AGND1
A5
WLAN_AFE_AVDD33
B2
WLAN_AFE_AVDD
C2
WLAN_AFE_AGND2
B3
WLAN_AFE_AGND1
D5
WLAN_AFE_VDREF
B6
WLAN_AFE_AGNDREF
E12
VDD_IO_WLAN
M20
PLLA_VDD
L21
PLLA_VSS
M21
PLLC_VDD
N20
PLLC_VSS
M22
PLLP_VDD
N23
PLLP_VSS
R5
VDD_IO_MEM1
F5
VDD_IO_MEM2
G5
VDD_IO_MEM3
H5
VDD_IO_MEM4
J5
VDD_IO_MEM5
P5
VDD_IO_MEM6
W5
VDD_IO_AT
P19
VDD_IO_DBG
W10
VDD_IO_DLCD
W8
VDD_IO_DTV
H19
VDD_IO_I2S
W18
VDD_IO_LCD
R19
VDD_IO
H11
VDD_CORE1
H12
VDD_CORE2
H13
VDD_CORE3
L8
VDD_CORE4
L16
VDD_CORE5
M8
VDD_CORE6
M16
VDD_CORE7
N8
VDD_CORE8
N16
VDD_CORE9
T11
VDD_CORE10
T12
VDD_CORE11
T13
VDD_CORE12
GND1
GND2
GND3
GND4
GND5
GND6
GND7
GND8
GND9
GND10
GND11
GND12
GND13
GND14
GND15
GND16
GND17
GND18
GND19
GND20
GND21
GND22
GND23
GND24
GND25
GND26
GND27
GND28
GND29
GND30
GND31
GND32
GND33
GND34
GND35
GND36
GND37
GND38
GND39
GND40
GND41
GND42
GND43
GND44
GND45
GND46
GND47
GND48
GND49
GND50
GND51
GND52
GND53
GND54
GND55
GND56
GND57
GND58
GND59
GND60
GND61
GND62
GND63
GND64
GND65
GND66
GND67
GND68
GND69
GND70
GND71
GND72
GND73
GND74
GND75
GND76
XTAL_12M_VDD
XTAL_12M_VSS
XTAL12M_VDD
VCC_3V3
VCC_1V8
VCC_1V2
AGND_V
VCC_1V2
1 2
VCC_3V3 3,4,8,9,10,11,12,14
VCC_1V8 3,8,11,13
VCC_1V2 4,11
DGND 3,4,6,8,9,10,11,12,13,14
AGND_V 4,10,11
L90L9
0
12
C67
C67
0.1UF
0.1UF
1 2
L100L10
0
E11
E13
H8
H9
H16
H15
H14
H10
J8
J9
J10
J11
J12
J13
J14
J15
J16
K5
K8
K9
K10
K11
K12
K13
K14
K15
K16
L9
L10
L11
L12
L13
L14
L15
L19
M9
M10
M11
M12
M13
M14
M15
N5
N9
N10
N11
N12
N13
N14
N15
R8
R9
R10
R11
R12
R13
R14
R15
R16
T8
T9
T10
T14
T15
T16
P16
P15
P14
P13
P12
P11
P10
P9
P8
W11
W13
T23
R23
XTAL_GND3
A A
[email protected]
886-2-232345599 ext 8481
886-2-232345599 ext 8481
886-2-232345599 ext 8481
Drawn by Phil Chen
Drawn by Phil Chen
Drawn by Phil Chen
MS-5611
MS-5611
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
AP10_3: POWER
AP10_3: POWER
AP10_3: POWER
PAGE05 : AP10_3: POWER 0B
PAGE05 : AP10_3: POWER 0B
PAGE05 : AP10_3: POWER 0B
MS-5611
of
of
of
514Tuesday, July 17, 2007
514Tuesday, July 17, 2007
1
514Tuesday, July 17, 2007
Page 6
5
R46
R46
XMIC1BIAS
1 2
1.1K, 1%
1.1K, 1%
X2
X2
HIT_4mm_Microphone
HIT_4mm_Microphone
D D
C C
B B
A A
MICP
2
MICN
1
AVDD AVDD
R3301KR330
1K
12
C101
C101
1UF/6.3V
1UF/6.3V
AGND_A
AGND_A
12
12
C90
C90
47PF
47PF
12
R54
R54
1.1K, 1%
1.1K, 1%
R3311KR331
1K
12
C102
C102
1UF/6.3V
1UF/6.3V
Docking line-in
FM audio in
1 2
1 2
C103
C103
1UF/6.3V
1UF/6.3V
C89
C89
1UF/6.3V
1UF/6.3V
C93
C93
1UF/6.3V
1UF/6.3V
12
LIN1_L10
LIN1_R10
LIN2_L7
LIN2_R7
5
C104
C104
1UF/6.3V
1UF/6.3V
12
C91
C91
47PF
47PF
AGND_A
PLACE NEAR CHIP
12
C107
C107
10UF/6.3V
10UF/6.3V
AGND_A
12
C86
C86
1UF/6.3V
1UF/6.3V
12
AGND_HP
LIN1_L
LIN2_L
LIN2_R
C108
C108
4.7UF/6.3V
4.7UF/6.3V
R470R47
1 2
0
AGND_A
12
C109
C109
4.7UF/6.3V
4.7UF/6.3V
AGND_A
AGND_A
AGND_A
AGND_A
MIC2_IN
MIC3_IN
4.7UF/6.3V
4.7UF/6.3V
12
C119
C119
47PF
47PF
12
C123
C123
47PF
47PF
12
C125
C125
47PF
47PF
12
C132
C132
47PF
47PF
(P)
(N)
C110
C110
12
12
MICBIAS2
MLIN1L
MLIN1R
MLIN2L
MLIN2R
MICBIAS2
MIC2_IN
MIC3_IN
MVREFAL
MVREFAR
MVREFDL
MVREFDR
MREFCOM
MHP25P
MHP50P
MHP75P
C117
C117
2.2UF
2.2UF
G23
D22
E22
G22
C22
B21
B23
G21
C23
H23
F22
E21
D23
D21
B22
D20
C20
C19
D19
E18
E20
B20
1 2
C118 1UF/6.3VC118 1UF/6.3V
1 2
C120 1UF/6.3VC120 1UF/6.3V
C124
C124
1 2
1UF/6.3V
1UF/6.3V
C131
C131
1 2
1UF/6.3V
1UF/6.3V
U1-4
U1-4
AP10
AP10
MICDET
MLIN1L
MLIN1R
MLIN2L
MLIN2R
MMICBIAS1
MMICIN1
MMICBIAS2
MMICIN2
MICIN3
MVREFAL
MVREFAR
MVREFDL
MVREFDR
MVREFCOM
MHP25P
MHP25PHPA
MHP50P
MHP75P
MHP75PHPA
MCFPOS
MCFNEG
HPGND
F21
AGND_HP AGND_A
MLIN1L
MLIN1RLIN1_R
MLIN2L
MLIN2R
4
MLOUTL
MLOUTR
MHPOUTL
MHPOUTR
MHPCOM
MHPSENS
DOUTNL
DOUTPL
DOUTNR
DOUTPR
DVDDCP
DGNDCP
MW_AVDD
DVDD
HPVDD
MW_AGND
F19
4
C85 1UF/6.3VC85 1UF/6.3V
MLOUTL
F23
MLOUTR LOUT_R
E23
HPOUT_L
A20
HPOUT_R
A21
E19
TP57TP57
C21
A18
A19
A16
A17
VDDCP
A22
DGNDCP
A23
AVDD
G19
DVDD
G20
HPVDD
F20
B19
VDL
B18
VSL
B17
VDR
B16
VSR
DGND
H21
AVDD
HPVDD
1 2
C92
C92
1 2
VDDCP
12
12
C100
C100
C99
C99
10UF/6.3V
10UF/6.3V
0.1UF
0.1UF
DVDD
12
12
C111
C111
C112
C112
0.1UF
0.1UF
1UF/6.3V
1UF/6.3V
DGND
AVDD
12
12
C115
C115
C114
C114
1UF/6.3V
1UF/6.3V
0.1UF
0.1UF
HPVDD
12
C121
C121
0.1UF
0.1UF
AGND_A
Reservd for EMI
1UF/6.3V
1UF/6.3V
1 2
LOUT_L
FB10FB1
1 2
FB20FB2
1 2
FB30FB3
1 2
0
12
C122
C122
10UF/6.3V
10UF/6.3V
C139
C139
0.1UF
0.1UF
12
AGND_A
0
0
VCC_3V0
AGND_A
R48
R48
100, 5%
100, 5%
1 2
R51
R51
47K
47K
VCC_3V0
VCC_3V0
FB40FB4
1 2
0
3
PLACE CLOSE TO CHIP
VCC_3V0
AGND_HP
HPH_L 10
Line-output to docking
1 2
12
AGND_A
HPOUT_R
HPOUT_L
12
12
R58
R58
R59
R59
15, 1%
15, 1%
15, 1%
15, 1%
12
12
C105
C105
C106
C106
0.22UF
0.22UF
0.22UF
0.22UF
AGND_HP
R60 0R60 0
1 2
R69 0R69 0
1 2
R70 X_0R70 X_0
1 2
AGND_A
R53
R53
47K
47K
R52
R52
100, 5%
100, 5%
HPH_R 10
C97
C97
220UF/4V
220UF/4V
C98
C98
220UF/4V
220UF/4V
MLVS0402M04-220
MLVS0402M04-220
AGND_HPAGND_A
AGND_HPAGND_A
VCC_3V0
VCC_3V0 11
EMI
HP_COUT_R
HP_COUT_L
D1
D1
2 1
MLVS0402M04-220
MLVS0402M04-220
2
AGND_HP AGND_HPAGND_HP
C250
C250
X_0.1UF
X_0.1UF
AGND_A AGND_A
AGND_A
D2
D2
2 1
X_MLVS0402M04-220
X_MLVS0402M04-220
C251
C251
X_0.1UF
X_0.1UF
AGND_A 7,10,11
DGND 3,4,5,8,9,10,11,12,13,14
PRELIMINARY SCHEMATICS ONLY - NOT TESTED AND NOT
QUALIFIED FOR MANUFACTURING
3
2
L11
L11
1 2
2.2uH
2.2uH
D6
D6
2 1
L12
L12
1 2
2.2uH
2.2uH
L13
L13
2.2uH
2.2uH
1 2
1
Footprint / PN
J2
HP_JACK_R
HP_JACK_L
HP_JACK_GND
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
J2
2
3
1
4
5
6
FM_ANT 7
PHONEJACK STEREO_2
PHONEJACK STEREO_2
HP_JACK_GND 10
[email protected]
886-2-232345599 ext 8481
886-2-232345599 ext 8481
886-2-232345599 ext 8481
Drawn by Phil Chen
Drawn by Phil Chen
Drawn by Phil Chen
MS-5611
MS-5611
MS-5611
AP10_4: Audio
AP10_4: Audio
AP10_4: Audio
PAGE06 : AP10_4: Audio 0B
PAGE06 : AP10_4: Audio 0B
PAGE06 : AP10_4: Audio 0B
1
614Tuesday, July 17, 2007
614Tuesday, July 17, 2007
614Tuesday, July 17, 2007
of
of
of
Page 7
5
D D
4
3
2
1
FM_LOUT
FM_ROUT
12
C137
C137
0.1UF
0.1UF
R79 200R79 200
R80 200R80 200
R81
R81
VCC_LDO3
12
C136
C136
0.022uF
0.022uF
AGND_A
1 2
1 2
1 2
C135
C135
C134 0.1UFC134 0.1UF
12
0.1UF
0.1UF
VCC_LDO3
12
200
200
12
12
R75
R75
R74
R74
47K
47K
47K
47K
R78 200R78 200
1 2
LIN2_L 6
LIN2_R 6
AGND_A
1 2
C138
C138
0.01UF
0.01UF
FM_RESET# 3
FM3_SEN# 3
3WIRE_CLK 3
3WIRE_DATA 3
VCC_1V2
VCC_1V2 4,5,11
VCC_LDO3
VCC_LDO3 11
AGND_A 6,10,11
19
21
NC1
FMIP
RFGND
GND1
20
NC2
PLANE
RST5SEN6SCLK7SDIO8RCLK9VIO
10
GPIO317GPIO218GPIO1
GND3
LOUT
ROUT
GND2
16
VA
15
14
13
12
11
VD
VCC_LDO3
AGND_A
FM_RST
FM_3W_SEN
FM_3W_CLK
FM_3W_DAT
U4
C133
C133
FM_ANT6
C C
B B
100pF
100pF
12
AGND_A
CLK_32K3,11
1
2
3
4
SI4702U4SI4702
AGND_A
[email protected]
886-2-232345599 ext 8481
886-2-232345599 ext 8481
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
FM Tuner
FM Tuner
FM Tuner
PAGE07 : FM Tuner 0B
PAGE07 : FM Tuner 0B
PAGE07 : FM Tuner 0B
886-2-232345599 ext 8481
Drawn by Phil Chen
Drawn by Phil Chen
Drawn by Phil Chen
MS-5611
MS-5611
MS-5611
714Tuesday, July 17, 2007
714Tuesday, July 17, 2007
714Tuesday, July 17, 2007
of
of
1
of
Page 8
5
D D
SDR_CLK3,14
XM2_MA[0..20]14
XM2_CS_C#3,14
XM2_DQM33
XM2_DQM23,14
C C
XM2_DQM13
XM2_DQM03
XM2_MA[0..20]
XM2_RAS#
XM2_CAS#
XM2_WE#
XM2_CS_C#
XM2_DQM3
XM2_DQM2
XM2_DQM1
XM2_DQM0
SDR_CKE3,14
12
12
C245
C245
X_10pF
X_10pF
X_10pF
X_10pF
XM2_RAS#
C244
C244
4
XM2_RAS#
XM2_CAS#
XM2_WE#
12
C243
C243
X_10pF
X_10pF
SDR_CLK
SDR_CKE
SDR_MA14XM2_MA14
SDR_MA13XM2_MA13
SDR_MA12XM2_MA12
SDR_MA11XM2_MA11
SDR_MA10XM2_MA10
SDR_MA9XM2_MA9
SDR_MA8XM2_MA8
SDR_MA7XM2_MA7
SDR_MA6XM2_MA6
SDR_MA5XM2_MA5
SDR_MA4XM2_MA4
SDR_MA3XM2_MA3
SDR_MA2XM2_MA2
SDR_MA1XM2_MA1
SDR_MA0XM2_MA0
SDR_MA15
SDR_MA16XM2_CAS#
SDR_MA17XM2_WE#
VCC_1V8
U5
U5
R7
VDD1A7VDD2F9VDD3L7VDD4
J1
CLK
J2
CKE
H8
BA1
J7
BA0
H3
A12/NC
H9
A11/NC
G7
A10/AP
J3
A9
H2
A8
H1
A7
G3
A6
HY5S7B2LF
A5
A4
A3
A2
A1
A0
CS
RAS
CAS
WE
DQM3
DQM2
DQM1
DQM0
NC1
NC2
NC3
NC4
NC5
HY5S7B2LF
G2
G1
F3
F7
G9
G8
J8
J9
K7
K8
F2
F8
K1
K9
E3
E7
H7
K2
K3
VSS1A3VSS2F1VSS3L3VSS4R3VSSQ1B3VSSQ2B8VSSQ3C1VSSQ4D1VSSQ5E9VSSQ6L9VSSQ7M1VSSQ8N1VSSQ9P3VSSQ10
3
VDDQ1B2VDDQ2B7VDDQ3C9VDDQ4D9VDDQ5E1VDDQ6L1VDDQ7M9VDDQ8N9VDDQ9
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
2
P7
P2
VDDQ10
E2
D3
D2
B1
C2
A1
C3
A2
A8
C7
A9
C8
B9
D8
D7
E8
R2
N3
R1
N2
P1
M2
M3
L2
L8
M7
M8
P9
N8
R9
N7
R8
XM2_MD31
XM2_MD30
XM2_MD29
XM2_MD28
XM2_MD27
XM2_MD26
XM2_MD25
XM2_MD24
XM2_MD23
XM2_MD22
XM2_MD21
XM2_MD20
XM2_MD19
XM2_MD18
XM2_MD17
XM2_MD16
XM2_MD15
XM2_MD14
XM2_MD13
XM2_MD12
XM2_MD11
XM2_MD10
XM2_MD9
XM2_MD8
XM2_MD7
XM2_MD6
XM2_MD5
XM2_MD4
XM2_MD3
XM2_MD2
XM2_MD1
XM2_MD0
XM2_MD[0..31]
XM2_MD[0..31] 3,14
1
P8
VCC_3V3
VCC_3V3 3,4,5,9,10,11,12,14
VCC_1V8 3,5,11,13
DGND 3,4,5,6,9,10,11,12,13,14
I2C_WP 3
R95
R95
100K, 5%
100K, 5%
1 2
MEMORY
MEMORY
MEMORY
PAGE08 : MEMORY 0B
PAGE08 : MEMORY 0B
PAGE08 : MEMORY 0B
1
VCC_3V3
1 2
VCC_1V8
R94
R94
X_100K, 5%
X_100K, 5%
[email protected]
886-2-232345599 ext 8481
886-2-232345599 ext 8481
886-2-232345599 ext 8481
Drawn by Phil Chen
Drawn by Phil Chen
Drawn by Phil Chen
MS-5611
MS-5611
MS-5611
814Tuesday, July 17, 2007
814Tuesday, July 17, 2007
814Tuesday, July 17, 2007
of
of
of
R91 10KR91 10K
12
12
C142
C142
0.1UF
0.1UF
EMI
12
R92 10KR92 10K
VCC_HARP
12
12
R93 10KR93 10K
C143
C143
X_4.7UF
X_4.7UF
12
R96 10KR96 10K
HARP_CLK
J11
J11
20
20
19
19
18
18
17
17
16
16
15
15
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
40-pin header
40-pin header
VCC_3V3
1 2
C161
C161
X_0.1UF
X_0.1UF
VCC_HARP
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
3
U7
U7
1
A0
2
A1
3
A2
4
GND
IS24C64A-2SLI
IS24C64A-2SLI
VCC
WP
SCL
SDA
2
VCC_3V3
12
C144
C144
0.1UF
0.1UF
8
7
6
5
I2C_WP
I2C_CLK 3,10,11
I2C_DATA 3,10,11
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
HARP_PWR_OFF#3
VCC_3V3
B B
VCC_1V8
A A
12
C146
C146
0.1UF
0.1UF
12
C147
C147
0.1UF
0.1UF
12
C148
C148
0.1UF
0.1UF
12
C226
C226
10UF/6.3V
10UF/6.3V
12
C149
C149
0.1UF
0.1UF
100K, 5%
100K, 5%
12
C150
C150
0.1UF
0.1UF
5
R65
R65
12
U17
U17
4
ON/OFF
5
IN
AAT4250_SOT23-5
12
C152
C152
0.1UF
0.1UF
AAT4250_SOT23-5
HSM3_CLK3
HSM3_D[0..3]
HSM3_CMD3
12
12
C153
C153
0.1UF
0.1UF
C154
C154
0.1UF
0.1UF
R178
R178
C227
C227
0.1UF
0.1UF
HSM3_D[0..3]3
12
C151
C151
0.1UF
0.1UF
X_0
X_0
12
C155
C155
0.1UF
0.1UF
NC
GND
OUT
HSM3_CLK
12
C156
C156
0.1UF
0.1UF
3
2
1
12
HSM3_D2
HSM3_D0
HSM3_D1
HSM3_D3
HSM3_CMD
C157
C157
0.1UF
0.1UF
12
C158
C158
0.1UF
0.1UF
VCC_HARP
12
R89 10KR89 10K
R9033R90
12
33
C3
X_10PFC3X_10PF
1 2
12
12
C159
C159
C160
C160
0.1UF
0.1UF
X_0.1UF
X_0.1UF
4
Page 9
5
4
3
2
1
VCC_3V3
12
R11
R11
100K, 5%
VCC_3V3
D D
C C
B B
12
R124
R124
10K
10K
LCD3_DB[0..17]3
12
12
R125
R125
10K
10K
LCD3_XRESET3
LCD3_VSYNC3
LCD3_HSYNC3
LCD3_PCLK3
LCD3_DE3
R126
R126
100K, 5%
100K, 5%
LED-11
LED+11
R127
R127
100K, 5%
100K, 5%
LCD3_XRESET
1 2
LCD3_XCS
LCD3_SDI
LCD3_SDOUT
LCD3_DB17
LCD3_DB16
LCD3_DB15
LCD3_DB14
LCD3_DB13
LCD3_DB12
LCD3_DB11
LCD3_DB10
LCD3_DB9
LCD3_DB8
LCD3_DB7
LCD3_DB6
LCD3_DB5
LCD3_DB4
LCD3_DB3
LCD3_DB2
LCD3_DB1
LCD3_DB0
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
40-pin header
40-pin header
40401
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
C192
C192
0.1UF
0.1UF
J4
J4
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
VCC_3V0LCD
12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
MENU3
12
VCC_3V3
L180L18
0
12
C191
C191
0.1UF
0.1UF
LCD3_XCS 3
LCD3_SCL 3
LCD3_SDI 3
LCD3_SDOUT 3
MENU
REVERSE3
ENTER3
UP3
FORWARD3
100K, 5%
21
D27D27
HOLD4
DOWN3
SW12SW12
1 2
VCC_3V3
12
R121
R121
100K, 5%
100K, 5%
REVERSE
ENTER
UP
FORWARD
21
D9D9
HOLD
DOWN
MENU
12
R123
R123
100K, 5%
100K, 5%
D22D22
21
21
12
R122
R122
100K, 5%
100K, 5%
D23D23
12
12
R134
R134
R135
R135
100K, 5%
100K, 5%
100K, 5%
100K, 5%
D24D24
D25D25
21
21
12
R136
R136
100K, 5%
100K, 5%
R194
R194
200K
200K
1 2
PWR_UP11
ESD-MLVS0402M04
ESD-MLVS0402M04
21
D26D26
PHASE_13
VSYS
D28
D28
21
LED14
LED44
PHASE_23
PDN3
VCC_3V3
LED24
LED34
5
4
3
2
1
6
12
C247
C247
0.01UF
0.01UF
R203 62R203 62
R204 62R204 62
R11333R113
1 2
R143
R143
1 2
100K, 5%
100K, 5%
R205 62R205 62
R206 62R206 62
LED-landscape
R2233R22
1 2
33
C246
C246
0.01UF
0.01UF
Power ON
D21D21
2 1
LED-portrait
33
12
HOLD
SW1
SW1
SS4-CMS-TR
SS4-CMS-TR
VCC_3V3
12
12
12
12
Footprint / PN
21
D20D20
LED1 ~ LED4 each consume 8mA.
LED5-6-7 consume 24mA.
C248
C248
0.1UF
0.1UF
J7
J7
2425
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
CONN-FPC23
CONN-FPC23
SW11
SW11
1. VCC2(LED)
1. VCC2(LED)
2. LED5-6-7
2. LED5-6-7
3. LED1
3. LED1
4. LED4
4. LED4
5. S4
5. S4
6. COM
6. COM
7. S1
7. S1
8. B-OUT
8. B-OUT
9. VCC1
9. VCC1
10. GND
10. GND
11. PDN
11. PDN
12. GND
12. GND
13. PDN
13. PDN
14. A-OUT
14. A-OUT
15. VCC1
15. VCC1
16. S5
16. S5
17. S2
17. S2
18. S3
18. S3
19. LED2
19. LED2
20. VCC2(LED)
20. VCC2(LED)
21. LED3
21. LED3
22. VCC2(LED)
22. VCC2(LED)
23. LED8-9-10
23. LED8-9-10
B5V-1422-D01-L04 switch
B5V-1422-D01-L04 switch
LED6
LED6
LED4
LED4
SW4
SW4
LED9
LED9
LED1
SW1 SW5
SW1 SW5
SW3
SW3
LED8
LED1
LED3
LED3
LED8
SW2
SW2
LED7
LED7
LED2
LED5
LED2
LED5
LED10
LED10
LED8-9-10 consume 24mA.
VCC_3V0LCD
VCC_3V0LCD 11
VCC_3V3
VCC_3V3 3,4,5,8,10,11,12,14
A A
5
DGND 3,4,5,6,8,10,11,12,13,14
LCM1
LCM1
LCM
LCM
4
LED5-6-73
LED8-9-103
12
R137
R137
100K, 5%
100K, 5%
12
R144
R144
100K, 5%
100K, 5%
3
Q1
Q1
G2
S2
G1
S1
NN-UM6K1N_SC70
NN-UM6K1N_SC70
R20822R208
D2
D1
R20722R207
LED-portrait
12
22
LED-landscape
12
22
[email protected]
886-2-232345599 ext 8481
886-2-232345599 ext 8481
886-2-232345599 ext 8481
Drawn by Phil Chen
Drawn by Phil Chen
Drawn by Phil Chen
MS-5611
MS-5611
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
2
Date: Sheet
LCD and switch
LCD and switch
LCD and switch
PAGE09 : LCD
PAGE09 : LCD
PAGE09 : LCD
MS-5611
1
0B
0B
0B
914Tuesday, July 17, 2007
914Tuesday, July 17, 2007
914Tuesday, July 17, 2007
of
of
of
Page 10
5
4
3
2
1
Footprint / PN
J8
J8
34
Docking-connect_2
Docking-connect_2
D D
C C
B B
A A
36
36
DOCKING_DETECT
35
35
33
CON1
CON1
TEST_RES
TEST_RES
CON3
CON3
TEST_RES
TEST_RES
323234
AUDIO_OUT_L
AUDIO_OUT_R
AUDIO_IN_L
AUDIO_IN_R
S-Video C or Pr
S-Video Y or Pb
Sense/VAGND
CVBS_OUT or Y
VAGND/Sense
313133
1
1
2
2
1
1
2
2
30
ANTENNA
29
AGND3
28
27
26
AGND2
25
24
23
AGND1
22
I2C_CLK
21
I2C_DATA
20
GND3
19
+3.3Vdc
18
VAGND2
17
16
15
14
13
VAGND1
12
CVBS_IN
11
10
VDD3
9
VDD2
8
IRQ
7
6
GND2
5
USB_D-
4
USB_D+
3
GND1
2
VDD1
1
Vbus
D13
D13
SMF6.0A
SMF6.0A
LAYER5 DGND
For impedance test
5
DOCK_I2C_CLK
DOCK_I2C_DAT
EGA10402V05AH
EGA10402V05AH
A C
AGND_V
LAYER5 DGND
D14
D14
I2C_CLK3,8,11
DOCK_I2C_OE3
VCC_3V3
C_OUT 4
Y_OUT 4
CVBS_OUT 4
PGB1010603MR
PGB1010603MR
2 1
12
+
+
DOCK_I2C_OE
VCC_3V3
CON2
CON2
1
1
2
2
TEST_RES
TEST_RES
CON4
CON4
1
1
2
2
TEST_RES
TEST_RES
HP_JACK_GND 6
+3V3DC 11
D11
D11
PGB1010603MR
PGB1010603MR
C57
C57
10UF/10V
10UF/10V
C_TAJA
C_TAJA
R141
R141
100K, 5%
100K, 5%
1 2
2 1
DOCK_I2C_CLK
VIDEO_SENSE 3
R142
R142
DOCKING_IRQ 3
USB_DN 3
USB_DP 3
D12
D12
2 1
4
12
100K, 5%
100K, 5%
USB_VBUS 11
R177
R177
100K, 5%
100K, 5%
USB_VBUS_SENSE 3
R176
R176
200K
200K
1 2
U15
U15
2
1A
3
1B
1
1OE
7
2OE
SN74CB3T3306DCUR
SN74CB3T3306DCUR
HPH_L 6
HPH_R 6
LIN1_L 6
LIN1_R 6
VCC_3V3
VCC
GND
DOCKING_DETECT
VDD_5V 11
R188
R188
100K, 5%
100K, 5%
ADP_5V_SENSE 3
R189
R189
200K
200K
VCC_3V3
12
8
5
2A
DOCK_I2C_DAT
6
2B
4
P1
P1
1
Hole
Hole
NPTH_63
NPTH_63
NPTH_56
NPTH_56
NPTH_56
NPTH_56
C199
C199
0.1UF
0.1UF
P2
P2
Hole
Hole
P3
P3
Hole
Hole
1 2
I2C_DATA 3,8,11
1
1
FM3
FM3
BADMARK
BADMARK
FM4
FM4
BADMARK
BADMARK
R139
R139
100K, 5%
100K, 5%
1 2
DOCKING_DETECT 3
FM1
FM1
X_FIDUCIAL
X_FIDUCIAL
F_PAD_M120
F_PAD_M120
FM5
FM5
X_FIDUCIAL
X_FIDUCIAL
F_PAD_M120
F_PAD_M120
FM7
FM7
X_FIDUCIAL
X_FIDUCIAL
F_PAD_M120
F_PAD_M120
FM9
FM9
X_FIDUCIAL
X_FIDUCIAL
F_PAD_M120
F_PAD_M120
PRELIMINARY SCHEMATICS ONLY - NOT TESTED AND NOT
QUALIFIED FOR MANUFACTURING
3
2
Hole
Hole
bottom
FM2
FM2
X_FIDUCIAL
X_FIDUCIAL
F_PAD_M120
F_PAD_M120
FM6
FM6
X_FIDUCIAL
X_FIDUCIAL
F_PAD_M120
F_PAD_M120
FM8
FM8
X_FIDUCIAL
X_FIDUCIAL
F_PAD_M120
F_PAD_M120
FM10
FM10
X_FIDUCIAL
X_FIDUCIAL
F_PAD_M120
F_PAD_M120
PAD4
PAD4
1
PAD2
PAD3
PAD3
Hole
Hole
1
PAD5
PAD5
Hole
Hole
1
AGND_V
VCC_3V3
PCB1
PCB1
PCB542*50
PCB542*50
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
PAGE10 : DOCKING 0B
PAGE10 : DOCKING 0B
PAGE10 : DOCKING 0B
PAD2
Hole
Hole
1
EMI
Top
AGND_V 4,5,11
AGND_A 6,7,11
VCC_3V3 3,4,5,8,9,11,12,14
DGND 3,4,5,6,8,9,11,12,13,14
[email protected]
886-2-232345599 ext 8481
886-2-232345599 ext 8481
886-2-232345599 ext 8481
Drawn by Phil Chen
Drawn by Phil Chen
Drawn by Phil Chen
MS-5611
MS-5611
MS-5611
DOCKING
DOCKING
DOCKING
1
10 14Tuesday, July 17, 2007
10 14Tuesday, July 17, 2007
10 14Tuesday, July 17, 2007
Page 11
5
D30
D30
X_RB551
X_RB551
A C
5
OUT
6
GND1
7
GND2
8
GND3
D
1 2
VCC_3V3
1 2
1 2
U19
U19
R433R4
33
R186
R186
100K, 5%
100K, 5%
5
D
R108
R108
X_0
X_0
G
Q2
IRLML6402Q2IRLML6402
IN2
IN1
ON
SET
R193
R193
Q7
S
IRLML6402Q7IRLML6402
S-RB161M-20
S-RB161M-20
1 2
PWR_UP9
PMU_ONKEY4
G
100K, 5%
100K, 5%
R319
R319
470K
470K
A C
R77
R77
100K, 5%
100K, 5%
VSYS
S
D29
D29
S-RB161M-20
S-RB161M-20
A C
R17
R17
300
300
R18
R18
5.1K
5.1K
For USB IF
4
3
2
1
12
D19
D19
I2C_CLK3,8,10
I2C_DATA3,8,10
VCC_3V3
VBUS_ON 3
CLK_32K3,7
BAT1
BAT1
ATL Li battery
ATL Li battery
C39
C39
0.1UF
0.1UF
1 2
CHG_IN
VCC_LDO3
12
12
C59
C60
C60
0.1UF
0.1UF
1 2
1 2
C59
2.2UF
2.2UF
VCC_3V3
R191
R191
X_100K, 5%
X_100K, 5%
1 2
TP1TP1
R190
R190
150K
150K
1 2
12
C217
C217
33PF
33PF
R187
R187
100K, 5%
100K, 5%
R183
R183
5.4sec / 10.9sec for emergency shut down
200K
200K
PWRUP is high active
Software power off
GPIO VIH 1.32v~3.6v
PMU_ONKEY High range 2.3v~3.2v
BVDD
J12
J12
45
1
BATTEMP
2
3
SSJ07-03
SSJ07-03
D D
Footprint / PN
VBUS_VDD_5V
AAT3110IJS-5.0-T1_SC70JW-8-RH
AAT3110IJS-5.0-T1_SC70JW-8-RH
R45
R45
12
10K
10K
VDD_5V10
R318
C C
USB_VBUS10
RESET#3,12,14
B B
A A
R318
4.7K
4.7K
PMU_IRQ#3
G1
J2
G3
H3
F6
G4
F4
G5
H4
J3
J4
F3
H5
J5
J7
J8
G6
H6
J6
U25
U25
AS3517
AS3517
DVDD
DVSS
CSCL
CSDA
PWGD
LRCLK
SCLK
SDO
SDI
Q32K
Q24M
HBT
XIRQ
XRES
XIN24
XOUT24
VPRG1
VPRG2
PWRUP
4
Interface
Interface
Interface
Interface
Interface
Interface
Sequence
Sequence
4
Y4
32.768KHzY432.768KHz
I2C
I2C
I2S
I2S
OSCDigital
OSCDigital
Startup
Startup
12
J1
XOUT32
BVDD
12
C130
C58
C58
1uF
1uF
E9
C130
2.2UF
2.2UF
BATTEMP
G2
F2
H1
RTC Charger
RTC Charger
E2
XIN32
RVDD
BVDDR
BATTEMP
C252
C252
X_0.1UF
X_0.1UF
BVDD
E1
MIC1BG8MIC1PG9MIC1NH9MIC2BE8MIC2PF9MIC2N
CHG_IN
F1
CHG_IN
CHG_OUT
C242
C242
X_0.1UF
X_0.1UF
VCC_3V0LCD
12
C128
C128
2.2UF
2.2UF
D8
12
VSYS
D1
Programmable
Programmable
LDOs USB
LDOs USB
AS3517
AS3517
CTBGA81
CTBGA81
Line OutMicrophone
Line OutMicrophone
LOUT1R
LOUT1L
LOUT2R
LOUT2L
E7
C6
C7
VCC_3V3
C241
C241
C239
C239
X_0.1UF
X_0.1UF
X_0.1UF
X_0.1UF
BVDD2D3BVDD1E3PVDD1D2PVDD2
C129
C129
2.2UF
2.2UF
F8
EMI
+3V3DC 10
C1
CN_GEXT
Line In
Line In
LIN2RF7LIN2L
D7
C236
C236
X_0.1UF
X_0.1UF
3
CHG_IN
12
R21
R21
X_0
X_0
USBH_CSN
D9
C2
C3
VBUS
CP_CP
Headphone
Headphone
E6
Not
Not
Connected
Connected
HPLA9VSSHB9HPRC9BVDDHB8HPCMC8HPGND
NC4E5NC3F5NC2E4NC1
NC
D5
FVDD
ISINK
VSS15
SW15
DCDC 15V
DCDC 15V
CVDD1
CVSS1
LXC1
BVDDC1
CVDD2
DCDC CVDD1DCDC CVDD2
DCDC CVDD1DCDC CVDD2
CVSS2
LXC2
BVDDC2
CVDD3
CVSS3
LXC3
BVDDC3
AVDD
DCDC CVDD3
DCDC CVDD3
VREF
AGND
Analog
Analog
Supply
Supply
AVSS
H2
B1
B2
A1
B7
A6
A7
A8
B5
B6
A5
A4
B3
A2
A3
B4
H7
H8
G7
J9
C4
D4
C5
USBH_PG
USBH_CSP
LIN1RD6LIN1L
C235
C235
X_0.1UF
X_0.1UF
3
12
C127
C127
0.1UF
0.1UF
L14
L14
22uH
22uH
L21 4.7uHL21 4.7uH
L20 4.7uHL20 4.7uH
L25 4.7uHL25 4.7uH
R1840R184
R1920R192
R1950R195
R1540R154
R1560R156
2
VCC_LDO3
12
C126
C126
2.2UF
2.2UF
12
0
12
0
12
0
12
0
12
0
2
VCC_LDO3
VCC_LDO3 7
VCC_1V2
R200 R200
1 2
R19X_0 R19X_0
12
VSYS
RB551V-30-S
RB551V-30-S
C268
C268
10uF/10V/0805
10uF/10V/0805
VCC_1V8
C267
C267
10uF/10V/0805
10uF/10V/0805
C266
C266
10uF/10V/0805
10uF/10V/0805
12
12
12
DGND 3,4,5,6,8,9,10,12,13,14
AGND_V 4,5,10
AGND_A 6,7,10
VCC_3V3
D10
D10
A C
C96
C96
4.7UF/6.3V
4.7UF/6.3V
C66
C66
4.7UF/6.3V
4.7UF/6.3V
C65
C65
4.7UF/6.3V
4.7UF/6.3V
1
VCC_3V3
VCC_3V3 3,4,5,8,9,10,12,14
VCC_1V8
VCC_3V0
VCC_3V0LCD
BL_ON
100k
100k
VCC_1V2
Power Management Unit
Power Management Unit
Power Management Unit
VCC_1V8 3,5,8,13
VCC_1V2 4,5
VCC_3V0 6
VCC_3V0LCD 9
R97
R97
200k
200k
R99
R99
G
10k
10k
R98
R98
PAGE11 : AS3517
PAGE11 : AS3517
PAGE11 : AS3517
1
SI2303BDS-T1-E3
SI2303BDS-T1-E3
DS
Q5
2N7002WQ52N7002W
VCC_1V2
LED- 9
AC
D15
D15
BZT52C15
BZT52C15
LED_PLUS
12
C113
C113
1U/16V/0603
1U/16V/0603
BL_ON3
VCC_3V3
R150 R150
1 2
R16X_0 R16X_0
12
VCC_3V0
12
12
C63
C63
C64
C64
2.2UF
2.2UF
0.1UF
0.1UF
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
Q4
Q4
LED+ 9
[email protected]
886-2-232345599 ext 8481
886-2-232345599 ext 8481
886-2-232345599 ext 8481
Drawn by Phil Chen
Drawn by Phil Chen
Drawn by Phil Chen
MS-5611
MS-5611
MS-5611
of
of
of
11 14Tuesday, July 17, 2007
11 14Tuesday, July 17, 2007
11 14Tuesday, July 17, 2007
0B
0B
0B
Page 12
5
4
3
2
1
SD_PWR_OFF#3
D D
C C
VCC_3V3
12
C229
C229
10UF/6.3V
10UF/6.3V
HSM3_MUX_D[0..3]3
R73
R73
100K, 5%
100K, 5%
C228
C228
0.1UF
0.1UF
12
U18
U18
4
ON/OFF
5
IN
AAT4250_SOT23-5
AAT4250_SOT23-5
HSM3_MUX_CMD3
HSM3_MUX_CLK3
R179
R179
X_0
X_0
3
NC
2
GND
1
OUT
HSM3_MUX_D2
HSM3_MUX_D3
HSM3_MUX_D0
HSM3_MUX_D1
MM3_CD#3
R162
R162
10K
10K
VCC_3V_SD
12
R160
R160
10K
10K
R16833R168
33
12
R163
R163
10K
10K
12
C220
C220
X_10PF
X_10PF
12
1 2
MM3_CD#
12
R164
R164
10K
10K
R1650R165
0
12
R1670R167
0
R1660R166
0
12
12
R1690R169
12
0
R1700R170
12
0
C221
C221
C222
C222
C223
C223
X_10PF
X_10PF
X_10PF
X_10PF
X_10PF
X_10PF
1 2
1 2
R159
R159
10K
10K
100K, 5%
100K, 5%
C224
C224
X_10PF
X_10PF
1 2
R161
R161
12
C225
C225
X_10PF
X_10PF
1 2
VCC_3V3
12
1 2
C218
C218
12
X_4.7UF
X_4.7UF
C219
C219
12
0.1UF
0.1UF
1
2
3
4
5
6
7
8
9
10
DAT2
DUMMY1
CD/DAT3
CMD
VDD
CLK
VSS
DAT0
DUMMY2
DAT1
J3
J3
15
15
14
14
11
MICRO-SD-CONNECT
MICRO-SD-CONNECT
11
12
12
CARD DETECT6
13
B B
PRELIMINARY SCHEMATICS ONLY - NOT TESTED AND NOT
QUALIFIED FOR MANUFACTURING
VCC_3V3
VCC_3V3
R174
R174
R175
R172
R172
R173
R171
R171
10K
10K
1 2
DBG3_TRST3
DBG3_TDI3
DBG3_TMS3
DBG3_TCK3
DBG3_TDO3
A A
RESET#3,11,14
R185 10KR185 10K
R173
10K
10K
10K
10K
1 2
1 2
12
R175
10K
10K
10K
10K
1 2
1 2
JTAG port
5
4
3
VCC_3V3
DBG3_TRST
DBG3_TDI
DBG3_TMS
DBG3_TCK
DBG3_TDO
H1X8#_BLACK-2.6MM-RH
H1X8#_BLACK-2.6MM-RH
VCC_3V3 3,4,5,8,9,10,11,14
J6
J6
1
2
3
4
5
6
7
8
9
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
2
Date: Sheet
DGND 3,4,5,6,8,9,10,11,13,14
[email protected]
886-2-232345599 ext 8481
886-2-232345599 ext 8481
886-2-232345599 ext 8481
Drawn by Phil Chen
Drawn by Phil Chen
Drawn by Phil Chen
MS-5611
MS-5611
MS-5611
Micro-SD and JTAG
Micro-SD and JTAG
Micro-SD and JTAG
PAGE12 : Micro-SD and JTAG 0B
PAGE12 : Micro-SD and JTAG 0B
PAGE12 : Micro-SD and JTAG 0B
12 14Tuesday, July 17, 2007
12 14Tuesday, July 17, 2007
12 14Tuesday, July 17, 2007
of
of
1
of
Page 13
5
SECURE LEVEL (HARDWARE SELECT)
ADDRESS
A17
0
1
IMAGE UPDATE (HARDWARE SELECT)
ADDRESS
A16
0
D D
C C
B B
A A
1
JTAG (FIRMWARE SELECT)
ADDRESS
A15
0
1
BOOT VECTOR LOCATION (FIRMWARE SELECT)
ADDRESS DESCRIPTION
A14 A13
0 0
0 1
1 0
1 1
JTAG CONFIG (HARDWARE SELECT)
ADDRESS DESCRIPTION
A12 A11
0 0
0 1
1 0
1 1
FIRMWARE BOOT SOURCE PARAMETERS (FIRMWARE SELECT)
A10 A9 A8 A7
X 0 0 1
X 0 1 0 CE-ATA
X 0 1 1
X 1 0 0
X 1 0 1 SPI FLASH BOOT XM2
X 1 1 X
MIO TYPE (FIRMWARE SELECT)
ADDRESS
A6
0
1
MIO BUS WIDTH (FIRMWARE SELECT)
ADDRESS
A5
0
1
USB RECOVERY
ADDRESS
A4
0
1
SDR RAM BUS WIDTH (FIRMWARE SELECT)
ADDRESS
A3
0
1
UART BAUD RATE (HARDWARE SELECT)
ADDRESS
A2
0
1
ROMTYPE (FIRMWARE SELECT)
ADDRESS
A1
0
1
FLASH MEMORY BUS WIDTH (HARDWARE SELECT)
A0(0:16b, 1:8b)
DESCRIPTION
0: INSECURE BOOTING
1: SECURE BOOTONG
DESCRIPTION
0: NO UPDATE FIRMWARE IMAGE
1: UPDATE FIRMWARE IMAGE
DESCRIPTION
0: ENABLE JATG (DEFAULT)
1: DISABLE JTAG
00 = EXT ROM0 (0000:0000)
01 = EXT ROM1(0800:0000)
10 = INTERNAL UART BOOT LOADER
11 = INTERNAL BOOT ROM
00 = Serial (CPU->COP) (DEFAULT)
01 = CPU only (CPU)
10 = COP only (COP)
11 = Parallel (CPU||COP)
ADDRESS
ADDRESS
DESCRIPTION
NAND FLASH
I2C EEPROM
SPI FLASH BOOT AT-S
RESERVED
DESCRIPTION
DESCRIPTION
0 = 16 BIT
1 = 32 BIT (DEFAULT)
DESCRIPTION
0 = ENABLE
1 = DISABLE (DEFAULT)
DESCRIPTION
0 = 16 BIT
1 = 32 BIT (DEFAULT)
DESCRIPTION
0 = 56K BAUD (DEFAULT)
1 = 750K BAUD
DESCRIPTION
0 = ?
1 = NOR FLASH
DESCRIPTION
5
DEFAULT
0FLASH BUS WIDTH
VCC_1V8
VCC_1V8
VCC_1V8
VCC_1V8
VCC_1V8
VCC_1V8
R292
R292
1 2
R294
R294
1 2
R332
R332
1 2
R297
R297
1 2
R298
R298
1 2
R299
R299
1 2
R300
R300
1 2
R301
R301
1 2
R302
R302
1 2
R303
R303
1 2
R293
R293
1 2
R304
R304
1 2
R305
R305
1 2
1 2
option
R310
R310
1 2
R312
R312
1 2
R313
R313
1 2
R314
R314
1 2
R315
R315
1 2
4
XM2_MA[0..20]
XM2_MA17
XM2_MA16
XM2_MA15
XM2_MA14
XM2_MA13
XM2_MA12
XM2_MA11
XM2_MA10
XM2_MA9
XM2_MA8
XM2_MA7
XM2_MA4
XM2_MA3
R306
R306
100K, 5%
100K, 5%
100K, 5%
100K, 5%
100K, 5%
100K, 5%
X_100K, 5%
X_100K, 5%
100K, 5%
100K, 5%
100K, 5%
100K, 5%
100K, 5%
100K, 5%
100K, 5%
100K, 5%
100K, 5%
100K, 5%
100K, 5%
100K, 5%
100K, 5%
100K, 5%
100K, 5%
100K, 5%
X_100K, 5%
X_100K, 5%
100K, 5%
100K, 5%
X_100K, 5%
X_100K, 5%
100K, 5%
100K, 5%
3
XM2_MA[0..20] 3
2
VCC_1V8
VCC_1V8 3,5,8,11
DGND 3,4,5,6,8,9,10,11,12,14
1
PRELIMINARY SCHEMATICS ONLY - NOT TESTED AND NOT
QUALIFIED FOR MANUFACTURING
100K, 5%
100K, 5%
100K, 5%
100K, 5%
100K, 5%
100K, 5%
4
XM2_MA2
XM2_MA1
XM2_MA0
[email protected]
886-2-232345599 ext 8481
886-2-232345599 ext 8481
886-2-232345599 ext 8481
Drawn by Phil Chen
Drawn by Phil Chen
Drawn by Phil Chen
MS-5611
MS-5611
1
MS-5611
13 14Tuesday, July 17, 2007
13 14Tuesday, July 17, 2007
13 14Tuesday, July 17, 2007
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
BOOTSTRAP
BOOTSTRAP
BOOTSTRAP
PAGE13 : BOOTSTRAP 0B
PAGE13 : BOOTSTRAP 0B
PAGE13 : BOOTSTRAP 0B
Page 14
5
4
3
2
1
XM2_MD[0..31]
D D
C C
B B
A A
VCC_3V3
VCC_1V8
VCC_3V3 3,4,5,8,9,10,11,12
VCC_1V8 3,5,8,11,13
DGND 3,4,5,6,8,9,10,11,12,13
5
SDR_CLK3,8
XM2_DQM23,8
SDR_CKE3,8
XM2_CS.A#3
XM2_CS.B#3
XM2_CS_C#3,8
XM2_CS.D#3
XM2_MIO.RDY3
4
VCC_5V0
SDR_CLK
XM2_MD15
XM2_MD14
XM2_MD13
XM2_MD12
XM2_MD11
XM2_MD10
XM2_MD9
XM2_MD8
XM2_MD7
XM2_MD6
XM2_MD5
XM2_MD4
XM2_MD3
XM2_MD2
XM2_MD1
XM2_MD0
VCC_5V0
1 2
R335 0R335 0
1 2
R337 0R337 0
1 2
R339 0R339 0
XM2_MA0
XM2_MA20
XM2_MA19
XM2_MA18
XM2_MA17
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
J13
J13
MICTOR
MICTOR
+5V
GND
CLKa
D15a
D14a
D13a
D12a
D11a
D10a
D9a
D8a
D7a
D6a
D5a
D4a
D3a
D2a
D1a
D0a
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
CLKb
D15b
D14b
D13b
D12b
D11b
D10b
MICTOR PROBE
MICTOR PROBE
GND139GND240GND341GND442GND5
43
J14
J14
MICTOR
MICTOR
+5V
GND
CLKa
D15a
D14a
D13a
D12a
D11a
D10a
D9a
D8a
D7a
D6a
D5a
D4a
D3a
MICTOR PROBE
MICTOR PROBE
D2a
D1a
D0a
GND139GND240GND341GND442GND5
3
SCL
SDA
D9b
D8b
D7b
D6b
D5b
D4b
D3b
D2b
D1b
D0b
43
SCL
SDA
CLKb
D15b
D14b
D13b
D12b
D11b
D10b
D9b
D8b
D7b
D6b
D5b
D4b
D3b
D2b
D1b
D0b
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
XM2_MA[0..20]
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
R336 0R336 0
1 2
XM2_MD31
XM2_MD30
XM2_MD29
XM2_MD28
XM2_MD27
XM2_MD26
XM2_MD25
XM2_MD24
XM2_MD23
XM2_MD22
XM2_MD21
XM2_MD20
XM2_MD19
XM2_MD18
XM2_MD17
XM2_MD16
R338 0R338 0
1 2
CLK_DEV.OUT_M
XM2_MA16
XM2_MA15
XM2_MA14
XM2_MA13
XM2_MA12
XM2_MA11
XM2_MA10
XM2_MA9
XM2_MA8
XM2_MA7
XM2_MA6
XM2_MA5
XM2_MA4
XM2_MA3
XM2_MA2
XM2_MA1
VCC_3V3
VCC_1V8
2
XM2_MD[0..31] 3,8
RESET# 3,11,12
XM2_MA[0..20] 8
CLK_DEV.OUT_M 3
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
[email protected]
886-2-232345599 ext 8481
886-2-232345599 ext 8481
886-2-232345599 ext 8481
Drawn by Phil Chen
Drawn by Phil Chen
Drawn by Phil Chen
MS-5611
MS-5611
MS-5611
MICTOR CONNECTORS
MICTOR CONNECTORS
MICTOR CONNECTORS
PAGE14 : MICTOR CONNECTORS 0B
PAGE14 : MICTOR CONNECTORS 0B
PAGE14 : MICTOR CONNECTORS 0B
14 14Thursday, July 19, 2007
14 14Thursday, July 19, 2007
14 14Thursday, July 19, 2007
of
of
1
of
Loading...