Page 1
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Quartics, Inc.
PC to TV Reference Design
D D
Composite/Component Output
Last Update: April 3, 2007 MHA
Revision D to Revision E Updates:
December 27, 2006 - Add EMI Filters on pages C,D,E,H and J
Revision E to Revision F Updates:
None - Minor Layout changes
C C
Revision F to Revision G Updates:
February 16, 2007 - Add Series resistors for System Clock and Video clocks on page B
Revision G to Revision H Updates:
Revision H to Revision I Updates:
B B
Revision H to Revision I Updates:
Add series resistors to Video Bus on page B
Add Parallel and AC terminations for System Clock and Video Clock on page F
Add 20 NPO caps between +3.3V and GND with new layout (new board stackup)
Changed 32 caps to 100pF C0G
Added changes for FCC: R25, R26, R14, R15, R94, R95, R96, R101, C181, C182
Added R93
Added U12:8 to RESET\
Added U12:5, U1:AF12, and R93:2 to TXD1
Added R101:1 to +3.3V
Added PIC RC0 to GRN LED
Notice of Disclaimer: Quartics is providing this reference design, code or information (the "Quartics Materials") "AS IS" and solely for the purpose of you designing products
that will be sold with Quartics ASIC products. No license or other intellectual property right, whether express or implied, is hereby granted. You will not (i) sublicense, transfer, or
A A
provide access to the Quartics Materials to any third party, (ii) modify or create derivative works of the Quartics Materials, or (iii) reverse engineer, decompile, or disassemble any
software or hardware of Quartics using the Quartics Materials. Except as may be provided in Quartics' Terms and Conditions of Sale for such products, Quartics assumes no liability
whatsoever with respect to the Quartics Materials and will not be liable for any direct, indirect, consequential, incidental, special or punitive damages, including lost profits.
Quartics expressly disclaims all warranties, including any express or implied warranties relating to the Quartics Materials, including warranty of adequacy of the implementation, fitness
for a particular purpose, merchantability, or infringement of any third-party intellectual property right. Quartics Materials are not intended for use in medical, life saving, or life sustaining
applications. Quartics may make changes to specifications and product descriptions at any time, without notice.
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Quartics, Inc.
Quartics, Inc.
Quartics, Inc.
Title
Title
Title
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc> J
B
<Doc> J
B
<Doc> J
B
11 1 Tuesday, April 10, 2007
11 1 Tuesday, April 10, 2007
11 1 Tuesday, April 10, 2007
of
of
Date: Sheet
Date: Sheet
Date: Sheet
1
of
Page 2
5
D D
U1A
U1A
W26
V24
Y23
Y24
Y25
V23
Y26
AA23
V22
W23
AA25
AA26
AA22
Y22
AD20
AC20
AC19
AB18
AD18
AB19
AB20
AC18
AB21
AD19
U22
U24
R24
T22
R25
R26
T24
T26
U25
U26
V25
V26
W25
U23
ADDR[00]
ADDR[01]
ADDR[02]
ADDR[03]
ADDR[04]
ADDR[05]
ADDR[06]
ADDR[07]
ADDR[08]
ADDR[09]
ADDR[10]
ADDR[11]
ADDR[12]
ADDR[13]
ADDR[14]
ADDR[15]
ADDR[16]
ADDR[17]
ADDR[18]
ADDR[19]
ADDR[20]
ADDR[21]
ADDR[22]
ADDR[23]
OE_n
WE_n
CS_n[0]
CS_n[1]
CS_n[2]
CS_n[3]
CS_n[4]
CS_n[5]
CS_n[6]
CS_n[7]
BLS_n[0]
BLS_n[1]
BLS_n[2]
BLS_n[3]
QV1501
QV1501
SD_RAS_n
SD_CAS_n
SD_CS_n[0]
SD_CS_n[1]
SD_DQM[0]
SD_DQM[1]
SD_DQM[2]
SD_DQM[3]
SD_CKE[0]
SD_CKE[1]
SD_CLKOUT
SD_CLKIN
A1
A2
A3
A5 VSD_D20
A6
A7
A8
A9
A10
A11
OE/
WE/
BOOT_CS/
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
5
C C
FLASH_OE/
FLASH_WE/
BOOT_CS/
B B
A A
DATA[00]
DATA[01]
DATA[02]
DATA[03]
DATA[04]
DATA[05]
DATA[06]
DATA[07]
DATA[08]
DATA[09]
DATA[10]
DATA[11]
DATA[12]
DATA[13]
DATA[14]
DATA[15]
DATA[16]
DATA[17]
DATA[18]
DATA[19]
DATA[20]
DATA[21]
DATA[22]
DATA23]
DATA[24]
DATA[25]
DATA[26]
DATA[27]
DATA[28]
DATA[29]
DATA[30]
DATA[31]
SD_WE_n
AB22
AB23
AB24
AB25
AB17
AB26
AC21
AC22
AC17
AC23
AC24
AC26
AD26
AD24
AD17
AB16
AD23
AE26
AE25
AC16
AE24
AF25
AF24
AD22
AD16
AD21
AB15
AF23
AF22
AE22
AC15
AE21
AC14
AF16
AE15
AB14
AF18
AF21
AF20
AF19
AD15
AF15
AE14
AE19
W22
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
SD_RAS/
SD_CAS/
SD_WE/
SD_CS/
DQM0
DQM1
DQM2
DQM3
SD_CKE
4
R14 75 R14 75
4
SD_RAS/
SD_CAS/
SD_WE/
SD_CS/
DQM0
DQM1
DQM2
DQM3
SD_CKE
SD_CLK
A[0..22]
D[0..31]
U1I
U1I
VMD[00]
VMD[01]
VMD[02]
VMD[03]
VMD[04]
VMD[05]
VMD[06]
VMD[07]
VMD[08]
VMD[09]
VMD[10]
VMD[11]
VMD[12]
VMD[13]
VMD[14]
VMD[15]
VMD[16]
VMD[17]
VMD[18]
VMD[19]
VMD[20]
VMD[21]
VMD[22]
VMD[23]
VMD[24]
VMD[25]
VMD[26]
VMD[27]
VMD[28]
VMD[29]
VMD[30]
VMD[31]
VSD_RAS_n
VSD_CAS_n
VSD_WE_n
VSD_BA[0]
VSD_BA[1]
VMA[11]
VMA[10]
VMA[09]
VMA[08]
VSD_CLK
INREF(B)
IOCTRL(B)
IOCTRL(B)
QV1501
QV1501
U1H
U1H
3WS_CLK
3WS_SDA
3WS_STRB
PCI_ARB_FRAME_n
PCI_ARB_IRDY_n
PCI_ARB_REQ_n[0]
PCI_ARB_GNT_n[0]
PCI_ARB_REQ_n[1]
PCI_ARB_GNT_n[1]
PCI_ARB_REQ_n[2]
PCI_ARB_GNT_n[2]
VMA[00]
VMA[01]
VMA[02]
VMA[03]
VMA[04]
VMA[05]
VMA[06]
VMA[07]
GND
GND
GND
QV1501
QV1501
A15
A16
A17
A18
A20
A21
B15
B16
B19
B20
C13
C15
C16
C19
C20
C21
D14
D15
D16
D17
D18
D19
D20
D21
D22
E14
E15
E16
E17
E18
E19
E20
E21
E22
E23
F22
G22
G23
G24
H23
J23
J24
C17
C18
A19
A22
A23
B22
B23
C23
D23
E26
F23
F25
F26
G25
G26
H25
J22
K23
K24
N22
N23
N24
B24
A25
B25
3
VSD_D0
VSD_D1
VSD_D2
VSD_D3
VSD_D4
VSD_D5
VSD_D6
VSD_D7
VSD_D8
VSD_D9
VSD_D10
VSD_D11
VSD_D12
VSD_D13
VSD_D14
VSD_D15 A0
VSD_D16
VSD_D17
VSD_D18
VSD_D19 A4
VSD_D21
VSD_D22
VSD_D23
VSD_D24
VSD_D25
VSD_D26
VSD_D27
VSD_D28
VSD_D29
VSD_D30
VSD_D31
3
R15 75 R15 75
VSD_D[0..31]
VSD_RAS/
VSD_CAS/
VSD_WE/
VSD_BA0
VSD_BA1
VSD_A11
VSD_A10
VSD_A9
VSD_A8
VSD_CLK
AV_SCK
AV_SDO
AV_STRB
FRAME/
IRDY/
PCI_REQ0/
PCI_GNT0/
PCI_REQ1/
PCI_GNT1/
VSD_A0
VSD_A1
VSD_A2
VSD_A3
VSD_A4
VSD_A5
VSD_A6
VSD_A7
U1L
U1L
QV1501
QV1501
U1M
U1M
COMP[00]
COMP[01]
COMP[02]
COMP[03]
COMP[04]
COMP[05]
COMP[06]
COMP[07]
COMP[08]
COMP[09]
COMP[10]
COMP[11]
COMP_CLK
GPOUT[1]
GPOUT[2]
V_SYNCT
QV1501
QV1501
2
VID_GPO[0]
DVI_DE
DVI_CLK_OUT
HSYNC
VSYNC
RED[00]
RED[01]
RED[02]
RED[03]
RED[04]
RED[05]
RED[06]
RED[07]
INREF(C)
IOCTRL(C)
IOCTRL(C)
U1J
U1J
GREEN[00]
GREEN[01]
GREEN[02]
GREEN[03]
GREEN[04]
GREEN[05]
GREEN[06]
GREEN[07]
BLUE[00]
BLUE[01]
BLUE[02]
BLUE[03]
BLUE[04]
BLUE[05]
BLUE[06]
BLUE[07]
BLANKn
SYNCn
VCLK_OUT
GND
IOCTRL(D)
INREF(D)
QV1501
QV1501
B6
A6
D9
D10
C10
B8
D11
A8
B9
C11
D12
B10
A11
NC
D13
A10
C12
B11
2
1
E6
E7
E8
E9
E10
E11
E12
E13
F6
G4
G5
J4
J5
A7
C8
C9
A2
A3
C3
C4
D5
E5
F5
G1
G3
J1
H1
H2
K1
K2
K3
K5
M3
M4
M5
F4
D4
E4
4 5
3
6
2
7
1
8
6
7
8
6
7
8
RN1 33N RN1 33N
4 5
3
2
1
RN2 33N RN2 33N
4 5
3
2
1
RN3 33N RN3 33N
COMP0
COMP1
COMP2
COMP3
COMP4
COMP5
COMP6
COMP7 COMP7
COMP8
COMP9
COMP10
COMP11
R133R1
R99 33 R99 33
R100 33 R100 33
33
Quartics, Inc.
Quartics, Inc.
Quartics, Inc.
Title
Title
Title
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc> J
B
<Doc> J
B
<Doc> J
B
Date: Sheet
Date: Sheet
Date: Sheet
1
21 1 Tuesday, April 10, 2007
21 1 Tuesday, April 10, 2007
21 1 Tuesday, April 10, 2007
HSYNC
VSYNC
COMP[0..11]
COMPCLKP
of
of
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Page 3
5
+3.3V
C75
C75
C79
C79
100pF
100pF
100pF
100pF
D D
C80
C80
100pF
100pF
C109
C109
100pF
100pF
C183
C183
100pF
100pF
C184
C184
100pF
100pF
C185
C185
100pF
100pF
C186
C186
100pF
100pF
4
3
2
1
+1.95V +3.3V
C196
C187
C187
100pF
100pF
C188
C188
100pF
100pF
C194
C194
100pF
100pF
C197
C197
100pF
100pF
C189
C189
100pF
100pF
C190
C190
100pF
100pF
C191
C191
100pF
100pF
C192
C192
100pF
100pF
C193
C193
100pF
100pF
C195
C195
100pF
100pF
C196
100pF
100pF
C198
C198
100pF
100pF
C12
C12
0.1uF
0.1uF
FB1FBFB1
FB
C72
C72
0.1uF
0.1uF
FB2FBFB2
FB
FB3FBFB3
FB
C73
C73
0.1uF
0.1uF
0.1uF
0.1uF
C74
C74
FB4FBFB4
FB
+3.3V
C27
C27
0.1uF
0.1uF
C47
C47
0.1uF
0.1uF
+1.95V
0.01uF
0.01uF
C28
C28
C50
C50
0.01uF
0.01uF
+1.95V
C8
0.1uFC80.1uF
+3.3V
C1
0.1uFC10.1uF
+3.3V
C35
C35
0.1uF
0.1uF
C51
C51
0.1uF
0.1uF
C2
0.01uFC20.01uF
C9
0.01uFC90.01uF
C36
C36
0.01uF
0.01uF
C52
C52
0.01uF
0.01uF
+1.95V
+1.95V
C17
C17
0.1uF
0.1uF
+3.3V
C10
C10
0.1uF
0.1uF
+3.3V
C37
C37
0.1uF
0.1uF
C53
C53
0.1uF
0.1uF
C3
0.01uFC30.01uF
C18
C18
0.01uF
0.01uF
C38
C38
0.01uF
0.01uF
C54
C54
0.01uF
0.01uF
+1.95V
+1.95V
C6
0.1uFC60.1uF
C20
C20
0.1uF
0.1uF
+3.3V
C39
C39
0.1uF
0.1uF
+3.3V
C7
0.01uFC70.01uF
C21
C21
0.01uF
0.01uF
C55
C55
0.1uF
0.1uF
C40
C40
0.01uF
0.01uF
C56
C56
0.01uF
0.01uF
F13
F14
F19
F21
G21
N21
AA13
AA17
AA21
H22
P23
L25
U21
V21
W21
W24
AA8
AA9
AA10
AA14
AA15
AA18
AA19
AC2
AC5
AC9
AE9
AE13
AE17
AE20
AE23
AC25
R210R2
C166
C166
1000pF
1000pF
C30
C30
0.1uF
0.1uF
C44
C44
0.1uF
0.1uF
C22
C22
0.1uF
0.1uF
+3.3V
+3.3V
10
+3.3V
C13
C13
0.01uF
0.01uF
0.01uF
0.01uF
0.01uF
0.01uF
0.01uF
0.01uF
C31
C31
C45
C45
C23
C23
C168
C168
1000pF
1000pF
C24
C24
0.1uF
0.1uF
C32
C32
0.1uF
0.1uF
C46
C46
0.1uF
0.1uF
+3.3V
+3.3V
U1D
U1D
F7
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V
V3V_CPU_PLL
V3V_FB_PLL
VCC_CPU_PLL
VCC_FB_PLL
QV1501
QV1501
F8
H6
P6
Y6
H3
N3
N5
W3
W6
VCCIO(A)
VCCIO(A)
VCCIO(A)
VCCIO(A)
VCCIO(A)
VCCIO(A)
VCCIO(A)
VCCIO(B)
VCCIO(B)
VCCIO(B)
VCCIO(B)
VCCIO(B)
VCCIO(C)
VCCIO(C)
VCCIO(C)
VCCIO(C)
VCCIO(C)
VCCIO(C)
VCCIO(D)
VCCIO(D)
VCCIO(D)
VCCIO(D)
VCCIO(D)
VCCIO(D)
VCCIO(D)
P5
C11
C11
0.01uF
0.01uF
P22
R6
P21
D25
H24
J21
K21
L21
P24
A24
B17
B21
F16
F17
F18
A9
A12
C5
F9
F10
F11
C2
J3
P3
J6
K6
L6
M6
M26
NC
P25
NC
R4
NC
T5
NC
AE16
NC
AF13
NC
AF14
NC
AF17
NC
0.01uF
0.01uF
C29
C29
0.01uF
0.01uF
C43
C43
0.01uF
0.01uF
C19
C19
+3.3V
R410R4
R310R3
10
10
C4
0.01uFC40.01uF
C15
C15
0.01uF
0.01uF
C171
C171
1000pF
1000pF
0.1uF
0.1uF
C16
C16
R510R5
10
+3.3V
C34
C34
C33
C33
0.1uF
0.01uF
0.01uF
0.1uF
+3.3V
C49
C49
C48
C48
0.1uF
0.01uF
0.01uF
0.1uF
U1E
U1E
A1
GND
A26
GND
B7
GND
B13
GND
B18
GND
C22
GND
D3
GND
D24
GND
F12
GND
F15
GND
F20
GND
G6
GND
H4
GND
H21
GND
J2
GND
K10
GND
K11
GND
K12
GND
+3.3V
K13
K14
K15
K16
K17
K25
K26
L10
L11
L12
L13
L14
L15
L16
L17
L26
M10
M11
M12
M13
M14
M15
M16
M17
M21
N10
N11
N12
N13
N14
N15
N16
N17
M1
N6
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND_C_PLL
GND_F_PLL
C C
B B
A A
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
QV1501
QV1501
P10
P11
P12
P13
P14
P15
P16
P17
R10
R11
R12
R13
R14
R15
R16
R17
T10
T11
T12
T13
T14
T15
T16
T17
T25
U2
U10
U11
U12
U13
U14
U15
U16
U17
V1
V2
V6
Y21
AA6
AA7
AA11
AA12
AA16
AA20
AA24
AC3
AD25
AE4
AE7
AE11
AE18
AF1
AF26
U6
T21
+3.3V
+3.3V
C25
C25
0.1uF
0.1uF
C41
C41
0.1uF
0.1uF
C26
C26
0.01uF
0.01uF
C42
C42
0.01uF
0.01uF
+3.3V
C199
C199
100pF
100pF
C200
C200
100pF
100pF
C201
C201
100pF
100pF
5
C202
C202
100pF
100pF
C203
C203
100pF
100pF
C204
C204
100pF
100pF
C205
C205
100pF
100pF
C207
C207
100pF
100pF
C208
C208
100pF
100pF
4
C209
C209
100pF
100pF
C206
C206
100pF
100pF
C211
C211
100pF
100pF
Quartics, Inc.
Quartics, Inc.
Quartics, Inc.
Title
Title
Title
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc> J
B
<Doc> J
B
<Doc> J
B
31 1 Tuesday, April 10, 2007
31 1 Tuesday, April 10, 2007
31 1 Tuesday, April 10, 2007
of
of
Date: Sheet
Date: Sheet
3
2
Date: Sheet
1
of
Page 4
5
4
3
2
1
C61
C61
0.1uF
0.1uF
C67
C67
0.1uF
0.1uF
+3.3V
+1.95V
C62
C62
0.01uF
0.01uF
C68
C68
0.01uF
0.01uF
L1
U2
VIN1
VIN2
RUN1
RUN2
FREQ
MODE
PHASE
PGND2
17
U2
LTC3417
LTC3417
PGND1
16
VFB1
VFB2
GNDA
13
SW1
SW2
PGD
ITH1
ITH2
15
4
10
5
11
3
6
D D
D1
D1
B220A-13
J1
J1
PJ-102A
PJ-102A
C C
B B
1
3
NC
NC
2
2 3
L501
L501
ACM4532-601-2P
ACM4532-601-2P
B220A-13
1
4
C165
C165
1000pF
1000pF
F1
6V/2.6AF16V/2.6A
L10
L10
ACH3218-330
ACH3218-330
L11
L11
ACH3218-330
ACH3218-330
2
8
C59
C59
C60
68uF
68uF
C60
10uF
10uF
C63
C63
0.1uF
0.1uF
C64
C64
0.1uF
0.1uF
+
+
1
7
12
9
14
1.7uHL11.7uH
L2
2.2uHL22.2uH
R10
R10
5.9K
5.9K
C70
C70
2200pF
2200pF
R7
665KR7665K
1%
R8
499KR8499K
1%
R11
R11
5.9K
5.9K
C71
C71
2200pF
2200pF
MMBT3904
MMBT3904
C58
C58
47uF
C69
C69
6800pF
6800pF
47uF
C66
C66
47uF
47uF
C57
C57
R6
10pF
10pF
215KR6215K
1%
C65
C65
R9
10pF
10pF
348KR9348K
1%
R122KR12
R13
R13
68K
68K
2K
Q1
Q1
FB5FBFB5
SW1
SW1
EVQ-Q2U03W
EVQ-Q2U03W
1 4
2 3
R16
R16
+1.95V
845K
A A
845K
1%
C78
C78
0.1uF
0.1uF
R17
R17
162K
162K
1%
5
+3.3V
C76
C76
0.1uF
0.1uF
5
U4
U4
MIC2774L-31YM5TR
RST
2
MIC2774L-31YM5TR
1
4
VDD
3
MR
4
IN
GND
+3.3V
R92
R92
10K
10K
RESET/
Quartics, Inc.
Quartics, Inc.
Quartics, Inc.
Title
Title
Title
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc> J
B
<Doc> J
B
<Doc> J
B
Date: Sheet
Date: Sheet
3
2
Date: Sheet
FB
C77
C77
0.1uF
0.1uF
41 1 Tuesday, April 10, 2007
41 1 Tuesday, April 10, 2007
41 1 Tuesday, April 10, 2007
of
of
1
of
Page 5
5
4
3
2
1
+3.3V
C170
C170
0.01uF
D D
0.01uF
+3.3V
C167
C167
0.01uF
0.01uF
AV_STRB
AV_SDO
C C
B B
AV_SCK
FB19
FB19
FB-600
FB-600
FB18
FB18
FB-600
FB-600
C172
C172
1000pF
1000pF
C169
C169
1000pF
1000pF
R19
R19
249K
249K
1%
20pF
20pF
C82
C82
20
19
15
1
6
5
VDD
STROBE
DATA
SCLK
GND
GND
X1
3
17
VDD
Y1
25MHzY125MHz
16
VDD
CLK1
CLK2
CLK3
CLK4
CLK5
CLK6
CLK7
CLK8
CLK9
PDTS
X2
2
U5
ICS308U5ICS308
7
8
9
10
14
13
12
11
4
18
C83
C83
20pF
20pF
C173
C173
1000pF
1000pF
FB6
FB6
FB-600
FB-600
R2262R22
R1862R18
R2062R20
R2362R23
R2462R24
R2133R21
+3.3V
C81
C81
0.01uF
0.01uF
62
LAN_CLK
62
POUT
33
62
62
PCI_CLK
62
CPU_CLK
+3.3V
B12
RESERVED-3V3
L1
RESERVED-3V3
M2
RESERVED-3V3
N2
A A
5
4
M25
R23
R21
R22
NC
RESERVED-GND
RESERVED-GND
RESERVED-GND
NC
RESERVED-GND
PCI_ARB_CLK
GND
GND
GND
GND
VLCK_IN
AUDCLK_IN
GND
U1K
U1K
QV1501
QV1501
3
L2
N4
J26
J25
H26
A14
B14
C14
A13
Quartics, Inc.
Quartics, Inc.
Quartics, Inc.
Title
Title
Title
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc> J
B
<Doc> J
B
<Doc> J
B
51 1 Tuesday, April 10, 2007
51 1 Tuesday, April 10, 2007
51 1 Tuesday, April 10, 2007
of
of
Date: Sheet
Date: Sheet
2
Date: Sheet
1
of
Page 6
D[0..31]
A[0..22]
5
4
3
2
1
D D
C C
B B
VSD_D[0..31]
VSD_A0
VSD_A1
VSD_A2
VSD_A3
VSD_A4
VSD_A5
VSD_A6
VSD_A7
VSD_A8
VSD_A9
VSD_A10
VSD_A11
VSD_BA0
VSD_BA1
VSD_RAS/
VSD_CAS/
VSD_WE/
VSD_CLK
C181
C181
0R-Jumper
0R-Jumper
+3.3V
C85
C85
0.1uF
0.1uF
C89
C89
0.1uF
0.1uF
C93
C93
0.1uF
0.1uF
R93
R93
150
150
R94
R94
150
150
C86
C86
0.1uF
0.1uF
C90
C90
0.1uF
0.1uF
C94
C94
0.1uF
0.1uF
U6
U6
25
26
27
60
61
62
63
64
65
66
24
21
22
23
19
18
20
17
16
71
28
59
+3.3V
67
68
+3.3V +3.3V
1
15
29
43
3
9
35
41
49
55
75
81
14
30
57
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
DQ10
A10
DQ11
A11
DQ12
DQ13
BA0
DQ14
BA1
DQ15
DQ16
RAS#
DQ17
CAS#
DQ18
DQ19
CS#
DQ20
WE#
DQ21
DQ22
DQM0
DQ23
DQM1
DQ24
DQM2
DQ25
DQM3
DQ26
DQ27
CKE
DQ28
CLK
DQ29
DQ30
DQ31
VDD
VDD
VDD
VDD
VSSQ
VDDQ
VSSQ
VDDQ
VSSQ
VDDQ
VSSQ
VDDQ
VSSQ
VDDQ
VSSQ
VDDQ
VSSQ
VDDQ
VSSQ
VDDQ
NC
NC
NC
MT48LC4M32
MT48LC4M32
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
VSS
VSS
VSS
VSS
NC
NC
NC
Video Memory
VSD_D0
2
VSD_D1
4
VSD_D2
5
VSD_D3
7
VSD_D4
8
VSD_D5
10
VSD_D6
11
VSD_D7
13
VSD_D8
74
VSD_D9
76
VSD_D10
77
VSD_D11
79
VSD_D12
80
VSD_D13
82
VSD_D14
83
VSD_D15
85
VSD_D16
31
VSD_D17
33
VSD_D18
34
VSD_D19
36
VSD_D20
37
VSD_D21
39
VSD_D22
40
VSD_D23
42
VSD_D24
45
VSD_D25
47
VSD_D26
48
VSD_D27
50
VSD_D28
51
VSD_D29
53
VSD_D30
54
VSD_D31
56
44
58
72
86
6
12
32
38
46
52
78
84
69
70
73
SD_CLK
+3.3V
C182
C182
0R-Jumper
0R-Jumper
R95
R95
150
150
R96
R96
150
150
SD_RAS/
SD_CAS/
SD_CS/
SD_WE/
DQM0
DQM1
DQM2
DQM3
SD_CKE
C87
C87
0.1uF
0.1uF
C91
C91
0.1uF
0.1uF
C95
C95
0.1uF
0.1uF
C88
C88
0.1uF
0.1uF
C92
C92
0.1uF
0.1uF
C96
C96
0.1uF
0.1uF
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A13
A14
25
A0
26
A1
27
A2
60
A3
61
A4
62
A5
63
A6
64
A7
65
A8
66
A9
24
A10
21
A11
22
BA0
23
BA1
19
RAS#
18
CAS#
20
CS#
17
WE#
16
DQM0
71
DQM1
28
DQM2
59
DQM3
67
CKE
68
CLK
1
VDD
15
VDD
29
VDD
43
VDD
3
VDDQ
9
VDDQ
35
VDDQ
41
VDDQ
49
VDDQ
55
VDDQ
75
VDDQ
81
VDDQ
14
NC
30
NC
57
NC
MT48LC4M32
MT48LC4M32
CPU Memory
U7
U7
2
DQ0
4
DQ1
5
DQ2
7
DQ3
8
DQ4
10
DQ5
11
DQ6
13
DQ7
74
DQ8
76
DQ9
77
DQ10
79
DQ11
80
DQ12
82
DQ13
83
DQ14
85
DQ15
31
DQ16
33
DQ17
34
DQ18
36
DQ19
37
DQ20
39
DQ21
40
DQ22
42
DQ23
45
DQ24
47
DQ25
48
DQ26
50
DQ27
51
DQ28
53
DQ29
54
DQ30
56
DQ31
44
VSS
58
VSS
72
VSS
86
VSS
6
VSSQ
12
VSSQ
32
VSSQ
38
VSSQ
46
VSSQ
52
VSSQ
78
VSSQ
84
VSSQ
69
NC
70
NC
73
NC
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15
D16
D17
D18
D19
D20
D21
D22
D23
D24
D25
D26
D27
D28
D29
D30
D31
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
A22
S29GL064A
S29GL064A
25
24
23
22
21
20
19
18
8
7
6
5
4
3
2
1
48
17
16
9
10
13
12
26
28
11
U8
U8
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
RESET#
CE#
OE#
WE#
+3.3V
VCC
VSS
27
37
WP#/ACC
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15/A-1
RY/BY#
BYTE#
VSS
46
C84
C84
0.1uF
0.1uF
D0
29
D1
31
D2
33
D3
35
D4
38
D5
40
D6
42
D7
44
D8
30
D9
32
D10
34
D11
36
D12
39
D13
41
D14
43
D15
45
15
+3.3V
47
14
C97
C97
0.1uF
0.1uF
C101
C101
0.1uF
0.1uF
C98
C98
0.1uF
0.1uF
C102
C102
0.1uF
0.1uF
C99
0.1uF
0.1uF
C103
C103
0.1uF
0.1uF
C100
C100
0.1uF
0.1uF
C104
C104
0.1uF
0.1uF
RESET/
BOOT_CS/
FLASH_OE/
C99
FLASH_WE/
A A
C105
C105
0.1uF
0.1uF
5
C106
C106
0.1uF
0.1uF
C107
C107
0.1uF
0.1uF
4
C108
C108
0.1uF
0.1uF
Quartics, Inc.
Quartics, Inc.
Quartics, Inc.
Title
Title
Title
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc> J
B
<Doc> J
B
<Doc> J
B
61 1 Tuesday, April 10, 2007
61 1 Tuesday, April 10, 2007
61 1 Tuesday, April 10, 2007
of
of
Date: Sheet
Date: Sheet
3
2
Date: Sheet
1
of
Page 7
5
R29
R28
R28
4.7K
4.7K
R29
4.7K
4.7K
R30
R30
4.7K
4.7K
R27
R27
4.7K
D D
C C
FRAME/
IRDY/
PCI_REQ0/
PCI_GNT0/
4.7K
+3.3V
R361KR36
B B
PCI_IRQA/
PCI_IRQB/
PCI_CLK
PCI_REQ1/
PCI_GNT1/
RESET/
A A
1K
R31
R31
4.7K
4.7K
4
+3.3V
R32
R32
R33
R33
4.7K
4.7K
4.7K
4.7K
U1B QV1501 U1B QV1501
AC4
PCI_C_BE_N[0]
AB1
PCI_C_BE_N[1]
AD7
PCI_C_BE_N[2]
AB6
PCI_C_BE_N[3]
AB8
PCI_TRDY_n
AD8
PCI_DEVSEL_n
AB7
PCI_STOP_N
AB9
PCI_SERR_n
AD6
PCI_PERR_n
AC8
PCI_FRAME_n
AC7
PCI_IRDY_n
AC6
PCI_PAR
Y2
PCI_IDSEL
U5
PCI_REQ_n
Y3
PCI_GNT_n
U4
PCI_INTA_n
W1
PCI_RST_n
AA5
PCI_CLK
QV1501
QV1501
CBE1TR
CBE3TR
CBEIN[0]
CBEIN[1]
CBEIN[2]
CBEIN[3]
U1N
U1N
PCI_AD[00]
PCI_AD[01]
PCI_AD[02]
PCI_AD[03]
PCI_AD[04]
PCI_AD[05]
PCI_AD[06]
PCI_AD[07]
PCI_AD[08]
PCI_AD[09]
PCI_AD[10]
PCI_AD[11]
PCI_AD[12]
PCI_AD[13]
PCI_AD[14]
PCI_AD[15]
PCI_AD[16]
PCI_AD[17]
PCI_AD[18]
PCI_AD[19]
PCI_AD[20]
PCI_AD[21]
PCI_AD[22]
PCI_AD[23]
PCI_AD[24]
PCI_AD[25]
PCI_AD[26]
PCI_AD[27]
PCI_AD[28]
PCI_AD[29]
PCI_AD[30]
PCI_AD[31
3
D7
A4
B5
A5
C7
C6
AB10
AD11
AF3
AE3
AD10
AD5
AF2
AE2
AC10
AE1
AD1
AD2
AD3
AD4
AC1
AD9
Y5
W5
AB5
AA4
V5
AB2
AB3
W4
AB4
AA1
AA2
V3
AA3
Y4
Y1
V4
R371KR37
1K
R381KR38
1K
104
100
112
121
45
59
73
86
96
99
94
95
92
91
90
87
85
84
81
80
79
78
75
76
60
57
58
53
54
51
52
47
46
41
44
39
42
35
38
33
56
66
72
68
67
71
64
61
48
20
17
25
29
30
26
65
34
16
21
22
36
43
93
98
2
C/BE[3]#
C/BE[2]#
C/BE[1]#
C/BE[0]#
AD[00]
AD[01]
AD[02]
AD[03]
AD[04]
AD[05]
AD[06]
AD[07]
AD[08]
AD[09]
AD[10]
AD[11]
AD[12]
AD[13]
AD[14]
AD[15]
AD[16]
AD[17]
AD[18]
AD[19]
AD[20]
AD[21]
AD[22]
AD[23]
AD[24]
AD[25]
AD[26]
AD[27]
AD[28]
AD[29]
AD[30]
AD[31]
PAR
TRDY#
DEVSEL#
STOP#
SERR#
PERR#
FRAME#
IRDY#
IDSEL
INTA#
INTB#
CLK
REQ#
GNT#
RST#
CLKRUN#
PME#
M66EN
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
J2
MINIPCIJ2MINIPCI
TIP
RING
8PMJ-1
8PMJ-2
8PMJ-3
8PMJ-4
8PMJ-5
8PMJ-6
8PMJ-7
8PMJ-8
LED1_GRNP
LED1_GRNN
LED2_YELP
LED2_YELN
AC_RST#
AC_SYNC
AC_SDAO
AC_SDAI
AC_BCLK
AC_ID0#
AC_CODEC_ID#1
VCC5VA
MPCIACT#
MOD_AUDIO_MON
SYS_AUDIO_IN
SYS_AUDIO_IN GND
SYS_AUDIO_OUT
SYS_AUDIO_OUT GND
AUDIO_GND
AUDIO_GND
AUDIO_GND
3.3VAUX
3.3VAUX
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
3.3V
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
CHSGND
LATCH
LATCH
1
1
2
4
6
3
8
10
5
7
9
11
13
12
14
110
103
106
105
107
108
109
123
122
111
116
118
115
117
113
119
120
18
5V
97
5V
24
124
19
28
31
40
63
70
88
89
23
27
32
37
49
50
55
62
69
74
77
82
83
101
102
114
15
125
126
+3.3V
R34
R34
470
470
R35
R35
470
470
WANLED
Quartics, Inc.
Quartics, Inc.
Quartics, Inc.
Title
Title
Title
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc> J
B
<Doc> J
B
<Doc> J
B
71 1 Tuesday, April 10, 2007
71 1 Tuesday, April 10, 2007
71 1 Tuesday, April 10, 2007
of
of
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
of
Page 8
5
4
3
2
1
+3.3V
FB20FBFB20
FB
C176
C176
1000pF
D D
1000pF
C175
C175
0.1uF
0.1uF
+3.3V
FB7FBFB7
FB
C174
C174
1000pF
1000pF
14
U9
16
21
20
19
18
22
24
23
25
26
42
48
46
47
29
35
7
6
5
4
3
2
1
DVDD33
TX_CLK
TXD0
TXD1
TXD2
TXD3
TX_EN
RX_CLK
RXD0
RXD1
RXD2
RXD3
CRS_DV
RX_ER
COL
CRS
MDC
MDIO
RESET_N
INTR
X1
X2
AGND
AGND
U1F
U1F
T1
TXCLK
L3
TXD[0]
C1
TXD[1]
L5
TXD[2]
B1
TXD[3]
E3
TXEN
C C
RESET/
RXCLK
RXD[0]
RXD[1]
RXD[2]
RXD[3]
RXDV
RXERR
MDC
MDIO
QV1501
QV1501
COL
CRS
T2
F2
E1
E2
D1
L4
D2
F1
G2
F3
K4
LAN_IRQ/
LAN_CLK
B B
R441KR44
1K
R453KR45
3K
IP101AU9IP101A
36
AVDD33
MDI_TN
MDI_TP
MDI_RN
MDI_RP
REGOUT
REGI
AN_ENA
DPLX
SPD
RPTR
APS
ISOL
MII_SNIB
TEST_ON
PHYAD0/LED0
PHYAD1/LED1
PHYAD2/LED2
PHYAD3/LED3
PHYAD4/LED4
ISET
GND11GND17GND
45
33
34
30
31
32
C113
C113
+
+
22uF
22uF
8
37
38
39
40
41
43
44
27
9
10
12
13
15
28
R46
R46
6.19K
6.19K
C114
C114
0.1uF
0.1uF
R47
R47
5.1K
5.1K
R48
R48
5.1K
5.1K
C110
C110
0.1uF
0.1uF
FB9FBFB9
FB
R49
R49
5.1K
5.1K
R50
R50
5.1K
5.1K
R51
R51
5.1K
5.1K
FB8FBFB8
FB
C111
C111
0.1uF
0.1uF
C112
C112
0.01uF
0.01uF
WANLED
R39
R39
49.9
49.9
C115
C115
0.1uF
0.1uF
R40
R40
49.9
49.9
R41
R41
49.9
49.9
C116
C116
0.1uF
0.1uF
R42
R42
49.9
49.9
LINK STATUS
R43
R43
470
470
10
11
12
13
14
3
1
2
8
7
5
6
4
9
J3
J3
TXÂTX+
TXCT
NC
NC
RXCT
RXÂRX+
GRN+
GRNÂYELÂYEL+
Chassis
Chassis
LU1S041A
LU1S041A
A A
Quartics, Inc.
Quartics, Inc.
Quartics, Inc.
Title
Title
Title
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc> J
B
<Doc> J
B
<Doc> J
B
81 1 Tuesday, April 10, 2007
81 1 Tuesday, April 10, 2007
81 1 Tuesday, April 10, 2007
of
of
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
1
of
Page 9
5
4
3
2
1
FB10FBFB10
FB
+3.3VAUD
R5210R52
10
D D
+3.3V
+3.3VAUD
C119
C119
10uF
10uF
C120
C120
10uF
10uF
C124
C124
0.1uF
0.1uF
TVDD31DVDD30DVSS29AVSS28AVDD27VCOM
7
SDATA
4
MCLK
5
BICK
6
LRCK
23
LIN
24
RIN
21
LAUX
22
RAUX
3
CS
1
CDTI/SDA
2
CCLK/SCL
8
PDN
32
I2C
CP
9
+3.3VAUD
R59
R59
10K
10K
R5351R53
51
R5551R55
51
R5451R54
51
R5851R58
51
+3.3V
R60
R60
2.2K
2.2K
+3.3V
R61
R61
2.2K
2.2K
U1G
U1G
C C
I2S_LRCLK
CLK_GPO[0]
CLK_GPO[1]
VID_GPO[4]
VID_GPO[3]
VID_GPO[2]
VID_GPO[1]
AUD_GPO
B B
QV1501
QV1501
I2S_SDO
I2S_MCLK
I2S_SCLK
3WS_CSn
I2C_SDA
I2C_SCL
GND
GND
L24
B26
L23
E24
M24
NC
C24
C25
C26
E25
F24
K22
L22
M22
M23
D26
N25
N26
I2C_SCL
C121
C121
0.1uF
0.1uF
CN10PVDD11PVSS12PVEE13HVEE
C130
C130
2.2uF
2.2uF
U10
U10
AK4342
AK4342
C131
C131
0.1uF
0.1uF
C133
C133
10uF
10uF
C117
C117
10uF
10uF
C122
C122
0.1uF
0.1uF
C132
C132
2.2uF
2.2uF
C118
C118
10uF
10uF
C123
C123
0.1uF
0.1uF
26
15
HPL
HPR
ROUT
LOUT
HVDD
HVSS
MUTET
R56
+3.3VAUD
R56
470
470
R57
R57
470
470
C125
C125
2200pF
2200pF
C126
C126
2200pF
2200pF
16
20
19
17
C127
C127
0.1uF
0.1uF
18
C128
C128
10uF
10uF
25
C129
C129
1uF
1uF
J4
J4
SJ1-3535N
SJ1-3535N
3
5
4
2
1
14
I2C_SDA
AV_SDO
AV_SCK
R98 0-DNP R98 0-DNP
A A
5
R97 0 R97 0
See AK4342 Application Note for
ground plane split detail.
4
Quartics, Inc.
Quartics, Inc.
Quartics, Inc.
Title
Title
Title
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc> J
B
<Doc> J
B
<Doc> J
B
91 1 Tuesday, April 10, 2007
91 1 Tuesday, April 10, 2007
91 1 Tuesday, April 10, 2007
of
of
Date: Sheet
Date: Sheet
3
2
Date: Sheet
1
of
Page 10
5
D D
+3.3V
C C
HSYNC
VSYNC
RESET/
I2C_SCL
I2C_SDA
COMP[0..11]
B B
COMPCLKP
+3.3V
A A
5
C177
C177
0.1uF
0.1uF
C178
C178
0.1uF
0.1uF
C179
C179
0.1uF
0.1uF
COMP0
COMP1
COMP2
COMP3
COMP4
COMP5
COMP6
COMP7
COMP8
COMP9
COMP10
COMP11
FB16FBFB16
FB12FBFB12
FB
C137
C137
10uF
10uF
FB14FBFB14
FB
C142
C142
10uF
10uF
CVDD1
FB15FBFB15
FB
C150
C150
10uF
10uF
R69
R69
10K
10K
FB
C155
C155
R70
R70
0.1uF
0.1uF
10K
10K
4
C138
C138
0.1uF
0.1uF
C143
C143
0.1uF
0.1uF
C151
C151
0.1uF
0.1uF
22pF
22pF
34
37
33
31
39
45
46
32
30
29
48
10
11
12
13
43
44
42
C157
C157
1
2
3
4
6
7
9
AVDD
AGND
DVDD
DGND
DGND
H
V
RESET/
SPC
SPD
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
XCLK
XCLK*
VREF
XI/FIN
35
14.31818 MHz
14.31818 MHz
U11
U11
CH7015
CH7015
41
VDDV
GPIO1/CHSYNC
Y/G (DACB1)
Y/G (DACA1)
XO
36
Y2
Y2
(20 ppm)
DVDD
DVDD
DGND
DGND
GPIO0
P-OUT
CVBS/B
COMPONENT/COMPOSITE VIDEO DAC
4
VDD
GND
GND
BCO
Pr/R
Pb/B
CVBS
ISET
C/R
3
+3.3V
R6275R62
75
C180
CVDD1
R6775R67
75
POUT
C180
0.1uF
0.1uF
R6875R68
75
R6375R63
75
R6575R65
75
R7275R72
75
FB13FBFB13
FB
28
26
19
5
16
8
18
15
14
38
40
22
24
20
25
23
21
17
47
NC
27
C158
C158
22pF
22pF
C139
C139
C140
C140
C141
0.1uF
0.1uF
C145
C145
0.1uF
0.1uF
R64
R64
10K
10K
C141
0.1uF
0.1uF
10uF
10uF
C146
C146
C147
C147
0.1uF
0.1uF
10uF
10uF
R64 : PAL - Installed
NTSC - Not Installed
R8933R89
33
R89 is DNP for Chrontel DAC Operation
R6675R66
75
R71
R71
140
140
3
2
C135
C135
100pF
100pF
C148
C148
100pF
100pF
C153
C153
100pF
100pF
C159
C159
100pF
100pF
2
C134
C134
5.6pF
5.6pF
L4
0.68uHL40.68uH
C144
C144
5.6pF
5.6pF
L5
0.68uHL50.68uH
C152
C152
5.6pF
5.6pF
L6
0.68uHL60.68uH
C156
C156
33pF
33pF
L7
1.8uHL71.8uH
1
+3.3V
BAT54S/SOT
BAT54S/SOT
D2
D2
C136
C136
56pF
56pF
+3.3V
BAT54S/SOT
BAT54S/SOT
D3
D3
J5
J5
2
3
R
R
C149
C149
56pF
56pF
+3.3V
BAT54S/SOT
BAT54S/SOT
D4
D4
C154
C154
56pF
56pF
+3.3V
BAT54S/SOT
BAT54S/SOT
D5
D5
C160
C160
270pF
270pF
Quartics, Inc.
Quartics, Inc.
Quartics, Inc.
Title
Title
Title
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
<Doc> J
B
<Doc> J
B
<Doc> J
B
Date: Sheet
Date: Sheet
Date: Sheet
1
5
6
4
8
9
7
COMPONENT OUT
(Red,Yellow,Blue)
2
3
1
COMPOSITE OUT
(Yellow)
10 11 Tuesday, April 10, 2007
10 11 Tuesday, April 10, 2007
10 11 Tuesday, April 10, 2007
1
G
G
B
B
PJRAN3X1U03X
PJRAN3X1U03X
J9
J9
PJRAN1X1U04X
PJRAN1X1U04X
of
of
of
Page 11
5
+3.3V
+3.3V
D D
D6
D6
TSOP34138
TSOP34138
R74
R74
100
100
VS
OUT
GND
C162
C163
C163
+
+
4.7uF
4.7uF
3
1
2
R750R75
0
C162
0.1uF
0.1uF
R73
R73
10K
10K
4
U12
U12
PIC16F688-I/SL
PIC16F688-I/SL
4
RA3/MCLR/VPP
13
RA0/AN0/C1IN+/ICSPDATA/ULPWU
11
RA2/AN2/T0CKI/INT/C1OUT
3
RA4/AN3/T1G/OSC2/CLKOUT
2
RA5/T1CKI/OSC1/CLKIN
10
RC0/AN4/C2IN+
9
RC1/AN5/C2IN-
RESET/
8
RC6/AN6
7
RC7/AN7
12
RA1/AN1/C1IN-/-VREF/ICSPCLK
3
+3.3V
C161
C161
0.1uF
0.1uF
1
VDD
RC4/C2OUT/TX/CK
VSS
14
RC5/RX/DT
NEC IR TO NRZ
CONVERTER (38Khz)
5
6
+3.3V
2
1
RXD1
TXD1
R761KR76
1K
R1021KR102
1K
U1C
U1C
EJTAG_DEBUGM
CPU_WARMRESET_n
CPU_BIGENDIAN
RESERVED-GND
CPU_PLL_ENABLE_n
CPU_PLL_BYPASS
CPU_PLL_CLKOUT
3
Q2
Q2
MMBT3904
MMBT3904
EJTAG_TRST_n
EJTAG_TDI
EJTAG_EDO
EJTAG_EMS
EJTAG_TCK
EJTAG_DINT
CPU_RESET_n
CPU_BOOT[0]
CPU_BOOT[1]
CPU_PLL_DIV[0]
CPU_PLL_DIV[1]
CPU_PLL_CLKIN
CPU_PLL_LOCK
Q3
Q3
MMBT3904
MMBT3904
AF4
AD13
AD12
AB11
AE8
P26
T23
P4
R5
U3
AF9
U1
N1
P2
P1
R1
T3
T6
R3
R2
+3.3V
TP1
TP1
T POINT A
T POINT A
R25
R25
100
100
YEL
YEL
R781KR78
1K
R26
R26
100
100
GRN
GRN
D7
D7
550-3605
550-3605
R791KR79
1K
2
R801KR80
1K
+3.3V
R821KR82
R81
R81
10K
10K
Quartics, Inc.
Quartics, Inc.
Quartics, Inc.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
E-JTAG INTERFACE
1K
R831KR83
1K
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
PC to TV Reference Design [Composite/Component]
<Doc> J
<Doc> J
<Doc> J
HEADER 7X2
HEADER 7X2
1
3
5
7
9
11
13
J8
J8
2
4
6
8
10
12
14
C164
C164
0.1uF
0.1uF
+3.3V
11 11 Tuesday, April 10, 2007
11 11 Tuesday, April 10, 2007
11 11 Tuesday, April 10, 2007
of
of
1
of
R88
R88
10K
10K
J7
J7
640452-4
640452-4
R84
R84
10K
10K
+3.3V
4
3
2
1
+3.3V
R85
R85
10K
10K
R91
R91
10K
10K
+3.3V
+3.3V
R90
R90
10K
10K
R86
R86
10K
10K
R101
R101
10K
10K
R87
R87
10K
10K
R771KR77
1K
AF12
TXD1_SIROUT1
AE10
RTS1_n
AF10
DTR1_n
AD14
RXD1_SIRIN1
AB13
CTS_n
AB12
DSR1_n
AE12
DCD1_n
AF11
RI1_n
AC12
TXD2_SIROUT2
AC13
RXD2_SIRIN2
W2
AF8
AF7
AF6
AE6
AF5
AC11
AE5
T4
TM_OVERFLOW
TM_ENABLE
CPU_EXTINT_n[0]
CPU_EXTINT_n[1]
CPU_EXTINT_n[2]
CPU_EXTINT_n[3]
CPU_EXTINT_n[4]
CPU_EXTINT_n[5]
CPU_EXTINT_n[6]
QV1501
QV1501
+3.3V
4
C C
SW2
SW2
DTSA-63R
DTSA-63R
Soft Reset
Switch
B B
+3.3V CMOS Level
Console Interface
A A
LAN_IRQ/
PCI_IRQB/
PCI_IRQA/
CPU_CLK
RESET/
5