INTEL D815EFV, D815EPFV User Manual

Intel® Desktop Board D815EFV/D815EPFV
Technical Product Specification
May 2001
Order Number A49745-002
®
Desktop Boards D815EFV and D815EPFV may contain design defects or errors known as errata that may cause the product to deviate from published specifications.
The Intel Current characterized errata are documented in the Intel Desktop Board D815EFV/D815EPFV Specification Update.
Revision History
Revision Revision History Date
-001 First release of the Intel® Desktop Board D815EFV/D815EPFV Technical Product Specification
-002 Second release of the Intel® Desktop Board D815EFV/D815EPFV Technical Product Specification
This product specification applies to only standard D815EFV and D815EPFV boards with BIOS identifier EA81520A.86A.
Changes to this specification will be published in the Intel Desktop Board D815EFV/D815EPFV Specification Update before being incorporated into a revision of this document.
®
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PROVIDED IN INTEL’S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT, OR OTHER INTELLECTUAL PROPERTY RIGHT.
Intel Corporation may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights.
Intel products are not intended for use in medical, life saving, or life sustaining applications or for any other application in which the failure of the Intel product could create a situation where personal injury or death may occur.
Intel may make changes to specifications and product descriptions at any time, without notice.
®
The Intel as errata that may cause the product to deviate from published specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained from:
Intel Corporation P.O. Box 5937 Denver, CO 80217-9808
or call in North America 1-800-548-4725, Europe 44-0-1793-431-155, France 44-0-1793-421-777, Germany 44-0-1793-421-333, other Countries 708-296-9333.
Intel, Pentium, LANDesk, and Celeron are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries
Other names and brands may be claimed as the property of others.
Copyright 2001, Intel Corporation. All rights reserved.
Desktop Board D815EFV and the Intel® Desktop Board D815EPFV may contain design defects or errors known
PRODUCTS. EXCEPT AS
February 2001
April 2001

Preface

This Technical Product Specification (TPS) specifies the board layout, components, connectors, power and environmental requirements, and the BIOS for these Intel Desktop Boards: D815EFV and D815EPFV. It describes the standard product and available manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the D815EFV and D815EPFV boards and their components to the vendors, system integrators, and other engineers and technicians who need this level of information. It is specifically not intended for general audiences.
What This Document Contains
Chapter Description
1 A description of the hardware used on the D815EFV and D815EPFV boards
2 A map of the resources of the board
3 The features supported by the BIOS Setup program
4 The contents of the BIOS Setup program’s menus and submenus
5 A description of the BIOS error messages, beep codes, and POST codes
Typographical Conventions
This section contains information about the conventions used in this specification. Not all of these symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
Notes call attention to important information.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
WARNING
Warnings indicate conditions, which if not observed, can cause personal injury.
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Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
Other Common Notation
# Used after a signal name to identify an active-low signal (such as USBP0#)
(NxnX) When used in the description of a component, N indicates component type, xn are the relative
coordinates of its location on the D815EFV and D815EPFV boards, and X is the instance of the particular part at that general location. For example, J5J1 is a connector, located at 5J. It is the first connector in the 5J area.
GB Gigabyte (1,073,741,824 bytes)
KB Kilobyte (1024 bytes)
Kbit Kilobit (1024 bits)
kbits/sec 1000 bits per second
MB Megabyte (1,048,576 bytes)
MB/sec Megabytes per second
Mbit Megabit (1,048,576 bits)
Mbit/sec Megabits per second
xxh An address or data value ending with a lowercase h indicates a hexadecimal value.
x.x V Volts. Voltages are DC unless otherwise specified.
This symbol is used to indicate other names and brands that may be claimed as the property of others.
iv

Contents

1 Product Description
1.1 Board Differences.......................................................................................................11
1.1.1 Feature Level Differences............................................................................11
1.1.2 Identifying Universal Boards .........................................................................12
1.2 Overview....................................................................................................................13
1.2.1 Feature Summary........................................................................................13
1.2.2 Manufacturing Options.................................................................................14
1.2.3 Board Layout................................................................................................15
1.2.4 Block Diagrams............................................................................................16
1.3 Online Support ...........................................................................................................18
1.4 Operating System Support.........................................................................................18
1.5 Design Specifications.................................................................................................19
1.6 Processor...................................................................................................................22
1.7 System Memory .........................................................................................................23
1.8 Chipsets .....................................................................................................................25
1.8.1 Intel® 815E Chipset......................................................................................25
1.8.2 Intel® 815EP Chipset....................................................................................30
1.9 I/O Controller..............................................................................................................35
1.9.1 Serial Ports ..................................................................................................35
1.9.2 Parallel Port..................................................................................................36
1.9.3 Diskette Drive Controller ..............................................................................36
1.9.4 Keyboard and Mouse Interface....................................................................36
1.10 Graphics Subsystems.................................................................................................37
1.10.1 Intel 815E Graphics Subsystem...................................................................37
1.10.2 Intel 815EP Graphics Subsystem.................................................................41
1.11 Audio Subsystem........................................................................................................42
1.11.1 AD1885 Audio Codec...................................................................................42
1.11.2 Audio Connectors.........................................................................................42
1.12 LAN Subsystem (Optional).........................................................................................44
1.12.1 Intel® 82562ET Platform LAN Connect Device.............................................44
1.12.2 RJ-45 LAN Connector LEDs.........................................................................44
1.13 Hardware Management Subsystem............................................................................45
1.13.1 Hardware Monitor Component.....................................................................45
1.13.2 Chassis Intrusion Detect Connector (Optional).............................................45
1.13.3 Fan Control and Monitoring..........................................................................46
1.14 CNR Connector (Optional)..........................................................................................46
1.15 Power Management ...................................................................................................47
1.15.1 Software Support .........................................................................................47
1.15.2 Hardware Support........................................................................................51
2 Technical Reference
2.1 Introduction.................................................................................................................57
2.2 Memory Map ..............................................................................................................57
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Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
2.3 I/O Map ......................................................................................................................58
2.4 DMA Channels ...........................................................................................................60
2.5 PCI Configuration Space Map ....................................................................................60
2.6 Interrupts ....................................................................................................................61
2.7 PCI Interrupt Routing Map..........................................................................................61
2.8 Connectors.................................................................................................................63
2.8.1 Back Panel Connectors................................................................................64
2.8.2 Internal I/O Connectors ................................................................................68
2.8.3 External I/O Connectors...............................................................................78
2.9 Jumper Blocks............................................................................................................82
2.9.1 Front Panel Audio Connector/Jumper Block.................................................82
2.9.2 BIOS Setup Configuration Jumper Block......................................................83
2.10 Mechanical Considerations.........................................................................................84
2.10.1 Form Factor .................................................................................................84
2.10.2 I/O Shields ...................................................................................................85
2.11 Electrical Considerations ............................................................................................92
2.11.1 Power Consumption.....................................................................................92
2.11.2 Add-in Board Considerations........................................................................93
2.11.3 Standby Current Requirements....................................................................93
2.11.4 Fan Connector Current Capability ................................................................94
2.11.5 Power Supply Considerations ......................................................................94
2.12 Thermal Considerations..............................................................................................95
2.13 Reliability ....................................................................................................................96
2.14 Environmental ............................................................................................................97
2.15 Regulatory Compliance ..............................................................................................98
2.15.1 Safety Regulations.......................................................................................98
2.15.2 EMC Regulations .........................................................................................98
2.15.3 Product Certification Markings (Board Level) ...............................................99
3 Overview of BIOS Features
3.1 Introduction...............................................................................................................101
3.2 BIOS Flash Memory Organization ............................................................................102
3.3 Resource Configuration............................................................................................102
3.3.1 PCI Autoconfiguration ................................................................................102
3.3.2 IDE Support ...............................................................................................102
3.4 System Management BIOS (SMBIOS).....................................................................103
3.5 Legacy USB Support ................................................................................................104
3.6 BIOS Updates ..........................................................................................................105
3.6.1 Language Support......................................................................................105
3.6.2 Custom Splash Screen...............................................................................105
3.7 Recovering BIOS Data .............................................................................................106
3.8 Boot Options.............................................................................................................107
3.8.1 CD-ROM and Network Boot.......................................................................107
3.8.2 Booting without Attached Devices..............................................................107
vi
Product Description
3.9 Fast Booting Systems with Intel® Rapid BIOS Boot..................................................107
3.9.1 Peripheral Selection and Configuration ......................................................108
3.9.2 Intel Rapid BIOS Boot ................................................................................108
3.9.3 Operating System Selection.......................................................................108
3.10 BIOS Security Features............................................................................................109
4 BIOS Setup Program
4.1 Introduction...............................................................................................................111
4.2 Maintenance Menu...................................................................................................112
4.2.1 Extended Configuration Submenu..............................................................113
4.3 Main Menu................................................................................................................114
4.4 Advanced Menu........................................................................................................115
4.4.1 PCI Configuration Submenu.......................................................................116
4.4.2 Boot Configuration Submenu .....................................................................117
4.4.3 Peripheral Configuration Submenu.............................................................118
4.4.4 IDE Configuration Submenu.......................................................................120
4.4.5 Diskette Configuration Submenu................................................................123
4.4.6 Event Log Configuration Submenu.............................................................124
4.4.7 Video Configuration Submenu....................................................................125
4.5 Security Menu ..........................................................................................................126
4.6 Power Menu .............................................................................................................127
4.6.1 APM Submenu...........................................................................................128
4.6.2 ACPI Submenu ..........................................................................................129
4.7 Boot Menu................................................................................................................130
4.7.1 Boot Device Priority Submenu....................................................................131
4.7.2 Hard Disk Drives Submenu ........................................................................132
4.7.3 Removable Devices Submenu ...................................................................132
4.7.4 ATAPI CDROM Drives Submenu ...............................................................133
4.8 Exit Menu .................................................................................................................133
5 Error Messages and Beep Codes
5.1 BIOS Error Messages...............................................................................................135
5.2 Port 80h POST Codes..............................................................................................137
5.3 Bus Initialization Checkpoints ...................................................................................141
5.4 Speaker ...................................................................................................................142
5.5 BIOS Beep Codes ....................................................................................................143
5.6 Diagnostic LEDs (Optional) ......................................................................................144
Figures
1. Location of Universal Board Designator .........................................................................12
2. Board Components ........................................................................................................15
3. Block Diagram for the D815EFV Board ..........................................................................16
4. Block Diagram for the D815EPFV Board........................................................................17
5. Intel 815E Chipset Block Diagram ..................................................................................25
6. USB Port Configurations ................................................................................................28
7. Intel 815EP Chipset Block Diagram................................................................................30
8. USB Port Configurations ................................................................................................33
9. Block Diagram of Audio Subsystem ...............................................................................42
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Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
10. ICH2 and CNR Signal Interface....................................................................................46
11. Using the Wake on LAN Technology Connector...........................................................53
12. Location of Standby Power Indicator LED ....................................................................54
13. Back Panel Connectors................................................................................................64
14. Audio, Video, Power, and Hardware Control Connectors .............................................69
15. Add-in Board and Peripheral Interface Connectors ......................................................73
16. External I/O Connectors ...............................................................................................78
17. Locations of the Jumper Blocks....................................................................................82
18. Board Dimensions........................................................................................................84
19. I/O Shield Dimensions (for D815EFV Universal Boards with Onboard LAN
Subsystem) ................................................................................................................86
20. I/O Shield Dimensions (for D815EPFV Universal Boards with Onboard LAN
Subsystem) ................................................................................................................87
21. I/O Shield Dimensions (for D815EPFV Universal Boards without Onboard LAN
Subsystem) ................................................................................................................88
22. I/O Shield Dimensions (for D815EFV Boards with Onboard LAN Subsystem)..............89
23. I/O Shield Dimensions (for D815EPFV Boards with Onboard LAN Subsystem) ...........90
24. I/O Shield Dimensions (for D815EPFV Boards without Onboard LAN Subsystem) ......91
25. Localized High Temperature Zones..............................................................................95
26. Diagnostic LEDs.........................................................................................................144
Tables
1. Summary of Board Differences...................................................................................11
2. Feature Summary.......................................................................................................13
3. Manufacturing Options ...............................................................................................14
4. Specifications .............................................................................................................19
5. Supported Processors ................................................................................................22
6. Supported Memory Configurations .............................................................................24
7. Supported Graphics Refresh Frequencies..................................................................38
8. LAN Connector LED States........................................................................................44
9. Effects of Pressing the Power Switch .........................................................................48
10. Power States and Targeted System Power ................................................................49
11. Wake Up Devices and Events ....................................................................................50
12. Fan Connector Descriptions .......................................................................................52
13. System Memory Map..................................................................................................57
14. I/O Map ......................................................................................................................58
15. DMA Channels ...........................................................................................................60
16. PCI Configuration Space Map ....................................................................................60
17. Interrupts ....................................................................................................................61
18. PCI Interrupt Routing Map..........................................................................................62
19. Overcurrent Protection for Back Panel Connectors ....................................................65
20. PS/2 Mouse/Keyboard Connectors.............................................................................65
21. USB Connectors.........................................................................................................65
22. VGA Port Connector (Present Only on D815EFV Boards)..........................................65
23. Parallel Port Connector...............................................................................................66
24. Serial Port A Connector..............................................................................................66
25. LAN Connector (Optional) ..........................................................................................67
26. Mic In Connector ........................................................................................................67
viii
Product Description
27. Audio Line Out Connector ..........................................................................................67
28. Audio Line In Connector .............................................................................................67
29. Auxiliary Line In Connector (J6B4) .............................................................................70
30. Front Panel Audio Connector (J6B2) (Optional)..........................................................70
31. ATAPI CD-ROM Connector (J6B3).............................................................................70
32. Digital Video Out Connector (J5C1) (Optional; present only on D815EFV boards).....71
33. Processor Fan Connector (J1B1) ...............................................................................71
34. Power Connector (J4H1) ............................................................................................71
35. Chassis Fan Connector (J4G1) (Optional)..................................................................72
36. System Fan Connector (J9H1) ...................................................................................72
37. Chassis Intrusion Connector (J9H3) (Optional) ..........................................................72
38. Wake on LAN Technology Connector (J9G1) (Optional) ............................................72
39. CNR Connector (J9B1) (Optional) ..............................................................................74
40. PCI Bus Connectors (J7B1, J8B2, and J9B2).............................................................75
41. AGP Universal Connector (J6C1) ...............................................................................76
42. Diskette Drive Connector (J6H2)................................................................................77
43. IDE Connectors (J6H1, Primary and J6G2, Secondary).............................................77
44. Serial Port B Connector (J8H1) ..................................................................................79
45. Front Panel USB Connector (J8F1) (Optional) ...........................................................79
46. Auxiliary Front Panel Power LED Connector (J9H2)...................................................79
47. SCSI LED Connector (J8H2)......................................................................................79
48. Front Panel Connector (J9H3)....................................................................................80
49. States for a Single-Colored Power LED......................................................................81
50. States for a Dual-Colored Power LED ........................................................................81
51. Front Panel Audio Connector / Jumper Block (J6B2)..................................................83
52. BIOS Setup Configuration Jumper Settings (J9G2)....................................................83
53. Power Usage for a D815EFV Board with Onboard LAN .............................................92
54. Power Usage for a D815EPFV Board with Add-in Graphics Card,
without Onboard LAN .................................................................................................92
55. Standby Current Requirements ..................................................................................93
56. Thermal Considerations for Components ...................................................................96
57. D815EFV and D815EPFV Board Environmental Specifications..................................97
58. Safety Regulations .....................................................................................................98
59. EMC Regulations........................................................................................................98
60. Supervisor and User Password Functions................................................................109
61. BIOS Setup Program Menu Bar ...............................................................................111
62. BIOS Setup Program Function Keys ........................................................................112
63. Maintenance Menu...................................................................................................112
64. Extended Configuration Submenu............................................................................113
65. Main Menu................................................................................................................114
66. Advanced Menu........................................................................................................115
67. PCI Configuration Submenu.....................................................................................116
68. Boot Configuration Submenu....................................................................................117
69. Peripheral Configuration Submenu...........................................................................118
70. IDE Configuration Submenu.....................................................................................120
71. Primary/Secondary IDE Master/Slave Submenus.....................................................121
72. Diskette Configuration Submenu ..............................................................................123
73. Event Log Configuration Submenu...........................................................................124
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Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
74. Video Configuration Submenu..................................................................................125
75. Security Menu ..........................................................................................................126
76. Power Menu .............................................................................................................127
77. APM Submenu .........................................................................................................128
78. ACPI Submenu.........................................................................................................129
79. Boot Menu................................................................................................................130
80. Boot Device Priority Submenu..................................................................................131
81. Hard Disk Drives Submenu ......................................................................................132
82. Removeable Devices Submenu................................................................................132
83. ATAPI CDROM Drives Submenu .............................................................................133
84. Exit Menu .................................................................................................................133
85. BIOS Error Messages...............................................................................................135
86. Uncompressed INIT Code Checkpoints....................................................................137
87. Boot Block Recovery Code Checkpoints ..................................................................137
88. Runtime Code Uncompressed in F000 Shadow RAM ..............................................138
89. Bus Initialization Checkpoints ...................................................................................141
90. Upper Nibble High Byte Functions............................................................................141
91. Lower Nibble High Byte Functions............................................................................142
92. Beep Codes..............................................................................................................143
93. Diagnostic LED Codes..............................................................................................145
x

1 Product Description

What This Chapter Contains
1.1 Board Differences.......................................................................................................11
1.2 Overview ....................................................................................................................13
1.3 Online Support ...........................................................................................................18
1.4 Operating System Support .........................................................................................18
1.5 Design Specifications .................................................................................................19
1.6 Processor ...................................................................................................................22
1.7 System Memory .........................................................................................................23
1.8 Chipsets .....................................................................................................................25
1.9 I/O Controller..............................................................................................................35
1.10 Graphics Subsystems.................................................................................................37
1.11 Audio Subsystem........................................................................................................42
1.12 LAN Subsystem (Optional) .........................................................................................44
1.13 Hardware Management Subsystem............................................................................45
1.14 CNR Connector (Optional)..........................................................................................46
1.15 Power Management ...................................................................................................47

1.1 Board Differences

1.1.1 Feature Level Differences

This TPS describes these Intel® Desktop boards: D815EFV and D815EPFV. Table 1 summarizes the differences between these boards.
Table 1. Summary of Board Differences
D815EFV
D815EPFV
Includes the Intel
Memory Controller Hub (GMCH)
Provides these video features: AGP universal connector and an optional
Digital Video Output (DVO) connector
Includes the Intel
Controller Hub (MCH)
Provides this video feature: AGP universal connector
®
815E Chipset, which includes the Intel® 82815 Graphics and
®
815EP Chipset, which includes the Intel® 82815EP Memory
11
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification

1.1.2 Identifying Universal Boards

The Universal versions of the D815EFV and D815EPFV can be identified by an uppercase “U” on the silkscreen of the board. Figure 1 shows the location of the Universal board designator.
INTEL DESKTOP BOARD
D815EFV / D815EPFV
U
Figure 1. Location of Universal Board Designator
NOTE
Unless otherwise stated, all information pertaining to standard boards also apply to Universal boards.
OM12011
12

1.2 Overview

1.2.1 Feature Summary

Table 2 summarizes the D815EFV and D815EPFV boards major features.
Table 2. Feature Summary
Form Factor
Processor
Memory
Chipsets
I/O Control
Video
Audio
Peripheral Interfaces
Expansion Capabilities
BIOS
microATX (9.6 inches by 8.2 inches)
Support for either an Intel (FC-PGA) package or an Intel® Celeron™ processor in an FC-PGA package
Three 168-pin SDRAM Dual Inline Memory Module (DIMM) sockets
Support for up to 512 MB system memory
Support for single-sided or double-sided DIMMs
The D815EFV board includes the Intel 815E Chipset, consisting of: Intel 82815 Graphics and Memory Controller Hub (GMCH)  Intel4 Mbit Firmware Hub (FWH) (STM M50FW040 or equivalent)
The D815EPFV board includes the Intel 815EP Chipset, consisting of: Intel 82815EP Memory Controller Hub (MCH) Intel 82801BA I/O Controller Hub (ICH2)
®
82801BA I/O Controller Hub (ICH2)
®
Pentium® III processor in a Flip Chip Pin Grid Array
4 Mbit Firmware Hub (FWH) (STM M50FW040 or equivalent)
SMSC LPC47M132 LPC bus I/O controller
The D815EFV board includes: Intel 82815 integrated graphics support  AGP universal connector supporting 1x, 2x, and 4x AGP cards or a
Graphics Performance Accelerator (GPA)
The D815EPFV board includes an AGP universal connector supporting
1x, 2x, and 4x AGP cards
Intel 82801BA ICH2 digital controller (AC link output)
Analog Devices AD1885 Audio Codec
Four Universal Serial Bus (USB) ports
Two serial ports
One parallel port
Two IDE interfaces with Ultra DMA, ATA-66/100 support
One diskette drive interface
PS/2
Three PCI bus add-in card connectors (SMBus routed to PCI bus connector 2)
One AGP universal connector
Intel/AMI BIOS (stored in an STM M50FW040 4 Mbit FWH or equivalent)
Support for Advanced Power Management (APM), Advanced Configuration and
keyboard and mouse ports
Power Interface (ACPI), Plug and Play, and SMBIOS
Product Description
continued
13
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
Table 2. Feature Summary (continued)
Instantly Available PC
Hardware Monitor Subsystem
SCSI LED Connector
Support for PCI Local Bus Specification Revision 2.2
Suspend to RAM support
Wake on PS/2 keyboard and USB ports
Voltage sense to detect out of range values
Two fan sense inputs used to monitor fan activity
Allows add-in SCSI host bus adapters to use the same LED as the onboard I/O controller
For information about Refer to
The boards compliance level with APM, ACPI, Plug and Play, and SMBIOS Table 4, page 19

1.2.2 Manufacturing Options

Table 3 describes the D815EFV and D815EPFV boards manufacturing options. Not every manufacturing option is available in all marketing channels. Please contact your Intel representative to determine which manufacturing options are available to you.
Table 3. Manufacturing Options
Chassis fan connector
Chassis Intrusion Connector
Communication and Networking Riser (CNR) Connector
Diagnostic LEDs
Front Panel Audio Connector
Front Panel USB Connector
I/O Control
LAN Subsystem
Video
Wake on LAN† Technology Connector
Connector for an additional chassis fan
Detects chassis intrusion
One CNR connector (slot shared with PCI bus connector 3)
Four dual-color LEDs on the back panel
Routes mic in and line out to the front panel
Provides access to two additional USB ports, routed through the optional SMSC LPC47M142 I/O controller
SMSC LPC47M142 LPC bus I/O controller
Intel
Digital Video Output (DVO) connector
Support for system wake up using an add-in network interface card with remote wake up capability
®
82562ET 10/100 Mbit/sec Platform LAN Connect (PLC) device
NOTE
Other drivers may be offered by other third party vendors.
14
Product Description

1.2.3 Board Layout

Figure 2 shows the location of the major components on the D815EFV and D815EPFV boards.
BA
C
D
E
F
U
G
T
H
S
I
ONPMQR L JK
Present only on D815EFV boards
OM11469
K Power connector A Communication and Networking Riser (CNR)
connector (optional)
B AD1885 audio codec M Primary IDE connector C AGP universal connector N Secondary IDE connector D Back panel connectors O Intel 82801BA I/O Controller Hub (ICH2) E DVO connector (optional) P SMSC LPC47M132 I/O Controller
Intel 82815 Graphics and Memory Controller
F
Hub (GMCH) (D815EFV boards)
Intel 82815EP Memory Controller Hub (MCH)
(D815EPFV boards)
G Processor socket T Front panel USB connector (optional) H DIMM sockets U PCI bus add-in card connectors I Battery J Speaker
L Diskette drive connector
Q Serial port B connector R Front panel connectors S 4 Mbit Firmware Hub (FWH) (STM M50FW040
or equivalent)
Figure 2. Board Components
15
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification

1.2.4 Block Diagrams

Figure 3 is a block diagram of the major functional areas of the D815EFV board.
DIMM
Banks
(3)
DVO Connector (Optional)
AGP
Universal
Connector
PCI Slot 1
PCI Slot 2
PCI Slot 3
Hardware
Monitor
SDRAM Bus
Primary/
Secondary IDE
System BusProcessor Socket
Graphics and
Memory Controller
Hub (GMCH)
Digital Video
Output
AGP Bus
82815
PCI Bus
SMBus
815E Chipset
Video
Bus
Onboard
Video
ATA-66/100
AHA
Bus
82801BA
I/O Controller Hub
(ICH2)
Network
USB
LPC
Bus
LPC I/O
Controller
Analog Codec
Optional
AC Link
Physical
Layer
Interface
USB Ports 0 and 1
USB Ports 2 and 3
Firmware Hub
(FWH)
(STM M50FW040
or equivalent)
Diskette Drive
Connector
Serial Port A
Serial Port B Parallel Port PS/2 Mouse
PS/2 Keyboard
CD-ROM
Line In
Line Out
Mic In
Auxiliary Line In
Front Panel
Audio (optional)
CNR
Connector
LAN
Connector
16
indicates connector or socket
Figure 3. Block Diagram for the D815EFV Board
OM11885
Product Description
Figure 4 is a block diagram of the major functional areas of the D815EPFV board.
DIMM
Banks
(3)
AGP
Universal
Connector
PCI Slot 1
PCI Slot 2
PCI Slot 3
Hardware
Monitor
SDRAM Bus
Primary/
Secondary IDE
System BusProcessor Socket
82815EP
Memory Controller
Hub (MCH)
AGP Bus
PCI Bus
SMBus
ATA-66/100
815EP Chipset
AHA
Bus
82801BA
I/O Controller Hub
(ICH2)
USB
LPC
Bus
LPC I/O
Controller
Analog Codec
USB Ports 0 and 1
USB Ports 2 and 3
Firmware Hub
(FWH)
(STM M50FW040
or equivalent)
Diskette Drive
Connector
Serial Port A
Serial Port B Parallel Port PS/2 Mouse
PS/2 Keyboard
CD-ROM
Line In
Line Out
Mic In
Auxiliary Line In
Front Panel
Audio (optional)
indicates connector or socket
Figure 4. Block Diagram for the D815EPFV Board
Network
AC Link
Physical
Interface
Optional
Layer
CNR
Connector
LAN
Connector
OM11886
17
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification

1.3 Online Support

To find information about… Visit this World Wide Web site:
Intels D815EFV and D815EPFV boards under Product Info or Customer Support
Processor data sheets http://www.intel.com/design/litcentr
ICH2 addressing http://developer.intel.com/design/chipsets/datashts
Custom splash screens http://intel.com/design/motherbd/gen_indx.htm
Audio software and utilities http://www.intel.com/design/motherbd
LAN software and drivers http://www.intel.com/design/motherbd
http://www.intel.com/design/motherbd http://support.intel.com/support/motherboards/desktop

1.4 Operating System Support

The D815EFV and D815EPFV boards support drivers for all of the onboard hardware and subsystems under the following operating systems:
Windows
Windows ME
Windows NT
Windows 2000
For information about Refer to
Supported drivers Section 1.3
98/98SE
4.0
NOTE
Other drivers may be offered by other third party vendors.
18
Product Description

1.5 Design Specifications

Table 4 lists the specifications applicable to both the D815EFV and D815EPFV boards, except for the AIMM and GPA entries, which apply only to the D815EFV board.
Table 4. Specifications
Reference Name
AC 97 Audio Codec ’97 Revision 2.2,
ACPI Advanced Configuration
AGP Accelerated Graphics Port
AIMM
(for Graphics Performance Accelerator cards)
AMI BIOS American Megatrends
APM Advanced Power
ATA/ ATAPI-5
ATX ATX Specification Version 2.03,
CNR
Specification Title
and Power Interface Specification
Interface Specification
AGP Inline Memory Module Revision 1.0,
BIOS Specification
Management BIOS Interface Specification
Information Technology ­AT Attachment with Packet Interface - 5 (ATA/ATAPI-5)
Communication and Network Riser (CNR) Specification
Version, Revision Date, and Ownership
September 2000, Intel Corporation.
Version 2.0, July 27, 2000, Compaq Computer Corporation, Intel Corporation, Microsoft Corporation, Phoenix Technologies Limited, and Toshiba Corporation.
Revision 2.0, May 4, 1998, Intel Corporation.
April 2000, Intel Corporation.
AMIBIOS 99, 1999, American Megatrends, Inc.
Version 1.2, February 1996, Intel Corporation and Microsoft Corporation.
Revision 3, February 29, 2000, Contact: T13 Chair, Seagate Technology.
December 1998, Intel Corporation.
Revision 1.1, October 18, 2000, Intel Corporation.
The information is
available from
ftp://download.intel.com/ial/ scalableplatforms/ac97r22.pdf
http://www.teleport.com/~acpi/
http://www.agpforum.org/
http://developer.intel.com/ technology/memory/aimm/
298177.htm
http://www.amij.com/amibios/ bios.platforms.desktop.html
http://www.microsoft.com/ hwdev/busbios/amp_12.htm
http://www.t13.org
http://www.formfactors.org/ developer/specs/atx/ atxspecs.htm
http://developer.intel.com/ technology/cnr/index.htm
continued
19
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
Table 4. Specifications (continued)
Reference Name
DVI
EPP IEEE Std 1284.1-1997
El Torito Bootable CD-ROM
GPA (see AIMM)
LPC Low Pin Count Interface
MicroATX microATX Motherboard
PCI PCI Local Bus
PCI Bus Power
Plug and Play
Specification Title
Digital Visual Interface DVI
(Enhanced Parallel Port)
Format Specification
Specification
Interface Specification
Specification
Management Interface Specification
Plug and Play BIOS Specification
Version, Revision Date and Ownership
Revision 1.0, April 2, 1999, Intel Corporation, Silicon Image Incorporated, Compaq Computer Corporation, Fujitsu Limited, Hewlett-Packard Company, and NEC Corporation.
Version 1.7, 1997, Institute of Electrical and Electronic Engineers.
Version 1.0, January 25, 1995, Phoenix Technologies Limited and International Business Machines Corporation.
Version 1.0, September 29, 1997, Intel Corporation.
Version 1.0, December 1997, Intel Corporation.
Version 2.2, December 18, 1998, PCI Special Interest Group.
Version 1.1, December 18, 1998, PCI Special Interest Group.
Version 1.0a, May 5, 1994, Compaq Computer Corporation, Phoenix Technologies Limited, and Intel Corporation.
The information is available from
http://www.ddwg.org/ downloads.html
http://standards.ieee.org/ reading/ieee/std_public/ description/busarch/
1284.1-1997_desc.html
http://www.phoenix.com/ PlatSS/products/specs.html
http://www.intel.com/ design/chipsets/industry/ lpc.htm
http://www.formfactors.org/ developer/specs/microatx/ microatxspecs.htm
http://www.pcisig.com/
http://www.pcisig.com/
http://www.microsoft.com/ hwdev/respec/ pnpspecs.htm
continued
20
Table 4. Specifications (continued)
Reference Name
SDRAM PC SDRAM Unbuffered
PC SDRAM Specification Revision 1.7,
PC Serial Presence
SMBIOS System Management
UHCI Universal Host Controller
USB Universal Serial Bus
WfM Wired for Management
Specification Title
DIMM Specification
Detect (SPD) Specification
BIOS
Interface Design Guide
Specification
Baseline
Version, Revision Date and Ownership
Revision 1.0, February 1998, Intel Corporation.
November 1999, Intel Corporation.
Revision 1.2B, November 1999, Intel Corporation.
Version 2.3.1, March 16, 1999, American Megatrends Incorporated, Award Software International Incorporated, Compaq Computer Corporation, Dell Computer Corporation, Hewlett-Packard Company, Intel Corporation, International Business Machines Corporation, Phoenix Technologies Limited, and SystemSoft Corporation.
Revision 1.1, March 1996, Intel Corporation.
Version 1.1, September 23, 1998, Compaq Computer Corporation, Intel Corporation, Microsoft Corporation, and NEC Corporation.
Version 2.0, December 18, 1998, Intel Corporation.
Product Description
The information is available from
http://www.intel.com/ technology/memory
http://www.intel.com/ technology/memory
http://www.intel.com/ technology/memory
http://developer.intel.com/ ial/wfm/design/smbios
http://www.usb.org/ developers
http://www.usb.org/ developers
http://developer.intel.com/ ial/WfM/wfmspecs.htm
21
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification

1.6 Processor

CAUTION
Use only the processors listed below. Use of unsupported processors can damage the board, the processor, and the power supply. See the Intel Update for the most up-to-date list of supported processors for the D815EFV and D815EPFV boards.
The D815EFV and D815EPFV boards both support a single Pentium III or Celeron processor. The system bus frequency is automatically selected. The D815EFV and D815EPFV boards support the processors listed in Table 5.
Table 5. Supported Processors
Type Designation System Bus Frequency L2 Cache Size
533EB, 600EB, 667, 733,
an FC-PGA package
FC-PGA package
800B, 866, and 933 MHz
1.0 GHz
500E, 550E, 600E, 650, 700, 750, 800, and 850 MHz
800 and 850 MHz 100 MHz 128 KB Celeron processor in an
533A, 566, 600, 633, 667, 700, 733, and 766 MHz
All supported onboard memory can be cached, up to the cachability limit of the processor. See the processors data sheet for cachability limits.
For information about Refer to
Product information on supported processors Section 1.3, page 18
Processor data sheets Section 1.3, page 18
®
Desktop D815EFV/D815EPFV Specification
133 MHz 256 KB Pentium III processor in
100 MHz 256 KB
66 MHz 128 KB
22
Product Description

1.7 System Memory

CAUTION
Before installing or removing memory, make sure that AC power is disconnected by unplugging the power cord from the computer. Failure to do so could damage the memory and the board.
NOTE
Remove the AGP video card before installing or upgrading memory to avoid interference with the memory retention mechanism.
NOTE
To be fully compliant with all applicable Intel® SDRAM memory specifications, the board should be populated with DIMMs that support the Serial Presence Detect (SPD) data structure. This allows the BIOS to read the SPD data and program the chipset to accurately configure memory settings for optimum performance. If non-SPD memory is installed, the BIOS will attempt to correctly configure the memory settings, but performance and reliability may be impacted or the DIMMs may not function under the determined frequency
The D815EFV and D815EPFV boards both have three DIMM sockets and support the following memory features:
3.3 V (only) 168-pin SDRAM DIMMs with gold-plated contacts
Unbuffered single-sided or double-sided DIMMs
Maximum total system memory: 512 MB; minimum total system memory: 64 MB
133 MHz SDRAM or 100 MHz SDRAM
Serial Presence Detect (SPD) and non-SPD memory
Non-ECC and ECC DIMMs (ECC DIMMs will operate in non-ECC mode only)
Suspend to RAM
When installing memory, note the following:
Non-SPD DIMMs will always revert to a 100 MHz with 3-3-3 timing SDRAM bus.
Mixing Non-SPD DIMMs with SPD DIMMs will always revert to a 100 MHz with 3-3-3
timing SDRAM bus.
The BIOS will not initialize installed memory above 512 MB.
Mixed memory speed configurations (133 and 100 MHz) will default to 100 MHz.
133 MHz SDRAM operation requires a 133 MHz system bus frequency processor.
The board should be populated with no more than four rows of 133 MHz SDRAM (two
double-sided or one double-sided plus two single-sided DIMMs).
100 MHz SDRAM may be populated with six rows of SDRAM (three double-sided DIMMs).
NOTE
At boot, the BIOS displays a message indicating that any installed memory above 512 MB has not been initialized.
23
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
NOTE
If more than four rows of 133 MHz SDRAM are populated, the BIOS will display a message indicating that it will initialize installed memory up to 512 MB at 100 MHz.
For information about Refer to
Obtaining the PC Serial Presence Detect (SPD) Specification Table 4, page 18
Table 6 lists the supported DIMM configurations.
Table 6. Supported Memory Configurations
DIMM Capacity
32 MB DS 16 Mbit 2 M x 8/2 M x 8 16
32 MB SS 64 Mbit 4 M x 16/empty 4
48 MB DS 64/16 Mbit 4 M x 16/2 M x 8 12
64 MB DS 64 Mbit 4 M x 16/4 M x 16 8
64 MB SS 64 Mbit 8 M x 8/empty 8
64 MB SS 128 Mbit 8 M x 16/empty 4
96 MB DS 64 Mbit 8 M x 8/4 M x 16 12
96 MB DS 128/64 Mbit 8 M x 16/4 M x 16 8
128 MB DS 64 Mbit 8 M x 8/8 M x 8 16
128 MB DS 128 Mbit 8 M x 16/8 M x 16 8
128 MB SS 128 Mbit 16 M x 8/empty 8
128 MB SS 256 Mbit 16 M x 16/empty 4
192 MB DS 128 Mbit 16 M x 8/8 M x 16 12
192 MB DS 128/64 Mbit 16 M x 8/8 M x 8 16
256 MB DS 128 Mbit 16 M x 8/16 M x 8 16
256 MB DS 256 Mbit 16 M x 16/16 M x 16 8
256 MB SS 256 Mbit 32 M x 8/empty 8
512 MB DS 256 Mbit 32 M x 8/32 M x 8 16
Notes:
1. If the number of SDRAM devices is greater than nine, the DIMM will be double sided.
2. Front side population/back side population indicated for SDRAM density and SDRAM organization.
3. In the second column, “DS” refers to double-sided memory modules (containing two rows of SDRAM) and “SS” refers to single-sided memory modules (containing one row of SDRAM).
Number of Sides
SDRAM Density
SDRAM Organization Front-side/Back-side
Number of SDRAM devices
(Note 1)
(Notes 1 and 2)
(Notes 1 and 2)
(Notes 1 and 2)
(Note 1)
(Notes 1 and 2)
(Notes 1 and 2)
(Notes 1 and 2)
(Notes 1 and 2)
(Notes 1 and 2)
(Notes 1 and 2)
24
Product Description

1.8 Chipsets

This section describes the chipsets used by the D815EFV and D815EPFV boards:
The D815EFV board uses the Intel 815E Chipset, described below.
The D815EPFV board uses the Intel 815EP Chipset, described in Section 1.8.2, beginning on
page 30.

1.8.1 Intel® 815E Chipset

The Intel 815E chipset consists of the following devices:
82815 Graphics and Memory Controller Hub (GMCH) with Accelerated Hub Architecture (AHA) bus
82801BA I/O Controller Hub (ICH2) with AHA bus
Firmware Hub (FWH) (STM M50FW040 or equivalent)
The GMCH is a centralized controller for the system bus, the memory bus, the AGP bus, and the AHA bus. The ICH2 is a centralized controller for the boards I/O paths. The FWH provides the nonvolatile storage of the BIOS.
The Intel 815E chipset provides the interfaces shown in Figure 5.
System Bus
SDRAM Bus
Memory Controller
Digital Video
Output
82815
Graphics and
Hub (GMCH)
Display
Interface
ATA-66/100
815E Chipset
AHA
Bus
AGP
Bus
82801BA
I/O Controller Hub
(ICH2)
Network
AC LinkPCI BusSMBus
USB
LPC Bus
Firmware Hub
(FWH)
(STM M50FW040
or equivalent)
OM11887
Figure 5. Intel 815E Chipset Block Diagram
For information about Refer to
The Intel 815E chipset http://developer.intel.com/design/chipsets/815e
The resources used by the chipset Chapter 2
The chipsets compliance with ACPI, APM, and AC 97 Table 4, page 19
25
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
1.8.1.1 Intel® 82815 Graphics and Memory Controller Hub (GMCH)
The GMCH provides the following:
An integrated Synchronous DRAM memory controller with autodetection of SDRAM
An interface for a single AGP device or a Graphics Performance Accelerator (GPA) card
An interface for an optional digital video output (DVO) connector for a flat panel, digital CRT,
or TV-out
Support for ACPI Rev. 2.0 and APM Rev. 1.2 compliant power management
1.8.1.2 Intel® 82801BA I/O Controller Hub (ICH2)
The ICH2 provides the following:
33 MHz PCI bus interface
Support for up to four PCI master devices
Low Pin Count (LPC) interface that supports an LPC-compatible I/O controller
Support for two Master/DMA devices
Integrated IDE controller that supports Ultra DMA (33 MB/sec) and ATA-66/100 mode
(66 MB/sec, 100 MB/sec)
Integrated LAN Media Access Controller
Universal Serial Bus interface with two USB controllers providing four ports in a
UHCI Implementation (additional USB ports provided with the optional SMSC LPC47M142 I/O controller)
Power management logic for ACPI Rev. 1.0b compliance
System Management Bus (SMBus clock and data lines also routed to PCI bus connector 2)
Real-time clock with 256-byte battery-backed CMOS RAM
AC 97 digital link for audio codec, including: AC 97 2.1 compliance Logic for PCM in, PCM out, and mic input PCI functions for audio Communication and Network Riser (CNR) interface
1.8.1.2.1 IDE Interfaces
The ICH2s IDE controller has two independent bus-mastering IDE interfaces that can be independently enabled. The IDE interfaces support the following modes:
Programmed I/O (PIO): CPU controls data transfer.
8237-style DMA: DMA offloads the CPU, supporting transfer rates of up to 16 MB/sec.
Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and transfer rates
of up to 33 MB/sec.
ATA-66: DMA protocol on IDE bus supporting host and target throttling and transfer rates of up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is device driver compatible.
ATA-100: DMA protocol on IDE bus allows host and target throttling. The ICH2 ATA-100 logic can achieve read transfer rates up to 100 MB/sec and write transfer rates up to 88 MB/sec.
26
Product Description
NOTE
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce reflections, noise, and inductive coupling.
The IDE interfaces also support ATAPI devices (such as CD-ROM drives) and ATA devices using the transfer modes listed in Table 71 on page 121.
The BIOS supports Logical Block Addressing (LBA) and Extended Cylinder Head Sector (ECHS) translation modes. The drive reports the transfer rate and translation mode to the BIOS.
The D815EFV board supports Laser Servo (LS-120) diskette technology through its IDE interfaces. The LS-120 drive can be configured as a boot device by setting the BIOS Setup programs Boot menu to one of the following:
ARMD-FDD (ATAPI removable media device floppy disk drive)
ARMD-HDD (ATAPI removable media device hard disk drive)
For information about Refer to
The location of the IDE connectors Figure 15, page 73
The signal names of the IDE connectors Table 43, page 77
BIOS Setup programs Boot menu Table 79, page 130
1.8.1.2.2 USB
The ICH2 contains two separate USB controllers. The D815EFV board has four USB ports; one USB peripheral can be connected to each port. For more than four USB devices, an external hub can be connected to any of the ports. The D815EFV board fully supports the Universal Hub Controller Interface (UHCI).
In the standard configuration, the D815EFV boards four USB ports are implemented with stacked back panel connectors, routed through the ICH2, as shown in Figure 6.
With the optional SMSC LPC47M142 I/O controller, the D815EFV board supports up to seven USB ports. The SMSC LPC47M142 I/O controller provides four ports: two ports implemented with stacked back panel connectors and two ports routed to the optional front panel USB connector at location J8F1. The ICH2 provides three ports: two ports are implemented with stacked back panel connectors and the other port is accessible through a CNR add-in card, as shown in Figure 6.
27
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
Standard Configuration
82801BA
I/O Controller Hub
(ICH2)
82801BA
I/O Controller Hub
(ICH2)
USB
SMSC LPC47M142
LPC Bus
I/O Controller
USB ports 0 and 1
USB
USB ports 2 and 3
Optional Configuration
USB ports 0 and 2
USB
CNR connector
USB ports 1 and 3
USB
USB ports 4 and 5
Figure 6. USB Port Configurations
Back panel USB connectors
Back panel USB connectors
Back panel USB connectors
USB port accesible through a USB connector on an optional CNR add-in card
Back panel USB connectors
Front panel USB connector
OM11892
NOTE
Computer systems that have an unshielded cable attached to a USB port may not meet FCC Class B requirements, even if no device or a low-speed USB device is attached to the cable. Use shielded cable that meets the requirements for full-speed devices.
For information about Refer to
The location of the USB connectors on the back panel Figure 13, page 64
The signal names of the back panel USB connectors Table 21, page 65
The location of the optional front panel USB connector Figure 16, page 78
The signal names of the optional front panel USB connector Table 45, page 79
The USB specification and UHCI Table 4, page 19
28
Product Description
1.8.1.2.3 Real-Time Clock, CMOS SRAM, and Battery
The real-time clock provides a time-of-day clock and a multicentury calendar with alarm features. The real-time clock supports 256 bytes of battery-backed CMOS SRAM in two banks that are reserved for BIOS use.
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer is not plugged into a wall socket, the battery has an estimated life of three years. When the computer is plugged in, the standby current from the power supply extends the life of the battery. The clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied.
The time, date, and CMOS values can be specified in the BIOS Setup program. The CMOS values can be returned to their defaults by using the BIOS Setup program.
NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS SRAM at power-on.
1.8.1.3 Firmware Hub (FWH)
The system BIOS is stored in the 4 Mbit FWH.
29
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification

1.8.2 Intel® 815EP Chipset

The Intel 815EP chipset consists of the following devices:
82815EP Memory Controller Hub (MCH) with Accelerated Hub Architecture (AHA) bus
82801BA I/O Controller Hub (ICH2) with AHA bus
Firmware Hub (FWH) (STM M50FW040 or equivalent)
The MCH is a centralized controller for the system bus, the memory bus, the AGP bus, and the AHA bus. The ICH2 is a centralized controller for the boards I/O paths. The FWH provides the nonvolatile storage of the BIOS.
The Intel 815EP chipset provides the interfaces shown in Figure 7.
ATA-66/100
System Bus
SDRAM Bus
Network
USB
815E Chipset
Graphics and
Memory Controller
Hub (GMCH)
Digital Video
Output
82815
Display
Interface
AGP
Bus
AHA
Bus
82801BA
I/O Controller Hub
(ICH2)
LPC Bus
AC LinkPCI BusSMBus
Firmware Hub
(FWH)
(STM M50FW040
or equivalent)
OM11887
Figure 7. Intel 815EP Chipset Block Diagram
For information about Refer to
The Intel 815EP chipset http://developer.intel.com/design/chipsets/815ep
The resources used by the chipset Chapter 2
The chipsets compliance with ACPI, APM, and AC 97 Table 4, page 19
30
Product Description
1.8.2.1 Intel® 82815EP Memory Controller Hub (MCH)
The MCH provides the following:
An integrated Synchronous DRAM memory controller with autodetection of SDRAM
An interface for a single AGP device
Support for ACPI Rev. 2.0 and APM Rev. 1.2 compliant power management
1.8.2.2 Intel 82801BA I/O Controller Hub (ICH2)
The ICH2 provides the following:
33 MHz PCI bus interface
Support for up to four PCI master devices
Low Pin Count (LPC) interface that supports an LPC-compatible I/O controller
Support for two Master/DMA devices
Integrated IDE controller that supports Ultra DMA (33 MB/sec) and ATA-66/100 mode
(66 MB/sec, 100 MB/sec)
Integrated LAN Media Access Controller
Universal Serial Bus interface with two USB controllers providing four ports in a
UHCI Implementation (additional USB ports provided with the optional SMSC LPC47M142 I/O controller)
Power management logic for ACPI Rev. 1.0b compliance
System Management Bus (SMBus clock and data lines also routed to PCI bus connector 2)
Real-time clock with 256-byte battery-backed CMOS RAM
AC 97 digital link for audio codec, including: AC 97 2.1 compliance Logic for PCM in, PCM out, and mic input PCI functions for audioCommunication and Network Riser (CNR) interface
1.8.2.2.1 IDE Interfaces
The ICH2s IDE controller has two independent bus-mastering IDE interfaces that can be independently enabled. The IDE interfaces support the following modes:
Programmed I/O (PIO): CPU controls data transfer.
8237-style DMA: DMA offloads the CPU, supporting transfer rates of up to 16 MB/sec.
Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and transfer rates
of up to 33 MB/sec.
ATA-66: DMA protocol on IDE bus supporting host and target throttling and transfer rates of up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is device driver compatible.
ATA-100: DMA protocol on IDE bus allows host and target throttling. The ICH2 ATA-100 logic can achieve read transfer rates up to 100 MB/sec and write transfer rates up to 88 MB/sec.
NOTE
ATA-66 and ATA-100 are faster timings and require a specialized cable to reduce reflections, noise, and inductive coupling.
31
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
The IDE interfaces also support ATAPI devices (such as CD-ROM drives) and ATA devices using the transfer modes listed in Table 71 on page 121.
The BIOS supports Logical Block Addressing (LBA) and Extended Cylinder Head Sector (ECHS) translation modes. The drive reports the transfer rate and translation mode to the BIOS.
The D815EPFV board supports Laser Servo (LS-120) diskette technology through its IDE interfaces. The LS-120 drive can be configured as a boot device by setting the BIOS Setup programs Boot menu to one of the following:
ARMD-FDD (ATAPI removable media device floppy disk drive)
ARMD-HDD (ATAPI removable media device hard disk drive)
For information about Refer to
The location of the IDE connectors Figure 15, page 73
The signal names of the IDE connectors Table 43, page 77
BIOS Setup programs Boot menu Table 79, page 130
1.8.2.2.2 USB
The ICH2 contains two separate USB controllers. The D815EPFV board has four USB ports; one USB peripheral can be connected to each port. For more than four USB devices, an external hub can be connected to any of the ports. The D815EPFV board fully supports the Universal Hub Controller Interface (UHCI).
In the standard configuration, the D815EPFV boards four USB ports are implemented with stacked back panel connectors, routed through the ICH2, as shown in Figure 8.
With the optional SMSC LPC47M142 I/O controller, the D815EPFV board supports up to seven USB ports. The SMSC LPC47M142 I/O controller provides four ports: two ports implemented with stacked back panel connectors and two ports routed to the optional front panel USB connector at location J8F1. The ICH2 provides three ports: two ports are implemented with stacked back panel connectors and the other port is accessible through a CNR add-in card, as shown in Figure 8.
32
Standard Configuration
Product Description
82801BA
I/O Controller Hub
(ICH2)
82801BA
I/O Controller Hub
(ICH2)
USB
SMSC LPC47M142
LPC Bus
I/O Controller
USB ports 0 and 1
USB
USB ports 2 and 3
Optional Configuration
USB ports 0 and 2
USB
CNR connector
USB ports 1 and 3
USB
USB ports 4 and 5
Figure 8. USB Port Configurations
Back panel USB connectors
Back panel USB connectors
Back panel USB connectors
USB port accesible through a USB connector on an optional CNR add-in card
Back panel USB connectors
Front panel USB connector
OM11892
NOTE
Computer systems that have an unshielded cable attached to a USB port may not meet FCC Class B requirements, even if no device or a low-speed USB device is attached to the cable. Use shielded cable that meets the requirements for full-speed devices.
For information about Refer to
The location of the USB connectors on the back panel Figure 13, page 64
The signal names of the back panel USB connectors Table 21, page 65
The location of the optional front panel USB connector Figure 16, page 78
The signal names of the optional front panel USB connector Table 45, page 79
The USB specification and UHCI Table 4, page 19
33
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
1.8.2.2.3 Real-Time Clock, CMOS SRAM, and Battery
The real-time clock provides a time-of-day clock and a multicentury calendar with alarm features. The real-time clock supports 256 bytes of battery-backed CMOS SRAM in two banks that are reserved for BIOS use.
A coin-cell battery (CR2032) powers the real-time clock and CMOS memory. When the computer is not plugged into a wall socket, the battery has an estimated life of three years. When the computer is plugged in, the standby current from the power supply extends the life of the battery. The clock is accurate to ± 13 minutes/year at 25 ºC with 3.3 VSB applied.
The time, date, and CMOS values can be specified in the BIOS Setup program. The CMOS values can be returned to their defaults by using the BIOS Setup program.
NOTE
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS SRAM at power-on.
1.8.2.3 Firmware Hub (FWH)
The system BIOS is stored in the 4 Mbit FWH.
34

1.9 I/O Controller

The D815EFV and D815EPFV boards support either of two I/O controllers:
The standard SMSC LPC47M132 I/O controller or
The optional SMSC LPC47M142 I/O controller
Both I/O controllers provide the following features:
Low pin count (LPC) interface
3.3 V operation
Two serial ports
One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port
(EPP) support
Serial IRQ interface compatible with serialized IRQ support for PCI systems
PS/2-style mouse and keyboard interfaces
Interface for one 1.2 MB, 1.44 MB, or 2.88 MB diskette drive
Intelligent power management, including a programmable wake up event interface
PCI power management support
Fan control One fan control output Two fan tachometer inputs
The optional SMSC LPC47M142 I/O controller provides an additional USB hub.
Product Description
The BIOS Setup program provides configuration options for the I/O controller.
For information about Refer to
The USB hubs on the D815EFV board Section 1.8.1.2.2, page 27
The USB hubs on the D815EPFV board Section 1.8.2.2.2, page 32
SMSC LPC47M132 and LPC47M142 I/O controllers http://www.smsc.com/

1.9.1 Serial Ports

The D815EFV and D815EPFV boards each have two serial ports. Serial port A is located on the back panel. Serial port B is accessible using the connector at location J8H1. The serial ports NS16C550-compatible UARTs support data transfers at speeds up to 115.2 kbits/sec with BIOS support. The serial ports can be assigned as COM1 (3F8h), COM2 (2F8h), COM3 (3E8h), or COM4 (2E8h).
For information about Refer to
The location of the serial port A connector Figure 13, page 64
The signal names of the serial port A connector Table 24, page 66
The location of the serial port B connector Figure 16, page 78
The signal names of the serial port B connector Table 44, page 79
35
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification

1.9.2 Parallel Port

The connector for the parallel port is a 25-pin D-Sub connector located on the back panel. In the BIOS Setup program, the parallel port can be set to the following modes:
Output only (PC-AT
-compatible mode)
Bi-directional (PS/2 compatible)
EPP
ECP
For information about Refer to
The location of the parallel port connector Figure 13, page 64
The signal names of the parallel port connector Table 23, page 66
Setting the parallel ports mode Table 69, page 118

1.9.3 Diskette Drive Controller

The I/O controller supports one diskette drive that is compatible with the 82077 diskette drive controller and supports both PC-AT and PS/2 modes.
For information about Refer to
The location of the diskette drive connector Figure 15, page 73
The signal names of the diskette drive connector Table 42, page 77
The supported diskette drive capacities and sizes Table 72, page 123

1.9.4 Keyboard and Mouse Interface

PS/2 keyboard and mouse connectors are located on the back panel. The +5 V lines to these connectors are protected with a thermistor, which limits the current to a specified amperage.
NOTE
The keyboard is supported in the bottom PS/2 connector and the mouse is supported in the top PS/2 connector. Power to the computer should be turned off before a keyboard or mouse is connected or disconnected.
The keyboard controller contains the AMI keyboard and mouse controller code, provides the keyboard and mouse control functions, and supports password protection for power-on/reset. A power-on/reset password can be specified in the BIOS Setup program.
The keyboard controller also supports the hot-key sequence <Ctrl><Alt><Del> for a software reset (operating system dependent). This key sequence resets the computers software by jumping to the beginning of the BIOS code and running the power-on self-test (POST).
For information about Refer to
The location of the keyboard and mouse connectors Figure 13, page 64
The signal names of the keyboard and mouse connectors Table 20, page 65
Overcurrent protection for back panel connectors Table 19, page 65
36
Product Description

1.10 Graphics Subsystems

This section describes the graphics subsystems used by the D815EFV and D815EPFV boards:
The D815EFV board uses the Intel 815E graphics subsystem, described below.
The D815EPFV board uses the Intel 815EP graphics subsystem, described in Section 1.10.2,
beginning on page 41.

1.10.1 Intel 815E Graphics Subsystem

The 815E chipset, used on the D815EFV board, contains two separate, mutually exclusive graphics options. Either the integrated graphics controller (contained within the 82815 GMCH) is used, or an add-in AGP adapter can be used.
The GMCH includes an integrated display cache SDRAM controller that supports a Graphics Performance Accelerator (GPA) card. The GPA card is a 32-bit 133 MHz 4 MB SDRAM array for enhanced integrated 2D and 3D graphics performance. This interface is multiplexed between the display cache interface and the AGP connector. When an AGP card is installed, the integrated graphics controller is disabled and the display cache interface is not used.
For information about Refer to
GPA support Section 1.10.1.3.1, page 40
1.10.1.1 Integrated Graphics Controller
The GMCH features the following:
Integrated graphics controller 3-D Hyperpipelined architecture Full 2-D hardware acceleration Motion video acceleration
3-D graphics visual and texturing enhancement
Display Integrated 24-bit 230 MHz RAMDAC Display Data Channel Standard, Version 3.0, Level 2B protocols compliant
Video Hardware motion compensation for software MPEG2 decode Software DVD at 30 fps
Integrated graphics memory controller
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Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
Table 7 lists the refresh frequencies supported by the graphics subsystem.
Table 7. Supported Graphics Refresh Frequencies
Resolution Color Palette
320 x 200
320 x 240
352 x 480
352 x 576
400 x 300
512 x 384
640 x 400
640 x 480
640 x 480 16 M colors 60, 70, 72, 75, 85 KDO
800 x 600
1024 x 768
256 colors 70
64 K colors 70 D3
16 M colors 70 D
256 colors 70
64 K colors 70 D3
16 M colors 70 D
256 colors 70
64 K colors 70 D3
16 M colors 70 D
256 colors 70
64 K colors 70 D3
16 M colors 70 D
256 colors 70
64 K colors 70 D3
16 M colors 70 D
256 colors 70
64 K colors 70 D3
16 M colors 70 D
256 colors 70
64 K colors 70 D3
16 M colors 70 D
256 colors 60, 70, 72, 75, 85 KDO
64 K colors 60, 75, 85 KD3O
64 K colors 70, 72 KDO
256 colors 60, 70, 72, 75, 85 KDO
64 K colors 60, 70, 72, 75, 85 KD3O
16 M colors 60, 70, 72, 75, 85 KDO
256 colors 60, 70, 75, 85 KDO
64 K colors 60, 70, 75 KD3O
64 K colors 85 KD3
16 M colors 60, 70, 75, 85 KD
Available Refresh Frequencies (Hz)
Notes
D
D
D
D
D
D
D
continued
38
Table 7. Supported Graphics Refresh Frequencies (continued)
Resolution Color Palette
1152 x 864
1280 x 768
1280 x 1024
1600 x 1200
Notes: K = Desktop
D = DirectDraw 3 = Direct3D O = Overlay F = Digital Display Device only. A mode will be supported on both analog CRTs and digital display devices (KD3O applies to both types of displays), unless indicated otherwise.
256 colors 60, 70, 72, 75 KDO
256 colors 85 KD
64 K colors 60, 70 KD3O
64 K colors 72, 75, 85 KD3
16 M colors 60 KDO
16 M colors 75, 85 KD
256 colors 60 (reduced blanking) KDOF
64 K colors 60 (reduced blanking) KD3F
16 M colors 60 (reduced blanking) KDF
256 colors 60 KDO
256 colors 70, 72, 75, 85 KD
64 K colors 60, 70, 72, 75, 85 KD3
16 M colors 60, 70, 75, 85 KD
256 colors
and OpenGL†
Available Refresh Frequencies (Hz)
60, 70, 72, 75 KD
Notes
Product Description
For information about Refer to
Obtaining graphics software and utilities Section 1.3, page 18
1.10.1.2 Digital Video Output (DVO) Connector (Optional)
The D815EFV board routes the Intel 82815 GMCH DVO port to an optional onboard 40-pin DVO connector. The DVO connector can be cabled to a DVI or TV out card to enable digital displays or TV out functionality. The Digital Visual Interface (DVI) specification provides a high-speed digital connection for visual data types when using the integrated graphics controller. This interface is active only when the integrated graphics controller is enabled.
The DVI interface allows interfacing with a discrete Transmission Minimized Differential Signaling (TMDS) transmitter to enable platform support for DVI compliant digital displays or with a discrete TV encoder for TV out functionality.
For information about Refer to
The location of the optional DVO connector Figure 14, page 69
The signal names of the optional DVO connector Table 32, page 71
Obtaining the DVI specification Table 4, page 19
39
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
1.10.1.3 AGP Universal Connector
NOTE
Install memory in the DIMM sockets prior to installing the AGP video card to avoid interference with the memory retention mechanism.
The AGP universal connector supports either:
Graphics Performance Accelerator (GPA) cards with 133 MHz SDRAM display cache
1x, 2x, or 4x AGP add-in cards with either 3.3 V or 1.5 V I/O
For information about Refer to
The location of the AGP universal connector Figure 15, page 73
The signal names of the AGP universal connector Table 41, page 76
1.10.1.3.1 Graphics Performance Accelerator (GPA) Support
The Intel 815E GMCH display cache is a single channel 32-bit wide SDRAM interface. The 4 MB display cache resides on a GPA card that plugs into the AGP connector. The BIOS detects a GPA card if present in the AGP port and initializes it as display cache memory. When a GPA card is initialized, the BIOS allocates 1 MB of system memory to support the internal display device operation.
1.10.1.3.2 Dynamic Video Memory Technology (DVMT)
DVMT enables enhanced graphics and memory performance through Direct AGP, and highly efficient memory utilization. DVMT ensures the most efficient use of all available memory for maximum 2D/3D graphic performance. DVMT is implemented on the D815EFV board with a GPA (Graphics Performance Accelerator) card installed in the AGP connector.
NOTE
In earlier documentation, the GPA card was referred to as the AGP Inline Memory Module (AIMM).
DVMT uses 1 MB of system physical memory for compatibility with legacy applications. An example of this would be when using VGA graphics under DOS. Once loaded, the operating system and graphics drivers allocate the buffers needed for performing graphics functions. When the 4 MB GPA card is installed, the Z-buffer and GDI data are managed directly from this dedicated graphics memory thereby avoiding operating system memory manager calls and improving performance.
At system BIOS POST, the BIOS displays either the amount of physical memory allocated for display cache or the size of the GPA card (4 MB) if installed. Operating systems such as Windows NT 4.0 and Windows 2000 may display the maximum amount of frame buffer memory possible based on the system memory configuration.
40
Product Description
NOTE
The use of DVMT requires operating system driver support.
For information about Refer to
Obtaining the DVMT white paper http://developer.intel.com/design/chipsets/815e/
Obtaining the AIMM specification Table 4, page 19
1.10.1.3.3 AGP Add-in Card Support
AGP is a high-performance interface for graphics-intensive applications, such as 3D applications. While based on the PCI Local Bus Specification, Rev. 2.1, AGP is independent of the PCI bus and is intended for exclusive use with graphical display devices. AGP overcomes certain limitations of the PCI bus related to handling large amounts of graphics data with the following features:
Pipelined memory read and write operations that hide memory access latency
Demultiplexing of address and data on the bus for nearly 100 percent efficiency
For information about Refer to
Obtaining the Accelerated Graphics Port Interface Specification Table 4, page 19

1.10.2 Intel 815EP Graphics Subsystem

NOTE
Install memory in the DIMM sockets prior to installing the AGP video card to avoid interference with the memory retention mechanism.
The Intel 815EP chipset, used on the D815EPFV board, provides an AGP universal connector which supports a 1x, 2x, or 4x AGP add-in card with either 3.3 V or 1.5 V I/O.
AGP is a high-performance interface for graphics-intensive applications, such as 3D applications. While based on the PCI Local Bus Specification, Rev. 2.1, AGP is independent of the PCI bus and is intended for exclusive use with graphical display devices. AGP overcomes certain limitations of the PCI bus related to handling large amounts of graphics data with the following features:
Pipelined memory read and write operations that hide memory access latency
Demultiplexing of address and data on the bus for nearly 100 percent efficiency
For information about Refer to
The location of the AGP universal connector Figure 15, page 73
The signal names of the AGP universal connector Table 41, page 76
Obtaining the Accelerated Graphics Port Interface Specification Table 4, page 19
41
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification

1.11 Audio Subsystem

The D815EFV and D815EPFV boards both include an Audio Codec 97 (AC 97) compatible audio subsystem consisting of these devices:
Intel 82801BA I/O Controller Hub (ICH2)
Analog Devices AD1885 analog codec

1.11.1 AD1885 Audio Codec

The AD1885 is a fully AC 97 compliant codec. The codecs features include:
> 90 dB signal-to-noise ratio sound quality
Power management support for APM 1.2 and ACPI 1.0 (driver dependant)
Playback sample rates up to 48 kHz
16 bit stereo full-duplex codec
Software compatible with Windows 98 SE, Windows 2000, Windows NT 4.0, and
Windows Millennium (Me)
Full-duplex operation at asynchronous hardware record/playback samples rates
Frequency response: 20 Hz to 20 kHz (± 0.1 dB)
Figure 9 is a block diagram of the D815EFV and D815EPFV boards audio subsystem, including the Intel 82801BA ICH2 digital controller, the AD1885 analog codec, and the audio connectors.
82801BA
I/O Controller Hub
(ICH2)
For information about Refer to
Obtaining the AC 97 specification Table 4, page 18
AC 97 Link
Figure 9. Block Diagram of Audio Subsystem

1.11.2 Audio Connectors

The audio connectors include the following:
Front panel audio (optional): Mic in Line out
ATAPI-style connectors: CD-ROM Auxiliary line in
Analog Devices
AD1885
Analog Codec
CD-ROM
Line In
Audio In
Mic In
Front Panel Audio (optional)
Line Out
OM11888
42
Product Description
Back panel audio connectors: Line in Line out Mic in
For information about Refer to
The back panel audio connectors Section 2.8.1, page 64
1.11.2.1 Front Panel Audio Connector (Optional)
A 2 x 5-pin connector for routing mic in and line out to the front panel.
For information about Refer to
The location of the optional front panel audio connector Figure 14, page 69
The signal names of the optional front panel audio connector Table 30, page 70
NOTE
The front panel audio connector is alternately used as a jumper block for routing audio signals. Refer to Section 2.9.1 on page 82 for more information.
1.11.2.2 ATAPI CD-ROM Connector
A 1 x 4-pin ATAPI-style connector connects an internal ATAPI CD-ROM drive to the audio mixer.
For information about Refer to
The location of the ATAPI CD-ROM connector Figure 14, page 69
The signal names of the ATAPI CD-ROM connector Table 31, page 70
1.11.2.3 Auxiliary Line In Connector
A 1 x 4-pin ATAPI-style connector connects the left and right channel signals of an internal audio device to the audio subsystem.
For information about Refer to
The location of the auxiliary line in connector Figure 14, page 69
The signal names of the auxiliary line in connector Table 29, page 70
43
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification

1.12 LAN Subsystem (Optional)

The network interface controller subsystem consists of the ICH2, with integrated LAN Media Access Controller (MAC), and a physical layer interface device. Features of the LAN subsystem include:
PCI Bus Master Interface
CSMA/CD Protocol Engine
Serial CSMA/CD unit interface that supports the following physical layer interface devices: 82562ET onboard LAN 82562ET/MT (10/100 Mbit/sec Ethernet) on the optional CNR 82562EH (1 Mbit/sec HomePNA
PCI Power Management Supports APM Supports ACPI technology Supports Wake up from suspend state (optional Wake on LAN technology)
For information about Refer to
Obtaining LAN software and drivers Section 1.3, page 18
) on the optional CNR

1.12.1 Intel® 82562ET Platform LAN Connect Device

The Intel 82562ET component provides an interface to the back panel RJ-45 connector with integrated LEDs. This physical interface may alternately be provided through the CNR connector.
The Intel 82562ET provides the following functions:
Basic 10/100 Ethernet LAN Connectivity
Supports RJ-45 connector with status indicator LEDs
Full driver compatibility
Advanced Power Management support
Programmable transit threshold
Configuration EEPROM that contains the MAC address

1.12.2 RJ-45 LAN Connector LEDs

Two LEDs are built into the RJ-45 LAN connector. Table 8 describes the LED states when the board is powered up and the LAN subsystem is operating.
Table 8. LAN Connector LED States
LED Color LED State Condition
Off 10 Mbit/sec data rate is selected. Green
On 100 Mbit/sec date rate is selected.
Yellow
Off LAN link is not established.
On (steady state) LAN link is established.
On (brighter and pulsing) The computer is communicating with another computer on
the LAN.
44
Product Description

1.13 Hardware Management Subsystem

The hardware management features enable the board to be compatible with the Wired for Management (WfM) specification. The board has several hardware management features, including the following:
Hardware monitoring
Chassis intrusion detect connector (optional)
Fan control and monitoring (implemented on both the SMSC LPC47M132 and optional SMSC

1.13.1 Hardware Monitor Component

LPC47M142 I/O controllers)
For information about Refer to
Obtaining the WfM specification Table 4, page 18
Fan control functions of the SMSC LPC47M132 and optional SMSC LPC47M142 I/O controllers
Section 1.13.2, page 45
The hardware monitor component provides low-cost instrumentation capabilities. The features of the component include:
Internal ambient temperature sensing
Remote thermal diode sensing for direct monitoring of processor temperature (if supported in
the processor)
Power supply monitoring (+12 V, +5 V, +3.3 V, +2.5 V, 3.3 VSB, and V
CCP) to detect levels
above or below acceptable values
SMBus interface

1.13.2 Chassis Intrusion Detect Connector (Optional)

The board supports a chassis security feature that detects if the chassis cover is removed. For the chassis intrusion circuit to function, the chassis power supply must be connected to AC power. The security feature uses a mechanical switch on the chassis that attaches to the chassis intrusion detect connector. The mechanical switch is closed for normal computer operation. Chassis intrusion detection can be supported with third party SMBus software.
For information about Refer to
The location of the optional chassis intrusion detect connector Figure 14, page 69
The signal names of the optional chassis intrusion detect connector Table 37, page 72
45
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification

1.13.3 Fan Control and Monitoring

The SMSC LPC47M132 I/O controller and the optional SMSC LPC47M142 I/O controller both provide fan tachometer input for the processor fan (fan 1) and system fan (fan 2) and fan control output for the system fan (fan 2) and the chassis fan (fan 3). Monitoring and control can be implemented using third-party software.
For information about Refer to
The functions of the fan connectors Section 1.15.2.2, page 52
The location of the fan connectors Figure 14, page 69
The signal names of the fan connectors Section 2.8.2.2, page 69

1.14 CNR Connector (Optional)

The CNR connector supports the audio, modem, USB, and LAN interfaces of the Intel 815E and Intel 815EP chipsets. Figure 10 shows the signal interface between the riser and the ICH2.
NOTE
Intel 82801BA
I/O Controller Hub
(ICH2)
Figure 10. ICH2 and CNR Signal Interface
AC 97 Interfaces
LAN Interface
SMBus
USB (Optional)
Communication and
Networking Riser
(Up to two AC ’97 codecs
and one LAN device)
CNR Connector
OM11484
The USB interface from the ICH2 to the CNR is optional on this board.
The interfaces supported by the CNR connector include (but are not limited to) the following:
AC ’97 interface: supports audio and/or modem functions on the CNR board.
LAN interface: interface includes an eight-pin interface for use with Platform LAN Connect
(PLC) based devices.
SMBus interface: provides Plug-and-Play functionality for the CNR board.
USB interface (optional): provides a USB interface for the CNR board.
To learn more about the CNR, refer to the CNR specification.
For information about Refer to
Obtaining the CNR specification Table 4, page 19
46

1.15 Power Management

Power management is implemented at several levels, including:
Software support: Advanced Power Management (APM) Advanced Configuration and Power Interface (ACPI)
Hardware support: Power connector Fan connectors Wake on LAN technology Instantly Available technology Resume on Ring Wake from USB Wake on Keyboard Wake on PME# Wake on RTC (real-time clock) alarm
Product Description

1.15.1 Software Support

The software support for power management includes:
APM
ACPI
If the D815EFV or D815EPFV board is used with an ACPI-aware operating system, the BIOS can provide ACPI support. Otherwise, it defaults to APM support.
1.15.1.1 APM
APM makes it possible for the computer to enter an energy-saving standby mode. The standby mode can be initiated in the following ways:
Time-out period specified in the BIOS Setup program
From the operating system, such as the standby menu item in Windows 98
In standby mode, the D815EFV and D815EPFV boards can reduce power consumption by
spinning down hard drives, and reducing power to, or turning off of, VESA monitors. Power management mode can be enabled or disabled in the BIOS Setup program.
While in standby mode, the system retains the ability to respond to external interrupts and service requests, such as incoming faxes or network messages. Any keyboard or mouse activity brings the system out of standby mode and immediately restores power to the monitor.
DPMS-compliant
47
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
The BIOS enables APM by default; but the operating system must support an APM driver for the power management features to work. For example, Windows 98 supports the power management features upon detecting that APM is enabled in the BIOS.
For information about Refer to
Enabling or disabling power management in the BIOS Setup program Section 4.6, page 127
The D815EFV and D815EPFV boards compliance level with APM Table 4, page 19
1.15.1.2 ACPI
ACPI gives the operating system direct control over the power management and Plug and Play functions of a computer. The use of ACPI with the D815EFV or D815EPFV board requires an operating system that provides full ACPI support. ACPI features include:
Plug and Play (including bus and device enumeration) and APM support normally contained in the BIOS.
Power management control of individual devices, add-in boards (some add-in boards may require an ACPI-aware driver), video displays, and hard disk drives.
Methods for achieving less than 15-watt system operation in the power-on/standby sleeping state.
A soft-off feature that enables the operating system to power-off the computer.
Support for multiple wake up events (see Table 11 on page 50).
Support for a front panel power and sleep mode switch. Table 9 lists the system states based
on how long the power switch is pressed, depending on how ACPI is configured with an ACPI-aware operating system.
Table 9. Effects of Pressing the Power Switch
If the system is in this state
Off (ACPI G2/G5 – soft-off)
On (ACPI G0 – working state)
On (ACPI G0 – working state)
Sleep (ACPI G1 – sleeping state)
Sleep (ACPI G1 – sleeping state)
and the power switch is pressed for
Less than seven seconds Power-on
Less than seven seconds Soft-off/Standby
More than seven seconds Fail safe power-off
Less than seven seconds Wake up
More than seven seconds Power-off
the system enters this state
(ACPI G0 – working state)
(ACPI G1 – sleeping state)
(ACPI G2/G5 – soft-off)
(ACPI G0 – working state)
(ACPI G2/G5 – soft-off)
For information about Refer to
The D815EFV and D815EPFV boards compliance level with ACPI Table 4, page 19
48
Product Description
1.15.1.2.1 System States and Power States
Under ACPI, the operating system directs all system and device power state transitions. The operating system puts devices in and out of low-power states based on user preferences and knowledge of how devices are being used by applications. Devices that are not being used can be turned off. The operating system uses information from applications and user settings to put the system as a whole into a low-power state.
Table 10 lists the power states supported by the D815EFV and D815EPFV boards along with the associated system power targets. See the ACPI specification for a complete description of the various system and power states.
Table 10. Power States and Targeted System Power
Global States Sleeping States
G0 – working state
G1 – sleeping state
G1 – sleeping state
G2/S5 S5 – soft-off.
G3 – mechanical off
AC power is disconnected from the computer.
Notes:
1. Total system power is dependent on the system configuration, including add-in boards and peripherals powered by the system chassis power supply.
2. Dependent on the standby power consumption of wake-up devices used in the system.
S0 – working C0 – working D0 – working
S1 – CPU stopped C1 – stop
S3 – suspend to RAM. Context saved to RAM.
Context not saved. Cold boot is required.
No power to the system.
CPU States Device States
state
D1, D2, D3 –
grant
No power D3 – no power
No power D3 – no power
No power D3 – no power for
device specification specific.
except for wake up logic.
except for wake up logic.
wake up logic, except when provided by battery or external source.
Targeted System Power
(Note 1)
Full power > 30 W
5 W < power < 30 W
Power < 5 W
Power < 5 W
No power to the system so that service can be performed.
(Note 2)
(Note 2)
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Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
1.15.1.2.2 Wake Up Devices and Events
Table 11 lists the devices or specific events that can wake the computer from specific states.
Table 11. Wake Up Devices and Events
These devices/events can wake up the computer from this state
Power switch S1, S3, S5
RTC alarm S1, S3, S5
Wake on LAN technology connector (optional) S1, S3, S5
PME# S1, S3, S5
Modem (back panel serial port A) S1, S3
USB S1, S3
PS/2 keyboard S1, S3
Notes:
1. S5 events are supported only on PCI bus connector 2.
2. For the Wake on LAN technology connector and PME#, S5 is disabled by default in the BIOS Setup program. Setting these options to Power On will enable a wake-up event from LAN in the S5 state.
3. Wake from CNR modem is not supported on the D815EFV and D815EPFV boards.
(Note 1)
(Notes 1 and 2)
(Notes 1 and 2)
(Note 3)
NOTE
The use of these wake up events from an ACPI state requires an operating system that provides full ACPI support. In addition, software, drivers, and peripherals must fully support ACPI wake events.
NOTE
Wake up from PS/2 mouse is peripheral, operating system, and driver dependent; it is not a board­level feature.
1.15.1.2.3 Plug and Play
In addition to power management, ACPI provides controls and information so that the operating system can facilitate Plug and Play device enumeration and configuration. ACPI is used only to enumerate and configure D815EFV and D815EPFV board devices that do not have other hardware standards for enumeration and configuration. PCI devices on the D815EFV and D815EPFV boards, for example, are not enumerated by ACPI.
50
Product Description

1.15.2 Hardware Support

CAUTION
If the Wake on LAN and Instantly Available technology features are used, ensure that the power supply provides adequate +5 V standby current. Failure to do so can damage the power supply. The total amount of standby current required depends on the wake devices supported and manufacturing options. Refer to Section 2.11.3 on page 93 for additional information.
The boards provides several hardware features that support power management, including:
Power connector
Fan connectors
Wake on LAN technology connector (optional)
Instantly Available technology
Resume on Ring
Wake from USB
Wake from PS/2 keyboard
PME# wakeup support
Wake on LAN technology and Instantly Available technology require power from the +5 V standby line. The sections discussing these features describe the incremental standby power requirements for each.
Resume on Ring enables telephony devices to access the computer when it is in a power-managed state. The method used depends on the type of telephony device (external or internal) and the power management mode being used (APM or ACPI).
NOTE
The use of Resume on Ring and Wake from USB technologies from an ACPI state requires an operating system that provides full ACPI support.
1.15.2.1 Power Connector
When used with an ATX-compliant power supply that supports remote power on/off, the D815EFV and D815EPFV boards can turn off the system power through software control. To enable soft-off control in software, advanced power management must be enabled in the BIOS Setup program and in the operating system. When the system BIOS receives the correct APM command from the operating system, the BIOS turns off power to the computer.
With soft-off enabled, if power to the computer is interrupted by a power outage or a disconnected power cord, when power resumes, the computer returns to the power state it was in before power was interrupted (on or off). The computers response can be set using the After Power Failure feature in the BIOS Setup programs Power menu.
For information about Refer to
The location of the power connector Figure 14, page 69
The signal names of the power connector Table 34, page 71
The BIOS Setup programs Power menu Section 4.6, page 127
The ATX specification Table 4, page 19
51
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
1.15.2.2 Fan Connectors
The D815EFV and D815EPFV boards both have two standard fan connectors and one optional fan connector. The functions of these connectors are described in Table 12.
Table 12. Fan Connector Descriptions
Connector
Processor fan Fan 1 J1B1 Provides +12 V DC for a processor fan or active fan
System fan Fan 2 J9H1 Provides +12 V DC for a system or chassis fan. The
Chassis fan (optional)
For information about Refer to
The location of the fan connectors Figure 14, page 69
The signal names of the fan connectors Section 2.8.2.2, page 69
Silkscreen Label
Fan 3 J4G1 Provides +12 V DC for a system or chassis. The fan
Reference Designator
Function
heatsink. A tachometer feedback connection is also provided.
fan voltage can be switched on or off, depending on the power management state of the computer. A tachometer feedback connection is also provided.
voltage can be switched on or off, depending on the power management state of the computer.
1.15.2.3 Wake on LAN Technology
CAUTION
For Wake on LAN technology, the +5 V standby line for the power supply must be capable of providing adequate +5 V standby current. Failure to provide adequate standby current when implementing Wake on LAN technology can damage the power supply. Refer to Section 2.11.3 on page 93 for additional information.
NOTE
The optional Wake on LAN technology connector is present only on boards that do not have the Intel 82562ET PLC device, which is part of the optional onboard LAN subsystem.
Wake on LAN technology enables remote wakeup of the computer through a network. The LAN subsystem PCI bus network adapter monitors network traffic at the Media Independent Interface.
Upon detecting a Magic Packet the computer. Depending on the LAN implementation, the D815EFV and D815EPFV boards support Wake on LAN technology in the following ways:
Through the optional Wake on LAN technology connector (APM only)
Through the PCI bus PME# signal for PCI 2.2 compliant LAN designs (ACPI only)
Through the onboard LAN subsystem when enabled in Setup (ACPI only)
frame, the LAN subsystem asserts a wakeup signal that powers up
52
Product Description
The Wake on LAN technology connector can be used with PCI bus network adapters that have a remote wake up connector, as shown in Figure 11. Network adapters that are PCI 2.2 compliant assert the wakeup signal through the PCI bus signal PME# (pin A19 on the PCI bus connectors).
Network Interface Card
PCI Slot
Figure 11. Using the Wake on LAN Technology Connector
For information about Refer to
The location of the optional Wake on LAN technology connector Figure 14, page 69
The signal names of the optional Wake on LAN technology connector Table 38, page 72
Remote
Wake up
connector
Desktop Board
Wake on
LAN
technology
connector
OM09129
1.15.2.4 Instantly Available Technology
CAUTION
For Instantly Available technology, the +5 V standby line for the power supply must be capable of providing adequate +5 V standby current. Failure to provide adequate standby current when implementing Instantly Available technology can damage the power supply. Refer to Section 2.11.3 on page 93 for additional information.
Instantly Available technology enables the D815EFV and D815EPFV boards to enter the ACPI S3 (suspend-to-RAM) sleep-state. While in the S3 sleep-state, the computer will appear to be off (the power supply is off, the fans are off, and the front panel LED is amber if dual-color, or off if single-color.) When signaled by a wake-up device or event, the system quickly returns to its last known wake state.
The D815EFV and D815EPFV boards support the PCI Bus Power Management Interface Specification. Add-in boards that also support this specification can participate in power management and can be used to wake the computer.
The use of Instantly Available technology requires operating system support and PCI 2.2 compliant add-in cards and drivers.
The standby power indicator LED (at location CR6E1) shows that power is still present at the DIMM and PCI bus connectors, even when the computer appears to be off. Figure 12 shows the location of the standby power indicator LED on the D815EFV and D815EPFV boards.
53
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
CR6E1
Present only on D815EFV boards
Figure 12. Location of Standby Power Indicator LED
OM11470
For information about Refer to
The devices and events that can wake the computer from the S3 state Table 11, page 50
The PCI Bus Power Management Interface Specification Table 4, page 19
1.15.2.5 Resume on Ring
The operation of Resume on Ring can be summarized as follows:
Resumes operation from either the APM sleep mode or the ACPI S1 state
Requires only one call to access the computer
Detects incoming call similarly for external and internal modems
Requires modem interrupt be unmasked for correct operation
54
Product Description
1.15.2.6 Wake from USB
USB bus activity wakes the computer from an ACPI S1 or S3 state.
NOTE
Wake from USB requires the use of a USB peripheral that supports Wake from USB.
1.15.2.7 Wake from PS/2 Keyboard
PS/2 keyboard activity wakes the computer from an ACPI S1 or S3 state.
1.15.2.8 PME# Wakeup Support
When the PME# signal on the PCI bus is asserted, the computer wakes from an ACPI S1, S3, or S5 state.
1.15.2.9 Wake from RTC Alarm
An RTC alarm wakes the computer from an ACPI S1, S3, or S5 state.
55
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
56

2 Technical Reference

What This Chapter Contains
2.1 Introduction.................................................................................................................57
2.2 Memory Map ..............................................................................................................57
2.3 I/O Map .....................................................................................................................58
2.4 DMA Channels ...........................................................................................................60
2.5 PCI Configuration Space Map ....................................................................................60
2.6 Interrupts ....................................................................................................................61
2.7 PCI Interrupt Routing Map..........................................................................................61
2.8 Connectors.................................................................................................................63
2.9 Jumper Blocks............................................................................................................82
2.10 Mechanical Considerations.........................................................................................84
2.11 Electrical Considerations ............................................................................................92
2.12 Thermal Considerations..............................................................................................95
2.13 Reliability ....................................................................................................................96
2.14 Environmental ............................................................................................................97
2.15 Regulatory Compliance ..............................................................................................98

2.1 Introduction

Sections 2.2 - 2.6 contain several standalone tables. Table 13 describes the system memory map, Table 14 shows the I/O map, Table 15 lists the DMA channels, Table 16 defines the PCI configuration space map, and Table 17 describes the interrupts. The remaining sections in this chapter are introduced by text found with their respective section headings.

2.2 Memory Map

Table 13. System Memory Map
Address Range (decimal) Address Range (hex) Size Description
1024 K - 524288 K 100000 - 1FFFFFFF 511 MB Extended memory
960 K - 1024 K F0000 - FFFFF 64 KB Runtime BIOS
896 K - 960 K E0000 - EFFFF 64 KB Reserved
800 K - 896 K C8000 - DFFFF 96 KB Available high DOS memory (open
to the PCI bus)
640 K - 800 K A0000 - C7FFF 160 KB Video memory and BIOS
639 K - 640 K 9FC00 - 9FFFF 1 KB Extended BIOS data (movable by
memory manager software)
512 K - 639 K 80000 - 9FBFF 127 KB Extended conventional memory
0 K - 512 K 00000 - 7FFFF 512 K Conventional memory
57
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification

2.3 I/O Map

Table 14. I/O Map
Address (hex) Size Description
0000 - 000F 16 bytes DMA controller 0020 - 0021 2 bytes Programmable Interrupt Control (PIC) 0040 - 0043 4 bytes System timer 0060 1 byte Keyboard controller bytereset IRQ 0061 1 byte System speaker 0064 1 byte Keyboard controller, CMD/STAT byte 0070 - 0071 2 bytes System CMOS/Real Time Clock 0072 - 0073 2 bytes System CMOS 0080 - 008F 16 bytes DMA controller 0092 1 byte Fast A20 and PIC 00A0 - 00A1 2 bytes PIC 00B2 - 00B3 2 bytes APM control 00C0 - 00DF 32 bytes DMA 00F0 1 byte Numeric data processor 0170 - 0177 8 bytes Secondary IDE channel 01F0 - 01F7 8 bytes Primary IDE channel
One of these ranges: 0200 - 0207 0208 - 020F 0210 - 0217 0218 - 021F
One of these ranges: 0220 - 022F 0240 - 024F
0228 - 022F* 8 bytes LPT3
0278 - 027F* 8 bytes LPT2 02E8 - 02EF* 8 bytes COM4/video (8514A) 02F8 - 02FF* 8 bytes COM2 0376 1 byte Secondary IDE channel command port 0377, bits 6:0 7 bits Secondary IDE channel status port 0378 - 037F 8 bytes LPT1 03B0 - 03BB 12 bytes Intel 82815 GMCH/AGP 03C0 - 03DF 32 bytes Intel 82815 GMCH/AGP 03E8 - 03EF 8 bytes COM3 03F0 - 03F5 6 bytes Diskette channel 1 03F6 1 byte Primary IDE channel command port 03F8 - 03FF 8 bytes COM1
04D0 - 04D1 2 bytes Edge/level triggered PIC
LPTn + 400 8 bytes ECP port, LPTn base address + 400h 0CF8 - 0CFB** 4 bytes PCI configuration address register 0CF9*** 1 byte Turbo and reset control register 0CFC - 0CFF 4 bytes PCI configuration data register
Can vary from 1 byte to 8 bytes
16 bytes Audio (Sound Blaster Pro†-compatible)
Audio
continued
58
Table 14. I/O Map (continued)
Address (hex) Size Description
FFA0 - FFA7 8 bytes Primary bus master IDE registers FFA8 - FFAF 8 bytes Secondary bus master IDE registers 96 contiguous bytes starting on a
128-byte divisible boundary 64 contiguous bytes starting on a
64-byte divisible boundary 64 contiguous bytes starting on a
64-byte divisible boundary 64 contiguous bytes starting on a
64-byte divisible boundary 256 contiguous bytes starting on a
256-byte divisible boundary 256 contiguous bytes starting on a
256-byte divisible boundary 32 contiguous bytes starting on a
32-byte divisible boundary 32 contiguous bytes starting on a
32-byte divisible boundary 16 contiguous bytes starting on a
16-byte divisible boundary 4096 contiguous bytes starting on a
4096-byte divisible boundary
* Default, but can be changed to another address range.
** Dword access only
*** Byte access only
ICH2 (ACPI + TCO)
D815EFV/D815EPFV board resource
ICH2 LAN controller
ICH2 AC 97 audio master
ICH2 AC 97 audio mixer
ICH2 AC 97 modem mixer
ICH2 USB controller #1
ICH2 USB controller #2
ICH2 (SMBus)
Intel 82801BA PCI bridge
Technical Reference
NOTE
Some additional I/O addresses are not available due to ICH2 addresses aliassing.
For information about Refer to
ICH2 addressing Section 1.3, page 18
59
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification

2.4 DMA Channels

Table 15. DMA Channels
DMA Channel Number Data Width System Resource
0 8 or 16 bits Audio
1 8 or 16 bits Audio/parallel port
2 8 or 16 bits Diskette drive
3 8 or 16 bits Parallel port (for ECP or EPP)/audio
4 8 or 16 bits DMA controller
5 16 bits Open
6 16 bits Open
7 16 bits Open

2.5 PCI Configuration Space Map

Table 16. PCI Configuration Space Map
Bus Number (hex)
00 00 00 Memory controller of Intel 82815 component
00 01 00 PCI to AGP bridge
00 02 00 Intel 82815 GMCH (graphics memory controller hub)/
00 1E 00 Hub link to PCI bridge
00 1F 00 Intel 82801BA ICH2 PCI to LPC bridge
00 1F 01 IDE controller
00 1F 02 ICH2 USB controller #1
00 1F 03 SMBus controller
00 1F 04 ICH2 USB controller #2
00 1F 05 AC ’97 audio controller (optional)
00 1F 06 AC ’97 modem controller (optional)
01 08 00 LAN controller (optional)
01 09 00 PCI bus connector 1 (J7B1)
01 0A 00 PCI bus connector 2 (J8B2)
01 0B 00 PCI bus connector 3 (J9B2)
(Note)
02
Note: If an add-in AGP card is installed, it occupies PCI Bus 02.
00 00 Add-in AGP card
Device Number (hex)
Function Number (hex) Description
Intel 82815EP MCH (memory controller hub)
60

2.6 Interrupts

Table 17. Interrupts
IRQ System Resource
NMI I/O channel check
0 Reserved, interval timer
1 Reserved, keyboard buffer full
2 Reserved, cascade interrupt from slave PIC
3 COM2
4 COM1
5 LPT2 (Plug and Play option)/Audio/User available
6 Diskette drive
7 LPT1
8 Real-time clock
9 Reserved for ICH2 system management bus
10 User available
11 User available
12 Onboard mouse port (if present, else user available)
13 Reserved, math coprocessor
14 Primary IDE (if present, else user available)
15 Secondary IDE (if present, else user available)
Note: Default, but can be changed to another IRQ.
(Note)
(Note)
(Note)
Technical Reference

2.7 PCI Interrupt Routing Map

This section describes interrupt sharing and how the interrupt signals are connected between the PCI bus connectors and onboard PCI devices. The PCI specification specifies how interrupts can be shared between devices attached to the PCI bus. In most cases, the small amount of latency added by interrupt sharing does not affect the operation or throughput of the devices. In some special cases where maximum performance is needed from a device, a PCI device should not share an interrupt with other PCI devices. Use the following information to avoid sharing an interrupt with a PCI add-in card.
PCI devices are categorized as follows to specify their interrupt grouping:
INTA: By default, all add-in cards that require only one interrupt are in this category. For almost all cards that require more than one interrupt, the first interrupt on the card is also classified as INTA.
INTB: Generally, the second interrupt on add-in cards that require two or more interrupts is classified as INTB. (This is not an absolute requirement.)
INTC and INTD: Generally, a third interrupt on add-in cards is classified as INTC and a fourth interrupt is classified as INTD.
61
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
The ICH2 has eight programmable interrupt request (PIRQ) input signals. All PCI interrupt sources either onboard or from a PCI add-in card connect to one of these PIRQ signals. Some PCI interrupt sources are electrically tied together on the D815EFV and D815EPFV boards and therefore share the same interrupt. Table 18 shows an example of how the PIRQ signals are routed on the D815EFV and D815EPFV boards.
For example, using Table 18 as a reference, assume that an add-in card using INTA is plugged into PCI bus connector 3. In PCI bus connector 3, INTA is connected to PIRQH, which is already connected to the ICH2 USB controller #2. The add-in card in PCI bus connector 3 now shares interrupts with these onboard interrupt sources.
Table 18. PCI Interrupt Routing Map
PCI Interrupt Source
GMCH/AGP INTB INTA to PIRQA
ICH2 USB controller #1 INTD to PIRQD
SMBus controller INTB
ICH2 USB controller #2 INTC
ICH2 audio/modem INTB
ICH2 LAN INTA to PIRQE
PCI bus connector 1 (J7B1) INTA INTB INTC INTD
PCI bus connector 2 (J8B2) INTD INTA INTB INTC
PCI bus connector 3 (J9B2) INTC INTD INTA INTB
PIRQF PIRQG PIRQH PIRQB Other
ICH PIRQ Signal Name
NOTE
The ICH2 can connect each PIRQ line internally to one of the IRQ signals (3, 4, 5, 6, 7, 10, 11, 12, 14, and 15). Typically, a device that does not share a PIRQ line will have a unique interrupt. However, in certain interrupt-constrained situations, it is possible for two or more of the PIRQ lines to be connected to the same IRQ signal.
62
Technical Reference

2.8 Connectors

CAUTION
Only the back panel connectors of the D815EFV and D815EPFV boards have overcurrent protection. The D815EFV and D815EPFV boards’ internal connectors are not overcurrent protected and should connect only to devices inside the computer’s chassis, such as fans and internal peripherals. Do not use these connectors to power devices external to the computer’s chassis. A fault in the load presented by an external device may result in a high output current that could damage the board, the interconnecting cable, and the external device itself.
For information about Refer to
Overcurrent protection for the boards back panel connectors Table 19, page 65
This section describes the boards connectors. The connectors can be divided into the following groups:
Back panel I/O connectors (see page 64) PS/2 keyboard and mouse USB (four) VGA (present only on D815EFV boards) Parallel port Serial port A LAN (optional) Audio (line in, line out, and mic in)
Internal I/O connectors (see page 68) Audio (auxiliary line input, ATAPI CD-ROM, and optional front panel audio) Digital video output (optional; present only on D815EFV boards) Fans Power Chassis intrusion (optional) Wake on LAN technology (optional) Add-in boards (one optional CNR connector, one AGP universal connector, and three PCI
bus connectors)
IDE (two) Diskette drive
External I/O connectors (see page 78) SCSI LED Serial port B Front panel USB (optional) Front panel (power/sleep/message waiting LED, power switch, hard drive activity LED,
reset switch, and auxiliary front panel LED)
63
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification

2.8.1 Back Panel Connectors

Figure 13 shows the location of the back panel connectors on the D815EFV and D815EPFV boards. The back panel connectors are color-coded in compliance with PC 99 recommendations. The figure legend below lists the colors used.
A
F
H
C
BKJGDI
Present only on D815EFV boards
Item Description Color For more information see:
A PS/2 mouse port Green Table 20 B PS/2 keyboard port Purple Table 20 C USB port 1 Black Table 21 D USB port 3 Black Table 21 E VGA port Dark blue Table 22 F Parallel port Burgundy Table 23 G Serial port A Teal Table 24 H LAN (optional) Black Table 25 I USB port 2 Black Table 21 J USB port 0 Black Table 21 K Mic in Pink Table 26 L Audio line out Lime green Table 27 M Audio line in Light blue Table 28
L ME
OM11471
Figure 13. Back Panel Connectors
64
Technical Reference
NOTE
The back panel audio line out connector is designed to power headphones or amplified speakers only. Poor audio quality occurs if passive (non-amplified) speakers are connected to this output.
Table 19 lists the overcurrent protection for the D815EFV and D815EPFV boards. Overcurrent protection is provided to the boards back panel connectors through thermistors.
Table 19. Overcurrent Protection for Back Panel Connectors
Connectors Maximum Current
PS/2 keyboard and mouse 1.5 A (total for both ports combined)
USB back panel 2.6 A (total for all four ports combined)
VGA 1.5 A
Table 20. PS/2 Mouse/Keyboard Connectors
Pin Signal Name
1 Data
2 Not connected
3 Ground
4 +5 V
5 Clock
6 Not connected
Table 21. USB Connectors
Pin Signal Name
1 +5 V
2 USB_BP0# [USB_BP1#, USB_BP2#, USB_BP3#]
3 USB_BP0 [USB_BP1, USB_BP2, USB_BP3]
4 Ground
Note: Signal names in brackets ([ ]) are for USB ports 1, 2, and 3.
Table 22. VGA Port Connector (Present Only on D815EFV Boards)
Pin Signal Name Pin Signal Name Pin Signal Name
1 Red 6 Ground 11 Not connected
2 Green 7 Ground 12 MONID1
3 Blue 8 Ground 13 HSYNC
4 Not connected 9 +5 V 14 VSYNC
5 Ground 10 Ground 15 MONID2
65
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
Table 23. Parallel Port Connector
Pin Standard Signal Name ECP Signal Name EPP Signal Name
1 STROBE# STROBE# WRITE#
2 PD0 PD0 PD0
3 PD1 PD1 PD1
4 PD2 PD2 PD2
5 PD3 PD3 PD3
6 PD4 PD4 PD4
7 PD5 PD5 PD5
8 PD6 PD6 PD6
9 PD7 PD7 PD7
10 ACK# ACK# INTR
11 BUSY BUSY#, PERIPHACK WAIT#
12 PERROR PE, ACKREVERSE# PE
13 SELECT SELECT SELECT
14 AUDOFD# AUDOFD#, HOSTACK DATASTB#
15 FAULT# FAULT#, PERIPHREQST# FAULT#
16 INIT# INIT#, REVERSERQST# RESET#
17 SLCTIN# SLCTIN# ADDRSTB#
18 - 25 Ground Ground Ground
Table 24. Serial Port A Connector
Pin Signal Name
1 DCD (Data Carrier Detect)
2 RXD# (Receive Data)
3 TXD# (Transmit Data)
4 DTR (Data Terminal Ready)
5 Ground
6 DSR (Data Set Ready)
7 RTS (Request to Send)
8 CTS (Clear to Send)
9 RI (Ring Indicator)
66
Table 25. LAN Connector (Optional)
Pin Signal Name
1 TX+
2 TX-
3 RX+
4 Ground
5 Ground
6 RX-
7 Ground
8 Ground
Table 26. Mic In Connector
Pin Signal Name
Tip Mono in
Ring Mic bias voltage
Sleeve Ground
Technical Reference
Table 27. Audio Line Out Connector
Pin Signal Name
Tip Audio left out
Ring Audio right out
Sleeve Ground
Table 28. Audio Line In Connector
Pin Signal Name
Tip Audio left in
Ring Audio right in
Sleeve Ground
67
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification

2.8.2 Internal I/O Connectors

The internal I/O connectors are divided into the following functional groups:
Audio, video, power, and hardware control (see page 69) Front panel audio (optional) ATAPI CD-ROM Auxiliary line in Digital video out (optional; present only on D815EFV boards) Fans Power Chassis intrusion (optional) Wake on LAN technology (optional)
Add-in boards and peripheral interfaces (see page 73) CNR (communication and networking riser) (optional) PCI bus (three) AGP Universal IDE (two) Diskette drive
2.8.2.1 Expansion Slots
The board has the following ATX-compliant expansion slots:
One Accelerated Graphics Port (expansion slot 7).
Three PCI Local Bus connectors (compliant with PCI Rev. 2.2 specification). The SMBus is
routed to PCI bus connector 2 (expansion slot 5). PCI add-in cards with SMBus support can access sensor data and other information residing on the desktop board.
One CNR (optional), shared with PCI bus connector 3 (expansion slot 4).
NOTE
This document refers to back-panel slot numbering with respect to processor location on the
board. On the boards silkscreen, PCI slots are labeled as PCI 1, PCI 2, and PCI 3, starting with the slot closest to the processor. The CNR slot shares a PCI slot number. The AGP slot is labeled as AGP and is not numbered.
The ATX/microATX specifications identify expansion slot locations with respect to the far edge of a full-sized ATX chassis. The ATX specification and the boards silkscreen are opposite and could cause confusion. The ATX numbering convention is made without respect to slot type (PCI or AGP), but refers to an actual connector location on a chassis. Figure 15 on page 73 illustrates the boards PCI connector numbering.
68
Technical Reference
2.8.2.2 Audio, Video, Power, and Hardware Control Connectors
Figure 14 shows the location of the audio, video, power, and hardware control connectors on the D815EFV and D815EPFV boards.
A
1
1
1
B
9
10
1
4
D
C
1 2
4
1
1
1
11
E
1
10
20
I
J FH
G
Present only on D815EFV boards
OM11472
Item Description Color Reference Designator For more information see:
A Auxiliary line in, ATAPI style White J6B4 Table 29
B Front panel audio (optional) White J6B2 Table 30
C ATAPI CD-ROM Black J6B3 Table 31
D Digital video out (optional) N/A J5C1 Table 32
E Processor fan (fan 1) N/A J1B1 Table 33
F Power N/A J4H1 Table 34
G Chassis fan (fan 3) (optional) N/A J4G1 Table 35
H System fan (fan 2) N/A J9H1 Table 36
I Chassis intrusion (optional) N/A J9H3 Table 37
J Wake on LAN technology (optional) N/A J9G1 Table 38
Figure 14. Audio, Video, Power, and Hardware Control Connectors
69
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
Table 29. Auxiliary Line In Connector (J6B4)
Pin Signal Name
1 Left auxiliary line in
2 Ground
3 Ground
4 Right auxiliary line in
Table 30. Front Panel Audio Connector (J6B2) (Optional)
Pin Signal Name Pin Signal Name
1 MICIN_FP 2 Ground
3 MIC_BIAS 4 AUD_ANALOG
5 AUD_FPOUT_R 6 AUD_RET_R
7 Reserved 8 (Pin removed)
9 AUD_FPOUT_L 10 AUD_RET_L
NOTE
The front panel audio connector is alternately used as a jumper block for routing audio signals. Refer to Section 2.9.1 on page 82 for more information.
Table 31. ATAPI CD-ROM Connector (J6B3)
Pin Signal Name
1 Left audio input from CD-ROM
2 CD audio differential ground
3 CD audio differential ground
4 Right audio input from CD-ROM
70
Technical Reference
Table 32. Digital Video Out Connector (J5C1) (Optional; present only on D815EFV boards)
Pin Signal Name Pin Signal Name
1 LTVCLKIN 2 +5 V
3 P_RST_SLOTS# 4 LTVCL_3V
5 Ground 6 LTVDA_3V
7 Ground 8 LTVVSYNC
9 Ground 10 LTVHSYNC
11 Ground 12 LTVDAT0
13 Ground 14 LTVDAT1
15 Ground 16 LTVDAT2
17 Ground 18 LTVDAT3
19 Ground 20 LTVDAT4
21 Ground 22 LTVDAT5
23 Ground 24 LTVDAT6
25 Ground 26 LTVDAT7
27 Ground 28 LTVDAT8
29 Ground 30 LTVDAT9
31 Ground 32 LTVDAT10
33 Ground 34 LTVDAT11
35 Ground 36 LTVCLKOUT0
37 Ground 38 LTVCLKOUT1
39 Ground 40 LTVBLNK#
Table 33. Processor Fan Connector (J1B1)
Pin Signal Name
1 Ground
2 +12 V
3 FAN1_TACH
Table 34. Power Connector (J4H1)
Pin Signal Name Pin Signal Name
1 +3.3 V 11 +3.3 V
2 +3.3 V 12 -12 V
3 Ground 13 Ground
4 +5 V 14 PS-ON# (power supply remote on/off)
5 Ground 15 Ground
6 +5 V 16 Ground
7 Ground 17 Ground
8 PWRGD 18 Not connected
9 +5 V (standby) 19 +5 V
10 +12 V 20 +5 V
71
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
Table 35. Chassis Fan Connector (J4G1) (Optional)
Pin Signal Name
1 FAN3_PWM
2 +12 V
3 No connect
Table 36. System Fan Connector (J9H1)
Pin Signal Name
1 FAN2_PWM
2 +12 V
3 FAN2_TACH
Table 37. Chassis Intrusion Connector (J9H3) (Optional)
Pin Signal Name
1 INTRUDER#
2 Ground
Table 38. Wake on LAN Technology Connector (J9G1) (Optional)
Pin Signal Name
1 +5 V (standby)
2 Ground
3 WOL
For information about Refer to
The power connector Section 1.15.2.1, page 51
The functions of the fan connectors Section 1.15.2.2, page 52
Wake on LAN technology Section 1.15.2.3, page 52
72
Technical Reference
(
2.8.2.3 Add-in Board and Peripheral Interface Connectors
Figure 15 shows the location of the add-in board connectors and peripheral interface connectors on the D815EFV and D815EPFV boards. Note the following considerations for the PCI bus connectors:
All of the PCI bus connectors are bus master capable.
SMBus signals are routed to PCI bus connector 2. This enables PCI bus add-in boards with
SMBus support to access sensor data on the board. These SMBus signals are as follows:
The SMBus clock line is connected to pin A40 The SMBus data line is connected to pin A41
A B E
DC
40 2 1
2 1
2 1
39
40
39
34 33
HG
Present only on D815EFV boards
F
OM11473
Item Description Reference Designator For more information see:
A CNR
optional) J9B1 Table 39 B PCI bus connector 3 J9B2 Table 40 C PCI bus connector 2 J8B2 Table 40 D PCI bus connector 1 J7B1 Table 40 E AGP universal connector J6C1 Table 41 F Diskette drive J6H2 Table 42 G Primary IDE J6H1 Table 43 H Secondary IDE J6G2 Table 43
Figure 15. Add-in Board and Peripheral Interface Connectors
73
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
Table 39. CNR Connector (J9B1) (Optional)
Pin Signal Name
A1 Reserved B1 Reserved
A2 Reserved B2 Reserved
A3 Ground B3 Reserved
A4 Reserved B4 Ground
A5 Reserved B5 Reserved
A6 Ground B6 Reserved
A7 LAN_TXD2 B7 Ground
A8 LAN_TXD0 B8 LAN_TXD1
A9 Ground B9 LAN_RSTSYNC
A10 LAN_CLK B10 Ground
A11 LAN_RXD1 B11 LAN_RXD2
A12 Reserved B12 LAN_RXD0
A13 USB+ (optional)* B13 Ground
A14 Ground B14 Reserved
A15 USB- (optional)* B15 +5 V (dual)
A16 +12 V B16 USB_OC (optional)*
A17 Ground B17 Ground
A18 +3.3 V (dual) B18 -12 V
A19 +5 V B19 +3.3 V
A20 Ground B20 Ground
A21 EEDI B21 EED0
A22 EECS B22 EECK
A23 SMB_A1 B23 Ground
A24 SMB_A2 B24 SMB_A0
A25 SMB_SDA B25 SMB_SCL
A26 AC97_RESET B26 CDC_DWN_ENAB
A27 Reserved B27 Ground
A28 AC97_SDATA_IN1 B28 AC97_SYNC
A29 AC97_SDATA_IN0 B29 AC97_SDATA_OUT
A30 Ground B30 AC97_BITCLK
* These signals are used only with the optional SMSC LPC47M142 I/O controller. If the SMSC LPC47M132 I/O
controller is used, these signals are reserved.
For information about Refer to
The CNR Section 1.14, page 44
Pin Signal Name
74
Technical Reference
Table 40. PCI Bus Connectors (J7B1, J8B2, and J9B2)
Pin Signal Name Pin Signal Name Pin Signal Name Pin Signal Name
A1 Ground (TRST#)* B1 -12 V A32 AD16 B32 AD17
A2 +12 V B2 Ground (TCK)* A33 +3.3 V B33 C/BE2#
A3 +5 V (TMS)* B3 Ground A34 FRAME# B34 Ground
A4 +5 V (TDI)* B4 Not connected (TDO)* A35 Ground B35 IRDY#
A5 +5 V B5 +5 V A36 TRDY# B36 +3.3 V
A6 INTA# B6 +5 V A37 Ground B37 DEVSEL#
A7 INTC# B7 INTB# A38 STOP# B38 Ground
A8 +5 V B8 INTD# A39 +3.3 V B39 LOCK#
A9 Reserved B9 Not connected
(PRSNT1#)*
A10 +5 V (I/O) B10 Reserved A41 Reserved *** B41 +3.3 V
A11 Reserved B11 Not connected
(PRSNT2#)*
A12 Ground B12 Ground A43 PAR B43 +3.3 V
A13 Ground B13 Ground A44 AD15 B44 C/BE1#
A14 +3.3 V aux **** B14 Reserved A45 +3.3 V B45 AD14
A15 RST# B15 Ground A46 AD13 B46 Ground
A16 +5 V (I/O) B16 CLK A47 AD11 B47 AD12
A17 GNT# B17 Ground A48 Ground B48 AD10
A18 Ground B18 REQ# A49 AD09 B49 Ground
A19 PME# B19 +5 V (I/O) A50 Key B50 Key
A20 AD30 B20 AD31 A51 Key B51 Key
A21 +3.3 V B21 AD29 A52 C/BE0# B52 AD08
A22 AD28 B22 Ground A53 +3.3 V B53 AD07
A23 AD26 B23 AD27 A54 AD06 B54 +3.3 V
A24 Ground B24 AD25 A55 AD04 B55 AD05
A25 AD24 B25 +3.3 V A56 Ground B56 AD03
A26 IDSEL B26 C/BE3# A57 AD02 B57 Ground
A27 +3.3 V B27 AD23 A58 AD00 B58 AD01
A28 AD22 B28 Ground A59 +5 V (I/O) B59 +5 V (I/O)
A29 AD20 B29 AD21 A60 REQ64C# B60 ACK64C#
A30 Ground B30 AD19 A61 +5 V B61 +5 V
A31 AD18 B31 +3.3 V A62 +5 V B62 +5 V
* These signals (in parentheses) are optional in the PCI specification and are not currently implemented.
** On PCI bus connector 2 (J8B2), this pin is connected to the SMBus clock line.
*** On PCI bus connector 2 (J8B2), this pin is connected to the SMBus data line.
**** During S5 state, this pin is active only on PCI bus connector 2 (J8B2).
A40 Reserved ** B40 PERR#
A42 Ground B42 SERR#
75
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
Table 41. AGP Universal Connector (J6C1)
Pin Signal Name Pin Signal Name Pin Signal Name Pin Signal Name
A1 +12 V B1 Not connected A34 Vddq B34 Vddq
A2 TYPEDET# B2 +5 V A35 AD22 B35 AD21
A3 Reserved B3 +5 V A36 AD20 B36 AD19
A4 Not connected B4 Not connected A37 Ground B37 Ground
A5 Ground B5 Ground A38 AD18 B38 AD17
A6 INTA# B6 INTB# A39 AD16 B39 C/BE2#
A7 RST# B7 CLK A40 Vddq B40 Vddq
A8 GNT1# B8 REQ# A41 FRAME# B41 IRDY#
A9 Vcc3.3 B9 Vcc3.3 A42 Reserved B42 +3.3 V (aux)
A10 ST1 B10 ST0 A43 Ground B43 Ground
A11 Reserved B11 ST2 A44 Reserved B44 Reserved
A12 PIPE# B12 RBF# A45 Vcc3.3 B45 Vcc3.3
A13 Ground B13 Ground A46 TRDY# B46 DEVSEL#
A14 WBF# B14 Not connected A47 STOP# B47 Vddq
A15 SBA1 B15 SBA0 A48 PME# B48 PERR#
A16 Vcc3.3 B16 Vcc3.3 A49 Ground B49 Ground
A17 SBA3 B17 SBA2 A50 PAR B50 SERR#
A18 SBSTB# B18 SB_STB A51 AD15 B51 C/BE1#
A19 Ground B19 Ground A52 Vddq B52 Vddq
A20 SBA5 B20 SBA4 A53 AD13 B53 AD14
A21 SBA7 B21 SBA6 A54 AD11 B54 AD12
A22 Reserved B22 Reserved A55 Ground B55 Ground
A23 Ground B23 Ground A56 AD9 B56 AD10
A24 Reserved B24 +3.3 V (aux) A57 C/BE0# B57 AD8
A25 Vcc3.3 B25 Vcc3.3 A58 Vddq B58 Vddq
A26 AD30 B26 AD31 A59 AD_STB0# B59 AD_STB0
A27 AD28 B27 AD29 A60 AD6 B60 AD7
A28 Vcc3.3 B28 Vcc3.3 A61 Ground B61 Ground
A29 AD26 B29 AD27 A62 AD4 B62 AD5
A30 AD24 B30 AD25 A63 AD2 B63 AD3
A31 Ground B31 Ground A64 Vddq B64 Vddq
A32 AD_STB1# B32 AD_STB1 A65 AD0 B65 AD1
A33 C/BE3# B33 AD23 A66 VREFG_C B66 VREFC_G
76
Table 42. Diskette Drive Connector (J6H2)
Pin Signal Name Pin Signal Name
1 Ground 2 DENSEL
3 Ground 4 Reserved
5 Key 6 FDEDIN
7 Ground 8 FDINDX# (Index)
9 Ground 10 FDM00# (Motor Enable A)
11 Ground 12 Not connected
13 Ground 14 FDDS0# (Drive Select A)
15 Ground 16 Not connected
17 Not connected 18 FDDIR# (Stepper Motor Direction)
19 Ground 20 FDSTEP# (Step Pulse)
21 Ground 22 FDWD# (Write Data)
23 Ground 24 FDWE# (Write Enable)
25 Ground 26 FDTRK0# (Track 0)
27 Not connected 28 FDWPD# (Write Protect)
29 Ground 30 FDRDATA# (Read Data)
31 Ground 32 FDHEAD# (Side 1 Select)
33 Ground 34 DSKCHG# (Diskette Change)
Technical Reference
Table 43. IDE Connectors (J6H1, Primary and J6G2, Secondary)
Pin Signal Name Pin Signal Name
1 Reset IDE 2 Ground 3 Data 7 4 Data 8 5 Data 6 6 Data 9 7 Data 5 8 Data 10 9 Data 4 10 Data 11 11 Data 3 12 Data 12 13 Data 2 14 Data 13 15 Data 1 16 Data 14 17 Data 0 18 Data 15 19 Ground 20 Key 21 DDRQ0 [DDRQ1] 22 Ground 23 I/O Write# 24 Ground 25 I/O Read# 26 Ground 27 IOCHRDY 28 Ground 29 DDACK0# [DDACK1#] 30 Ground 31 IRQ 14 [IRQ 15] 32 Reserved 33 DAG1 (Address 1) 34 GPIO_DMA66_Detect_Pri (GPIO_DMA66_Detect_Sec) 35 DAG0 (Address 0) 36 DAG2 (Address 2) 37 Chip Select 1P# [Chip Select 1S#] 38 Chip Select 3P# [Chip Select 3S#] 39 Activity# 40 Ground
Note: Signal names in brackets ([ ]) are for the secondary IDE connector.
77
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification

2.8.3 External I/O Connectors

Figure 16 shows the locations of the external I/O connectors on the D815EFV and D815EPFV boards.
2
1
7
10
1
1
115
9
1
2
16
2
8
A B DC E
Present only on D815EFV boards
OM11474
Item Description Reference Designator For more information see:
A Auxiliary front panel power LED J9H2 Table 46 B Front panel J9H3 Table 48 C SCSI LED J8H2 Table 47 D Serial port B J8H1 Table 44 E Front panel USB (optional) J8F1 Table 45
Figure 16. External I/O Connectors
78
Table 44. Serial Port B Connector (J8H1)
Pin Signal Name Pin Signal Name
1 DCD2# 2 RXD2 (Receive Data)
3 TXD2 (Transmit Data) 4 DTR2#
5 Ground 6 DSR2#
7 RTS2# 8 CTS2#
9 RI2# 10 Key (no pin)
Table 45. Front Panel USB Connector (J8F1) (Optional)
Pin Signal Name Pin Signal Name
1 VREG_FP_USB_PWR 2 VREG_FP_USB_PWR
3 ICH_FP0# 4 ICH_FP1#
5 ICH_FP0 6 ICH_FP1
7 Ground 8 Ground
9 Key (no pin) 10 ICH_U_OC1_2#
Technical Reference
NOTE
A thermistor provides overcurrent protection for the front panel USB connector. The maximum current through this connector is 1.5 A (total for both ports combined).
2.8.3.1 Auxiliary Front Panel Power LED Connector
This connector duplicates the signals on pins 2 and 4 of the front panel connector.
Table 46. Auxiliary Front Panel Power LED Connector (J9H2)
Pin Signal Name In/Out Description
1 HDR_BLNK_GRN Out Front panel green LED
2 Not connected
3 HDR_BLNK_YEL Out Front panel yellow LED
2.8.3.2 SCSI Hard Drive Activity LED Connector
The SCSI hard drive activity LED connector is a 1 x 2-pin connector that allows add-in SCSI host bus adapter to use the same LED as the IDE controller. This connector can be connected to the LED output of the add-in controller card. The LED will indicate when data is being read or written using the add-in controller. Table 47 lists the signal names of the SCSI hard drive activity LED connector.
Table 47. SCSI LED Connector (J8H2)
Pin Signal Name
1 SCSI activity
2 Not connected
79
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
2.8.3.3 Front Panel Connector
This section describes the functions of the front panel connector. Table 48 lists the signal names of the front panel connector.
Table 48. Front Panel Connector (J9H3)
Pin Signal In/Out Description Pin Signal In/Out Description
1 HD_PWR Out Hard disk LED pull-
up (330 ) to +5 V
3 HDA# Out Hard disk activity
LED
5 GND Ground 6 FPBUT_IN In Power switch
7 FP_RESET# In Reset switch 8 GND Ground
9 +5 V Out Power 10 N/C Not connected
11 N/C Reserved 12 GND Ground
13 GND Ground 14 (pin removed) Not connected
15 N/C Reserved 16 +5 V Out Power
2 HDR_BLNK_
GRN
4 HDR_BLNK_
YEL
Out Front panel green
LED
Out Front panel yellow
LED
2.8.3.3.1 Reset Switch Connector
Pins 5 and 7 can be connected to a momentary SPST type switch that is normally open. When the switch is closed, the D815EFV and D815EPFV boards reset and run the POST.
2.8.3.3.2 Hard Drive Activity LED Connector
Pins 1 and 3 can be connected to an LED to provide a visual indicator that data is being read from or written to a hard drive. For the LED to function properly, an IDE drive must be connected to the onboard IDE interface. The LED will also show activity for devices connected to the SCSI hard drive activity LED connector.
For information about Refer to
The SCSI hard drive activity LED connector Section 2.8.3.2, page 79
80
Technical Reference
2.8.3.3.3 Power/Sleep/Message Waiting LED Connector
Pins 2 and 4 can be connected to a single-colored or dual-colored LED. Table 49 shows the possible states for a single-colored LED. Table 50 shows the possible states for a dual-colored LED.
Table 49. States for a Single-Colored Power LED
LED State Description
Off Power off/sleeping
Steady Green Running
Blinking Green Running/message waiting
Table 50. States for a Dual-Colored Power LED
LED State Description
Off Power off
Steady Green Running
Blinking Green Running/message waiting
Steady Yellow Sleeping
Blinking Yellow Sleeping/message waiting
NOTE
To use the message waiting function, ACPI must be enabled in the operating system and a message-capturing application must be invoked.
2.8.3.3.4 Power Switch Connector
Pins 6 and 8 can be connected to a front panel momentary-contact power switch. The switch must pull the SW_ON# pin to ground for at least 50 ms to signal the power supply to switch on or off. (The time requirement is due to internal debounce circuitry on the D815EFV and D815EPFV boards.) At least two seconds must pass before the power supply will recognize another on/off signal.
81
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification

2.9 Jumper Blocks

CAUTION
Do not move any jumpers with the power on. Always turn off the power and unplug the power cord from the computer before changing a jumper setting. Otherwise, the board could be damaged.
Figure 17 shows the locations of the jumper blocks on the D815EFV and D815EPFV boards.
5
7
9
A
10
13
246
J6B2
3
13
B
J9G2
Present only on D815EFV boards
OM11782
Item Description Reference Designator
A Front panel audio connector / jumper block J6B2 B BIOS Setup configuration jumper block J9G2
Figure 17. Locations of the Jumper Blocks

2.9.1 Front Panel Audio Connector/Jumper Block

The connector at location J6B2 has two functions:
With jumpers installed, the audio line out signals are routed to the back panel audio line out
connector.
With jumpers removed, the connector provides audio line out and mic in signals for front panel
audio connectors.
Table 51 describes the two configurations of this connector/jumper block.
82
Technical Reference
CAUTION
Do not place jumpers on this block in any configuration other than the one described in Table 51. Other jumper configurations are not supported and could damage the board.
Table 51. Front Panel Audio Connector / Jumper Block (J6B2)
Jumper Setting Configuration
9
7
13
5
Audio line out signals are routed to the back panel audio line out connector. The back panel audio line out connector is shown in Figure 13 on page 64.
6
4
2
9
7
13
5
6
4
2
Audio line out and mic in signals are available for front panel audio connectors. Table 30 on page 70 lists the names of the signals available on this connector when no jumpers are installed.
10
5 and 6, 9 and 10
10
No jumpers installed
NOTE
When the jumpers are removed and this connector is used for front panel audio, the back panel audio line out and mic in connectors are disabled.

2.9.2 BIOS Setup Configuration Jumper Block

This 3-pin jumper block determines the BIOS Setup programs mode. Table 52 describes the jumper settings for the three modes: normal, configure, and recovery.
When the jumper is set to configuration mode and the computer is powered-up, the BIOS compares the CPU version and the microcode version in the BIOS and reports if the two match.
Table 52. BIOS Setup Configuration Jumper Settings (J9G2)
Function/Mode Jumper Setting Configuration
Normal
1-2
Configure
2-3
Recovery
None
For information about Refer to
How to access the BIOS Setup program Section 4.1, page 111
The maintenance menu of the BIOS Setup program Section 4.2, page 112
BIOS recovery Section 3.7, page 106
3
3
3
The BIOS uses current configuration information and
1
passwords for booting.
After the POST runs, Setup runs automatically. The
1
maintenance menu is displayed.
The BIOS attempts to recover the BIOS configuration. A
1
recovery diskette is required.
83
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification

2.10 Mechanical Considerations

2.10.1 Form Factor

The D815EFV and D815EPFV boards are designed to fit into a standard microATX-form-factor chassis. Figure 18 illustrates the mechanical form factor for the D815EFV and D815EPFV boards. Dimensions are given in inches [millimeters]. The outer dimensions are 9.60 inches by
8.20 inches [243.84 millimeters by 208.28 millimeters]. Location of the I/O connectors and mounting holes are in compliance with the microATX specification (see Section 1.4).
0.80[20.32]
6.50[165.10]
6.10[154.94]
5.20[132.08]
0.00
1.70[43.18]
0.55[13.97]
0.00
Present only on D815EFV boards
2.60[66.04] 8.80[223.52]
Figure 18. Board Dimensions
9.05[229.87]
OM11475
84
Technical Reference

2.10.2 I/O Shields

The back panel I/O shields for the D815EFV and D815EPFV boards must meet specific dimension and material requirements. Systems based on this board need the back panel I/O shield to pass emissions (EMI) certification testing. Figure 19, Figure 20, and Figure 21 show the critical dimensions of the chassis-dependent I/O shield for the Universal boards. Figure 22, Figure 23, and Figure 24 show the critical dimensions of the chassis-dependent I/O shield for earlier versions of the boards. Dimensions are given in inches [millimeters], to a tolerance of ± 0.020 inches [0.508 millimeters].
These figures also indicate the position of each cutout. Additional design considerations for I/O shields relative to chassis requirements are described in the ATX specification.
For information about Refer to
The ATX specification Table 4, page 18
The microATX specification Table 4, page 18
How to identify a Universal D815EFV / D815EPFV board Section 1.1.2, page 12
NOTE
An I/O shield compliant with the ATX chassis specification 2.03 is available from Intel.
85
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
6.390 Ref [162.300]
0.787±0.010 TYP [20±0.254]
0.063±0.005 [1.600±0.120]
0.884
[22.450]
0.276
[7.012]
0.00
0.465
[11.811]
0.567
[14.400]
0.039 Dia. [1.000]
0.00
0.447 [11.345]
1.195 [30.360]
4x Dia 0.125 [3.180]
2.079
1.807 [52.804]
[45.892]
3x Dia 0.330 [8.380]
3.219 [81.768]
4.451
[113.050]
5.010
[127.250]
5.732
[145.584]
Pictorial View
8X R0.5 MIN
0.519 [13.190]
0.027 [0.690]
0.465 [11.811]
0.567 [14.400]
0.621 [15.770]
1.89 Ref
OM11400
Figure 19. I/O Shield Dimensions
(for D815EFV Universal Boards with Onboard LAN Subsystem)
86
6.390 Ref [162.300]
0.787±0.010 TYP [20±0.254]
Technical Reference
0.063±0.005 [1.600±0.120]
0.884
[22.450]
0.276
[7.012]
0.00
0.465
[11.811]
0.567
[14.400]
0.039 Dia. [1.000]
0.00
0.447 [11.345]
1.195 [30.360]
4x Dia 0.125 [3.180]
2.079 [52.804]
3.219
3x Dia 0.330 [8.380]
4.451
[81.768]
5.010
[113.050]
5.732
[127.250]
0.621 [15.770]
[145.584]
Pictorial View
8X R0.5 MIN
0.519 [13.190]
0.027 [0.690]
0.465 [11.811]
0.567 [14.400]
1.89 Ref
OM11400A
Figure 20. I/O Shield Dimensions
(for D815EPFV Universal Boards with Onboard LAN Subsystem)
87
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
6.390 Ref [162.300]
0.787±0.010 TYP [20±0.254]
0.063±0.005 [1.600±0.120]
0.884
[22.450]
0.276
[7.012]
0.00
0.465
[11.811]
0.567
[14.400]
0.039 Dia. [1.000]
0.00
0.447 [11.345]
1.195 [30.360]
4x Dia 0.125 [3.180]
2.079 [52.804]
3.219
3x Dia 0.330 [8.380]
4.451
[81.768]
5.010
[113.050]
5.732
[127.250]
0.621 [15.770]
[145.584]
Pictorial View
8X R0.5 MIN
0.519 [13.190]
0.027 [0.690]
0.465 [11.811]
0.567 [14.400]
1.89 Ref
OM11400B
88
Figure 21. I/O Shield Dimensions
(for D815EPFV Universal Boards without Onboard LAN Subsystem)
Technical Reference
REF
6.390 [162.300]
0.787 0.010 TYP [20 0.254]
0.063 0.005 [1.600 0.120]
0.884
[22.450]
0.276
[7.012]
0.000
[0.000]
0.465
[11.811]
0.567
[14.400]
3x Dia 0.039 [1.000]
0.000 [0.000]
0.447
1.195
[11.345]
[30.360]
1.807 [45.892]
2.081 [52.854]
3.219 [81.768]
3x Dia 0.330 [8.380]
4.840
[122.950]
5.771
Pictorial
[146.577]
View
8X R0.5 MIN
A
0.519 [13.190]
0.027 [0.690]
0.465 [11.810]
0.472 [12.000]
OM11487
Figure 22. I/O Shield Dimensions
(for D815EFV Boards with Onboard LAN Subsystem)
89
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
REF
6.390 [162.300]
0.787 0.010 TYP [20 0.254]
0.063 0.005 [1.600 0.120]
0.884
[22.450]
0.276
[7.012]
0.000 [0.000]
0.465
[11.811]
0.567
[14.400]
3x Dia 0.039 [1.000]
0.000
[0.000]
0.447
1.195
[11.345]
[30.360]
2.081 [52.854]
3.219 [81.768]
3x Dia 0.330 [8.380]
4.840
[122.950]
5.771
Pictorial View
[146.577]
8X R0.5 MIN
A
0.519 [13.190]
0.027 [0.690]
0.465 [11.810]
0.472 [12.000]
0.567 [14.400]
OM11485
Figure 23. I/O Shield Dimensions
(for D815EPFV Boards with Onboard LAN Subsystem)
90
Technical Reference
REF
6.390 [162.300]
0.787 0.010 TYP [20 0.254]
0.063 0.005 [1.600 0.120]
0.884
[22.450]
0.276
[7.012]
0.000
[0.000]
0.465
[11.811]
0.567
[14.400]
3x Dia 0.039 [1.000]
0.000 [0.000]
0.447 [11.345]
1.195 [30.360]
2.081 [52.854]
3.219 [81.768]
3x Dia 0.330 [8.380]
4.840
[122.950]
5.771
[146.577]
Pictorial
View
A
0.519 [13.190]
0.027 [0.690]
0.465 [11.810]
0.472 [12.000]
0.567 [14.400]
8X R0.5 MIN
OM11486
Figure 24. I/O Shield Dimensions
(for D815EPFV Boards without Onboard LAN Subsystem)
91
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification

2.11 Electrical Considerations

2.11.1 Power Consumption

Table 54 lists voltage and current measurements for a computer that contains the D815EFV board and the following:
800 MHz Intel Pentium III processor with a 256 KB cache
128 MB SDRAM
3.5-inch diskette drive
6.4 GB ATA-33 IDE hard disk drive
6x IDE DVD-ROM drive
This information is provided only as a guide for calculating approximate power usage with additional resources added.
Values for the Windows 98 desktop mode are measured at 640 x 480 x 256 colors and 60 Hz refresh rate. AC watts are measured with the computer is connected to a typical 200 W power supply, at nominal input voltage and frequency, with a true RMS wattmeter at the line input.
NOTE
Actual system power consumption depends upon system configuration. The power supply should comply with the recommendations found in the ATX Form Factor Specification document (see Table 4 on page 19 for specification information).
Table 53 lists the power usage for a D815EFV board with the configuration listed on the previous page and including the optional onboard LAN subsystem.
Table 53. Power Usage for a D815EFV Board with Onboard LAN
DC Current at:
Mode AC Power +3.3 V +5 V +12 V -12 V +5 V (standby)
Windows 98 SE APM full on 54 W 2.02 A 3.22 A 0.18 A 0.000 A 0.26 A Windows 98 SE APM standby 29 W 1.58 A 0.50 A 0.18 A 0.000 A 0.24 A Windows 98 SE ACPI S0 33 W 1.68 A 0.26 A 0.18 A 0.000 A 0.26 A Windows 98 SE ACPI S1 28 W 1.58 A 0.48 A 0.18 A 0.000 A 0.18 A Windows 98 SE ACPI S3 1 W 0.00 A 0.00 A 0.000 A 0.000 A 0.22 A
Table 54 lists the power usage for a D815EPFV board with the configuration listed on the previous page, but without the optional onboard LAN subsystem and with an add-in 2x 4MB AGP graphics card.
Table 54. Power Usage for a D815EPFV Board with Add-in Graphics Card,
without Onboard LAN
DC Current at:
Mode AC Power +3.3 V +5 V +12 V -12 V +5 V (standby)
Windows 98 SE APM full on 55 W 2.42 A 3.36 A 0.20 A 0.000 A 0.11 A Windows 98 SE APM standby 34 W 2.28 A 0.50 A 0.20 A 0.000 A 0.09 A Windows 98 SE ACPI S0 35 W 2.42 A 0.51 A 0.20 A 0.000 A 0.11 A Windows 98 SE ACPI S1 29 W 2.28 A 0.49 A 0.20 A 0.000 A 0.09 A Windows 98 SE ACPI S3 1 W 0.00 A 0.00 A 0.000 A 0.000 A 0.12 A
92
Technical Reference

2.11.2 Add-in Board Considerations

The D815EFV and D815EPFV boards are designed to provide 2 A (average) of +5 V current for each add-in board. The total +5 V current draw for add-in boards in a fully-loaded D815EFV or D815EPFV board (all four expansion slots filled) must not exceed 8 A.

2.11.3 Standby Current Requirements

CAUTION
Power supplies used with the board must provide enough standby current to support the Instantly Available (ACPI S3 sleep state) configuration. If the standby current necessary to support multiple wake events from the PCI and/or USB buses exceeds power supply capacity, the board may lose register settings stored in memory and may not awaken properly.
To estimate the standby current required for a specific system configuration, the standby current requirements of all installed components must be combined. Refer to Table 55 and follow these steps:
1. List the boards +5 V standby current requirement (767 mA).
2. List the PS/2 ports standby current requirement (see note below).
3. List, from the AGP and PCI 2.2 slots (wake-enabled devices) row, the total number of wake­enabled devices installed and multiply by the standby current requirement.
4. List, from the AGP and PCI 2.2 slots (non-wake-enabled devices) row, the total number of wake-enabled devices installed and multiply by the standby current requirement.
5. List all additional wake-enabled devices and non-wake-enabled devices standby current requirements as applicable.
6. Add all the listed standby current totals from steps 1 through 5 to determine the total estimated standby current power supply requirement.
Table 55. Standby Current Requirements
Description Standby Current Requirements (mA)
Total for the board 767
Onboard LAN (optional) 95
Wake on LAN technology connector (optional) connected to wake-enabled PCI LAN card
PS/2 ports
AGP and PCI 2.2 slots (wake-enabled devices)
AGP and PCI 2.2 slots (non-wake-enabled devices)
(Note 2)
USB ports
CNR (optional)
Notes:
1. These values were measured in a power static state.
2. Dependent upon system configuration. See the note on the following page.
(Note 2)
345
(Note 2)
(Note 2)
507.5
(Note 2)
375
525
470
115
(Note 1)
93
Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
NOTE
AGP and PCI requirements are calculated by totaling the following:
One wake-enabled device @ 375 mA
Three non-wake-enabled devices @ 20 mA each
PS/2 Ports requirements per the IBM PS/2 Port Specification (Sept 1991):
Keyboard @ 275 mA (Actual measurements are 220 mA-300 mA, depending on the type of keyboard and the operational state of the keyboards LEDs.)
Mouse @ 70 mA
USB requirements are calculated by totaling the following:
One wake-enabled device @ 500 mA
Three USB non-wake-enabled devices @ 2.5 mA each
The USB ports are limited to a combined total of 700 mA. CNR requirements are calculated as follows:
One wake-enabled device @ 375 mA
Non-wake-enabled devices @ 20 mA

2.11.4 Fan Connector Current Capability

The D815EFV and D815EPFV boards are designed to supply a maximum of 225 mA per fan connector.

2.11.5 Power Supply Considerations

CAUTION
The +5 V standby line for the power supply must be capable of providing adequate +5 V standby current. Failure to do so can damage the power supply. The total amount of standby current required depends on the wake devices supported and manufacturing options. Refer to Section 2.11.3 on page 93 for additional information.
System integrators should refer to the power usage values listed in Section 2.11.1, on page 92 when selecting a power supply for use with either the D815EFV or D815EPFV board.
Measurements account only for current sourced by either the D815EFV or D815EPFV board while running in idle modes of the started operating systems.
Additional power required will depend on configurations chosen by the integrator.
The power supply must comply with the following recommendations found in the indicated sections of the ATX form factor specification.
The potential relation between 3.3 VDC and +5 VDC power rails (Section 4.2)
The current capability of the +5 VSB line (Section 4.2.1.2)
All timing parameters (Section 4.2.1.3)
All voltage tolerances (Section 4.2.2)
For information about Refer to
The ATX form factor specification Table 4, page 19
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Technical Reference

2.12 Thermal Considerations

CAUTION
An ambient temperature that exceeds the boards maximum operating temperature by 10 oC could cause components to exceed their maximum case temperature and malfunction. For information about the maximum operating temperature, see the environmental specifications in Section 2.14.
CAUTION
The processor voltage regulator area (item A in Figure 25) can reach a temperature of up to 85 oC in an open chassis. System integrators should ensure that proper airflow is maintained in the voltage regulator circuit. Failure to do so may result in damage to the voltage regulator circuit.
Figure 25 shows the locations of the localized high temperature zones for the D815EFV and D815EPFV boards.
D
Present only on D815EFV boards
A Processor voltage regulator area
Intel 82815 Graphics and Memory Controller Hub (GMCH)
B
(D815EFV boards)
Intel 82815EP Memory Controller Hub (MCH)
(D815EPFV boards)
C Processor D Intel 82801BA ICH2
OM11476
A B
C
Figure 25. Localized High Temperature Zones
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Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
Table 56 provides maximum case temperatures for D815EFV and D815EPFV board components that are sensitive to thermal changes. Case temperatures could be affected by the operating temperature, current load, or operating frequency. Maximum case temperatures are important when considering proper airflow to cool the D815EFV and D815EPFV boards.
Table 56. Thermal Considerations for Components
Component Maximum Case Temperature
Intel Pentium III processor
Intel Celeron processor
Intel 82815 GMCH/ Intel 82815EP MCH
Intel 82801BA ICH2 109 oC (under bias)
For processor case temperature, see processor datasheets and processor specification updates
116 oC (under bias)
For information about Refer to
Intel Pentium III processor datasheets and specification updates Section 1.3, page 18
Intel Celeron processor datasheets and specification updates Section 1.3, page 18

2.13 Reliability

The mean time between failures (MTBF) prediction is calculated using component and subassembly random failure rates. The calculation is based on the Bellcore Reliability Prediction Procedure, TR-NWT-000332, Issue 4, September 1991. The MTBF prediction is used to estimate repair rates and spare parts requirements.
The Mean Time Between Failures (MTBF) data is calculated from predicted data at 35 ºC.
D815EFV and D815EPFV boards MTBF: 369,041 hours
96

2.14 Environmental

Table 57 lists the environmental specifications for the D815EFV and D815EPFV boards.
Table 57. D815EFV and D815EPFV Board Environmental Specifications
Parameter Specification
Temperature
Non-Operating -40 °C to +70 °C Operating 0 °C to +55 °C
Shock
Unpackaged 30 g trapezoidal waveform
Velocity change of 170 inches/second
Packaged Half sine 2 millisecond
Product Weight (pounds) Free Fall (inches) Velocity Change (inches/sec)
<20 36 167
21-40 30 152
41-80 24 136
81-100 18 118
Vibration
Unpackaged 5 Hz to 20 Hz: 0.01 g² Hz sloping up to 0.02 g² Hz
20 Hz to 500 Hz: 0.02 g² Hz (flat)
Packaged 10 Hz to 40 Hz: 0.015 g² Hz (flat)
40 Hz to 500 Hz: 0.015 g² Hz sloping down to 0.00015 g² Hz
Technical Reference
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Intel Desktop Board D815EFV/D815EPFV Technical Product Specification

2.15 Regulatory Compliance

This section describes the D815EFV and D815EPFV boards compliance with U.S. and international safety and electromagnetic compatibility (EMC) regulations.

2.15.1 Safety Regulations

Table 58 lists the safety regulations the D815EFV and D815EPFV boards comply with when correctly installed in a compatible host system.
Table 58. Safety Regulations
Regulation Title
UL 1950/CSA C22.2 No. 950, 3rd edition
EN 60950, 2nd Edition, 1992 (with Amendments 1, 2, 3, and 4)
IEC 60950, 2nd Edition, 1991 (with Amendments 1, 2, 3, and 4)
EMKO-TSE (74-SEC) 207/94 Summary of Nordic deviations to EN 60950. (Norway, Sweden,
Bi-National Standard for Safety of Information Technology Equipment including Electrical Business Equipment. (USA and Canada)
The Standard for Safety of Information Technology Equipment including Electrical Business Equipment. (European Union)
The Standard for Safety of Information Technology Equipment including Electrical Business Equipment. (International)
Denmark, and Finland)

2.15.2 EMC Regulations

Table 59 lists the EMC regulations the D815EFV and D815EPFV boards comply with when correctly installed in a compatible host system.
Table 59. EMC Regulations
Regulation Title
FCC (Class B) Title 47 of the Code of Federal Regulations, Parts 2 and 15, Subpart B,
Radiofrequency Devices. (USA)
ICES-003 (Class B) Interference-Causing Equipment Standard, Digital Apparatus. (Canada)
EN55022: 1994 (Class B) Limits and methods of measurement of Radio Interference
Characteristics of Information Technology Equipment. (European Union)
EN55024: 1998 Information Technology Equipment – Immunity Characteristics Limits
and methods of measurement. (European Union)
AS/NZS 3548 (Class B) Australian Communications Authority, Standard for Electromagnetic
Compatibility. (Australia and New Zealand)
CISPR 22, 2nd Edition (Class B) Limits and methods of measurement of Radio Disturbance
Characteristics of Information Technology Equipment. (International)
CISPR 24: 1997 Information Technology Equipment – Immunity Characteristics – Limits
and Methods of Measurements. (International)
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Technical Reference

2.15.3 Product Certification Markings (Board Level)

The D815EFV and D815EPFV desktop boards have the following product certification markings:
UL joint US/Canada Recognized Component mark: Consists of lower case c followed by a stylized backward UR and followed by a small US. Includes adjacent UL file number for Intel desktop boards: E210882 (component side).
FCC Declaration of Conformity logo mark for Class B equipment; to include Intel name and D815EFV and D815EPFV model designation (solder side).
CE mark: Declaring compliance to European Union (EU) EMC directive (89/336/EEC) and Low Voltage directive (73/23/EEC) (component side). The CE mark should also be on the shipping container.
Australian Communications Authority (ACA) C-Tick mark: consists of a stylized C overlaid with a check (tick) mark (component side), followed by Intel supplier code number, N-232. The C-tick mark should also be on the shipping container.
Korean EMC certification logo mark: consists of MIC lettering within a stylized elliptical outline.
Printed wiring board manufacturer’s recognition mark: consists of a unique UL recognized manufacturers logo, along with a flammability rating (94V-0) (solder side).
PB part number: Intel bare circuit board part number (solder side) A44507-002. Also includes SKU number starting with AA followed by additional alphanumeric characters.
Battery + Side Up marking: located on the component side of the board in close proximity to the battery holder.
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Intel Desktop Board D815EFV/D815EPFV Technical Product Specification
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