The Intel®Desktop Board D810E2CB may contain design defects or errors knowna serratathat may cause the product to deviate from published specifications. Current characterized
errata are documented in the Intel Desktop Board D810E2CB Specification Update.
Revision History
RevisionRevision HistoryDate
001First release of the Intel®Desktop Board D810E2CB Technical Product
Specification.
This product specification applies to only standard D810E2CB boards with BIOS identifier
CB81010A.86A.
®
Changes to this specification will be published in the Intel
Desktop Board D810E2CB Specification
Update before being incorporated into a revision of this documen t.
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL®PRODUCTS. EXCEPT AS
PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY
W HATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE
OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR
PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT, OR OTHER INTELLECTUAL
PROPERTY RIGHT.
January 2001
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relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any
license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property
rights.
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the failure of the Intel product could create a situation where personal injury or death may occur.
Intel may make changes to specifications and product descriptions at any time, without notice.
The D810E2CB board may contain design defects or errors known as errata that may causethe product to deviate from
published specifications. Current characterized errata are availableon request.
Contact your local Intel sales office or your distributor to obtain the latest specifications before placing your product order.
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be
or call in North America1-800-548-4725, Europe 44-0-1793-431-155, France 44-0-1793-421-777,
Germany44-0-1793-421-333, other Countries 708-296-9333.
†
Third-party brands and names are the property of their respective owners.
Copyright 2001, Intel Corporation. All rights reserved.
Preface
This Technical Product Specification (TPS) specifies the board layout, components, connectors,
power and environmental requirements, and theBIOS for the D810E2CB desktop board. It
describes the standard product and available manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the D810E2CB board and its
components to the vendors, system integrators, and other engineers and technicians who need this
level of information. It is specifically not intended for general audiences.
What This Document Contains
ChapterDescription
1A description of the hardware used on this board
2A map of theresources of the board
3The features supported by the BIOS Setup program
4The contents of the BIOS Setup program’s menus and submenus
5A description of the BIOS error messages, beep codes, and POST codes
Typographical Conventions
This section contains information about the conventions used in this specification. Not all of these
symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
✏
Notes call attention to important information.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
WARNING
Warnings indicate conditions which, if not observed, can cause personal injury.
#Used after a signal name to identify an active-low signal (such as USBP0#)
(NxnX)When used in the description of a component, N indicates component type, xn are the relative
coordinates of its location on the D810E2CB board, and X is the instance of the particular part
at that general location. For example, J5J1 is a connector, located at 5J. It is the first
connector in the 5J area.
KBKilobyte (1024 bytes)
KbitKilobit (1024 bits)
MBMegabyte (1,048,576 bytes)
MbitMegabit (1,048,576 bits)
GBGigabyte (1,073,741,824 bytes)
xxhAn address or data value ending with a lowercase h indicates a hexadecimal value.
x.xVVolts. Voltages are DC unless otherwise specified.
†
This symbol is used to indicate third-party brands and names that are the property of their
Table 1 summarizes the D810E2CB board’s major features.
Table 1.Feature Summary
Form Factor
Processor
Memory
Chipset
Direct AGP Video
Audio
I/O Control
Peripheral Interfaces
Expansion
Capabilities
BIOS
Instantly Available PC
FlexATX (9.00 inches by 7.50 inches)
Support for either an:
®
• Intel
• Intel
• Two 168-pin dual inline memory module (DIMM) sockets
• Supports up to 512 MB of 100 MHz non-ECC synchronous DRAM (SDRAM)
• Support for serial presence detect (SPD) and non-SPD DIMMs
Intel
• Intel
• Intel
• SST 49LF004A 4 Mbit Firmware Hub (FWH)
• Intel 82810E GMCH
• VGA port connector on back panel
Audio Codec ’97 (AC’97) compatible audio subsystem, consisting of the
following:
• Intel 82801BA ICH2 (AC link output)
• CS4201 analog codec
LPC47M102 Low Pin Count (LPC) I/O controller
• Four universal serial bus (USB) ports (two back panel, two front panel)
• Two IDE interfaces with Ultra DMA, ATA-66/100 support
• One diskettedrive interface
• One serial port
• One parallel port
• PS/2
Two PCI-bus add-in card connectors
• Intel/AMI BIOS stored in an SST 49LF004A 4 Mbit firmware hub (FWH)
• Support for Advanced Configuration and Power Interface (ACPI), Advanced
• Support for
• Suspend-to-RAM support
• Wake from USB ports
Pentium®III processor with 256 KB L2 cache (in an FCPGA package)
®
Celeron™processor with 128 KB L2 cache (in a PGA package)
®
810E chipset, consisting of:
®
82810E Graphics/Memory Controller Hub (GMCH)
®
82801BA I/O Controller Hub (ICH2)
†
keyboard and mouse ports
Power Management (APM), Plug and Play, and SMBIOS
PCI Local Bus Specifi cation
, Revision 2.2
NOTE
✏
The D810E2CB board is designed to support only USB-aware operating systems.
12
Product Description
For information aboutRefer to
The board’s compliance level with ACPI, APM, Plug and Play, and SMBIOSTable 3, page 16
1.1.2Manufacturing Options
Table 2 describes the D810E2CB board’s manufacturing options. Not every manufacturing option
is available in all marketing channels. Please contact your Intel representative to determine which
manufacturing options are available to you.
Table 2.Manufacturing Options
LANIntel®82562ET 10/100 Mbit/sec Platform LAN Connect (PLC) device
Hardware monitor
component
Hardware monitor component features include:
• Voltage sense to detect out of range power supply voltages
• Thermal sense to detect out of range thermal values
Version 2.3.1,
August 12, 1998,
Award Software International Inc.,
Dell Computer Corporation,
Hewlett-Packard Company,
Intel Corporation,
International Business Machines
Corporation,
Phoenix Technologies Limited,
American Megatrends Inc.,
SystemSoft Corporation, and
Compaq Computer Corporation.
Version 1.1,
March 1996,
Intel Corporation.
Version 1.1,
September 23, 1998,
Compaq Computer Corporation,
Intel Corporation,
Microsoft Corporation, and
NEC.
Version 2.0,
December 18, 1998,
Intel Corporation.
The D810E2CB board supports processors that draw a maximum of 22 A. Using a processor that
draws more than 22 A can damage the processor, the board, and the power supply. See the
processor’s data sheet for current usage requirements.
CAUTION
Before installing or removing the processor, make sure that AC power has been removed by
unplugging the power cord from the computer. Failure to do so could damage the processor and
the board.
The D810E2CB board supports either an Intel PentiumIII processor (FCPGA package), or an Intel
Celeron processor (PGA package) as shown in Table 4. The system bus frequency is automatically
selected.
Table 4.Supported Processors
Processor TypeProcessor DesignationSystem Bus FrequencyL2 Cache Size
To be compliant with applicable Intel®SDRAM memory specifications, the D810E2CB board
should be populated with DIMMs that support the Serial Presence Detect (SPD) data structure. If
your memory modules do not support SPD, the BIOS will attempt to configure the memory
controller for normal operation; however, the DIMMs may not function at their optimum speed.
CAUTION
Before installing or removing memory, make sure that AC power has been removed by unplugging
the power cord from the computer. Failure to do so could damage the memory and the board.
CAUTION
Because the main system memory is also used as video memory, the board r equires 100 MHz
SDRAM DIMMs even though the processor’s system bus speed is 66 MHz. It is highly
recommended that SPD DIMMs be used, since this allows the BIOS to read the SPD data and
program the chipset to accurately configure memory settings for optimum performance. If nonSPD memory is installed, the BIOS will attempt to correctly configure the memory settings, but
performance and reliability may be impacted.
The D810E2CB board has two DIMM sockets. The minimum memory size is 64 MB and the
maximum memory size is 512 MB. The BIOS automatically detects memory type, size, and speed.
Memory can be installed in one or both sockets. Memory size can vary between sockets.
The D810E2CB board supports the following memory features:
• 3.3 V, 168-pin DIMMs with gold-plated contacts
• 100 MHz SDRAM
• Serial Presence Detect (SPD) or non-SPD memory (BIOS recovery requires SPD DIMMs)
• Non-ECC (64-bit) memory
• Unbuffered single- or double-sided DIMMs
The board is designed to support DIMMs in the configurations listed in Table 5 below.
Table 5.System Memory Configuration
DIMM SizeNon-ECC Configuration
16 MB2 Mbit x 64
32 MB4 Mbit x 64
64 MB8 Mbit x 64
128 MB16 Mbit x 64
256 MB32 Mbit x 64
20
For information aboutRefer to
PC Serial Presence Detect Specification
The
Obtaining copies of PC SDRAM specificationshttp://www.intel.com/design/pcisets/memory
Table 3, page 16
Product Description
1.6Intel®810E Chipset
The Intel 810E chipset consists of the following devices:
The GMCH is a centralized controller for the system bus, the memory bus, the AGP bus, and the
Accelerated Hub Architecture interface. The ICH2 is a centralized controller for the board’s I/O
paths. The FWH provides the nonvolatile storage of the BIOS. The component combination
provides the chipset interfaces as shown in Figure 3.
ATA-66/100
66/100/133 MHz
SystemBus
Network
USB
810E Chipset
100 MHz
SDRAM Bus
82810E
Graphics Memory
Controller Hub
(GMCH)
DisplayInterface
AHA
Bus
82801BA
I/O Controller Hub
(ICH2)
LPC Bus
AC LinkPCI BusSMBus
Figure 3. Intel 810E Chipset Block Diagram
For information aboutRefer to
The Intel 810E chipsethttp://www.developer.intel.com
The resources used by the chipsetChapter 2
The chipset’s compliance with ACPI and AC ‘97Table 3, page 16
Direct (integrated) AGP is a high-performance bus (independent of the PCI bus) for graphicsintensive applications, such as 3D applications. AGP overcomes certain limitations of the PCI bus
related to handling large amount of graphics data with the following features:
• Pipelined memory read and write operations that hide memory access latency
• Demultiplexing of address and data on the bus for nearly 100 percent bus efficiency
For information aboutRefer to
The location of the VGA port connectorFigure 5, page 46
Obtainingthe
Accelerated Graphics Port Interface Specification
Table 3, page 16
1.6.2USB
The ICH2 contains two separate USB controllers supporting four USB ports. One USB peripheral
can be connected to each port. For more than four USB devices, an external hub can be connected to
any of the ports. Two of the USB ports are implemented with stacked back panel connectors. The
other two are accessible via the front panel USB connector at location J8B1. The D810E2CB board
fully supports Universal Hub Controller Interface (UHCI) and uses UHCI-compatible software
drivers.
NOTE
✏
Computer systems that have an unshielded cable attached to a USB port may not meet FCC
Class B requirements, even if no device is attached to the cable. Use shielded cable that meets the
requirements for full-speed devices.
For information aboutRefer to
The location of the USB connectors on the back panelFigure 5, page 46
The signal names of the USB connectors on the back panelTable 21, page 47
The location of the USB connectors on the front panelFigure 8, page 58
The signal names of the USB connectors on the front panelTable 41, page 60
The USB and UHCI specificationsTable 3, page 16
22
Product Description
1.6.3IDE Support
The ICH2’s IDE controller has two independent bus-mastering IDE interfaces that can be
independently enabled. The IDE interfaces support the following modes:
• Programmed I/O (PIO): processor controls data transfer.
• 8237-style DMA: DMA offloads the processor, supporting transfer rat es of up to 16 MB/sec.
• Ultra DMA: DMA protocol on IDE bus supportinghost and target throttling a nd transfer rates
of up to 33 MB/sec.
• Ultra ATA-66: DMA protocolon IDE bus supporting host and target throttling and transfer
rates of up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is device driver
compatible.
• Ultra ATA-100: DMA protocolon IDE bus allows host and target throttling. The ICH2 Ultra
ATA-100 logic can achieve read transfer rates up to 100 MB/sec and write transfer rates up to
88 MB/sec.
✏ NOTE
ATA-100 and ATA-66 use faster timings and require a specialized cable to reduce reflections,
noise, and inductive coupling.
The IDE interfaces also support ATAPI devices (such as CD-ROM drives) and ATA devices using
the transfer modes listed in Section 4.4.4.1 on page 91.
The BIOS supports logical block addressing (LBA) and extended cylinder head sector (ECHS)
translation modes. The drive reports the transfer rate and translation mode to the BIOS.
The D810E2CB board supports laser servo (LS-120) diskette technology through its IDE interfaces.
An LS-120 drive can be configured as a boot device by setting the BIOS Setup program’s Boot
menu to one of the following:
• ARMD-FDD (ATAPI removable media device – floppy disk drive)
• ARMD-HDD (ATAPI removable media device – hard disk drive)
For information aboutRefer to
The location of the IDE connectorsFigure 7, page 54
The signal names of the IDE connectorsTable 36, page 56
BIOS Setup program’s Boot menuTable 66, page 98
The real-time clock is compatiblewith DS1287 and MC146818 components. The clockprovides a
time-of-day clock and a multicentury calendar with alarm features and century rollover. The realtimeclock supports 256 bytes of battery-backed CMOS SRAM in two banks that are reservedfor
BIOS use.
A coin-cell battery powers the real-time clock and CMOS memory. When the computer is not
plugged into a wall socket, the battery has an estimated life of three years. When the computer is
plugged in, the 3.3 V standby current from the power supply extends the life of the battery. The
clock is accurate to ± 13 minutes/year at 25 ºC with 3. 3 VSB applied.
The time, date, and CMOS values can be specified in the BIOS Setup program. The CMOS values
can be returned to their defaults by using the BIOS Setup program.
NOTE
✏
If the battery and AC power fail, the last saved defaults, custom or standard, will be loaded into
CMOS SRAM at power on.
NOTE
✏
The recommended method of accessing the date in systems with Intel®desktop boards is indirectly
from the Real-Time Clock (RTC) via the BIOS. The BIOS on Intel desktop boards contains a
century checking and maintenance feature. This feature checks the two least significant digits of
the year stored in the RTC during each BIOS request (INT 1Ah) to read the date and, if less than
80 (i.e., 1980 is the first year supported by the PC), updates the century byte to 20. This feature
enables operating systems and applications using the BIOS date/time services to reliably
manipulate the year as a four-digit value.
For information aboutRefer to
Proper date access in systems with Intel desktop boardshttp://support.intel.com/support/year2000/
1.6.5SST 49LF004A 4 Mbit Firmware Hub (FWH)
The FWH provides the following:
• System BIOS program
• System security and manageability logic that enables protection for storing and updating of
platform information
24
1.7I/O Controller
The SMSC LPC47M102 I/O controller provides the following features:
• 3.3 V operation
• One serial port
• One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port
(EPP) support
• Serial IRQ interface compatiblewith serialized IRQ support for PCI systems
• PS/2-style mouse and keyboard interfaces
• Interface for one 1.2 MB or 1.44 MB diskette drive
• Intelligent power management, including a programm able wake up event interface
• PCI power management support
The BIOS Setup program provides configuration options for the I/O controller.
For information aboutRefer to
SMSC LPC47M102 I/O controllerhttp://www.smsc.com
Product Description
1.7.1Serial Port
The D810E2CB board has one serial port connector on the back panel. The serial port’s
NS16C550-compatible UART supports data transfers at speeds up to 115.2 kbits/sec with BIOS
support. The serial port can be assigned as COM1 (3F8h), COM2 (2F8h), COM3 (3E8h), or
COM4 (2E8h).
For information aboutRefer to
The location of the serial port connectorFigure 5, page 46
The signal names of the serial port connectorTable 24, page 48
1.7.2Parallel Port
The connector for the multimode bidirectional parallel port is a 25-pin D-Sub connector located on
the back panel. In the BIOS Setup program, the parallel port can be configured for the following:
• Output only (PC AT
• Bi-directional (PS/2 compatible)
• EPP
• ECP
For information aboutRefer to
The location of the parallel port connectorFigure 5, page 46
The signal names of the parallel port connectorTable 22, page 47
The I/O controller supports one diskettedrive that is compatible with the 82077 diskette drive
controller and supports both PC-AT and PS/2 modes.
For information aboutRefer to
The location of the diskette drive connectorFigure 7, page 54
The signal names of the diskette drive connectorTable 37, page 57
The supported diskette drive capacities and sizesTable 61, page 93
1.7.4Keyboard and Mouse Interface
PS/2 keyboard and mouse connectors are located on the back panel. The +5 V lines to these
†
connectors are protected with a PolySwitch
connection after an overcurrent condition is removed.
NOTE
✏
The keyboard is supported in the bottom PS/2 connector and the mouse is supported in the top
PS/2 connector. Power to the computer should be turned off before a keyboard or mouse is
connected or disconnected.
circuit that, like a self-healing fuse, reestablishes the
The keyboard controller contains the AMI keyboard and mouse controller code, provides the
keyboard and mousecontrol functions, and supports password protectionfor power-on/reset. A
power-on/reset password can be specified in the BIOS Setup program.
For information aboutRefer to
The location of the keyboard and mouse connectorsFigure 5, page 46
The signal names of the keyboard and mouse connectorsTable 20, page 47
26
1.8Graphics Subsystem
The Intel 82810E GMCH graphics memory controller hub component provides the following
graphics support features:
• Integrated 2-D and 3-D graphics engines
• Integrated hardware motion compression engine
• Integrated230 MHz DAC
Table 6 lists the refresh r ates supported by the graphics subsystem.
Table 6.Supported Graphics Refresh Rates
ResolutionAvailable Refresh Rates (Hz)
640 x 200 x 16 colors70
640 x 350 x 16 colors70
640 x 400 x 256 colors60, 70, 75, 85
640 x 400 x 64 K colors60, 70, 75, 85
640 x 400 x 16 M colors70
640 x 480 x 16 colors60, 72, 75, 85
640 x 480 x 256 colors60, 70, 72, 75, 85
640 x 480 x 32 K colors60, 75, 85
640 x 480 x 64 K colors60, 70, 72, 75, 85
640 x 480 x 16 M colors60, 70, 72, 75, 85
800 x 600 x 256 colors60, 75, 85
800 x 600 x 32 K colors60, 70, 72, 75, 85
800 x 600 x 64 K colors60, 70, 72, 75, 85
800 x 600 x 16 M colors60, 70, 72, 75, 85
1024 x 768 x 256 colors60, 70, 75, 85
1024 x 768 x 32 K colors60, 75, 85
1024 x 768 x 64 K colors60, 70, 72, 75, 85
1024 x 768 x 16 M colors60, 70, 72, 75, 85
1056 x 800 x 16 colors70
1280 x 1024 x 256 colors60, 70, 72, 75, 85
1280 x 1024 x 32 K colors60, 75, 85
1280 x 1024 x 64 K colors60, 70, 72, 75
1280 x 1024 x 16 M colors60, 70, 72, 75, 85
Product Description
For information aboutRefer to
Obtaining graphics software and utilitieshttp://support.intel.com/support/motherboards/desktop
The D810E2CB board includes an Audio Codec ’97 (AC ’97) compatible audio subsystem
consisting of these devices:
• Intel 82801BA ICH2 (AC link output)
• CS4201 analog codec
Figure 4 is a block diagram of the audio subsystem.
CD-ROM
82801BA
I/O ControllerHub
(ICH2)
Figure 4. Block Diagram of Audio Subsystem with CS4201 Codec
AC '97
Link
CS4201
Analog Codec
Line In
Line Out
MicIn
Modem Audio
OM11128
Features of the audio subsystem include:
• Independent channels for PCM in, PCM out, and Mic in
• 16-bit stereo I/O up to 48 kHz
• Multiple sample rates
For information aboutRefer to
Obtaining audio software and utilitiesSection1.2, page 16
1.9.1CS4201 Analog Codec
The CS4201 is a fully AC ’97 compliant codec. T he codec's features include:
• 16-bit stereo full-duplex operation
• High quality CD-ROM input with ground sense
• Stereo line level output
• Power management support
• Full duplex variable sampling rate (7 kHz to 48 kHz) with 1 Hz resolution
†
• Phat
Stereo 3-D stereo enhancement
1.9.2Audio Connectors
The audio connectors include the following:
• ATAPI CD-ROM (connects an internal ATAPI CD-ROM drive to the audio mixer)
• Telephony
• Line out (back panel)
• Line in (back panel)
• Mic in
28
Product Description
For information aboutRefer to
The location of the ATAPI CD-ROM and telephony connectorsFigure 6, page 51
The signal names of the ATAPI CD-ROM connectorTable 29, page 52
The signal names of the telephony connectorTable 30, page 52
The back panel audio connectorsSection 2.8.1, page 46
1.10 Hardware Management Subsystem
The hardware manageme nt features enable the board to be compatible with the Wired for
Management (WfM) specification. The board has several hardware management features, including
the following:
• Fan control and monitoring
• Thermal and voltage monitoring
For information aboutRefer to
The WfM specificationTable 3, page 16
1.10.1Hardware Monitor Component (Optional)
The hardware monitor component provides low-cost instrumentation capabilities. The features of the
component include:
• Internal ambient temperaturesensing
• Remote thermal diode sensing for direct monitoring of processor temperature
• Power supply monitoring (+12 V, +5 V, +3.3 V, +2.5 V, 3.3 VSB, Vccp) to detect levels above
or below acceptable values
• SMBus interface
The hardware monitor component enables the board to be compatible with the Wired for
Management (WfM) specification.
For information aboutRefer to
The board’s compatibility with the WfM specificationTable3, page 16
1.10.2Fan Control and Monitoring
The SMSC LPC47M102 I/O controller provides two fan sense inputs and two fan control outputs.
Monitoring and control can be impleme nted using third-party software.
For information aboutRefer to
The functions of the fan connectorsSection 1.12.3.2, page 35
The locations of the fan connectorsFigure 6, page 51
The signal names of the fan connectorsSection 2.8.2.1, page 51
The Network Interface Controller subsystemconsists of the ICH2 (with integrated LAN Media
Access Controller) and a physical layer interface device. Features of the LAN subsystem include:
• PCI Bus Master interface
• CSMA/CD Protocol Engine
• Serial CSMA/CD unit interface that supports the 82562ET (10/100 Mbit/sec Ethernet) physical
Supports Wake up from suspend state (Wake on LAN
For information aboutRefer to
Obtaining LAN software and driversSection 1.2, page 16
1.11.1Intel®82562ET Platform LAN Connect Device
technology)
The Intel 82562ET component provides a n interface to the back panel RJ-45 connector with
integrated LEDs. This physical interface may alternately be provided via the CNR connector.
The Intel 82562ET provides the following functions:
• Basic 10/100 Ethernet LAN connectivity
• Supports RJ-45 connector with status indicator LEDs on the back panel
• Full device driver compatibility
• Advanced Power Management and ACPI support
• Programmable transit threshold
• Configuration EEPROM that contains the MAC address
• Remote monitoring (alerting)
1.11.2RJ-45 LAN Connector with Integrated LEDs
Two LEDs are built into the RJ-45 LAN connector. Table 7 describes the LED states when the
board is powered up and the LAN subsystem is operating.
Table 7.LAN Connector LED States
LED ColorLED StateCondition
Off10 Mbit/sec data rate is selected.Green
On100 Mbit/sec data rate is selected.
Yellow
OffLAN link is not established.
On (steady state)LAN link is established.
On (brighter and pulsing)The computer is communicating with another computer on
the LAN.
30
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