The Intel® Desktop Board D810E2CA3 may contain design defects or errors known as errata that may cause the product to deviate from published specifications. Current
characterized errata are documented in the Intel Desktop Board D810E2CB Specification Update.
Order Number A43979-001
Revision History
Revision Revision History Date
-001 First release of the Intel® Desktop Board D810E2CA3 Technical Product
Specification
This product specification applies only to the standard D810E2CA3 board with BIOS identifier
CA81030A.86A.
Changes to this specification will be published in the D810E2CA3 Monthly Specification Update
before being incorporated into a revision of this document.
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL
PROVIDED IN INTEL’S TERM S AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTE L ASSUMES NO LIABILITY
WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE
OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRA NT IES RELATING TO FI T N ESS FOR A PARTICULAR
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which the failure of the Intel product could create a si tuation where personal injury or death may occur.
Intel may make changes t o specifications and product descriptions at any time, without noti c e.
The Intel
deviate from published spec i fications. Current c harac terized errata are available on request .
Contact your local Int el sales office or your dis tributor to obtain the lates t specifications before placing your product order.
Copies of documents whic h hav e an orderi ng number and are referenced in this document , or other Intel literature, m ay be
obtained from:
Intel Corporation
P.O. Box 5937
Denver, CO 80217-9808
or call in North America 1-800-548-4725, Europe 44-0-1793-431-155, France 44-0-1793-421-777,
Germany 44-0-1793-421-333, other Countries 708-296-9333.
†
®
Desktop Board D810E2CA3 may c ontain design defects or errors known as errata that may caus e the product to
Third-party brands and names are the property of their respective owners.
®
PRODUCTS. EXCEPT AS
February 2001
Copyright 2001 Intel Corporation. All rights reserved.
Preface
This Technical Product Specification (TPS) specifies the board layout, components, connectors,
®
power and environmental requirements, and BIOS for the Intel
describes the standard board product and available manufacturing options.
Intended Audience
The TPS is intended to provide detailed, technical information about the board and its components
to the vendors, system integrators, and other engineers and technicians who need this level of
information. It is specifically not intended for general audiences.
What This Document Contains
Chapter Description
1 A description of the hardware used on this board
2 A map of the resources of the board
3 The features supported by the BIOS Setup program
4 The contents of the BIOS Setup program’s menus and submenus
5 A description of the BIOS error messages, beep codes, and Power-On Self-Test
(POST) codes
D810E2CA3 desktop board. It
Typographical Conventions
This section contains information about the conventions used in this specification. Not all of these
symbols and abbreviations appear in all specifications of this type.
Notes, Cautions, and Warnings
NOTE
✏
Notes call attention to important information.
CAUTION
Cautions are included to help you avoid damaging hardware or losing data.
WARNING
Warnings indicate conditions that, if not observed, can cause personal injury.
# Used after a signal name to identify an active-low signal (such as USBP0#).
(NxnX) When used in the description of a component, N indicates component type, xn are the
relative coordinates of its location on the board, and X is the instance of the particular part at
that general location. For example, J5J1 is a connector, located at 5J. It is the first
connector in the 5J area.
GB Gigabyte (1,073,741,824 bytes)
KB Kilobyte (1024 bytes)
Kbit Kilobit (1024 bits)
kbits/sec 1000 bits per second
MB Megabyte (1,048,576 bytes)
MB/sec Megabytes per second
Mbit Megabit (1,048,576 bits)
Mbit/sec Megabits per second
xxh An address or data value ending with a lowercase h indicates a hexadecimal value.
x.x V Volts. Voltages are DC unless otherwise specified.
†
This symbol is used to indicate third-party brands and names that are the property of their
Table 1 summarizes the D810E2CA3 board’s major features.
Table 1. Feature Summary
Form Factor microATX (9.6 inches by 8.0 inches)
®
Processor
Memory
Chipset
I/O Control
Video
Audio
Peripheral Interfaces
Expansion
Capabilities
BIOS
Instantly Available PC
For information about Refer to
The board’s compliance level with ACPI, APM, Plug and Play, and SMBIOS Table 3, page 16
Support for either an Intel
(FC-PGA) package or an Intel® Celeron™ processor in an FC-PGA package or
a PPGA package
• Two 168-pin Dual Inline Memory Module (DIMM) sockets
• Support for up to 512 MB of 100 MHz non-ECC, unbuffered synchronous
DRAM (SDRAM)
• Support for serial presence detect (SPD) and non-SPD DIMMs
The Intel
• Intel
• Intel
• SST 49LF004A 4 Mbit firmware hub (FWH)
SMSC LPC47M102 low pin count (LPC) interface I/O controller
Intel 82810E DC-133 Graphics and Memory Controller Hub (integrated in the
chipset) with an optional 4 MB of 133 MHz display cache
• Intel 82801BA ICH2 digital controller (AC link output)
• Analog Devices AD1885 Audio Codec
• Four Universal Serial Bus (USB) ports
• Two IDE interfaces with Ultra DMA, ATA-66/100 support
• One diskette drive interface
• Two serial ports
• One parallel port
• PS/2 keyboard and mouse ports
Four PCI-bus add-in card connectors
• Intel/AMI BIOS stored in an SST 49LF004A 4 Mbit firmware hub (FWH)
• Support for SMBIOS, Advanced Configuration and Power Management
• Support for
• Suspend to RAM support
• Wake on PS/2
®
810E2 chipset, consisting of:
®
82810E DC-133 Graphics and Memory Controller Hub (GMCH)
®
82801BA I/O Controller Hub (ICH2)
Interface (ACPI), Advanced Power Management (APM), and Plug and Play
PCI Local Bus Specification Revision 2.2
†
keyboard and USB ports
Pentium® III processor in a Flip Chip Pin Grid Array
12
Desktop Board Description
1.1.2 Manufacturing Options
Table 2 describes the board’s manufacturing options. Not all of the following manufacturing
options are available in all marketing channels. Please contact your Intel representative to
determine what manufacturing options are available to you.
Table 2. Manufacturing Options
Video
Hardware Monitor
Subsystem
Communication and
Networking Riser (CNR)
Connector
LAN Subsystem
Wake on LAN†
Technology Connector
Digital video output (DVO) connector
• Wired for Management (WfM) compliant
• Voltage sensor to detect out of range values
One CNR connector (shared with slot 4)
®
Intel
82562ET 10/100 Mbit/sec Platform LAN Connect (PLC) device
Support for system wake up using an add-in network interface card with
remote wake up capability
Figure 1 shows the major components of the D810E2CA3 desktop board.
A
CB
D
U
E
T
S
F
R
Q
P
G
O
LKNMIJH
OM11030
A AD1885 audio codec M Front panel USB
B Serial port B connector N Front panel connector
C SMSC LPC47M102 I/O controller O Intel 82801BA I/O Controller Hub (ICH2)
D Back panel connectors P Intel
E DVO connector (optional) Q Battery
F Processor socket
G DIMM sockets
H Power connector S PCI bus add-in card connectors
I Diskette drive connector T 4 MB display cache (optional)
J Speaker
K Secondary IDE connector
L Primary IDE connector
R Intel 82810E DC-133 Graphics and Memory
U Communications and Networking Riser (CNR)
®
82802AB Firmware Hub (FWH)
Controller Hub (GMCH)
connector (optional)
14
Figure 1. D810E2CA3 Board Components
1.1.4 Block Diagram
Figure 2 is a block diagram of the major functional areas of the D810E2CA3 board.
Version 2.3.1,
March 16, 1999,
American Megatrends Inc.,
Award Software International Inc.,
Compaq Computer Corporation
Dell Computer Corporation,
Hewlett-Packard Company,
Intel Corporation,
International Business Machines
Corporation,
Phoenix Technologies Limited,
and SystemSoft Corporation.
Version 1.1,
March 1996,
Intel Corporation.
Version 1.1,
September 23, 1998,
Compaq Computer Corporation,
Intel Corporation,
Microsoft Corporation, and
NEC Corporation.
Version 2.0,
December 18, 1998,
Intel Corporation.
The information is
available from…
http://www.intel.com/
design/chipsets/memory
http://www.intel.com/
technology/memory
http://www.intel.com/
technology/memory
http://developer.intel.com/
ial/wfm/design/smbios
http://www.usb.org/
developers
http://www.usb.org/
developers
http://developer.intel.com/
ial/WfM/wfmspecs.htm
18
Desktop Board Description
1.4 Processor
CAUTION
Use only the processors listed below. Use of unsupported processors can damage the D810E2CA3
board, the processor, and the power supply. See the Intel Desktop Board D810E2CA3 Specification Update for the most up-to-date list of supported processors for the D810E2CA3
board.
The D810E2CA3 board supports either an Intel Pentium III processor (FC-PGA package), or an
Intel Celeron processor (PGA package). The system bus speed is automatically selected. The
board supports the processors listed in Table 4.
Table 4. Supported Processors
Processor Speed Processor Speed System Bus Frequency L2 Cache Size
Pentium III processor
FC-PGA package
500E, 550E, 600, 650, 700,
750, 800, and 850 MHz
533EB, 600EB, 667, 733,
800EB, 866, and 933 MHz
1.0B GHz 133 MHz 256 KB
400, 433, 466, 500, 533A,
566A, 600, 633, 667, 700, 733,
and 766 MHz
800 MHz 100 MHz 128 KB
All supported onboard memory can be cached, up to the cachability limit of the processor. See the
processor’s data sheet for cachability limits.
For information about Refer to
Processor support Section 1.2, page 16
Processor data sheets Section 1.2, page 16
Before installing or removing memory, disconnect AC power by unplugging the power cord from
the computer. Failure to do so could damage the memory and the board.
NOTE
✏
To be fully compliant with all applicable Intel® SDRAM memory specifications, the board should
be populated with DIMMs that support the Serial Presence Detect (SPD) data structure. If your
memory module does not support SPD, you will see a notification to this effect on the screen at
power-up. The BIOS will attempt to configure the memory controller for normal operation;
however, DIMMs may not function at the determined frequency.
NOTE
✏
Because the main system memory is also used as video memory, the board requires 66 MHz or
100 MHz SDRAM DIMMs. It is highly recommended that SPD DIMMs be used, since this allows
the BIOS to read the SPD data and program the chipset to accurately configure memory settings
for optimum performance. If non-SPD memory is installed, the BIOS will attempt to correctly
configure the memory settings, but performance and reliability may be impacted.
The board has two DIMM sockets. SDRAM can be installed in one or both sockets. Minimum
memory size is 64 MB; maximum memory size is 512 MB. The BIOS automatically detects
memory type, size, and speed. Due to the video requirements of the D810E2CA3 board, most
configurations require at least 64 MB of memory.
The board supports memory with the following features:
• 3.3V, 168-pin DIMMs with gold-plated contacts
• 100 MHz unbuffered SDRAM
• Non-ECC (64-bit) memory
• Serial Presence Detect (SPD) or non-SPD memory (BIOS recovery requires SPD DIMMs)
• Unbuffered single- or double-sided DIMMs
This board is designed to support DIMM configurations listed in Table 4 below.
Table 5. System Memory Configurations
DIMM Size Non-ECC Configuration
16 MB 2 Mbit x 64
32 MB 4 Mbit x 64
64 MB 8 Mbit x 64
128 MB 16 Mbit x 64
256 MB
Note: A 256 MB DIMM used with this board m ust be built with 128 Mbit dev i ce technology.
(Note)
32 Mbit x 64
20
Desktop Board Description
For information about Refer to
The
PC Serial Presence Detect Specification
Obtaining copies of PC SDRAM specifications http://www.intel.com/design/pcisets/memory
Section 1.3, page 16
1.6 Intel® 810E2 Chipset
The Intel 810E2 chipset consists of the following devices:
The GMCH is a centralized controller for the system bus, the memory bus, the AGP bus, and the
Accelerated Hub Architecture bus. The ICH2 is a centralized controller for the board’s I/O paths.
The FWH provides the nonvolatile storage of the BIOS. The component combination provides the
interfaces as shown in Figure 3.
66/100/133 MHz
System Bus
ATA-66/100USB
810E2 Chipset
100 MHz
SDRAM
Bus
Graphics Memory
Controller Hub
Display
Interface
Digital
Video Output
82810E
(GMCH)
AHA
Bus
SM Bus
82801BA I/O Controller
Hub (ICH2)
CSMA/CD
Unit Interface
PCI Bus
AC Link
SST 49LF004A
Firmware Hub
LPC Bus
Figure 3. Intel 810E2 Chipset Block Diagram
For information about Refer to
The Intel 810E2 chipset http://developer.intel.com
The resources used by the chipset Chapter 2
The chipset’s compliance with ACPI, APM, AC ‘97 Section 1.3, page 16
The ICH2 contains two separate USB controllers supporting four USB ports. Two of the ports are
accessible through stacked back panel connectors and the other two are accessible through the
front panel USB connector at location J8B1. One USB peripheral can be connected to each port.
For more than four USB devices, an external hub can be connected to any of the ports. The board
fully supports Universal Hub Controller Interface (UHCI) and uses UHCI-compatible software
drivers.
NOTE
✏
Computer systems that have an unshielded cable attached to a USB port may not meet
FCC Class B requirements, even if no device or a low-speed USB device is attached to the cable.
Use shielded cable that meets the requirements for full-speed devices.
For information about Refer to
The location of the back panel USB connectors Figure 8, page 49
The signal names of the USB connectors Table 21, page 50
The location of the front panel USB connector Figure 11, page 63
The signal names of the front panel USB connector Table 41, page 64
The USB and UHCI specifications Section 1.3, page 16
1.6.2 IDE Interfaces
The ICH2’s IDE controller has two independent bus-mastering IDE interfaces that can be
independently enabled. The IDE interfaces support the following modes:
• Programmed I/O (PIO): processor controls data transfer.
• 8237-style DMA: DMA offloads the processor, supporting transfer rates of up to 16 MB/sec.
• Ultra DMA: DMA protocol on IDE bus supporting host and target throttling and transfer rates
of up to 33 MB/sec.
• ATA-66: DMA protocol on IDE bus supporting host and target throttling and transfer rates of
up to 66 MB/sec. ATA-66 protocol is similar to Ultra DMA and is device driver compatible.
ATA-66 uses faster timings and requires a specialized cable to reduce reflections, noise, and
inductive coupling.
• ATA-100: DMA protocol on IDE bus allows host and target throttling. The ICH2 ATA-100
logic can achieve read transfer rates up to 100 MB/sec and write transfer rates up to
88 MB/sec.
NOTE
✏
ATA-100 and ATA-66 use faster timings and require a specialized cable to reduce reflections,
noise, and inductive coupling.
The IDE interfaces also support ATAPI devices (such as CD-ROM drives) and ATA devices using
the transfer modes listed in Table 66 on page 95.
The BIOS supports Logical Block Addressing (LBA) and Extended Cylinder Head Sector (ECHS)
translation modes. The drive reports the transfer rate and translation mode to the BIOS.
22
Desktop Board Description
The D810E2CA3 board supports Laser Servo (LS-120) diskette technology through its IDE
interfaces. An LS-120 drive can be configured as a boot device by setting the BIOS Setup
program’s Boot menu to one of the following:
• ARMD-FDD (ATAPI removable media device – floppy disk drive)
• ARMD-HDD (ATAPI removable media device – hard disk drive)
For information about Refer to
The location of the IDE connectors Figure 10, page 58
The signal names of the IDE connectors Table 39, page 62
BIOS Setup program’s Boot menu Table 72, page 101
1.6.3 Real-Time Clock, CMOS SRAM, and Battery
The real-time clock is compatible with DS1287 and MC146818 components. The clock provides a
time-of-day clock and a multicentury calendar with alarm features and century rollover. The
real-time clock supports 256 bytes of battery-backed CMOS SRAM in two banks that are reserved
for BIOS use.
The time, date, and CMOS values can be specified in the Setup program. The CMOS values can
be returned to their defaults by using the Setup program.
NOTE
✏
If the battery and AC power fail, custom defaults, if previously saved, will be loaded into CMOS
SRAM at power on.
A coin-cell battery powers the real-time clock and CMOS memory. When the computer is not
plugged into a wall socket, the battery has an estimated life of three years. When the computer is
plugged in, the 3.3 V standby current extends the life of the battery. The clock is accurate to
± 13 minutes/year at 25 ºC with 3.3 V applied.
For information about Refer to
The location of the battery Figure 1, page 14
Proper date access in systems with Intel de sktop boards Section 1.2, page 16
1.6.4 SST 49LF004A 4 Mbit Firmware Hub (FWH)
The FWH provides the following:
• System BIOS
• System security and manageability logic that enables protection for storing and updating of
The SMSC LPC47M102 I/O controller provides the following features:
• Low pin count (LPC) interface
• 3.3 V operation
• Two serial ports
• One parallel port with Extended Capabilities Port (ECP) and Enhanced Parallel Port (EPP)
support
• Serial IRQ interface compatible with serialized IRQ support for PCI systems
• PS/2–style mouse and keyboard interfaces
• Interface for one 1.2 MB, 1.44 MB, or 2.88 MB diskette drive
• Intelligent power management, including a programmable wake up event interface
• PCI power management support
• GPIO controlled on/off processor fan
The BIOS Setup program provides configuration options for the I/O controller.
For information about Refer to
SMSC LPC47M102 I/O controller http://www.smsc.com
1.7.1 Serial Ports
The D810E2CA3 board has two serial ports. Serial port A is located on the back panel. Serial
port B is accessible using the connector at location J1E2. The serial ports’ NS16C550-compatible
UARTs support data transfers at speeds up to 115.2 kbits/sec with BIOS support. The serial ports
can be assigned as COM1 (3F8h), COM2 (2F8h), COM3 (3E8h), or COM4 (2E8h).
For information about Refer to
The location of the serial port A connector Figure 8, page 49
The signal names of the serial port A connector Table 24, page 52
The location of the serial port B connector Figure 11, page 63
The signal names of the serial port B connector Table 40, page 64
1.7.2 Parallel Port
The connector for the multimode bidirectional parallel port is a 25-pin D-Sub connector located on
the back panel of the board. In the Setup program, there are four options for parallel port
operation:
†
• Output Only (PC AT
• Bi-directional (PS/2 compatible)
• EPP
• ECP
For information about Refer to
The location of the parallel port connector Figure 8, page 49
The signal names of the parallel port connector Table 23, page 51
-compatible mode)
24
Desktop Board Description
1.7.3 Diskette Drive Controller
The I/O controller supports a single diskette drive that is compatible with the 82077 diskette drive
†
controller and supports both PC-AT
NOTE
✏
and PS/2 modes.
The I/O controller supports 1.2 MB, 3.5-inch diskette drives, but a special driver is required for
this type of drive.
For information about Refer to
The location of the diskette drive connector Figure 10, page 58
The signal names of the diskette drive connector Table 38, page 61
The supported diskette drive capacities and sizes Table 67, page 96
1.7.4 Keyboard and Mouse Interface
PS/2 keyboard and mouse connectors are located on the back panel of the board. The +5 V lines to
†
these connectors are protected with a PolySwitch
reestablishes the connection after an overcurrent condition is removed.
circuit that, like a self-healing fuse,
NOTE
✏
The keyboard is supported in the bottom PS/2 connector and the mouse is supported in the top
PS/2 connector. Power to the computer should be turned off before a keyboard or mouse is
connected or disconnected.
The keyboard controller contains code that provides the traditional keyboard and mouse control
functions and also supports power-on/reset password protection. A power-on/reset password can
be specified in the BIOS Setup program.
The keyboard controller also supports the hot-key sequence <Ctrl><Alt><Del> for a software reset
(operating system dependent). This key sequence resets the computer’s software by jumping to the
beginning of the BIOS code and running the power-on self-test (POST).
For information about Refer to
The location of the keyboard and mouse connectors Figure 8, page 49
The signal names of the keyboard and mouse connectors Table 19, page 50
D = DirectDraw
3 = Direct3D
O = Overlay
F = Digital Display Device only. A mode will be s upported on both analog CRTs and
digital display devices (KD3O applies to both types of displays), unl ess indicated otherwise.
256 colors 60, 70, 72, 75 KDO
256 colors 85 KD
64 K colors 60, 70 KD3O
64 K colors 72, 75, 85 KD3
16 M colors 60 KDO
16 M colors 75, 85 KD
256 colors 60 (reduced blanking) KDOF
64 K colors 60 (reduced blanking) KD3F
16 M colors 60 (reduced blanking) KDF
256 colors 60 KDO
256 colors 70, 72, 75, 85 KD
64 K colors 60, 70, 72, 75, 85 KD3
16 M colors 60, 70, 75, 85 KD
256 colors
†
†
and OpenGL†
Available Refresh
Frequencies (Hz)
60, 70, 72, 75 KD
Notes
NOTE
✏
Some of the system memory is reserved for video.
1.8.2 Digital Video Output (DVO) Connector (Opti onal )
The board routes the Intel 82810E GMCH DVO port to an onboard 40-pin DVO connector. The
DVO connector can be cabled to a DVI or TV out card to enable digital displays or TV out
functionality. The Digital Visual Interface (DVI) specification provides a high-speed digital
connection for visual data types when using the integrated graphics controller. This interface is
active only when the integrated graphics controller is enabled.
The DVI interface allows interfacing with a discrete Transmission Minimized Differential
Signaling (TMDS) transmitter to enable platform support for DVI compliant digital displays or
with a discrete TV encoder for TV out functionality.
For information about Refer to
The location of the DVO connector Figure 9, page 54
The signal names of the DVO connector Table 31, page 56
Obtaining the DVI specification Table 3, page 16
28
Desktop Board Description
1.9 Audio Subsystem
The board includes an Audio Codec ’97 (AC ’97) compatible audio subsystem consisting of these
devices:
• Intel 82801BA ICH2 digital controller (AC link output)
• Analog Devices AD1885 analog codec
Features of the audio subsystem include:
• Split digital/analog architecture for improved S/N (signal-to-noise) ratio: ≥ 85 dB
• 3-D stereo enhancement
• Power management support for APM 1.2 and ACPI 2.0 (driver dependent)
The audio subsystem supports the following audio connectors:
• Inputs:
Three analog line-level stereo inputs for connection from line in, CD, and auxiliary line in
One mono microphone input
• Output: Stereo line-level output
For information about Refer to
Obtaining audio software and utilities Section 1.2, page 16
Obtaining the AC ’97 specification Table 3, page 16
1.9.1 AD1885 Analog Codec
The AD1885 is a fully AC ’97 compliant codec. The codec’s features include:
• > 90 dB signal-to-noise ratio sound quality
• Power management support for APM 1.2 and ACPI 2.0 (driver dependent)
• Playback sample rates up to 48 kHz
• 16 bit stereo full-duplex operation
• Software compatible with Windows
(Windows Me), and Windows NT
• Full-duplex operation at asynchronous hardware record/playback sample rates
• Frequency response: 20 Hz to 20 kHz (± 0.1 dB)
Figure 4 is a block diagram of the board’s audio subsystem, including the Intel 82801BA ICH2
digital controller, the AD1885 analog codec, and the audio connectors.
• ATAPI-style connectors:
CD-ROM
Auxiliary line in
• Front panel audio
• Back panel connectors:
Line out
Line in
Mic in
NOTE
✏
The line out connector, located on the back panel, is designed to power either headphones or
amplified speakers only. Poor audio quality may occur if passive (non-amplified) speakers are
connected to this output.
For information about Refer to
The back panel audio connectors Section 2.8.1, page 49
1.9.2.1 ATAPI CD-ROM Audio Connector
A 1 x 4-pin ATAPI-style connector connects an internal ATAPI CD-ROM drive to the audio
mixer.
For information about Refer to
The location of the ATAPI CD-ROM connector Figure 9, page 54
The signal names of the ATAPI CD-ROM connector Table 28, page 55
1.9.2.2 Front Panel Audio Connector
A 2 x 5-pin connector for routing mic in and line out to the front panel.
For information about Refer to
The location of the front panel audio connector Figure 9, page 54
The signal names of the front panel audio connector Table 29, page 55
1.9.2.3 Auxiliary Line In Connector
A 1 x 4-pin ATAPI-style connector connects the left and right channel signals of an internal audio
device to the audio subsystem.
For information about Refer to
The location of the auxiliary line in connector Figure 9, page 54
The signal names of the auxiliary line in connector Table 30, page 55
30
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