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6Quad-Core Intel® Xeon® Processor 5400 Series TMDG
Revision History
Reference
Number
318611001Initial release of the document.November 2007
Revision
Number
DescriptionDate
§
Quad-Core Intel® Xeon® Processor 5400 Series TMDG 7
8Quad-Core Intel® Xeon® Processor 5400 Series TMDG
Introduction
1Introduction
1.1Objective
The purpose of this guide is to describe the reference thermal solution and design
parameters required for the Quad-Core Intel® Xeon® Processor 5400 Series.
It is also the intent of this document to comprehend and demonstrate the processor
cooling solution features and requirements. Furthermore, this document provides an
understanding of the processor thermal characteristics, and discusses guidelines for
meeting the thermal requirements imposed over the entire life of the processor. The
thermal/mechanical solutions described in this document are intended to aid
component and system designers in the development and evaluation of processor
compatible thermal/mechanical solutions.
1.2Scope
The thermal/mechanical solutions described in this document pertain to a solution(s)
intended for use with the Quad-Core Intel® Xeon® Processor 5400 Series in 1U, 2U,
2U+ and workstation form factors systems. This document contains the mechanical
and thermal requirements of the processor cooling solution. In case of conflict, the data
in the Quad-Core Intel® Xeon® Processor 5400 Series Datasheet supersedes any data
in this document. Additional information is provided as a reference in the appendices.
1.3References
Material and concepts available in the following documents may be beneficial when
reading this document.
Table 1-1.Reference Documents (Sheet 1 of 2)
DocumentComment
European Blue Angel Recycling Standardshttp://www.blauer-engel.de
®
Intel
Xeon® Dual- and Multi- Processor Family Thermal Test Vehicle
User's Guide
LGA771 Socket Mechanical Design GuideSee Note following table.
LGA771 SMT Socket Design GuidelinesSee Note following table.
LGA771 Daisy Chain Test Vehicle User GuideSee Note following table.
Stoakley Platform Design Guide (PDG)See Note following table.
Dual-Core Intel
Guide (PDG)
Dual-Core Intel
Guide (PDG)
Clovertown, Harpertown & Wolfdale-DP Processors Compatibility Design
Guide for Bensley, Bensley-VS, and Glidewell Platforms
PECI Feature Set OverviewSee Note following table
Platform Environment Control Interface(PECI) SpecificationSee Note following table
Quad-Core Intel® Xeon® Processor 5400 Series Datasheet See Note following table.
Clovertown_Harpertown_Wolfdale-DP Processor Enabled CEK and
Package Mechanical Models (in IGES and ProE* format)
®
Xeon® Processor-Based Servers Platform Design
®
Xeon® Processor-Based Workstation Platform Design
See Note at bottom table.
See Note following table.
See Note following table.
See Note following table.
Available electronically
Quad-Core Intel® Xeon® Processor 5400 Series TMDG9
Table 1-1.Reference Documents (Sheet 2 of 2)
DocumentComment
Clovertown_Harpertown_Wolfdale-DP Processor Enabled Components
CEK Thermal Models (in Flotherm* and Icepak*)
Clovertown_Harpertown_Wolfdale-DP Processor Package Thermal
Models (in Flotherm and Icepak)
RS - Wolfdale Processor Family BIOS Writers Guide (BWG)See Note following table.
Thin Electronics Bay Specification (A Server System Infrastructure (SSI)
Specification for Rack Optimized Servers
Note: Contact your Intel field sales representative for the latest revision and order number of this document.
1.4Definition of Terms
Table 1-2.Terms and Descriptions (Sheet 1 of 2)
TermDescription
BypassBypass is the area between a passive heatsink and any object that can act to form a
DTSDigital Thermal Sensor replaces the Tdiode in previous products and
MSRThe processor provides a variety of model specific registers that are used to control and
FMBFlexible Motherboard Guideline: an estimate of the maximum value of a processor
FSCFan Speed Control
IHSIntegrated Heat Spreader: a component of the processor package used to enhance the
LGA771 SocketThe Quad-Core Intel® Xeon® Processor 5400 Series interfaces to the baseboard
P
MAX
PECIA proprietary one-wire bus interface that provides a communication channel between
Ψ
CA
Ψ
CS
Ψ
SA
T
CASE
T
CASE_MAX
TCCThermal Control Circuit: Thermal monitor uses the TCC to reduce the die temperature
duct. For this example, it can be expressed as a dimension away from the outside
dimension of the fins to the nearest surface.
sensor as the PROCHOT# sensor to indicate the on-die temperature. The temperature
value represents the number of degrees below the TCC activation temperature.
report on processor performance. Virtually all MSRs handle system related functions and
are not accessible to an application program.
specification over certain time periods. System designers should meet the FMB values to
ensure their systems are compatible with future processor releases.
thermal performance of the package. Component thermal solutions interface with the
processor at the IHS surface.
through this surface mount, 771 Land socket. See the LGA771 Socket Mechanical Design Guide for details regarding this socket.
The maximum power dissipated by a semiconductor component.
Intel processor and chipset components to external thermal monitoring devices, for use
in fan speed control. PECI communicates readings from the processors Digital Thermal
Sensor. PECI replaces the thermal diode available in previous processors.
Case-to-ambient thermal characterization parameter (psi). A measure of thermal
solution performance using total package power. Defined as (T
Package Power. Heat source should always be specified for Ψ measurements.
Case-to-sink thermal characterization parameter. A measure of thermal interface
material performance using total package power. Defined as (T
Package Power.
Sink-to-ambient thermal characterization parameter. A measure of heatsink thermal
performance using total package power. Defined as (T
The case temperature of the processor, measured at the geometric center of the topside
of the IHS.
The maximum case temperature as specified in a component specification.
by using clock modulation and/or operating frequency and input voltage adjustment
when the die temperature is very near its operating limits.
Introduction
Available electronically
Available electronically
www.ssiforum.com
uses the same
– TLA) / Total
CASE
– TS) / Total
CASE
– TLA) / Total Package Power.
S
10Quad-Core Intel® Xeon® Processor 5400 Series TMDG
Introduction
Table 1-2.Terms and Descriptions (Sheet 2 of 2)
T
CONTROL
T
OFFSET
TDPThermal Design Power: Thermal solution should be designed to dissipate this target
Thermal MonitorA feature on the processor that can keep the processor’s die temperature within factory
Thermal ProfileLine that defines case temperature specification of a processor at a given power level.
TIMThermal Interface Material: The thermally conductive compound between the heatsink
T
LA
T
SA
UA unit of measure used to define server rack spacing height. 1U is equal to 1.75 in, 2U
A processor unique value for use in fan speed control mechanisms. T
temperature specification based on a temperature reading from the processor’s Digital
Thermal Sensor. T
implementation.T
An offset value from the TCC activation temperature value programmed into each
processor during manufacturing and can be obtained by reading the
IA_32_TEMPERATURE_TARGET MSR. This is a static and a unique value. Refer to the
can be described as a trigger point for fan speed control
CONTROL
= -T
CONTROL
RS - Wolfdale Processor Family BIOS Writers Guide (BWG) for further details.
power level. TDP is not the maximum power that the processor can dissipate.
specifications under normal operating conditions.
and the processor case. This material fills the air gaps and voids, and enhances the
transfer of the heat from the processor case to the heatsink.
The measured ambient temperature locally surrounding the processor. The ambient
temperature should be measured just upstream of a passive heatsink or at the fan inlet
for an active heatsink.
The system ambient air temperature external to a system chassis. This temperature is
usually measured at the chassis air inlets.
equals 3.50 in, etc.
OFFSET
is a
CONTROL
.
§
Quad-Core Intel® Xeon® Processor 5400 Series TMDG11
Introduction
12Quad-Core Intel® Xeon® Processor 5400 Series TMDG
Thermal/Mechanical Reference Design
2Thermal/Mechanical Reference
Design
This chapter describes the thermal/mechanical reference design for Quad-Core Intel®
Xeon® Processor 5400 Series. Both Quad-Core Intel® Xeon® Processor X5400 Series
and Quad-Core Intel® Xeon® Processor E5400 Series are targeted for the full range of
form factors (2U, 2U+ and 1U). The Quad-Core Intel® Xeon® Processor X5482 sku is
an ultra performance version of the Quad-Core Intel® Xeon® Processor 5400 Series
with 150W TDP and is use only in workstation platforms.
2.1Mechanical Requirements
The mechanical performance of the processor cooling solution must satisfy the
requirements described in this section.
2.1.1Processor Mechanical Parameters
Table 2-1.Processor Mechanical Parameters Table
ParameterMinimumMaximumUnitNotes
Volumetric Requirements and Keepouts1
Static Compressive Load3
Static Board Deflection3
Dynamic Compressive Load3
Tra n s ient B e n d3
Shear Load70
Tensile Load25
Torsi on L o a d35
Notes:
1.Refer to drawings in Appendix B.
2.In the case of a discrepancy, the most recent Quad-Core Intel® Xeon® Processor 5400 Series Datasheet
and LGA771 Socket Mechanical Design Guide supersede targets listed in Ta bl e 2 -1 above.
3.These socket limits are defined in the LGA771 Socket Mechanical Design Guide.
4.These package handling limits are defined in the Quad-Core Intel® Xeon® Processor 5400 Series
Datasheet.
5.Shear load that can be applied to the package IHS.
6.Tensile load that can be applied to the package IHS.
7.Torque that can be applied to the package IHS.
311
111
3.95
lbf
N
lbf
N
in*lbf
N*m
2,4,5
2,4,6
2,4,7
Quad-Core Intel® Xeon® Processor 5400 Series TMDG13
Thermal/Mechanical Reference Design
2.1.2Quad-Core Intel® Xeon® Processor 5400 Series Package
The Quad-Core Intel® Xeon® Processor 5400 Series is packaged using the flip-chip
land grid array (FC-LGA) package technology. Please refer to the Quad-Core Intel® Xeon® Processor 5400 Series Datasheet for detailed mechanical specifications. The
Quad-Core Intel® Xeon® Processor 5400 Series mechanical drawing shown in
Figure 2-1, Figure 2-2, and Figure 2-3 provide the mechanical information for the
Quad-Core Intel® Xeon® Processor 5400 Series. The drawing is superseded with the
drawing in the processor datasheet should there be any conflicts. Integrated package/
socket stackup height information is provided in the LGA771 Socket Mechanical Design Guide.
14Quad-Core Intel® Xeon® Processor 5400 Series TMDG
Thermal/Mechanical Reference Design
Figure 2-1. Quad-Core Intel® Xeon® Processor 5400 Series Mechanical Drawing (1 of 3)
Note: Guidelines on potential IHS flatness variation with socket load plate actuation and installation of the cooling solution are
available in the processor Thermal/Mechanical Design Guidelines.
Quad-Core Intel® Xeon® Processor 5400 Series TMDG15
Thermal/Mechanical Reference Design
Figure 2-2. Quad-Core Intel® Xeon® Processor 5400 Series Mechanical Drawing (2 of 3)
16Quad-Core Intel® Xeon® Processor 5400 Series TMDG
Thermal/Mechanical Reference Design
Figure 2-3. Quad-Core Intel® Xeon® Processor 5400 Series Mechanical Drawing (3 of 3)
Note: The optional dimple packing marking highlighted by Detail F from the above drawing may only be found on initial
processors.
Quad-Core Intel® Xeon® Processor 5400 Series TMDG17
Thermal/Mechanical Reference Design
The package includes an integrated heat spreader (IHS). The IHS transfers the nonuniform heat from the die to the top of the IHS, out of which the heat flux is more
uniform and spreads over a larger surface area (not the entire IHS area). This allows
more efficient heat transfer out of the package to an attached cooling device. The IHS
is designed to be the interface for contacting a heatsink. Details can be found in the
Quad-Core Intel® Xeon® Processor 5400 Series Datasheet.
The processor connects to the baseboard through a 771-land surface mount socket. A
description of the socket can be found in the LGA771 Socket Mechanical Design Guide.
The processor package and socket have mechanical load limits that are specified in the
Quad-Core Intel® Xeon® Processor 5400 Series Datasheet and the LGA771 Socket
Mechanical Design Guide. These load limits should not be exceeded during heatsink
installation, removal, mechanical stress testing, or standard shipping conditions. For
example, when a compressive static load is necessary to ensure thermal performance
of the Thermal Interface Material (TIM) between the heatsink base and the IHS, it
should not exceed the corresponding specification given in the LGA771 Socket Mechanical Design Guide.
The heatsink mass can also add additional dynamic compressive load to the package
during a mechanical shock event. Amplification factors due to the impact force during
shock must be taken into account in dynamic load calculations. The total combination
of dynamic and static compressive load should not then exceed the processor/socket
compressive dynamic load specified in the LGA771 Socket Mechanical Design Guide
during a vertical shock. It is not recommended to use any portion of the processor
substrate as a mechanical reference or load-bearing surface in either static or dynamic
compressive load conditions.
2.1.3Quad-Core Intel® Xeon® Processor 5400 Series
Considerations
An attachment mechanism must be designed to support the heatsink since there are no
features on the LGA771 socket to directly attach a heatsink. In addition to holding the
heatsink in place on top of the IHS, this mechanism plays a significant role in the
robustness of the system in which it is implemented, in particular:
• Ensuring thermal performance of the TIM applied between the IHS and the
heatsink. TIMs, especially ones based on phase change materials, are very
sensitive to applied pressure: the higher the pressure, the better the initial
performance. TIMs such as thermal greases are not as sensitive to applied
pressure. Refer to Section 2.5.2 and Section 2.5.7.2 for information on tradeoffs
made with TIM selection. Designs should consider possible decrease in applied
pressure over time due to potential structural relaxation in enabled components.
• Ensuring system electrical, thermal, and structural integrity under shock and
vibration events. The mechanical requirements of the attach mechanism depend on
the weight of the heatsink and the level of shock and vibration that the system
must support. The overall structural design of the baseboard and system must be
considered when designing the heatsink attach mechanism. Their design should
provide a means for protecting LGA771 socket solder joints as well as preventing
package pullout from the socket.
Note:The load applied by the attachment mechanism must comply with the package and
socket specifications, along with the dynamic load added by the mechanical shock and
vibration requirements, as identified in Section 2.1.1.
18Quad-Core Intel® Xeon® Processor 5400 Series TMDG
Thermal/Mechanical Reference Design
A potential mechanical solution for heavy heatsinks is the direct attachment of the
heatsink to the chassis pan. In this case, the strength of the chassis pan can be utilized
rather than solely relying on the baseboard strength. In addition to the general
guidelines given above, contact with the baseboard surfaces should be minimized
during installation in order to avoid any damage to the baseboard.
The Intel reference design for Quad-Core Intel® Xeon® Processor 5400 Series is using
such a heatsink attachment scheme. Refer to Section 2.5 for further information
regarding the Intel reference mechanical solution.
2.2Processor Thermal Parameters and Features
2.2.1Thermal Control Circuit and TDP
The operating thermal limits of the processor are defined by the Thermal Profile. The
intent of the Thermal Profile specification is to support acoustic noise reduction through
fan speed control and ensure the long-term reliability of the processor. This
specification requires that the temperature at the center of the processor IHS, known
as (T
Figure 2-4 shows the measurement location for the Quad-Core Intel® Xeon®
Processor 5400 Series package. Compliance with the T
achieve optimal operation and long-term reliability (See the Intel® Xeon® Dual- and
Multi- Processor Family Thermal Test Vehicle User's Guide for Case Temperature
definition and measurement methods).
Figure 2-4. Processor Case Temperature Measurement Location
) remains within a certain temperature specification. For illustration,
CASE
specification is required to
CASE
To ease the burden on thermal solutions, the Thermal Monitor feature and associated
logic have been integrated into the silicon of the processor. One feature of the Thermal
Monitor is the Thermal Control Circuit (TCC). When active, the TCC lowers the
processor temperature by reducing power consumption. This is accomplished through a
combination of Thermal Monitor and Advanced Thermal Monitor (TM2). Thermal
Monitor modulates the duty cycle of the internal processor clocks, resulting in a lower
effective frequency. When active, the TCC turns the processor clocks off and then back
on with a predetermined duty cycle. Thermal Monitor 2 activation adjusts both the
Quad-Core Intel® Xeon® Processor 5400 Series TMDG19
Thermal/Mechanical Reference Design
processor operating frequency (via the bus multiplier) and input voltage (via the VID
signals). Please refer to the Quad-Core Intel® Xeon® Processor 5400 Series Datasheet
for further details on TM and TM2.
PROCHOT# is designed to assert at or a few degrees higher than maximum T
CASE
(as
specified by the thermal profile) when dissipating TDP power, and can not be
interpreted as an indication of processor case temperature. This temperature delta
accounts for processor package, lifetime, and manufacturing variations and attempts to
ensure the Thermal Control Circuit is not activated below maximum T
CASE
when
dissipating TDP power. There is no defined or fixed correlation between the PROCHOT#
assertion temperature and the case temperature. However, with the introduction of the
Digital Thermal Sensor (DTS) on the Quad-Core Intel® Xeon® Processor 5400 Series,
the DTS reports a relative offset below the PROCHOT# assertion (see Section 2.2.2 for
more details on the Digital Thermal Sensor). Thermal solutions must be designed to the
processor specifications (i.e Thermal Profile) and can not be adjusted based on
experimental measurements of T
, PROCHOT#, or Digital Thermal Sensor on
CASE
random processor samples.
By taking advantage of the Thermal Monitor features, system designers may reduce
thermal solution cost by designing to the Thermal Design Power (TDP) instead of
maximum power. TDP should be used for processor thermal solution design targets.
TDP is not the maximum power that the processor can dissipate. TDP is based on
measurements of processor power consumption while running various high power
applications. This data set is used to determine those applications that are interesting
from a power perspective. These applications are then evaluated in a controlled
thermal environment to determine their sensitivity to activation of the thermal control
circuit. This data set is then used to derive the TDP targets published in the processors
datasheet. The Thermal Monitor can protect the processors in rare workload excursions
above TDP. Therefore, thermal solutions should be designed to dissipate this target
power level. The thermal management logic and thermal monitor features are
discussed in extensive detail in the Quad-Core Intel® Xeon® Processor 5400 Series
Datasheet.
In addition, on-die thermal management features called THERMTRIP# and FORCEPR#
are available on the Quad-Core Intel® Xeon® Processor 5400 Series. They provide a
thermal management approach to support the continued increases in processor
frequency and performance. Please see the Quad-Core Intel® Xeon® Processor 5400 Series Datasheet for guidance on these thermal management features.
2.2.2Digital Thermal Sensor
The Quad-Core Intel® Xeon® Processor 5400 Series include on-die temperature
sensor feature called Digital Thermal Sensor (DTS). The DTS uses the same sensor
utilized for TCC activation. Each individual processor is calibrated so that TCC activation
occurs at a DTS value of 0. The temperature reported by the DTS is the relative offset
in PECI counts below the onset of the TCC activation and hence is negative. Changes in
PECI counts are roughly linear in relation to temperature changes in degrees Celsius.
For example, a change in PECI count by '1' represents a change in temperature of
approximately 1°C. However, this linearity cannot be guaranteed as the offset below
TCC activation exceeds 20-30 PECI counts. Also note that the DTS will not report any
values above the TCC activation temperature, it will simply return 0 in this case.
The DTS facilitates the use of multiple thermal sensors within the processor without the
burden of increasing the number of thermal sensor signal pins on the processor
package. Operation of multiple DTS will be discussed in more detail in Section 2.2.4.
Also, the DTS utilizes thermal sensors that are optimally located when compared with
thermal diodes available with legacy processors. This is achieved as a result of a
20Quad-Core Intel® Xeon® Processor 5400 Series TMDG
Thermal/Mechanical Reference Design
smaller foot print and decreased sensitivity to noise. These DTS benefits will result in
more accurate fan speed control and TCC activation.The DTS application in fan speed
control will be discussed in more detail in Section 2.4.1.
2.2.3Platform Environmental Control Interface (PECI)
The PECI interface is designed specifically to convey system management information
from the processor (initially, only thermal data from the Digital Thermal Sensor). It is a
proprietary single wire bus between the processor and the chipset or other health
monitoring device. The PECI specification provides a specific command set to discover,
enumerate devices, and read the temperature. For an overview of the PECI interface,
please refer to PECI Feature Set Overview. For more detailed information on PECI,
please refer to Platform Environment Control Interface (PECI) Specification and Quad-
Core Intel® Xeon® Processor 5400 Series Datasheet.
2.2.4Multiple Core Special Considerations
2.2.4.1Multiple Digital Thermal Sensor Operation
Each Quad-Core Intel® Xeon® Processor 5400 Series can have multiple Digital
Thermal Sensors located on the die. Each die within the processor currently maps to a
PECI domain. The Quad-Core Intel® Xeon® Processor 5400 Series contains two cores
per die (domain) and two domains (die) per socket. BIOS will be responsible for
detecting the proper processor type and providing the number of domains to the
thermal management system. An external PECI device that is part of the thermal
management system polls the processor domains for temperature information and
currently receives the highest of the DTS output temperatures within each domain.
Figure 2-5 provides an illustration of the DTS domains for the Quad-Core Intel® Xeon®
Processor 5400 Series.
Figure 2-5. DTS Domain for Quad-Core Intel® Xeon® Processor 5400 Series
Quad-Core Intel® Xeon® Processor 5400 Series TMDG21
2.2.4.2Thermal Monitor for Multiple Core Products
Thermal/Mechanical Reference Design
The thermal management for multiple core products has only one T
processor. The T
CONTROL
for processor 0 and T
CONTROL
for processor 1 are independent
CONTROL
value per
from each other. If the DTS temperature from any domain within the processor is
greater than or equal to T
CONTROL
, the processor case temperature must remain at or
below the temperature as specified by the thermal profile. See Section 2.2.6 for
information on T
CONTROL
. The PECI signal is available through CPU pin (G5) on each
LGA771 socket for the Quad-Core Intel® Xeon® Processor 5400 Series. Through this
pin, the two domains provide the current hottest value received from all the
temperature sensors, to an external PECI device such as a thermal management
system.
2.2.4.3PROCHOT#, THERMTRIP#, and FORCEPR#
The PROCHOT# and THERMTRIP# outputs will be shared by all cores on a processor.
The first core to reach TCC activation will assert PROCHOT#. A single FORCEPR# input
will be shared by every core. Tabl e 2- 2 provides an overview of input and output
conditions for the Quad-Core Intel® Xeon® Processor 5400 Series thermal
management features.
Table 2-2.Input and Output Conditions for the Quad-Core Intel® Xeon® Processor 5400
Series Thermal Management Features
ItemProcessor InputProcessor Output
DTS
TM1/TM2
PROCHOT#
Core X > TCC Activation Temperature
Core X > TCC Activation Temperature
DTS
All Cores TCC Activation
PROCHOT# Asserted
Core X > THERMTRIP # Assertion
THERMTRIP#
FORCEPR#
Note:
1.X=1,2,3,4; represents any one of the core1, core2, core3 and core4 in the Quad-Core Intel® Xeon® Processor 5400
Series.
2.For more information on PROCHOT#, THERMTRIP#, and FORCEPR# see the Quad-Core Intel® Xeon® Processor 5400
Series Datasheet.
DTS
Tem p era t ur e
FORCEPR# AssertedAll Cores TCC Activation
THERMTRIP# Asserted,
all cores shut down
2.2.4.4Heatpipe Orientation for Multiple Core Processors
Thermal management of multiple core processors can be achieved without the use of
heatpipe heatsinks, as demonstrated by the Intel Reference Thermal Solution discussed
in Section 2.5.
To assist customers interested in designing heatpipe heatsinks, processor core
locations have been provided. In some cases, this may influence the designer’s
selection of heatpipe orientation. For this purpose, the core geometric center locations,
as illustrated in Figure 2-6, are provided in Tab l e 2 - 3 . Dimensions originate from the
vertical edge of the IHS nearest to the pin 1 fiducial as shown in Figure 2-6.
22Quad-Core Intel® Xeon® Processor 5400 Series TMDG
Thermal/Mechanical Reference Design
Figure 2-6. Processor Core Geometric Center Locations
Core4
Core4
Core3
Core3
Y4
Y4
Y3
Y3
Core2
Core2
Core1
Y2
Y2
Y1
Y1
Table 2-3. Processor Core Geometric Center Dimensions
FeatureX DimensionY Dimension
Core 118.15 mm6.15 mm
Core 218.15 mm10.35 mm
Core 318.15 mm18.85 mm
Core 418.15 mm23.05 mm
Core1
X1, X2,X3,X4
X1, X2, X3, X4
Y
Y
X
X
Quad-Core Intel® Xeon® Processor 5400 Series TMDG23
2.2.5Thermal Profile
The thermal profile is a line that defines the relationship between a processor’s case
temperature and its power consumption as shown in Figure 2-7. The equation of the
thermal profile is defined as:
Equation 2-1.y = ax + b
Where:
y=Processor case temperature, T
x=Processor power consumption (W)
a=Case-to-ambient thermal resistance, ΨCA (°C/W)
b=Processor local ambient temperature, TLA (°C)
Figure 2-7. Thermal Profile Diagram
CASE
Thermal/Mechanical Reference Design
(°C)
The high end point of the Thermal Profile represents the processor’s TDP and the
associated maximum case temperature (T
CASE_MAX
) and the lower end point represents
the local ambient temperature at P = 0W. The slope of the Thermal Profile line
represents the case-to-ambient resistance of the thermal solution with the y-intercept
being the local processor ambient temperature. The slope of the Thermal Profile is
constant, which indicates that all frequencies of a processor defined by the Thermal
Profile will require the same heatsink case-to-ambient resistance.
In order to satisfy the Thermal Profile specification, a thermal solution must be at or
below the Thermal Profile line for the given processor when its DTS temperature is
greater than T
CONTROL
(refer to Section 2.2.6). The Thermal Profile allows the
customers to make a trade-off between the thermal solution case-to-ambient
resistance and the processor local ambient temperature that best suits their platform
implementation (refer to Section 2.4.3). There can be multiple combinations of thermal
solution case-to-ambient resistance and processor local ambient temperature that can
meet a given Thermal Profile. If the case-to-ambient resistance and the local ambient
temperature are known for a specific thermal solution, the Thermal Profile of that
solution can easily be plotted against the Thermal Profile specification. As explained
24Quad-Core Intel® Xeon® Processor 5400 Series TMDG
Thermal/Mechanical Reference Design
above, the case-to-ambient resistance represents the slope of the line and the
processor local ambient temperature represents the y-axis intercept. Hence the
T
CASE_MAX
determined, the line can be extended to Power (P) = 0W representing the Thermal
Profile of the specific solution. If that line stays at or below the Thermal Profile
specification, then that particular solution is deemed as a compliant solution.
value of a specific solution can be calculated at TDP. Once this point is
2.2.6T
T
processor T
longer absolute. The T
activation set point (i.e. PECI Count = 0), as indicated by PROCHOT#. Figure 2-8
depicts the interaction between the T
Figure 2-8. T
CONTROL
CONTROL
CONTROL
Digital Thermal Sensor Temperature
Digital Thermal Sensor Temperature
Tcontrol = -5
Tcontrol = -5
Definition
can be described as a trigger point for fan speed control implementation. The
CONTROL
Value and Digital Thermal Sensor Value Interaction
value provided by the Digital Thermal Sensor is relative and no
CONTROL
-10
-10
-10
-20
-20
-20
-30
-30
-30
-40
-40
-40
value is now defined as a relative value to the TCC
CONTROL
0
0
0
value and Digital Thermal Sensor value.
Temperature
Temperature
Time
Time
The value for T
individually. For the Quad-Core Intel® Xeon® Processor 5400 Series, the T
value is obtained by reading the processor model specific register
(IA32_TEMPERATURE_TARGET MSR).
Note:There is no T
The fan speed control device only needs to read the T
the DTS value from the PECI interface. The equation for calculating T
Equation 2-2.T
Quad-Core Intel® Xeon® Processor 5400 Series TMDG25
CONTROL
Where:
T
OFFSET
CONTROL
CONTROL_BASE
= -T
OFFSET
= A DTS-based value programmed into each processor during
manufacturing that can be obtained by reading the
IA32_TEMPERATURE_TARGET MSR. This is a static and a unique value.
Refer to the RS - Wolfdale Processor Family BIOS Writer’s Guide (BWG)
for further details.
is calibrated in manufacturing and configured for each processor
CONTROL
value to sum as previously required on legacy processors.
OFFSET MSR
and compare this to
CONTROL
is:
Thermal/Mechanical Reference Design
Figure 2-9. T
Figure 2-9 depicts the interaction between the Thermal Profile and T
CONTROL
and Thermal Profile Interaction
CONTROL
.
If the DTS temperature is less than T
CONTROL
, then the case temperature is permitted
to exceed the Thermal Profile, but the DTS temperature must remain at or below
T
CONTROL
T
CASE
T
CASE_MAX
Refer to Section 2.4.1 for the implementation of the T
. The thermal solution for the processor must be able to keep the processor’s
at or below the Thermal Profile when operating between the T
CONTROL
and
at TDP under heavy workload conditions.
CONTROL
value in support of fan
speed control (FSC) design to achieve better acoustic performance.
2.2.7Thermal Profile Concepts for the Quad-Core Intel® Xeon®
Processor 5400 Series
2.2.7.1Dual Thermal Profile Concept for the Quad-Core Intel® Xeon® Processor
X5400 Series
The Quad-Core Intel® Xeon® Processor X5400 Series is designed to go into various
form factors, including the volumetrically constrained 1U and custom blade form
factors. Due to certain limitations of such form factors (i.e. airflow, thermal solution
height), it is very challenging to meet the thermal requirements of the processor. To
mitigate these form factor constraints, Intel has developed a dual Thermal Profile
specification, shown in Figure 2-10.
26Quad-Core Intel® Xeon® Processor 5400 Series TMDG
Thermal/Mechanical Reference Design
Figure 2-10. Dual Thermal Profile Diagram
T
T
case_max_B
case_max_B
T
T
case_max_A
case_max_A
Thermal Profile B
Thermal Profile B
Thermal Profile A
Thermal Profile A
TDP
Power
Power
The Thermal Profile A is based on Intel’s 2U+ air cooling solution. Designing to Thermal
Profile A ensures that no measurable performance loss due to Thermal Control Circuit
(TCC) activation is observed in the processor. It is expected that TCC would only be
activated for very brief periods of time when running a worst-case real world
application in a worst-case thermal condition. These brief instances of TCC activation
are not expected to impact the performance of the processor. A worst case real world
application is defined as a commercially available, useful application which dissipates a
power equal to, or above, the TDP for a thermally relevant timeframe. One example of
a worst-case thermal condition is when a processor local ambient temperature is at or
above 42.8°C for Quad-Core Intel® Xeon® Processor X5400 Series Thermal Profile A.
Thermal Profile B supports volumetrically constrained platforms (i.e. 1U, blades, etc.),
and is based on Intel’s 1U air cooling solution. Because of the reduced capability
represented by such thermal solutions, designing to Thermal Profile B results in an
increased probability of TCC activation and an associated measurable performance loss.
Measurable performance loss is defined to be any degradation in the processor’s
performance greater than 1.5%. The 1.5% number is chosen as the baseline since the
run-to-run variation in a given performance benchmark is typically between 1 and 2%.
Although designing to Thermal Profile B results in increased T
compared to Thermal Profile A at a given power level, both of these Thermal Profiles
ensure that Intel’s long-term processor reliability requirements are satisfied. In other
words, designing to Thermal Profile B does not impose any additional risk to Intel’s
long-term reliability requirements. Thermal solutions that exceed Thermal Profile B
specification are considered incompliant and will adversely affect the long-term
reliability of the processor.
temperatures
CASE
TDP
Quad-Core Intel® Xeon® Processor 5400 Series TMDG27
Thermal/Mechanical Reference Design
Refer to the Quad-Core Intel® Xeon® Processor 5400 Series Datasheet or
Section 2.2.8 for the Thermal Profile A and Thermal Profile B specifications. Section 2.5
of this document also provides details on the 2U+ and 1U Intel reference thermal
solutions that are designed to meet the Quad-Core Intel® Xeon® Processor X5400
Series Thermal Profile A and Thermal Profile B respectively.
2.2.7.2Thermal Profile Concept for the Quad-Core Intel® Xeon® Processor
E5400/X5482 Series
The Quad-Core Intel® Xeon® Processor E5400 Series is designed to go into various
form factors, including the volumetrically constrained 1U and custom blade form
factors. The Quad-Core Intel® Xeon® Processor X5482 is designed to go into
volumetrically unconstrained workstation platforms only. Intel has developed single
thermal profile for E5400/X5482 Series.
Designing to the Thermal Profile ensures that no measurable performance loss due to
Thermal Control Circuit (TCC) activation is observed in the processor. It is expected
that TCC would only be activated for very brief periods of time when running a worstcase real world application in a worst-case thermal condition. These brief instances of
TCC activation are not expected to impact the performance of the processor. A worst
case real world application is defined as a commercially available, useful application
which dissipates a power equal to, or above, the TDP for a thermally relevant
timeframe. One example of a worst-case thermal condition is when a processor local
ambient temperature is at or above 43.2°C for Quad-Core Intel® Xeon® Processor
E5400 Series Thermal Profile.
Thermal solutions that exceed the Thermal Profile specification are considered
incompliant and will adversely affect the long-term reliability of the processor.
Refer to the Quad-Core Intel® Xeon® Processor 5400 Series Datasheet or
Section 2.2.8 for the Quad-Core Intel® Xeon® Processor 5400 Series Thermal Profile
specifications. Section 2.5 andAppendix A of this document provide details on 1U Intel
reference thermal solutions that are designed to meet the Quad-Core Intel® Xeon®
Processor E5400 Series Thermal Profile.
2.2.8Performance Targets
The Thermal Profile specifications for this processor are published in the Quad-Core
Intel® Xeon® Processor 5400 Series Datasheet. These Thermal Profile specifications
are shown as a reference in the subsequent discussions.
28Quad-Core Intel® Xeon® Processor 5400 Series TMDG
Thermal/Mechanical Reference Design
Figure 2-11. Thermal Profile for the Quad-Core Intel® Xeon® Processor X5400 Series
Notes:
1.The The thermal specifications shown in this graph are for Quad-Core Intel® Xeon® Processor X5400
Series except the Quad-Core Intel® Xeon® Processor X5482 sku.
2.Refer to the Quad-Core Intel® Xeon® Processor 5400 Series Datasheet for the Thermal Profile
specifications. In case of conflict, the data information in the datasheet supersedes any data in this figure.
Quad-Core Intel® Xeon® Processor 5400 Series TMDG29
Thermal/Mechanical Reference Design
Figure 2-12. Thermal Profile for Quad-Core Intel® Xeon® Processor E5400 Series
Note: The thermal specifications shown in this graph are for reference only. Refer to the Quad-Core Intel®
Xeon® Processor 5400 Series Datasheet for the Thermal Profile specifications. In case of conflict, the
data information in the datasheet supersedes any data in this figure.
30Quad-Core Intel® Xeon® Processor 5400 Series TMDG
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