Intel 6300ESB ICH, Xeon User Manual

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Intel® Xeon™ Processor with 800 MHz System Bus, Intel® E7520 Chipset, and Intel® 6300ESB ICH Development Kit

User’s Manual

September 2004

Reference Number: 300281-003

Contents

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL® PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER, AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Intel products are not intended for use in medical, life saving, or life sustaining applications.

Intel may make changes to specifications and product descriptions at any time, without notice.

This User’s Manual as well as the software described in it is furnished under license and may only be used or copied in accordance with the terms of the license. The information in this manual is furnished for informational use only, is subject to change without notice, and should not be construed as a commitment by Intel Corporation. Intel Corporation assumes no responsibility or liability for any errors or inaccuracies that may appear in this document or any software that may be provided in association with this document.

Except as permitted by such license, no part of this document may be reproduced, stored in a retrieval system, or transmitted in any form or by any means without the express written consent of Intel Corporation.

Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.

Copies of documents which have an ordering number and are referenced in this document, or other Intel literature may be obtained by calling 1-800-548-4725 or by visiting Intel's website at http://www.intel.com.

AnyPoint, AppChoice, BoardWatch, BunnyPeople, CablePort, Celeron, Chips, CT Media, Dialogic, DM3, EtherExpress, ETOX, FlashFile, i386, i486, i960, iCOMP, InstantIP, Intel, Intel Centrino, Intel logo, Intel386, Intel486, Intel740, IntelDX2, IntelDX4, IntelSX2, Intel Create & Share, Intel GigaBlade, Intel InBusiness, Intel Inside, Intel Inside logo, Intel NetBurst, Intel NetMerge, Intel NetStructure, Intel Play, Intel Play logo, Intel SingleDriver, Intel SpeedStep, Intel StrataFlash, Intel TeamStation, Intel Xeon, Intel XScale, IPLink, Itanium, MCS, MMX, MMX logo, Optimizer logo, OverDrive, Paragon, PC Dads, PC Parents, PDCharm, Pentium, Pentium II Xeon, Pentium III Xeon, Performance at Your Command, RemoteExpress, SmartDie, Solutions960, Sound Mark, StorageExpress, The Computer Inside., The Journey Inside, TokenExpress, VoiceBrick, VTune, and Xircom are trademarks or registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.

*Other names and brands may be claimed as the property of others.

Copyright © 2004, Intel Corporation

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Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual

Contents

Contents

1

Product Overview ............................................................................................................................

7

 

1.1

Related Documents ..............................................................................................................

7

 

1.2

Product Contents ..................................................................................................................

7

 

1.3

Products Feature List............................................................................................................

8

 

1.4

Block Diagram ......................................................................................................................

9

 

 

1.4.1

Memory Subsystem ...............................................................................................

11

 

 

1.4.2 DIMM Placement DDR2 400..................................................................................

11

 

1.5

Memory Population Rules and Configurations ...................................................................

12

2

Platform Management ...................................................................................................................

13

 

2.1

Power Button ......................................................................................................................

13

 

2.2

Soft Off

................................................................................................................................

13

 

2.3

Sleep States ......................................................................................................Supported

13

 

 

2.3.1 .................................................................................................................

S0 State

13

 

 

2.3.2 .................................................................................................................

S1 State

14

 

 

2.3.3 .................................................................................................................

S2 State

14

 

 

2.3.4 .................................................................................................................

S3 State

14

 

 

2.3.5 .................................................................................................................

S4 State

14

 

 

2.3.6 .................................................................................................................

S5 State

15

 

 

2.3.7 ....................................................................................................

Wake - Up Events

15

 

 

2.3.8 ...............................................................................Wake-Up from S1 Sleep State

15

 

 

2.3.9 ...........................................................................Wake-Up from S4 and S5 States

15

 

2.4

PCI PM ..................................................................................................................Support

15

 

2.5

Platform ........................................................................................................Management

15

 

 

2.5.1 ...........................................................................

Processor Thermal Management

16

 

2.6

System ........................................................................................................Fan Operation

16

3

Equipment Required .............................................................................................for CRB Usage

17

 

3.1

Precautions.........................................................................................................................

17

 

3.2

Driver and ..............................................................................................OS Requirements

18

 

 

3.2.1 ..........................................................................................Drivers included on CD

18

4

Jumpers and Headers ...................................................................................................................

21

 

4.1

Jumpers ..............................................................................................................................

21

5

System Overview...........................................................................................................................

25

 

5.1

Power Diagrams .................................................................................................................

25

 

5.2

Platform ................................................................................................................Clocking

26

 

5.3

Platform ..................................................................................................................Resets

27

 

5.4

SMBus ................................................................................................................................

 

28

 

5.5

Platform ..........................................................................................................IRQ Routing

29

 

5.6

VRD VID ...............................................................................................................Headers

30

 

5.7

Miscellaneous ........................................................................................................Buttons

32

6

Debug Procedure ..........................................................................................................................

33

 

6.1

Level 1 ............................................................................................Debug (Port 80/BIOS)

33

 

6.2

Level 2 ......................................................................................Debug (Power Sequence)

34

Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual

3

Contents

 

 

 

6.3

Level 3 Debug (Voltage References)..................................................................................

34

7

Heatsink Assembly........................................................................................................................

35

 

7.1

Processor Heat Sink Installation Instructions .....................................................................

36

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Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual

Contents

Figures

 

1

Intel® Xeon™ Processor with 800 MHz System Bus and Intel® E7520 and Intel®

 

 

6300ESB Customer Reference Board Block Diagram .................................................................

9

2

Placement - Top View.................................................................................................................

10

3

DDR2 400 Memory - DIMM Ordering .........................................................................................

12

4

Intel® Xeon™ Processor with 800 MHz System Bus and Intel® E7520 and Intel®

 

 

6300ESB Customer Reference Board Jumper...........................................................................

21

5

Power Distribution Block Diagram ..............................................................................................

25

6

Clock Block Diagram ..................................................................................................................

26

7

Platform Reset Diagram .............................................................................................................

27

8

SMBus Block Diagram................................................................................................................

28

9

IRQ Routing Diagram .................................................................................................................

29

10

Power Buttons ............................................................................................................................

32

11

Components Requiring Heat Sink Assembly..............................................................................

35

12

Inserting Processor in Socket .....................................................................................................

36

13

Cleaning the Processor Surface .................................................................................................

36

14

Installing the Processor Backplate..............................................................................................

37

15

Removing the Protective Covers ................................................................................................

37

16

Installing the Heatsink.................................................................................................................

38

Tables

 

1

Related Documents ......................................................................................................................

7

2

Supported DIMM Module Types .................................................................................................

11

3

DIMM Placement DDR2 400 ......................................................................................................

11

4

Jumper Settings..........................................................................................................................

22

5

Processor VRD Settings .............................................................................................................

30

6

Level 1 Debug (Port 80/BIOS) ....................................................................................................

33

7

Level 2 Debug (Power Sequence)..............................................................................................

34

8

Level 3 Debug (Voltage References)..........................................................................................

34

9

Components Requiring Heat Sink Assembly..............................................................................

35

Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual

5

Contents

Revision History

Date

Revision

Description

 

 

 

August 2004

003

Changed figures that referenced PCI-X to PCI-X 133 MHz;

changed jumpers on Figure 4; made other miscellaneous

 

 

 

 

changes.

 

 

 

July 2004

002

Changed code names to public names; clarified illustrations.

 

 

 

December 2003

001

Initial release of this document.

 

 

 

6

Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual

 

Product Overview

Product Overview

1

 

 

 

 

The Intel® Xeon™ Processor with 800 MHz System Bus, Intel® E7520 Chipset, and Intel® 6300ESB ICH Development Kit comprise an IA-32 based dual-processor platform. This platform serves as a reference for OEMs development platform. This and other development kits from Intel provide a fully working product with range of performance options which can be modified or used immediately for product development.

1.1Related Documents

Table 1. Related Documents

Document/Reference Title

Source/Document Number

Intel® E7520 Memory Controller Hub (MCH) Datasheet

Intel® E7520 Memory Controller Hub (MCH) Specification Update

Intel® Xeon™ Processor with 800 MHz System Bus Datasheet

Intel 6300ESB I/O Controller Datasheet

Contact your Intel Sales

Representative for access

Intel® Xeon™ Processor Debug Port Design Guide

Extended Debug Port Design Guide: for UP and DP platforms

Schematics file

Visit http://www.intel.com/platforms/applied/eiacomm/reference_configs.htm for latest updates.

1.2Product Contents

The Reference Board is shipped with the following components and features:

Two Intel® Xeon™ processors (2.8 GHz and 3.2 GHz) capable of 800 MT/s

One 550 W SSI EPS12V power supply

Two Heat sinks for the two processors

Two pieces of DDR2 400 [256 Mbytes]

Blank Hard drive

CD with necessary drivers

Red Hat 8.0 Compatible Driver Package Contents

Red-Hat Advanced Server 2.1 Compatible Driver Package Contents

Windows* Compatible Driver Package Contents

ATI Rage* Mobility-M Graphics Accelerator

Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual

7

Product Overview

1.3Products Feature List

Processor Support

Dual Intel® Xeon™ Processors

On-board processor voltage regulators compatible with VRM/EVRD 10.1 Design Guide

Clocking

CK409B clock synthesizer that generates all host clock and the PCI Express* interface clock for the MCH PHY Layer

DB800 generates the PCI Express differential pair clocks to the onboard PCI Express components and the dedicated PCI Express slots

Memory Support

Registered, ECC, DDR2 400

Each of the two memory channels on the Intel® E7520 in this CRB supports a maximum of two DDR2 400 DIMMs per channel

The maximum supported DDR2 400 memory configuration is 8 Gbyte using different combinations of single and dual ranked, x4, 1 Gbyte technology DIMMs (limit of up to four ranks per channel)

3.2 Gbytes/s bus per channel bandwidth with DDR2 400

I/O slot support

One PCI-X 133 MHz slot from PXH

Two PCI-X 100 MHz slots from PXH

One PCI Express x8 slot

One PCI Express x4 slot

One 5 V PCI-32/33 slot connected through the Intel® 6300ESB I/O Controller

Two 3.3 V PCI-X 64/66 slots connected through the Intel® 6300ESB I/O Controller

Low Pin Count Bus

National* LPC 47M172 Super I/O residing on LPC bus

LPC card header for debug purposes only

Firmware hub

IDE ATA 100 support

Two ATA-100 IDE connectors supported

S-ATA support

Two S-ATA connectors

USB Support (Four Channels)

Two USB 2.0 connectors

Two USB 2.0 headers

Back Panel I/O

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Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual

Product Overview

Two RS-232 serial ports from the Intel® 6300ESB I/O Controller

Two PS/2 connectors for mouse and keyboard

On-board VGA Video, ATI Rage Mobility* video controller

Parallel port

Dual Watchdog Timer

Miscellaneous

National LM93* for fan control and temperature/voltage monitoring

Refer to Figure 1 for complete detailed features of the Intel® Xeon™ Processor with 800 MHz system bus and Intel® E7520 and Intel® 6300ESB Customer Reference Board (CRB).

1.4Block Diagram

Figure 1. Intel® Xeon™ Processor with 800 MHz System Bus and Intel® E7520 and Intel® 6300ESB Customer Reference Board Block Diagram

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ITP

 

 

 

 

 

Intel®

 

 

 

Intel®

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCI-X

 

 

 

 

 

 

 

 

 

 

Xeon

 

 

 

Xeon

 

 

 

 

 

 

 

 

 

 

 

133 MHz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PXH

 

 

 

 

PCI-E

 

 

 

 

 

 

 

 

 

 

DDR2 400

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Intel®

 

 

 

 

PCI-X 100MHz

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

E7520

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCI-E

 

MCH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

DDR266400

 

 

 

 

 

 

 

 

 

 

 

PCI-E x4

 

 

 

 

PCI-E x8

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

CK409B

 

 

 

DB800

 

 

 

HI 1.5

 

 

LM 93

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCI-X 66MHz

 

 

 

 

 

PCI-X

 

 

 

 

 

 

 

 

 

 

 

IDE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Intel®

 

 

 

 

 

IDE

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCI

 

6300ESB

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PCI 33MHz

 

 

 

 

 

 

 

 

S-ATA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

ICH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

VGA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

S-ATA

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

UART 1

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

UART 2

 

 

 

 

 

 

 

 

 

 

USB 2.0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

USB 2.0

 

 

 

 

 

 

 

 

 

 

 

 

 

Floppy

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

USB 2.0

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

SIO

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

USB 2.0

 

 

 

 

 

 

 

 

 

 

 

 

 

Parallel

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

FWH

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

PS2

 

 

 

 

 

 

 

 

 

 

 

 

 

 

LPC Debug

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

UART 3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual

9

Product Overview

Figure 2. Placement - Top View

#

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1& ' 1 &0

 

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6300ESB I/O Controller

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10 Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual

Product Overview

1.4.1Memory Subsystem

The memory subsystem is designed to support Double Data Rate2(DDR2) Synchronous Dynamic Random Access Memory (SDRAM) using the Intel(R) E7520 MCH. The MCH provides two independent DDR channels, which support DDR2 400 DIMMs. The peak bandwidth of each DDR2 branch channel is 3.2 Gbyte/s (8 bytes x 400 MT/s) with DDR2 400. The two DDR2 channels from the MCH operate in lock step; the effective overall peak bandwidth of the DDR2 memory subsystem is 6.4 Gbyte/s for DDR2 400.

Table 2 shows all DIMM technology supported by the CRB. Other DIMM types are not supported.

Table 2.

Supported DIMM Module Types

 

 

 

 

 

 

Technology

Organization

SDRAM Chips/DIMM

 

 

 

 

 

256 Mbit

8 Mbytes x 8 x 4 banks

8

 

 

 

 

16 Mbytes x 4 x 4 banks

16

 

 

 

 

 

 

 

512 Mbit

16 Mbytes x 8 x 4 banks

8

 

 

 

 

32 Mbytes x 4 x 4 banks

16

 

 

 

 

 

 

 

1 Gbit

32 Mbytes x 8 x 4 banks

8

 

 

 

 

64 Mbytes x 4 x 4 banks

16

 

 

 

 

 

 

1.4.2DIMM Placement DDR2 400

Table 3.

DIMM Placement DDR2 400

 

 

 

 

 

 

 

DIMM Configuration

DIMM1

DIMM2

 

 

 

 

 

1 Single Rank

Empty

Single Rank

 

 

 

 

 

1 Dual Rank

Empty

Dual Rank

 

 

 

 

 

2 Single Rank

Single Rank

Single Rank

 

 

 

 

 

1 Dual Rank, 1 Single Rank

Single Rank

Dual Rank

 

 

 

 

 

2 Dual Rank

Dual Rank

Dual Rank

 

 

 

 

 

NOTES:

 

 

1.Populate DIMMs starting with the sockets farthest away from the MCH (DIMM slots A2 and B2).

2.When populating both channels, always place identical DIMMs in sockets that have the same position on channel A and channel B (i.e., DIMM A2 should be identical to DIMM B2).

Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual

11

Product Overview

1.5Memory Population Rules and Configurations

The system supports two DDR2 400 DIMM slots for Channel A and two DDR2 400 DIMM slots for Channel B. The four slots are interleaved and placed in a row in the following order: A1, B1, A2, B2, with A1 being closest to the MCH. This design supports only registered ECC-enabled DIMMs.

When populating both channels, always place identical DIMMs in sockets that have the same position on Channel A and Channel B (i.e., DIMM A2 should be identical to DIMM B2).

In addition, single-rank DIMMs should be populated furthest when a combination of single-rank and double-rank DIMMs are used. This recommendation is based on the signal integrity requirements of the DDR2 interface.

Figure 3. DDR2 400 Memory - DIMM Ordering

+

+ +

DIMM A1

DIMM B1

DIMM A2

DIMM B2

MCH

12 Intel® Xeon™ Processor, Intel® E7520 Chipset, Intel® 6300ESB ICH Development Kit User’s Manual

+ 26 hidden pages