How it Works
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ProBook 440
QuickSpecs
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Schematics
41 pgs2.6 Mb0
Schematics
65 pgs1.47 Mb0
Maintenance and Service Guide
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Specification
49 pgs1.02 Mb0
User Manual
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User Manual
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HP PROBOOK 440 Schematics

5
www.schematic-x.blogspot.com
4
3
2
1
Royal 13"/Riata 14" SkyLake -U (UMA/DIS) Schematics
D D
DDR3L 1600DDR3L 1600MHz
16GB
PAGE 16
eDP X 4
HD and FHD
eDP
PAGE 26
01
SkyLake U
gDDR3
SATA3/PCIeprimary HDD
LPC Interface
SPI Interface
System BIOS SPI ROM 16MB
SPI Interface
DDR3L 1600DDR3L 1600MHz
24MHz
32.768KHz
PAGE 44
Processor
Processor : Daul Core Power : 15 (Watt)
SKL PCH-LP
Package : BGA1356
Size : 40 X 24 (mm)
Ball pitch:0.65mm
PAGE 2~14
4
GT2
DP
DP
USB2.0 Interface
PCIE Gen 1 x 1 Lane
SATA0 6GB/s
HD Audio
PS8201
PAGE 28
DP to VGA
RTD2168
USB2.0 Interface
USB3.0 Interface
PAGE 37NGFF
WLAN Combo
10/100/1000 NIC
Realtek RTL8111HSH
PAGE 32
PCIE *4
Conexant
CX7501
PAGE 30
3
Display Port
HDMI
Display Port
PAGE 27
VGA
SIM Card
PAGE 39
NGFF
WWAN Combo
PAGE 38
Camera
Port 26
NGFF SSD
Package : 22*80 (mm)
Power :
PAGE 38
Digital MIC
S
Combo Jack
PAGE 31
PAGE 26
RJ45
PAGE 52
peaker
PAGE 29
PAGE 27
Touch Screen
PAGE 26
Fingerprint
VFS495
Port 4
PAGE 26
PAGE 30
2
PAGE 24
USB 2.0 standard port
for external ODD support
PAGE 31
USB 3.0 standard port
PAGE 35
USB 3.0 standard port
PAGE 35
NB5
NB5
NB5
PCB 6L STACK UP(1.2mm)
PROJECT:400 Series
PROJECT:400 Series
PROJECT:400 Series
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
Block Diagram
Block Diagram
Block Diagram
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1 65Monday, November 30, 2015
1 65Monday, November 30, 2015
1 65Monday, November 30, 2015
1A
1A
1A
16GB
PAGE 17
DIS only for Riata 14"
gDDR3
C C
1GB/2GB
gDDR3
1GB/2GB
gDDR3
1GB/2GB
1GB/2GB
4 pcs of x16 PAGE 23
64bit
Graphics Controller
AMD Meso 64-bit DDR3 M/B down dGPU S3 Package 18W TDP
B B
Keyboard
Battery
PAGE 40
PAGE 49
FAN PAGE 42
Function Conn. PAGE 33
A A
5
PAGE 18~22
2.5" / 7, 9.5mm
PAGE 43
KBC Nuvoton
NPCE586HA0MX
Embedded Controller
PAGE 45~46
128TQFP
TPM Infineon
XDP and APS
PAGE 34SLB9670 TT1.2
PAGE 15
5
4
3
2
1
02
D D
?
4 OF 20
Need apply PN
JTAG
PROC_TCK
PROC_TDI PROC_TDO PROC_TMS
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS
PCH_TRST#
JTAGX
PDC
?
H_TCK
B61
H_TDI
D60
H_TDO
A61
XDP_TMS_CPU
C60
XDP_TRST#_CPU
B59
PCH_TCK
B56
PCH_TDI
D59
PCH_TDO
A56
PCH_TMS
C59
H_TRST#
C61 A59
SI change,support DCI
JTAGX_PCH
TP39
R772 *0_4/S
H_TCK [15] H_TDI [15] H_TDO [15] H_TMS [15] H_TRST# [2,15]
PCH_TCK [15]
PCH_TDI [15]
PCH_TDO [15]
PCH_TMS [15]
H_TRST# [2,15]
07/01 for EE shortpad
TP36
THERM_SCI# OCP_OC# KBL_DET# GPS_XMIT_OFF#
R50449.9/F_4
CATERR#
CPU_PROCHOT#_R
PM_THRMTRIP#
PROC_POPIRCOMP PCH_OPI_RCOMP EDRAM_OPIO_RCOMP EOPIO_RCOMP
+VCCSFR
XDP_BPM0[15] XDP_BPM1[15]
THERM_SCI#[42]PROCHOT_KBC[45]
OCP_OC#[46]
KBL_DET#[40]
GPS_XMIT_OFF#[38]
+VCCSFR
EC_PECI[45]
EC_PECI
R514 1K/F_4
R234 49.9/F_4 R231 49.9/F_4 R561 49.9/F_4 R101 49.9/F_4
H_PROCHOT#
R490 499/F_4
3
Q1 2N7002K
2
1
C26 47P/50V_4
CPU_PROCHOT#[49,55,62]
PROCHOT_KBC
R27
*100K_4
R485 1K/F_4
+1.0V_STG
C C
D63
CATERR#
A54
PECI
C65
PROCHOT#
C63
THERMTRIP#
A65
SKTOCC#
C55
BPM#[0]
D55
BPM#[1]
B54
BPM#[2]
C56
BPM#[3]
A6
GPP_E3/CPU_GP0
A7
GPP_E7/CPU_GP1
BA5
GPP_B3/CPU_GP2
AY5
GPP_B4/CPU_GP3
AT16
PROC_POPIRCOMP
AU16
PCH_OPIRCOMP
H66
OPCE_RCOMP
H65
OPC_RCOMP
U25D
*SKL_ULT
REV = 1
CPU MISC
SKL_ULT
07/01 PVR change GPIO for WWAN TS
OCP_OC# THERM_SCI# KBL_DET# GPS_XMIT_OFF#
OCP_OC#
R524 10K_4 R500 10K/F_4 R287 200K_4 R334 10K_4
07/16 for EE shortpad
+3V
Rc
R779 *100K/F_4
R
d
Processor pull-up (CPU)
+1.0V_STG
B B
H_TMS H_TDI H_TDO
DB1 change, follow Caesar
H_TCK PCH_TCK
DB1 change, follow Caesar
R56 *51_4 R44 *51_4 R505 51_4
R515 51_4
R517 *51_4
PCH_TDO PCH_TMS PCH_TDI
R47 51_4 R516 51_4 R506 51_4
+1.0V_STG
A A
PROJECT:400 Series
PROJECT:400 Series
PROJECT:400 Series
Quanta Computer Inc.
Quanta Computer Inc.
+1.0V_STG [11,13] +VCCSFR [3,9,11,13,45] +3V [3,4,5,7,8,9,10,15,16,17,24,26,27,28,30,31,32,33,34,36,38,42,44,45,49,55,57,63]
5
NB5
NB5
4
3
2
NB5
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
02 -- SKYLAKE 2/20(MISC/ JTAG)
02 -- SKYLAKE 2/20(MISC/ JTAG)
02 -- SKYLAKE 2/20(MISC/ JTAG)
Date: Sheet of
Date: Sheet of
Date: Sheet
1
of
2 65Monday, November 30, 2015
2 65Monday, November 30, 2015
2 65Monday, November 30, 2015
1A
1A
1A
5
C678 15P/50V_4
PCH_SPI1_CLK[34,45,47] PCH_SPI1_SO[34,45,47]
WWAN_CONFIG_1[38] WWAN_CONFIG_2[38]
VCCIO_PG[53,63]
PVCORE_PG[55]
PCH_SPI1_SI[15,34,45,47] PCH_SPI_IO2[15,47] PCH_SPI_IO3[47] PCH_SPI_CS0#[45,47]
SPI_TPM_CS#[34]
LANLINK_STATUS[32]
PCI_3S_SERIRQ[45]
MC74VHC1G08DFT2G
TP66
+VCC_ESPI_LPC
U1
2 1
D D
C C
10/28 for EMI reserved
R218 33_4 R610 33_4
R611 33_4 R609 33_4
R607 33_4
07/16 for EE shortpad 09/08 remove shortpad
ISO_PREP# WWAN_CONFIG_1 WWAN_CONFIG_2 LANLINK_STATUS
PCH_SPI_IO3_L
+3V
3 5
R552 10K_4
R288 100K_4
R608 1K/F_4
4
PCH_SPI1_CLK_L PCH_SPI1_SO PCH_SPI1_SI_L PCH_SPI_IO2_L PCH_SPI_IO3_L PCH_SPI_CS0#
SPI_TPM_CS#_L
PCH_PWROK
GPP_A0
R2 20K/F_4
AW3 AW2
AW13
AY11
AV2 AV3 AU4
AU3 AU2 AU1
M2 M3
J4 V1 V2
M1
G3 G2 G1
U25E
SPI0_CLK SPI0_MISO SPI0_MOSI SPI0_IO2 SPI0_IO3 SPI0_CS0# SPI0_CS1# SPI0_CS2#
GPP_D1/SPI1_CLK GPP_D2/SPI1_MISO GPP_D3/SPI1_MOSI GPP_D21/SPI1_IO2 GPP_D22/SPI1_IO3 GPP_D0/SPI1_CS#
CL_CLK CL_DATA CL_RST#
GPP_A0/RCIN# GPP_A6/SERIRQ
*SKL_ULT
REV = 1
07/01 for EE shortpad
PLTRST#[4,8,18,34]
XDP_DBRESET#[15,44]
B B
DB1 change, follow Caesar
RSMRST#[15,46]
07/01 for EE shortpad
PM_PWROK[46]
SUSWARN#[45]
PCH_WAKE#[32,37,38,45]
PLTRST# XDP_DBRESET#
H_VCCST_PWRGD PM_PWROK
PCH_PWROK
R789 *0_4/S
10/13 for EE shortpad
R243 100K/F_4
A A
PV, 0422 change to 4.7K
+3V_DEEP_SUS
R38 4.7K/F_4
5
DPWROK_R
Q7A 2N7002KDW
5 2
6 1
2N7002KDW Q7B
+VCCSFR
34
PWR_GOOD_3
R52 1K/F_4
H_VCCST_PWRGD
PWR_GOOD_3 [15,46,48,63]
4
SPI - FLASH
SPI - TOUCH
C LINK
DDR/DRAM/GPU/XDP
Ri
R613 *0_4/S
RSMRST#
R267 *0_4/S
DPWROK_R
H_PWRGD
R491 60.4/F_4
SUSWARN#
R266*0_4
SUSACK#
PCH_WAKE#_R
INTLWAKE#
4
PLTRST#
R489 *10K_4
?
SKL_ULT
LPC
PDC
5 OF 20
PCH_SMBCLK[15,16,17,27]
PCH_SMBDATA[15,16,17,27]
U25K
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRGD
B65
VCCST_PWRGD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PWROK
AR13
GPP_A13/SUSWARN#/SUSPWRDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_WAKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/RSVD
*SKL_ULT
REV = 1
Need apply PN
SMBUS, SMLINK
GPP_A14/SUS_STAT#/ESPI_RESET#
R347 *0_4
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_B23/SML1ALERT#/PCHHOT#
GPP_A1/LAD0/ESPI_IO0 GPP_A2/LAD1/ESPI_IO1 GPP_A3/LAD2/ESPI_IO2 GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#
R63 2.2K_4
+3V
R74 2.2K_4
+3V
?
SKL_ULT
SYSTEM POWER MANAGEMENT
11 OF 20
+3V
C280
0.1U/10V/X7R_4
U13
2 1
3 5
MC74VHC1G08DFT2G
PCI_PLTRST#
4
3
PCH_SMB_CLK
R7
PCH_SMB_DATA
R8
TLS_ENCRYPTION
R10
SMB_ME0_CLK
R9
SMB_ME0_DAT
W2 W1
SMB_PCH_CLK
W3
SMB_PCH_DAT
V3 AM7
AY13 BA13 BB13 AY12 BA12
ESPI_RESET#
BA11
CLK_PCI_EC_R
AW9
CLK_PCI_LPC_R
AY9 AW11
CLKRUN#
?
Q11
4 3
1
2N7002DW
Need apply PN
GPP_B12/SLP_S0#
GPD9/SLP_WLAN#
GPD1/ACPRESENT
GPP_B11/EXT_PWR_GATE#
GPP_B2/VRALERT#
R348 20K/F_4
3
ESPI_LPC#
R203 *0_4/S
LAD0_L
R620 15_4
LAD1_L
R621 15_4
LAD2_L
R633 15_4
LAD3_L
R634 15_4
LFRAME#_L
R679 *0_4/S
R636 *0_4/S
Rf
CLKRUN# [45]
+3V
5
2 6
AT11
GPD4/SLP_S3# GPD5/SLP_S4#
GPD10/SLP_S5#
GPD3/PWRBTN# GPD0/BATLOW#
GPP_A11/PME#
AP15 BA16 AY16
AN15
SLP_SUS#
AW15
SLP_LAN#
BB17 AN16
GPD6/SLP_A#
BA15 AY15 AU13
AU11 AP16
INTRUDER#
AM10 AM11
?
PCI_PLTRST# [15,31,32,34,37,38,45,46]
DB1 change, follow Caesar
2
SMB_PCH_CLK [45] SMB_PCH_DAT [45]
ESPI_LPC# [44]
TPM_PIRQ# [34]
7/01 for EE shortpad
0
LAD0 [44,45] LAD1 [44,45] LAD2 [44,45] LAD3 [44,45]
LFRAME# [37,44,45]
LPC_ESPI_RESET# [4,44,45]
07/16 for EE shortpad
R624 22/F_4 R640 *22/F_4
C234
15P/50V_4
EC
Ra
b
R Rc
LPC_ESPI_CLK [37,44,45]
TP71
10
C670 15P/50V_4
Rd
02/03 for DB1 to SI
/28 for EMI reserved
LPC & ESPI TABLE
LPC MODE ESPI MODE
R620
PCH_SMB_CLK
PCH_SMB_DATA
SLP_SUS#
SLP_LAN#_C
SLP_WLAN_PCH#
SLP_A#
GPP_A11 SM_INTRUDER#
EXT_PWR_GATE#
GPP_B2
VRPPM_SLP_S0_N
R211 *0_4/S
R259 *0_4 R32 *0_4/S
PWR_BTN_OUT# ADP_PRES_OUT BATLOW#
EXT_PWR_GATE# [48,57]
Ra
R621
Rb
R633
Rc
R634
Rd
R289
Re
R636
Rf
R61
Rg
R67
Rh
R613
Ri
R183
Rj
VRPPM_SLP_S0_N [15,44,57] SLP_S3#_3R [15,44,46,57,63] SLP_S4#_3R [15,31,35,44,48,51,57]
SLP_S5#_3R [15,44]
PCH_SLP_SUS#
SLP_LAN# [45]
07/01 for EE shortpad
TP68
PM_SLP_A# [15,44,45,63]
PWR_BTN_OUT# [46]
ADP_PRES_OUT [19,45]
BATLOW# [45,46]
R3251M_4
+3V_RTC
SM_INTRUDER# [38]
UNINSTAL INSTAL UNINSTAL INSTAL INSTAL UNINSTAL INSTAL UNINSTAL
INSTAL UNINSTAL
07/01 for EE shortpad
PCH_SLP_SUS# [46]
07/01 for EE shortpad
SLP_S4#_3R SLP_S4#_KBC
R272 *0_4/S
SLP_S4#_KBC [46]
System PWR_OK(CLG)
R510 *0_4
+3V_DEEP_SUS [4,5,6,8,10,15,37,44,45,47,53,54,57,63] +3VPCU [10,15,26,33,37,38,40,41,42,44,45,46,48,49,50,51,53,54,57,60,62,63] +3V [2,4,5,7,8,9,10,15,16,17,24,26,27,28,30,31,32,33,34,36,38,42,44,45,49,55,57,63] +VCCSFR [2,9,11,13,45] +3V_RTC [9,10,38,45]
PM_PWROKPCH_PWROK
2
SMB_PCH_CLK SMB_PCH_DAT
SMB_ME0_CLK SMB_ME0_DAT
PCH_SMB_CLK PCH_SMB_DATA
LANLINK_STATUS
ISO_PREP#
15Ω
15Ω 15Ω 15Ω
INSTAL
TLS_ENCRYPTION WWAN_CONFIG_1 WWAN_CONFIG_2
CLKRUN#
ESPI_LPC# ESPI_RESET#
PCI_3S_SERIRQ GPP_A11 SUSWARN#
R137 1K/F_4
R292 *100K/F_4
R298 *10K_4
R61 10K_4 R67 *10K_4 R623 100K_4
15Ω 15Ω 15Ω 15Ω UNINSTAL
PCH Pull-high/low(CLG)
BATLOW# ADP_PRES_OUT
INTLWAKE# PCH_WAKE# PCH_WAKE#_R
SUSACK# GPP_B2
For DS3 Sequence
For DS3 -->Ra Non-DS3 -->Rb
DPWROK[46,63]
07/16 for EE shortpad
Size Document Number Rev
Size Document Number Rev
Size Document Number Re Custom
Custom
Custom
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
+3V_DEEP_SUS
R5732.2K_4 R5692.2K_4
R142499/F_4 R574499/F_4
R682.2K_4 R622.2K_4
R551 10K_4
R548 10K_4
R568 10K_4 R565 10K_4
+VCC_ESPI_LPC
R622 10K_4
R638 *8.2K/F_4 R637 *10K_4
+3V_DEEP_SUS
Rg
Rh
b
R
Ra
+3VPCU
+3V_DEEP_SUS
R268*0_4
1
R140 10K_4 R157 100K/F_4 R799 10K/F_4 R800 10K/F_4 R151 *100K/F_4
R286 *100K/F_4
R200 *100K/F_4
RSMRST#
DPWROK
R293 *0_4/S
PROJECT:400 Series
PROJECT:400 Series
PROJECT:400 Series
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
03 -- SKYLAKE (SPI/LPC/SMB/PM)
03 -- SKYLAKE (SPI/LPC/SMB/PM)
03 -- SKYLAKE (SPI/LPC/SMB/PM)
03
PV, 0507 modify
DPWROK_R
3 65Monday, November 30, 2015
3 65Monday, November 30, 2015
3 65Monday, November 30, 2015
v
1A
1A
1A
5
4
3
2
1
Skylake (GPIO)
?
U25F
NFC_DWL_REQ
TP26
CR_RST#[31]
D D
HDD_HALTLED[31]
LPC_ESPI_RESET#[3,44,45]
CAMERA_ON[26] NMI_SMI_DBG#[44,46]
UART0_RXD[44] UART0_TXD[44] FPR_LOCK#[24]
TP19
FPR_OFF[24]
ACCEL_INT[36]
FPR_OFF HDD_HALTLED ACCEL_INT
TP13 TP14
R289 *0_4
TP15
GPP_B16 CR_RST# NFC_FW_RESET
CAMERA_ON NMI_SMI_DBG# NFC_HOST_INT BOOT_SPI#
UART0_RXD UART0_TXD
FPR_LOCK#
UART0_CTS#
R167 1K/F_4
RUNSCI_EC#
GPP_C16 GPP_C17
LPCRST# GPP_C19
Re
GPP_F8
C C
B B
TP20
GPP_F9
AH10 AH11
AH12 AF11
AF12
PLTRST#[3,8,18,34]
AN8 AP7 AP8 AR7
AM5 AN7 AP5 AN5
AB1 AB2
W4
AB3 AD1
AD2 AD3 AD4
U7 U6
U8 U9
AH9
LPSS ISH
GPP_B15/GSPI0_CS# GPP_B16/GSPI0_CLK GPP_B17/GSPI0_MISO GPP_B18/GSPI0_MOSI
GPP_B19/GSPI1_CS# GPP_B20/GSPI1_CLK GPP_B21/GSPI1_MISO GPP_B22/GSPI1_MOSI
GPP_C8/UART0_RXD GPP_C9/UART0_TXD GPP_C10/UART0_RTS# GPP_C11/UART0_CTS#
GPP_C20/UART2_RXD GPP_C21/UART2_TXD GPP_C22/UART2_RTS# GPP_C23/UART2_CTS#
GPP_C16/I2C0_SDA GPP_C17/I2C0_SCL
GPP_C18/I2C1_SDA GPP_C19/I2C1_SCL
GPP_F4/I2C2_SDA GPP_F5/I2C2_SCL
GPP_F6/I2C3_SDA GPP_F7/I2C3_SCL
GPP_F8/I2C4_SDA GPP_F9/I2C4_SCL
*SKL_ULT
REV = 1
PLTRST#
RUNSCI_EC#_R[45]
SKL_ULT
Ra Rb
R204 *0_4
GPP_D13/ISH_UART0_RXD/SML0BDATA/I2C4B_SDA
GPP_D14/ISH_UART0_TXD/SML0BCLK/I2C4B_SCL
6 OF 20
R199 *0_4
Need apply PN
GPP_D9 GPP_D10 GPP_D11 GPP_D12
GPP_D5/ISH_I2C0_SDA GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA GPP_D8/ISH_I2C1_SCL
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D15/ISH_UART0_RTS#
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD GPP_C14/UART1_RTS#/ISH_UART1_RTS# GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_A18/ISH_GP0 GPP_A19/ISH_GP1 GPP_A20/ISH_GP2 GPP_A21/ISH_GP3 GPP_A22/ISH_GP4 GPP_A23/ISH_GP5
GPP_A12/BM_BUSY#/ISH_GP6
RUNSCI_EC#
R206 R207
WWAN_TRANSMIT_OFF#
?
P2 P3 P4 P1
M4 N3
N1 N2
AD11 AD12
U1 U2 U3 U4
AC1 AC2 AC3 AB4
AY8 BA8 BB7 BA7 AY7 AW7 AP13
GPP_D10
CR_PWREN# BT_OFF
GPP_F10 GPP_F11
GPP_D13 GPP_D14 MPHY_PWREN WWANSSD_M2
PCH_LAN_RST# PCH_WLAN_RST# PCH_SLP_S0IX# GPP_C15
GPP_A18 GPP_A19
ISH_GP6
TP51
TP18
R3040_4
WWAN_TRANSMIT_OFF# [33,38] CR_PWREN# [31]
BT_OFF [37]
TP55
MPHY_PWREN [57]
WWANSSD_M2 [38]
PCH_SLP_S0IX# [45]
TP60
SX_EXIT_HOLDOFF# [45]
PV-R, 0701 for NFC_DWL_REQ WWAN & TS TABLE
+3V_DEEP_SUS
NFC_DWL_REQ
Rc
R206 *100K_4
R207 100K_4
Rd
WAN & TS TABLE
W
WWAN MODE TS MODE
UNINSTALINSTAL
UNINSTAL
INSTAL
GPIO Pull-up/Pull-down(CLG)
11/05 for intel check list
R285 10K_4
BT_OFF WWAN_TRANSMIT_OFF# CR_PWREN# GPP_D13 WWANSSD_M2
PCH_LAN_RST# PCH_WLAN_RST# GPP_D14
RUNSCI_EC# CR_RST# FPR_OFF PCH_SLP_S0IX# NFC_FW_RESET CAMERA_ON NMI_SMI_DBG# MPHY_PWREN ACCEL_INT HDD_HALTLED
GPP_A18 GPP_A19
ISH_GP6
GPP_F8 GPP_F10
BOOT_SPI# NFC_HOST_INT
MPHY_PWREN
R555 *10K_4 R556 100K/F_4 R284 *10K_4 R563 100K/F_4 R566 10K_4
R583 100K/F_4 R582 100K/F_4
R560 100K/F_4
R183 *10K_4 R282 10K_4
R184 10K_4 R581 100K_4 R290 10K_4 R14 10K_4 R612 10K_4 R562 10K_4 R359 8.2K/F_4
R350 10K_4
R629 *100K/F_4 R625 *100K/F_4
R305 *100K/F_4
R191 *100K_4 R190 *100K_4
R202 10K_4
R201 10K_4 R480 *10K_4
04
+3V_DEEP_SUS
+3V
+VCC_ESPI_LPC
+1.8V
A A
+3V[2,3,5,7,8,9,10,15,16,17,24,26,27,28,30,31,32,33,34,36,38,42,44,45,49,55,57,63]
PROJECT:400 Series
PROJECT:400 Series
PROJECT:400 Series
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
04 -- SKYLAKE (GPIO)
04 -- SKYLAKE (GPIO)
NB5
NB5
5
4
3
2
NB5
04 -- SKYLAKE (GPIO)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1A
1A
1A
4 65Monday, November 30, 2015
4 65Monday, November 30, 2015
4 65Monday, November 30, 2015
5
RD_ID1 BRD_ID2 BRD_ID3 BRD_ID4
B GP
IO201
GPIO202 GPIO203 GPIO204 GPIO34 GPIO35 GPIO40GPIO14
GPIO15 GPIO34 GPIO35 GPIO40
BOARD REVISION
D D
GPIO76 GPIO77 GPIO78 GPIO79
DB0 DB1 DB2(DDR4)
0 0 0 0 0 0 0 1 0 0 1 0
AMD_FCH PPMT LPI-H LPT-LP
0 0 1 1
SI1 S
IB
SI2(DDR4)
0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1
PV1 PV-R PV2(DDR4)
1 0 0 0 1 0 0 1 1 0 1 0 1 10 1
MV1 MV2(DDR4)
1 1 0 0
111 0
111 0
1111
C C
IN_D2#[28] IN_D2[28] IN_D1#[28] IN_D1[28]
DPB_DDCDATA[28]
WLAN_LED_EN[33]
IN_D0#[28] IN_D0[28] IN_CLK#[28] IN_CLK[28]
DDI2_TX0_N[27] DDI2_TX0_P[27] DDI2_TX1_N[27] DDI2_TX1_P[27]
DPB_DDCCLK[28]
R97 24.9/F_4
HDMI eDP/LVDS
VGA
B B
eDP_COMPIO and ICOMPO signals should be shorted near balls and routed with typical impedance <25 mohms
+VCC_IO
4
IN_D2# IN_D2 IN_D1# IN_D1 IN_D0# IN_D0 IN_CLK# IN_CLK
DDI2_TX0_N DDI2_TX0_P DDI2_TX1_N DDI2_TX1_P
DPB_DDCCLK DPB_DDCDATA
DPC_DDCCLK DPC_DDCDATA
GPP_E22 WLAN_LED_EN
eDP_RCOMP
U25I
CSI-2
A36
CSI2_DN0
B36
CSI2_DP0
C38
CSI2_DN1
D38
CSI2_DP1
C36
CSI2_DN2
D36
CSI2_DP2
A38
CSI2_DN3
B38
CSI2_DP3
C31
CSI2_DN4
D31
CSI2_DP4
C33
CSI2_DN5
D33
CSI2_DP5
A31
CSI2_DN6
B31
CSI2_DP6
A33
CSI2_DN7
B33
CSI2_DP7
A29
CSI2_DN8
B29
CSI2_DP8
C28
CSI2_DN9
D28
CSI2_DP9
A27
CSI2_DN10
B27
CSI2_DP10
C27
CSI2_DN11
D27
CSI2_DP11
*SKL_ULT
U25A
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22/DDPD_CTRLCLK
N12
GPP_E23/DDPD_CTRLDATA
E52
EDP_RCOMP
*SKL_ULT
REV = 1
REV = 1
SKL_ULT
SKL_ULT
DDI
DISPLAY SIDEBANDS
?
GPP_F13/EMMC_DATA0 GPP_F14/EMMC_DATA1 GPP_F15/EMMC_DATA2 GPP_F16/EMMC_DATA3 GPP_F17/EMMC_DATA4 GPP_F18/EMMC_DATA5 GPP_F19/EMMC_DATA6 GPP_F20/EMMC_DATA7
PDC
9 OF 20
?
Need apply PN
1 OF 20
Need apply PN
CSI2_CLKN0 CSI2_CLKP0 CSI2_CLKN1 CSI2_CLKP1 CSI2_CLKN2 CSI2_CLKP2 CSI2_CLKN3 CSI2_CLKP3
CSI2_COMP
GPP_D4/FLASHTRIG
EMMC
GPP_F21/EMMC_RCLK
GPP_F22/EMMC_CLK
GPP_F12/EMMC_CMD
EMMC_RCOMP
?
EDP
EDP_DISP_UTIL
GPP_E13/DDPB_HPD0 GPP_E14/DDPC_HPD1 GPP_E15/DDPD_HPD2 GPP_E16/DDPE_HPD3
GPP_E17/EDP_HPD
3
C37 D37 C32 D32 C29 D29 B26 A26
E13 B7
AP2 AP1 AP3 AN3 AN1 AN2 AM4 AM1
AM2 AM3 AP4
AT1
EDP_TXN[0] EDP_TXP[0] EDP_TXN[1] EDP_TXP[1] EDP_TXN[2] EDP_TXP[2] EDP_TXN[3] EDP_TXP[3]
EDP_AUXN EDP_AUXP
DDI1_AUXN DDI1_AUXP DDI2_AUXN DDI2_AUXP DDI3_AUXN DDI3_AUXP
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
?
CR_WAKE#
BRD_ID2 BRD_ID3 BRD_ID4 PLT_ID1 PLT_ID2 PLT_ID3 SG_IN MD_ID1
MD_ID2 MD_ID3 BRD_ID1
C47 C46 D46 C45 A45 B45 A47 B47
E45 F45
B52 G50
F50 E48 F48 G46 F46
L9 L7 L6 N9 L10
R12 R11 U13
INT_eDP_TXN0 INT_eDP_TXP0 INT_eDP_TXN1 INT_eDP_TXP1
INT_eDP_AUXN INT_eDP_AUXP
EDP_DISP_UTIL
INT_DDI2_AUXN INT_DDI2_AUXP
HDMI_HPD_CON DDI_HPD_CON RTD3_WAKE# EXT_SMI# ULT_EDP_HPD
PCH_LVDS_BLON PCH_DPST_PWM PCH_DISP_ON
CR_WAKE# [31]
TP65 TP64
TP63
INT_eDP_TXN0 [26] INT_eDP_TXP0 [26] INT_eDP_TXN1 [26] INT_eDP_TXP1 [26]
INT_eDP_AUXN [26] INT_eDP_AUXP [26]
TP8
INT_DDI2_AUXN [27] INT_DDI2_AUXP [27]
HDMI_HPD_CON [28] DDI_HPD_CON [27]
EXT_SMI# [45] ULT_EDP_HPD [26]
PCH_LVDS_BLON [26]
PCH_DPST_PWM [26]
PCH_DISP_ON [26]
CABLE_SIZE_DET[26]
PLT_ID1
Ra Rb
0 0 0
2
CR_WAKE#
R605 *100K_4
+1.8V
R603 100K_4 R593 100K_4 R592 *100K_4
Ra
R589 *100K_4
+1.8V
R590 *100K_4
Rc
R591 100K_4
Re
+1.8V
CABLE_SIZE_DET
R588 10K_4
PLT_ID2 PLT_ID3
Rc Re Rd Rf
00 0
1 0 1 1
DB1 change, follow Caesar
DPB_DDCCLK DPB_DDCDATA DPC_DDCCLK DPC_DDCDATA
RTD3_WAKE# EXT_SMI# GPP_E22 WLAN_LED_EN
HDMI_HPD_CON DDI_HPD_CON
ULT_EDP_HPD
R525 10K_4
BRD_ID1 BRD_ID2 BRD_ID3 BRD_ID4
PLT_ID1 PLT_ID2 PLT_ID3
SG_IN
+3V
R604 100K_4 R602 *100K_4 R601 *100K_4 R600 100K_4
R597 100K_4 R598 100K_4 R599 *100K_4
R596 *10K_4
H L 13 14"0 1
15.6"
17.3"
R233 10K_4 R214 10K_4
+3V
R1292.2K_4 R1302.2K_4
R553100K_4 R119100K_4 R118100K_4
R136*100K/F_4
R217 *100K_4 R437 100K_4
R87 *10K_4
Rb Rd Rf
.3"
+3V_DEEP_SUS
+3V
1
05
SG_IN SG_IN
R596
UMA DIS
R588
R88 100K_4
A A
PROJECT:400 Series
PROJECT:400 Series
PROJECT:400 Series
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
05 -- SKYLAKE (eDP/DDI/Board ID)
05 -- SKYLAKE (eDP/DDI/Board ID)
NB5
NB5
5
4
3
2
NB5
05 -- SKYLAKE (eDP/DDI/Board ID)
Date: Sheet of
Date: Sheet of
Date: Sheet
1
1A
1A
1A
of
5 65Monday, November 30, 2015
5 65Monday, November 30, 2015
5 65Monday, November 30, 2015
5
M_A_DQ[63:0][16]
M_B_DQ[63:0][17] M_A_DQSN[7:0][16] M_A_DQSP[7:0][16] M_B_DQSN[7:0][17] M_B_DQSP[7:0][17]
?
D D
C C
B B
A A
M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63
5
U25B
AL71
DDR0_DQ[0]
AL68
DDR0_DQ[1]
AN68
DDR0_DQ[2]
AN69
DDR0_DQ[3]
AL70
DDR0_DQ[4]
AL69
DDR0_DQ[5]
AN70
DDR0_DQ[6]
AN71
DDR0_DQ[7]
AR70
DDR0_DQ[8]
AR68
DDR0_DQ[9]
AU71
DDR0_DQ[10]
AU68
DDR0_DQ[11]
AR71
DDR0_DQ[12]
AR69
DDR0_DQ[13]
AU70
DDR0_DQ[14]
AU69
DDR0_DQ[15]
BB65
DDR0_DQ[16]/DDR0_DQ[32]
AW65
DDR0_DQ[17]/DDR0_DQ[33]
AW63
DDR0_DQ[18]/DDR0_DQ[34]
AY63
DDR0_DQ[19]/DDR0_DQ[35]
BA65
DDR0_DQ[20]/DDR0_DQ[36]
AY65
DDR0_DQ[21]/DDR0_DQ[37]
BA63
DDR0_DQ[22]/DDR0_DQ[38]
BB63
DDR0_DQ[23]/DDR0_DQ[39]
BA61
DDR0_DQ[24]/DDR0_DQ[40]
AW61
DDR0_DQ[25]/DDR0_DQ[41]
BB59
DDR0_DQ[26]/DDR0_DQ[42]
AW59
DDR0_DQ[27]/DDR0_DQ[43]
BB61
DDR0_DQ[28]/DDR0_DQ[44]
AY61
DDR0_DQ[29]/DDR0_DQ[45]
BA59
DDR0_DQ[30]/DDR0_DQ[46]
AY59
DDR0_DQ[31]/DDR0_DQ[47]
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
*SKL_ULT
REV = 1
SKL_ULT
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[12] DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[11]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[13]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[10]
DDR CH - A
4
Need apply PN
DDR0_CKN[0] DDR0_CKP[0] DDR0_CKN[1] DDR0_CKP[1]
DDR0_CKE[0] DDR0_CKE[1] DDR0_CKE[2] DDR0_CKE[3]
DDR0_CS#[0] DDR0_CS#[1] DDR0_ODT[0]
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[5] DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[9] DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[6] DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[8] DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[7] DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT# DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0] DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[2] DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[1] DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[0]
DDR0_DQSN[2]/DDR0_DQSN[4] DDR0_DQSP[2]/DDR0_DQSP[4] DDR0_DQSN[3]/DDR0_DQSN[5] DDR0_DQSP[3]/DDR0_DQSP[5] DDR0_DQSN[4]/DDR1_DQSN[0] DDR0_DQSP[4]/DDR1_DQSP[0] DDR0_DQSN[5]/DDR1_DQSN[1] DDR0_DQSP[5]/DDR1_DQSP[1] DDR0_DQSN[6]/DDR1_DQSN[4] DDR0_DQSP[6]/DDR1_DQSP[4] DDR0_DQSN[7]/DDR1_DQSN[5] DDR0_DQSP[7]/DDR1_DQSP[5]
2 OF 20
11/28󶁪
DDR0_ODT[1]
DDR0_MA[3] DDR0_MA[4]
DDR0_DQSN[0] DDR0_DQSP[0] DDR0_DQSN[1] DDR0_DQSP[1]
DDR0_ALERT#
DDR0_PAR
DDR_VREF_CA DDR0_VREF_DQ DDR1_VREF_DQ
DDR_VTT_CNTL
󶁪Follow BELLAGIO_DB1
󶁪
󶁪
4
3
SkyLake ULT Processor (DDR4)
M_B_DQ0
AU53 AT53 AU55 AT55
BA56 BB56 AW56 AY56
AU45 AU43 AT45 AT43
BA51 BB54 BA52 AY52 AW52 AY55 AW54 BA54 BA55 AY54
AU46 AU48 AT46 AU50 AU52 AY51 AT48 AT50 BB50 AY50 BA50 BB52
AM70 AM69 AT69 AT70 BA64 AY64 AY60 BA60 BA38 AY38 AY34 BA34 BA30 AY30 AY26 BA26
AW50 AT52
AY67 AY68 BA67
AW67
?
DDR_PG_CNTL
M_A_CLKN0 [16] M_A_CLKP0 [16] M_A_CLKN1 [16] M_A_CLKP1 [16]
M_A_CKE0 [16] M_A_CKE1 [16]
M_A_CS#0 [16] M_A_CS#1 [16] M_A_ODT0 [16]
M_A_ALERT# M_A_PARITY
SM_VREF
20mils width
DDR_PG_CNTL
M_A_ODT1 [16]
R875 10K/F_4
M_A_A5 M_A_A9 M_A_A6 M_A_A8 M_A_A7 M_A_BG#0 M_A_A12 M_A_A11
M_A_A13
M_A_A2 M_A_A10
M_A_A1 M_A_A0 M_A_A3 M_A_A4
M_A_DQSN0 M_A_DQSP0 M_A_DQSN1 M_A_DQSP1 M_A_DQSN2 M_A_DQSP2 M_A_DQSN3 M_A_DQSP3 M_A_DQSN4 M_A_DQSP4 M_A_DQSN5 M_A_DQSP5 M_A_DQSN6 M_A_DQSP6 M_A_DQSN7 M_A_DQSP7
SMDDR_VREF_DQ0_M3 SMDDR_VREF_DQ1_M3
M_A_A5 [16] M_A_A9 [16] M_A_A6 [16] M_A_A8 [16] M_A_A7 [16]
M_A_BG#0 [16]
M_A_A12 [16] M_A_A11 [16]
M_A_ACT# [16]
M_A_BG#1 [16]
M_A_A13 [16]
M_A_CAS# [16]
M_A_WE# [16]
M_A_RAS# [16] M_A_BS#0 [16] M_A_A2 [16] M_A_BS#1 [16] M_A_A10 [16] M_A_A1 [16] M_A_A0 [16] M_A_A3 [16] M_A_A4 [16]
M_A_ALERT# [16] M_B_ALERT# [17] M_A_PARITY [16]
SM_VREF [16]
TP127
SMDDR_VREF_DQ1_M3 [17]
DDR_PG_CNTL
+3V_DEEP_SUS
R876 10K/F_4
2
Q66 PMST3904_SOT-323
1 3
R877 100K/F_4
3
M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63
AF65 AF64 AK65 AK64 AF66 AF67 AK67 AK66 AF70 AF68 AH71 AH68 AF71 AF69 AH70 AH69 AT66 AU66 AP65 AN65 AN66 AP66 AT65 AU65 AT61 AU61 AP60 AN60 AN61 AP61 AT60 AU60 AU40 AT40 AT37 AU37 AR40 AP40 AP37 AR37 AT33 AU33 AU30 AT30 AR33 AP33 AR30 AP30 AU27 AT27 AT25 AU25 AP27 AN27 AN25 AP25 AT22 AU22 AU21 AT21 AN22 AP22 AP21 AN21
+3V_DEEP_SUS
3
2
1
U25C
DDR1_DQ[0]/DDR0_DQ[16] DDR1_DQ[1]/DDR0_DQ[17] DDR1_DQ[2]/DDR0_DQ[18] DDR1_DQ[3]/DDR0_DQ[19] DDR1_DQ[4]/DDR0_DQ[20] DDR1_DQ[5]/DDR0_DQ[21] DDR1_DQ[6]/DDR0_DQ[22] DDR1_DQ[7]/DDR0_DQ[23] DDR1_DQ[8]/DDR0_DQ[24] DDR1_DQ[9]/DDR0_DQ[25] DDR1_DQ[10]/DDR0_DQ[26] DDR1_DQ[11]/DDR0_DQ[27] DDR1_DQ[12]/DDR0_DQ[28] DDR1_DQ[13]/DDR0_DQ[29] DDR1_DQ[14]/DDR0_DQ[30] DDR1_DQ[15]/DDR0_DQ[31] DDR1_DQ[16]/DDR0_DQ[48] DDR1_DQ[17]/DDR0_DQ[49] DDR1_DQ[18]/DDR0_DQ[50] DDR1_DQ[19]/DDR0_DQ[51] DDR1_DQ[20]/DDR0_DQ[52] DDR1_DQ[21]/DDR0_DQ[53] DDR1_DQ[22]/DDR0_DQ[54] DDR1_DQ[23]/DDR0_DQ[55] DDR1_DQ[24]/DDR0_DQ[56] DDR1_DQ[25]/DDR0_DQ[57] DDR1_DQ[26]/DDR0_DQ[58] DDR1_DQ[27]/DDR0_DQ[59] DDR1_DQ[28]/DDR0_DQ[60] DDR1_DQ[29]/DDR0_DQ[61] DDR1_DQ[30]/DDR0_DQ[62] DDR1_DQ[31]/DDR0_DQ[63] DDR1_DQ[32]/DDR1_DQ[16] DDR1_DQ[33]/DDR1_DQ[17] DDR1_DQ[34]/DDR1_DQ[18] DDR1_DQ[35]/DDR1_DQ[19] DDR1_DQ[36]/DDR1_DQ[20] DDR1_DQ[37]/DDR1_DQ[21] DDR1_DQ[38]/DDR1_DQ[22] DDR1_DQ[39]/DDR1_DQ[23] DDR1_DQ[40]/DDR1_DQ[24] DDR1_DQ[41]/DDR1_DQ[25] DDR1_DQ[42]/DDR1_DQ[26] DDR1_DQ[43]/DDR1_DQ[27] DDR1_DQ[44]/DDR1_DQ[28] DDR1_DQ[45]/DDR1_DQ[29] DDR1_DQ[46]/DDR1_DQ[30] DDR1_DQ[47]/DDR1_DQ[31] DDR1_DQ[48] DDR1_DQ[49] DDR1_DQ[50] DDR1_DQ[51] DDR1_DQ[52] DDR1_DQ[53] DDR1_DQ[54] DDR1_DQ[55] DDR1_DQ[56] DDR1_DQ[57] DDR1_DQ[58] DDR1_DQ[59] DDR1_DQ[60] DDR1_DQ[61] DDR1_DQ[62] DDR1_DQ[63]
*SKL_ULT
REV = 1
R874 10K/F_4
Q65 2N7002K
DDR_VTT_PG_CTRL [48,51]
R873 *100K/F_4
2
?
SKL_ULT
Need apply PN
DDR1_CKN[0] DDR1_CKN[1] DDR1_CKP[0] DDR1_CKP[1]
DDR1_CKE[0] DDR1_CKE[1] DDR1_CKE[2] DDR1_CKE[3]
DDR1_CS#[0] DDR1_CS#[1] DDR1_ODT[0]
PDC
2
DDR1_ODT[1]
DDR1_DQSN[6] DDR1_DQSP[6] DDR1_DQSN[7] DDR1_DQSP[7]
DDR1_ALERT#
DRAM_RESET# DDR_RCOMP[0] DDR_RCOMP[1] DDR_RCOMP[2]
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[5] DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[9] DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[6] DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[8] DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0] DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[12] DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT# DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1] DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[10]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[1] DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[0]
DDR1_DQSN[0]/DDR0_DQSN[2] DDR1_DQSP[0]/DDR0_DQSP[2] DDR1_DQSN[1]/DDR0_DQSN[3] DDR1_DQSP[1]/DDR0_DQSP[3] DDR1_DQSN[2]/DDR0_DQSN[6] DDR1_DQSP[2]/DDR0_DQSP[6] DDR1_DQSN[3]/DDR0_DQSN[7] DDR1_DQSP[3]/DDR0_DQSP[7] DDR1_DQSN[4]/DDR1_DQSN[2] DDR1_DQSP[4]/DDR1_DQSP[2] DDR1_DQSN[5]/DDR1_DQSN[3] DDR1_DQSP[5]/DDR1_DQSP[3]
DDR CH - B
3 OF 20
DDR1_MA[3] DDR1_MA[4]
DDR1_PAR
AN45 AN46 AP45 AP46
AN56 AP55 AN55 AP53
BB42 AY42 BA42 AW42
AY48 AP50 BA48 BB48 AP48 AP52 AN50 AN48 AN53 AN52
BA43 AY43 AY44 AW44 BB44 AY47 BA44 AW46 AY46 BA46 BB46 BA47
AH66 AH65 AG69 AG70 AR66 AR65 AR61 AR60 AT38 AR38 AT32 AR32 AR25 AR27 AR22 AR21
AN43 AP43 AT13 AR18 AT18 AU18
?
M_B_A5 M_B_A9 M_B_A6 M_B_A8 M_B_A7
M_B_A12 M_B_A11
M_B_A13
M_B_A2 M_B_A10
M_B_A1 M_B_A0 M_B_A3 M_B_A4
M_B_DQSN0 M_B_DQSP0 M_B_DQSN1 M_B_DQSP1 M_B_DQSN2 M_B_DQSP2 M_B_DQSN3 M_B_DQSP3 M_B_DQSN4 M_B_DQSP4 M_B_DQSN5 M_B_DQSP5 M_B_DQSN6 M_B_DQSP6 M_B_DQSN7 M_B_DQSP7
M_B_ALERT#
M_B_PARITY SM_DRAMRST#_CPU SM_RCOMP_0
R237 121/F_4
SM_RCOMP_1
R870 80.6/F_4
SM_RCOMP_2
R869 100/F_4
M_B_CLKN0 [17] M_B_CLKN1 [17] M_B_CLKP0 [17] M_B_CLKP1 [17]
M_B_CKE0 [17] M_B_CKE1 [17]
M_B_CS#0 [17] M_B_CS#1 [17] M_B_ODT0 [17] M_B_ODT1 [17]
M_B_A5 [17] M_B_A9 [17] M_B_A6 [17] M_B_A8 [17] M_B_A7 [17]
M_B_BG#0 [17]
M_B_A12 [17] M_B_A11 [17]
M_B_ACT# [17]
M_B_BG#1 [17]
M_B_A13 [17]
M_B_CAS# [17]
M_B_WE# [17]
M_B_RAS# [17] M_B_BS#0 [17] M_B_A2 [17] M_B_BS#1 [17] M_B_A10 [17] M_B_A1 [17] M_B_A0 [17] M_B_A3 [17] M_B_A4 [17]
M_B_PARITY [17]
NB5
NB5
NB5
1
06
+1.2VSUS
R871 470_4
R872 *0_4/S
PV-R, 0630 change to short PAD
PROJECT : S400 Series
PROJECT : S400 Series
PROJECT : S400 Series
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Re Custom
Custom
Custom
06 -- SKYLAKE (DDR3-A/B I/F)
06 -- SKYLAKE (DDR3-A/B I/F)
06 -- SKYLAKE (DDR3-A/B I/F)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
DDR3_DRAMRST# [16,17]
6 65Monday, November 30, 2015
6 65Monday, November 30, 2015
6 65Monday, November 30, 2015
v
1A
1A
1A
5
4
3
2
1
07
?
U25H
D D
PEG_RXN1[18] PEG_RXP1[18]
PEG_TXN1[18]
dGPU
dGPU
dGPU
LAN(NIC)
C C
WLAN
HDD
SSD
Cardreader
mSATA / NGFF
ATA4 6Gb/s)
(S
B B
PEG_TXP1[18]
PEG_RXN2[18]
PEG_RXP2[18] PEG_TXN2[18] PEG_TXP2[18]
PEG_RXN3[18]
PEG_RXP3[18] PEG_TXN3[18] PEG_TXP3[18]
PEG_RXN4[18]
PEG_RXP4[18] PEG_TXN4[18] PEG_TXP4[18]
PCIE_RXN5_LAN[32] PCIE_RXP5_LAN[32]
PCIE_TXN5_LAN[32] PCIE_TXP5_LAN[32]
PCIE_RXN6_WLAN[37] PCIE_RXP6_WLAN[37]
PCIE_TXN6_WLAN[37] PCIE_TXP6_WLAN[37]
SATA_RXN7[43] SATA_RXP7[43] SATA_TXN7[43]
SATA_TXP7[43]
PCIE_RXN8_SSD[38] PCIE_RXP8_SSD[38]
PCIE_TXN8_SSD[38] PCIE_TXP8_SSD[38]
PCIE_RXN2_CARD[31]
PCIE_RXP2_CARD[31] PCIE_TXN2_CARD[31]
PCIE_TXP2_CARD[31]
R96 100/F_4
H_PRDY#[15]
H_PREQ#[15]
C609 0.22U/10V_4 C608 0.22U/10V_4
C628 0.22U/10V_4 C629 0.22U/10V_4
C626 0.22U/10V_4 C627 0.22U/10V_4
C624 0.22U/10V_4
C613 0.1U/16V_4 C614 0.1U/16V_4
C612 0.1U/16V_4 C611 0.1U/16V_4
C622 0.1U/16V_4 C623 0.1U/16V_4
PEG_TXN1_C PEG_TXP1_C
PEG_TXN2_C PEG_TXP2_C
PEG_TXN3_C PEG_TXP3_C
PEG_TXN4_C PEG_TXP4_C
PCIE_RXN5_LAN PCIE_RXP5_LAN PCIE_TXN5_LAN_C PCIE_TXP5_LAN_C
PCIE_RXN6_WLAN PCIE_RXP6_WLAN PCIE_TXN6_WLAN_C PCIE_TXP6_WLAN_C
SATA_RXN7 SATA_RXP7 SATA_TXN7 SATA_TXP7
PCIE_RXN8_SSD PCIE_RXP8_SSD PCIE_TXN8_SSD PCIE_TXP8_SSD
PCIE_TXN2_CARD_C PCIE_TXP2_CARD_C
PCIE_RCOMPN PCIE_RCOMPP
PIRQA#
PCIE/USB3/SATA
H13
PCIE1_RXN/USB3_5_RXN
G13
PCIE1_RXP/USB3_5_RXP
B17
PCIE1_TXN/USB3_5_TXN
A17
PCIE1_TXP/USB3_5_TXP
G11
PCIE2_RXN/USB3_6_RXN
F11
PCIE2_RXP/USB3_6_RXP
D16
PCIE2_TXN/USB3_6_TXN
C16
PCIE2_TXP/USB3_6_TXP
H16
PCIE3_RXN
G16
PCIE3_RXP
D17
PCIE3_TXN
C17
PCIE3_TXP
G15
PCIE4_RXN
F15
PCIE4_RXP
B19
PCIE4_TXN
A19
PCIE4_TXP
F16
PCIE5_RXN
E16
PCIE5_RXP
C19
PCIE5_TXN
D19
PCIE5_TXP
G18
PCIE6_RXN
F18
PCIE6_RXP
D20
PCIE6_TXN
C20
PCIE6_TXP
F20
PCIE7_RXN/SATA0_RXN
E20
PCIE7_RXP/SATA0_RXP
B21
PCIE7_TXN/SATA0_TXN
A21
PCIE7_TXP/SATA0_TXP
G21
PCIE8_RXN/SATA1A_RXN
F21
PCIE8_RXP/SATA1A_RXP
D21
PCIE8_TXN/SATA1A_TXN
C21
PCIE8_TXP/SATA1A_TXP
E22
PCIE9_RXN
E23
PCIE9_RXP
B23
PCIE9_TXN
A23
PCIE9_TXP
F25
PCIE10_RXN
E25
PCIE10_RXP
D23
PCIE10_TXN
C23
PCIE10_TXP
F5
PCIE_RCOMPN
E5
PCIE_RCOMPP
D56
PROC_PRDY#
D61
PROC_PREQ#
BB11
GPP_A7/PIRQA#
E28
PCIE11_RXN/SATA1B_RXN
E27
PCIE11_RXP/SATA1B_RXP
D24
PCIE11_TXN/SATA1B_TXN
C24
PCIE11_TXP/SATA1B_TXP
E30
PCIE12_RXN/SATA2_RXN
F30
PCIE12_RXP/SATA2_RXP
A25
PCIE12_TXN/SATA2_TXN
B25
PCIE12_TXP/SATA2_TXP
*SKL_ULT
REV = 1
SKL_ULT
PDC
8 OF 20
Need apply PN
SSIC / USB3
USB3_2_RXN/SSIC_1_RXN USB3_2_RXP/SSIC_1_RXP USB3_2_TXN/SSIC_1_TXN
USB3_2_TXP/SSIC_1_TXP
USB3_3_RXN/SSIC_2_RXN USB3_3_RXP/SSIC_2_RXP USB3_3_TXN/SSIC_2_TXN
USB3_3_TXP/SSIC_2_TXP
USB2
USB2_VBUSSENSE
GPP_E9/USB2_OC0# GPP_E10/USB2_OC1# GPP_E11/USB2_OC2# GPP_E12/USB2_OC3#
GPP_E4/DEVSLP0 GPP_E5/DEVSLP1 GPP_E6/DEVSLP2
GPP_E0/SATAXPCIE0/SATAGP0 GPP_E1/SATAXPCIE1/SATAGP1 GPP_E2/SATAXPCIE2/SATAGP2
GPP_E8/SATALED#
USB3_1_RXN USB3_1_RXP USB3_1_TXN
USB3_1_TXP
USB3_4_RXN USB3_4_RXP USB3_4_TXN
USB3_4_TXP
USB2N_1
USB2P_1
USB2N_2
USB2P_2
USB2N_3
USB2P_3
USB2N_4
USB2P_4
USB2N_5
USB2P_5
USB2N_6
USB2P_6
USB2N_7
USB2P_7
USB2N_8
USB2P_8
USB2N_9
USB2P_9
USB2N_10
USB2P_10
USB2_COMP
USB2_ID
?
H8 G8 C13 D13
J6 H6 B13 A13
J10 H10 B15 A15
E10 F10 C15 D15
AB9 AB10
AD6 AD7
AH3 AJ3
AD9 AD10
AJ1 AJ2
AF6 AF7
AH1 AH2
AF8 AF9
AG1 AG2
AH7 AH8
USB_BIAS
AB6
USB2_ID
AG3
USB2_VBUSSENSE
AG4
DGPU_HOLD_RST#
A9
DGPU_PRSNT#
C9
DGPU_PWR_EN#
D9
DGPU_PWROK
B9 J1
J2 J3
DOCK_ID1
H2
GPP_E1
H3
mSATA_DET#
G4
LED_3S_SATA#
H1
USBP1­USBP1+
USBP2­USBP2+
USBP3­USBP3+
USB30_RX1­USB30_RX1+ USB30_TX1­USB30_TX1+
USB30_RX2­USB30_RX2+ USB30_TX2­USB30_TX2+
USBP4­USBP4+
USBP6­USBP6+
USBP7­USBP7+
USBP8­USBP8+
R174
113/F_4
DEVSLP0 DEVSLP1 DEVSLP2
USB30_RX1- [35]
USB30_RX1+ [35]
USB30_TX1- [35]
USB30_TX1+ [35] USB30_RX2- [35]
USB30_RX2+ [35]
USB30_TX2- [35]
USB30_TX2+ [35]
USBP1- [35] USBP1+ [35]
USBP2- [35] USBP2+ [35]
R522*0_4/S
R35110K_4
LED_3S_SATA# [31]
USB3.0 (M/B-1)
USB3.0 (M/B-2)
USB2.0(M/B-1)
USB2.0(M/B-2)
USBP3-_TS
R5840_4
USBP3+_TS
R5860_4
USBP3-_WWAN
R585*0_4
USBP3+_WWAN
R587*0_4
USBP4- [31]
Daugther Board
USBP4+ [31]
USBP6- [26] USBP6+ [26]
USBP7- [37] USBP7+ [37]
USBP8- [24] USBP8+ [24]
TIE TRACES TOGETHER CLOSE TO PINS WITH LENGTH TO RESISTOR
DGPU_HOLD_RST# [18]
DGPU_PG [19,58]
DEVSLP0 [43] DEVSLP1 [38]
DOCK_ID1 [8]
TP48
mSATA_DET# [38]
+3V
Camera
BT
FPR
(USBP1)
(USBP2)
USBP3-_TS [26] USBP3+_TS [26] USBP3-_WWAN [38] USBP3+_WWAN [38]
TS
(USBP3_TS)
WWAN
(USBP4)
SI1, follow Intel DG non-support OTG reserve PD 1K
(
USBP6) (USBP7) (USBP8)
DG require 112.5 ohm
(USBP3_WWAN)
USB2_ID USB2_VBUSSENSE
DGPU_PWR_EN#
DOCK_ID1 DEVSLP1
mSATA_DET# DEVSLP0 DEVSLP2
DGPU_PWR_EN# DGPU_PWROK DGPU_HOLD_RST# DGPU_HOLD_RST#
PIRQA#
DGPU_PRSNT# DGPU_PWR_EN#
2
Q39 BSS138W
R521 100K_4
+3V
R673 10K_4
3
1
+3V
R541*10K_4 R544*10K_4
R328100K/F_4 R546*10K_4 R547*10K_4
R495*10K_4
R49710K_4
R496*10K_4
+VCC_ESPI_LPC
R635100K/F_4C625 0.22U/10V_4
+3V
R498*10K_4
R52310K_4
R49410K_4 R7651K/F_4 R7661K/F_4
DGPU_PRSNT# DGPU_PRSNT#
R498
R523
UMA DIS
DGPU_PWR_EN [19,48,60]
A A
PROJECT:400 Series
PROJECT:400 Series
PROJECT:400 Series
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
+3V[2,3,4,5,8,9,10,15,16,17,24,26,27,28,30,31,32,33,34,36,38,42,44,45,49,55,57,63]
+3V_DEEP_SUS[3,4,5,6,8,10,15,37,44,45,47,53,54,57,63]
5
4
3
2
Size Document Number Rev Custom
Custom
Custom
07 -- SKYLAK (PCIE/USB)
07 -- SKYLAK (PCIE/USB)
NB5
NB5
NB5
07 -- SKYLAK (PCIE/USB)
Date: Sheet of
Date: Sheet of
Date: Sheet
1
1A
1A
1A
of
7 65Monday, November 30, 2015
7 65Monday, November 30, 2015
7 65Monday, November 30, 2015
5
4
3
2
1
SKL_ULT
U25G
ACZ_SYNC_AUDIO
BIT_CLK_AUDIO[30]
D D
ACZ_RST#_AUDIO[30]
C661 22P/50V_4
ACZ_SDIN0[30]
10/30 for RF reserved
C C
R631 33_4 R645 33_4
R632 *0_4/S
R619 33_4
07/01 for EE shortpad
TOUCH_PWR_EN[26]
WLAN_TRANSMIT_OFF#[37]
A_3S_ICHSPKR[30]
ACZ_SDOUT_AUDIO[30]
TP22
ACZ_SYNC ACZ_BCLK ACZ_SDO
ACZ_RST# GPP_D23
GPP_F1 AMD_VBIOS_SEL# GPP_F2 GPP_F3
GPP_D19 GPP_D20
WLAN_TRANSMIT_OFF# GDD_D18
A_3S_ICHSPKR
R312 33_4
BA22 AY22 BB22 BA21 AY21
AW22
AY20
AW20
AK7 AK6 AK9
AK10
AW5
2N7002K
ACZ_SDOUT
J5
H5 D7
D8 C8
AUDIO
HDA_SYNC/I2S0_SFRM HDA_BLK/I2S0_SCLK HDA_SDO/I2S0_TXD HDA_SDI0/I2S0_RXD HDA_SDI1/I2S1_RXD HDA_RST#/I2S1_SCLK GPP_D23/I2S_MCLK I2S1_SFRM I2S1_TXD
GPP_F1/I2S2_SFRM GPP_F0/I2S2_SCLK GPP_F2/I2S2_TXD GPP_F3/I2S2_RXD
GPP_D19/DMIC_CLK0 GPP_D20/DMIC_DATA0
GPP_D17/DMIC_CLK1 GPP_D18/DMIC_DATA1
GPP_B14/SPKR
*SKL_ULT
ACZ_SDO
3
Q25
1
REV = 1
ACZ_SDOUT_G
2
R311
10K_4
?
+5V
Need apply PN
SDIO/SDXC
GPP_A17/SD_PW R_EN#/ISH_GP7
7 OF 20
GPP_G0/SD_CMD GPP_G1/SD_DATA0 GPP_G2/SD_DATA1 GPP_G3/SD_DATA2 GPP_G4/SD_DATA3
GPP_G5/SD_CD#
GPP_G6/SD_CLK GPP_G7/SD_W P
GPP_A16/SD_1P8_SEL
SD_RCOMP
GPP_F23
?
AB11 AB13 AB12 W12 W11 W10 W8 W7
BA9 BB9
AB7
AF13
GPP_G0 SATA_ODD_DA
GPP_G3
GPP_A17 GPP_A16
ESDIO_RCOMP
GPP_F23
TP67
R175 200/F_4
DOCK_ID1[7]
11/05 for EE reserved
GPP_D19 GPP_D20 GPP_G0 GPP_G3
GPP_A17
GPP_F1 GPP_F2 GPP_F23
AMD_VBIOS_SEL#
DOCK_ID1
GDD_D18 SATA_ODD_DA TOUCH_PWR_EN
AMD_VBIOS_SEL#
R507 100K/F_4 R493 100K/F_4 R159 100K/F_4 R160 100K/F_4
R639 *100K/F_4
R196 *100K/F_4 R189 *100K/F_4 R188 100K/F_4 R192 *10K_4
R595 *10K_4 R594 10K_4
R542 *10K_4 R543 10K_4
R578 8.2K/F_4 R82 100K/F_4
+3V_DEEP_SUS
+VCC_ESPI_LPC
R49910K_4
DOCK_ID1
08
+1.8V
+1.8V
+1.8V
+3V
00= VBIOS 1 01 = VBIOS 2 (Reserve for new die) 10 = VBIOS 3 (Reserve for new die)
+3V_DEEP_SUS
11
=UMA
R
595,R541
B B
ME_UNLOCK#[46]
R338 *0_4/S
PV, 0422 change to 0ohm
PLTRST#[3,4,18,34]
A A
5
4
R343 1K/F_4
2
2
1
3 1
3
ACZ_SDO
Q31 ME2303T1
Q29 ME2303T1
PROJECT:400 Series
PROJECT:400 Series
PROJECT:400 Series
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
08 -- SKYLAKE (HDA)
08 -- SKYLAKE (HDA)
NB5
NB5
3
2
NB5
08 -- SKYLAKE (HDA)
Date: Sheet of
Date: Sheet of
Date: Sheet
1
1A
1A
1A
of
8 65Monday, November 30, 2015
8 65Monday, November 30, 2015
8 65Monday, November 30, 2015
5
4
3
2
1
TBT
RTC Clock 32.768KHz
12
R319 10M_4
C631 33P/50V_4
1
2
4
3
C632 33P/50V_4
RTC_X1
RTC_X2
TP41
24MHZ +-30PPM Y4
TP42
0513 PV Modify by vendor
11/06 for RF reserved
11/06 for RF reserved
Cardreader
AN
L
WLAN
dGPU
C25 *10P/50V_4
C23 *10P/50V_4
CLK_PCIE_CRN[31] CLK_PCIE_CRP[31]
PCIE_CLKREQ_CR#[31]
CLK_PCIE_LANN[32] CLK_PCIE_LANP[32]
PCIE_CLKREQ_LAN#[32]
CLK_PCIE_WLANN[37]
CLK_PCIE_WLANP[37]
PCIE_CLKREQ_WLAN#[37]
CLK_GFX_N[18]
CLK_GFX_P[18]
PCIE_REQ_GPU#[19]
R10 *0_4
R9 *0_4
D D
C402 8.2P/50V_4
Y2
32.768KHz
C394 8.2P/50V_4
11/10 for 2nd reserved
XTAL24_IN XTAL24_OUT
C C
RTC Circuitry(RTC)
R509 1M_4
PCIE_CLKREQ_SSD# CLK_PCIE_CRN
CLK_PCIE_CRP PCIE_CLKREQ_CR#
CLK_PCIE_LANN CLK_PCIE_LANP PCIE_CLKREQ_LAN#
CLK_PCIE_WLANN CLK_PCIE_WLANP PCIE_CLKREQ_WLAN#
CLK_GFX_N CLK_GFX_P PCIE_REQ_GPU#
PCIE_CLKREQ5#
CLK_PCIE_LANN CLK_PCIE_LANP
CFG0-19 need Reserve TP
CFG0[15] CFG1[15] CFG2[15] CFG3[15] CFG4[15]
PV, 0413 add R795, R794 to prevent RTC power over +3.2V
+3V_ALW
R795
1.5K/_4
R794 47K/F_4
+3V_RTC_0
R180 1K/F_4
+3V_RTC_0
B B
12
CN20 BAT_CONN
DFHS02FS058
BAT-23_2-4_2
A A
+3V_RTC_2
+3V_RTC_1+3V_RTC_0
D8
BAT54C
1U/6.3V_4
RTC Power trace width 20mils.
CFG4
R550 1K/F_4
CFG9
R557 *1K/F_4
+VCCSFR [2,3,11,13,45] +1.0V_DEEP_SUS [10,15,52,53,54,57] +3V [2,3,4,5,7,8,10,15,16,17,24,26,27,28,30,31,32,33,34,36,38,42,44,45,49,55,57,63]
5
+3V_RTC
C306
30mils
+3V_RTC
R228
20K/F_4
R661 20K/F_4
RTC_RST#
C328 1U/6.3V_4
SRTC_RST#
C673 1U/6.3V_4
C1023
0.1U/25V_4
RTC_RST# [15,44]
PVR, 0714
+1.0V_DEEP_SUS
4
CFG5[15] CFG6[15] CFG7[15] CFG8[15] CFG9[15] CFG10[15] CFG11[15] CFG12[15] CFG13[15] CFG14[15] CFG15[15]
CFG16[15] CFG17[15]
CFG18[15] CFG19[15]
R86 49.9/F_4
ITP_PMODE[15]
CFG_RCOMP
R5201.5K_4
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8
CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15
CFG16
CFG17
CFG18
CFG19
AR10
AT10
D42 C42
B42 A42 AT7
D41 C41 AT8
D40 C40
B40 A40 AU8
E40 E38 AU7
U25J
CLKOUT_PCIE_N0 CLKOUT_PCIE_P0 GPP_B5/SRCCLKREQ0#
CLKOUT_PCIE_N1 CLKOUT_PCIE_P1 GPP_B6/SRCCLKREQ1#
CLKOUT_PCIE_N2 CLKOUT_PCIE_P2 GPP_B7/SRCCLKREQ2#
CLKOUT_PCIE_N3 CLKOUT_PCIE_P3 GPP_B8/SRCCLKREQ3#
CLKOUT_PCIE_N4 CLKOUT_PCIE_P4 GPP_B9/SRCCLKREQ4#
CLKOUT_PCIE_N5 CLKOUT_PCIE_P5 GPP_B10/SRCCLKREQ5#
*SKL_ULT
REV = 1
U25S
E68
CFG[0]
B67
CFG[1]
D65
CFG[2]
D67
CFG[3]
E70
CFG[4]
C68
CFG[5]
D68
CFG[6]
C67
CFG[7]
F71
CFG[8]
G69
CFG[9]
F70
CFG[10]
G68
CFG[11]
H70
CFG[12]
G71
CFG[13]
H69
CFG[14]
G70
CFG[15]
E63
CFG[16]
F63
CFG[17]
E66
CFG[18]
F66
CFG[19]
E60
CFG_RCOMP
E8
ITP_PMODE
AY2
RSVD_AY2
AY1
RSVD_AY1
D1
RSVD_D1
D3
RSVD_D3
K46
RSVD_K46
K45
RSVD_K45
AL25
RSVD_AL25
AL27
RSVD_AL27
C71
RSVD_C71
B70
RSVD_B70
F60
RSVD_F60
A52
RSVD_A52
BA70
RSVD_TP_BA70
BA68
RSVD_TP_BA68
J71
RSVD_J71
J68
RSVD_J68
F65
VSS_F65
G65
VSS_G65
F61
RSVD_F61
E61
RSVD_E61
*SKL_ULT
REV = 1
3
RESERVED SIGNALS-1
PDC
SKL_ULT
CLOCK SIGNALS
SKL_ULT
?
10 OF 20
?
19 OF 20
Need apply PN
CLKOUT_ITPXDP_N CLKOUT_ITPXDP_P
GPD8/SUSCLK
XTAL24_OUT
XCLK_BIASREF
SRTCRST#
Need apply PN
RSVD_TP_BB68 RSVD_TP_BB69
RSVD_TP_AK13 RSVD_TP_AK12
RSVD_BB2 RSVD_BA3
RSVD_D5 RSVD_D4 RSVD_B2 RSVD_C2
RSVD_B3 RSVD_A3
RSVD_AW1
RSVD_E1 RSVD_E2
RSVD_BA4 RSVD_BB4
RSVD_A4 RSVD_C4
RSVD_A69
RSVD_B69 RSVD_AY3 RSVD_D71
RSVD_C70 RSVD_C54
RSVD_D54
VSS_AY71
RSVD_TP_AW71 RSVD_TP_AW70
PROC_SELECT#
XTAL24_IN
RTCX1 RTCX2
RTCRST#
TP5 TP6
TP4
TP1 TP2
ZVM#
MSM#
?
?
BB68 BB69
AK13 AK12
BB2 BA3
AU5 AT5
D5 D4 B2 C2
B3 A3
AW1 E1
E2 BA4
BB4 A4
C4 BB5 A69
B69 AY3 D71
C70 C54
D54 AY4
BB3 AY71
AR56 AW71
AW70 AP56
C64
F43 E43
BA17 E37
E35 E42 AM18
AM20 AN18
AM16
CK_XDP_N_R CK_XDP_P_R
XTAL24_IN XTAL24_OUT
XCLK_BIASREF
RTC_X1 RTC_X2
SRTC_RST# RTC_RST#
R508 *100K_4
2
2 4
RP1 0_4P2R_4
R117 2.7K/F_4
RTC_RST# [15,44]
+1.8V_DEEP_SUS
+VCCSFR
R
P1 install for XDP
1 3
CK_XDP_N [15] CK_XDP_P [15]
SUSCLK32_KBC [46]
+1.0V_DEEP_SUS
AW69
RSVD_AW69
AW68
RSVD_AW68
AU56
RSVD_AU56
AW48
RSVD_AW48
C7
RSVD_C7
U12
RSVD_U12
U11
RSVD_U11
H11
RSVD_H11
REV = 1
NB5
NB5
NB5
09
TO KBC
CLK_REQ/Strap Pin(CLG)
PCIE_REQ_GPU# PCIE_CLKREQ5# PCIE_CLKREQ_WLAN# PCIE_CLKREQ_LAN# PCIE_CLKREQ_CR# PCIE_CLKREQ_SSD#
R241 10K_4 R291 *10K_4 R229 10K_4 R260 10K_4 R262 10K_4 R242 10K_4
0421 PV Modify
?
SKL_ULT
U25T
*SKL_ULT
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom Date: Sheet of
Date: Sheet of
Date: Sheet
Need apply PN
SPARE
RSVD_F6
RSVD_E3 RSVD_C11 RSVD_B11 RSVD_A11 RSVD_D12 RSVD_C12 RSVD_F52
20 OF 20
PROJECT:400 Series
PROJECT:400 Series
PROJECT:400 Series
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
09 -- SKYLAKE (CLK/RSV/RTC)
09 -- SKYLAKE (CLK/RSV/RTC)
09 -- SKYLAKE (CLK/RSV/RTC)
?
1
+3V
F6 E3 C11 B11 A11 D12 C12 F52
of
9 65Monday, November 30, 2015
9 65Monday, November 30, 2015
9 65Monday, November 30, 2015
1A
1A
1A
5
4
3
2
1
10
LPC & ESPI TABLE
LPC MODE ESPI MODE INSTAL UNINSTAL UNINSTAL INSTAL
R185*0_4C578 1U/6.3V_4 R172*0_4/S
R
b
07/16 for EE shortpad
C401 0.1U/16V_4 C292 1U/6.3V_4
VID0_VCC_PRIM [54] VID1_VCC_PRIM [54]
11/05 for intel check list
+3V_DEEP_SUS +1.8V_DEEP_SUS
+1.0V_DEEP_SUS
+3V_DEEP_SUS
C274
1U/6.3V_4
C266
0.1U/16V_4
+3V_DEEP_SUS
+1.8V_DEEP_SUS
C368
1U/6.3V_4
C657 0.1U/16V_4
R409*0_4 R407*0_4
DB1 CHANGE
Ra Rb
+1.0V_DEEP_SUS
C558 22U/6.3V_6
+1.8V_DEEP_SUS
+3V_RTC
Ra
D D
+1.0V_DEEP_SUS
+VCC_PRIM
PCH Internal VRM
C C
+VCCDSW_1.0V
+1.0V_DEEP_SUS
+1.0V_MODPHY
+1.0V_DEEP_SUS
07/01 for EE shortpad
+3VPCU
07/01 for EE shortpad
+3V_DEEP_SUS
+1.8V_DEEP_SUS
+1.0V_MODPHY
+3V_DEEP_SUS
+1.0V_DEEP_SUS
+1.0V_MODPHY
+3V
C263 1U/6.3V_4 C224 0.1U/16V_4
C651 1U/6.3V_4
C198 1U/6.3V_4
C604 1U/6.3V_4 C239 1U/6.3V_4 C251 0.1U/16V_4 C216 0.1U/16V_4
C233 10U/6.3V_6
R155 *0_4/S
C433 1U/6.3V_4
R173 *0_4/S R171 *0_4
C606 1U/6.3V_4
C57 1U/6.3V_4 C559 *1U/6.3V_6
R124 *0_6/S C262 1U/6.3V_4 C603 1U/6.3V_4 C238 0.1U/16V_4 C605 0.1U/16V_4
+VCCPRIM
+VCCDSW_1.0V
+VCCDSW
C265 1U/6.3V_4
Ra
Rb
+VCCSPI
C290 *0.1U/16V_4
+VCCAPLLEBB
U25O
AB19
VCCPRIM_1P0
AB20
VCCPRIM_1P0
P18
VCCPRIM_1P0
AF18
VCCPRIM_CORE
AF19
VCCPRIM_CORE
V20
VCCPRIM_CORE
V21
VCCPRIM_CORE
AL1
DCPDSW_1P0
K17
VCCMPHYAON_1P0
L1
VCCMPHYAON_1P0
N15
VCCMPHYGT_1P0_N15
N16
VCCMPHYGT_1P0_N16
N17
VCCMPHYGT_1P0_N17
P15
VCCMPHYGT_1P0_P15
P16
VCCMPHYGT_1P0_P16
K15
VCCAMPHYPLL_1P0
L15
VCCAMPHYPLL_1P0
V15
VCCAPLL_1P0
AB17
VCCPRIM_1P0_AB17
Y18
VCCPRIM_1P0_Y18
AD17
VCCDSW_3P3_AD17
AD18
VCCDSW_3P3_AD18
AJ17
VCCDSW_3P3_AJ17
AJ19
VCCHDA
AJ16
VCCSPI
AF20
VCCSRAM_1P0
AF21
VCCSRAM_1P0
T19
VCCSRAM_1P0
T20
VCCSRAM_1P0
AJ21
VCCPRIM_3P3_AJ21
AK20
VCCPRIM_1P0_AK20
N18
VCCAPLLEBB
*SKL_ULT
REV = 1
CPU POWER 4 OF 4
SKL_ULT
0.696A
2.574A
22mA
22mA
88mA 26mA
118mA
68mA 11mA
642mA
33mA
?
Need apply PN
20mA 4mA 6mA 8mA 6mA 161mA 41mA
75mA
6mA 1mA
1mA
35mA 29mA 24mA 33mA 4mA
0mA
1
15 OF 20
VCCPGPPA VCCPGPPB VCCPGPPC VCCPGPPD VCCPGPPE
VCCPGPPF
VCCPGPPG
VCCPRIM_3P3_V19
VCCPRIM_1P0_T1
VCCATS_1P8
VCCRTCPRIM_3P3
VCCRTC_AK19 VCCRTC_BB14
DCPRTC VCCCLK1 VCCCLK2 VCCCLK3 VCCCLK4 VCCCLK5 VCCCLK6
GPP_B0/CORE_VID0 GPP_B1/CORE_VID1
+VCC_ESPI_LPC
+3V_DEEP_SUS
DCPRTC +VCCCLK1 +VCCCLK2 +VCCCLK3 +VCCCLK4 +VCCCLK5 +VCCCLK6
CORE_VID0 CORE_VID1
+VCC_ESPI_LPC
AK15 AG15 Y16 Y15 T16 AF16 AD15
V19 T1 AA1 AK17 AK19
BB14 BB10 A14 K19 L21 N20 L19 A10 AN11
AN13
?
B B
LPC & ESPI TABLE
LPC MODE ESPI MODE
INSTALRa
Rb
A A
+3V_DEEP_SUS [3,4,5,6,8,15,37,44,45,47,53,54,57,63] +3VPCU [3,15,26,33,37,38,40,41,42,44,45,46,48,49,50,51,53,54,57,60,62,63] +1.0V_DEEP_SUS [9,15,52,53,54,57] +VCC_PRIM [25,54] +3V [2,3,4,5,7,8,9,15,16,17,24,26,27,28,30,31,32,33,34,36,38,42,44,45,49,55,57,63] +1.8V_DEEP_SUS [9,45,47,52,63]
5
UNINSTAL
NINSTAL
U INSTAL
PROJECT:400 Series
PROJECT:400 Series
PROJECT:400 Series
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
10 -- SKYLAKE (PCH POWER)
10 -- SKYLAKE (PCH POWER)
NB5
NB5
4
3
2
NB5
10 -- SKYLAKE (PCH POWER)
Date: Sheet of
Date: Sheet of
Date: Sheet
1
10 65Monday, November 30, 2015
10 65Monday, November 30, 2015
10 65Monday, November 30, 2015
1A
1A
1A
of
5
4
3
2
1
?
SKL_ULT
28A
Under U9052 Under U9052
C192
C232 10U/6.3V_4
C218 22U/6.3V_6
C205
22U/6.3V_6
C258 10U/6.3V_4
C191 22U/6.3V_6
C219
22U/6.3V_6
C259 10U/6.3V_4
TP21
C193 10U/6.3V_6
C174 10U/6.3V_4
C589 22U/6.3V_6
22U/6.3V_6
D D
C C
C206
C296 10U/6.3V_4
C598 22U/6.3V_6
C220
22U/6.3V_6
C102 10U/6.3V_4
C204 22U/6.3V_6
22U/6.3V_6
C95 10U/6.3V_4
C599 22U/6.3V_6
22U/6.3V_6
C590
+VCC_CORE +VCC_CORE
C229
22U/6.3V_6
+VCCG1
A30
VCC_A30
A34
VCC_A34
A39
VCC_A39
A44
VCC_A44
AK33
VCC_AK33
AK35
VCC_AK35
AK37
VCC_AK37
AK38
VCC_AK38
AK40
VCC_AK40
AL33
VCC_AL33
AL37
VCC_AL37
AL40
VCC_AL40
AM32
VCC_AM32
AM33
VCC_AM33
AM35
VCC_AM35
AM37
VCC_AM37
AM38
VCC_AM38
G30
VCC_G30
K32
RSVD_K32
AK32
RSVD_AK32
AB62
VCCOPC_AB62
P62
VCCOPC_P62
V62
VCCOPC_V62
H63
VCC_OPC_1P8_H63
G61
VCC_OPC_1P8_G61
AC63
VCCOPC_SENSE
AE63
VSSOPC_SENSE
AE62
VCCEOPIO
AG62
VCCEOPIO
AL63
VCCEOPIO_SENSE
AJ62
VSSEOPIO_SENSE
U25L
*SKL_ULT
REV = 1
CPU POWER 1 OF 4
Need apply PN
VCC_SENSE
VSS_SENSE
VIDALERT#
VCCSTG_G20
12 OF 20
VCC_G32 VCC_G33 VCC_G35 VCC_G37 VCC_G38 VCC_G40 VCC_G42
VCC_J30 VCC_J33 VCC_J37
VCC_J40 VCC_K33 VCC_K35 VCC_K37 VCC_K38 VCC_K40 VCC_K42 VCC_K43
VIDSCK
VIDSOUT
PDC
?
G32 G33 G35 G37 G38 G40 G42 J30 J33 J37 J40 K33 K35 K37 K38 K40 K42 K43
E32 E33
H_CPU_SVIDALRT#
B63
VR_SVID_CLK_R
A63
H_CPU_SVIDDAT
D64 G20
C91 1U/6.3V_4
C176 1U/6.3V_4
C213 1U/6.3V_4
C268 1U/6.3V_4
R519 100/F_4
R518 100/F_4
+1.0V_STG
C167
C201
1U/6.3V_4
1U/6.3V_4
C231
C281
1U/6.3V_4
1U/6.3V_4
+VCC_CORE
VCCSENSE [55] VSSSENSE [55]
C189
C255
1U/6.3V_4
1U/6.3V_4
C247
C92
1U/6.3V_4
1U/6.3V_4
100- ±1% pull-up to VCC near processor. Trace Length Match <25mil
DB1 CHANGE
+VCC_CORE
+VCC_CORE
Close U9052
C619 47U/6.3V_8
C282 10U/6.3V_4
C587 47U/6.3V_8
C269 10U/6.3V_4
C175 1U/6.3V_4
C166 1U/6.3V_4
47U/6.3V_8
C586
C242 10U/6.3V_4
C256 1U/6.3V_4
47U/6.3V_8
C621
C63 10U/6.3V_4
C596
47U/6.3V_8
C271 10U/6.3V_4
C576
47U/6.3V_8
C243 10U/6.3V_4
C610
47U/6.3V_8
C248 10U/6.3V_4
C565
47U/6.3V_8
C230 10U/6.3V_4
11
Layout note: need routing together and ALERT need between CLK and DATA.
B B
A A
5
4
CLOSE TO CPU PL
ACE THE PU RESISTORS
H_CPU_SVIDALRT#
PLACE THE PU RESISTORS CLOSE TO VR PULL UP IS IN THE VR MODULE
VR_SVID_CLK_R
CLOSE TO CPU PLACE THE PU RESISTORS
H_CPU_SVIDDAT
3
R512 220/F_4
7/16 for EE shortpad
0
+VCCSFR
R513 *0_4/S
R502
56.2/F_4
C615 *0.1U/16V_4
+VCCSFR
R503 *54.9/F_4
+VCCSFR
Place PU resistor
lose to VR
c
R511 100/F_4
R501 *0_4/S
07/16 for EE shortpad
SVID ALERT
SVID CLK
SVID DATA
VR_SVID_ALERT# [55]
VR_SVID_CLK [55]
VR_SVID_DATA [55]
2
+1.8V [4,5,8,30,52,60,63] +VCC_CORE [55] +VCCSFR [2,3,9,13,45] +1.0V_STG [2,13]
PROJECT:400 Series
PROJECT:400 Series
PROJECT:400 Series
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
11 -- SKYLAKE (POWER-1)
11 -- SKYLAKE (POWER-1)
NB5
NB5
NB5
11 -- SKYLAKE (POWER-1)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1A
1A
1A
11 65Monday, November 30, 2015
11 65Monday, November 30, 2015
11 65Monday, November 30, 2015
5
4
3
2
1
?
SKL_ULT
31A 31A
+VCCGT
U
nder U1
C283 1U/6.3V_4
C270 1U/6.3V_4
C246 10U/6.3V_4
C200 10U/6.3V_4
C212 1U/6.3V_4
C184 1U/6.3V_4
VGT_VCCSENSE[55] VGT_VSSSENSE[55]
10U/6.3V_4
C88 10U/6.3V_4
C188 1U/6.3V_4
C172 1U/6.3V_4
C209 10U/6.3V_4
10U/6.3V_4
C221 1U/6.3V_4
C185 1U/6.3V_4
D D
C C
C253 10U/6.3V_4
C568 10U/6.3V_4
C171 1U/6.3V_4
C257 1U/6.3V_4
C227 10U/6.3V_4
C235 10U/6.3V_4
C208 1U/6.3V_4
C228 1U/6.3V_4
Trace Length Match <25mil
B B
AA63 AA64 AA66 AA67 AA69 AA70 AA71 AC64 AC65 AC66 AC67 AC68 AC69 AC70 AC71
M62 N63 N64 N66 N67 N69
A48 A53 A58 A62 A66
J43 J45 J46 J48 J50 J52 J53 J55 J56 J58 J60 K48 K50 K52 K53 K55 K56 K58 K60 L62 L63 L64 L65 L66 L67 L68 L69 L70 L71
J70 J69
U25M
CPU POWER 2 OF 4
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
VCCGT_SENSE VSSGT_SENSE
*SKL_ULT
REV = 1
Need apply PN
VCCGTX_AK42 VCCGTX_AK43 VCCGTX_AK45 VCCGTX_AK46 VCCGTX_AK48 VCCGTX_AK50 VCCGTX_AK52 VCCGTX_AK53 VCCGTX_AK55 VCCGTX_AK56 VCCGTX_AK58 VCCGTX_AK60 VCCGTX_AK70
VCCGTX_AM48 VCCGTX_AM50 VCCGTX_AM52 VCCGTX_AM53 VCCGTX_AM56 VCCGTX_AM58 VCCGTX_AU58 VCCGTX_AU63 VCCGTX_BB57 VCCGTX_BB66
VCCGTX_SENSE VSSGTX_SENSE
PDC
13 OF 20
VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT VCCGT
VCCGTX_AL43 VCCGTX_AL46 VCCGTX_AL50 VCCGTX_AL53 VCCGTX_AL56 VCCGTX_AL60
+VCCGT
C97
22U/6.3V_6C173
C641
22U/6.3V_6
Close U9052
C267 47U/6.3V_8
C640
22U/6.3V_6
C646
22U/6.3V_6
C291 47U/6.3V_8
C642
22U/6.3V_6
C639
22U/6.3V_6
C637 47U/6.3V_8
C98
22U/6.3V_6
C647
22U/6.3V_6
C241 47U/6.3V_8
C620
22U/6.3V_6
C197 47U/6.3V_8C89
C636
22U/6.3V_6
C99
22U/6.3V_6
C217 47U/6.3V_8
C645
22U/6.3V_6
N70 N71 R63 R64 R65 R66 R67 R68 R69 R70 R71 T62 U65 U68 U71 W63 W64 W65 W66 W67 W68 W69 W70 W71 Y62
AK42 AK43 AK45 AK46 AK48 AK50 AK52 AK53 AK55 AK56 AK58 AK60 AK70 AL43 AL46 AL50 AL53 AL56 AL60 AM48 AM50 AM52 AM53 AM56 AM58 AU58 AU63 BB57 BB66
AK62 AL61
?
12
A A
PROJECT:400 Series
PROJECT:400 Series
PROJECT:400 Series
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
12 -- SKYLAKE (POWER-2)
12 -- SKYLAKE (POWER-2)
NB5
NB5
5
4
3
2
NB5
12 -- SKYLAKE (POWER-2)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1A
1A
1A
12 65Monday, November 30, 2015
12 65Monday, November 30, 2015
12 65Monday, November 30, 2015
5
4
3
2
1
Need apply PN
+1.2VSUS
C485
C323
C366
D D
C445
10U/6.3V_4
10U/6.3V_4
1U/6.3V_4
1U/6.3V_4
C356
1U/6.3V_4
C333
1U/6.3V_4
Close U9052
C363
10U/6.3V_4
07/01 for EE shortpad
+1.2VSUS
R239 *0_4/S
C C
+VCCSTG +1.0V_STG
+VDDQC +1.0V_STG+1.0V_STG
C295
*1U/6.3V_4
R477 *0_4/S
R45 *0_6/S
C325 *10U/6.3V_4
C96
1U/6.3V_4
+VDDQC
+VCCSFR+VCCST
C101
1U/6.3V_4
C329
10U/6.3V_4
Under U9052
C351
10U/6.3V_4
10U/6.3V_6
C361
10U/6.3V_4
+1.2V_VCCPLL_OC
+1.2VSUS
C369
10U/6.3V_6
+VCCSFR
+1.0V_STG
R182 *0_4/S
+VCCSFR
C491
+VDDQC
C287 1U/6.3V_4
C183
1U/6.3V_4
C378
10U/6.3V_6
AU23 AU28 AU35 AU42 BB23 BB32 BB41 BB47 BB51
AM40
A18 A22
AL23
K20 K21
C379
10U/6.3V_6
U25N
VDDQ_AU23 VDDQ_AU28 VDDQ_AU35 VDDQ_AU42 VDDQ_BB23 VDDQ_BB32 VDDQ_BB41 VDDQ_BB47 VDDQ_BB51
VDDQC VCCST VCCSTG_A22 VCCPLL_OC VCCPLL_K20
VCCPLL_K21
*SKL_ULT
REV = 1
10U/6.3V_6
SKL_ULT
CPU POWER 3 OF 4
2A 2.73A
0.12A
0.04A
0.12A
C353
?
14 OF 20
C488
10U/6.3V_6
VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO VCCIO
VCCSA
4.5A
VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA VCCSA
VCCIO_SENSE VSSIO_SENSE
VSSSA_SENSE VCCSA_SENSE
1U/6.3V_4
?
C365
AK28 AK30 AL30 AL42 AM28 AM30 AM42
AK23 AK25 G23 G25 G27 G28 J22 J23 J27 K23 K25 K27 K28 K30
AM23 AM22
H21 H20
VCCIO_VCCSENSE VCCIO_VSSSENSE
C324
1U/6.3V_4
+VCC_IO
C297 1U/6.3V_4
+VCCSA
C190 1U/6.3V_4
1U/6.3V_4
C330
Under U9052 Close U9052Under U9052
C284 1U/6.3V_4
C202 1U/6.3V_4
C76 10U/6.3V_4
VCCIO_VCCSENSE [53] VCCIO_VSSSENSE [53]
VCCSA_VSSSENSE [55] VCCSA_VCCSENSE [55]
C322
1U/6.3V_4
C249 1U/6.3V_4
C62 1U/6.3V_4
C163 10U/6.3V_4
C222
C236
1U/6.3V_4
10U/6.3V_4
C79
C215
1U/6.3V_4
1U/6.3V_4
C168
C250
10U/6.3V_4
10U/6.3V_4
Trace Length Match <25mil
Trace Length Match <25mil
C285 10U/6.3V_4
C273 1U/6.3V_4
C203 10U/6.3V_4
C298 1U/6.3V_4
Under U9052
C214 1U/6.3V_4
C261 10U/6.3V_4
C260 1U/6.3V_4
C237
C77
10U/6.3V_4
10U/6.3V_4
Close U9052
C294 1U/6.3V_4
C69 10U/6.3V_4
C272 1U/6.3V_4
C286 10U/6.3V_4
C223 10U/6.3V_4
C72 10U/6.3V_4
C65 10U/6.3V_4
13
Close to CPU
B B
+VCCSFR [2,3,9,11,45] +1.0V_STG [2,11] +VCC_IO [5,15,53] +VCCSA [55,56]
A A
PROJECT:400 Series
PROJECT:400 Series
PROJECT:400 Series
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
13 -- SKYLAKE (POWER-3)
13 -- SKYLAKE (POWER-3)
NB5
NB5
5
4
3
2
NB5
13 -- SKYLAKE (POWER-3)
Date: Sheet of
Date: Sheet of
Date: Sheet
1
1A
1A
1A
of
13 65Monday, November 30, 2015
13 65Monday, November 30, 2015
13 65Monday, November 30, 2015
5
?
SKL_ULT
U25P
A5
VSS
A67
VSS
A70
VSS
AA2
VSS
AA4
VSS
AA65
D D
C C
B B
AA68 AB15 AB16 AB18 AB21
AD13 AD16 AD19 AD20 AD21 AD62
AE64 AE65 AE66 AE67 AE68 AE69
AF10 AF15 AF17
AF63 AG16 AG17 AG18 AG19 AG20 AG21 AG71
AH13
AH63
AH64
AH67
AJ15
AJ18
AJ20
AK11
AK16
AK18
AK21
AK22
AK27
AK63
AK68
AK69
AL28
AL32
AL35
AL38
AL45
AL48
AL52
AL55
AL58
AL64
AB8
AD8
AF1
AF2 AF4
AH6
AJ4
AK8 AL2
AL4
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
*SKL_ULT
REV = 1
GND 1 OF 3
Need apply PN
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
16 OF 20
?
AL65 AL66 AM13 AM21 AM25 AM27 AM43 AM45 AM46 AM55 AM60 AM61 AM68 AM71 AM8 AN20 AN23 AN28 AN30 AN32 AN33 AN35 AN37 AN38 AN40 AN42 AN58 AN63 AP10 AP18 AP20 AP23 AP28 AP32 AP35 AP38 AP42 AP58 AP63 AP68 AP70 AR11 AR15 AR16 AR20 AR23 AR28 AR35 AR42 AR43 AR45 AR46 AR48 AR5 AR50 AR52 AR53 AR55 AR58 AR63 AR8 AT2 AT20 AT23 AT28 AT35 AT4 AT42 AT56 AT58
4
AT63 AT68
AT71 AU10 AU15 AU20 AU32 AU38
AV68 AV69 AV70 AV71
AW10 AW12 AW14 AW16 AW18 AW21 AW23 AW26 AW28 AW30 AW32 AW34 AW36 AW38 AW41 AW43 AW45 AW47 AW49 AW51 AW53 AW55 AW57
AW6
AW60 AW62 AW64 AW66
AW8 AY66
BA10 BA14 BA18
BA23 BA28 BA32 BA36
BA45
3
?
Need apply PN Need apply PN
SKL_ULT
?
U25Q
GND 2 OF 3
VSS VSS VSS VSS VSS VSS VSS VSS
AV1
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
B10
VSS
B14
VSS
B18
VSS
B22
VSS
B30
VSS
B34
VSS
B39
VSS
B44
VSS
B48
VSS
B53
VSS
B58
VSS
B62
VSS
B66
VSS
B71
VSS
BA1
VSS VSS VSS VSS
BA2
VSS VSS VSS VSS VSS
F68
VSS VSS
17 OF 20
*SKL_ULT
REV = 1
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
PDC
BA49 BA53 BA57 BA6 BA62 BA66 BA71 BB18 BB26 BB30 BB34 BB38 BB43 BB55 BB6 BB60 BB64 BB67 BB70 C1 C25 C5 D10 D11 D14 D18 D22 D25 D26 D30 D34 D39 D44 D45 D47 D48 D53 D58 D6 D62 D66 D69 E11 E15 E18 E21 E46 E50 E53 E56 E6 E65 E71 F1 F13 F2 F22 F23 F27 F28 F32 F33 F35 F37 F38 F4 F40 F42 BA41
?
SKL_ULT
U25R
GND 3 OF 3
F8
VSS
G10
VSS
G22
VSS
G43
VSS
G45
VSS
G48
VSS
G5
VSS
G52
VSS
G55
VSS
G58
VSS
G6
VSS
G60
VSS
G63
VSS
G66
VSS
H15
VSS
H18
VSS
H71
VSS
J11
VSS
J13
VSS
J25
VSS
J28
VSS
J32
VSS
J35
VSS
J38
VSS
J42
VSS
J8
VSS
K16
VSS
K18
VSS
K22
VSS
K61
VSS
K63
VSS
K64
VSS
K65
VSS
K66
VSS
K67
VSS
K68
VSS
K70
VSS
K71
VSS
L11
VSS
L16
VSS
L17
VSS
18 OF 20
*SKL_ULT
REV = 1
VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS
L18 L2 L20 L4 L8 N10 N13 N19 N21 N6 N65 N68 P17 P19 P20 P21 R13 R6 T15 T17 T18 T2 T21 T4 U10 U63 U64 U66 U67 U69 U70 V16 V17 V18 W13 W6 W9 Y17 Y19 Y20 Y21
?
2
1
14
A A
PROJECT:400 Series
PROJECT:400 Series
PROJECT:400 Series
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
14 -- SKYLAKE (GND)
14 -- SKYLAKE (GND)
NB5
NB5
5
4
3
2
NB5
14 -- SKYLAKE (GND)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
1A
1A
1A
14 65Monday, November 30, 2015
14 65Monday, November 30, 2015
14 65Monday, November 30, 2015
5
H_PREQ#[7]
H_PRDY#[7]
CFG0[9] CFG1[9] CFG2[9] CFG3[9] CFG4[9]
CFG5[9]
CFG6[9] CFG7[9]
CK_XDP_P[9] CK_XDP_N[9]
H_TCK PCH_SPI_IO2
HOOK2
R303 *51_4
+3V
+1.0V_DEEP_SUS
D D
PVR, 0714
ON_OFF#1_Q[15,41,44,46]
PCH_SMBDATA[3,16,17,27]
PCH_SMBCLK[3,16,17,27]
H_TCK[2]
PCH_SPI_IO2[3,47]
+VCC_IO
C C
APS
+3V_DEEP_SUS
R302 150_4
+3VPCU
4
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7
R845 *0_4
CFG0 HOOK2
R301 1K/F_4
R538 1K/F_4
PCH_TDO XDP_TRST# PCH_TDI PCH_TMS
R342 1K/F_4
XDP_DBRESET#
MSR_ENABLE_N
3
SI1, 3/26 Correct XDP pin define
CN11
32
OBSFN_A0
33
OBSFN_A1
35
OBSDATA_A0
36
OBSDATA_A1
38
OBSDATA_A2
39
OBSDATA_A3
44
OBSDATA_B0
45
OBSDATA_B1
47
OBSDATA_B2
48
OBSDATA_B3
51
HOOK1
53
HOOK2
11
ITPCLK/HOOK4
10
ITPCLK#/HOOK5
7
DBR#/HOOK7
56
SDA
57
SCL
5
TDO
4
TRSTN
3
TDI
2
TMS
59
TCK0
1
GND17
60
GND16
6
CPU XDP
GND15
55
GND14
12
GND13
49
GND12
15
GND11
46
GND10
*Samtec BSH-030-01
VCC_OBS_CD VCC_OBS_AB
OBSDATA_C0 OBSDATA_C1 OBSDATA_C2 OBSDATA_C3
OBSDATA_D0 OBSDATA_D1 OBSDATA_D2 OBSDATA_D3
PWRGOOD/HOOK0
RESET#/HOOK6
OBSFN_B0
OBSFN_B1 OBSFN_C0 OBSFN_C1
OBSFN_D0 OBSFN_D1
HOOK3
TCK1
GND0 GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9
+1.0V_DEEP_SUS
9 52 41 42 29 28 26 25 23 22 20 19 17 16 14 13 54
PCH_TCK
58
VCCST_PWRGD_XDP
50 8 31
GND0
30 34 27 37 24 40 21 43 18
CFG17 CFG16 CFG8 CFG9 CFG10 CFG11 CFG19 CFG18 CFG12 CFG13 CFG14 CFG15 HOOK3
TP54
2
XDP_BPM0 [2]
XDP_BPM1 [2] CFG17 [9] CFG16 [9] CFG8 [9] CFG9 [9] CFG10 [9] CFG11 [9] CFG19 [9] CFG18 [9]
CFG12 [9] CFG13 [9] CFG14 [9] CFG15 [9]
PCH_TCK [2]
HOOK3
C413
0.1U/16V_4
R322 1K/F_4 R778 *0_4 R777 *0_4R340 *0_4
PV, 4/8 Add
R3311K/F_4 R3231.5K_4
R3441K/F_4
CFG3GND0
PCH_SPI1_SI
1
15
RSMRST# [3,46]
PCI_PLTRST# [3,31,32,34,37,38,45,46] ITP_PMODE [9]
PCH_SPI1_SI [3,34,45,47]
+SPI_VCC
CN16
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
B B
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
*ACES_88511-180N
XDP_DBRESET#
SLP_S3#_3R [3,44,46,57,63] SLP_S5#_3R [3,44]
SLP_S4#_3R [3,31,35,44,48,51,57] PM_SLP_A# [3,44,45,63]
RTC_RST# [9,44] ON_OFF#1_Q [15,41,44,46] XDP_DBRESET# [3,44] VRPPM_SLP_S0_N [3,44,57]
5
PWR_GOOD_3[3,46,48,63]
Q9A 2N7002KDW
3 4
61
2N7002KDW
2
Q9B
5
Q8A 2N7002KDW
3 4
XDP_TRST#
61
2N7002KDW
2
Q8B
H_TDI [2]
PCH_TDI [2] PCH_TMS [2]
H_TMS [2] H_TDO [2]
PCH_TDO [2]
H_TRST# [2]
PVR, 0714 change to DNI
R55 *51_4
A A
PROJECT:400 Series
PROJECT:400 Series
PROJECT:400 Series
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
15 -- HSW XDP & APS
15 -- HSW XDP & APS
NB5
NB5
5
4
3
2
NB5
15 -- HSW XDP & APS
Date: Sheet of
Date: Sheet of
Date: Sheet of
15 65Monday, November 30, 2015
15 65Monday, November 30, 2015
15 65Monday, November 30, 2015
1
1A
1A
1A
5
M_A_A[13:0][6]
D D
M_A_WE#[6] M_A_CAS#[6] M_A_RAS#[6]
DDR3_DRAMRST#[6,17]
+1.2VSUS
R862 *10K_4
R848 10K_4
5
M_A_ACT#[6] M_A_PARITY[6] M_A_ALERT#[6]
M_A_BS#0[6] M_A_BS#1[6]
M_A_BG#0[6] M_A_BG#1[6]
M_A_CS#0[6] M_A_CS#1[6] M_A_CKE0[6] M_A_CKE1[6]
M_A_CLKP0[6] M_A_CLKN0[6] M_A_CLKP1[6] M_A_CLKN1[6]
M_A_ODT0[6] M_A_ODT1[6]
PCH_SMBCLK[3,15,17,27]
PCH_SMBDATA[3,15,17,27]
R740 240_4 R742 240_4 R741 240_4 R743 240_4 R744 240_4 R746 240_4 R745 240_4 R747 240_4
R844 10K/F_4
+3V
PM_EXTTS#0[17]
C C
B B
+3V
A A
R846 *10K_4
CHA_SA0 CHA_SA2CHA_SA1
R850 10K_4
Follow reference board DIMM0 SA0,1,2=LLL 20150527
R847 *10K_4
R849 10K_4
M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13
PM_EXTTS#0
C1040 *0.1U/10V_4
PCH_SMBCLK PCH_SMBDATA
CHA_SA0 CHA_SA1 CHA_SA2
+1.2VSUS
TP123 TP124
M_A_CB0
M_A_CB1 M_A_CB2 M_A_CB3
M_A_CB4
M_A_CB5 M_A_CB6 M_A_CB7
JDIM2A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
A14/WE#
156
A15/CAS#
152
A16/RAS#
162
S2#/C0
165
S3#/C1
114
ACT#
143
PARITY
116
ALERT#
134
EVENT#
108
RESET#
150
BA0
145
BA1
115
BG0
113
BG1
149
S0#
157
S1#
109
CKE0
110
CKE1
137
CK0
139
CK0#
138
CK1
140
CK1#
155
ODT0
161
ODT1
253
SCL
254
SDA
256
SA0
260
SA1
166
SA2
92
CB0
91
CB1
101
CB2
105
CB3
88
CB4
87
CB5
100
CB6
104
CB7
12
DM0
33
DM1
54
DM2
75
DM3
178
DM4
199
DM5
220
DM6
241
DM7
96
DM8
4
M_A_DQ[63:0] [6]
M_A_DQ4
8
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48
(260P)
DDR4 SODIMM 260 PIN
DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
EZIW
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 DQS#8
4
7 20 21 4 3 16 17 28 29 41 42 24 25 38 37 50 49 62 63 46 45 58 59 70 71 83 84 66 67 79 80 174 173 187 186 170 169 183 182 195 194 207 208 191 190 203 204 216 215 228 229 211 212 224 225 237 236 249 250 232 233 245 246
13 34 55 76 179 200 221 242 97
11 32 53 74 177 198 219 240 95
M_A_DQ0 M_A_DQ7 M_A_DQ3 M_A_DQ1 M_A_DQ5 M_A_DQ2 M_A_DQ6 M_A_DQ9 M_A_DQ12 M_A_DQ10 M_A_DQ14 M_A_DQ8 M_A_DQ13 M_A_DQ15 M_A_DQ11 M_A_DQ17 M_A_DQ21 M_A_DQ22 M_A_DQ18 M_A_DQ20 M_A_DQ16 M_A_DQ23 M_A_DQ19 M_A_DQ28 M_A_DQ24 M_A_DQ31 M_A_DQ27 M_A_DQ25 M_A_DQ29 M_A_DQ26 M_A_DQ30 M_A_DQ37 M_A_DQ33 M_A_DQ38 M_A_DQ35 M_A_DQ32 M_A_DQ36 M_A_DQ34 M_A_DQ39 M_A_DQ40 M_A_DQ43 M_A_DQ41 M_A_DQ47 M_A_DQ45 M_A_DQ44 M_A_DQ42 M_A_DQ46 M_A_DQ53 M_A_DQ52 M_A_DQ55 M_A_DQ50 M_A_DQ49 M_A_DQ48 M_A_DQ54 M_A_DQ51 M_A_DQ56 M_A_DQ60 M_A_DQ59 M_A_DQ63 M_A_DQ57 M_A_DQ61 M_A_DQ62 M_A_DQ58
M_A_DQSP0 M_A_DQSP1 M_A_DQSP2 M_A_DQSP3 M_A_DQSP4 M_A_DQSP5 M_A_DQSP6 M_A_DQSP7
M_A_DQSP8 M_A_DQSN0
M_A_DQSN1 M_A_DQSN2 M_A_DQSN3 M_A_DQSN4 M_A_DQSN5 M_A_DQSN6 M_A_DQSN7 M_A_DQSN8
M_A_DQSP8
M_A_DQSN8
M_A_DQSP[7:0] [6]
M_A_DQSN[7:0] [6]
R722
240_4
R723
240_4
+1.2VSUS
+1.2VSUS
3
2.48A
3
2
+1.2VSUS
SM_VREF[6]
JDIM2B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89
VSS22
93
VSS23
99
VSS24
103
VSS25
107
VSS26
167
VSS27
171
VSS28
175
VSS29
181
VSS30
185
VSS31
189
VSS32
193
VSS33
197
VSS34
201
VSS35
205
VSS36
209
VSS37
213
VSS38
217
VSS39
223
VSS40
227
VSS41
231
VSS42
235
VSS43
239
VSS44
243
VSS45
247
VSS46
251
VSS47
VDDSPD
VPP1 VPP2
VREF_CA
VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68
(260P)
DDR4 SODIMM 260 PIN
VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94
GND GND
VREF DQ0 M1 Solution
R863 2/F_6
C1041
0.022U/25V_4
2 1
R349 24.9/F_4
255
257 259
258
VTT
164
2 6 10 14 18 22 26 30 36 40 44 48 52 56 60 64 68 72 78 82 86 90 94 98 102 106 168 172 176 180 184 188 192 196 202 206 210 214 218 222 226 230 234 238 244 248 252
261 262
+1.2VSUS
+3V
+2.5VSUS
+0.6V_DDR_VTT
+SMDDR_VREF_DQ0 +SMDDR_VREF_DIMM
R345 1K/F_4
+SMDDR_VREF_DIMM
R346 1K/F_4
+0.6V_DDR_VTT[17,51,57]
2
R861 *0_6/S
+1.2VSUS
+SMDDR_VREF_DIMM
+2.5VSUS[17,51]
+3V[2,3,4,5,7,8,9,10,15,17,24,26,27,28,30,31,32,33,34,36,38,42,44,45,49,55,57,63]
+1.2VSUS[6,13,17,51,57]
+0.6V_DDR_VTT
+2.5VSUS
Place these Caps near So-Dimm0.
1uF/10uF 4pcs on each side of connector
C437 1U/6.3V_4 C443 1U/6.3V_4 C487 1U/6.3V_4 C435 1U/6.3V_4 C467 1U/6.3V_4 C457 1U/6.3V_4 C462 1U/6.3V_4 C434 1U/6.3V_4
C452 10U/6.3V_6 C455 10U/6.3V_6 C494 10U/6.3V_6 C430 10U/6.3V_6 C493 10U/6.3V_6 C492 10U/6.3V_6 C469 10U/6.3V_6 C475 10U/6.3V_6
C482 1U/6.3V_4 C484 1U/6.3V_4 C461 1U/6.3V_4 C456 1U/6.3V_4 C468 10U/6.3V_6
C497 *0.1U/16V_4 C1038 *2.2U/6.3V_4
C478 0.1U/16V_4 C479 2.2U/6.3V_4
+3V
C472 0.1U/16V_4 C480 2.2U/6.3V_4
+1.2VSUS
+0.6V_DDR_VTT
PROJECT :Y11X-6L
PROJECT :Y11X-6L
PROJECT :Y11X-6L
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
17 -- DDR4 DIMM0-STD(4.0H)
17 -- DDR4 DIMM0-STD(4.0H)
17 -- DDR4 DIMM0-STD(4.0H)
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
17
For EMI RESERVE
EC5 *120P/50V_4 EC7 *120P/50V_4 EC9 *120P/50V_4 EC10 *0.1U/16V_4 EC19 *0.1U/16V_4 EC12 *0.1U/16V_4 EC11 2.2U/6.3V_4 EC17 *120P/50V_4 EC8 *120P/50V_4 EC2 *120P/50V_4 EC20 120P/50V_4 EC18 *120P/50V_4 EC22 82P/50V_4 EC21 *120P/50V_4
EC1 *120P/50V_4 EC3 *120P/50V_4
EC14 2200P/50V_4
EC6 2.2U/6.3V_4 EC15 2.2U/6.3V_4
EC13 82P/50V_4
16 65Monday, November 30, 2015
16 65Monday, November 30, 2015
1
16 65Monday, November 30, 2015
1A
1A
1A
5
M_B_A[13:0][6]
D D
M_B_WE#[6] M_B_CAS#[6] M_B_RAS#[6]
M_B_ACT#[6] M_B_PARITY[6] M_B_ALERT#[6]
PM_EXTTS#0[16]
DDR3_DRAMRST#[6,16]
C C
+3V
10K_4
R750 *10K_4
R752 *10K_4
10K_4
R751 *10K_4
CHB_SA0 CHB_SA1 CHB_SA2
R749 10K_4
Follow reference board DIMM1 SA0,1,2=LHL 20150527
B B
M_B_BS#0[6] M_B_BS#1[6]
M_B_BG#0[6] M_B_BG#1[6]
M_B_CS#0[6] M_B_CS#1[6] M_B_CKE0[6] M_B_CKE1[6]
M_B_CLKP0[6] M_B_CLKN0[6] M_B_CLKP1[6] M_B_CLKN1[6]
M_B_ODT0[6] M_B_ODT1[6]
PCH_SMBCLK[3,15,16,27]
PCH_SMBDATA[3,15,16,27]
+1.2VSUS +1.2VSUS+0.6V_DDR_VTT
R851 240_4 R856 240_4 R857 240_4 R855 240_4 R858 240_4 R854 240_4 R852 240_4 R853 240_4
M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13
PM_EXTTS#0
C1032 *0.1U/10V_4
CHB_SA0 CHB_SA1 CHB_SA2
+1.2VSUS
TP125 TP126
M_B_ODT0 M_B_ODT1
M_B_CB0 M_B_CB1 M_B_CB2 M_B_CB3 M_B_CB4 M_B_CB5 M_B_CB6 M_B_CB7
144 133 132 131 128 126 127 122 125 121 146 120 119 158 151 156 152
162 165
114 143 116 134 108
150 145 115 113
149 157 109 110
137 139 138 140
155 161
253 254
256 260 166
92
91 101 105
88
87 100 104
12
33
54
75 178 199 220 241
96
JDIM1A
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14/WE# A15/CAS# A16/RAS#
S2#/C0 S3#/C1
ACT# PARITY ALERT# EVENT# RESET#
BA0 BA1 BG0 BG1
S0# S1# CKE0 CKE1
CK0 CK0# CK1 CK1#
ODT0 ODT1
SCL SDA
SA0 SA1 SA2
CB0 CB1 CB2 CB3 CB4 CB5 CB6 CB7
DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7 DM8
4
M_B_DQ12
8
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48
(260P)
DDR4 SODIMM 260 PIN
DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7 DQS8
DQS#0 DQS#1 DQS#2 DQS#3 DQS#4 DQS#5 DQS#6 DQS#7 DQS#8
M_B_DQ8
7
M_B_DQ11
20
M_B_DQ10
21
M_B_DQ9
4
M_B_DQ13
3
M_B_DQ15
16
M_B_DQ14
17
M_B_DQ4
28
M_B_DQ0
29
M_B_DQ3
41
M_B_DQ6
42
M_B_DQ5
24
M_B_DQ1
25
M_B_DQ2
38
M_B_DQ7
37
M_B_DQ17
50
M_B_DQ16
49
M_B_DQ18
62
M_B_DQ19
63
M_B_DQ21
46
M_B_DQ20
45
M_B_DQ22
58
M_B_DQ23
59
M_B_DQ25
70
M_B_DQ24
71
M_B_DQ30
83
M_B_DQ31
84
M_B_DQ28
66
M_B_DQ29
67
M_B_DQ26
79
M_B_DQ27
80
M_B_DQ36
174
M_B_DQ37
173
M_B_DQ39
187
M_B_DQ35
186
M_B_DQ32
170
M_B_DQ33
169
M_B_DQ34
183
M_B_DQ38
182
M_B_DQ44
195
M_B_DQ41
194
M_B_DQ42
207
M_B_DQ43
208
M_B_DQ45
191
M_B_DQ40
190
M_B_DQ46
203
M_B_DQ47
204
M_B_DQ48
216
M_B_DQ52
215
M_B_DQ55
228
M_B_DQ54
229
M_B_DQ49
211
M_B_DQ53
212
M_B_DQ50
224
M_B_DQ51
225
M_B_DQ57
237
M_B_DQ56
236
M_B_DQ58
249
M_B_DQ62
250
M_B_DQ61
232
M_B_DQ60
233
M_B_DQ59
245
M_B_DQ63
246
M_B_DQSP1
13
M_B_DQSP0
34
M_B_DQSP2
55
M_B_DQSP3
76
M_B_DQSP4
179
M_B_DQSP5
200
M_B_DQSP6
221
M_B_DQSP7
242
M_B_DQSP8
97
M_B_DQSN1
11
M_B_DQSN0
32
M_B_DQSN2
53
M_B_DQSN3
74
M_B_DQSN4
177
M_B_DQSN5
198
M_B_DQSN6
219
M_B_DQSN7
240
M_B_DQSN8
95
M_B_DQSP[7:0] [6]
M_B_DQSN[7:0] [6]
3
M_B_DQ[63:0] [6]
+1.2VSUS
R753
240_4
M_B_DQSP8
+1.2VSUS
R754
240_4
M_B_DQSN8
2.48A
+1.2VSUS
2
JDIM1B
111
VDD1
112
VDD2
117
VDD3
118
VDD4
123
VDD5
124
VDD6
129
VDD7
130
VDD8
135
VDD9
136
VDD10
141
VDD11
142
VDD12
147
VDD13
148
VDD14
153
VDD15
154
VDD16
159
VDD17
160
VDD18
163
VDD19
1
VSS1
5
VSS2
9
VSS3
15
VSS4
19
VSS5
23
VSS6
27
VSS7
31
VSS8
35
VSS9
39
VSS10
43
VSS11
47
VSS12
51
VSS13
57
VSS14
61
VSS15
65
VSS16
69
VSS17
73
VSS18
77
VSS19
81
VSS20
85
VSS21
89 93
99 103 107 167 171 175 181 185 189 193 197 201 205 209 213 217 223 227 231 235 239 243 247 251
VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47
DDR4 SODIMM 260 PIN
VDDSPD
VREF_CA
(260P)
VPP1 VPP2
VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94
GND GND
255
257 259
258
VTT
164
2 6 10 14 18 22 26 30 36 40 44 48 52 56 60 64 68 72 78 82 86 90 94 98 102 106 168 172 176 180 184 188 192 196 202 206 210 214 218 222 226 230 234 238 244 248 252
261 262
+3V
+2.5VSUS
+0.6V_DDR_VTT
R860 *0_6/S
SMDDR_VREF_DQ1_M1+SMDDR_VREF_DQ1
Place these Caps near So-Dimm1.
1uF/10uF 4pcs on each side of connector
+1.2VSUS
C495 1U/6.3V_4 C438 1U/6.3V_4 C490 1U/6.3V_4 C446 1U/6.3V_4 C477 1U/6.3V_4 C447 1U/6.3V_4 C496 1U/6.3V_4 C449 1U/6.3V_4 C470 10U/6.3V_6
C476 10U/6.3V_6 C426 10U/6.3V_6
C465 10U/6.3V_6 C444 10U/6.3V_6
C454 10U/6.3V_6 C429 10U/6.3V_6R748
C459 10U/6.3V_6
For RF RESERVE For RF RESERVE
EC23 82P/50V_4 EC26 2200P/50V_4
1
18
+0.6V_DDR_VTT
C453 1U/6.3V_4 C448 1U/6.3V_4 C440 1U/6.3V_4 C474 1U/6.3V_4 C464 10U/6.3V_6
+3V
C441 0.1U/16V_4 C436 2.2U/6.3V_6
+2.5VSUS
C499 *0.1U/16V_4 C460 *2.2U/6.3V_6
SMDDR_VREF_DQ1_M1
C450 *0.1U/16V_4 C458 *2.2U/6.3V_6R859
EC24 2.2U/6.3V_4 EC16 82P/50V_4
+1.2VSUS
VREF DQ1 M1 Solution
R867 1K/F_4
SMDDR_VREF_DQ1_M1
SMDDR_VREF_DQ1_M3[6]
A A
+1.2VSUS[6,13,16,51,57]
+0.6V_DDR_VTT[16,51,57]
+2.5VSUS[16,51]
+3V[2,3,4,5,7,8,9,10,15,16,24,26,27,28,30,31,32,33,34,36,38,42,44,45,49,55,57,63]
5
4
3
2
SMDDR_VREF_DQ1_M3
R865 2/F_6
C1039
0.022U/25V_4
2 1
R868
24.9/F_4
PROJECT :Y11X-6L
PROJECT :Y11X-6L
PROJECT :Y11X-6L
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev Custom
Custom
Custom
18 -- DDR3 DIMM1-RVS(4.0H)
18 -- DDR3 DIMM1-RVS(4.0H)
18 -- DDR3 DIMM1-RVS(4.0H)
Date: Sheet of
Date: Sheet of
Date: Sheet of
R864 1K/F_4
1A
1A
1A
17 65Monday, November 30, 2015
17 65Monday, November 30, 2015
1
17 65Monday, November 30, 2015
PEG_TXP1[7] PEG_TXN1[7]
PEG_TXP2[7] PEG_TXN2[7]
PEG_TXP3[7] PEG_TXN3[7]
PEG_TXP4[7] PEG_TXN4[7]
CLK_GFX_P[9] CLK_GFX_N[9]
R100 1K/F_4
PEG_TXP1 PEG_TXN1
PEG_TXP2 PEG_TXN2
PEG_TXP3 PEG_TXN3
PEG_TXP4 PEG_TXN4
CLK_GFX_P CLK_GFX_N
TEST_PG
PEGX_RST#
AF30
AE31
AE29 AD28
AD30 AC31
AC29 AB28
AB30 AA31
AA29
W31
W29
AK30 AK32
AL27
Y28
Y30
V28
V30 U31
U29
R31
R29 P28
P30 N31
N29 M28
M30
K30
N10
T28
T30
L31
L29
U23A
PCIE_RX0P PCIE_RX0N
PCIE_RX1P PCIE_RX1N
PCIE_RX2P PCIE_RX2N
PCIE_RX3P PCIE_RX3N
PCIE_RX4P PCIE_RX4N
PCIE_RX5P PCIE_RX5N
PCIE_RX6P PCIE_RX6N
PCIE_RX7P PCIE_RX7N
NC#V30 NC#U31
NC#U29 NC#T28
NC#T30 NC#R31
NC#R29 NC#P28
NC#P30 NC#N31
NC#N29 NC#M28
NC#M30 NC#L31
NC#L29 NC#K30
CLOCK
PCIE_REFCLKP PCIE_REFCLKN
TEST_PG
PERSTB
Topaz_S3
PCI EXPRESS INTERFACE
CALIBRATION
PCIE_CALR_TX PCIE_CALR_RX
PCIE_TX0P PCIE_TX0N
PCIE_TX1P PCIE_TX1N
PCIE_TX2P PCIE_TX2N
PCIE_TX3P PCIE_TX3N
PCIE_TX4P PCIE_TX4N
PCIE_TX5P PCIE_TX5N
PCIE_TX6P PCIE_TX6N
PCIE_TX7P PCIE_TX7N
NC#W24 NC#W23
NC#V27 NC#U26
NC#U24 NC#U23
NC#T26 NC#T27
NC#T24 NC#T23
NC#P27 NC#P26
NC#P24 NC#P23
NC#M27 NC#N26
9/2: CZ use 0.22u(Gen 3) ; CZ-L use 0.1u(Gen 2)
DGPU_HOLD_RST#[7]
C_PEG_RXP1 C_PEG_RXN1
C_PEG_RXP2 C_PEG_RXN2
C_PEG_RXP3 C_PEG_RXN3
C_PEG_RXP4 C_PEG_RXN4
SUN_PCIE_CALRP SUN_PCIE_CALRN
PLTRST#[3,4,8,34]
C107 0.22U/10V_4 C108 0.22U/10V_4
C109 0.22U/10V_4 C110 0.22U/10V_4
C114 0.22U/10V_4 C113 0.22U/10V_4
C112 0.22U/10V_4 C111 0.22U/10V_4
R532 1.69K/F_4
R526 1K/F_4
C561 *0.1U/16V_4
R436 *0_4/S
07/01 for EE shortpad
AH30 AG31
AG29 AF28
AF27 AF26
AD27 AD26
AC25 AB25
Y23 Y24
AB27 AB26
Y27 Y26
W24 W23
V27 U26
U24 U23
T26 T27
T24 T23
P27 P26
P24 P23
M27 N26
Y22 AA22
*MC74VHC1G08DFT2G
DGPU_HIN_RST#
+1.0V_VGA
+3V_VGA
U20
2 1
Platform Carrizo CH4222K9B04
PEG_RXP1 [7]
PEG_RXN1 [7]
PEG_RXP2 [7]
PEG_RXN2 [7]
PEG_RXP3 [7]
PEG_RXN3 [7]
PEG_RXP4 [7]
PEG_RXN4 [7]
3 5
4
Gen 3 Gen 1/Gen 2
C574
*0.1U/16V_4
PEGX_RST#
R472 *100K/F_4
CH4102K1B03Carrizo-L
+1.8V_VGA
+1.0V_VGA
PLTRST#
DGPU_HIN_RST#
PEGX_RST# [19]
P/NType
18
1.8V ( 40mA)
C116 10U/6.3VS_6
1.0V ( 32mA)
C634 *10U/6.3VS_6
2
1
D19
BAT54AW-L
U23G
AG15
NC_DP_VDDR#1
AG16
NC_DP_VDDR#2
AF16
NC_DP_VDDR#3
AG17
NC_DP_VDDR#4
AG18
NC_DP_VDDR#5
AG19
NC_DP_VDDR#6
AF14
C120
1U/10V_4
C118
C136
+3V_VGA
0.1U/16V_4
R471 1K/F_4
PEGX_RST#
1U/10V_4
3
DP_VDDR
AG20
NC_DP_VDDC#1
AG21
NC_DP_VDDC#2
AF22
NC_DP_VDDC#3
AG22
NC_DP_VDDC#4
AD14
DP_VDDC
AG14
NC_DP_VSSR#1
AH14
NC_DP_VSSR#2
AM14
NC_DP_VSSR#3
AM16
NC_DP_VSSR#4
AM18
NC_DP_VSSR#5
AF23
NC_DP_VSSR#6
AG23
NC_DP_VSSR#7
AM20
NC_DP_VSSR#8
AM22
NC_DP_VSSR#9
AM24
NC_DP_VSSR#10
AF19
NC_DP_VSSR#11
AF20
NC_DP_VSSR#12
AE14
DP_VSSR
AF17
NC_UPHYAB_DP_CALR
Topaz_S3
NC/DP POWERDP POWER
+3V_VGA[19,21,60] +1.8V_VGA[19,21,58,60] +1.0V_VGA[21,60]
NC#AE11 NC#AF11 NC#AE13 NC#AF13
NC#AG8
NC#AG10
NC#AF6 NC#AF7 NC#AF8 NC#AF9
NC#AE1 NC#AE3 NC#AG1 NC#AG6 NC#AH5
NC#AF10
NC#AG9 NC#AH8 NC#AM6 NC#AM8 NC#AG7
NC#AG11
NC#AE10
AE11 AF11 AE13 AF13 AG8 AG10
AF6 AF7 AF8 AF9
AE1 AE3 AG1 AG6 AH5 AF10 AG9 AH8 AM6 AM8 AG7 AG11
AE10
PROJECT:400 Series
PROJECT:400 Series
PROJECT:400 Series
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
18 -- Meso_S3_PCIE/DP POWER
18 -- Meso_S3_PCIE/DP POWER
NB5
NB5
NB5
18 -- Meso_S3_PCIE/DP POWER
Date: Sheet of
Date: Sheet of
Date: Sheet
1A
1A
1A
of
18 65Monday, November 30, 2015
18 65Monday, November 30, 2015
18 65Monday, November 30, 2015
+3V_VGA
DGPU_PWR_EN[7,48,60]
R450 100K/F_4 R567 *10K/F_4 R571 *10K/F_4 R579 *10K/F_4 R122 *10K/F_4 R558 R451 *10K/F_4
R559 *10K/F_4
ADP_PRES_OUT[3,45]
AMD recommend
PCH_KBC_DATA[42,45]
PCH_KBC_CLK[42,45]
+3V_VGA
R108 *5.1K/F_4
TESTEN
R123 1K/F_4
GPU_AC_BATT DGPU_TDI DGPU_TMS DGPU_TDO DGPU_TRSTB
*10K/F_4
PCIE_REQ_GPU#_L DGPU_PROCHOT#
TEMP_FAIL
R536 *0_4/S
07/01 for EE shortpad
R531 *0_4/S
07/01 for EE shortpad
Pure UMA can remove
R65
2
30K/F_4
C132
0.47U/6.3V_4
R484 *10K/F_4
R682 *0_4
D20
GPU_AC_BATT
21
*RB500V-40
R530 *0_4
Q41A 2N7002KDW
3 4
5
2
GPUT_CLK
6 1
Q41B 2N7002KDW
R537 *0_4
C579 12P/50V_4
1
2
4
3
C580 12P/50V_4
9/2: follow Ref SCH by FAE
VGA_REQ PCIE_REQ_GPU#
D6 RB500V-40
Q12 METR5213-G
1 3
DGPU_PG[7,58]
PCIE_REQ_GPU#
9/4: change to 47K ohm for CRB
Dual
R527 *0_4/S
Dual
Y3
27MHZ +-10PPM
+1.8V_VGA
DGPUT_DATAGPUT_DATA
R533 4.7K_4
DGPUT_CLK
EVGA-XTALI
R478 1M_4
EVGA-XTALO
HCB1608KF-121T30(120+-25%,3A)
10/6 : FAE request reserve
21
R58
2
*10K/F_4
1 3
+3V_VGA
+3V_VGA
TP7
PEGX_RST# [18]
9/9: follow AMD CRB design
+3V_VGA
L20
1.8V(13mA TSVDD)
C583
1U/10V_4
PCIE_REQ_GPU# [9]
Q10 *METR3904-G
10/7 : remove TP for no use
+1.8V_VGA
9/11: follow CRB change to 10K
TP43 TP44
R554 4.7K_4 R549 4.7K_4
R534 47K/F_4 R528 47K/F_4
DGPUT_DATA DGPUT_CLK
+3V_VGA
R545 10K/F_4
GPIO22_ROMCS
TP5
R529 *0_4/S R535 *0_4/S R492 *0_4/S
TP6 TP47 TP49 TP53 TP50 TP52
TP57
R461 *0_4
TP32
PCIE_REQ_GPU#_L
TP12
TP56 TP58 TP59 TP61
TP33
GPU_GPIO6
R539 10K_4
DGPUT_DATA_R DGPUT_CLK_R GPU_GPIO5GPU_AC_BATT
GPIO8_ROMSO GPIO9_ROMSI GPIO10_ROMSCK
VGA_ALERT
DGPU_TRSTB
DGPU_TDI DGPU_TCK DGPU_TMS DGPU_TDO TESTEN
EVGA-XTALI EVGA-XTALO
R468 10K/F_4 R469 10K/F_4
TP45 TP46
R540 10K_4
TEMP_FAIL
DGPU_PROCHOT#_RDGPU_PROCHOT#
PX_EN
GPU_THERMDA GPU_THERMDC
+1.8V_TSVDD
U23B
DVO
N9
DBG_DATA16
L9
DBG_DATA15
AE9
DBG_DATA14
Y11
DBG_DATA13
AE8
DBG_DATA12
AD9
DBG_DATA11
AC10
DBG_DATA10
AD7
DBG_DATA9
AC8
DBG_DATA8
AC7
DBG_DATA7
AB9
DBG_DATA6
AB8
DBG_DATA5
AB7
DBG_DATA4
AB4
DBG_DATA3
AB2
DBG_DATA2
Y8
DBG_DATA1
Y7
DBG_DATA0
W6
NC#W6
V6
NC#V6
AC5
NC#AC5
AC6
N#CAC6
AA5
NC#AA5
AA6
NC#AA6
U1
NC#U1/BP_0
U3
NC#U3/BP_1
Y6
NC#Y6
R1
SCL
R3
I2C
SDA
GENERAL PURPOSE I/O
U6
GPIO_0
U8
SMBDATA
U7
SMBCLK
T9
GPIO_5_AC_BATT
T8
PCC/GPIO_6
T7
NC_GPIO_7
P10
GPIO_8_ROMSO
P4
GPIO_9_ROMSI
P2
GPIO_10_ROMSCK
N6
NC_GPIO_11
N5
NC_GPIO_12
N3
NC_GPIO_13
N1
GPIO_15_PWRCNTL_0
M4
GPIO_16
R6
GPIO_17_THERMAL_INT
M2
GPIO_19_CTF
P8
GPIO_20_PWRCNTL_1
P7
GPIO_21
N8
GPIO_22_ROMCSB
AK10
GPIO_29
AM10
GPIO_30
N7
CLKREQB
L6
JTAG_TRSTB
L5
JTAG_TDI
L3
JTAG_TCK
L1
JTAG_TMS
K4
JTAG_TDO
K7
TESTEN
AF24
NC#AF24
W8
NC_GENERICB
W7
NC_GENERICD
AD10
NC_GENERICE_HPD4
AJ9
NC#AJ9
AL9
DBG_CNTL0
AB16
PX_EN
AC16
NC_DBG_VREFG
PLL/CLOCK
AM28
XTALIN
AK28
XTALOUT
AC22
XO_IN
AB22
XO_IN2
T4
DPLUS
T2
DMINUS
R5
GPIO28_FDO
AD17
TSVDD
AC17
TSVSS
Topaz_S3
+1.8V_VGA [18,21,58,60] +1.0V_VGA [18,21,60]
THERMAL
NC#AF2 NC#AF4
NC#AG3
DPA
NC#AG5 NC#AH3
NC#AH1 NC#AK3
NC#AK1
NC#AK5 NC#AM3
NC#AK6 NC#AM5
DPB
NC#AJ7
NC#AH6 NC#AK8
NC#AL7
DPC
NC#V4 NC#U5
NC#V2 NC#Y4
NC#W5
NC#Y2 NC#J8
NC#AA1/PLL_ANALOG_IN
NC#AA3/PLL_ANALOG_OUT
DCM/NC_R
NC_AVSSN#AK26
NC_G
NC_AVSSN#AJ25
NC_B
NC_AVSSN#AG25
DAC1
NC_HSYNC
NC_VSYNC/WAKEb
NC_RSET NC_AVDD
NC_AVSSQ NC_VDD1DI
NC_VSS1DI
NC_SVI2#1/GPIO_SVD
NC_SVI2#2/GPIO_SVT
NC_SVI2#3/GPIO_SVC
NC_GENLK_CLK
NC_GENLK_VSYNC
DAC2
NC_SWAPLOCKA NC_SWAPLOCKB
DDC/AUX
NC_DDC1CLK
NC_DDC1DATA
NC_AUX1P NC_AUX1N
NC_AUX2P NC_AUX2N
NC#AE16 NC#AD16
NC_DDCVGACLK
NC_DDCVGADATA
AF2 AF4
AG3 AG5
AH3 AH1
AK3 AK1
AK5 AM3
AK6 AM5
AJ7 AH6
AK8 AL7
V4 U5
V2 Y4
W5
Y2 J8
AA1 AA3
AM26 AK26
AL25 AJ25
AH24 AG25
AH26 AJ27
AD22 AG24
AE22 AE23
AD23
AM12
NC
AK12 AL11 AJ11
AL13 AJ13
AG13 AH12
AC19
PS_0
AD19
PS_1
AE17
PS_2
AE20
PS_3
AE19
TS_A
AE6 AE5
AD2 AD4
AD13 AD11
AE16 AD16
AC1 AC3
For AMD tuning timing purpose
+1.8V_VGA
R446
8.45K/F_4
PS_0 PS_1
R456 2K/F_4
+1.8V_VGA +1.8V_VGA
R444 *0_4
PS_2 PS_3
R465
4.75K/F_4
TP40
R439 16.2K/F_4
Follow AMD check list
R470 *10K/F_4
+3V_VGA
R475 *4.7K_4
R474 *4.7K_4
9/4: follow CRB design by FAE
R473
4.7K_4
GPU_SVD GPU_SVT GPU_SVC
PS_0 PS_1 PS_2 PS_3
R466 *0_4
Reserved. Do not connect on the PCB
Vendor ID 00 = Samsung
TP38
01 = Hynix
TP37
10 = Micron 11 = Nanya
+1.8V_VGA
10/1 : Gen 3 support or not
Gen 3 : PU 8.45K ; PD 2K Gen 2 : PU NC ; PD 4.75K
R445
8.45K/F_4
C585 *0.01U/50V_4
C572 *0.68U/4V_4
R455 2K/F_4
R447
4.75K/F_4
R467 *10K/F_4
C584
*0.082U/16V_4
C573 *0.01U/50V_4
BIT5 => BIT0 PS0 => 11001 PS1 => 11000 PS2 => 11000 PS3 => 11000
2
Q40
3
1
*2N7002K
GPU_SVD GPU_SVC GPU_SVT
1K/F_4 R72
GPU_GPIO6
C128
0.1U/16V_4
PS_3[3:1]
000
001 010 011 100 101 MT41J256M16HA-093G:EMicron- E die 256Mx16 *4, 1Ghz 110 111 NC
VRAM density 0=128Mx16
1=258Mx16
07/01 for EE shortpad
R443 *0_4/S R442 *0_4/S R441 *0_4/S
+3V_VGA
R66 10K/F_4
VRHOT [58]
Samsung- Q die
Samsung- E die Hynix- Huma F die Hynix- C(Polaris)
Micron- K die
Nanya- D die
TP30
SVI2_DATA [58] SVI2_CLK [58] SVI2_SVT [58]
GPU_SVD
R464 *10K/F_4 R463 *10K/F_4 R462 *10K/F_4
GPU_SVC GPU_SVT
R454 *10K/F_4 R453 *10K/F_4 R452 *10K/F_4
9/11: Add for SR Tool review result
Vendor Type Vendor P/N
256Mx16 *4, 1Ghz 128Mx16 *4, 1Ghz 256Mx16 *4, 1Ghz H5TC4G63CFR-N0C 128Mx16 *4, 1Ghz MT41J128M16JT-093G:K
128Mx16 *4, 1Ghz 256Mx16 *4, 1Ghz
K4W2G1646Q-BC1A128Mx16 *4, 1Ghz K4W4G1646E-BC1A H5TC2G63FFR-11C
NT5CB128M16FP-FL NT5CB256M16DP-FL
Meso Multi-level Pin Straps MLPS Bit: PS_3
mappings between the bit values and resistor values
+1.8V_VGA
QCI P/N
AKD5MGST508/AKD5MGST509 AKD5PGDT500/AKD5PGDT501 AKD5MZDTW02/AKD5MZDTW03 AKD5PZDTW01/AKD5PZDTW02 AKD5MGSTL16/AKD5MGSTL17 AKD5PZSTL00/AKD5PZSTL01 AKD5MGSTF03/AKD5MGSTF04Nanya- I die AKD5PGDTF02/AKD5PGDTF03
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
NB5
NB5
NB5
Date: Sheet of
Date: Sheet of
Date: Sheet of
PU PD
8.45K 2K
4.53K 2K
6.98K
4.53K 4.99K
3.24K 5.62K
3.4K
4.75K
PROJECT:400 Series
PROJECT:400 Series
PROJECT:400 Series
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
19 -- Meso_S3_Main
19 -- Meso_S3_Main
19 -- Meso_S3_Main
19
4.75K
NC
4.99K
10K
1A
1A
1A
19 65Monday, November 30, 2015
19 65Monday, November 30, 2015
19 65Monday, November 30, 2015
AA27 AB24
AB32 AC24 AC26 AC27 AD25 AD32
AE27
AF32 AG27 AH32
K28 K32
M32 N25 N27 P25 P32 R27
U25 U27
V32 W25 W26 W27
Y25
Y32
N11
N13
N16
N18
N21
R12
R15
R17
R20
U15
U17
U20
V13
V16
V18
Y10
Y15
Y17
Y20
AA11
M12
V11
L27
T25 T32
M6
P6 P9
T13 T16 T18 T21
T6
U9
U23E
PCIE_VSS#1 PCIE_VSS#2 PCIE_VSS#3 PCIE_VSS#4 PCIE_VSS#5 PCIE_VSS#6 PCIE_VSS#7 PCIE_VSS#8 PCIE_VSS#9 PCIE_VSS#10 PCIE_VSS#11 PCIE_VSS#12 PCIE_VSS#13 PCIE_VSS#14 PCIE_VSS#15 PCIE_VSS#16 PCIE_VSS#17 PCIE_VSS#18 PCIE_VSS#19 PCIE_VSS#20 PCIE_VSS#21 PCIE_VSS#22 PCIE_VSS#23 PCIE_VSS#24 PCIE_VSS#25 PCIE_VSS#26 PCIE_VSS#27 PCIE_VSS#28 PCIE_VSS#29 PCIE_VSS#30 PCIE_VSS#31
GND#56 GND#57
GND#58 GND#59 GND#60 GND#61 GND#62 GND#63 GND#64 GND#65 GND#66 GND#67 GND#68 GND#69 GND#70 GND#71 GND#72 GND#73 GND#74 GND#75 GND#76 GND#77 GND#78 GND#79 GND#80 GND#81 GND#82 GND#83 GND#86 GND#87 GND#88
GND
GND#1 GND#2 GND#3 GND#4 GND#5 GND#6 GND#7 GND#8
GND#9 GND#10 GND#11 GND#12 GND#13 GND#14 GND#15 GND#16 GND#17 GND#18 GND#19 GND#20 GND#21 GND#22 GND#23 GND#24 GND#25 GND#26 GND#27 GND#28 GND#29 GND#30 GND#31 GND#32 GND#33 GND#34 GND#35 GND#36 GND#37 GND#38 GND#39 GND#40 GND#41 GND#42 GND#43 GND#44 GND#45 GND#46 GND#47 GND#48 GND#49 GND#50 GND#51 GND#52 GND#53 GND#54 GND#55 GND#84 GND#85
VSS_MECH#1 VSS_MECH#2 VSS_MECH#3
A3 A30 AA13 AA16 AB10 AB15 AB6 AC9 AD6 AD8 AE7 AG12 AH10 AH28 B10 B12 B14 B16 B18 B20 B22 B24 B26 B6 B8 C1 C32 E28 F10 F12 F14 F16 F18 F2 F20 F22 F24 F26 F6 F8 G10 G27 G31 G8 H14 H17 H2 H20 H6 J27 J31 K11 K2 K22 K6 T11 R11
A32 AM1 AM32
U23F
LVDS CONTROL
NC_UPHYAB_TMDPA_TX0N NC_UPHYAB_TMDPA_TX0P
NC_UPHYAB_TMDPA_TX1N NC_UPHYAB_TMDPA_TX1P
NC_UPHYAB_TMDPA_TX2N NC_UPHYAB_TMDPA_TX2P
NC_UPHYAB_TMDPA_TX3N NC_UPHYAB_TMDPA_TX3P
TMDP
NC_UPHYAB_TMDPB_TX0N NC_UPHYAB_TMDPB_TX0P
NC_UPHYAB_TMDPB_TX1N NC_UPHYAB_TMDPB_TX1P
NC_UPHYAB_TMDPB_TX2N NC_UPHYAB_TMDPB_TX2P
NC_UPHYAB_TMDPB_TX3N NC_UPHYAB_TMDPB_TX3P
Topaz_S3
NC_TXOUT_L3P
NC_TXOUT_L3N
NC_TXOUT_U3P NC_TXOUT_U3N
AL15 AK14
AH16 AJ15
AL17 AK16
AH18 AJ17
AL19 AK18
AH20 AJ19
AL21 AK20
AH22 AJ21
AL23 AK22
AK24 AJ23
20
RECOMMENDED SETTINGS
CONFIGURATION STRAPS-- SEE EACH DATABOOK FOR STRAP DETAILS
ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
RSVD GPIO2 RESERVED 0 RSVD GPIO8 RESERVED 0
RSVD GPIO21 RESERVED 0
BIOS_ROM_EN
VIP_DEVICE_STRAP_ENA V2SYNC IGNORE VIP DEVICE STRAPS (Removed on Seymour/Whistler)
RSVD H2SYNC RESERVED 0
RSVD GENERICC RESERVED 0
THEY MUST NOT CONFLICT DURING RESET
STRAPS DESCRIPTION OF DEFAULT SETTINGSPIN
GPIO0 PCIE FULL TX OUTPUT SW INGTX_PWRS_ENB GPIO1TX_DEEMPH_EN PCIE TRANSMITTER DE-EMPHASIS ENABLED
GPIO_22_ROMCSB
GPIO[13:11]ROMIDCFG(2:0)
HSYNC 0AUD[1] VSYNC 0AUD[0]
ENABLE EXTERNAL BIOS ROM
SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT
SEE DATABOOK FOR DETAIL SEE DATABOOK FOR DETAIL
NOTE1: AMD RESERVED CONFIGURATION STRAPS
ALLOW FOR PULLUP PADS FOR THESE STRAPS BUT DO NOT INSTALL RESISTOR. IF THESE GPIOS ARE USED, THEY MUST KEEP "LOW" AND NOT CONFLICT DURING RESET.
H2SYNC GENERICCGPIO21
GPIO8
GPIO2
0=DO NOT INSTALL RESISTOR 1= INSTALL 3K RESISTOR
X = DESIGN DEPENDANT NA = NOT APPLICABLE
0 X
0GPIO9 VGA ENABLEDBIF_VGA DIS
0
0 10
0
Topaz_S3
PROJECT:400 Series
PROJECT:400 Series
PROJECT:400 Series
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
20 -- Meso_S3_GND/LVDS/Strap
20 -- Meso_S3_GND/LVDS/Strap
NB5
NB5
NB5
20 -- Meso_S3_GND/LVDS/Strap
Date: Sheet of
Date: Sheet of
Date: Sheet of
1A
1A
1A
20 65Monday, November 30, 2015
20 65Monday, November 30, 2015
20 65Monday, November 30, 2015
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