HP Omnibook XE3 Schematics

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1 1

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D

E

2 2

32N101 LA-1012 Rev0.1 Schematics Doc.

uFCBGA/uFCPGA Coppermine-T or Tualatin CPU

with Almador-M chipset

( Defeature )

3 3

4 4

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

145Monday, September 10, 2001

E

of

0A

A

Model Name :
N32N101

B

C

BLOCK DIAGRAM

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

D

E

PCB No : LA-1012

4 4

Date : 2001/08/16
Revision : 0.1

Mobile Tualatin
or
Coppermine-T

(uFCBGA/uFCPGA)

PAGE 4,5

Thermal Sensor
MAX1617MEE

PAGE 5

CK TITAN
ICS9250-38

PAGE 8

CPU VID & All
reference voltage

PAGE 7

PSB

CRT
Conn.

PAGE 16

LVDS
Conn.

PAGE 15

3 3

TV-Out
Conn.

PAGE 16

HDD Connector

CD-ROM Connector

2 2

1 1

USB & BlueTooth

VCH

TV-Out
Encoder

PAGE 21

PAGE 21

PAGE 20

DVOA Bus Interface

PAGE 15

DVOC Bus Interface

PAGE 15

Super I/O

NS PC87391

PAGE 32

ATA 66/100

2nd IDE

USB

LPC

GMCH-M

625 BGA

HUB

Interface

ICH3-M

421 BGA

Embedded
Controller

NS PC87591

PAGE 30

Memory Bus

PAGE 9,10,11

LAN

PCI BUS

PAGE 17,18

Almador-M

Kinnereth
82562ET

PAGE 25

IEEE-1394
Controller

PAGE 22

Mini PCI
Socket

PAGE 38

CardBus
OZ6933T

PAGE 23

Audio
Controller

ES1988

PAGE 27

SO-DIMM X2

BANK 0, 1, 2, 3

Slot 0/1

PAGE 24

EQ Circuit

PAGE 29

PAGE 14

Docking Connector

LAN
USB X 2
PARALLEL PORT
SERIAL PORT
DC-IN JACK
LINE OUT
EXT. MIC IN
CRT CONN.
PS/2 CONN.

FAN on controller &
TEMP. sensing circuit

PAGE 37

PAGE 36

DC/DC Interface
RTC Battery

PAGE 39

BATTERY
Charger

PAGE 42

POWER
Interface

PAGE 40,41,42,44

Parallel

PAGE 33 PAGE 31

A

FIR

PAGE 33

FDD

PAGE 33

B

ROM
BIOS

Scan KB

PAGE 35

PS/2 Interface

PAGE 35

C

Mic Jack

PAGE 28

Audio Amplifier

PAGE 28

D

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

245Monday, September 10, 2001

E

of

0A

A

Voltage Rails

B

C

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

D

E

Power Plane Description

1 1

B+
+VCC_H_CORE
+VTT

VIN

Adapter power supply (19V)
AC or battery power rail for power circuit.
Core voltage for CPU

1.2V switched power rail for CP U AG TL Bu s

S1 S3 S5

N/A N/A N/A

N/AN/AN/A
ON OFF
ON OFF

OFF

OFF

+1.5 V _ A L W 1.5V always on p o w e r r a i l ON ON ON*
+1.5V_SW AGP 4X ON OFF OFF
+1.8 V _ A L W 1.8V always on p o w e r r a i l ON ON ON*
+1.8V_SW OFF1.8V switched power rail ON OFF

ON

ON+2.5V 2.5V power rail OFF

+2-5 V _MRIMM 2.5V sw i t c h e d po w er rail ON OFF OFF

ON
ON
OFF
ON

OFF
ON
OFF
ON

ON*

OFF

OFF

ON*

OFF5V switched power rail

ON*

OFF

ON

+3V_ALW
+3V
+3V_SW
+5V_ALW
+5V

2 2

+5V_SW
+12V_ALW
+12V_SW
RTCVCC

3.3V always on power rail

3.3V power rail

3.3V switched power rail
5V always on power rail
5V power rail OFFON

12V always on power rail
12V switched power rail
RTC power

ON
ON
ON
ON
ON
ON
ON
ON
ON

Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.

External PCI Devices

Device IDSEL# REQ#/GNT# Interrupts

LAN
CardBus
Audio Controller
Mini-PCI
Mini-PCI(LAN)

3 3

IEEE-1394 Controller

(AD24 internal)

AD20
AD19
AD18
AD22 4 PIRQD
AD16 0 PIRQA

2
3
1

PIRQA/PIRQB
PIRQD
PIRQC

EC SM Bus1 address

Device

Smart Battery
EEPROM

0001 011X b
1010 000X b

EC SM Bus2 address

Device

MAX1617MEE
OZ163
Docking
DOT Board

1001 110X b
0011 0100 b
0011 011X b
XXXX XXXXb

ICH3 SM Bus address

Device

SODIMM

4 4

Clock Gen.

P.S:Default Resistor & Capacitor's package are 0402.

1010 000X b
1101 001X b

Default 8P4R package is 0402.

A

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

B

C

D

Date: Sheet

345Monday, September 10, 2001

E

0A

of

A

+VCC_H_CORE

1 1

AF23

AD23

B11

A10
A13

C12
C10

A15
A14
B13
A12

AA3

AB3
C14
AF4

C22

AA2

G2

G1

G3

W2

K1

J1

K3

J2

H3
A3

J3
H1
D3
F3

C2
B5

C6
B9
B7
C8
A8

B3
A9

C3

A6

R1
L3
T1
U1
L1
T4

P3

A7
C4

R2
L2
V3

U2
T3

U4A

A#3
A#4
A#5
A#6
A#7
A#8
A#9
A#10
A#11
A#12
A#13
A#14
A#15
A#16
A#17
A#18
A#19
A#20
A#21
A#22
A#23
A#24
A#25
A#26
A#27
A#28
A#29
A#30
A#31
A#32
A#33
A#34
A#35

REQ#0
REQ#1
REQ#2
REQ#3
REQ#4
RP#
ADS#

AERR#
AP#0
AP#1
BERR#
BINIT#
IERR#

BREQ0#
NC
NC
NC
BPRI#
BNR#
LOCK#

HIT#
HITM#
DEFER#

TUALATIN

H_A#[3..31]9

2 2

H_REQ#[0..4]9

H_ADS#9

+1.5V_SW

3 3

H_BPRI#9

H_BNR#9

H_LOCK#9

H_HIT#9

H_HITM#9

H_DEFER#9

H_A#[3..31]

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

H_REQ#[0..4] H_D#33

R19 1.5K

1 2

R28 10

1 2

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

B

D22

F22

E21

H22

VCC_0

VCC_1

VCC_2

Address

Lines

Request

Signals

Error

Interface

Arbitration

Signals

Snoop

Signals

VSS_0

E16R4E25

G21

VCC_3

VCC_4

VSS_1

VSS_2

K22

VCC_5

VSS_3

G25

J21

VCC_6

VSS_4

J25

M22

VCC_7

VSS_5

L25

L21

VCC_8

VSS_6

N25

P22

VCC_9

VSS_7

R25

N21

VCC_10

VSS_8

U25

T22

VCC_11

VSS_9

W25

R21

V22

VCC_12

VSS_10

AA25

AC25

U21

Y22

VCC_13

VCC_14

VSS_11

VSS_12

AF25

AE26

W21

AB22

VCC_15

VCC_16

VSS_13

VSS_14

C23

F23

AA21

AC21

VCC_17

VCC_18

VSS_15

VSS_16

H23

K23

D20

F20

VCC_19

VCC_20

VSS_17

VSS_18

M23

P23

E19

AB20

VCC_21

VCC_22

VSS_19

VSS_20

T23

V23

AA19

AC19

VCC_23

VCC_24

VSS_21

VSS_22

Y23

AB23

D18

F18

E17

AB18

AA17

AC17

VCC_25

VCC_26

VCC_27

VCC_28

VCC_29

VCC_30

VCC_31

Mobile

Tualatin

VSS_23

VSS_24

VSS_25

VSS_26

VSS_27

VSS_28

VSS_29

AE23

B22

D21

F21

E22

H21

C

D16

F16

E15

AB16

AA15

AC15

D14

F14

E13

AB14

AA13

AC13

D12

F12

E11

AB12

AA11

AC11

D10

F10E9AB10

AA9

AC9D8F8E7AB8

VCC_32

VCC_33

VCC_34

VCC_35

VCC_36

VCC_37

VCC_38

VCC_39

VCC_40

VCC_41

VCC_42

VCC_43

VCC_44

VCC_45

VCC_46

VCC_47

VCC_48

VCC_49

VCC_50

VCC_51

VCC_52

VCC_53

VCC_54

VCC_55

VCC_56

VCC

VSS VCC

VSS_30

VSS_31

VSS_32

VSS_33

VSS_34

VSS_35

VSS_36

VSS_37

VSS_38

VSS_39

VSS_40

VSS_41

VSS_42

VSS_43

VSS_44

VSS_45

VSS_46

VSS_47

VSS_48

VSS_49

VSS_50

VSS_51

VSS_52

VSS_53

VSS_54

G22

K21

J22

M21

L22

P21

N22

T21

R22

V21

U22

Y21

W22

AB21

AA22

AC22

AE21

B20

D19

AB19

AA20

AC20

AE19

B18

D17

AA7

AC7D6F6E5H6G5K6J5N5T6V6

VCC_57

VCC_58

VCC_59

VCC_61

VCC_62

VCC_63

VCC_80

VSS_55

VSS_56

VSS_57

F17

E18

AB17

VCC_64

VCC_79

AC5M6P6

VCC_65

VCC_66

Data

Signals

VCC_77

VCC_78

AB6

AA5

D

H_D#[0..63]

VCC_67

VCC_68

VCC_69

VCC_70

VCC_71

VCC_72

D#0
D#1
D#2
D#3
D#4
D#5
D#6
D#7
D#8

D#9
D#10
D#11
D#12
D#13
D#14
D#15
D#16
D#17
D#18
D#19
D#20
D#21
D#22
D#23
D#24
D#25
D#26
D#27
D#28
D#29
D#30
D#31
D#32
D#33
D#34
D#35
D#36
D#37
D#38
D#39
D#40
D#41
D#42
D#43
D#44
D#45
D#46
D#47
D#48
D#49
D#50
D#51
D#52
D#53
D#54
D#55
D#56
D#57
D#58
D#59
D#60
D#61
D#62
D#63

VCC_73

VCC_74

VCC_75

VCC_76

U5Y6W5

A16
B17
A17
D23
B19
C20
C16
A20
A22
A19
A23
A24
C18
D24
B24
A18
E23
B21
B23
E26
C24
F24
D25
E24
B25
G24
H24
F26
L24
H25
C26
K24
G26
K25
J24
K26
F25
N26
J26
M24
U26
P25
L26
R24
R26
M25
V25
T24
M26
P24
AA26
T26
U24
Y25
W26
V26
AB25
T25
Y24
W24
Y26
AB24
AA24
V24

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32

H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

E

H_D#[0..63] 9

+VCC_H_CORE

4 4

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

445Monday, September 10, 2001

E

of

0A

A

B

C

D

E

+VTT

+1.8V_SW

+1.5V_SW

+1.5V_SW

R21
3K

R42
150

12

12

R22

1.5K

12

12

R286

137_1%

H_RS#09
H_RS#19
H_RS#29

H_TRDY#9

H_A20M#17

H_IGNNE#17

H_SMI#17

H_STPCLK#17

H_DPSLP#17,42

H_INTR17

H_NMI17

H_INIT#17

H_DBSY#9

H_DRDY#9

H_BSEL08,11
H_BSEL18

C449

@10PF

ITP_TCK7

ITP_TDI7
ITP_TDO7
ITP_TMS7

ITP_TRST#7

ITP_PREQ#7

ITP_PRDY#7

PM_CPUPERF#17

H_A20M#
H_FLUSH#

H_IGNNE#

H_INTR
H_NMI

H_THERMDA
H_THERMDC

1 2

R35 110_1%

PIC_CLK

R285

1 2

@33

ITP_TCK
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_PREQ#
ITP_PRDY#

1 2

R38 56.2_1%

AC3

AF6

AF5
AD9
AD3

AB4

AE4

AF8

AD15
AE14

AE6

B15

AF13
AF14

AE12
AF10
AF16

AD19
AD17
AF20

AF22
AE20
AD22
AD21

AD10

AD7

AD11

AF7

AF15
AF19
AE22

AF12

AD5

AE16

12

1 1

2 2

3 3

Place H_RESET#
R272<0.1" from
U6

H_FERR#17

H_PWRGD17

H_RESET#9

CLK_CPU_APIC8

Note :
GHI# Pull-Up internally

But pull high too weak

56.2_1%

12

R267

R13

1.5K

+1.5V_SW

R40
150

R284 26.7_1%

+1.5V_SW

12

1 2

+VS_CMOSREF

AA18

AC18

AE17

B16

D15

F15

AB15

AA16

AC16

AE15

B14

D13

F13

E14

AB13

AA14

AC14

AE13

B12

D11

F11

E12

AB11

U4B

VSS_58

VSS_59

VSS_60

VSS_61

VSS_62

VSS_63

VSS_64

VSS_65

VSS_66

VSS_67

VSS_68

VSS_69

VSS_70

VSS_71

VSS_72

VSS_73

VSS_74

Y3

RS#0

V1

RS#1

U3

RS#2

M5

Request

RSP#

W1

Signals GND

TRDY#

A20M#
FERR#
FLUSH#
IGNNE#
SMI#
PWRGOOD
STPCLK#

Compatibility

DPSLP#
INTR/LINT0
NMI/LINT1
INIT#
RESET#

W3

DBSY#

Y1

DRDY#

THERMDA
THERMDC

SELFSB0
SELFSB1
EDGECTRLP

PICD0

L5

PICD1
PICCLK

RP2#
RP3#
BPM0#
BPM1#

TCK
TDI
TDO
TMS
TRST#
PREQ#
PRDY#

CMOSREF_1
CMOSREF_0
RTTIMPDEP

GHI#

APIC

Debug
Break

Point

Test

Access

PORT
( ITP )

AA12

VSS_75

VSS_76

VSS_77

VSS_78

VSS_79

VSS_80

VCCT VID

AC12

AE11

VSS_81

VSS_82

B10D9F9

VSS_83

VSS_84

VSS_85

VSS_86

E10

AB9

AA10

AC10

AE9B8D7F7E8

AB7

AA8

VSS_87

VSS_88

VSS_89

VSS_90

VSS_91

VSS_92

VSS_93

VSS_94

VSS_95

VSS_96

VSS_97

Mobile

Tualatin

AC8

AE7B6F5H5G6K5J6N6L6T5R6V5U6Y5W6

VSS_98

VSS_99

VSS_100

VSS_101

VSS_102

VSS_103

VSS_104

VSS_105

VSS_106

VSS_107

VSS_108

VSS_109

VSS_110

AB5

AA6

AC6

AE5B4D4F4H4K4M3U4W4B2D2F2H2

VSS_111

VSS_112

VSS_113

VSS_114

VSS_115

VSS_116

VSS_117

VSS_118

VSS_119

VSS_120

VSS_121

VSS_122

VSS_123

VSS_124

VSS_125

Data

Signals

VTT Ref

Analog

VSS_126

VSS_127

VSS_128

VSS_129

DEP#0
DEP#1
DEP#2
DEP#3
DEP#4
DEP#5
DEP#6
DEP#7

VREF_1
VREF_2
VREF_3
VREF_4
VREF_5
VREF_6
VREF_7
VREF_8

TESTLO

VCC
PLL1
PLL2

CLK0

CLK0#

TESTLO

NCHCTRLP

TESTHI

TESTHI

NC_1
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7

VTTPWRGOOD

RP1

8P4R_1K

1 2

L10 4.7UH

C27
33UF_D2_16V

CLK_HCLK 8
CLK_HCLK# 8

TESTLO1
TESTLO2
TESTHI2
TESTHI1

R261
@33

1 2

C377
@10PF

+VTT

+VTT

AE24
AD25
AE25
AC24
AF24
AD26
AC26
AD24

AF21
AB26
H26
A21
AF9
A4
N1
AA1

Y4
R5
N3
N2
P1

NC

P5

NC

E1

NC

F1

NC

AC1
AD1
M1

AF18

NC

AD16
AF11
AE8

NC

N24

NC

AE10

NC

E2

P4

NC

AD4
A5
D1
AD13
B1
P26
A11

E3

D26

NC

+VTT

+V_AGTLREF

TESTLO1
VCPU_PLL1

VCPU_PLL2

CLK_HCLK
CLK_HCLK#
TESTLO2

NCHCTRLP
TESTHI1

TESTHI2

VTT_PWRGD

1 8
2 7
3 6
4 5

+VCC_H_CORE

+

R41 14_1%

1 2

CLK_HCLK CLK_HCLK#

R262
@33

1 2

C378
@10PF

VCCT_1

VCCT_2

VCCT_3

VCCT_4

VCCT_5

VCCT_6

VCCT_7

VCCT_8

VCCT_9

VCCT_10

VCCT_11

VCCT_12

VCCT_13

VCCT_14

VCCT_15

VCCT_16

VCCT_17

VCCT_18

VCCT_19

VCCT_20

VCCT_21

VCCT_22

VCCT_23

VCCT_24

VCCT_25

VCCT_26

VCCT_27

VCCT_28

VCCT_29

VCCT_30

VCCT_31

VCCT_32

VCCT_33

VCCT_34

VCCT_35

VCCT_36

VCCT_37

VCCT_38

VID0

VID1

VID2

VID3

VID4

VSS

VSS

+5V_ALW

W=40mil

R37

1 2

16
13

5
1
3

4

1K

1K

4 4

C58
2200PF

+5V_ALW

A

12

1 2
R36

1 2

H_THERMDA
H_THERMDC

R268

100K

NC
NC
NC
NC
NC
DXP

DXN

15

STBY#

ADD0

12

R274
200

C422
.1UF

1 2

2

Thermal Sensor

U6MAX1617

MAX1617/NE1617

VCC

14

SMBC

12

SMBD

11

ALERT#

ADD1

GND

GND

678910

+5V_ALW

Address:1001_110X

+VTT

A26

G23

J23

L23

N23

R23

U23

W23

AA23

C21

C19

AD20

C17

AD18

C15

C13

AD14

C11

AD12C9C7

AD8C5AD6

AC23

AA4E4G4J4L4

AC4V4AE3

AF2

AF1

AE18D5E6

AB1

AC2

AE2

AF3R3B26M4AF26C1AF17

EC_SMC_2 29,33,36

From 87591

R273

100K

1 2

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

VSSNCNC

VSS_142

NC

E20

F19

N4

CPU_VR_VID4 7
CPU_VR_VID3 7
CPU_VR_VID2 7
CPU_VR_VID1 7
CPU_VR_VID0 7

VTT_PWRGD42EC_SMD_2 29,33,36

D

AE1

A25

C25

TUALATIN

AD2

2.2UF_16V_0805

K2M2P2T2V2Y2AB2

2

+3V_SW

12

R18
10K

1

Q8
3904

3

E

+VTT

12

R17
2K

VTT_PWRGD

C758

Title

Size Document Number Rev
Custom

Date: Sheet

R16

1 2

18K

12

Compal Electronics, inc.

SCHEMATIC, M/B LA-1012
401200

VTT_PWRGD# 8,29

545Monday, September 10, 2001

of

0A

VSS_130

VSS_131

VSS_132

VSS_133

VSS_134

VSS_135

VSS_136

VSS_137

VSS_138

VSS_139

VSS_140

VSS_141

A

B

C

D

E

Layout note :

1 1

Place close to CPU, Use 2~3 vias per PAD.
Place .47uF caps underneath balls on solder side.
Place 10uF caps on the peripheral near balls.
Use 2~3 vias per PAD.

Layout note :

Place close to CPU,
Use 2 vias per PAD.

+VCC_H_CORE

12

12

12

C398

C399

.22UF_0603

.22UF_0603

+VCC_H_CORE

12

12

C397

C412

2 2

.22UF_0603

+VCC_H_CORE

12

C98
10UF_10V_1206

.22UF_0603

12

C396

.22UF_0603

12

C427

.22UF_0603

12

C62
10UF_10V_1206

12

C411

.22UF_0603

12

C435

.22UF_0603

12

12

C437

.22UF_0603

12

C403

.22UF_0603

C407
10UF_10V_1206

12

C401

.22UF_0603

12

C433

.22UF_0603

12

C17
10UF_10V_1206

C404

.22UF_0603

12

C402

.22UF_0603

12

C413

.22UF_0603

12

C410

.22UF_0603

12

C406
10UF_10V_1206

12

C440

.22UF_0603

12

C425

.22UF_0603

12

C434

.22UF_0603

12

C432

.22UF_0603

12

C426

.22UF_0603

12

C438

.22UF_0603

12

C428

.22UF_0603

12

C439

.22UF_0603

+VTT

12

C42

+

150UF_D2_6.3V

+VTT

12

C91
1UF_0603

12

C436
1UF_0603

12

C75

+

150UF_D2_6.3V

12

C56
1UF_0603

12

C105

+

150UF_D2_6.3V

12

12

C29
1UF_0603

Tualatin

C43
1UF_0603

+

12

C41
1UF_0603

12

C47
150UF_D2_6.3V

12

C63
1UF_0603

+

12

C55
1UF_0603

12

C51
150UF_D2_6.3V

12

C101
1UF_0603

12

C392

+

150UF_D2_6.3V

12

C102
1UF_0603

-------------------------------------------------------

+VCC_H_CORE

12

C429
10UF_10V_1206

3 3

+VCC_H_CORE

12

C59

+

150UF_D2_6.3V

+VCC_H_CORE

12

C24

+

150UF_D2_6.3V

12

C99
10UF_10V_1206

12

C104

+

150UF_D2_6.3V

12

C424

+

150UF_D2_6.3V

12

C390
10UF_10V_1206

12

C391

+

150UF_D2_6.3V

12

C469

+

150UF_D2_6.3V

12

C25
10UF_10V_1206

12

C387

+

150UF_D2_6.3V

12

C444

+

150UF_D2_6.3V

12

C46
10UF_10V_1206

12

C28

+

150UF_D2_6.3V

12

C471

+

150UF_D2_6.3V

12

C76

+

150UF_D2_6.3V

12

C52

+

150UF_D2_6.3V

D4 D3 D2 D1 D0 CPU_Core(V) QS( MP)

-------------------------------------------------------

1
111

0 1.15V0

000

1.40V

0

-------------------------------------------------------

Coppermine-T

D4 D3 D2 D1 D0 CPU_Core(V) ES(before MP)

-------------------------------------------------------

0
0

------------------------------------------------------­D4 D3 D2 D1 D0 CPU_Core(V) QS( MP)

-------------------------------------------------------

0
0

1

0

0

0

0

1

0

0 1.70V

0

0

0

0

1

1.70V

0 1.35V

1

1.35V

0

-------------------------------------------------------

4 4

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

645Monday, September 10, 2001

E

of

0A

A

B

C

D

E

+VTT

GTL Reference Voltage

12

R62

Layout note :

1K_1%

1. Place R70 and R75 between and GMCH and CPU.

2. Place decoupling caps near CPU.(Within 500mils)

1 2

1 2

E

+V_AGTLREF

12

C443
.1UF

+VS_CMOSREF

12

R134

82.5_1%

12

R119

82.5_1%

745Monday, September 10, 2001

of

12

12

R64

C389

2K_1%

.1UF

+1.5V_SW

CMOS Reference Voltage

12

R68

Layout note :

1K_1%

1. Place R81 and R76 between and GMCH and CPU.

2. Place decoupling caps near CPU.

12

R65
2K_1%

12

C430
.1UF

Place Reference Circuit near GMCH

+VAGP_CRDREF

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

12

C388
.1UF

+1.5V_SW

12

C400
.1UF

12

C423
.1UF

C229 470PF

12

R127
1K_1%

12

R113
1K_1%

C216 470PF

0A

12

R333

1K

R328
240

JP15

2

RESET#

4

DBRESET#

6

TCK

8

TMS

10

POWERON

12

DBINST#

14

GND

16

GND

18

GND

20

GND

22

GND

24

GND

26

GND

28

GND

30

BCLK

@ITP_RECEPTACLE

182736

+3V_SW

45

RP16
8P4R_1K

4 5

8 9
14 15
18 19
22 23

1

4 5

8 9
14 15
18 19
22 23

1

GND
GND
GND

TDI

TDO

TRST#

BSEN#
PREQ0#
PRDY0#
PREQ1#
PRDY1#

NC
NC
NC

BCLK#

U34

B0 D0
B1 D1
B2 D2
B3 D3
B4 D4

BE#

SN74CBT3383

U33

B0 D0
B1 D1
B2 D2
B3 D3
B4 D4

BE#

@SN74CBT3383

12

R266

200
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29

B

23

C0A0

67

C1A1

1011

C2A2

1617

C3A3

2021

C4A4

24

VCC

1213

GNDBX

23

C0A0

67

C1A1

1011

C2A2

1617

C3A3

2021

C4A4

24

VCC

1213

GNDBX

12

R269
150

1 2

R43 240

12

12

R332
@10

C512
@15PF

MUX_VID0
MUX_VID1
MUX_VID2
MUX_VID3
MUX_VID4

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4

12

RP37

8P4R_0
4 5
3 6
2 7
1 8

+5V_SW

+5V_SW

R275
200

1 2

12

12

1 2

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3

R553 0

CPU_VID4

C515
.01UF

CPU_VID0 42
CPU_VID1 42
CPU_VID2 42
CPU_VID3 42
CPU_VID4 42

C516
@.01UF

+VTT+1.5V_SW+VTT

12

R44

56.2_1%

ITP_TDI 5
ITP_TDO 5
ITP_TRST# 5

ITP_PREQ# 5

R34 510

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

ITP_PRDY# 5

C

CPU Voltege ID

1 1

CPU_VR_VID05
CPU_VR_VID15
CPU_VR_VID25
CPU_VR_VID35
CPU_VR_VID45

AC_VID018
AC_VID118
AC_VID218
AC_VID318

PM_SSMUXSEL17,42

12

R100

12

12

R311 240

12

R270
39

AC_VID418

1 : for high Voltage B-C

+3V_SW

182736

45

RP2
@8P4R_10K

12

12

12

12

+1.5V_SW

+VTT

12

12

R79

R84

39

10K

12

12

R317
@10

12

C496
@15PF

PM_DPRSLPVR17,42

+VTT

12

R86

1.5K

MUX_VID0
MUX_VID1
MUX_VID2
MUX_VID3
MUX_VID4

STRAP_VID0
STRAP_VID1
STRAP_VID2
STRAP_VID3
STRAP_VID4

+3V_ALW

12

PM_SSGMUXSEL = 0 : for low Voltage A-C

2 2

@10K

Default for Resistors Should
be +VCC_CPU = 0.7V, for
Deeper Sleep Only.

R101

R103

R102

R107

@0

@0

In-Target Probe

3 3

H_RESETX#9

ITP_TCK5
ITP_TMS5

CLK_ITPP8 CLK_ITPP# 8

4 4

R108

@0

@0

@0

R313

56.2_1%

A

R133

249_1%

R126

49.9_1%

+1.8V_SW

R152

301_1%

+1.8V_SW

R435

301_1%

R438

301_1%

+1.8V_SW

R296

576_1%

R287

2K_1%

+3V

System Memory Reference

12

249.9_1%

Place capacitor close to GMCH.

12

+V_SMREF

12

C223
.1UF

HUB Interface Reference

12

Layout note :

1. Place R123 and R124 in middle of Bus.

2. Place capacitors near GMCH.

12

R159
301_1%

+VS_HUBREF

12

C256
.1UF

HUB Interface VSwing V ol tag e

12

1. Place R360 and R361 in middle of
Bus.

12

12

1. Place R255 and R253 near GMCH.

12

12

C643
.1UF

+VS_HUBVSWING

+VS_RIMMREF

D

A

B

C

D

E

+3V_SW

1 1

+3V_SW

+3V_SW

+3V_SW

12

12

12

R365
100K

H_BSEL15
H_BSEL05,11

2 2

SMB_DATA14,17,19

SMB_CLK14,17,19

CLK_VCH15

CLK_ICH4817

3 3

CLK_DREF9

CLK_ICH1417
CLK_SIO1431

+12V_SW

Q31

1 3

D

12

2

R231
100K

G

2N7002

R380

R386

1K

1K

SEL1
SEL0

+12V_SW

+3V_SW +3V_SW

12

R229
100K

S

2

G

Q29

1 3

D

S

2N7002

12

12

C589

C588

@10PF

@10PF

Place Crystal within 500 mils of CK_Titan

12

C629 10PF
caps are internal

to CK_TITAN

12

C647 10PF

PM_SLP_S1#17,29
PM_STPPCI#17

PM_STPCPU#17

12

12

R230

R232

10K

10K

R391 22_1%

R388 220_1%

R389 33

R390 22

R400 33
R399 33

1 2

1 2

1 2

1 2

1 2
1 2

R403 0

VTT_PWRGD#5,29

R364 10K

1 2

1 2

VCH_66M

USB_48M ICH_33M

DOT_48M

REF_14M

12

Y3

14.318MHZ

L46
BLM21A601SPT

1 2
1 2

L52 BLM21A601SPT

U41

2

40
55
54

25
34
53

28

43

29
30

33
35

42

39

38

56

ICS9250-38

+3V_CLK

XTAL_IN

SEL2
SEL1
SEL0

PWR_DWN#
PCI_STOP#
CPU_STOP#

VTT_PWRGD#

MULT0

SDATA
SCLK

3V66_0/DRCG
3V66_1/VCH_CLK

IREF

48MHZ_USB

48MHZ_DOT

REF

Width=40 mils

181419323746

VDD_PCI

VDD_PCI

VDD_REF

VDD_3V66

VDD_3V66

66MHZ_OUT2/3V66_4
66MHZ_OUT1/3V66_3
66MHZ_OUT0/3V66_2

GND_REF

GND_PCI

GND_PCI

GND_3V66

GND_3V66

491520313641

12

+

C626

22UF_1206_10V

50

VDD_CORE

VDD_CPU

VDD_CPU

VDD_48MHZ

GND_COREXTAL_OUT

CPUCLKT2

CPU_CLKC2

CPUCLKT1

CPUCLKC1
CPUCLKT0

CPUCLKC0

66MHZ_IN/3V66_5

PCICLK_F2
PCICLK_F1
PCICLK_F0

GND_48MHZ

GND_IREF

GND_CPU

47

PCICLK6
PCICLK5
PCICLK4
PCICLK3
PCICLK2
PCICLK1
PCICLK0

12

12

C288

C289

.01UF

.01UF

26

12

C664
.01UF

273

HOST_CPU CLK_BCLK

45

HOST_CPU#

44

GMCH_CPU CLK_HT

49

GMCH_CPU#

48
52

51
24

23

GBIN_66M

22

ICH_66M

21

7

APIC_33M PCIF1

6
5

CB_33M

18

AUD_33M

17

SIO_33M

16

1394_33M

13
12

EC_33M

11

MINI_33M

10

12

12

C286

C287

.01UF

.01UF

L50
BLM21A601SPT

1 2

12

+

C335
22UF_1206_10V

R396

1 2

0

R397

1 2

0

R394

1 2

0

R393

1 2

0

R375 240K

1 2

R434 33

1 2

R433 33

1 2

R425 33

1 2

R424 33

1 2

R432 33

1 2

R431 33

1 2

R430 33

1 2

R429 33

1 2

R427 33

1 2

R426 33

1 2

12

C313
.01UF

12

C314
.01UF

+3V_SW

12

R8
475_1%

CLK_BCLK#

12

R281

475_1%
CLK_HT#
CLK_ITP

12

R325

475_1%
CLK_ITP#

GBIN_ISO

12

C654

@10PF

12

12

C315

C316

.01UF

.01UF

1 2

R9 33

1 2

R5 60.4_1%

R6 60.4_1%

1 2

R10 33

1 2
1 2

R278 33

1 2

R282 60.4_1%

R280 60.4_1%

1 2

R277 33

1 2
1 2

R318 33

1 2

R320 60.4_1%

R330 60.4_1%

1 2

R324 @33

1 2

C655 .01UF

12

C652
@10PF

Place caps. near
CK_Titan (U31)

12

C615
.01UF

CLK_HCLK 5

Place all these Block's
Components near CPU (U6)

CLK_HCLK# 5
CLK_GHT 9

Place all these Block's
Components near GMCH (U23)

CLK_GHT# 9
CLK_ITPP 7

Place all these Block's
Components near ITP (JP1)

CLK_ITPP# 7

CLK_GBOUT 9

CLK_GBIN 9
CLK_ICHHUB 17

CLK_ICHPCI 17
CLK_CPU_APIC 5

CLK_PCI_CB 23
CLK_PCI_AUD 26
CLK_LPC_SIO 31
CLK_1394 22

CLK_LPC_EC 29
CLK_MINIPCI 37

@33

R437

12

@10PF

C653

4 4

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

845Monday, September 10, 2001

E

of

0A

A

1 1

2 2

3 3

4 4

A

H_D#[0..63]

HUB_PD[0..10]17

HUB_PSTRB17

HUB_PSTRB#17

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

B

12

B

U4

P1
W6
U2
U6
R1
N3
W5

V4

P3
R3
U1

V6
W4

T3

P2

V3
R2

T1
W3
U3

Y4

AA3

W1

V1

Y1

Y6

AD3

AB4
AB5

V2

Y3

Y2

AA4
AA1
AA6
AB1

AC4

AA2

AB3
AD2
AD1
AC2

AB6
AC6
AC1

AF3
AD4
AD6
AC3
AH3

AE5

AE3
AG2

AF4

AF2

AJ3

AE4
AG1

AE1
AG4
AH4
AG3

AF1

+VS_HUBREF

C638
.1UF

U30A

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

82830

12

C207
.01UF

M12

M13

M17

M18

N12

VSS0

VSS1

VSS2

VSS3

VSS4

Host

Interface

HUB_PD0

HUB_PD1

HUB_PD2

HUB_PD3

HUB_PD4

HUB_PD5

G26

H28

H29

H27

F29

F27

HUB_PD0

HUB_PD1

HUB_PD2

HUB_PD3

HUB_PD4

HUB_PD5

HUB_PD6

R348 28_1%

1 2

R109 54.9_1%

1 2

+VAGP_CRDREF

C

N13

N14

N15

N16

N17

N18

P13

P14

P15

P16

P17

R13

R14

R15

R16

R17

T13

T14

T15

T16

T17

U12

U13

U14

U15

U16

U17

U18

V12

V13

V17

V18

AJ5D2AC5Y5U5P5L5H5AH2

VSS5

VSS6

VSS7

VSS8

VSS9

VSS10

VSS11

VSS12

VSS13

VSS14

VSS15

VSS16

VSS17

VSS18

VSS19

VSS20

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27

VSS28

VSS29

VSS30

VSS31

VSS32

VSS33

VSS34

VSS35

VSS36

VSS_H0

VSS_H1

VSS_H2

VSS_H3

VSS_H4

VSS_H5

VSS

Almador-M
GMCH

HUB_PD6

HUB_PD7

HUB_PD8

HUB_PD9

HUB_PD10

HUB_PSTRB

HUB_REF

HUB_PSTRB#

DVO_RCOMP

SM_RCOMP

HUB_RCOMP

AGP_REF

AGP_RCOMP/DVOBC_RCOMP

RESET#

H_GTLREF1

H_GTLREF0

H_GTLRCOMP

VSS

VSS

VSSPCMOS_LM0

VSSPCMOS_LM1

VSSPCMOS_LM2

VSSP_HUB0

VSSP_HUB1

VSSP_IO0

VSSP_IO1

VSSP_IO2

E29

E28

G25

G27

H26

G29

H24

F28

AC22F6J23

J25

K24

AB24

AA7J7C2

12

HUB_PD7

HUB_PD8

HUB_PD9

HUB_PD10

R81

54.9_1%

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

12

C

AB23

1 2

R361 80.6_1%

+V_AGTLREF

12

C532

C527

.1UF

.1UF

R112 54.9_1%_0603

12

C198
.1UF

AC23

AH19

AH20

AF5

G28

H25

AC26

AD22

AE28

12

PCI_RST# 15,17,21,22,23,26,29,31,37

10 mils wide,length <=500 mils.

AE2

VSS_H6

VSS_H7

VSS_H8

VSSP_DVO0

VSSP_DVO1

AH24

AF25

AF27

D

AB2W2T2N2K2G2AC7

VSS_H9

VSS_H10

VSS_H11

VSS_H12

VSS_H13

VSS_H14

Host

Interface

VSSP_DVO2

VSSA_DAC

AH26G8AD7

D

VSS_H15

VSS_H16

H_CPURST#

H_DEFER#

CLK_DREF

CLK_GBIN

CLK_GBOUT

VSSA_CPLL

VSSA_HPLL

H2

H_A#3

E3

H_A#4

G3

H_A#5

N4

H_A#6

M6

H_A#7

F1

H_A#8

F2

H_A#9

J3

H_A#10

F3

H_A#11

P6

H_A#12

G1

H_A#13

N5

H_A#14

H1

H_A#15

P4

H_A#16

T4

H_A#17

M2

H_A#18

J2

H_A#19

L2

H_A#20

R4

H_A#21

K1

H_A#22

L3

H_A#23

L1

H_A#24

J1

H_A#25

N1

H_A#26

T5

H_A#27

H3

H_A#28

M3

H_A#29

M1

H_A#30

K3

H_A#31

R6
C1

H_ADS#

E1

H_BNR#

L4

H_BPRI#

G5

H_DBSY#

J4
F4

H_DRDY#

D3

H_HIT#

D1

H_HITM#

J6

H_LOCK#

G4

H_TRDY#

K6

H_REQ#0

M4

H_REQ#1

K5

H_REQ#2

K4

H_REQ#3

L6

H_REQ#4

H6

H_RS#0

H4

H_RS#1

G6

H_RS#2

AJ4

CLK_HT

AH5

CLK_HT#

AC19
AG26
AD24

R288
240K

Title

Size Document Number Rev
Custom

Date: Sheet

E

H_A#[3..31]

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31

1 2

R96 @0

@33
1 2

C455

R297

1 2

R298
@33

C456
@10PF

H_REQ#[0..4]

H_RS#[0..2]

1 2

R60 47

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

GBOUT_GMCH GBOUT_ISO

1 2

@10PF

1 2

R82
@33

C124
@10PF

H_A#[3..31] 4H_D#[0..63]4

H_RESETX# 7
H_RESET# 5
H_ADS# 4
H_BNR# 4
H_BPRI# 4
H_DBSY# 5
H_DEFER# 4
H_DRDY# 5
H_HIT# 4
H_HITM# 4
H_LOCK# 4
H_TRDY# 5
H_REQ#[0..4] 4

H_RS#[0..2] 5

CLK_GHT 8
CLK_GHT# 8

C79 .01UF

Compal Electronics, inc.

SCHEMATIC, M/B LA-1012
401200

E

945Monday, September 10, 2001

CLK_DREF 8
CLK_GBIN 8
CLK_GBOUT 8

of

0A

U30B

A

AD8

AD9

AD10

AJ21

AE8

AE9

AE10

AE11

AE12

AE13

AE17

AE19

AH21

AF8

AF9

AF10

AF11

AF12

AF13

AF14

AF15

AF16

AF17

AF18

AF19

AF20

B

AG7

AG15

AG16

AG21

AH6

AH8

AH9

AH11

AH12

AH14

AH17

AH18

K28

C

N28

T28

W28

AB28

L25

P25

U25

Y25

AE20

G24

SM_D_MA[0..12]

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

D

SM_D_MA[0..12] 13

E

SM_DQ0
SM_DQ1
SM_DQ2

1 1

SM_DQ3
SM_DQ4
SM_DQ5
SM_DQ6
SM_DQ7
SM_DQ8
SM_DQ9
SM_DQ10
SM_DQ11
SM_DQ12
SM_DQ13
SM_DQ14
SM_DQ15
SM_DQ16
SM_DQ17
SM_DQ18
SM_DQ19
SM_DQ20
SM_DQ21
SM_DQ22
SM_DQ23
SM_DQ24
SM_DQ25
SM_DQ26
SM_DQ27
SM_DQ28
SM_DQ29
SM_DQ30

2 2

SM_DQ31
SM_DQ32
SM_DQ33
SM_DQ34
SM_DQ35
SM_DQ36
SM_DQ37
SM_DQ38
SM_DQ39
SM_DQ40
SM_DQ41
SM_DQ42
SM_DQ43
SM_DQ44
SM_DQ45
SM_DQ46
SM_DQ47
SM_DQ48
SM_DQ49
SM_DQ50
SM_DQ51
SM_DQ52
SM_DQ53
SM_DQ54
SM_DQ55
SM_DQ56
SM_DQ57
SM_DQ58
SM_DQ59

3 3

SM_DQ60
SM_DQ61
SM_DQ62
SM_DQ63

SM_DQ[0..63]

4 4

SM_D_CLK0
SM_D_CLK1
SM_D_CLK2
SM_D_CLK3

D29

SM_DQ0

C29

SM_DQ1

D27

SM_DQ2

C27

SM_DQ3

A27

SM_DQ4

B26

SM_DQ5

E24

SM_DQ6

C25

SM_DQ7

E23

SM_DQ8

B25

SM_DQ9

C23

SM_DQ10

F22

SM_DQ11

B23

SM_DQ12

C22

SM_DQ13

E21

SM_DQ14

B22

SM_DQ15

C12

SM_DQ16

D10

SM_DQ17

C11

SM_DQ18

A10

SM_DQ19

C10

SM_DQ20

C8

SM_DQ21

A7

SM_DQ22

E9

SM_DQ23

C7

SM_DQ24

E8

SM_DQ25

A5

SM_DQ26

F8

SM_DQ27

C5

SM_DQ28

D6

SM_DQ29

B4

SM_DQ30

C4

SM_DQ31

E27

SM_DQ32

C28

SM_DQ33

B28

SM_DQ34

E26

SM_DQ35

C26

SM_DQ36

D25

SM_DQ37

A26

SM_DQ38

D24

SM_DQ39

F23

SM_DQ40

A25

SM_DQ41

G22

SM_DQ42

D22

SM_DQ43

A23

SM_DQ44

F21

SM_DQ45

D21

SM_DQ46

A22

SM_DQ47

F11

SM_DQ48

A11

SM_DQ49

B11

SM_DQ50

F10

SM_DQ51

B10

SM_DQ52

B8

SM_DQ53

D9

SM_DQ54

B7

SM_DQ55

F9

SM_DQ56

A6

SM_DQ57

C6

SM_DQ58

D7

SM_DQ59

B5

SM_DQ60

E6

SM_DQ61

A4

SM_DQ62

D4

SM_DQ63

82830

SM_DQ[0..63] 14

VSS_LM

SDRAM
System
Memory

VSSP_SM0

VSSP_SM1

VSSP_SM2

B3B6B9

VSS_LM

VSS_LM

VSSP_SM3

VSSP_SM4

B12

B15

VSS_LM

VSS_LM

VSSP_SM5

VSSP_SM6

B18

B21

B24

Layout note :

Place resistors & capacitors near GMCH

R378 10

1 2

R156 10

1 2

R148 10

1 2

R157 10

1 2

12

C259
@33PF

A

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

VSS_LM

Almador-M
GMCH

VSS Power

VSSP_SM7

VSSP_SM8

VSSP_SM9

VSSP_SM10

VSSP_SM11

VSSP_SM12

VSSP_SM13

VSSP_SM14

VSSP_SM15

VSSP_SM16

VSSP_SM17

VSSP_SM18

VSSP_SM19

VCC

VCC

VCC

VCC

B27E7E10

E13

E16

E19

E22

12

C255
@33PF

E25G9G21E4D28

12

C260
@33PF

+VTT

H7

H23K7K23L7N6T6W7Y7AB7

12

C587
@33PF

SMD_CLK0 14
SMD_CLK1 14
SMD_CLK2 14
SMD_CLK3 14

VSS_LM

VSS_LM

VSS_LM

VSS

VCC

VCC

VCC

B

VSS_LM

VSS_LM

VCC

VCC

VSS_LM

VSS_LM

VCC

VCC

M24

P24

VSS_LM

VSS_LM

VCC

VCC

T24

V24

VSS_LM

VSS_LM

VCC

VCC

Y23

M14

VSS_LM

VSS_LM

VCC

VCC

M15

M16

VSS_LM

VCC

VCC

P12

R12

VSSP_AGP0

VSSP_AGP1

VCC

VCC

VCC

T12

P18

R18

VSSP_AGP2

VCC

T18

VSSP_AGP3

VSSP_AGP4

VSSP_AGP5

VSSP_AGP6

VSSP_AGP7

VSSP_AGP8

SDRAM
System
Memory

SM_RCLK

SM_VREF0

SM_VREF1

VCC

A24

C24

E5

F24

12

12

C230
.1UF

C181/C188 close to
Ball E5 and F24

VSSA_DPLL0

VSSA_DPLL1

SM_CAS#

SM_WE#

SM_OCLK

D19

A21

SM_OCLK

+V_SMREF

C217
.1UF

SM_MA0
SM_MA1
SM_MA2
SM_MA3
SM_MA4
SM_MA5
SM_MA6
SM_MA7
SM_MA8

SM_MA9
SM_MA10
SM_MA11
SM_MA12

VSS

VSS
VCC_SM
VCC_SM

SM_BA0
SM_BA1

SM_DQM0
SM_DQM1
SM_DQM2
SM_DQM3
SM_DQM4
SM_DQM5
SM_DQM6
SM_DQM7

SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3

VCCQ_SM

VSS

SM_CLK0
SM_CLK1
SM_CLK2
SM_CLK3

VSS

VSS

SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3

VSS
VCC_SM

SM_RAS#

C20

GMCH_RAS#
GMCH_CAS#
GMCH_WE#

@22PF_NPO

Total trace length from ball
C24 to A24 and C470 do not
exceed 200mils.

C

SM_D_MA0

A20

SM_D_MA1

B20

SM_D_MA2

B19

SM_D_MA3

C19

SM_D_MA4

A18

SM_D_MA5

A19

SM_D_MA6

C17

SM_D_MA7

C18

SM_D_MA8

B17

SM_D_MA9

A17

SM_D_MA10

A16

SM_D_MA11

C15

SM_D_MA12

C14

F20

NC

E20

NC

F12

NC

E11

NC

C21
F19
E12
A12

B16
C16

F18
D18
D13
D12
E18
F17
F14
F13

E17
F16
D16
D15
E15
E14

A15
B2
B14
A3
A14
C3

A13
C9
C13
A9
B13
A8

SM_DQM0
SM_DQM1
SM_DQM2
SM_DQM3
SM_DQM4
SM_DQM5
SM_DQM6
SM_DQM7

SM_CS#0
SM_CS#1
SM_CS#2
SM_CS#3

SM_D_CLK0
SM_D_CLK1
SM_D_CLK2
SM_D_CLK3

SM_CKE0
SM_CKE1
SM_CKE2
SM_CKE3

C248 .1UF

C253 .1UF

1 2

1 2

Layout note :

1.Placement TP6 for Almador-M A2 stepping die.

2.The 0.1uF capaci tor a nd conne ct i on to +3 V
must be implant ed for Alma dor-M A3 st epping
die.

R150 10

1 2

R149 10

1 2

R151 10

1 2

12

C254

SM_BA0 14
SM_BA1 14
SM_DQM[0..7] 14

SM_CS#0 14
SM_CS#1 14
SM_CS#2 14
SM_CS#3 14

+3V

SM_CKE0 14
SM_CKE1 14
SM_CKE2 14
SM_CKE3 14

+3V

SM_RAS# 14
SM_CAS# 14
SM_WE# 14

+3V

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

D

Date: Sheet

10 45Monday, September 10, 2001

E

0A

of

A

Layout note :

Place close to AE16,
AE15 of GMCH

1 1

AGP_PAR : Strapping option
for SW detection of AGP or
DVO device.
0 -> DVO B/C device
1 -> AGP device

R307 22

DVOC_CLK15
DVOC_CLK#15

+1.5V_SW

2 2

3 3

DVOC_D[0..11]15

M_DDC2_CLK
M_DDC2_DATA
M_DDC1_CLK
M_DDC1_DATA

1 2

R310 22

1 2

1 2

R369 100K

1 2

R363 100K

R104 330

DVOC_FLD15

4 5
3 6
2 7
1 8

RP36 8P4R_100K

12

R90 100K

DVOC_VSYNC15
DVOC_HSYNC15

R105 100K

1 2

+1.5V_SW

DVOC_D5

DVCCLK
DVCCLK#

M_DDC1_DATA
M_I2CCLK
M_DDC1_CLK
M_DDC2_DATA
M_I2CDATA

AGP_PAR

12

M_DDC2_CLK

DVOC_D0
DVOC_D1
DVOC_D2
DVOC_D3
DVOC_D4
DVOC_D7
DVOC_D6
DVOC_D9
DVOC_D8
DVOC_D11
DVOC_D10

DPMS_CLK

12

C127
68PF

AA29

AGP_SBA0/ZV_D8

AA24

AGP_SBA1/ZV_D7

AA25

AGP_SBA2/ZV_D6

Y24

AGP_SBA3/ZV_D5

Y27

AGP_SBA4/ZV_D2

Y26

AGP_SBA5/ZV_D1

W24

AGP_SBA6/ZV_D0

Y28

AGP_SBA7/ZV_HREF

L27

AGP_CBE#0/DVOB_D7

P29

AGP_CBE#1/DVOB_BLANK#

R27

AGP_CBE#2/ZV_VSYNC

T25

AGP_CBE#3/DVOC_D5

L29

AGP_ADSTB0/DVOB_CLK

L28

AGP_ADSTB#0/DVOB_CLK#

U29

AGP_ADSTB1/DVOC_CLK

U28

AGP_ADSTB#1/DVOC_CLK#

AA27

AGP_SBSTB/ZV_D4

AA28

AGP_SBSTB#/ZV_D3

R29

AGP_FRAME#/M_DDC1_DATA

P26

AGP_IRDY#/M_I2C_CLK

P27

AGP_TRDY#/M_DDC1_CLK

N25

AGP_STOP#/M_DDC2_DATA

R28

AGP_DEVSEL#/M_I2C_DATA

AC27

AGP_REQ#/ZV_CLK

AD29

AGP_GNT#/ZV_D15

P28

AGP_PAR

J29

AGP_AD0/DVOB_HSYNC

J28

AGP_AD1/DVOB_VSYNC

K26

AGP_AD2/DVOB_D1

K25

AGP_AD3/DVOB_D0

L26

AGP_AD4/DVOB_D3

J27

AGP_AD5/DVOB_D2

K29

AGP_AD6/DVOB_D5

K27

AGP_AD7/DVOB_D4

M29

AGP_AD8/DVOB_D6

M28

AGP_AD9/DVOB_D9

L24

AGP_AD10/DVOB_D8

M27

AGP_AD11/DVOB_D11

N29

AGP_AD12/DVOB_D10

M25

AGP_AD13/DVOBC_CLKINT#

N26

AGP_AD14/DVOB_FLD/STL

N27

AGP_AD15/M_DDC2_CLK

R25

AGP_AD16/DVOC_VSYNC

R24

AGP_AD17/DVOC_HSYNC

T29

AGP_AD18/DVOC_BLANK#

T27

AGP_AD19/DVOC_D0

T26

AGP_AD20/DVOC_D1

U27

AGP_AD21/DVOC_D2

V27

AGP_AD22/DVOC_D3

V28

AGP_AD23/DVOC_D4

U26

AGP_AD24/DVOC_D7

V29

AGP_AD25/DVOC_D6

W29

AGP_AD26/DVOC_D9

V25

AGP_AD27/DVOC_D8

W26

AGP_AD28/DVOC_D11

W25

AGP_AD29/DVOC_D10

W27

AGP_AD30/DVOC_INT#/DPMS_CLK

Y29

AGP_AD31/DVOC_FLD/STL

82830

U30C

(DVOB/DVOC & ZV port)

B

+VTT

V14

AGP

Interface

AB26

V15

VDD_LM

VDD_LM

AGP_PIPE#/ZV_D10

AGP_WBF#/ZV_D9

AB29

V16

AE16

VDD_LM

AGP_RBF#/ZV_D11

AB25

AE15

VDD_LM

VDD_LM

AGP_ST0/ZV_D14

AC28

AD15

VDD_LM

AGP_ST1/ZV_D13

AC29

AD16

VDD_LM

AGP_ST2/ZV_D12

AB27

+3V

AE25

AH7

+1.8V_SW

AD23

VCCP_IO

VCCP_IO

LM_CMD

LM_SCK

LM_SIO

AF7

AJ7

+1.5V_SW

J24

F26

VCCP_HUB

VCCP_HUB

LM_RQ0

LM_RQ1

AG11

AJ12

+VTT

1 2

L16

C103 .1UF

12
12

C205 .1UF

N24

W23

J26

M26

R26

V26

AA26

L23

AA23

VCCP_AGP

VCCP_AGP

VCCP_AGP

VCCP_AGP

VCCP_AGP

VCCQ_AGP

VCCQ_AGP

VCCP_AGP

Almador-M
GMCH

Local Memory
Interface

LM_RQ2

LM_RQ3

LM_RQ4

LM_RQ5

LM_RQ6

LM_RQ7

LM_RCLK

LM_GCLK

AG12

AH13

AG13

AJ13

AG14

AJ14

AJ6

AG6

L0603

U24

AE6G7G10

VCCP_AGP

VCCP_AGP

VCCA_HPLL

Interface

LM_RAMREF0

LM_RAMREF1

AD14

AE14

+3V

VCCA_PLL

VCCA_CPLL

Power

LM_CTM

LM_CTM#

AH15

AJ15

G20

AF6

VCCQ_SM

VCCQ_SM

LM_CFM

LM_CFM#

AJ16

AH16

C

+1.8V_SW

AE7

AC9

VCCPCMOS_LM

VCCPCMOS_LM

VCCP_SM

D5D8D11

AC8

AF26

VCCPCMOS_LM

VCCPCMOS_LM

VCCP_SM

VCCP_SM

VCCP_SM

D14

D17

VCCA_DAC

VCCA_DAC

VCCP_SM

1 2

R66 0_0805

12

12

C96
.01UF

+VTT

AG27F5J5M5R5V5AA5

VCC_H

VCC_H

VCC_H

VCC_H

VCC_H

VCCA_DAC

VCCP_SM

VCCP_SM

VCCP_SM

VCCP_SM

VCCP_SM

VCCP_SM

VCCP_SM

D20

D23

D26F7F15

G11

G19

C95
.1UF

AD5

VCC_H

VCC_H

VCCP_SM

G23

+1.8V_SW

AG5

E2

VCC_H

VCC_H

VCC_LM

VCC_LM

AC10

AC11

VCC_LM

AD11

L14 .1UH_0805

L17 .1UH_0805

+1.5V_SW

+VCCA_DPLL1

+VCCA_DPLL0

AC20

F25

AC21

AF21

AF24

VCCP_DVO

VCCP_DVO

VCCP_DVO

VCCA_DPLL0

VCCA_DPLL1

Display

Interface

(DVOA port)

Local Memory
Interface

VCC_LM

VCC_LM

VCC_LM

VCC_LM

VCC_LM

VCC_LM

AD12

AD13

AE18

AD17

AD18

AD19

12
12

12

DAC_VSYNC
DAC_HSYNC

DAC_RED#

DAC_GREEN#

DAC_BLUE#

DAC_RED

DAC_GREEN

DAC_BLUE

IO_DDC1CLK

IO_DDC1DATA

DAC_REFSET

DVO_CLKIN

DVO_BLANK#

DVO_VSYNC
DVO_HSYNC

IO_I2CCLK

IO_I2CDATA

DVO_CLK#

DVO_CLK

DVO_D0
DVO_D1
DVO_D2
DVO_D3
DVO_D4
DVO_D5
DVO_D6
DVO_D7
DVO_D8

DVO_D9
DVO_D10
DVO_D11

IO_DDC2DATA

IO_DDC2CLK

DVO_INTR#

DVO_FIELD

LM_DQA0
LM_DQA1
LM_DQA2
LM_DQA3
LM_DQA4
LM_DQA5
LM_DQA6
LM_DQA7

LM_DQB0
LM_DQB1
LM_DQB2
LM_DQB3
LM_DQB4
LM_DQB5
LM_DQB6
LM_DQB7

AGP_BUSY#

+3V

C227
.1UF

D

+VTT

12

C210

+

100UF_D2_6.3V

DAC_VSYNC

AE29

DAC_HSYNC

AD28

DAC_RED#

AF28

DAC_GREEN#

AG28

DAC_BLUE#

AH27
AF29
AG29
AH28
AE27
AD27

R53 255_1%

AJ27

DVOA_CLKINT

AD20
AD21
AF23
AF22

DVOA_I2CCLK

AD25

DVOA_I2CDATA

AC25

DVCLK#

AG24

DVCLK

AJ24

DVOD0

AJ22

DVOD1

AH22

DVOD2

AG22

DVOD3

AJ23

DVOD4

AH23

DVOD5

AG23

DVOD6

AE23

DVOD7

AE24

DVOD8

AJ25

DVOD9

AH25

DVOD10

AG25

DVOD11

AJ26

AD26
AE26

DVO_INTR#

AE21
AE22

AG17
AJ17
AG18
AJ18
AG19
AJ19
AG20
AJ20

AJ11
AH10
AJ10
AG10
AJ9
AG9
AJ8
AG8

AC24

+1.8V_SW

12

R, L, C
place near
GMCH.

12

12

C92

C93

+

.1UF

100UF_D2_6.3V

1 2

DVOA_BLANK# 15
DVOA_VSYNC 15
DVOA_HSYNC 15
DVOA_I2CCLK 15
DVOA_I2CDATA 15

R50 22

1 2

R52 22

1 2

RP13 16P8R_22

1
2
3
4
5
6
7
8 9
4 5
3 6
2 7
1 8

RP14 8P4R_22

R46
@33

1 2

C77
@10PF

C108
68PF

16
15
14
13
12
11
10

+3V_SW

12

DVOA_D0
DVOA_D1
DVOA_D2
DVOA_D3
DVOA_D4
DVOA_D5
DVOA_D6
DVOA_D7
DVOA_D8
DVOA_D9
DVOA_D10
DVOA_D11

DVOA_STALL 15

R452

8.2K

+1.5V_SW

R289 @2.2K
R290 2.2K

R292 @2.2K
R293 10K

DAC_VSYNC 16,36
DAC_HSYNC 16,36

R72 37.4_1%
R63 37.4_1%
R61 37.4_1%

DAC_RED 16,36
DAC_GREEN 16,36
DAC_BLUE 16,36
IO_DDC1CLK 16
IO_DDC1DATA 16

TV_I2CDATA
TV_I2CCLK

C756
27PF

AGP_BUSY# 17

E

Strap Name Low High
DVOA_D0 Reserved 133MHz
DVOA_D1 IOQD=2 IOQD=8
DVOA_D5 Desktop Mo bi le
DVOA_D6 Dual Ended Term Single E nded Term

1 2
1 2

1 2
1 2

1 2
1 2
1 2

DVOA_CLK# 15
DVOA_CLK 15

DVOA_D[0..11] 15

12

DVOA_D6
DVOA_D5

DVOA_D1
DVOA_D0

Place R8, R234, R278
near VGA Connector.

DAC_VSYNC

DAC_HSYNC

TV_DDCDATA 15
TV_DDCCLK 15

12

C757
27PF

R59

1 2

680

DVOA_I2CDATA
DVOA_I2CCLK

DVOA_CLKINT
DVO_INTR#

TV_I2CDATA

TV_I2CCLK

12

C765
10PF

R91 10K

1 2
1 2

R89 10K

R56 100K

1 2
1 2

R57 100K

R554 4.7K

1 2
1 2

R555 4.7K

H_BSEL0 5,8

12

C764
10PF

+3V_SW

+1.5V_SW

+3V_SW

VCC

Y

+3V_SW

5
4

R568

732_1%_0603

604_1%_0603

1.5V level clock

12

R569

1 2

DPMS_CLK

R295 10K

1 2

R55 10K

1 2

+VS_RIMMREF

VS_RIMMREF

B

C

1 2

R294 100_1%_0603

12

C454
.1UF

12

C452
.1UF

D

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

E

of

11 45Monday, September 10, 2001

0A

U60

1

NC

4 4

RTCCLK17,23,24

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

2

A

3

GND

NC7S14

A

A

B

C

D

E

Layout note :

Distribute as close as possible
to GMCH Processor Quadrant .

+VTT

1 1

+VTT

+VTT

2 2

3 3

+VTT

+VTT

+VTT

+VTT

12

C100
.1UF

12

C109
.1UF

12

C65

+

150UF_D2_6.3V

12

C211

+

150UF_D2_6.3V

12

C64

+

150UF_D2_6.3V

12

C50

+

150UF_D2_6.3V

12

C156
.1UF

12

12

12

C87
.1UF

C86
.1UF

C173
.1UF

12

C537
.1UF

12

C89
.1UF

12

C414

+

150UF_D2_6.3V

12

C128
.1UF

12

C192
.1UF

12

C138
.1UF

12

C184
.1UF

12

12

12

12

12

C115
.1UF

C194
.1UF

C153
.1UF

12

C547
.1UF

C111
.1UF

C195
.1UF

12

12

12

C212

+

150UF_D2_6.3V

12

C116
.1UF

12

C199
.1UF

12

C159
.1UF

12

C84
.1UF

C113
.1UF

C206
.1UF

12

12

C142
.1UF

12

C88
.1UF

12

C117
.1UF

12

C204
.1UF

12

C171
.1UF

12

C187
.1UF

12

12

C132

C106

.1UF

.1UF

12

12

C112

C85

.1UF

.1UF

12

12

C143

C147

.1UF

.1UF

12

12

C172

C94

.1UF

.1UF

12

12

C189

C190

.1UF

.1UF

12

12

C191

C130

.1UF

.1UF

12

C114

C136

.1UF

.1UF

12

12

C151

C148

.1UF

.1UF

12

12

12

C161

C154

.1UF

.1UF

12

12

C155

C162

.1UF

.1UF

12

12

C188

C110

.1UF

.1UF

12

12

C226

C145

.1UF

.1UF

12

C174

C183

.1UF

.1UF

12

12

C140

C139

.1UF

.1UF

12

12

C134

C146

.1UF

.1UF

Layout note :

Distribute as close as possible
to VCCPCMOS_LM .

+1.8V_SW

12

C74

+

22UF_1206_10V

12

C224
.1UF

Layout note :

Distribute as close as possible
to GMCH Local M e m or y Q u a drant .

+1.8V_SW

12

C133
82PF

12

+

22UF_1206_10V

C82

12

C135
.1UF

Layout note :

Distribute as close as possible
to GMCH AGP/DVO Quadrant .

+1.5V_SW

12

+

22UF_1206_10V

C165

12

12

C97

C157

.1UF

.1UF

Layout note :

Distribute as close as possible
to GMCH Sy s te m Me m ory Quadrant .

+3V

12

+

22UF_1206_10V

C221

12

12

C202

C203

.1UF

.1UF

12

C120
.1UF

12

12

C131

C137

.1UF

82PF

12

12

C123

C168

.1UF

82PF

12

12

C214

C201

.1UF

82PF

12

C121
.01UF

12

12

C197

C118

.1UF

.1UF

12

12

C141

C193

.1UF

82PF

12

12

C236

C213

.1UF

82PF

12

C122
.01UF

12

12

12

12

12

12

C175

C126

C185

C181

.1UF

.1UF

82PF

12

12

C209
.1UF

12

C208
82PF

C240
.1UF

C125

.1UF

.1UF

12

12

C239

C220

.1UF

.1UF

12

C180

C186

82PF

.1UF

12

12

12

12

C215
82PF

C238
.1UF

C244
.1UF

C237
.1UF

12

C242
.1UF

Layout note :

+VTT

12

C66

+

150UF_D2_6.3V

4 4

12

C49

+

150UF_D2_6.3V

12

C67

+

150UF_D2_6.3V

12

C415

+

150UF_D2_6.3V

Distribute as close as possible
to IO Quadrant .

+3V

12

C235

+

22UF_1206_10V

12

C241
.1UF

12

C225
.1UF

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

12 45Monday, September 10, 2001

E

of

0A

A

B

C

D

E

1 1

SM_D_MA[0..12]10 SM_MA[0..12] 14

RP3

8P4R_10
RP5

8P4R_10
RP4

8P4R_10

SM_MA3
SM_MA2
SM_MA1
SM_MA0

SM_MA5
SM_MA4
SM_MA7
SM_MA6

SM_MA9
SM_MA8
SM_MA10
SM_MA11

SM_MA12

SM_D_MA3

1 8

SM_D_MA2

2 7

SM_D_MA1

3 6

SM_D_MA0

4 5

SM_D_MA5

2 2

3 3

SM_D_MA4
SM_D_MA7
SM_D_MA6

SM_D_MA9
SM_D_MA8
SM_D_MA10
SM_D_MA11

SM_D_MA12

1 8
2 7
3 6
4 5

1 8
2 7
3 6
4 5

1 2
R147 10

Layout note :

One .1uF cap per power pin .
Place each cap close to SODIMM(DIMM 0) pin .

+3V

12

12

12

C462
.1UF

+3V

12

C417

+

22UF_1206_10V

12

C475

C465

.1UF

.1UF

C491
.1UF

12

C566
.1UF

Layout note :

One .1uF cap per power pin .
Place each cap close to SODIMM(DIMM 1) pin .

+3V

12

12

12

C461
.1UF

+3V

12

C416

+

22UF_1206_10V

12

C521

C489

.1UF

.1UF

C574
.1UF

12

C586
.1UF

12

12

C592

C579

.1UF

.1UF

12

12

C606

C593

.1UF

.1UF

12

12

C494

C602

.1UF

.1UF

12

12

C495

C481

.1UF

.1UF

12

12

C613
.1UF

12

C543
.1UF

12

C598
.1UF

12

C553
.1UF

12

C584

C556

.1UF

.1UF

12

12

C591

C601

.1UF

.1UF

12

12

C540

C528

.1UF

.1UF

12

12

C611

C619

.1UF

.1UF

12

12

C492
.1UF

12

C575
.1UF

12

C479

C464

.1UF

.1UF

12

12

C467

C470

.1UF

.1UF

4 4

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

13 45Monday, September 10, 2001

E

of

0A

A

+3V +3V +3V +3V

JP28

1

11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59

61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97

99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143

+12V_SW

R176
100K

2

G

Q24 2N7002

D

S

D

S

Q22 2N7002

G

2

VSS

3

DQ0

5

DQ1

7

DQ2

9

DQ3
VCC
DQ4
DQ5
DQ6
DQ7
VSS
CKE0#DQMB0
CKE1#/DQMB1
VCC
A0
A1
A2
VSS
DQ8
DQ9
DQ10
DQ11
VCC
DQ12
DQ13
DQ14
DQ15
VSS
RFU/DQ64
RFU/DQ65

RFU/CLK0
VCC
RFU/RAS#
WE#
RE0#/S0#
RE1#/S1#
RFU/EDO_OE#
VSS
RFU/DQ66
RFU/DQ67
VCC
DQ16
DQ17
DQ18
DQ19
VSS
DQ20
DQ21
DQ22
DQ23
VCC
A6
A8
VSS
A9
A10
VCC
CE2#/DQMB2
CE3#/DQMB3
VSS
DQ24
DQ25
DQ26
DQ27
VCC
DQ28
DQ29
DQ30
DQ31
VSS
SDA
VCC

SO-DIMM144-Reverse

DIMM0 DIMM1

SM_SEL017

SM_DQ0
SM_DQ2

SM_DQ3
SM_DQ4

SM_DQ5
SM_DQ6

1 1

2 2

3 3

4 4

SM_DQM010
SM_DQM110

SM_MA013
SM_MA113
SM_MA213

SMD_CLK010

SM_RAS#10
SM_WE#10
SM_CS#010
SM_CS#110

SM_MA613
SM_MA813

SM_MA913

SM_MA1013

SM_DQM210
SM_DQM310

SMB_DATA8,17,19

SM_DQ7
SM_DQM0

SM_DQM1
SM_MA0

SM_MA1
SM_MA2

SM_DQ8
SM_DQ9
SM_DQ10
SM_DQ11

SM_DQ12
SM_DQ13
SM_DQ14
SM_DQ15

SMD_CLK0
SM_RAS#

SM_WE#
SM_CS#0
SM_CS#1

SM_DQ16
SM_DQ17
SM_DQ18
SM_DQ19

SM_DQ20
SM_DQ21
SM_DQ22
SM_DQ23

SM_MA6
SM_MA8

SM_MA9
SM_MA10

SM_DQM2
SM_DQM3

SM_DQ24
SM_DQ25
SM_DQ26
SM_DQ27

SM_DQ28
SM_DQ29
SM_DQ30
SM_DQ31

SODIMM0_SMDAT

SMB_CLK8,17,19

1 3

1 3

DQ32
DQ33
DQ34
DQ35

VCC
DQ36
DQ37
DQ38
DQ39

DQMB4/CE4#
DQMB5/CE5#

VCC

DQ40
DQ41
DQ42
DQ43

VCC
DQ44
DQ45
DQ46
DQ47

DQ68/RFU
DQ69/RFU

CKE0/RFU

VCC

CAS#/RFU
CKE1/RFU

A12/RFU
A13/RFU

CLK1/RFU
DQ70/RFU

DQ71/RFU

VCC

DQ48
DQ49
DQ50
DQ51

DQ52
DQ53
DQ54
DQ55

VCC

VCC

DQMB6/CE6#
DQMB7/CE7#

DQ56
DQ57
DQ58
DQ59

VCC
DQ60
DQ61
DQ62
DQ63

VCC

VSS

VSS

VSS

VSS

VSS

VSS

BA0
VSS
BA1
A11

VSS

VSS
SCL

B

SM_DQ[0..63] 10

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

A3

32

A4

34

A5

36
38
40
42
44
46
48
50
52
54
56
58
60

62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104

A7

106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144

D45

RB751V

R352 0

+3V

21

SM_DQ32
SM_DQ33SM_DQ1
SM_DQ34
SM_DQ35

SM_DQ36
SM_DQ37
SM_DQ38
SM_DQ39

SM_DQM4
SM_DQM5

SM_MA3
SM_MA4
SM_MA5

SM_DQ40
SM_DQ41
SM_DQ42
SM_DQ43

SM_DQ44
SM_DQ45
SM_DQ46
SM_DQ47

SM_CKE0
SM_CAS#

SM_CKE1
SM_MA12

1 2

SM_DQ48
SM_DQ49
SM_DQ50
SM_DQ51

SM_DQ52
SM_DQ53
SM_DQ54
SM_DQ55

SM_MA7
SM_BA0

SM_BA1
SM_MA11

SM_DQM6
SM_DQM7

SM_DQ56
SM_DQ57
SM_DQ58
SM_DQ59

SM_DQ60
SM_DQ61
SM_DQ62
SM_DQ63

SODIMM0_SMCLK

R551
100K

10

13

R194
100K

SM_DQM4 10
SM_DQM5 10

SM_MA3 13
SM_MA4 13
SM_MA5 13

SM_CKE0 10
SM_CAS# 10

SM_CKE1 10
SM_MA12 13

SMD_CLK1

SM_MA7 13
SM_BA0 10

SM_BA1 10
SM_MA11 13

SM_DQM6 10
SM_DQM7 10

+3V

12

C318
.1UF

6

INH
A

9

B

3

X
Y

U17

16

1

X0

5

VCC

X1

2

X2

4

X3

12

Y0

14

Y1

15

Y2

11

Y3

GND

GND

74HC4052

7

8

C

SMD_CLK1 10

+3V

1 8

2 7

3 6

RP7

8P4R_10K

4 5

SODIMM0_SMCLK
SODIMM1_SMCLK

SODIMM0_SMDAT
SODIMM1_SMDAT

D

JP29

1
SM_DQ0
SM_DQ1
SM_DQ2
SM_DQ3

SM_DQ4
SM_DQ5
SM_DQ6
SM_DQ7

SM_DQM0
SM_DQM1

SM_MA0
SM_MA1
SM_MA2

SM_DQ8
SM_DQ9
SM_DQ10
SM_DQ11

SM_DQ12
SM_DQ13
SM_DQ14
SM_DQ15

SMD_CLK210

SM_CS#210
SM_CS#310

SMD_CLK2
SM_RAS#

SM_WE#
SM_CS#2
SM_CS#3

SM_DQ16
SM_DQ17
SM_DQ18
SM_DQ19

SM_DQ20
SM_DQ21
SM_DQ22
SM_DQ23

SM_MA6
SM_MA8

SM_MA9
SM_MA10

SM_DQM2
SM_DQM3

SM_DQ24
SM_DQ25
SM_DQ26
SM_DQ27

SM_DQ28
SM_DQ29
SM_DQ30
SM_DQ31

SODIMM1_SMDAT

Place closely to DIMM0

12

R341
10

12

C533
10PF

12

12

VSS

3

DQ0

5

DQ1

7

DQ2

9

DQ3

11

VCC

13

DQ4

15

DQ5

17

DQ6

19

DQ7

21

VSS

23

CKE0#DQMB0

25

CKE1#/DQMB1

27

VCC

29

A0

31

A1

33

A2

35

VSS

37

DQ8

39

DQ9

41

DQ10

43

DQ11

45

VCC

47

DQ12

49

DQ13

51

DQ14

53

DQ15

55

VSS

57

RFU/DQ64

59

RFU/DQ65

61

RFU/CLK0

63

VCC

65

RFU/RAS#

67

WE#

69

RE0#/S0#

71

RE1#/S1#

73

RFU/EDO_OE#

75

VSS

77

RFU/DQ66

79

RFU/DQ67

81

VCC

83

DQ16

85

DQ17

87

DQ18

89

DQ19

91

VSS

93

DQ20

95

DQ21

97

DQ22

99

DQ23

101

VCC

103

A6

105

A8

107

VSS

109

A9

111

A10

113

VCC

115

CE2#/DQMB2

117

CE3#/DQMB3

119

VSS

121

DQ24

123

DQ25

125

DQ26

127

DQ27

129

VCC

131

DQ28

133

DQ29

135

DQ30

137

DQ31

139

VSS

141

SDA

143

VCC

SO-DIMM144-Normal

SMD_CLK1SMD_CLK0 SMD_CLK2 SMD_CLK3

R357
10

C559
10PF

Place closely to DIMM1

12

R335
10

12

C511
10PF

DQMB4/CE4#
DQMB5/CE5#

DQMB6/CE6#
DQMB7/CE7#

12

R349
10

12

C546
10PF

DQ32
DQ33
DQ34
DQ35

VCC
DQ36
DQ37
DQ38
DQ39

VSS

VCC

VSS
DQ40
DQ41
DQ42
DQ43

VCC
DQ44
DQ45
DQ46
DQ47

VSS

DQ68/RFU
DQ69/RFU

CKE0/RFU

VCC

CAS#/RFU
CKE1/RFU

A12/RFU
A13/RFU

CLK1/RFU

VSS

DQ70/RFU
DQ71/RFU

VCC
DQ48
DQ49
DQ50
DQ51

VSS
DQ52
DQ53
DQ54
DQ55

VCC

VSS

VCC

VSS
DQ56
DQ57
DQ58
DQ59

VCC
DQ60
DQ61
DQ62
DQ63

VSS

VCC

VSS

BA0
BA1

A11

SCL

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30

A3

32

A4

34

A5

36
38
40
42
44
46
48
50
52
54
56
58
60

62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104

A7

106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144

SM_DQ32
SM_DQ33
SM_DQ34
SM_DQ35

SM_DQ36
SM_DQ37
SM_DQ38
SM_DQ39

SM_DQM4
SM_DQM5

SM_MA3
SM_MA4
SM_MA5

SM_DQ40
SM_DQ41
SM_DQ42
SM_DQ43

SM_DQ44
SM_DQ45
SM_DQ46
SM_DQ47

SM_CKE2
SM_CAS#

SM_CKE3
SM_MA12
1 2

R344 0

SM_DQ48
SM_DQ49
SM_DQ50
SM_DQ51

SM_DQ52
SM_DQ53
SM_DQ54
SM_DQ55

SM_MA7
SM_BA0

SM_BA1
SM_MA11

SM_DQM6
SM_DQM7

SM_DQ56
SM_DQ57
SM_DQ58
SM_DQ59

SM_DQ60
SM_DQ61
SM_DQ62
SM_DQ63

SODIMM1_SMCLK

E

SMD_CLK3

SM_CKE2 10

SM_CKE3 10

SMD_CLK3 10

AB Output

0 X0, Y0

0
1

0

11

A

X1, Y1
X2, Y2

01

X3, Y3

System SMBus Selector

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

E

of

14 45Monday, September 10, 2001

0A

5

+3V_SW

12

C441
10UF_10V_1206

D D

DVOA_D[0..11]11

DVOA_STALL11

DVOA_CLK11
DVOA_CLK#11
DVOA_BLANK#11

+3V_SW

DVOA_I2CDATA11
DVOA_I2CCLK11

+1.8V_SW

DVOA_CLK
DVOA_CLK#

12

C485

22UF_1206_10V

+1.5V_SW

R322 15_1%

PCI_RST#9,17,21,22,23,26,29,31,37

CLK_VCH8

12

12

12

12

12

12

DVOA_HSYNC11
DVOA_VSYNC11

R327
75_1%

C C

CLK_VCH

R226

B B

@33

1 2

C330
@10PF

+1.8V_SW

12

C486
10UF_10V_1206

+3V_SW

A A

+

DVOA_D0
DVOA_D1
DVOA_D2
DVOA_D3
DVOA_D4
DVOA_D5
DVOA_D6
DVOA_D7
DVOA_D8
DVOA_D9
DVOA_D10
DVOA_D11

12
DVOA_HSYNC
DVOA_VSYNC

LCD_VREF

R303 @10K

1 2

R301 @10K

1 2

PID3
PID2
PID1
PID0

R326 36.5_1%

1 2

R299 2.2K

R51

R49

@33

@33

1 2

1 2

C78

C80

@10PF

@10PF

R329

2K_1%

LCD_VREF

R323

12

C493

2.2UF_16V_0805

2K_1%

12

C498

C499

.1UF

.1UF

12

C446

C478

.1UF

.1UF

12

C463

C497

.1UF

1000PF

5

M11
P10
N10
M10

M9

M7

M8

N11
P12
P11
N12
P13

F13
E14
F12
E13
E12
C13
B13
C14
C12

D13
D12

B14

12

D14

M12

12

C476
.1UF

12

C445
.1UF

P9
P8

P7
N7

P6
N6

N8

N9

82807

12

12

12

U28

DVODATA0
DVODATA1
DVODATA2
DVODATA3
DVODATA4
DVODATA5
DVODATA6
DVODATA7
DVODATA8
DVODATA9
DVODATA10
DVODATA11

CLKIN
CLKIN#
BLANK#
CLKOUT
LCD_HDE#
LCD_VDE#
LCD_VREF

GPIO8
GPIO7
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0

I2C_DATA
I2C_CLK

DVOrCOMP
TESTIN

PCIRST#

OSC

C500
.01UF

C473
.1UF

C474
.1UF

12

C447
.1UF

+3V_SW

A2

A13C9D4D6D9E4F11G4H4J4K4L6C6D5D10E8E11F4G11

VCC_3V1

VCC_3V2

VCC_3V3

VCC3_3V4

VCC3_3V5

VCC3_3V6

VCC3_3V7

VSS1

VSS2

VSS3

VSS4

VSS7

VSS8

VSS9

VSS10

VSS11

VSS12

VSS13

VSS14

VSS15

VSS16

A1

A14B1C4

D11E5E6E7E9

PID3
PID2
PID1
PID0

+3V_SW

PAL/NTSC#17

VSS17

E10F5F6F7F8F9F10G5G6G7G8G9G10H5H6H7H8H9H10J5J6J7J8J9J10K5K6K7K8K9K10L4N14P1P14

+3V_SW

182736

45

RP15

8P4R_4.7K

SW1

4
3
2
1

SW DIP-4

DVOC_FLD11

R336 100K

1 2

D46 RB751V

DVOC_CLK
DVOC_CLK#

1 2

VCC3_3V8

VSS5

VCC3_3V9

VSS18

21

R542
@33

C759
@10PF

VCC3_3V10

VCC3_3V11

VSS19

VSS20

+1.5V_SW

5
6
7
8

VCC3_3V12

VSS21

12

4

C5

VCC3_3V13

VCC3_3V14

VCC1_8V16

VSS22

VSS23

VSS6

VSS24

VSS25

R353

@75_1%

R337
100K

R340 10K

R543
@33

1 2

C760
@10PF

4

+1.8V_SW

H11

J11

K11L5L7L8L9

VCC1_8V1

VCC1_8V2

VCC1_8V3

VCC1_8V5

VCC1_8V7

VCC1_8V6

VCC1_8V8

VCC1_8V9

VCC1_8V10

VCC1_8V11

VCC1_8V12

VCH

VSS26

VSS27

VSS28

VSS29

VSS30

VSS31

VSS32

VSS33

VSS34

VSS35

VSS36

DVOC_D[0..11]11

DVOC_CLK#11
DVOC_CLK11

R351 0

12

DVOC_HSYNC11
DVOC_VSYNC11

TV_DDCDATA11
TV_DDCCLK11

R362 360_1%

1 2
1 2

N13

VCC1_8V13

VCC1_8V14

VCC1_8V15

VSS37

VSS40

VSS38

PCI_RST#

VREF_TVO

C536
.1UF

+1.8V_SW

12

L44
L0805

1.8VS_VCH

12

C448
.1UF

L10

C10

C7

H14

H13

VCCA

VCCBA

VCCDA

TV_DATA0

TV_DATA1

VSS39

VSS41

VSS42

DVOC_D11
DVOC_D10
DVOC_D9
DVOC_D8
DVOC_D7
DVOC_D6
DVOC_D5
DVOC_D4
DVOC_D3
DVOC_D2
DVOC_D1
DVOC_D0

SL_STALL

12

12

VSS43

YA0P

VSS44

VSSA

VSSBA

VSSDA

L11

C11

C8

A3B3A4A5B4B5A7B7A6B6A8B8A9B9A10

TXOUT0+

TXOUT0-

U31

13

D11

12

D10

11

D9

10

D8

9

D7

7

D6

6

D5

4

D4

3

D3

2

D2

44

D0

41

XCLK*

40

XCLK

37

POUT

42

H

43

V

29 38

RESET* DVDD2

26

SD

27

SC

15

GPIO[1]

14

GPIO[0]

24

ISET

39

VREF

CH7007

12

R343

10K

12

+

C442

22UF_1206_10V

H12

J14

K14

K13

K12

TV_DATA2

TV_DATA3

TV_DATA4

TV_DATA5

YA0M

YA1P

YA2P

YA1M

TXOUT1+

TXOUT1-

TXOUT2+

TXOUT2-

XO

33

1 2

14.318MHZ

12

C560

22PF

L14

L13

L12

TV_DATA6

TV_DATA7

TV_DATA8

YA2M

YA3P

YA3M

TXCLK0+

Y2

12

C450
.1UF

M14

M13

TV_DATA9

TV_DATA10

TV_DATA11

CLKAP

CLKAM

TXCLK0-

G14

TV_VSYNC

YA4P

YA4M

TXOUT4+

TXOUT4-

DS/BCO

CSYNC

DVDD[0]
DVDD[1]
DVDD[2]

DGND[0]
DGND[1]
DGND[2]

DGND[3]

XI/FIN

32

12

3

12

C451
1000PF

R302 10K

12

G13

G12

F14

J13

J12

VCH_VREFHI

D8

VREF_HI

VREF_LO

TV_CLKIN

TV_HSYNC

TV_BLANK#

TV_CLKOUT

TV_CLKOUT#

ENEXBUF

YA5P

YA5M

YA6P

YA6M

YA7P

YA7M

CLKBP

CLKBM

B10

A11

B11

A12

B12

TXOUT5+

TXOUT5-

TXOUT6+

TXOUT6-

TXCLK1+

TXCLK1-

R534 @75_1%

35

1 2

R535 75_1%

17

1 2

20

CVBS

R536 75_1%

22

1 2

Y

R537 75_1%

211

1 2

CD1

5
16
30

8
18
28

36

31

AVDD

34

AGND

25

VDD

19

GND[0]

23

GND[1]

C578

12PF

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

3

SHFCLK
ENABKL

ENAVDD

FLM

P0
P1
P2
P3
P4
P5
P6
P7
P8

P9
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
P24
P25
P26
P27
P28
P29
P30
P31
P32
P33
P34
P35

LP

DE

+5V_SW

12

D7

E3
E2
E1
F3
F2
F1
G3
G2
G1
H3
H2
H1
J3
J2
J1
K3
K2
K1
L3
L2
L1
M3
M2
M1
N1
N2
P2
N3
P3
M4
N4
P4
M5
N5
P5
M6

C1
B2
D2
D3

C2
C3
D1

12

C567
.01UF

VCH_VREFLO

C541
1000PF

ENBLT
ENVDD
ENEXBUF

+3V_SW

12

12

C570
.1UF

C573
1UF_0603

12

C510
.1UF

R279 150

12

1 2

R283

BKOFF#29

ENBLT29

1

TP1

TP

12

R7
75_1%

12

C562
10UF_10V_1206

12

+1.8V_SW

150

C542
.1UF

12

ENBLT

COMPS 16,36

12

C545
10UF_10V_1206

C571
.1UF

ENVDD

D20

D19

12

C577
10UF_10V_1206

2

RB751V

RB751V

2

+LCDVDD

1
3

21

21

+1.5V_SW

+5V_SW

12

R26
100

2

+3V_SW

2

Q10

2N7002

22K

R305

4.7K

+12V_ALW

22K

R31
100K

13

DISPOFF# 33

+LCDVDD

Q11

2

2N7002

Q12
DTC124EK

FBM-l11-201209-221LMAT

1

+12V_ALW

R33

1
3

150K

+LCDVDD

+3V

C409

@1000PF

SI2302DS

13

Q35

2

C405

+

4.7UF_16V_1206

C421

+

4.7UF_16V_1206

12

+

C420

22UF_1206_10V

R32
100K

LVDS CONNECTOR

LCDVDD

C395

+

C54

C53
1000PF

1 2

L53 @0_0805

1 2

L13

1 2

LCDVDD

TXOUT0­TXOUT0+

TXOUT1­TXOUT1+

LCDVDD

TXOUT0­TXOUT0+

TXOUT1­TXOUT1+

TXOUT5­TXOUT5+ TXOUT6+

TXCLK1­TXCLK1+

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1012

Size Document Number Rev
C

401200

Date: Sheet

.1UF

1 2

JP10

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

JST BM20B-SRDS

JP11

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

IPEX20265-030E

10UF_10V_1206

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

1

TXOUT2­TXOUT2+

TXCLK0­TXCLK0+

TXOUT2­TXOUT2+

TXCLK0­TXCLK0+

TXOUT4­TXOUT4+

TXOUT6-

LCDVDD

12

12

C419

C418

1000PF

.1UF

15 45Monday, September 10, 2001

0A

of

A

B

C

D

E

C5
.1UF

CRTVCC

Q60
2N7002

D

S

1 3

G

2

1 3

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

12

12

C352

C2

220PF

220PF

21

12

12

C163

.1UF
24
2

5
6
9
10

15
16
19
20
23

12

R99
10K

18

D5
RB751V

JP2

CRTGATE

CRT-15P

19

+5V_SW

12

12

R74

R73

2.2K

2.2K

5VDDCDA
5VDDCCL

2N7002

D

G

2

5VDDCDA

Q61

5VDDCCL

S

CDLED# 33
HDDLED# 33

5VDDCCL 36

SCRLED5V# 33
NUMLED5V# 33
CAPSLED5V# 33
DRV05V# 33

CRT Connector

D47

+5V_SW

1 1

D1
DAN217

2

M_SEN#30,36

DAC_RED11,36

DAC_GREEN11,36

DAC_BLUE11,36

2 2

DAC_HSYNC11,36

DAC_VSYNC11,36

DAC_RED

DAC_GREEN

DAC_BLUE

75_1%

DAC_HSYNC

DAC_VSYNC

R250

12

12

C360
18PF

R256

75_1%

12

12

C365
18PF

D

S

13

Q33
2N7002

G

2

CRTGATE

75_1%

S

G

2

12

R4

D

13

Q3
2N7002

1 2

R254 100K

L7

1 2

FCM2012C-800(0805)

L35

1 2

FCM2012C-800(0805)

L36

1 2

FCM2012C-800(0805)

12

C18
18PF

R135 33

1 2

R142 33

1 2

+12V_SW

12

C8
18PF_0603

L2

1 2

FBM-L10-160808-301

L33

1 2

FBM-L10-160808-301

2 1

RB491D

D16
DAN217

2

DAC_R

DAC_G

DAC_B

12

C357
18PF_0603

12

C11
10PF

1

3

DAC_H

12

1

3

POLYSWITCH_0.5A

D15
DAN217

2

12

C361
18PF_0603

DAC_V

C359
10PF

F1

+1.8V_SW

1

3

12

C354
100PF

12

12

C16
.1UF

12

C353
100PF

GMBus switch

+3V_SW

1

D39

DAN217

1

3

2

JP6
RCA JACK

2

U10

CDLED_CON#21
HDDLED_CON#21

IO_DDC1DATA11 5VDDCDA 36

IO_DDC1CLK11

SCROLLED#29
NUMLED#29
CAPSLED#29
DRV0#31

3
4
7
8

11

14
17
18
21
22

1

13

1A1
1A2
1A3
1A4
1A5

2A1
2A2
2A3
2A4
2A5

OE1#
OE2#

CBTD_3384

VCC

GND

1B1
1B2
1B3
1B4
1B5

2B1
2B2
2B3
2B4
2B5

3 3

COMPS15,36

4 4

TV Out CONN.

Output filter network

C20
33PF_0603

1 2

L9

1.8UH_0603

1 2

C21
100PF_0603

1 2

COMPS_CON

C22
270PF_0603

1 2

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

16 45Monday, September 10, 2001

E

of

0A

A

EC_SMI#29

EC_SCI#29
EC_LID_OUT#29
IDE_PATADET21

1 1

PCI_AD[0..31]22,23,26,37

2 2

Place closely to ICH3-M

CLK_ICH14

12

R212
@10

12

C327
@15PF

CLK_ICH48

12

3 3

R188
@10

12

C290
@15PF

+RTCVCC

4 4

EC_SMI#
EC_SCI#
EC_LID_OUT#
IDE_PATADET

PM_LANPWROK25,29

PM_RSMRST# ICH3_PME#

1 2

R495 1K

R566 22M_0603

R474

1 2

0

PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31

PCI_C/BE#022,23,26,37
PCI_C/BE#122,23,26,37
PCI_C/BE#222,23,26,37
PCI_C/BE#322,23,26,37

PCI_GNT#022
PCI_GNT#137
PCI_GNT#223
PCI_GNT#326
PCI_GNT#437

PCI_REQ#019,22
PCI_REQ#119,37
PCI_REQ#219,23
PCI_REQ#319,26
PCI_REQ#419,37

C702 .047UF

1 2

12

10M_0603

R567

2.4M_1%_0603
1 2

A

R475

1 2

VGATE34,42

PM_CPUPERF#5

PM_SSMUXSEL7,42

PM_THRM#29
PM_SUS_STAT#29,31
RTCCLK11,23,24 LPC_DRQ#1 31

PM_STPPCI#8

PM_STPCPU#8

PM_SLP_S5#29
PM_SLP_S3#29
PM_SLP_S1#8,29

PM_RSMRST#19

ICH_SWI#19,29

PM_PWROK34

PBTN_OUT#29

PM_DPRSLPVR7,42

PM_CLKRUN#19,22,23,29,31,37 INT_IRQ14 19,21
PM_BATLOW#19,29

AGP_BUSY#11

U16A

J2

PCI_AD0

K1

PCI_AD1

J4

PCI_AD2

K3

PCI_AD3

H5

PCI_AD4

K4

PCI_AD5

H3

PCI_AD6

L1

PCI_AD7

L2

PCI_AD8

G2

PCI_AD9

L4

PCI_AD10

H4

PCI_AD11

M4

PCI_AD12

J3

PCI_AD13

M5

PCI_AD14

J1

PCI_AD15

F5

PCI_AD16

N2

PCI_AD17

G4

PCI_AD18

P2

PCI_AD19

G1

PCI_AD20

P1

PCI_AD21

F2

PCI_AD22

P3

PCI_AD23

F3

PCI_AD24

R1

PCI_AD25

E2

PCI_AD26

N4

PCI_AD27

D1

PCI_AD28

P4

PCI_AD29

E1

PCI_AD30

P5

PCI_AD31

K2

PCI_C/BE#0

K5

PCI_C/BE#1

N1

PCI_C/BE#2

R2

PCI_C/BE#3

A4

PCI_GNT#0

E3

PCI_GNT#1

D2

PCI_GNT#2

D5

PCI_GNT#3

B4

PCI_GNT#4

D3

PCI_REQ#0

F4

PCI_REQ#1

A3

PCI_REQ#2

R4

PCI_REQ#3

E4

PCI_REQ#4

82801

1 2

R491 10M_0603

12

32.768KHZ
C696
12PF

X3

PM_RSMRST#

V4Y5AB3V5AC2

PM_AGPBUSY#/GPIO6

PCI

Interface

VSS0

VSS1

A1

A13

12

C713
12PF

AB21

AB1

AA6

AA1

AA7

W20

AA5

AA2

PM_RI#

PM_PWROK

PM_SLP_S3#

PM_SLP_S5#

PM_BATLOW#

PM_AUXPWROK

VSS2

VSS3

A16

A17

A20

RTC_VBIAS
RTC_X1

RTC_X2

PM_RSMRST#

PM_PWRBTN#

PM_DPRSLPVR

PM_SLP_S1#/GPIO19

PM_CLKRUN#/GPIO24

PM_C3_STAT#/GPIO21

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

VSS4

VSS5

VSS6

VSS7

VSS8

VSS9

VSS10

VSS11

VSS12

VSS13

A23B8B10

B13

B14

B15

B18

B19

B20

+RTCVCC

V21

U21

AA4

AB4U5U20

PM_THRM#

PM_SUS_CLK

PM_SUS_STAT#

PM_STPPCI#/GPIO18

PM_STPCPU#/GPIO20

GeyservillePower Management

VSS14

VSS15

VSS16

VSS17

VSS18

B22C3C6

F19

C14

CLK_ICH148
CLK_ICH488

1 2

B

+3V_SW

12

Y20

V19B7D11

B11

C11C7A7V1U3T3U2T2U4U1V2W2Y4Y2W3W4Y3

AC_RST#

AC_BITCLK

AC_SDATAIN0

AC_SDATAIN1

AC_SDATAOUT

PM_GMUXSEL/GPIO23

PM_CPUPREF#/GPIO22

PM_VGATE/VRMPWRGD

AC'97

Interface

ICH3-M (1/2)

VSS

VSS19

VSS20

VSS21

VSS22

VSS23

VSS24

VSS25

VSS26

VSS27

VSS28

VSS29

VSS30

C15

C16

C17

C18

C19

C20

C21

C22D9D13

D16

D17

CLK_ICH14
CLK_ICH48

R472 15K

B

1UF_0603

C690

R401
@4.7K

EC_SMI#

IDE_PATADET

EC_SCI#

GPIO_7

GPIO_8

AC_SYNC

Interface

LPC_AD0

LPC_AD1

LPC

LPC_AD2

LPC_AD3

LPC_DRQ#0

GPIO_12

LPC_DRQ#1

LPC_FRAME#

unMUX

GPIO

Clocks EEPROM

LAN_RSTSYNC

CLK_RTCX2

CLK_RTCX1

CLK_RTEST#

CLK_48

CLK_14

VSS31

D20

12

VSS32

D21

VSS33

D22

VSS34

E5

CLK_VBIAS

AC6

AC7Y7F20

J23

AB7

RTC_VBIAS

RTC_X2

RTC_X1

RTC_RST#

12

J1
JOPEN

12

R482
1K

CLK_ICHAPIC

EC_LID_OUT#LAN_CLK_ICH

J19

GPIO_13

GPIO_25

GPIO_27

GPIO_28

INT_APICCLK

LAN

Interface

LAN_RXD0

LAN_RXD1

LAN_RXD2

LAN_TXD0

LAN_TXD1

LAN_TXD2

LAN_JCLK

C8A8A9B9C10

A10C9D7

R529 22

1 2

H_PICD1

H_PICD0

INT_PIRQA#

INT_PIRQB#

J20

INT_APICD1

INT_APICD0

INT_PIRQA#

Interrupt
Interface

Interface

EEP_SHCLK

D10

C

LPC_AD0 29,31
LPC_AD1 29,31
LPC_AD2 29,31
LPC_AD3 29,31

LPC_FRAME# 29,31
WARM_RST# 34
SM_SEL0 14
PAL/NTSC# 15

R225 0
R224 10K
R213 10K

INT_PIRQC#

INT_PIRQD#

LAN_DET

IR_DET

S_GPIO4

S_GPIO5

AB14

A5C5B5A6A2B2C1B1J21

INT_PIRQB#

INT_PIRQD#

INT_PIRQC#

INT_PIRQF#/GPIO3

INT_PIRQE#/GPIO2

INT_PIRQH#/GPIO5

INT_PIRQG#/GPIO4

HUB_VREF

HUB_VSWING

EEP_CS

EEP_DIN

EEP_DOUT

K19

L20

L19

E9D8E8

LAN_RXD0 25
LAN_RXD1 25
LAN_RXD2 25
LAN_TXD0 25
LAN_TXD1 25
LAN_TXD2 25

LAN_JCLK 25

LAN_RSTSYNC 25

C

S_GPIO4
S_GPIO5

12
12
12

H22

W19

INT_IRQ15

INT_IRQ14

INT_SERIRQ

PCI_GPIO1/REQB#/REQ5#

PCI_GPIO17/GNTB#/GNT5#

PCI

Interface

System

Managment

Interface

CPU

Interface

HubLink

Interface

HUB_PSTRB

HUB_PSTRB#

HUB_RCOMP

N22

P23

HUB_ICH_RCOMP

PCI_CLK

PCI_DEVSEL#

PCI_FRAME#

PCI_GPIO0/REQA#

PCI_GPIO16/GNTA#

PCI_IRDY#

PCI_PAR
PCI_PERR#
PCI_LOCK#

PCI_PME#

PCI_RST#

PCI_SERR#

STOP#

PCI_TRDY#

SM_INTRUDER#

SMLINK0

SMLINK1

SMB_CLK

SMB_DATA

SMB_ALERT#/GPIO11

CPU_A20GATE

CPU_A20M#

CPU_DPSLP#

CPU_FERR#

CPU_IGNNE#

CPU_INIT#
CPU_INTR

CPU_NMI

CPU_PWRGOOD

CPU_RCIN#

CPU_SLP#
CPU_SMI#

STPCLK#

HUB_PD0
HUB_PD1
HUB_PD2
HUB_PD3
HUB_PD4
HUB_PD5
HUB_PD6
HUB_PD7
HUB_PD8
HUB_PD9

HUB_PD10

HUB_CLK

HUB_PAR

T19

R19

CLK_ICHHUB

12

R186
@1K

RP18
1 8
2 7
3 6
4 5

8P4R_100K

INT_IRQ15 19,21
INT_SERIRQ 19,23,29,31

INT_PIRQA#19,22,23
INT_PIRQB#19,23
INT_PIRQC#19,37
INT_PIRQD#19,26,37

CLK_ICHPCI

T5
M3
F1
C4
D4
B6
B3
N3
G5
M2
M1

ICH3_PME#

W1
Y1
L5
H2
H1

Y6
AC3
AB2
AC4
AB5
AC5

Y22
V23
AB22
J22
AA21
AB23
AA23
Y21
W23
U22
W21
Y23
U23

HUB_PD0

L22

HUB_PD1

M21

HUB_PD2

M23

HUB_PD3

N20

HUB_PD4

P21

HUB_PD5

R22

HUB_PD6

R20

HUB_PD7

T23

HUB_PD8

M19

HUB_PD9

P19

HUB_PD10

N19

CLK_ICHHUB 8
HUB_PSTRB 9
HUB_PSTRB# 9

EEP_CS 25
EEP_DIN 25

EEP_DOUT 25
EEP_SHCLK 25

D

1 2

R525 100K

CLK_ICHPCI

12

R222
@10

12

C328
@15PF

12

R220

1K

1K

CLK_ICHHUB

R456
@33

1 2

C686
@10PF

17 45Monday, September 10, 2001

of

+3V_SW

+3V_SW

+3V_ALW

+3V_SW

LAN enable: Mount R577, del R578.
LAN disable: Mount R578, del R577.

IR enable: Mount R579, del R580.
IR disable: Mount R580, del R579.

CLK_ICHPCI 8
PCI_DEVSEL# 19,22,23,26,37
PCI_FRAME# 19,22,23,26,37
PCI_REQA# 19
PCI_REQB# 19

PCI_IRDY# 19,22,23,26,37
PCI_PAR 19,22,23,26,37
PCI_PERR# 19,22,23,37
PCI_LOCK# 19,23

PCI_RST# 9,15,21,22,23,26,29,31,37
PCI_SERR# 19,22,23,37
PCI_STOP# 19,22,23,26,37
PCI_TRDY# 19,22,23,26,37

SM_INTRUDER# 19
SMLINK0 19
SMLINK1 19
SMB_CLK 8,14,19
SMB_DATA 8,14,19
SMB_ALERT# 19

GATE20 29
H_A20M# 5

H_FERR# 5
H_IGNNE# 5
H_INIT# 5
H_INTR 5
H_NMI 5
H_PWRGD 5
KBRST# 29

H_SMI# 5
H_STPCLK# 5

HUB_PD[0..10]

+VS_HUBREF

+VS_HUBVSWING

12

C334
.01UF

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

INT_PIRQA#
INT_PIRQB#
INT_PIRQC#
INT_PIRQD#

12

LAN_DET

IR_DET

HUB_PD[0..10] 9

1 2

R227 36.5_1%

C666
.01UF

Close to ICH3-M.

R577 100K
R578 LAN@100K

R579 @100K
R580 100K

Place closely to
ICH3-M

+1.5V_SW

12

(for use if CPU unable

R234
@10K

to support DPSLP#)

R233 0

1 2

H_DPSLP#5,42

H_PICD0
H_PICD1

12

R211

D

1 2

1 2

1 2

1 2

0A

A

B

C

D

E

+5V_SW +3V_SW

21

12

R493

1K

1 1

+1.8V_ALW

+1.8V_ALW

U16B

+3V_ALW

RP19

2 2

3 3

4 4

8P4R_100K

1 8
2 7
3 6
4 5

USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5

12

R154

18.2_1%

ICH_IDE_PRST#21
ICH_IDE_SRST#21

USB_BIAS

+3V_SW

R181
100K

USB_OC#020
USB_OC#120
USB_OC#236
USB_OC#336

FWH_WP#19

FWH_TBL#19

EC_FLASH#30
GPIO4319

ICH_SPKR27

+3V_SW

AC_VID07
AC_VID17
AC_VID27
AC_VID37
AC_VID47

R196 @1K

+1.8V_SW

12

1 2

+3V_ALW

USB_D_PP0
USB_D_PP1
USB_D_PP2
USB_D_PP3
USB_D_PP4

USB_D_PN0
USB_D_PN1
USB_D_PN2
USB_D_PN3
USB_D_PN4

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5

ICH_ACIN

D19
A19
E17
B17
D15
A15
D18
A18
E16
B16
D14
A14

E12
D12
C12
B12
A12
A11

H20

G22

F21
G19
E22
E21
H21
G23

F23
G21
D23
E23

B21

H23

U19

F17

F18
K14

E10

V8

V3ALW_ICH

V9

USB_PP0
USB_PP1
USB_PP2
USB_PP3
USB_PP4
USB_PP5
USB_PN#0
USB_PN#1
USB_PN#2
USB_PN#3
USB_PN#4
USB_PN#5

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5

GPIO32
GPIO33
GPIO34
GPIO35
GPIO36
GPIO37
GPIO38
GPIO39
GPIO40
GPIO41
GPIO42
GPIO43

USB_RBIAS

SPKR

VCCA

VCCPSUS3/VCCPUSB0
VCCPSUS4/VCCPUSB1
VCCPSUS5/VCCPUSB2

VCCPSUS0
VCCPSUS1
VCCPSUS2

82801

D27
1SS355

12

C709
.1UF

L47

1 2

BLM21A601SPT

E13

F14

K12

P10V6V7

VCC_SUS0

VCC_SUS1

VCC_SUS2

USB

Interface

Misc

Power

VSS35

E14

E15

VCC5REF

12

C714
@1UF_0603

+V1.8_ICHLAN

F15

VCC_SUS3

VCC_SUS4

VCC_SUS5

VCC_USB0/VCC_SUS6

VSS36

VSS37

VSS38

VSS39

VSS40

E18

E19

E20

F22G3G20

+RTCVCC

12

C705

1UF_0603

F16F7F8

K10

AB6E6W8

VCC_RTC

VCC_USB1/VCC_SUS7

VCC_AUX0/VCCLAN1_8

VCC_AUX1/VCCLAN1_8

VCC_AUX2/VCCLAN1_8

VSS41

VSS42

VSS43

VSS44

VSS45

VSS46

VSS47

VSS48

H19

AA22J5K11

K13

K20

VCC5REF1

VSS49

K21

VCC5REF2

VSS50

K22

K23L3L10

+3V_ALW

C13W5F9

VCC5REFSUS1

VSS51

VSS52

12

C599
.1UF

+3V_ALW

+1.5V_SW

VCCP_AUX

F10

P14

U18

V22

VCCPCPU0

VCCPCPU1

VCC5REFSUS2

VCCPAUX0/VCCLAN3_3

VCCPAUX1/VCCLAN3_3

ICH3-M (2/2)

VSS53

VSS54

VSS55

VSS56

VSS57

VSS58

VSS59

L11

L12

L13

L14

L21

L23

M11

+1.8V_ALW

VPLL_USB

C23

B23E7T21D6T1C2A21

N/C0

VCCPCPU2

Power

VCCUSBBG/VCC_SUS8

VCCUSBPLL/VCC_SUS9

VSS60

VSS61

VSS62

VSS63

VSS64

VSS65

VSS66

M12

M13

M20

M22N5N10

N/C1

VSS

VSS67

N11

N/C2

VSS68

N12

N/C3

VSS69

N13

N/C4

VSS70

N14

N21

A22F6G6H6J6

VSS102

VSS103

VSS71

VSS72

VSS73

N23

P11

P13

VCCPPCI0

VCCPPCI1

VSS74

VSS75

P20

P22R3R5

VCCPPCI2

VSS76

VSS77

M10R6T6U6G18

VCCPPCI3

VCCPPCI4

VCCPPCI5

VCCPPCI6

VSS78

VSS79

VSS80

VSS81

R21

R23T4T20

H18

VCCP0

VCCPPCI7

VSS82

VSS83

VSS84

T22V3AC23

VCCP1

VSS85

VSS86

V20W6W7

+3V_SW

P12

V15

V16

VCCPIDE0

VCCPIDE1

VCCPIDE2

VSS87

VSS88

VSS89

W10

V17

V18

VCCPIDE3

VCCPIDE4

VSS90

VSS91

VSS92

W14

W18

W22Y8AA3

CLOSE TO ICH3-M(< 1 inch)

USB_D_PP0
USB_D_PN0
USB_D_PP1

USB_D_PN1
USB_D_PP2
USB_D_PN2
USB_D_PP3
USB_D_PN3
USB_D_PP4
USB_D_PN4

+1.8V_SW

J18

M14

R18

T18

E11K6K18P6P18

VCCPHL0

VCCPHL1

VCCPHL2

VCCPHL3

VCCCORE0

VCCCORE1

VCCCORE2

VCCCORE3

IDE

Interface

VSS93

VSS94

VSS95

VSS96

VSS97

VSS98

VSS99

VSS100

VSS101

AA8

AA12

AA16

AA20

AB8

AC1

AC8

L27 FBM-L10-160808-301

1 2

L26 FBM-L10-160808-301

1 2

L19 FBM-L10-160808-301

1 2

L18 FBM-L10-160808-301

1 2

L25 FBM-L10-160808-301

1 2

L24 FBM-L10-160808-301

1 2

V10

V14

IDE_PDA0
IDE_PDA1
IDE_PDA2
IDE_SDA0
IDE_SDA1
IDE_SDA2

IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9

IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9

AC15
AB15
AC21
AC22

AA14
AC14
AA15
AC20
AA19
AB20

W12
AB11
AA10
AC10
W11
Y9
AB9
AA9
AC9
Y10
W9
Y11
AB10
AC11
AA11
AC12

Y17
W17
AC17
AB16
W16
Y14
AA13
W15
W13
Y16
Y15
AC16
AB17
AA17
Y18
AC18

Y13
Y19
AB12
AB18
AC13
AC19
Y12
AA18
AB13
AB19

IDE_PDD0
IDE_PDD1
IDE_PDD2
IDE_PDD3
IDE_PDD4
IDE_PDD5
IDE_PDD6
IDE_PDD7
IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

IDE_SDD0
IDE_SDD1
IDE_SDD2
IDE_SDD3
IDE_SDD4
IDE_SDD5
IDE_SDD6
IDE_SDD7
IDE_SDD8
IDE_SDD9
IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

IDE_PDCS1#
IDE_PDCS3#

VCCCORE4

VCCCORE5

VCCCORE6

IDE_SDCS1#
IDE_SDCS3#

IDE_PDD10
IDE_PDD11
IDE_PDD12
IDE_PDD13
IDE_PDD14
IDE_PDD15

IDE_SDD10
IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

IDE_PDDACK#
IDE_SDDACK#

IDE_PDDREQ
IDE_SDDREQ

IDE_PDIOR#

IDE_SDIOR#
IDE_PDIOW#
IDE_SDIOW#

IDE_PIORDY

IDE_SIORDY

USB_PP0 20
USB_PN0 20
USB_PP1 20
USB_PN1 20
USB_PP2 36
USB_PN2 36
USB_PP3 36
USB_PN3 36
USB_PP4 20
USB_PN4 20

IDE_PDCS1# 21
IDE_PDCS3# 21
IDE_SDCS1# 21
IDE_SDCS3# 21

IDE_PDA0 21
IDE_PDA1 21
IDE_PDA2 21
IDE_SDA0 21
IDE_SDA1 21
IDE_SDA2 21
IDE_PDD[0..15] 21

IDE_SDD[0..15] 21

IDE_PDDACK# 21
IDE_SDDACK# 21
IDE_PDDREQ 21
IDE_SDDREQ 21
IDE_PDIOR# 21
IDE_SDIOR# 21
IDE_PDIOW# 21
IDE_SDIOW# 21
IDE_PIORDY 21
IDE_SIORDY 21

ICH_ACIN

ACIN29,38,40

21

D13 RB751V

A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

18 45Monday, September 10, 2001

E

of

0A

A

B

C

D

E

+3V_SW

RP8

FWH_WP#18

+3V_SW +3V_SW

RP6

PCI_FRAME#17,22,23,26,37
PCI_IRDY#17,22,23,26,37 PCI_SERR# 17,22,23,37

1 1

PCI_TRDY#17,22,23,26,37
PCI_STOP#17,22,23,26,37

1
2
3
4
5

10P8R_8.2K

10
9
8
7
6

PCI_DEVSEL# 17,22,23,26,37
PCI_PERR# 17,22,23,37
PCI_LOCK# 17,23

+3V_SW +3V_SW

RP20

PCI_REQA#17
PCI_REQB#17
PCI_REQ#017,22
PCI_REQ#117,37

1
2
3
4
5

10P8R_8.2K

10
9
8
7
6

PCI_REQ#2 17,23
PCI_REQ#3 17,26
PCI_REQ#4 17,37
INT_SERIRQ 17,23,29,31

FWH_TBL#18

PM_CLKRUN#17,22,23,29,31,37

ICH_SWI#17,29

SMB_ALERT#17

1 8
2 7
3 6
4 5

8P4R_10K

R461 100K

1 2

R466 100K

1 2

+3V_ALW

PCI_PAR17,22,23,26,37

PM_BATLOW#17,29

+5V_SW

12

+

C338

1UF_0603

R200 100

1 2

R550 100K

1 2

12

12

C341

C340

.1UF

.1UF

+3V_ALW

+1.5V_SW

12

+

C660
1UF_0603

12

12

C678

C661

.1UF

.1UF

+3V_SW +3V_SW

RP17

GPIO4318

INT_PIRQD#17,26,37

INT_IRQ1417,21

1
2
3
4
5

10P8R_8.2K

2 2

10
9
8
7
6

INT_IRQ15 17,21
INT_PIRQA# 17,22,23
INT_PIRQB# 17,23
INT_PIRQC# 17,37

+3V_SW

12

+

C337
22UF_1206_10V

12

+

C336
22UF_1206_10V

12

12

12

C645
.1UF

C616
.1UF

C625
47PF

12

C617
.1UF

12

C672
47PF

12

C673
.1UF

12

C622
.1UF

12

12

12

C662

C674

47PF

.1UF

C656
.1UF

12

C657
.1UF

12

C624
47PF

12

C610
.1UF

12

12

C658

C621

47PF

.1UF

12

C667

.1UF

12

12

C646

C675

.1UF

.1UF

+3V_ALW

12

+

C249

22UF_1206_10V

+3V_ALW

R556 2.2K

SMB_DATA8,14,17

SMB_CLK8,14,17
SMLINK017
SMLINK117

3 3

1 2

R557 2.2K

1 2

R558 100K

1 2

R559 100K

1 2

+1.8V_SW +1.8V_ALW

12

+

C325
100UF_D2_6.3V

12

12

C261

C263

.1UF

.1UF

12

C639
.1UF

12

12

C262

C264

.1UF

.1UF

12

12

C651
33PF

C644
.1UF

12

C630
.1UF

12

12

C604
33PF

C676
.1UF

12

C677
.1UF

12

+

C243

22UF_10V_1206

12

C246
.1UF

12

12

C251

C250

.1UF

.1UF

+RTCVCC

12

R354

330K

+3V_ALW

+3V_ALW +3V_ALW

12

R359

47K

9 8

12

C549
.47UF_0603

7 14

U36D

74LVC14

11 10

7 14

U36E

74LVC14

U63

1
2

7SH08

R538

1 2

+3V_ALW

53

@0

4

R473 0

1 2

G_RST# 22,23,24,29

PM_RSMRST# 17

SM_INTRUDER#17

4 4

1 2

R476 8.2K

R549 0

EC_RST#29,34

1 2

EC_GRST#30

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

19 45Monday, September 10, 2001

E

of

0A

A

B

C

D

E

12

USB_CPN1USB_CPN0

USB_CPP1

USB_CPN1

+3V_ALW

R260
10K

12

12

R263
10K

12

C374
1UF_0603

12

L30 FBM-L10-160808-301

12

L29 FBM-L10-160808-301

12

C370

C763

15PF

15PF

12

C383
1UF_0603

USB_PN1 18
USB_PP1 18

USB_OC#0 18

USB_OC#1 18

USB_BS

12

C369
1000PF

12

C367

+

150UF_D2_16V

USBPWR_BSUSBPWR_AS

OC1#
OUT1
OUT2

USBPWR_AS

8
7
6

VCC

D1-

D1+

VSS

G1
G2

USBPWR_BS

5
6
7
8

9
10

BlueTooth Interface

1 1

BT_DETACH30
BT_WAKE_UP30

USB_PN418
BT_RST#30

2 2

+3V_ALW +5V_ALW

BT_WAKE_UP

12

C61
.1UF

Bluetooth Connector

JP13

12
34
56
78
910

121411
13
15 16
171918

20

AXN420C530P

12

C60
.1UF

BT_ON# 30
BT_PRES# 30USB_PP418

USB Interface

C39

150UF_D2_16V

12

+

C35
1000PF

+5V_ALW

U26

1

GND

2

IN

USB_CPP0

3

EN1#

4 5

EN2# OC2#

TPS2042

JP4

1

VCC

2

D0-

3

D0+

4

VSS

11

G3

12

G4

Molex-67300

USB Connector Stacked

12

C380

4.7UF_10V_0805

USB_PN018
USB_PP018

USB_AS

12

1 2

L32 FBM-L10-160808-301

1 2

L31 FBM-L10-160808-301

12

C34

C762

15PF

15PF

USB_CPN0

USB_CPP0 USB_CPP1

12

3 3

4 4

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

20 45Monday, September 10, 2001

E

of

0A

A

+5V_SW

53

U24

ICH_IDE_PRST#18
PCI_RST#9,15,17,22,23,26,29,31,37

1 1

IDE_PDD[0..15]18

2 2

ICH_IDE_SRST#18

PCI_RST#9,15,17,22,23,26,29,31,37

1
2

7SH08

IDE_PDD[0..15]

IDE_PDDREQ18
IDE_PDIOW#18

IDE_PDIOR#18

IDE_PIORDY18

IDE_PDDACK#18

INT_IRQ1417,19

IDE_PDA118
IDE_PDA018

IDE_PDCS1#18

HDDLED_CON#16

+5V_SW +5V_SW

+5V_SW

U8
1

2

7SH08

53

4

IDE_PDDREQ
IDE_PDIOW#
IDE_PDIOR#
IDE_PIORDY
IDE_PDDACK#
INT_IRQ14
IDE_PDA1
IDE_PDA0
IDE_PDCS1#

4

HDD_RST#

IDE_PDD7
IDE_PDD6
IDE_PDD5
IDE_PDD4

IDE_PDD2
IDE_PDD1
IDE_PDD0

CDR_RST#

B

HDD Connector

JP22

1 2

12

3 4

34

5 6

56

7 8

78

9 10

910

11 12

11 12

13 14

13 14

15 16

15 16

17 18

17 18

19 20

19 20

21 22

21 22

23 24

23 24

25 26

25 26

27 28

27 28

29 30

29 30

31 32

31 32

33 34

33 34

35 36

35 36

37 38

37 38

39 40

39 40

41 42

41 42

43 44

43 44

HDD CONN

IDE_PDD8
IDE_PDD9
IDE_PDD10
IDE_PDD11
IDE_PDD12IDE_PDD3
IDE_PDD13
IDE_PDD14
IDE_PDD15

IDE_PD_CSEL

IDE_PDA2
IDE_PDCS3#

IDE_PDA2 18
IDE_PDCS3# 18

+3V_SW

+5V_SW

C

1 2

R243 4.7K

1 2

R238 4.7K

IDE_PIORDY IDE_PDDREQ

IDE_SIORDY

1 2

R240 @5.6K

1 2

R239 @5.6K

IDE_SDDREQ

Layout note :

Place capacitors near HDD connector .

+5V_SW

12

+

C717
22UF_1206_10V

12

C349
.1UF

12

C715
1000PF

D

HDD Manual ATA Type Select ion :

ATA33 : populate R224, de-populate R225.
ATA66/100 : populate R225, de-populate R224.

+5V_SW

12

R241
@10K

R242
100K

IDE_PATADET 17

12

Layout note :

Place capacitors near CD-ROM connector .

+5V_SW

12

+

C347
22UF_1206_10V

12

C344
.1UF

12

C343
1000PF

E

CD-ROM Connector

C769

IDE_SDD[0..15]18

INT_CD_L26

12

IDE_SDIOW#18
IDE_SIORDY18
INT_IRQ1517,19
IDE_SDA118
IDE_SDA018
IDE_SDCS1#18
CDLED_CON#16

B

CDR_RST#
IDE_SDD7
IDE_SDD6 IDE_SDD10
IDE_SDD5
IDE_SDD4
IDE_SDD3
IDE_SDD2

+5V_SW

IDE_SDD1
IDE_SDD0

SEC_CSEL

12

R235 470

JP23

12
34
56
78
910
11 12
13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50

CD-ROM CONN.

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

IDE_SDD8
IDE_SDD9

IDE_SDD11
IDE_SDD12
IDE_SDD13
IDE_SDD14
IDE_SDD15

R237 100K

1 2

W=80mils

3 3

CD_AGND26

10UF_10V_1206

4 4

A

+5V_SW

12

C345
.1UF

INT_CD_R 26

IDE_SDDREQ 18
IDE_SDIOR# 18

IDE_SDDACK# 18

IDE_SDA2 18
IDE_SDCS3# 18

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

D

Date: Sheet

21 45Monday, September 10, 2001

E

0A

of

5

4

3

2

1

+3V_ALW

D D

PCI_AD[0..31]17,23,26,37

CLK_1394

12

R201
@10

C C

B B

A A

12

PCI_C/BE#317,23,26,37
PCI_C/BE#217,23,26,37
PCI_C/BE#117,23,26,37
PCI_C/BE#017,23,26,37
CLK_13948
PCI_GNT#017
PCI_REQ#017,19

C319
@15PF

ID: AD16

PCI_AD16

PCI_FRAME#17,19,23,26,37
PCI_IRDY#17,19,23,26,37
PCI_TRDY#17,19,23,26,37
PCI_DEVSEL#17,19,23,26,37
PCI_STOP#17,19,23,26,37
PCI_PERR#17,19,23,37
INT_PIRQA#17,19,23
1394_PME#30
PCI_SERR#17,19,23,37
PCI_PAR17,19,23,26,37
PM_CLKRUN#17,19,23,29,31,37
PCI_RST#9,15,17,21,23,26,29,31,37

G_RST#19,23,24,29

R124 @220
R132 @220

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

R187 @100

1 2

12
12

22
24
25
26
28
29
31
32
37
38
40
41
42
43
45
46
61
63
65
66
67
69
70
71
74
76
77
79
80
81
82
84
34
47
60
73
16
18
19
36
49
50
52
53
54
56
13
21
57
58
12
85

14
89

90

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10
PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0
PCI_C/BE3
PCI_C/BE2
PCI_C/BE1
PCI_C/BE0
PCI_CLK
PCI_GNT
PCI_REQ
PCI_IDSEL
PCI_FRAME
PCI_IRDY
PCI_TRDY
PCI_DEVSEL
PCI_STOP
PCI_PERR
PCI_INTA
PCI_PME
PCI_SERR
PCI_PAR
PCI_CLKRUN
PCI_RST

G_RST
GPIO3

GPIO2

12

C302
@.1UF

REG_EN#

REG18

9

PCI BUS INTERFACE

AGND

AGND

PLLGND1

REG18

109

110

8

12

C231
@.1UF

2035486278

VDDP

VDDP

VDDP

VDDP

TSB43AB22

AGND

AGND

AGND

AGND

111

117

126

127

R116

12

R130
@100K

@100K

87

VDDP

CYCLEIN

PHY PORT 2

BIAS CURRENT

OSCILLATOR

FILTER

EEPROM 2 WIRE BUS

POWER CLASS

PHY PORT 1

DGND

DGND

AGND

DGND

DGND

DGND

445564

128

17

233033

12

CYCLEOUT

DGND

DGND

68

12
R136

@100K

101186

96

CNA

DGND

75

8393103

TEST17

TEST16

PLLVDD

TPBIAS1

FILTER0
FILTER1

TPBIAS0

DGND

DGND

12

DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD
DVDD

AVDD
AVDD
AVDD
AVDD
AVDD

CPS

TPA1+
TPA1­TPB1+
TPB1-

SDA
SCL
PC0

PC1
PC2

TPA0+
TPA0-

TPB0 +

TPB0 -

TEST9
TEST8

TEST3
TEST2
TEST1
TEST0

R197
@100K

R0

R1

X0

X1

12

R198
@100K

+3V_ALW

15
27
39
51
59
72
88
100
7
1
2
107
108
120

R167 @1K

106

125
124
123

R190 @1K

122

R185 @1K

121

1 2

118

119
6

5

C305 @.1UF

3
4

SDA_1395

92

SCL_1394

91
99

98
97

XTPBIAS0

116

XTPA0+

115

XTPA0-

114

XTPB0+

113

XTPB0-

112

94
95

101
102
104
105

U19

L28 @0_0805

1 2

12

C306
@.01UF

1 2

C297 @.1UF

1 2

1 2
1 2

@6.34K_1%

R179

Near 1394 IC

C312 @15PF

1 2

X1

@24.576MHz

C311 @15PF

1 2

1 2

R131 @220

1 2

R123 @220

1 2

VPLL_1394

12

C320

@4.7UF_10V_0805

XTPBIAS0
XTPA0+
XTPA0­XTPB0+
XTPB0-

12

R248
@56.2_1%

12

R246
@56.2_1%

12

C351
@220PF

12

R247
@56.2_1%

12

R244
@56.2_1%

12

R245
@5.11K

+3V_ALW

12

C350
@1UF_25V_0805

12

C281
@.1UF

12

C268
@1000PF

12

12

C303

C304

@.1UF

@.1UF

12

C272
@1000PF

L1

1
2
3
45

@IEEE1394-COILS

12

C233
@1000PF

8
7
6

12

C307
@.1UF

12

C308
@.1UF

12

C234
@1000PF

PA0+_C
PA0-_C
PB0+_C
PB0-_C

12

12

C301

C295

@.1UF

@.1UF

12

C232
@1000PF

JP5

3456
2
1

@1394_CONN 4PIN

12

C284
@.1UF

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

5

4

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

3

2

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

22 45Monday, September 10, 2001

1

of

0A

A

1 1

PCI_AD[0..31]17,22,26,37

PCI_AD31
PCI_AD30
PCI_AD29
PCI_AD28
PCI_AD27
PCI_AD26
PCI_AD25
PCI_AD24
PCI_AD23
PCI_AD22
PCI_AD21
PCI_AD20
PCI_AD19
PCI_AD18
PCI_AD17
PCI_AD16
PCI_AD15
PCI_AD14
PCI_AD13
PCI_AD12
PCI_AD11
PCI_AD10

2 2

PCI_C/BE#317,22,26,37
PCI_C/BE#217,22,26,37
PCI_C/BE#117,22,26,37
PCI_C/BE#017,22,26,37

CLK_PCI_CB

R355
@33

1 2

C557
@10PF

3 3

PCI_AD2017,22,26,37

CLK_PCI_CB8

PCI_DEVSEL#17,19,22,26,37

PCI_FRAME#17,19,22,26,37

PCI_IRDY#17,19,22,26,37

PCI_TRDY#17,19,22,26,37

PCI_STOP#17,19,22,26,37

PCI_PAR17,19,22,26,37
PCI_PERR#17,19,22,37
PCI_SERR#17,19,22,37
PCI_REQ#217,19

PCI_GNT#217
INT_PIRQA#17,19,22
INT_PIRQB#17,19

PCI_LOCK#17,19

PCI_RST#9,15,17,21,22,26,29,31,37

PCM_PME#30

PM_CLKRUN#17,19,22,29,31,37

PCM_RI#32

CB_SPK#27

INT_SERIRQ17,19,29,31

PCI_AD9
PCI_AD8
PCI_AD7
PCI_AD6
PCI_AD5
PCI_AD4
PCI_AD3
PCI_AD2
PCI_AD1
PCI_AD0

R358 100

1 2

CLK_PCI_CB

S1_IOWR#
S1_IORD#
S1_OE#
S1_CE2#

203
204

207
163

208
128

133
193

205
206

10
11
12
16
17
18
19
20
22
23
24
38
39
40
41
42
43
45
46
48
49
51
52
53
54
55
56

13
25
36
47

15
31

27
29
30
32
35
33
34

58

72

B

S1_IOWR# 24
S1_IORD# 24
S1_OE# 24
S1_CE2# 24

4

AD31

5

AD30

7

AD29

8

AD28

9

AD27
AD26
AD25
AD24
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0

C/BE3#
C/BE2#
C/BE1#
C/BE0#

IDSEL

1

PCI_CLK
DEVSEL#
FRAME#
IRDY#
TRDY#
STOP#
PAR
PERR#
SERR#

3

PCI_REQ#

2

PCI_GNT#
IRQ9/INTA#
IRQ4/INTB#/A_VPP_PGM
LOCK#
RST#

IRQ12/PME#
IRQ14/CLKRUN#
IRQ15/RI_OUT#
SPKR_OUT#
LEDO#/SKTA_ACTV
IRQ11/SKTB_ACTV

IRQ5/SERIRQ#
IRQ7/SIN#/B_VPP_PGM

GND

GND

GND

1426284457

+3V_ALW +3V_SW+3V_SW

127621375079134

PCI_VCC

PCI_VCC

AUX_VCC

GND

GND

GND

GND

GND

101

129

177

C

S1_A1

S1_A3

S1_A2

116

113

111

109

A_A0/CAD26

A_A1/CAD25

A_A2/CAD24

S1_A6

S1_A25

S1_A5

S1_A4

107

105

103

A_A3/CAD23

A_A4/CAD22

A_A5/CAD21

A_A6/CAD20

PCI_VCC

PCI_VCC

S1_D8

S1_D9

S1_D1

S1_D10

S1_D0

S1_A0

180

CORE_VCC

CORE_VCC

CORE_VCC

124

122

121

A_D9/CAD30

A_D10/CAD31

120

119

A_D1/CAD29

A_D8/CAD28

A_D0/CAD27

CardBus Controller
OZ6933T (TQFP)

IRQ3/A_VCC_3#

SCLK/A_VCC_5#

SDATA/B_VCC_3#

SLATCH/SMBCLK/B_VCC_5#

IRQ9/A_VPP_VCC_PGM

IRQ10/B_VPP_VCC_PGM

B_D10/CAD31

B_D9/CAD30

B_D1/CAD29

B_D8/CAD28

B_D0/CAD27

B_A0/CAD26

B_A1/CAD25

B_A2/CAD24

B_A3/CAD23

B_A4/CAD22

B_A5/CAD21

B_A6/CAD20

199

197

196

195

194

191

189

187

185

183

181

87

132

131

130

115

146

178

S1_A[0..25]
S1_D[0..15]

S1_A9

S1_IORD#

S1_A24

S1_A17

S1_A7

S1_IOWR#

102

100998381807877757473716867666564636259

A_A7/CAD18

A_A9/CAD14

A_A25/CAD19

A_A24/CAD17

A_A17/CAD16

A_IOWR/CAD15

A_IORD#/CAD13

B_A25/CAD19

B_A7/CAD18

B_A24/CAD17

B_A17/CAD16

B_IOWR#/CAD15

B_A9/CAD14

B_IORD#/CAD13

176

175

174

158

156

155

154

S1_OE#

S1_A11

A_A11/CAD12

B_A11/CAD12

153

151

A_OE#/CAD11

B_OE#/CAD11

S1_CE2#

150

S1_A10

A_A10/CAD9

A_CE2#/CAD10

B_CE2#/CAD10

B_A10/CAD9

149

S1_D7

S1_D15

A_D7/CAD7

A_D15/CAD8

B_D15/CAD8

B_D7/CAD7

148

144

S1_D13

S1_D6

A_D6/CAD5

A_D13/CAD6

B_D13/CAD6

B_D6/CAD5

142

141

S1_D12

140

S1_D5

A_D12/CAD4

B_D12/CAD4

139

S1_A[0..25] 24
S1_D[0..15] 24

S1_D11

S1_D4

S1_D3

A_D5/CAD3

A_D4/CAD1

A_D3/CAD0

A_D11/CAD2

B_D5/CAD3

B_D11/CAD2

B_D4/CAD1

B_D3/CAD0

138

137

135

D

GRST#
A_SKT_VCC
A_SKT_VCC

A_REG#/CCBE3#

A_A12/CCBE2#

A_A8/CCBE1#

A_CE1#/CCBE0#

A_A16/CCLK

A_A23/CFRAME#

A_A15/CIRDY#

A_A22/CTRDY#

A_A21/CDEVSEL#

A_A20/CSTOP#

A_A13/CPAR

A_A14/CPERR#

A_WAIT#/CSERR#

A_INPACK#/CREQ#

A_WE#/CGNT#

A_RDY_IRQ#/CINT#

A_A19/CBLOCK#

A_WP/CCLKRUN#

A_RST/CRST#
A_R2_D2/RFU

A_R2_D14/RFU

A_R2_A18/RFU

A_VS1/CVS1

A_VS2/CVS2
A_CD1#/CCD1#
A_CD2#/CCD2#

A_BVD2/CAUDIO

A_BVD1/CSTSCHG

B_BVD1/CSTCHG

B_BVD2/CAUDIO

B_CD2#/CCD2#
B_CD1#/CCD1#

B_VS2/CVS2

B_VS1/CVS1

B_R2_A18/RFU

B_R2_D14/RFU

B_R2_D2/RFU
B_RST/CRST#

B_WP/CCLKRUN#

B_A19/CBLOCK#

B_RDY_IRQ#/CINT#

B_WE#/CGNT#

B_INPACK#/CREQ#

B_WAIT#/CSERR#

B_A14/CPERR#

B_A13/CPAR
B_A20/CSTOP#

B_A21/CDEVSEL#

B_A22/CTRDY#

B_A15/CIRDY#

B_A23/CFRAME#

B_A16/CCLK

B_CE1#/CCBE0#

B_A8/CCBE1#

B_A12/CCBE2#

B_REG#/CCBE3#

B_SKT_VCC
B_SKT_VCC
B_SKT_VCC

OZ6933TQFP

U37

117
98
60

112
97
82
70

93
96
95
94
92
90
84
86
108
110
89
91
88
125
106
123
69
85
76
104
61
126
114
118

192
190
202
136
179
152
161
145
198
182
201
164
167
165
186
184
162
159
166
168
170
171
172
169

147
157
173
188

143
160
200

C580
.1UF

S1_A12
S1_A8

R421 33

1 2

S1_A23
S1_A15
S1_A22
S1_A21
S1_A20
S1_A13
S1_A14

S1_A19

S1_D2
S1_D14
S1_A18

S2_A18
S2_D14
S2_D2

S2_A19

S2_A14
S2_A13
S2_A20
S2_A21
S2_A22
S2_A15
S2_A23

1 2

R418 33

S2_A8
S2_A12

S2_VCC

C684
.1UF

C649
.1UF

S1_REG# 24

S1_CE1# 24

S1_A16

S1_WAIT# 24
S1_INPACK# 24
S1_WE# 24

S1_RDY# 24

S1_WP 24
S1_RST 24

S1_VS1 24
S1_VS2 24

S1_CD1# 24

S1_CD2# 24
S1_BVD2 24
S1_BVD1 24

S2_BVD1 24

S2_BVD2 24

S2_CD2# 24

S2_CD1# 24
S2_VS2 24
S2_VS1 24

S2_RST 24
S2_WP 24

S2_RDY# 24
S2_WE# 24

S2_INPACK# 24

S2_WAIT# 24

S2_CE1# 24

S2_REG# 24

C650
.1UF

E

G_RST# 19,22,24,29

S1_VCC

C659
.1UF

S2_A16

C583
.1UF

+3V_SW

4 4

+3V_SW

12

C605

4.7UF_10V_0805

C612
.1UF

A

C561
.1UF

C563
.1UF

C565
.1UF

C607
.1UF

C682
.1UF

C564
.1UF

+3V_ALW

B

C681
.1UF

S2_D9

S2_D1

S2_D8

S2_D0

S2_A0

S2_A1

S2_A2

S2_A3

S2_A4

S2_A5

S2_A6

S2_A7

S2_A9

S2_D15

S2_D13

S2_D12

S2_D11

S2_D10

SLATCH 24
SLDATA 24
RTCCLK 11,17,24

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

S2_A25

S2_A17

S2_A11

S2_D7

S2_A24

C

S2_A10

S2_D6

S2_D5

S2_CE2#
S2_OE#
S2_IORD#
S2_IOWR#

S2_A[0..25]
S2_D[0..15]

S2_D4

S2_D3

S2_CE2# 24
S2_OE# 24
S2_IORD# 24

S2_IOWR# 24
S2_A[0..25] 24

S2_D[0..15] 24

D

Title

Size Document Number Rev
Custom

Date: Sheet

Compal Electronics, inc.

SCHEMATIC, M/B LA-1012
401200

23 45Monday, September 10, 2001

E

0A

of

A

B

C

D

E

CARDBUS SOCKET

1 1

S1_CD2#23

S1_WP23

S1_BVD123

S1_BVD223

S1_REG#23

S1_INPACK#23

S1_WAIT#23

S1_RST23
S1_VS223

2 2

S1_VPP S2_VPP

S1_VCC

S1_RDY#23

S1_WE#23

S1_IOWR#23

S1_IORD#23

3 3

4 4

S1_VS123
S1_OE#23

S1_CE2#23

S1_CE1#23

S1_CD1#23

S1_CD2#
S1_WP

S1_D10
S1_D2
S1_D9
S1_D1
S1_D8
S1_D0
S1_BVD1

S1_A0
S1_BVD2
S1_A1
S1_REG#
S1_A2
S1_INPACK#
S1_A3

S1_WAIT#
S1_A4
S1_RST
S1_A5
S1_VS2
S1_A6
S1_A25

S1_A7
S1_A24
S1_A12
S1_A23
S1_A15
S1_A22

S1_A16

S1_A21
S1_RDY#
S1_A20
S1_WE#
S1_A19
S1_A14
S1_A18
S1_A13

S1_A17
S1_A8
S1_IOWR#
S1_A9
S1_IORD#

S1_A11
S1_VS1
S1_OE#
S1_CE2#
S1_A10

S1_D15
S1_CE1#
S1_D14
S1_D7
S1_D13
S1_D6

S1_D12 S2_D12
S1_D5
S1_D11

S1_D4

S1_CD1#

S1_D3

A77
A76
A75
A74
A73
A72
A71
A70
A69
A68
A67
A66
A65
A64
A63
A62
A61
A60
A59
A58
A57
A56
A55
A54
A53
A52
A51
A50
A49
A48
A47
A46
A45
A44
A43
A42
A41
A40
A39
A38
A37
A36
A35
A34
A33
A32
A31
A30
A29
A28
A27
A26
A25
A24
A23
A22
A21
A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10

JP18

B77

b68

a68
a34
a67
a33
GND
a66
a32
a65
a31
a64
a30
a63
GND
a29
a62
a28
a61
a27
a60
a26
GND
a59
a25
a58
a24
a57
a23
a56
GND
a22
a55
a21
a54
a20
a53
GND
a19
a52
a18
a51
a17
a50
a16
a49
a15
a48
a14
a47
a13
GND
a46
a12
a45
a11
a44
GND
a10
a43
a9
a42
a8
GND
a41
a7
a40
a6
a39
a5

A9

GND

A8

a38

A7

a4

A6

a37

A5

a3

A4

a36

A3

a2

A2

a35

A1

a1

787980

787980

b34
b67
b33

GND

b66
b32
b65
b31
b64
b30
b63

GND

b29
b62
b28
b61
b27
b60
b26

GND

b59
b25
b58
b24
b57
b23
b56

GND

b22
b55
b21
b54
b20
b53

GND

b19
b52
b18
b51
b17
b50
b16
b49
b15
b48
b14
b47
b13

GND

b46
b12
b45
b11
b44

GND

b10
b43

b9

b42

b8

GND

b41

b7

b40

b6

b39

b5

GND

b38

b4

b37

b3

b36

b2

b35

b1

81

PCMC154PIN

81

B76
B75
B74
B73
B72
B71
B70
B69
B68
B67
B66
B65
B64
B63
B62
B61
B60
B59
B58
B57
B56
B55
B54
B53
B52
B51
B50
B49
B48
B47
B46
B45
B44
B43
B42
B41
B40
B39
B38
B37
B36
B35
B34
B33
B32
B31
B30
B29
B28
B27
B26
B25
B24
B23
B22
B21
B20
B19
B18
B17
B16
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1

S2_CD2#
S2_WP

S2_D10
S2_D2
S2_D9
S2_D1
S2_D8
S2_D0
S2_BVD1

S2_A0
S2_BVD2
S2_A1
S2_REG#
S2_A2
S2_INPACK#
S2_A3

S2_WAIT#
S2_A4
S2_RST
S2_A5
S2_VS2
S2_A6
S2_A25

S2_A7
S2_A24
S2_A12
S2_A23
S2_A15
S2_A22

S2_A16

S2_A21
S2_RDY#
S2_A20
S2_WE#
S2_A19
S2_A14
S2_A18
S2_A13

S2_A17
S2_A8
S2_IOWR#
S2_A9
S2_IORD#

S2_A11
S2_VS1
S2_OE#
S2_CE2#
S2_A10

S2_D15
S2_CE1#
S2_D14
S2_D7
S2_D13
S2_D6

S2_D5
S2_D11
S2_D4
S2_CD1#
S2_D3

S2_CD2# 23
S2_WP 23

S2_BVD1 23

S2_BVD2 23
S2_REG# 23

S2_INPACK# 23

S2_WAIT# 23
S2_RST 23
S2_VS2 23

S2_VCC

S2_RDY# 23
S2_WE# 23

S2_IOWR# 23
S2_IORD# 23

S2_VS1 23
S2_OE# 23
S2_CE2# 23

S2_CE1# 23

S2_CD1# 23

S1_VCC

S1_D[0..15]

S1_A[0..25]
S2_D[0..15]

S2_A[0..25]

C502 2.2UF_16V_0805
C501 .1UF
C550 .1UF
C551 .1UF
C504 .1UF
C503 .1UF
C548 .1UF

C529
.1UF

+3V_ALW

PCMCIA POWER CTRL.

+12V_ALW

+3V_ALW

SLDATA23
SLATCH23
RTCCLK11,17,23

1 2

R561 100K

1 2

R562 100K

C530
.01UF

+5V_ALW

SLDATA
SLATCH

12

SLDATA
SLATCH

C538

4.7UF_16V_1206

U32

25

NC

7

12V

24

12V

1

5V

2

5V

30

5V

15

3.3V

16

3.3V

17

3.3V

3

DATA

5

LATCH

4

CLOCK

13

NC

19

STBY#

18 12

OC# GND

TPS2216

C582

S1_CD1#

1 2

1000PF

C680

S1_CD2#

1 2

1000PF

C683

S2_CD1#

1 2

1000PF

C581

S2_CD2#

1 2
1000PF

RESET

RESET#

S2_VCC

AVPP
AVCC
AVCC
AVCC

BVPP
BVCC
BVCC
BVCC

NC
NC
NC

MODE

S1_VPP

S2_VPP

S1_VPP

8
9
10
11

S2_VPP

23
20
21
22

6
14

26
27
28
29

C523
.1UF

C531
.01UF

C526
.01UF

12

C552
10UF_16V_1206

12

C513
10UF_16V_1206

12

12

S1_VPP
S1_VCC

S2_VPP
S2_VCC

C522
.01UF

C539

4.7UF_25V_1206

C514

4.7UF_25V_1206

G_RST# 19,22,23,29

12

C505

4.7UF_16V_1206

S1_D[0..15]23
S1_A[0..25]23

S2_D[0..15]23
S2_A[0..25]23

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

24 45Monday, September 10, 2001

E

of

0A

A

B

C

D

E

12

C468
DL@.1UF

39
42
45
44
43
37
35
34

41
30
28
29
26
21

GND

GND

JCLK
JRSTSYNC
JTXD[2]
JTXD[1]
JTXD[0]
JRXD[2]
JRXD[1]
JRXD[0]

ADV10
ISOL_TCK
ISOL_TI
ISOL_TEX
TOUT
TESTEN

DL@82562ET

+3V_ALW

1 2

12

L45 DL@4.7UH

C472
DL@.1UF

125364027912141719

VCC

VCC

VCCP

VCCP

Kinnereth

VSS

VSS

8131824483338362022

13

GRN_LED_N

15

Green Led

GRN_LED_P

16

ORE_LED_N

17

Orange Led

ORE_LED_P

18

14

VCCT

VCCT

VCCA

VCCA2

VSS

VSS

VSS

VSSP

R257 330

R264 220

VCCT

VSSP

VCCT

VCCR_LAN

23

VCCR

VSSA

VSSA2

VCCR

TDP
TDN

RDP

RDN

RBIAS100

RBIAS10

ACTLED#
SPDLED#

LILED#

VSSR

VSSR

12

12

+

C487

C488

DL@4.7UF_10V_0805

DL@.1UF

LAN_TD+

10

LAN_TD-

11

LAN_RD+

15

LAN_RD-

16

R306 DL@619_1%

1 2

5

R304 DL@549_1%

1 2

4

LAN_ACTLED#

32
31

LAN_LILED#

27

LAN_X2

47

X2

LAN_X1

46

X1

U29

0

R30

R39 @0

+3V_ALW

R368 0

R387 @0

+3V_ALW

LAN_LILED#
LED1_GRNN

LAN_ACTLED#
LED2_YELN

R309

DL@100_1%

R308

DL@100_1%

LAN_RD+
LAN_RD-

LAN_TD+
LAN_TD-

C459

DL@.1UF

LAN_TD-

12

12

LAN_TD+

1 2

LAN_RD+ LAN_RD-

1 2

LED1_GRNN 37

LED2_YELN 37

U27

1

RD+

2

RD-

3

CT

4

NC

5

NC

6

CT

7 10

TD+ TX+

DL@H0013

C460
DL@.01UF

GRN_LED_P
ORE_LED_P

LAN_TX+36
LAN_TX-36

LAN_RX+36
LAN_RX-36

16

RX+

15

RX-

14

CT

13

NC

12

NC

11

CT

98

TX-TD-

DL@75_1%

R379 @100K

R546 @100K

R272

12

12

12

C408
DL@1500PF

+3V_SW

RJ45_TX+
RJ45_TX-

RJ45_RX+
RJ45_RX-

RX+_CON
RX-_CON

TX+_CON
TX-_CON

R271
DL@75_1%

LAN_GND

L37 0_0805

1 2

L38 0_0805

1 2

L41 0_0805

1 2

L42 0_0805

1 2

12

C393
1000PF_1206_2KV

TX+_CON
TX-_CON

RX+_CON
RX-_CON

MOD_RING
MOD_TIP

DL@22PF

12

C457

C458

PM_LANPWROK17,29

DL@22PF

1 2

12

R338 @0

1 1

TP_LAN_ADV TP_LAN_TOUT

If LAN is enable,
PM_LANPWROK
waits for PM_PWROK
to go high and stays high in S3

= LAN_RST#

2 2

3 3

LAN_X1

X2

DL@25MHZ

LAN_X2

EEP_CS17

EEP_SHCLK17

EEP_DOUT17

EEP_DIN17

Layout note :

Cassis LANGND
should cover part
of U22.

MOD_RING

VH1

DSSA-P3100SB

MOD_TIP

LAN_GND

+

12

C517

DL@4.7UF_10V_0805

+3V_ALW

12

R347
DL@100K

LAN_TCK
LAN_TI
LAN_EX
LAN_TESTEN

13

D

2

Q42

G

DL@2N7002

S

EEPROM for ICH3-m LAN
(Atmel
AT93C46-10PC-2.7)

1
2
3
4

12

12

+

12

C466
DL@4.7UF_10V_0805

@10PF

LAN_JCLK17

LAN_RSTSYNC17

LAN_TXD217
LAN_TXD117
LAN_TXD017
LAN_RXD217
LAN_RXD117
LAN_RXD017

U23

CS
SK
DI
DO

DL@AT93C46-10SC-2.7

R258
75_1%

VCC

DC
ORG
GND

R259
75_1%

8
7
6
5

RJ45_TX+
RJ45_TX­RJ45_RX+

RJ45_RX-

12

12

C490

C477

DL@.1UF

DL@.1UF

R339

C535

12

@33
KIN_CLK
KIN_RST
KIN_TXD2
KIN_TXD1
KIN_TXD0
KIN_RXD2
KIN_RXD1
KIN_RXD0

TP_LAN_ADV
LAN_TCK
LAN_TI
LAN_EX
TP_LAN_TOUT
LAN_TESTEN

+3V_ALW

1 2

R236 DL@10K

JP8

1

TX+

2

TX-

3

RX+

4

N/C

5

N/C

6

RX-

7

N/C

8

N/C

9

N/C

10

RING

11

TIP

12

N/C

RJ-45 & RJ-11

12

CATHODE1

ANODE1

CATHODE2

ANODE2

JP7

1

1

2

2

3

3

4

4

5

5

6

6

HEADER 6

JP12

1
2

12

HEADER 2
C394
1000PF_1206_2KV

GRN_LED_N

4 4

A

GRN_LED_P
ORE_LED_N
ORE_LED_P

12

12

C382

C379

47PF

47PF

12

12

C366

C368

47PF

47PF

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

25 45Monday, September 10, 2001

E

of

0A

A

+3V_SW

12

12

12

C555

C170

1000PF

.1UF

1 1

Place component's
to ES1988

PCI_C/BE#[0..3]17,22,23,37

2 2

MOD_AUDIO_MON37

DOCK_LIN_L36
DOCK_LIN_R36

12

3 3

4 4

C507

1UF_0603

+

C766

22UF_10V_1206

CD_AGND21

12

C169
.1UF

PCI_AD[0..31]17,22,23,37

MONO_IN27

MOD_MIC37

MIC_OUT+27

LEFT_EQ28

RIGHT_EQ28

C257
1000PF

INT_CD_L21

INT_CD_R21

+

C692

22UF_10V_1206

R165

1 2

6.8K

A

C160

+

4.7UF_10V_0805

R128 6.8K

CDROM_AGND
CD_L_R
CD_R_R

12

C508

1UF_0603

+5V_SW

C703

1UF_0603

PCI_AD[0..31]
PCI_C/BE#[0..3]

C182 10PF

NPO

Y1

49.152 MHz

C166 33PF

NPO

C176 1500PF

NPO

12

R138 6.8K

12

R174 6.8K

R145

12

6.8K
R160

12

6.8K

C265
1000PF

R139

6.8K
12

12

R143

6.8K

1 2

C252 .1UF_0603

R158

6.8K

1 2

12

L15

R175 6.8K

R173

6.8K
R178

6.8K

10UF_10V_1206

R129 6.8K

R141 6.8K

CDROM_AGND

R106 0

LK1608-1R0K

12

R371 0

12
12

C576

12

12

GD1

R563 10K

GD0

R564 10K

GD4

R570 @10K

12

R110
1M

12

1 2

C218 1UF_0603

12

12

1 2

C228 1UF_0603

1 2

C273 1UF_0603

1 2

C597 1UF_0603

1 2

C596 1UF_0603

C269
.1UF

C585

10UF_10V_1206

CD_L_R

CD_R_R

+3V_SW +3V_SW

B

+5V_ALW

C280

22UF_10V_1206
12
12
12

12

R565 @100K

MIC_GAINLOW#29

MD_SYNC37

MD_BITCLK37

MD_SDATAO37

57

64

1 2

C270 1UF_0603

1 2

C245 1UF_0603

1 2

C247 1UF_0603

C275
.1UF

12

R531

@20K

C771 @10UF_16V_1206

+

12

16V

R575
@20K

INT_CD_L INT_CD_R

B

65 83
81

69
67

66
68

70
71

79
80

75
76
77
78

73
82
89
40
21

3

12

R530

C772 @10UF_16V_1206

12

R576
@20K

C

12

+

+5V_ALW

R114 22
ESS_VOL_UP#
ESS_VOL_DW#

12

C219
@33PF

OSCI
OSCO

PC_BEEP
PHONE AVDD2

MONO_OUT
MIC
CD_GND

CD_L
CD_R

LINE_IN_L
LINE_IN_R

LINE_OUT_L
LINE_OUT_R

AFILT1
AFILT2
VCM
VREFADC

AVSS1
AVSS2
GND
GND
GND
GND

PCI_AD0

@20K

+

C291
.01UF

16V

12

C299

.01UF

12

C158
.01UF

12

C167
.01UF

12

GD4

GD1

GD0

44

42

435845

46

GD4

GD0

GD1 / EDOUT

GD2 / EDIN / VOLUP#

GD3 / ECLK / VOLDN#

AD9

AD8

AD7

AD6

AD5

AD4

AD3

AD2

AD1

AD0

29

38

PCI_AD1

16V

31323334353637

PCI_AD2

PCI_AD4

PCI_AD5

PCI_AD3

PCI_AD8

PCI_AD9

PCI_AD6

PCI_AD7

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

474849

GPIO13 / GD5

GPIO14 / GD6

GPIO15 / GD7

AD12

AD11

AD10

PCI_AD10

PCI_AD12

PCI_AD11

4

VIN

1

Cnoise

2

DELAY

3

GND

4

VIN

1

Cnoise

2

DELAY

3

GND

63

GPIO10 / SCLK2

GPIO11 / SDO2 / VauxD

GPIO12 / PCGNT# / GTO# / GS0

AD15

AD14

AD13

22232425262728

PCI_AD15

PCI_AD14

PCI_AD13

U59

SI9181

U12

SI9181

56

606162

GPIO8 / SDI2

GPIO9 / SDFS2

AD17

AD16

11

PCI_AD18

PCI_AD17

PCI_AD16

C

SD#

ERR#

SEN/ADJ

VOUT

SD#

ERR#

SEN/ADJ

VOUT

R115

12

100K

5950515253

GPIO3 / SRESET2

GPIO6 / ISDATA / R0#

GPIO4 / ISCLK / SIRQ#

GPIO5 / ISLR / GS0 / GT0#

GPIO7 / MC97_DI / PCREQ# / VOLUP#

AD22

AD21

AD20

AD19

AD18

PCI_AD19

PCI_AD20

PCI_AD21

PCI_AD22

5VAUD_GATE

8
7
6
5

5VAUD_GATE

8
7
6
5

+3V_ALW

39

85

84

GPIO2 / TXD

GPIO1 / RXD

CLKRUN# / ECS

PME# / SPDIFO / VOLDN#

SPDIFO / R0# / IDSEL

AD23

AD29

AD28

AD27

AD26

AD25

AD24

45678910

100

PCI_AD29

PCI_AD28

PCI_AD26

PCI_AD27

PCI_AD23

PCI_AD24

PCI_AD25

DEVSEL#

AD31

AD30

93949596979899

PCI_AD31

PCI_AD30

12

C149

.1UF

R331 10K

AVDD1

PCICLK

C/BE3#
C/BE2#
C/BE1#
C/BE0#

STOP#
TRDY#

IRDY#

FRAME#

12

C296

.1UF

U15
ES1988

VCC
VCC
VCC

VREF

REQ#
GNT#

INT#

RST#

PAR

VAUX

+

+5V_AMP

R572 10K

1 2

+3V_SW

12

90
41
12

72

74

92

R172 0

91

R171 0
CLK_PCI_AUD

88
87

R370 0

86
1

13
20
30

54
2
19
18
17
16
15
14
55

+5V_AMP

C293

22UF_10V_1206

16V

MD_SDATAI 37
MD_RST# 37

+5V_AMP

AUD_VREF

12
12

12

PCI_AD19

R166

12

100

+3V_ALW

Place closely to ES1988

D

R404

100K

1 2

ID#:AD19

12

12

D

+5V_SW

PCI_REQ#3 17,19
PCI_GNT#3 17

CLK_PCI_AUD 8
INT_PIRQD# 17,19,37

PCI_RST# 9,15,17,21,22,23,29,31,37
PCI_C/BE#3 17,22,23,37

PCI_C/BE#2 17,22,23,37
PCI_C/BE#1 17,22,23,37
PCI_C/BE#0 17,22,23,37

AUD_PME# 30
PCI_PAR 17,19,22,23,37

PCI_STOP# 17,19,22,23,37
PCI_DEVSEL# 17,19,22,23,37
PCI_TRDY# 17,19,22,23,37
PCI_IRDY# 17,19,22,23,37
PCI_FRAME# 17,19,22,23,37

CLK_PCI_AUD

R169
@10

C278
@15PF

E

R376

1K

R377

C179
.01UF

1K

AUD_VREF

E

ESS_VOL_UP#

ESS_VOL_DW#

+5V_AMP

12

R95
100_0805

13

D

2

G

S

12

C267
1UF_0603

26 45Monday, September 10, 2001

Q17

2N7002

12

of

C274
.01UF

12

C178
1UF_0603

1 2

1 2

SUSP38

12

EC_VOL_UP#29

EC_VOL_DW#29

+5V_AMP

12

12

C525

C518

.1UF

10UF_10V_1206

+3V_ALW

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

0A

A

+5V_AMP

+

C506

150UF_TPB_6.3V

1 1

RIGHT28

LEFT28

2 2

BEEP#29

+5V_ALW

3 3

12

C544
.1UF

4 4

5
2 4

3

U35

74AHCT1G125GW

R448

RIGHT

LEFT

EC_MUTE30

+3V_ALW +3V_ALW

1

CB_SPK#23

ICH_SPKR18

0

R457
0

12

R342
100K_1%

R345 10K_1%

1 2

A

12

12

12

12

.22UF_0603

C520

R_IN

L_IN

12

R447
@10K

1 2

C519
.1UF

1 2

+3V_ALW

3 4

7 14

+3V_ALW

5 6

7 14

C665

1 2

2.2UF_16V_0805
C679

1 2

12

2.2UF_16V_0805

R460
@10K

HPS

R439

100K

+5V_SW

147

U36A
74LVC14

+3VALW POWER

U36B
74LVC14

+3VALW POWER

U36C
74LVC14

+3VALW POWER

12

R440
100K

17

15

R459 100K

1 2

1 2

1 2

RLINEIN

LLINEIN

4

HPS

5

MODE

+5V_ALW

C72

4.7UF_10V_0805

MIC_SD#

12

C569

1 2

1UF_0603

C572

1 2

1UF_0603

C568

1 2

1UF_0603

GND1 VDD1

1 3

R360

560

560

R366

560

8

VDD2

GND2

12

18

13

VDD4

VDD3

ROUT+

ROUT-

LOUT+

LOUT-

R_UP/DOWN#

L_UP/DOWN#

GAINSEL

GND4

GND3

201110

TDA8552TS

3

12

B

U21

12

19

2

9

6

7

14

16

SVR

U61

VIN

VOUT

BP

GNDSHDN#

@MAX8868_EUK30

AVDD_AC97

12

R350

10K

12

R356
10K

1

2

Q43

3

2SC2411EK

D42

RB751V
R372
@10K

B

C

S

G

Q25

2

Q28

C775

10UF_16V_1206
16V

+5V_AMP

GAIN_SEL# 28

HPS

+5V_ALW

MIC_SD# MIC_BP

C

2N7002

D

1 3

1 2

2

G

2N7002

1 3

D

S

Q26 2N7002

D

S

1 3

G

2

U62

SI9183DT-33

1

VIN

3

SD#

R208

100K

150UF_TPB_6.3V

Q30

2N7002

12

C81

.1UF

MONO_IN 26

EC_MUTE30

1 2

13

D

S

12

C371
10UF_10V_1206

R228
100K

2

G

+3V_MIC

+

+

C663

C648

C635

.1UF

1000PF

SPK_R+

SPK_R-

SPK_L+ SPKL+

SPK_L-

R217

1 2

1K

C634

C628

.1UF

2.2UF_16V_0805

4

MIC_BP

5
21

C768 10UF_16V_1206

+

16V

21

12

C73
.01UF

C534

12

1UF_0603R367

R346

2.4K

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

D

E

Layout note:

Trace width=15 mils.

1.SPK_R+/-,SPK_L+/-

2.SPKR+/-,SPKL+/-

3.LINEOUT_L,LINEOUT_R

C333 150UF_TPB_6.3V

C317 150UF_TPB_6.3V

+3V_MIC

12

C119

1 2

1UF_0603

INTSPKOFF#36

D

+

+

R20

2.2K
L43 FBM-L10-160808-301

DOCK_MIC

L12 FBM-L10-160808-301

INT_MIC33

INTMICOFF#33,36

+5V_AMP

+5V_AMP

12

R384
100K

Title

Size Document Number Rev
Custom

Date: Sheet

LINEOUT_R 33,36

LINEOUT_L 33,36

+3V_MIC

12

R590

2.2K

1 2
1 2

12

12

C385

C48
330PF

330PF

Q40
2N7002

D

S

+5V_AMP

12

12

R383

R382

100K

100K

13

D

Q45

2

G

2N7002

S

G

2

1
2

DOCK_MICINT_MIC

13

1 2

R94 100K

D23

RB425D

3

Compal Electronics, inc.

SCHEMATIC, M/B LA-1012
401200

E

JP26

5
4
3

6
2
1

MIC

FOXCONN JA6033L-101

HPS

12

R412
1M

27 45Monday, September 10, 2001

SPKR+

VSS

2

+5V_ALW

1

3

VOUT

+12V_ALW

5
24

BP

U58

74AHCT1G125GW

MIC_OUT+26

+3V_MIC

5

4

SPKR+ 33

SPKR- 33

SPKL+ 33

SPKL- 33

DIS_ADJVOL 30

ADJVOL_UP/DW# 30

LINE_OUT_PLUG33,36

7

8

DOCK_MIC 36

+12V_SW

HPS 28

of

0A

A

B

C

D

E

C614

1500PF

C283

1500PF

EQ_L_INPUT1

R406

560K_1%

1 2

OUT1_L

536HZ
+6dB
Q=1.41

EQ_R_INPUT1

R189

560K_1%

1 2

OUT1_RR_EQ

536HZ
+6dB
Q=1.41

C309
470PF

1 2

R192

1 2

220K_1%

200K_1%

1 2

C636
82PF

LEFT 27

R_EQ OUT2_R

R_EQ

RIGHT 27

R423

1 2

75K_1%

C310
470PF

R210

1 2

220K_1%

C329
82PF

R219

1 2

75K_1%

1 2

75K_1%

1 2

1 2

1 2

1 2

1 2

1 2

R195

1 2

R422

1 2

R207

200K_1%

1 2

R218

75K_1%

+5V_AMP

10
12
14

C603
1UF_0603

10
12
14

C594
1UF_0603

C600
.1UF

216

U39

3

IN1
IN2
IN3
IN4
IN5
IN6

U18

IN1
IN2
IN3
IN4
IN5
IN6

5VGND

SUM_OUTREF

C292
.1UF

216

5VGND

SUM_OUTREF

5
7

3
5
7

1 1

EQ_L_INPUT1

1 2

12

1 2

10UF_10V_1206

1 2

12

1 2

10UF_10V_1206

EQ_L_INPUT2
EQ_L_INPUT3
EQ_L_INPUT4
EQ_L_INPUT5

EQ1_VREF

C627

EQ_R_INPUT1
EQ_R_INPUT2
EQ_R_INPUT3
EQ_R_INPUT4
EQ_R_INPUT5

EQ2_VREF

C326

R436
2K_1%

R419
2K_1%

2 2

+5V_AMP

3 3

R221
2K_1%

R223
2K_1%

+5V_AMP

C595

4.7UF_10V_0805

1

OUT1

4

OUT2

6

OUT3

11

OUT4

13

OUT5

15

OUT6

98

LMV801

+5V_AMP

C294

4.7UF_10V_0805

1

OUT1

4

OUT2

6

OUT3

11

OUT4

13

OUT5

15

OUT6

98

LMV801

OUT1_L
OUT2_L
OUT3_L
OUT4_L
OUT5_L

EQ_IN_L

OUT1_R
OUT2_R
OUT3_R
OUT4_R
OUT5_R

EQ_IN_R

C608

LEFTEQ

1UF_0603

LEFT_EQ26

RIGHT_EQ26

R442
0

R441
@33K

R454
@33K

R445
0

GAIN_SEL#27

LEFTEQ

12

12

12

RIGHTEQ

12

RIGHTEQ

HPS27

HPS_PLUG

GAIN_SEL#

L_EQ

LEFTEQ

HPS_PLUG

EQ_IN_L

GAIN_SEL#

C285

1UF_0603

RIGHTEQ

EQ_IN_R

C620
1500PF

R405

1 2

140K_1%

14

1 2
7

14
11 10

7

C282
1500PF

R184

1 2

140K_1%

+5V_AMP

C332

14

.1UF

4 3
7

14

8 9
7

1 2

1 2

R411

140K_1%

1 2

13

U22A
74HCT4066

12

U22B
74HCT4066

1 2

1 2

R183

140K_1%

1 2

U22C

5

74HCT4066

U22D

6

74HCT4066

C298

470PF

C631

82PF

C300

470PF

C331

82PF

EQ_L_INPUT2

R191

220K_1%

1 2

OUT2_LL_EQ

2230HZ

-6dB
Q=0.72

EQ_L_INPUT4

R414

301K_1%

1 2

OUT4_LL_EQ

18299HZ
+6dB
Q=1.41

EQ_R_INPUT2

R193

220K_1%

1 2

2230HZ

-6dB
Q=0.72

EQ_R_INPUT4

R216
301K_1%

1 2

OUT4_R R_EQ OUT5_R

18299HZ
+6dB
Q=1.41

C642
330PF

1 2

C633
330PF

1 2

R420

1 2

C323
330PF

R214

1 2

200K_1%

C321
220PF

R205

1 2

127K_1%

1 2

R415

200K_1%

1 2

C618

1 2

220PF

R416

39.2K_1%

1 2

R215

200K_1%

1 2

1 2

R204

39.2K_1%

1 2

C324

1 2

330PF

C322

1 2

220PF

1 2

R417
200K_1%

C623
220PF

1 2

127K_1%

R_EQ OUT3_R

EQ_L_INPUT3

R413
200K_1%

1 2

OUT3_LL_EQ

3410HZ

-6dB
Q=0.707

EQ_L_INPUT5

R407

301K_1%

1 2

OUT5_LL_EQ

7646HZ
+1.45dB
Q=1.59

EQ_R_INPUT3

R202

1 2

3410HZ

-6dB
Q=0.707

EQ_R_INPUT5

1 2

7646HZ
+1.45dB
Q=1.59

200K_1%

R203
301K_1%

4 4

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

28 45Monday, September 10, 2001

E

of

0A

A

+3V_ALW

+3V_ALW

1 1

2 2

GATE20
KBRST#
PM_THRM#

FSEL#
SELIO#
FRD#
EC_SMI#

3 3

4 4

10PF

22UF_10V_1206

+5V_SW

PS2_DATA
PS2_CLK

RP26
1 8
2 7
3 6
4 5

8P4R-10K

RP30
1 8
2 7
3 6
4 5

8P4R-10K

12

C716

12

C742

L48

1 2

BLM11A20

L49

1 2

BLM11A20

+3V_ALW

+3V_ALW

R498 20M

1 2

32.768KHZ
X4

.1UF

12

12

C637
.1UF

1 2

ECAGND

GATE2017

KBRST#17

EC_SMD_2
EC_SMC_2
EC_SMD_1
EC_SMC_1

12

C719
10PF

C733

@100K

R501

EC_RST#19,34

R458

R467
100K

120K

12

12

1
2
3
4
5

12

C732
1000PF

EC_AVCC

C632
1000PF

PC7

GATE20

KBRST#

ADB[0..7] 30
KBA[0..18] 30

KBD_DATA
KBD_CLK
TP_DATA
TP_CLK

RP32
1 8
2 7
3 6
4 5

8P4R-10K

CRY1

CRY2

2

G

+5V_SW

13

D

S

RB751V

2 1

D29
RB751V

2 1

D14

C734
.1UF

For REV.A only

ADB[0..7]
KBA[0..18]

RP21

10

9
8
7
6

10P8R_10K

+3V_SW

+3V_ALW +5V_ALW

A

Q50
2N7002

G_RST#19,22,23,24

+3V_ALW

+3V_SW

+3V_ALW

KSI[0..7]34

KSO[0..15]34

CLK_LPC_EC
12

12

MIC_GAINLOW#26

INT_SERIRQ17,19,23,31

LPC_FRAME#17,31

CLK_LPC_EC8

R468
@10

C688
@15PF

EC_SMI#17

PM_SLP_S1#8,17

VTT_PWRGD#5,8

LPC_AD017,31
LPC_AD117,31
LPC_AD217,31
LPC_AD317,31

EC_SCI#17

KBD_CLK34,36

KBD_DATA34,36

PS2_DATA34,36

TP_DATA33

LID_SW#30,33

EC_SUSP#32,38,39

TRICKLE41

1 2
1 2

PS2_CLK34,36

TP_CLK33

ICH_SWI#17,19

SYSON38

VR_ON42

VTT_ON42

ENBLT15

BKOFF#15

FSEL#30

R488 @0
R489 0

B

C697

22UF_10V_1206

CLK_LPC_EC

EC_SCI#

KSI[0..7]
KSO[0..15]

EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

B

12

KBD_CLK
KBD_DATA
PS2_CLK
PS2_DATA
TP_CLK
TP_DATA
LID_SW#

CRY1
CRY2

EC_SMI#

12

R528 @0

FSEL#

C

VCC2

GND4

122

123

VCC3

GND5

159

EC_AVCC

136

157

166

VCC5

VCC6

VCC4

AD Input

DA output

PWM
or
PORTA

PORTB

IOPB7/RING/PFAIL/LRESET2

PORTC

PORTD-1

PORTE

PORTH

PORTJ-1

PORTD-2

PORTK

PORTL

GND6

GND7

AGND

96

167

137

ECAGND

95

AVCC

IOPC4/TB1/EXWINT22
IOPC6/TB2/EXWINT23

IOPD0/RI1/EXWINT20
IOPD1/RI2/EXWINT21

IOPD2/EXWINT24/LRESET2

IOPE5/EXWINT40

IOPE6/LPCPD/EXWIN45

IOPE7/CLKRUN/EXWINT46

IOPH2/A2/BADDR0
IOPH3/A3/BADDR1

PORTI

NC2

NC3

NC1

122021858691929798

11

C

EC_3VDD

12

C695
.1UF

7
8

9
15
14
13
10
18
19
22
23

31

5

6

KSI0

71

KSI1

72

KSI2

73

KSI3

74

KSI4

77

KSI5

78

KSI6

79

KSI7

80

KSO0

49

KSO1

50

KSO2

51

KSO3

52

KSO4

53

KSO5

56

KSO6

57

KSO7

58

KSO8

59

KSO9

60

KSO10

61

KSO11

64

KSO12

65

KSO13

66

KSO14

67

KSO15

68

105
106
107
108
109

110
111
114
115
116
117
118
119

158
160

62
63
69
70
75
76 143

148
149
155
156

3

4
27
28

173
174

47

163445

SERIRQ
LDRQ
LFRAME
LAD0
LAD1
LAD2
LAD3
LCLK
LREST1
SMI
PWUREQ

IOPD3/ECSCI

GA20/IOPB5
KBRST/IOPB6

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

KBSOUT0
KBSOUT1
KBSOUT2
KBSOUT3
KBSOUT4
KBSOUT5
KBSOUT6
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSOUT12
KBSOUT13
KBSOUT14
KBSOUT15

TINT
TCK
TDO
TDI
TMS

PSCLK1/IOPF0
PSDAT1/IOPF1
PSCLK2/IOPF2
PSDAT2/IOPF3
PSCLK3/IOPF4
PSDAT3/IOPF5
PSCLK4/IOPF6
PSDAT4/IOPF7

32KX1/32KCLKOUT
32KX2

IOPJ2/BST0
IOPJ3/BST1
IOPJ4/BST2
IOPJ5/PFS
IOPJ6/PLI
IOPJ7/BRKL_RSTO

IOPM0/D8
IOPM1/D9
IOPM2/D10
IOPM3/D11
IOPM4/D12
IOPM5/D13
IOPM6/D14
IOPM7/D15

SEL0
SEL1
CLK

PC87591VPC

VDD

VCC1

Host interface

Key matrix scan

JTAG debug port

PS2 interface

PORTJ-2

PORTM

GND1

GND2

GND3

173546

161

U46

VBAT

AD0
AD1
AD2
AD3

IOPE0AD4
IOPE1/AD5
IOPE2/AD6
IOPE3/AD7

DP/AD8
DN/AD9

DA0
DA1
DA2
DA3

IOPA0/PWM0
IOPA1/PWM1
IOPA2/PWM2
IOPA3/PWM3
IOPA4/PWM4
IOPA5/PWM5
IOPA6/PWM6
IOPA7/PWM7

IOPB0/URXD

IOPB1/UTXD

IOPB2/USCLK

IOPB3/SCL1
IOPB4/SDA1

IOPC0
IOPC1/SCL2
IOPC2/SDA2

IOPC3/TA1
IOPC5/TA2

IOPC7/CLKOUT

IOPE4/SWIN

IOPH0/A0/ENV0
IOPH1/A1/ENV1

IOPH4/A4/TRIS

IOPH5/A5/SHBM

IOPH6/A6
IOPH7/A7

IOPI0/D0
IOPI1/D1
IOPI2/D2
IOPI3/D3
IOPI4/D4
IOPI5/D5
IOPI6/D6
IOPI7/D7

IOPJ0/RD

IOPJ1/WR0

SELIO

IOPD4

IOPD5

IOPD6

IOPD7

IOPK0/A8

IOPK1/A9
IOPK2/A10
IOPK3/A11
IOPK4/A12

IOPK5/A13/BE0
IOPK6/A14/BE1

IOPK7/A15/CBRD

IOPL0/A16
IOPL1/A17
IOPL2/A18
IOPL3/A19

IOPL4/WR1

NC4

NC5

NC6

NC7

NC8

NC9

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

+RTCVCC

C723
1UF_0603

1 2

81
82
83

TEMP_GMCH

84
87
88
89
90
93
94

99
100
101
102

32
33
36
37
38
39
40
43

153
154
162
163
164
165

168

EC_SMC_2

169

EC_SMD_2

170
171

PCI_WAKE_UP#

172
175

D25 RB751V

176
1

PC7
26
29
30

2
44
24
25

124
125
126
127
128
131
132
133

138
139
140
141
144
145
146
147

150
151

152
41

42
54
55

142
135
134
130
129
121
120

113
112
104
103
48

NC10

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

BATT_TEMP

R443@0

EC_SMC_1
EC_SMD_1
PCI_RST#

PM_THRM#

21

LPCPD#

KBA0
KBA1
KBA2
KBA3
KBA4
KBA5
KBA6
KBA7

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

FRD#
FWR#

SELIO#

KBA8
KBA9
KBA10
KBA11
KBA12
KBA13
KBA14
KBA15

KBA16
KBA17
KBA18

D

C640 .01UF

TEMP_GMCH ECAGND

BATT_TEMP

BATT_TEMP 40

TEMP_GMCH 35

LI/NIMH# 40,41

DAC_BRIG 33
EC_EN_FAN 35
EC_EN_FAN2 35

INVT_PWM 33
BEEP# 27

ACOFF 41
PM_BATLOW# 17,19
EC_ON 34
EC_LID_OUT# 17
PM_LANPWROK 17,25

EC_VOL_UP# 26
EC_VOL_DW# 26
EN_WOL# 37
EC_SMC_1 30,40
EC_SMD_1 30,40
PCI_RST# 9,15,17,21,22,23,26,31,37

PBTN_OUT# 17
EC_SMC_2 5,33,36

EC_SMD_2 5,33,36
FAN_SPEED 35

PM_THRM# 17
FAN_SPEED2 35

ACIN 18,38,40
RING# 32
PM_SLP_S3# 17

ON/OFFBTN# 33,36
PM_SLP_S5# 17

PM_CLKRUN# 17,19,22,23,31,37

FRD# 30
FWR# 30

SELIO# 30
SCROLLED# 16

NUMLED# 16
CAPSLED# 16

FSTCHG 41

D

1 2

C641 .01UF

1 2

BADDR1-0

*

Index Data
0 0
0 1
1 0
1 1

4E 4F

(HCFGBAH, HCFGBAL) (HCFGBAH, HCFGBAL)+1

IRE
OBD

*

DEV
PROG

SHBM=1: Enable shared memory with host BIOS
TRIS=1: While in IRE and OBD, float all the

signals for clip-on ISE use

KBA1

(ENV1)

KBA2

(BADDR0)

KBA3

(BADDR1)

KBA5

(SHBM)

PCI_WAKE_UP#

+3V_ALW

U56

5

LPCPD#

4

JP30

10

@96212-1011S

Title

Size Document Number Rev
Custom

Date: Sheet

2
1

7SH08

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

EC_TINIT#
EC_TCK
EC_TDO
EC_TDI
EC_TMS

EC_VOL_UP#
EC_VOL_DW#
EN_WOL#

Compal Electronics, inc.

SCHEMATIC, M/B LA-1012
401200

I/O Address

Reserved

ENV0 ENV1

00
0011

11

R137

12

C14
.1UF

E

TRIS

R541

4.7K

+3V_ALW

E

2F2E

0
0
0
0

+3V_ALW

R44910K

R507@10K

R50610K

R50510K

12

100K

PCI_RST#

12

PM_SUS_STAT# 17,31

29 45Monday, September 10, 2001

0A

of

A

INPUT

+5V_ALW

12

R521
100K

+3V_ALW

1 1

R582 100K

1 2

SELIO#29

2 2

3 3

4 4

+3V_ALW

R583 100K
R584 100K
R585 100K

+3V_ALW

R586 100K
R587 100K
R588 100K
R589 100K

TPAD_ON/OFF#33

BT_WAKE_UP20

1 2
1 2
1 2

1 2
1 2
1 2
1 2

A

M_SEN#16,36

1394_PME#22

BT_PRES#20

KBA1
SELIO#

KBA3
SELIO#

KBA5
SELIO#

CONA#36

+3V_ALW

14

4
5

7

USER_BTN1#33
USER_BTN2#33
USER_BTN3#33
USER_BTN4#33

SUSPBTN#33,36

AUD_PME#26
PCM_PME#23

MDM_PME#37

M_SEN#
CONA#
BT_PRES#

1394_PME#
BT_WAKE_UP

U57B
74LVC32

+3V_ALW

14
12

13

7

LAN_PME#37

+3V_ALW

14

9

10

7

EC_SMC_129,40
EC_SMD_129,40

U57D
74LVC32

U57C

74LVC32

C738
.1UF

6

+5V_ALW

12

11

AUD_PME#
PCM_PME#
MDM_PME#
LAN_PME#

8

8
7
6
5

12

R526
100K

U55

VCC
WC
SCL
SDA

NM24C164

B

+3V_ALW

1 2

20

1A1 1Y1

VCC

1A2 1Y2
1A3 1Y3
1A4 1Y4
2A1 2Y1
2A2 2Y2
2A3 2Y3
2A4 2Y4

1G
2G

GND

10

+3V_ALW

20

1A1 1Y1

VCC

1A2 1Y2
1A3 1Y3
1A4 1Y4
2A1 2Y1
2A2 2Y2
2A3 2Y3
2A4 2Y4

1G
2G

GND

10

+3V_ALW

20

1A1 1Y1

VCC

1A2 1Y2
1A3 1Y3
1A4 1Y4
2A1 2Y1
2A2 2Y2
2A3 2Y3
2A4 2Y4

1G
2G

GND

10

1

A0

2

A1

3

A2

4

GND

B

U53

74LVC244

1 2

U54

74LVC244

C749

1 2

.1UF

U52

74LVC244

+5V_ALW

2 18
4 16
6 14

8 12
11 9
13 7
15 5
17 3

1
19

2 18

4 16

6 14

8 12
11 9
13 7
15 5
17 3

1
19

2 18

4 16

6 14

8 12
11 9
13 7
15 5
17 3

1
19

C755

.1UF

C754

.1UF

12

12

R517
100K

R515
100K

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

C

D

OUTPUT

3
4 5
7 6

8 9
13 12
14 15
17 16
18 19

11

1

1 2

R499 @0

1 2

R508 0

D

+5V_ALW

C753

1 2

.1UF

20

U51

2

Q0

D0

VCC

D1 Q1
D2 Q2
D3 Q3
D4 Q4
D5 Q5
D6 Q6
D7 Q7

CLK
CLR

GND

74HCT273

10

+5V_ALW

C748

1 2

.1UF

20

3
4 5
7 6

8 9
13 12
14 15
17 16
18 19

11

1

U50

Q0

D0

VCC

D1 Q1
D2 Q2
D3 Q3
D4 Q4
D5 Q5
D6 Q6
D7 Q7

CLK
CLR

GND

74HCT273

10

+5V_ALW
+3V_ALW

VCC_FLASH

FWE#

6

Title

Size Document Number Rev
Custom

Date: Sheet

2

KBA2
SELIO#

VCC
WE*

A17
A14
A13

A11
OE*
A10

CE*
DQ7
DQ6
DQ5
DQ4
DQ3

OE#

A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0

KBA4
SELIO#

A8
A9

A0
A1
A2
A3

ADB[0..7]
KBA[0..18]

+3V_ALW

C747

1 2

.1UF

14

1
2

7

+3V_ALW

C685

1 2

.1UF

VCC_FLASH

32

FWE#

31
30
29
28
27
26
25
24
23
22

ADB7

21
20

ADB5

19
18

ADB3

17

FRD#KBA11

32

KBA10

31

FSEL#

30

ADB7

29

ADB6

28

ADB5

27

ADB4

26

ADB3

25
24

ADB2

23

ADB1

22

ADB0

21

KBA0

20

KBA1

19

KBA2

18

KBA3

17

TSOP 8x14

U57A

74LVC32

1 2

+3V_ALW

74LVC32

14

1
2

7

4.7UF_10V_0805

3

R516

20K

U43A

C720

FRD# 29
FSEL# 29

12

+

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

1UF_0603

3

1 2

LARST#

C726

1 2

ADB0
ADB1
ADB2
ADB3
ADB4
ADB5
ADB6
ADB7

LARST#

C718
.1UF

ADB[0..7]29

KBA[0..18]29

M_SEN#

LID_SW#29,33

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

CONA#
BT_PRES#

1394_PME#

AUD_PME#
PCM_PME#
MDM_PME#
LAN_PME#

R532 100K

1 2

VCC_FLASH

RP34
1 8
2 7
3 6
4 5

8P4R-100K

R548 100K

1 2

RP22
1 8
2 7
3 6
4 5

8P4R-100K

BT_WAKE_UP

KBA18
KBA16
KBA15 KBA17
KBA12 KBA14
KBA7 KBA13
KBA6 KBA8
KBA5 KBA9
KBA4 KBA11
KBA3 FRD#
KBA2 KBA10
KBA1 FSEL#
KBA0
ADB0 ADB6
ADB1
ADB2 ADB4

KBA9
KBA8
KBA13
KBA14
KBA17
FWE#

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4

C

+3V_ALW

+3V_ALW

+3V_ALW

U38

1

NC

2

A16

3

A15

4

A12

5

A7

6

A6

7

A5

8

A4

9

A3

10

A2

11

A1

12

A0

13

DQ0

14

DQ1

15

DQ2

16

VSS

29F040/SST39VF040_PLCC

U40

1

A11

2

A9

3

A8

4

A13

5

A14

6

A17

7

WE#

8

VCC

9

A18

10

A16

11

A15

12

A12

13

A7

14

A6

15

A5

16

A4

@SST39VF040_TSOP

E

PCMRST#

EC_GRST# 19
BT_RST# 20
BT_DETACH 20
BT_ON# 20

1

TP2

EC_MUTE 27

1

TP3

1

TP4

TPAD_LED# 33

1

TP9

DIS_ADJVOL 27
ADJVOL_UP/DW# 27

1

TP5

1

TP6

1

TP7

1

TP8

U42

KBA11
KBA9
KBA8
KBA13
KBA14
KBA17
FWE#

KBA18
KBA16
KBA15
KBA12
KBA7
KBA6
KBA5
KBA4

U43B

74LVC32

+3V_ALW

1

A11

2

A9

3

A8

4

A13

5

A14

6

A17

7

WE#

8

VCC

9

A18

10

A16

11

A15

12

A12

13

A7

14

A6

15

A5

16

A4

@29F040_TSOP

14
4

5
7

+3V_ALW

12

R209

100K

OE#

A10
CE#
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0

A0
A1
A2
A3

+12V_SW

12

2

1 3

D

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

TSOP 8x20

R206

100K

G

Q27

2N7002

S

Compal Electronics, inc.

SCHEMATIC, M/B LA-1012
401200

E

FRD#
KBA10
FSEL#
ADB7
ADB6
ADB5
ADB4
ADB3

ADB2
ADB1
ADB0
KBA0
KBA1
KBA2
KBA3

EC_FLASH# 18

FWR# 29

30 45Monday, September 10, 2001

of

0A

5

D D

PM_SUS_STAT#17,29

VDD_391

.1UF

12

12

C669

C668
.1UF

C C

B B

CLK_LPC_SIO CLK_SIO14

Signal Pin # Description

BADDR

12

R503
@33

12

C721
@15PF

61

1 2

R511 @0

4.7UF_10V_0805

12

12

C670

C671

1000PF_50V

BASE Address Selection

12

12

100K

R504
@33

C722
@15PF

+3V_SW

R512

12

"0": 2E~2F (Default)
"1": 4E~4F

TEST

58

"0": Normal (Default)
"1": Test Mode

XCNF[2:0]

90, 4, 59

2 1 0 Function
x 0 0 No BIOS

4

LPC_AD017,29
LPC_AD117,29
LPC_AD217,29
LPC_AD317,29

CLK_LPC_SIO8

PCI_RST#9,15,17,21,22,23,26,29,37

LPC_FRAME#17,29

LPC_DRQ#117

PM_CLKRUN#17,19,22,23,29,37

INT_SERIRQ17,19,23,29

+3V_SW

CLK_SIO148

DSKCHG#33

HDSEL#33
RDATA#33

WP#33

TRACK0#33

WGATE#33
WDATA#33

STEP#33

FDDIR#33

DRV0#16
MTR0#33

INDEX#33

3MODE#33

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

CLK_LPC_SIO
PCI_RST#
LPC_FRAME#
LPC_DRQ#1

PM_CLKRUN#
SERIRQ

1 2

R509 @10K

CLK_SIO14

DSKCHG#
HDSEL#
RDATA#
WP#
TRACK0#
WGATE#
WDATA#
STEP#
FDDIR#
DRV0#
MTR0#
INDEX#
3MODE#

3

+3V_SW

143963

U47

15

LAD0

16

LAD1

17

LAD2

18

LAD3

8

LCLK

9

LRESET#

12

LFRAME#

11

LDRQ#

7

LPCPD#

6

CLKRUN#

10

SERIRQ

19

SMI#

20

CLKIN

21

DSKCHG#

22

HDSEL#

23

RDATA#

24

WP#

25

TRK0#

26

WGATE#

27

WDATA#

28

SETP#

29

DIR#

30

DR0#

31

MTR0#

32

INDEX#

33

DENSEL

34

DRATE0/IRSL2

72 74

DR1# DCD2#

73

MTR1#/DRATE0

84

MTR1#

1

NC

2

NC

3

NC

4

NC

65

NC

82

NC

83

NC

85

NC

86

NC

87

NC

90

NC

91

NC

92

NC

93

NC

94

NC

95

NC

96

NC

97

NC

98

NC

99

NC

100

NC

PC87391

88

VDD

VDD

VDD

VDD

PC87391

VSS

VSS

VSS

VSS

133864

89

PD0/INDEX#

PD1/TRK0#

PD2/WP#

PD3/RDATA#

PD4/DSKCHG#

PD5/MSEN0

PD6/DRATE0

PD7/MSEN1

SLCT/WGATE#

PE/WDATA#

BUSY_WAIT#/MTR1#

ACK#/DR1#

SLIN#_ASTRB#/STEP#

INIT#/DIR#

ERR#/HDSEL#

AFD#_DSTRB#/DENSEL

STB#_WRITE#

DCD1#
DSR1#

SIN1

RTS1#/TEST

SOUT1/XCNF0

DTR1#_BOUT1/BADDR

CTS1#

RI1#

DSR2#

SIN2

RTS2#

SOUT2

CTS2#

DTR2#_BOUT2

RI2#

IRTX

IRRX1

IRRX2_IRSL0

IRSL1

IRSL2/DR1#

IRSL3/PWUREQ#

WDO#

PNF

2

52
50
48
46
45
44
43
42

R479 100K
35
36
37
40
41
47
49
51
53
54

55
56
57
58
59
60
61
62

75
76
77
78
79
80
81

70
69
68
67
71
66

5

LPD0
LPD1
LPD2
LPD3
LPD4
LPD5
LPD6
LPD7

12
LPTSLCT
LPTPE
LPTBUSY
LPTACK#
LPTSLCTIN#
LPTINIT#
LPTERR#
LPTAFD#
LPTSTB#

DCDA#
DSRA#
RXDA
RTSA#
TXDA
CTSA#
DTRA#
RIA#

RP24 8P4R_100K

R469 100K

LPD0 32,36
LPD1 32,36
LPD2 32,36
LPD3 32,36
LPD4 32,36
LPD5 32,36
LPD6 32,36
LPD7 32,36

+3V_SW
LPTSLCT 32,36
LPTPE 32,36
LPTBUSY 32,36
LPTACK# 32,36
LPTSLCTIN# 32,36
LPTINIT# 32,36
LPTERR# 32,36
LPTAFD# 32,36
LPTSTB# 32,36

DCDA# 32
DSRA# 32
RXDA 32
RTSA# 32
TXDA 32
CTSA# 32
DTRA# 32
RIA# 32

18
27
36
45

12

IRTXOUT 32
IRRX 32
IRMODE 32

+3V_SW

BADDR PULL-UP :4E
BADDR PULL-DOWN:2E
(DEFAULT)

DTRA#

Pin # 61

BASE ADDRESS CONFIGURATION

1 2

R450 @10K

+3V_SW

1

*1.ROM SOLUTION for PC87391

x 0 1 Normal Mode. XRDY disabled
0 1 0 Latch Mode. XA12-19, XRDY enabled

*2.ROM SOLUTION for PC87393

1 1 0 Latch Mode. GPIO10~17,XRDY enabled
0 1 1 Latch Mode. XA12-19, XRDY disabled

A A

1 1 1 Latch Mode. GPIO10~17,XRDY disabled

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

5

4

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

3

2

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

1

of

31 45Monday, September 10, 2001

0A

A

B

C

D

E

PARALLEL

+5V_PRN

C364

AFD#/3M#
LPTERR#
LPTINIT#_1
LPTSLCTIN#_1

LPTACK#
LPTBUSY
LPTPE
LPTSLCT

FD0
FD1
FD2
FD3

FD4
FD5
FD6
FD7

12

+5V_ALW

12

CP12
1 8
2 7
3 6
4 5

8P4C_220PF

CP10
1 8
2 7
3 6
4 5

8P4C_220PF

CP1
1 8
2 7
3 6
4 5

8P4C_220PF

CP11
1 8
2 7
3 6
4 5

8P4C_220PF

C13
.1UF

SERIAL

1 2

R249 33

1 2

R253 33

RP12
1
2
3
4
5

10P8R_2.7K

RP10
1
2
3
4
5

10P8R_2.7K

RP11

10
11
12
13
14
15
16

16P8R_33

LPTSLCTIN#31,36

LPTINIT#31,36

+5V_SW

+5V_SW

LPTSLCTIN#_1
LPTERR#

AFD#/3M#

FD0
FD1
FD2
FD3

LPD3
LPD2
LPD1
LPD0
LPD7 FD7
LPD6
LPD5
LPD4

LPD[0..7]

+5V_SW

1 1

2 2

LPTINIT#_1

LPTSLCTIN#_1

+5V_SW

10

LPTACK#LPTINIT#_1

9

LPTBUSY

8

LPTPE LPTSTB#

7

LPTSLCT

6

+5V_SW

10

FD7

9

FD6

8

FD5

7

FD4

6

FD3

89

FD2

7

FD1

6

FD0

5
4

FD6

3

FD5

2

FD4

1

LPD[0..7] 31,36

LPTSTB#31,36

LPTAFD#31,36
LPTERR#31,36

LPTACK#31,36
LPTBUSY31,36

LPTPE31,36

LPTSLCT31,36

+5V_SW

FD0
LPTERR#
FD1
LPTINIT#_1
FD2
LPTSLCTIN#_1
FD3

FD4
FD5
FD6
FD7
LPTACK#
LPTBUSY
LPTPE
LPTSLCT

D4

2 1

RB420D

R3 33
1 2
1 2

R252 33

+5V_PRN

12

w=10mils

AFD#/3M#LPTAFD#

R2

2.7K

1

14

2

15

3

16

4

17

5

18

6

19

7

20

8

21

9
22
10
23
11
24
12
25
13

JP1
LPTCN-25

28

29

4.7UF_10V_0805

28

24

1

2
14
13
12
19
18
17
16
15
20

23
22

12

C373
D@.1UF

C1+

C1­C2+

C2­TIN1
TIN2
TIN3
ROUT1
ROUT2
ROUT3
ROUT4
ROUT5
ROUTB2

FORCEON
FORCEOFF#

D

26

VCC

U25

D@MAX3243

V+

V-

TOUT1
TOUT2
TOUT3

RIN1
RIN2
RIN3
RIN4
RIN5

INVLD#

GND

C375
D@.47UF_16V_0805

1 2

27
3

1 2

C362
D@.47UF_16V_0805

DTR1#

9

RTS1#

10

TXD1

11

CTS1#

4
5

RXD1

6

DCD1#

7

DSR1#

8
21
25

Title

Size Document Number Rev
Custom

Date: Sheet

DTR1# 36
RTS1# 36
TXD1 36
CTS1# 36
RI1# 36
RXD1 36
DCD1# 36
DSR1# 36

TXD1
CTS1#
DTR1#
RI1#

DCD1#
DSR1#
RXD1
RTS1#

CP2
1 8
2 7
3 6
4 5

D@8P4C_220PF

CP3
1 8
2 7
3 6
4 5

D@8P4C_220PF

Compal Electronics, inc.

SCHEMATIC, M/B LA-1012
401200

32 45Monday, September 10, 2001

E

of

0A

D3

RB751V
D2

RB751V

Q4
D@2N7002

C

+3V_ALW

12

21

21

13

D

S

R251
100K

C372
D@.1UF

1 2

1 2

C363

TXDA31

RIA#31

RXDA31

D@.47UF_16V_0805

RIA# RI1#

RIA0

DTRA#31
RTSA#31

CTSA#31

DCDA#31

2

G

DSRA#31

EC_SUSP#29,38,39

3 3

C1

@10UF_10V_1206

4 4

T = 20mil

12

+

C3
@.1UF

+3V_SW

@22UF_10V_1206

T = 20mil

A

FIR Module

12

C4

+

U1

2

LED_C

4

RXD

6

VCC

8

GND

@TFDU6101E

LED_A

TXD

MODE

SD

R1

@5.6_1206

1
3
5
7

12

T = 20mil

T = 12mil
T = 12mil
T = 12mil

12

R581
100K

+

C9
@10UF_10V_1206

IRTXOUT
IRMODE
IRRX

B

IRTXOUT 31
IRMODE 31
IRRX 31

PCM_RI#23

MODEM_RI#37

RING#29

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

A

FDD Connector

1 1

INDEX#31

DRV05V#16

DSKCHG#31

MTR0#31

FDDIR#31

3MODE#31

STEP#31
WDATA#31
WGATE#31

TRACK0#31

WP#31
RDATA#31
HDSEL#31

2 2

+5V_SW +5V_SW

JP20

1 27

INDEX#
DRV05V#
DSKCHG#

MTR0#
FDDIR#

3MODE#
STEP#

WDATA#
WGATE#
TRACK0#
WP#

RDATA#

HDSEL#

127

3
4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

232449

24
25

25

26

26

FDD Connector

B

INDEX#

282

282

29

29303
31

32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48

50
51
52

DRV05V#

30
31

DSKCHG#

32
33
34
35

MTR0#

36
37

FDDIR#

38

3MODE#

39

STEP#

40
41

WDATA#

42
43

WGATE#

44
45

TRACK0#

46
47

WP#

48
49

RDATA#

50
51

HDSEL#

52

Layout note :

Place capacitors near Floppy connector .

+5V_SW

12

12

C342

C348

1000PF

10UF_10V_1206

6
7
8
9

10

6
7
8
9

10

RP9

10P8R_1K

RP35

10P8R_1K

+5V_SW

+5V_SW

3MODE#
DSKCHG#
INDEX#

DRV05V#
MTR0#
STEP#
WGATE#

12

C339
1UF_0603

5
4
3
2
1

5
4
3
2
1

C

RDATA#
WP#

TRACK0#

FDDIR#
WDATA#
HDSEL#

D

+5V_SW

JP17

1

1

2

2

12

C258
220PF

3

3

4

4

5

5

6

6

7

7

8

8

HEADER 8

JP19

1

1

2

2

3

3

4

4

HEADER 4

JP24

1

1

2

2

3

3

4

4

5

5

6

6

HEADER 6

TPAD_ON/OFF#30

TPAD_LED#30

TP_DATA29

TP_CLK29

12

C346
.1UF

SPKR+27

SPKR-27
SPKL+27

+5V_SW

+5V_SW

SPKL-27

LINE_OUT_PLUG27,36

LINEOUT_R27,36
LINEOUT_L27,36

12

12

C735
220PF

C554

22PF

C279
220PF

12

C736
220PF

12

12

C271
220PF

12

12

12

C737
220PF

C558
22PF

C266
220PF

E

+5V_SW

+5V_ALW

3 3

SCRLED5V#16
NUMLED5V#16
CAPSLED5V#16

FDDLED#

CDLED#16

HDDLED#16

INT_MIC27

DISPOFF#15

DAC_BRIG29
INVT_PWM29

4 4

DRV05V#

A

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20

JP9

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20

HEADER 40

+5V_SW

21

21

22

22

23

23

24

24

25

25

26

26

27

27

28

28

29

29

30

30

31

31

32

32

33

33

34

34

35

35

36

36

37

37

38

38

39

39

40

40

12

C386

.1UF

LID_SW_CON#

EC_PWR_ON#

ON/OFFBTN# 29,36
SUSPBTN# 30,36
USER_BTN1# 30
USER_BTN2# 30
USER_BTN3# 30
USER_BTN4# 30

EC_PWR_ON# 34,36,41
EC_SMC_2 5,29,36
EC_SMD_2 5,29,36

B

D48

1

3

2

DAN202U

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

LID_SW# 29,30
INTMICOFF# 27,36

C

Title

Size Document Number Rev
Custom

D

Date: Sheet

Compal Electronics, inc.

SCHEMATIC, M/B LA-1012
401200

33 45Monday, September 10, 2001

E

0A

of

A

+3V_SW

12

R573

@47K

1 1

2 2

12

R574

@330K

+3V_SW

12

C770
@.47UF_0603

U13

1 3

C196
.1UF

VCC RESET#

MAX809SEUR

SOT23

12

1
2
3

U64

NC
A
GND

@NC7S14

GND

2

VCC

+3V_SW

5
4

Y

1
2
3

VGATE17,42

WARM_RST#17

U65

NC
A
GND

@NC7S14

VCC

B

5
4

Y

+3V_SW

D8
RB751V

21

D9 RB751V

21

D40 RB751V

21

+3V_SW

C

INT_KBD CONN.

KSO0

KSO1
KSO2
KSO7
KSO6
KSO12
KSO14
KSO10

JP21

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

INT_KB_CONN.

KSI7

2

2

KSO9

4

4
6

8
10
12
14
16
18
20
22
24

KSI5

6

KSI2

8

KSO5

10

KSI0

12

KSO4

14

KSO8

16

KSO3

18

KSO13

20

KSO11

22

KSO15

24

KSI1
KSI6
KSI4

KSI3

12

R111
100K

PM_PWROK 17

KSI[0..7]

KSO[0..15]

D

CP4

KSI1

1 8

KSI7

2 7

KSI6

3 6

KSI5

KSO9
KSO0
KSO1
KSO5

KSI4
KSI2
KSI3
KSI0

KSO2
KSO4
KSO7
KSO8

KSO6
KSO3
KSO12
KSO13

KSO14
KSO11
KSO10
KSO15

4 5

8P4C_220PF

CP6
1 8
2 7
3 6
4 5

8P4C_220PF

CP7
1 8
2 7
3 6
4 5

8P4C_220PF

CP8
1 8
2 7
3 6
4 5

8P4C_220PF

CP9
1 8
2 7
3 6
4 5

8P4C_220PF

CP5
1 8
2 7
3 6
4 5

8P4C_220PF

KSI[0..7] 29

KSO[0..15] 29

E

Reset Button

+3V_ALW

D36

33

Power ON

C

22K

B

22K

Q38
DTC124EK

1N4148

2 1

12

C744
.01UF_0603

13

E

B

EC_RST# 19,29

EC_PWR_ON# 33,36,41

12

C484

12

1000PF

2 1

L6

KB_ASKB_VCC

12

C355
1000PF

1 2

FCM1608C-121T

1 2

FCM1608C-121T

1 2

FCM1608C-121T

1 2

L5

FCM1608C-121T

L3

L4

D

PS2_CLK29,36

PS2_DATA29,36

F2

+5V_SW

D22
RLZ20A

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

W=40mils W=40mils

POLYSWITCH_1A

L34

1 2

FBM-11-451616-800T

4516

KBD_DATA29,36
KBD_CLK29,36

12

C356
220PF

3

Q2
@SM05

1

2

12

C358

4.7UF_10V_0805

1

2

Q1
@SM05

3

Title

Size Document Number Rev
Custom

Date: Sheet

SW2

1 2

Q39
@2N7002

3 4

RESET BTN

+3V_ALW

D

S

12

13

3 3

EC_ON29

4 4

A

R316

4.7K

1 2

R314
22K

2

G

R519

1 2

2

PS2 CONN.

12

12

C10

220PF

KBD/PS2_6

C6
220PF

12

C12

220PF

JP3

4

8

2

8

7

1

7
563

12

C7
220PF

Compal Electronics, inc.

SCHEMATIC, M/B LA-1012
401200

34 45Monday, September 10, 2001

E

0A

of

5

4

3

2

1

C200 1UF_0603

R121 3M

1 1

+5V_SW

2 2

R117 100K

R118

R125

100K

1M

EC_EN_FAN29

1 2

R122 10M_0603

C222

10UF_10V_1206

-

2

+

3

U14A
LMC6482IM

8 4

+5V_SW

FAN Connector

+12V_SW

12

R140

3.48K

1

2

1 2
21

D10
1N4148

3

Q21

1

2SA1036K

Q20

FMMT619

FAN_SPEED29

2

D7

1SS355

1
3

2 1

+5V_SW

2 1
12

C177

10UF_10V_1206

D6
1SS355

5V_FAN1

+3V_SW

12

R510
100K

JP16

1
2
3

CON3

Secondary FAN Connector

C276 1UF_0603

R164 3M

+5V_SW

3 3

EC_EN_FAN229

R170 100K

R168
1M

100K

R163

1 2

R162 10M_0603

C277

10UF_10V_1206

-

6

+

5

U14B
LMC6482IM

8 4

+5V_SW

+12V_SW

12

R153

3.48K

7

2

1 2
21

D11

1N4148

3

Q23

1

2SA1036K

Q36

FMMT619

2

D18

1SS355

+5V_SW

1
3

2 1

D17
1SS355

2 1

5V_FAN2

12

C431

+3V_SW

12

R276
100K

JP14

1
2
3

CON3

The temperature sensing and
Over-Hot shutdown circuit.

Place this block circuit close to CPU.

VL

R69

2.15K_1%

1 2

C129
.1UF

R70
0

1 2

R71
Thermistor_0805

1 2

+3V_ALW

12

R76

2.15K_1%

12

VL

R75
100K_1%

1 2

R83
47K_1%

R87

12

16.9K_1%

C107

.22UF_0805

12

12

Layout note :

Place a copper ground plan from CPU and place the
Thermistor upper this ground plan.

The temperature sensing for
GMCH.

3
2

R78
100K_1%

VL

12

84

U11A

+

1

-

LM393

MAINPWON 39

10UF_10V_1206

FAN_SPEED229

12

R77
0

12

R80
Thermistor_0805

TEMP_GMCH 29

Layout note :

4 4

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

5

4

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

3

Place a copper ground plan from GMCH and place
the Thermistor upper this ground plan.

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

2

Date: Sheet

35 45Monday, September 10, 2001

1

0A

of

A

B

C

D

E

EMI Finger

PAD1
@EMIPAD_PS-4

PAD4

1 1

EMIPAD_PS-4

PAD2
EMIPAD_PS-4

PAD5
EMIPAD_PS-4

PAD3
EMIPAD_PS-4

PAD6
EMIPAD_PS-4

PAD7
EMIPAD_PS-4

Unused IC parts.

VL

84

U11B
LM393

5

+

7

6

­+12V_ALW

+3V_ALW +3V_ALW

U43C

74LVC32

14

9

10

7

8

+3V_ALW +3V_ALW

+3V_ALW

13 12

14
12

13

7

U36F
74LVC14

7 14

U43D
74LVC32

11

DOCKING 100 PIN

JP27

1

1

LINEOUT_L
LINEOUT_R

C19
@100PF

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

53

55

55

57

57

59

59

61

61

63

63

65

65

67

67

69

69

71

71

73

73

75

75

77

77

79

79

81

81

83

83

85

85

87

87

89

89

91

91

93

93

95

95

97

97

99

99

@DOCKING 100

KBD_DATA29,34

KBD_CLK29,34

PS2_CLK29,34

2 2

3 3

4 4

PS2_DATA29,34

LAN_TX+25

LAN_TX-25

LAN_RX+25

LAN_RX-25

DCD1#32

DSR1#32

TXD132

RXD132

LPTSTB#31,32
LPTAFD#31,32

LPTERR#31,32

LPTINIT#31,32

LPTSLCTIN#31,32

COMPS15,16

DAC_RED11,16

DAC_GREEN11,16

DAC_BLUE11,16

INTSPKOFF#27

LINE_OUT_PLUG27,33

INTMICOFF#27,33

LINEOUT_L27,33

LINEOUT_R27,33

DOCK_LIN_L26

DOCK_LIN_R26

DOCK_MIC27

DCD1#
DSR1#
TXD1 RTS1#
RXD1

LPD1
LPD3
LPD5
LPD7

LINEOUT_L
LINEOUT_R

C23
@100PF

12

12

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

54

56

56

58

58

60

60

62

62

64

64

66

66

68

68

70

70

72

72

74

74

76

76

78

78

80

80

82

82

84

84

86

86

88

88

90

90

92

92

94

94

96

96

98

98

100

100

101

102

103

104

101

102

103

104

LPD[0..7]31,32

DTR1#
CTS1#

RI1#

CONA#

LPD[0..7]

12

C30

@100PF

SPR_ON/OFFBTN#
LPD0
LPD2
LPD4
LPD6

+5V_SW

+5V_ALW

12

C31
@1000PF

EC_SMD_2 5,29,33
EC_SMC_2 5,29,33
SUSPBTN# 30,33

DTR1# 32
CTS1# 32
RTS1# 32
RI1# 32

LPTSLCT 31,32
LPTPE 31,32
LPTBUSY 31,32
LPTACK# 31,32

M_SEN# 16,30
DDC_MD2
5VDDCCL 16
5VDDCDA 16

USB_OC#2 18
USB_OC#3 18

USB_PP2 18
USB_PN2 18

USB_PP3 18
USB_PN3 18
CONA# 30

R11

1 2

@FBM-L11-322513-201LMAT

3

@DAN202U

L54 @FBM-L10-160808-301
1 2
1 2

L55 @FBM-L10-160808-301

D12

VIN

1
2

ON/OFFBTN# 29,33
EC_PWR_ON# 33,34,41

DAC_VSYNC 11,16
DAC_HSYNC 11,16

Screw Hole

H131H51H71H11H121H61H31H21H11

H10

1

H91H41H8

Fiducial Mark

FD4

1

FIDUCIAL MARK

CF17

1

FIDUCIAL MARK

CF10

1

FIDUCIAL MARK

CF8

1

FIDUCIAL MARK

CF3

1

FIDUCIAL MARK

H161H15

1

FD6

1

FIDUCIAL MARK

CF18

1

FIDUCIAL MARK

CF14

1

FIDUCIAL MARK

CF11

1

FIDUCIAL MARK

CF4

1

FIDUCIAL MARK

H17

1

NPTHNPTH

FD5

1

FIDUCIAL MARK

CF19

1

FIDUCIAL MARK

CF12

1

FIDUCIAL MARK

CF1

1

FIDUCIAL MARK

CF9

1

FIDUCIAL MARK

H14

1

1

FIDUCIAL MARK

1

FIDUCIAL MARK

1

FIDUCIAL MARK

1

FIDUCIAL MARK

1

FIDUCIAL MARK

1

FD2

CF20

CF15

CF2

CF6

FD3

1

FIDUCIAL MARK

CF16

1

FIDUCIAL MARK

CF7

1

FIDUCIAL MARK

1

1

FIDUCIAL MARK

1

FIDUCIAL MARK

1

FIDUCIAL MARK

FD1

CF13

CF5

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

36 45Monday, September 10, 2001

E

of

0A

A

B

C

D

E

Or use SI2305DS.

+3V_ALW +3VAUX

12

1 1

TIP RING

LAN RESERVED

R483

+3V_SW

2 2

3 3

0_1206

12

12

C710
1000PF

CLK_MINIPCI
12

R484
@10

12

C704
@15PF

MD_BITCLK
12

R492
@10

12

C707
@15PF

12

C711
100PF

INT_PIRQD#17,19,26

PCI_REQ#417,19 PCI_GNT#4 17

CLK_MINIPCI8

PCI_REQ#117,19

PCI_AD3117,22,23,26
PCI_AD2917,22,23,26

PCI_AD2717,22,23,26
PCI_AD2517,22,23,26

IDSEL : AD22

PCI_C/BE#317,22,23,26

PCI_AD2317,22,23,26
PCI_AD2117,22,23,26

PCI_AD1917,22,23,26
PCI_AD1717,22,23,26

PCI_C/BE#217,22,23,26

PCI_IRDY#17,19,22,23,26

PM_CLKRUN#17,19,22,23,29,31

PCI_SERR#17,19,22,23
PCI_PERR#17,19,22,23

PCI_C/BE#117,22,23,26

PCI_AD1417,22,23,26
PCI_AD1217,22,23,26

PCI_AD1017,22,23,26

PCI_AD817,22,23,26
PCI_AD717,22,23,26

PCI_AD517,22,23,26
PCI_AD317,22,23,26

+5V_SW

PCI_AD117,22,23,26

MD_SYNC26

MD_BITCLK26

MOD_AUDIO_MON26

MOD_MIC26

MODEM_RI#32

+5V_SW

INT_PIRQD#

W=40mils

PCI_REQ#4
CLK_MINIPCI
PCI_REQ#1
PCI_AD31

PCI_AD29
PCI_AD27

PCI_AD25
PCI_AD22
PCI_C/BE#3
PCI_AD23

PCI_AD21
PCI_AD19

PCI_AD17
PCI_C/BE#2 PCI_AD16
PCI_IRDY#

PM_CLKRUN#
PCI_SERR#

PCI_PERR#
PCI_C/BE#1
PCI_AD14

PCI_AD12
PCI_AD10

PCI_AD8
PCI_AD7

PCI_AD5
PCI_AD3

W=30mils

PCI_AD1

MOD_AUDIO_MON

LED1_GRNN LED2_YELN

1 2

R481 0

1 2

R494 100

W=30mils W=40mils

JP31

KEY KEY

3 4

34

5 6

56

7 8

78

9 10

910

11 12

11 12

13 14

13 14

15 16

15 16

17 18

17 18

19 20

19 20

21 22

21 22

23 24

23 24

25 26

25 26

27 28

27 28

29 30

29 30

31 32

31 32

33 34

33 34

35 36

35 36

37 38

37 38

39 40

39 40

41 42

41 42

43 44

43 44

45 46

45 46

47 48

47 48

49 50

49 50

51 52

51 52

53 54

53 54

55 56

55 56

57 58

57 58

59 60

59 60

61 62

61 62

63 64

63 64

65 66

65 66

67 68

67 68

69 70

69 70

71 72

71 72

73 74

73 74

75 76

75 76

77 78

77 78

79 80

79 80

81 82

81 82

83 84

83 84

85 86

85 86

87 88

87 88

89 90

89 90

91 92

91 92

93 94

93 94

95 96

95 96

97 98

97 98

99 100

99 100

101 102

101 102

103 104

103 104

105 106

105 106

107 108

107 108

109 110

109 110

111 112

111 112

113 114

113 114

115 116

115 116

117 118

117 118

119 120

119 120

121 122

121 122

123 124

123 124

127 128

127 128

Mini-PCI SLOT

LAN RESERVED

W=30mils

1 2

R486 0

W=40mils

W=40mils

1 2

R471 100

MOD_AUDIO_MON

LED2_YELN 25LED1_GRNN25

INT_PIRQC#
PCI_GNT#4

MINI_RST#
PCI_GNT#1
MDM_PME#

LAN_PME#
PCI_AD30

PCI_AD28
PCI_AD26
PCI_AD24
PCI_AD18

PCI_AD22
PCI_AD20
PCI_PAR
PCI_AD18

PCI_FRAME#
PCI_TRDY#
PCI_STOP#

PCI_DEVSEL#
PCI_AD15

PCI_AD13
PCI_AD11

PCI_AD9
PCI_C/BE#0

PCI_AD6
PCI_AD4
PCI_AD2
PCI_AD0

+5V_SW
INT_PIRQC# 17,19

+3VAUX

PCI_GNT#1 17
MDM_PME# 30

LAN_PME# 30
PCI_AD30 17,22,23,26

PCI_AD28 17,22,23,26
PCI_AD26 17,22,23,26
PCI_AD24 17,22,23,26

IDSEL : AD18

PCI_AD22 17,22,23,26
PCI_AD20 17,22,23,26
PCI_PAR 17,19,22,23,26
PCI_AD18 17,22,23,26
PCI_AD16 17,22,23,26

PCI_FRAME# 17,19,22,23,26
PCI_TRDY# 17,19,22,23,26
PCI_STOP# 17,19,22,23,26

PCI_DEVSEL# 17,19,22,23,26
PCI_AD15 17,22,23,26

PCI_AD13 17,22,23,26
PCI_AD11 17,22,23,26

PCI_AD9 17,22,23,26
PCI_C/BE#0 17,22,23,26

PCI_AD6 17,22,23,26
PCI_AD4 17,22,23,26
PCI_AD2 17,22,23,26
PCI_AD0 17,22,23,26

MD_SDATAO 26MD_SDATAI26
MD_RST# 26

+3VAUX

R477 0

12

C745
100PF

12

12

C752
1000PF

PCI_RST# 9,15,17,21,22,23,26,29,31

R524

1 2

0_1206

+3V_SW

4.7UF_10V_0805

4.7UF_10V_0805

4.7UF_10V_0805

1UF_0603

+5V_SW

C730

+

+3V_SW

C739

+

+3VAUX

C740

+

C741

EN_WOL#29

12

12

C731
.1UF

12

12

12

12

C729
.1UF

C743
.1UF

12

12

S

C727
1000PF

12

C698
.1UF

C728
1000PF

Q57
SI2301DS

G

2

D

13

12

C699
1000PF

12

C706

+

4.7UF_10V_0805

12

C725
1UF_0603

4 4

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

37 45Monday, September 10, 2001

E

of

0A

A

B

C

D

E

+3V_ALW TO +3V Transfer

+3V_ALW

U3

8

D

7

D

6

D

5

1 1

D

12

SI4800

C36

4.7UF_10V_0805

SYSON#

+3V

1

S

2

S

3

S
G

2

R14

G

SYSON_ALW

4

12

C57
.01UF_25V_0805

470

13

D

Q34
2N7002

S

13

D

S

R25

1 2

100K

SYSON#

2

G

Q9
2N7002

+12V_ALW

12

C376
1UF_0603

SYSON_ALW

12

C381

4.7UF_10V_0805

12

C384

4.7UF_10V_0805

SYSON_ALW

+3V_ALW TO +3V_SW Transfer

+3V_ALW

U5

8
7
6
5

12

2 2

SI4800

C37

4.7UF_10V_0805

SUSP SUSP SUSP

+3V_SW

1

S

D

2

S

D

3

S

D

G

D

2
Q7
2N7002

R265

G

+5VS_GATE

4

12

12

C38

.1UF_25V_0805

470

13

D

S

13

D

S

R15

1 2

100K

2

G

Q6

2N7002

+12V_ALW

12

C40
1UF_0603

12

C44

4.7UF_10V_0805

12

C45

4.7UF_10V_0805

+5V_ALW TO +5V_SW Transfer

+5V_ALW

U45

8
7
6
5

12

SI4800

C694

3 3

4 4

4.7UF_10V_0805

SUSP

+5V_SW

1

S

D

2

S

D

3

S

D
D

+5VS_GATE

4

G

R496
470

13

D

Q55

2

G

2N7002

S

+12V_ALW TO +12V_SW Transfer

12

C150
.1UF

EC_SUSP#

2

2N7002

A

+12V_ALW

Q19

G

12

12

13

D

S

R97
100K

2

R98
51K

12

C708
1UF_0603

+12V_ALW

G

1 3

12

12

C693

4.7UF_10V_0805

S

Q15

NDS352P

D

C144

4.7UF_25V_1206

12

13

D

S

12

C701

4.7UF_10V_0805

+12V_SW

R92
100

Q14

SUSP

2

G

2N7002

B

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

+1.5V TO +1.5V_SW Transfer

+1.5V_ALW +1.5V_SW

U7

D
D
D
D

SI4800

SUSP

1

S

2

S

3

S

G

+5VS_GATE

4

12

R45
470

13

D

Q13

2

2N7002

G

S

8
7
6
5

12

C71

4.7UF_10V_0805

+1.8V_ALW TO +1.8V_SW Transfer

+1.8V_ALW

12

8
7
6
5

C26

4.7UF_10V_0805

U2

D
D
D
D

SI4800

S
S
S
G

+1.8V_SW

1
2
3
4

2

G

12

13

D

S

R12
470

Q5
2N7002

+5VS_GATE

RTC Batt. Connect or

21

W=30mils

+RTC_BATT

12

+3V_SW

2

G

12

13

D

S

R470
@10K

Q51
@2N7002

D33
RB751V

+RTCVCC

D32 RB751V

ACIN18,29,40

C

BATT1

-+

RTCBATT

Place near ICH3-M

12

C68
1UF_0603

12

C33
1UF_0603

RTCVREF

21

W=30mils

ACIN_SYS#

W=30mils

12

R514

200_0805

12

C70

4.7UF_10V_0805

12

C15

4.7UF_10V_0805

D

12

C69

4.7UF_10V_0805

12

C32

4.7UF_10V_0805

+3V_ALW

12

R402

100K

SUSP

13

D

G

G

S

+3V_ALW

12

13

D

S

R398

100K

Q46
2N7002

SYSON#

Q44
2N7002

E

EC_SUSP#

EC_SUSP#29,32,39

SYSON29

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

2

2

SUSP 26

38 45Monday, September 10, 2001

of

0A

A

1 1

B

C

D

E

B+

PR6

0.015_2512

+

47UF_D_6.3V

PL2

PC17

P6

B++

PC3

0.1UF_0805_25V

876

5

876

5

DDD

SSG

S

134

2

D

SI4800

PQ2

DDD

SSG

S

134

2

PQ3

D

SI4800

PC10

0.1UF_0805_25V

PR3

0

P5

PC12

PC107

47PF_0603

1 2

@1000PF

PR7

EC_SUSP#29,32,38

1M
PR139

+

PR140

3.65K_1%

PR141
10K_1%

PC109

100PF_0603

PR126

10

SHDN# 41

5%

PC102

0.1UF_0603_25V

PZD4
UDZ5.6B

2 1

PR127
100K
5%

PR8
10K

25

BST3

27

DH3

26

LX3

24

DL3

1

CSH3

2

CSL3

3

FB3

10

SKIP#

23

SHDN#

7

TIME/ON5

28

RUN/ON3

PC104

0.47UF_0603_16V

PR1
10

VL

22

V+

PU1

MAX1632

GND

8

MAINPWON 35

DAP202U

PD3

PC5

0.1UF_0805_25V

21

12OUT

VL

VDD

BST5

DH5

LX5

DL5
PGND
CSH5

CSL5

FB5

SEQ
REF

SYNC

RST#

VREF

2

4
5
18
16
17
19
20
14
13
12
15
9
6
11

3

1

PC4

4.7UF_1206_16V

PR4

0

PC20

4.7UF_1206_10V

B+

PL1

FBJ3216HS800

PC6

0.1UF_0805_25V

2 2

PC7

4.7UF_1210_25V

PC8

4.7UF_1210_25V

25V

SDT-1205P-100-120

+3VALWP

12

PD5

3 3

RB161L-40

47UF_D_6.3V

PC15

+12VALWP

PC1

4.7UF_1206_25V

PC11

0.1UF_0805_25V

PQ4
SI4800

876

5

DDD

D

SSG

S

134

2

B++

PC13
22UF_1812_25V

PC108

47PF_0603

PR142
2M

PC110

100PF_0603

PC9

470PF_0805_100V

PR2

22_1206

P7 P8

PQ5

SI4800

PR143
10K_1%

PR144
10K_1%

PC2

4.7UF_1210_16V

12

PD4

EC11FS2

4

2

PT1 10UH_SDT-1205P-100-120

1

3

P9

876

5

DDD

D

SSG

S

134

2

PC19

PC18

+

47UF_D_6.3V

47UF_D_6.3V

PR5

0.015_2512
1W

+

PC116

0.1UF_0805_25V

PC117

0.22UF_0805_16V

12

PD6
RB161L-40

+5VALWP

VL

PR133 47K

4 4

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

39 45Monday, September 10, 2001

E

of

0A

A

B

C

D

E

PR12
1K_1%

BATT_TEMP

+5VALWP

+3VALWP

PR11
100K

3

2

@BAS40-04

3

2

VMB

PD8

PD9

@BAS40-04

PF1

PR119
0_1206

PR14

25.5K_1%

1

PR15
1K

PC22

0.01UF

5A

PR13 1K_1%

PC23
1000PF

TS
SLD
SLC

PCN1

1
2
3
4
5
6
789

BATT CONN.

1

PR18

200

1 1

LI/NIMH#29,41

+3VALWP

3

1

VIN

PCN2

1

3

3

2

DC JACK

2 2

PD11

BYS10-45

1

12

2

PC28

1000PF

PC29

0.01UF_0805_25V

PL3

FBJ3216HS800

PC30

1000PF

PC31

0.01UF_0805_25V

PD7
@BAS40-04

BATT_TEMP29

2

EC_SMD_129,30

+5VALWP

3

1

2

PD10

@BAS40-04

PR21

200

EC_SMC_129,30

LI-ION OVP 14.5V
NI-MH OVP 17.29V

PD12
@1SS355

12

PU11B

84

LM393

5

+

7

6

-

PC34
@1UF_1206

25V

PC35
@1000P

PR28

@1UF_0805_16V

3
2

PR151
100K

P1

P1

PR146

1M_1%

PU14A

84

LM393

+

1

-

RTCVREF

PR25

10K

PD13
UDZ3.6B

21

PR147

10K

PR40
10K

ACIN 18,29,38

PACIN 41

OVP#41

PR26
@39K

PR33

PR38
@100K

@324K 1%

1

2

3

PQ7
@2N7002

3 3

VIN

PC111

0.1UF_25V_0805

PR145

110K_1%

PR148

PC112

1000PF

PR150

32.4K_1%

22K

PC113

0.22UF_0805_16V

@0

PR34
@100K

1%

VREF

PC33

VMB

PR24

@1M_1%

PR35

@208.33K_1%

PR27

@895.12K_1%
PR29

@1M

PR36

@1M

1
3

PQ8

@2N7002

2

NIMH/LI# 41

4 4

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

40 45Monday, September 10, 2001

E

of

0A

A

ADAPTER CURRENT 2.9A

P1

VIN

PR45
10K

1 1

2 2

3 3

PQ9

8

D

7

D

6

D

5

D

SI4835

S
S
S
G

PQ13

2N7002

ACOFF29

P2

1
2

PR44

3
4

200K

PR47
150K

PACIN40

1

2

3

2

PC118
1000PF

100K

100K

PR42

@0

8

D

7

D

6

D

5

D

PR152

0@47K

PQ14
DTC115EK

0.02_2512

PR61

1.2K_0.5%

2

PQ11

1

S

2

S

3

S

4

G

SI4435

PD27

1SS355

1 2

13

TRICKLE29

B

1

PQ16

3

2N7002

B+

PC38
@100P

VIN

PR49
47K

PR56

10K_1%

PR60

16.9K 1%

PC51

0.1UF_0805_25V

2

PQ10
1
2
3
4

S

S

S

G

SI4435

1

PQ15

3

2N7002

8

D

7

D

6

D

5

D

OVP# 40

PC47

0.1UF

PC41

4.7UF_1210_25V

PR54

27K_1%

PR58

24.9K_1%

PR64

10K_1%

PC42

4.7UF_1210_25V

PR53

PR55

10K

PC48

2200PF_0603_50V

PR43

1W

10K

PC46
4700PF_0603_50V

PR62

10K

C

PC43

0.1UF_0805_25V

PR57

10K

1
2
3
4

PQ12

S
S
S
G

FDS4435

10

11

12

D
D
D
D

PU5

1

-INC2

2

OUTC2

3

+INE2

4

-INE2

5

FB2

6

VREF

7

FB1

8

-INE1

9

+INE1

OUTC1

OUTD

-INC1

MB3878

P3

PL5

8
7

1 2
6
5

22UH_SPC-1207P-220

12

PD14

RB051L-40

PR50

4.7

+INC2

GND

CS

VCC(o)

OUT

VH

VCC

RT

-INE3

FB3

CTL

+INC1

12

PD29

RB051L-40

24

23

22

21

20

19

Add by CT at
5/3

18

17

16

15

14

13

P4

B+

PR510PR52

PR59

68K

PR63

324K_1%

D

PR46

0.02_2512
1W

Modify by CT at 2/25

@0

PC44
2200PF

PC45

0.1UF

PC49

0.1UF_0805_25V

PC50

1500PF

E

VMB

PC40

4.7UF_1210_25V

FSTCHG29

TRICKLE

PD16

PD17

1SS355

1SS355

1 2

1 2

PR65
47K

PC106
22UF_1812_25V

CV:LI-ION 13.241V

NI-MH 16.202V

CC: 2.87A LI-ION FAST

CC: 2A NI-MH FAST
CC: 0.273A LI-ION TRICKLE
CC: 0.265A NI-MH TRICKLE

CHGRTCP

PU6

S-81235SG

1

1

2

2

PR70

200_0805

PC54

1UF_0805_25V

2 1

PZD2
RLZ16B

PD18
RB751V

CHGRTCP

2 1

2 1

PZD1
RLZ6.2C

1 2

PR72
22K

PR71
100K

PQ18

TP0610T

12

12

PC53

0.22UF_1206_25V

VMB

EC_PWR_ON#33,34,36

4 4

PD19

RLS4148

2

P1

21

13

SHDN# 39

NIMH/LI#40

PC52

0.1UF

2N7002

PR66

69.8K_0.5%

PQ17

PR67

PR68

13

215K_0.5%

PR69

2

100K

13

100K

100K

PQ19

DTC115EK

2

+5VALWP

RTCVREF

LI/NIMH# 29,40

150K_0.5%

3

PC55
10UF_1206_10V

3

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

41 45Monday, September 10, 2001

E

of

0A

A

1 1

CPU_VID47
CPU_VID37
CPU_VID27
CPU_VID17
CPU_VID07

+3V_SW

A

PC86

0.1UF_0805

12

PR90
10K

+5VALWP

12

PR134
30K_1%

12

PR135
20K_1%

PC82

4.7UF_1206_16V

VIN3

1.2VILIM

2.0VREF

15
18
17
10

3
6
2
7

16

PU10

VCC
SKIP
V+
PGOOD
SHDN
ILIM
N/C
REF
TON

MAX1714A

PR99

10

51K
PR91

PC75

4.7UF_1206_16V

PC78
1U

PR94

24.9K

PR95

27.4K

14

VDD

19

BST

1

DH

20

LX

13

DL

12

PGND

11

N/C

9

N/C

5

OUT

48

FBAGND

12

PC77
470PF_0603

+5VALWP

1.5VBST

2 2

VGATE17,34

PC105

@0.1UF_0603

PD26
RB751V

PR108
15K

1 2

PR136 @0

1 2

PR107

12

10K

VR_ON29

3 3

VTT_PWRGD5

VTT_ON29

4 4

B

B+

PL6

FBJ3216HS800
PC61

4.7UF_1210_25V

1 2

PU8 MAX1718

21

D4

22

D3

23

D2

24

D1

25

D0

14

VGATE

3

TIME

2

SDN/SKIP

17

VDD

6

CC

20

OVP

11

REF

12

ILIM

15 10

GND TON

21

PD22
1SS355

PR138

2.2

1.5VLX

1.5VDL

PC89
150PF_0603

B

4.7UF_1210_25V

PR79
10

PC83

4.7UF_1206_16V

PC84

0.1UF_0805

12

PC90
1UF_0805

PC62

BST

VCC

POS
NEG

ZMODE

SUS

4.7UF_1210_25V

27

LX

28

DH

26
16

DL

1

V+

9
4

FB

13
5
19
18
8

S1

7

S0

4
3
2
1

1.25VFB

4.7UF_1210_25V

PC63

1 2

1 2

PC79

0.1UF_0805

PQ26
FDS6982S

PR87

2.2

PR154

2.2

PC64

+5VALWP

PR81
20

PC80

4.7U/25V

1 2

PC74

4.7UF_1206

5
6
7
8

21

VIN2

VIN3

PC65

4.7UF_1210_25V

PD20
1SS355

PC69

0.1UF_0805

PC72

0.1UF_0805

PL8

FBJ3216HS800

PL9

SDT-1205P-100-120

PD23

@EC10QS04

2 1

C

VIN2

578

578

PC73
@.01U/16V

PC85
220U/2.5V

C

PC115

1000PF_0603

PQ24
SI4404

PD28

RB051L-40

PU9

1

NO2

2

NO3

3

NO1

4

INH

5 6

GND ADDB

PR101

61.9K

OFFSET
0mV

-56mV

-51mV

-16mV

-1.8mV

PC88

D

1.0UH

PL11

PL7

HK-RM136-20A0R8

2 1

1 2

PC76
1000PF_0603

V+

COM

NO0

ADDA

MAX4524

RBOTTOM

X

16.2K

19.6K

61.9K
604K

D

P+ P- 43

12

PR85

12

2mR

PR88
@0

PC70

PR92

100

10
9
8
7

+3VALWP

PR97

10K

Vout(0A)

0.850

1.094

1.199

1.134

1.248

220UF_D_4V

PC103

0.1UF_0805

1 2

PR1290

12

PR93

PR131 1K_1%

1K

PM_SSMUXSEL7,17

1 2

13

PQ25
2N3904

2

PR104
10K

1 2

H_DPSLP#5,17

ADDA

ADDB

X

X

1

0

1

1

0

0

0

1

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

220UF_D_4V

+

1

D3

0

0

0

0

0

0

0

0

1

1

1

1

1

1

1

1

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

PC114

3 6

241

PQ23
SI4404

241

PR103

16.2K

1 2

+VTTP +VTTP

0.1U_0603

PQ21
IR7811A

578

3 6

241

PM_DPRSLPVR 7,17

PR102

19.6K

1 2

1 2

MODE
DEEPER SLEEP
BATTEY SLEEP
PERFORMANCE SLEEP
BATTERY MODE
PERFORMANCE MODE

PC87

0.1UF_0805

0.01UF_0603

578

PQ20
IR7811A

3 6

241

VTTLX

PQ22
SI4404

3 6

241

B+

PC81

4.7U/25V

+

+VTTP

578

3 6

PR100
604K

1 2

PR106
3K/F

PR109
12K/F

+VCC_H_COREP

+

+5VALWP

PC71

5

PU13

+

-

2

12

D1

0

0

0

0

1

0

1

0

1

0

1

0

1

1

1

1

0

0

0

0

1

0

1

0

1

0

1

0

1

1

1 0.600

1

E

3
4

MAX4322

E

PR128 510

PR130 1K_1%

D0D2

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

OUTPUT

D4 = 1

0.975

0.950

0.925

0.900

0.875

0.850

0.825

0.800

0.775

0.750

0.725

0.700

0.675

0.650

0.625

42 45Monday, September 10, 2001

P+

P- 43

12
12

VOLTS

D4 = 0

1.75

1.70

1.65

1.60

1.55

1.50

1.45

1.40

1.35

1.30

1.25

1.20

1.15

1.10

1.05

1.00

0A

of

A

B

C

D

E

PR114

5.1K

5

D

2

47UF_D_6.3V

+5VALWP

876

PQ30

DDD

SSG

S

134

+

SI4800

PC97

+1.5VALWP

PC91

0.1UF_0805_25V
1 2

PD24

RB751V

PR112

2.2K

PC92
1000PF

PQ29

2SA1036K

6

52

D

PR110

47K

1

2

3

PQ28

2SC2411K

SI3443DV

PQ27

DD

D

GS

1

3 4

PL10

5UH_SPC1002

1 2

+

PC94
47UF_D_6.3V

2 1

PD25

RB060L-40

+1.8VALWP

JOPEN11

1 2

3MM

JOPEN2

+VTTP

1 2

3MM

JOPEN3

1 2

3MM

JOPEN12

+5VALWP +5V_ALW

+5VALWP

+3VALWP

+VCC_H_COREP

+VCC_H_COREP +VCC_H_CORE

+12VALWP +12V_ALW

+1.5VALWP

+1.8VALWP

1 2

3MM
JOPEN4

1 2

3MM
JOPEN5

1 2

3MM
JOPEN6

1 2

3MM
JOPEN7

1 2

3MM

JOPEN8

1 2

2MM
JOPEN9

1 2

2MM
JOPEN10

1 2

3MM

+VTT+VTTP

+VTT

+VTT+VTTP

+5V_ALW

+3V_ALW

+VCC_H_CORE

+1.5V_ALW

+1.8V_ALW

80mil

1 1

PC93

0.047UF

2 2

VREF

PR111
105K_1%

PR113
270K_1%

VREF

+5VALWP

3
2

PU11A

84

LM393

+

1

-

+12VALWP

PR115

100K_1%

PR116

100K_1%

PR118
15K_1%

3 3

84

3

+

2

-

PR117 3K_1%

PU12A
LM358

1

1000PF_0603_50V

PC95

PC96

0.1UF_0805_25V

4 4

Compal Electronics, inc.

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE

A

B

USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

C

D

SCHEMATIC, M/B LA-1012

Size Document Number Rev
Custom

401200

Date: Sheet

43 45Monday, September 10, 2001

E

of

0A

5

4

3

2

1

Power PIR

Item

D D

C C

Fixed Issue Reason for change Page PhaseMB_Ver.Modify item

B B

A A

Title

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

5

4

3

Size Document Number Rev

Date: Sheet

Compal Electronics, inc.

SCHEMATIC, M/B LA-1012

A

401200

2

0A

44 45Monday, September 10, 2001

of

1

N32N101 LA-1012 Rev0.1 HISTORY LIST (PIR)

For C-Test 08/16/2001 Rev:0.1

Date Page Description

08/16

Schematic based on N32N101 LA-1011 C-Test.

PageDate Description

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS,INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION . THIS SHEET MAY NOT BE TRANSFERRED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS,INC. NEITHER THIS SHEET NOR THE INFORMATION CONTAINS MAY BE
USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS,INC.

Compal Electronics, inc.

Title

SCHEMATIC, M/B LA-1012

Size Document Number Rev

401200

Date: Sheet of

45 45Monday, September 10, 2001

0A