• Built-in variable resistors (+14 to –16% 2% steps) for adjusting tracking error EF balance
• Built-in variable resistors (–8 to +8dB 4dB steps) for rough adjusting tracking gain
• Built-in variable resistors (–8 to +8dB 4dB steps) for rough adjusting focus gain
• Built-in focus offset insertion cir cuit (–0.7 to +0.7V in 0.1V steps)
• RF amplifier frequency characteristics 30MHz (–3dB) in case of peaking off
• High-speed access support (The mirror circuit internal time constant can be switched between normal,4× and 8× modes.)
• Support for CD-RW playback
• Few external components
• Available to set the stand-by mode
• FP-28TB package
HA12220F
Block Diagram
RF2
1
RF3
2
RF4
3
GND
28
RF1
27
V
CC
BIAS
EQ
–
+
26
RFS
–
+
0.1µ
BYPS
FE
10µ
+
25
+
–
–
+
FSA
FVR2
GND23
VCFRFC
VCB
FOK
+
–
FA2
+
–
Offset
1µ
+
24
AGC
Gain changing
Gain=12dB Typ
FA
+
–
FVR
0.1µ
AGCF
HD49250
22
AGCO
0.015µ
21
DFH
DEFECT
MIRR
DFT
MIRH
MIRR
FOK
20
HD49250
19
0.033µ
18
HD49250
GND
17
HD49250
TR1
APC
+
+
–
BAL
+
–
–
TR2
LD
7
TVR
TVR
TE
8
HD49250
HD49250
TR1
4
TR2
5
MD
6
Rev.1, Apr. 1997, page 2 of 20
FE
TA
11
+
CO
–
100µ
+
–
XLT
DATA
16
HD49250
15
HD49250
VC
IIL
Interface
12131410
XRST
+
µ-COM
CLK
HD49250
TE
+
TLPF
–
9
CI
µ-COM
ADC
+
TVR2
–
Gain=8dB Typ
BUF
GND
µ-COM
DAC
HA12220F
Pin Description and Equivalent Circuit
Pin No.Pin NameEquivalent CircuitFunction
1RF2
28
12k
120k
160k
12k
1
120k
160k
12k
2
120k
160k
12k
3
120k
160k
5p
10p
4k
600k
160k
160k
10p
2RF3RF FE FSA amplifier input3
3RF4RF FE FSA amplifier input4
28RF1RF FE FSA amplifier input1
4TR1
4k
1.2p
RF FE FSA amplifier input2
TR1 amplifier input
5TR2
6MD
7LD
8TE
150k
4k
32k80k
40k11.4k
1.2p
32k80k
40k11.4k
4k
1k
40k
TR2 amplifier input
APC amplifier input
APC amplifier output
Tracking error signal output
9FEFocus error signal output
Rev.1, Apr. 1997, page 3 of 20
HA12220F
Pin Description and Equivalent Circuit (cont)
Pin No.Pin NameEquivalent CircuitFunction
10CI
2.5k
FSA amplifier output monitor
11CO
12VC
13XRST
10k
20k
4k
Setting FOK reference voltage
Reference voltage output
Reset input
14CLKSerial data synchronous clock
input
15DATASerial data input
16XLTSerial data latch input
V
20k
10k
CC
V
CC
FOK detection signal output
Mirror detection signal output
17FOK
18MIRR
19MIRH
20DFT
Rev.1, Apr. 1997, page 4 of 20
100k
20k
Mirror envelope hold signal
output
V
CC
Defect detection signal output
Pin Description and Equivalent Circuit (cont)
Pin No.Pin NameEquivalent CircuitFunction
21DFH
Defect envelope hold signal
output
HA12220F
22AGCO
23AGCF
24RFC
25VCF
26BYPS
5k5k
100k4k
2k4k
20k
AGC amplifier output
Capacitor connection for AGC
Capacitor connection for AGC
V
CC
40k
4k
40k
GND
V
CC
Capacitor connection for
reference voltage ripple filter
Capacitor connection for ripple
filter
27V
CC
—V
CC
Rev.1, Apr. 1997, page 5 of 20
HA12220F
Operation
Control by Serial Data
The IC’s internal switches can be operated by sending control data from the HD49250.
The signal timing is shown in figure 1, and the control commands are listed in table 1 and 2.
DATA
Pin 15
Pin 14
CLK
01234567
T1
T2
Pin 16
XLT
Item
Clock frequency
Clock pulse width
Delay time
Latch pulse width
Symbol
f
CLK
T1, T2
T3
T4
T3
MinTypMaxUnit
—
—
520
—
0.96
1
2
—
—
—
—
—
T4
kHz
µs
µs
µs
Figure 1 Timing Diagram for Serial Data Control
Signals from the HD49250 are input at pins 14 to 16. Pin13 is connected to the microcomputer.
A low input at the XRST pin resets the IC. Normally this pin should be kept high.
The serial data from the HD49250 switches the followin g settings.