Non-inverted output for CH2
Supply terminal of output stage for CH2
Inverted output for CH2
Power GND
Power GND
Inverted output for CH3
Supply terminal of output stage for CH3
Non-inverted output for CH3
Input for CH3
Supply terminal of small signal GND
Small signal GND
Input for CH4
Non-inverted output for CH4
Supply terminal of output stage for CH4
Inverted output for CH4
Power GND
Page 3
TUNER ADJUSTMENTS
16
17
18
FEO
FEN
SEB
19VRO
20RFRP
21BTC
22RFCT
23PKC
24RFRPIN
25RFGO
26GVSW
27AGCIN
28RFO
29GND
30RFN2
15
14
13
SBAD
TEO
TEN
12 2VRO
11 TEB
10 SEL
9 LDO
8 MDI
7 TNI
6 TPI
5 FPI
4 FNI
3 GMAD
2 RFGC
1 Vcc
AGC Amp.
BOTTOM
PEAK
3 STATE
DET.
I-I
I-I
10pF
15pF
40pF
15pF
3pF
10pF
3pF
36pF
40pF
SW1
SW3
SW2
IC BLOCK DIAGRAM & DESCRIPTION
IC801 TA2153FN (RF AMP)
- 2 -
Page 4
WIRING CONNECTION
- 3 -
Page 5
EXPLODED VIEW( CABINET & C HASSIS)
59
61
62
65
63
64
60
66
- 4 -
Page 6
PARTS LIST
PRODUCT SAFETY NOTICE
EACH PRECAUTION IN THIS MANUAL SHOULD BE FOLLOWED DURING SERVICING. COMPONENTS IDENTIFIED WITH
!!
!
THE IEC SYMBOL
CAN OF SPECIAL SIGNIFICANCE. WHEN REPLACING A COMPONENT IDENTIFIED , USE ONLY THE REPLACEMENT
PARTS DESIGNATED , OR PA RT S WITH THE SAM E RATING S O F RE SIST ANCE , WATT AG E OR VO LTAGE THA T AR E
DESIGNATED IN THE PARTS LIST IN THIS MANUAL. LEAKAGE-CURRENT OR RESISTANCE MEASUREMENTS MUST
BE MADE TO DETER MINE THAT EXPOSED PARTS A RE ACCEPTA BLY INSULA TED FROM TH E SUPPLY C IRCUIT
BEFORE RETURNING THE PRODUCT TO THE CUSTOMER.
CAUTION :Regular type resistors and capacitors are not listed. To know those values, refer to the schematic diagram.
IN THE PA RTS LIST AND THE SCHEMATIC DIAGRAM DESIGNATE COMPONENTS IN WHICH SAFETY
Regular type resistors are less than 1/4W carbon type and 0 ohm chip resistors.
Regular type capacitors are less than 50V and less than 1000µF of Ceramic type and Electrolytic type.
TO CLOSE SW LEAF
CN818645 063 2464 2P CONNECTOR,TO MTR BD RB818
D8001645 063 2662 IC TL431,VOLT. REGULATOR
D8002645 063 2662 IC TL431,VOLT. REGULATOR
D8005645 060 4775 DIODE 1N4148
D8006645 060 4775 DIODE 1N4148
I8001645 063 2402 IC TC94A02F-005,
IC8001 CMOS DIGITAL IC
I8002645 063 2426 IC TC74HC14AFN,IC8002
I8003645 063 2419 IC UT621024SC-70LL,IC8003
I8004645 063 2389 IC REG1117,IC8004
IC801645 063 2396 IC TA2153FN,
RF AMP DIGIT.SERV CD
IC802645 060 5031 IC TC9462F,
(Note) Mark terminals are not existence in TC9256P, TC9256F.
Terminal name of TC9256P, TC9256F is shown in parentheses.
Others are common terminals.
1/ 2
H
OSC
CIRCUIT
HFFM
AGC QUAD R-OUT L-OUT
GND
TC9256P, TC9256F
3
4
7
8
Top View
DIP-16PIN / SOP-16PIN
2 MODULUS
PRESCALER
MODE LFFM
REFERENCE COUNTER
1ms
OSC
8
ADDRESS
DECODER
OUTPUT PORT
OT-1 OT-3
OT-2 OT-4
TEST
4
FM
IN1
IN2
IN
IN
DD
PERIOD18I/O-7/SC
CLOCK17I/O-8/IF
I/O-5/CLKI/O-6
PSC
4bit SWALLOW
COUNTER
12bit PROGRAMMABLE COUNTER
4
12
15
24bit REGISTER
24bit SHIFT REGISTER
2422
10
24bit REGISTER
4
20bit BINARY COUNTER
UNIVERSAL COUNTER CONTROL
OT-4
XT
1ms
- 8 -
TC9257P, TC9257F
XT20DO21
XT19DO12
3
4
DATA16I/O-9/IF
5
OT-115GND6
7
OT-214FM
OT-313 AM
8
OT-4V
Top View
DIP-20PIN / SOP-20PIN
DD
POWER ON
RESET
RESET
PHASE
MAX
4
UNLOCK
5
GATE
IN
IN
DD
129
1110
GNDV
TRI-ST ATE
BUFFER
TRI-ST ATE
BUFFER
COMP ARATOR
OT-4
5
IN
IN1
IN2
I/O PORT
AMP
AMP
DO1
DO2
(DO2 / OT-4)
I / O-5 / CLK
I / O-6
IN2
I / O-9 / IF
(I / O-6 / IF
I / O-8 / IF
IN1
(I / O-5 / IF
I / O-7 / SC
IN2
)
IN1
)
IN
Page 10
IC BLOCK DIAGRAM & DESCRIPTION
IC804 TA7291S (Bridge Driver)
IC401 TDA7440D (VOLUME TONE CTL)IC8002 TC74HC14AFN (Gate)
PIN FUNCTION
Vcc
7 / 2 / 1 1 4 / 8 / 5
5 / 9 / 76 / 1 / 91 / 5 / 1
Vref
REG
PROTECTOR
CIRCUIT
(TSD)
IN2GNDIN1
8 / 6 / 15
2 / 7 / 4
10 / 3 / 13
TA7291P / TA7291S / TA7291F
VS
OUT1
OUT2
P
7
8
4
1
5
6
2
10
PIN No.
S
2
6
8
5
9
1
7
3
F
11
15
5
1
7
9
4
13
SYMBOL
Vcc
Vs
Vref
GND
IN1
IN2
OUT1
OUT2
FUNCTIONAL DESCRIPTION
Supply voltage terminal for Logic
Supply voltage tarminal for Motor driver
Supply voltage terminal for control
GND terminal
Input terminal
Input terminal
Output terminal
Output terminal
Reset signal input terminal(H:Op eration,L:R eset)Reset(MC
Mode select input for MCU interface (H:I
2
C L:T SB)ì! î
Address output-0 for external SRAMAD0(SRAM
Address output-1 for external SRAMAD1(SRAM
Data input and output for MCU i nterface" I2C# SDA$SDA(MCU)
2
Clock input for MCU interface" I
C# SCL$SCL( MCU)
Address output-2 for external SRAMAD2(SRAM
Digital power supply for interface (3.3V)VDDT (3.3V)
Data output for audio interface
SDO
Address output-3 for external SRAMAD3(SRAM)
Address output-4 for external SRAMAD4(SRAM)
Data input-0 for audio interfaceSDi(CDP)
Bit clock input-A for audio interfaceBCK(CDP )
LR clock input-A for audio interfaceLRCK (CDP)
Address output-5 for external SRAMAD5(SRAM)
Chip enable signal output for external SRAMCE(SRAM)
Enable signal output for external SRAMOE(SRAM)
Digital p ower supply(2.5V )VDD(2 .5V)
Stand-by terminal& (H:ST B, L:Operation)STABY(MCU)
Digital GNDGND
DAC L ch An alo g GNDGND
DAC V ref for L chVR
DAC Lch analog signal outputLO(am
DAC power supply f or L ch(2.5V )V DA(2.5V)
DAC power supply f or Rch(2.5V)V DA(2.5V)
DAC Rch analog signal outputRO(amp)
DAC V ref for RchVR
DAC Rc h Analog GNDGND
Test input (H:Test& L: Normal)ìLî
VCO clo ck selection input(! :VC O& L: X I clock)ìH î
Address output-12 for external SRAMAD12(SRAM)
Address output-11 for external SRAMAD11(SRAM)
Address output-10 for external SRAMAD10(SRAM)
Address output-9 for external SRAMAD9(SRAM)
Digital power supply for interface(3.3V)VDDT (3.3V)
Address output-8 for external SRAMAD8(SRAM)
Address output-7 for external SRAMAD7(SRAM)
Address output-6 for external SRAMAD6(SRAM
Request pin for interrupt host
Digital GND
REQ(MCU)
GND
Address output-13 for external SRAMAD13(SRAM
Address output-14 for external SRAMAD14(SRAM
Write signal output for external SRAMWR(SRA
M)
Address output-16 for external SRAMAD16(SRAM
Address output-15 for external SRAMAD15(SRAM)
Data I/O-0 for external SRAMIo0(SRAM)
Data I/O-1 for external SRAMIo1(SRAM
Digital GND
)
GND
Data I/O-2 for external SRAMIo2(SRAM)
Date I/O-3 for external SRAMIo3(SRAM)
Data I/O-4 for external SRAMIo4(SRAM
Digital power supply(2.5V)VDD(2 .5V
)
)
Data I/O-5 for external SRAMIo5(SRAM)
Data I/O-6 for external SRAMIo6(SRAM)
Data I/O-7 for external SRAMIo7(SRAM
)
GND f or VCO circ uitGND
Phase detector outputPd
o
Controlled voltage input for VCO circuitVcoi
Power supply for VCO circu itVDDP (2.5
V)
16.934Mhz clock output pinCko (CD)
Power supply for cry stal oscillator" 2.5V)VDDX(2 .5V
Crystal oscillato r inputXi(16.934M Hz)
Crystal oscillato r output
Xo
GND f or cr ystal oscillatorGND
)
)
)
)
)
Page 12
BLOCK DIAGRAM
- 11 -
Page 13
SCHEMATI C DIAGRAM (MA IN)
This is a basic schematic diagram.
PRODUCT SAFETY NOTICE
!!
EACH PRECAUTION IN THIS MANUAL SHOULD BE FOLLOWED DURING SERVICING. COMPONENTS IDENTIFIED WITH THE IEC SYMBOL
IN WHICH SAFETY AND PERFORMANCE CAN BE OF SPECIAL SIGNIFICANCE. WHEN REPLACING A COMPONENT IDENTIFIED BY
OF RESISTANCE, WATTAGE OR VOLTAGE THAT ARE DESIGNATED IN THE PARTS LIST IN THIS MANUAL. LEAKAGE-CURRENT OR RESISTANCE MEASUREMENTS MUST BE MADE TO DETERMINE THAT EXPOSED PARTS ARE ACCEPTABLY
INSULATED FROM THE SUPPLY CIRCUIT BEFORE RETURNING THE PRODUCT TO THE CUSTOMER.
!
!!
!
AND MARK IN THE PARTS LIST AND THE SCHEMATIC DIAGRAM DESIGNATED COMPONENTS
AND , USE ONLY THE REPLACEMENT PARTS DESIGNATED, OR PARTS WITH THE SAME RATINGS
- 13 -- 12 -
Page 14
SCHEMATIC DIAGRAM (CD MAIN)
This is a basic schematic diagram.
- 15 -- 14 -
Page 15
WIRING DIAGRAM (MAIN and TACT SW A,B)
MAIN A side
TACT SW A A side
TACT SW A B side
MAIN B side
TACT SW B A side
TACT SW B B side
- 17 -- 16 -
Page 16
WIRING DIAGRAM (CD MAIN)WIRING DIAGRAM (POWER, ANT, KEY, LED 1, LED 2, PHONE and MOTOR)
POWER
ANT
LED 1 A side
LED 1 B side
KEY A side
KEY B side
LED 2
A side
B side
PHONE
MOTOR
- 19 -- 18 -
Page 17
WIRING DIAGRAM (DISPLAY)
A side
B side
- 20 -
Page 18
Jun / '03 BB Printed in Japan
R
SANYO Electric Co., Ltd.
Osaka, Japan
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