Fairchild Semiconductor GTLP6C816APMTCX, GTLP6C816APMTC, GTLP6C816AMTCX, GTLP6C816AMTC Datasheet
© 1999 Fairchild Semiconductor Corporation DS500179 www.fairchildsemi.com
August 1998
Revised August 1999
GTLP6C816A LVTTL-to-GTLP Clock Driver
GTLP6C816A
LVTTL-to-GTLP Clock Driver
General Description
The GTLP6C816A is a clo ck driv er th at pro vide s LVTTL to
GTLP signal level translation (and vice versa). T he device
provides a high speed interface between cards operating at
LVTTL logic levels and a backplane opera ting at GTL(P)
logic levels. High speed backplane operation is a direct
result of GTL(P)’s reduced output swing (<1V), reduced
input threshold levels and outp ut edge rate control. The
edge rate control minimiz es bus settling time. GTLP is a
Fairchild Semiconducto r derivative of the Gunning Transceiver logic (GTL) JEDEC standard JESD8-3.
Fairchild’s GTL(P) has internal edge-rate control and is
process, voltage, and temperature (PVT) compensated. Its
function is similar to BTL and GT L but with different outp ut
levels and receiver threshold. GTLP output LOW level is
typically less than 0. 5V, the output level HIGH is 1.5V and
the receiver threshold is 1.0V.
Features
■ Interface between LVTTL and GTLP logic levels
■ Edge Rate Control to minimize noise on the GTLP port
■ Power up/down high impedance for live insertion
■ 1:6 fanout clock driver for LVTTL port
■ 1:2 fanout clock driver for GTLP port
■ LVTTL compatible driver and control inputs
■ Flow through pinout optimizes PCB layout
■ Open drain on GTLP to support wired-or connection
■ A Port source/sink −24/+24 mA
■ B Port sink 50 mA
■ −40°C to +85°C temperature capability
■ Low voltage version of GTLP6C816
Ordering Code:
Pin Descriptions Connection Diagram
Order Number Package Number Package Description
GTLP6C816AMTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Pin Names Description
TTLIN, GTLPIN Clock Inputs
(LVTTL and GTLP respectively)
OEB
Output Enable (Active LOW)
GTLP Port (LVTTL Levels)
OEA
Output Enable (Active LOW)
TTL Port (LVTTL Levels)
V
CCT
.GNDT TTL Output Supplies
V
CC
Internal Circuitry V
CC
GNDG OBn GTLP Output Grounds
V
REF
Voltage Reference Input
OA0–OA5 TTL Buffered Clock Outputs
OB0–OB1 GTLP Buffered Clock Outputs
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GTLP6C816A
Functional Description
The GTLP6C816A is a clock driver providing LVTTL-to-GTLP clock translation, and GTLP-to-LVTTL clock translation in the
same package. The LVTTL-to-GTLP di rection is a 1: 2 clock driv er path wi th a single E nable pin (OE B
). For the GTLP-to-
LVTTL direction the clock receiver path is a 1:6 buffer with a single Enable control (OEA
). Data polarity is inverting for both
directions.
Truth Tables
Logic Diagram
Inputs Outputs
TTLIN OEB
OBn
HL L
LL H
X H High Z
Inputs Outputs
GTLPIN OEA
OAn
HL L
LL H
X H High Z
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GTLP6C816A
Absolute Maximum Ratings(Note 1) Recommended Operating
Conditions
(Note 3)
Note 1: Absolute Maximum continuous ratings are those values beyond
which damage t o the device ma y occur. Exposure to t hese condition s or
conditions beyon d those indicated m ay adversely affect dev ice reliability.
Functional operation under absolute maximum rated conditions is not
implied.
Note 2: I
o
Absolute Maximum Rating must be observed.
Note 3: Unused inputs must be held High or Low.
Supply Voltage (VCC) −0.5V to +4.6V
DC Input Voltage (V
I
) −0.5V to +4.6V
DC Output Voltage (V
O
)
Outputs 3-STATE −0.5V to +4.6V
Outputs Active (Note 2) −0.5V to +4.6V
DC Output Sink Current into
OA-Port I
OL
48 mA
DC Output Source Current
from OA-Port I
OH
−48 mA
DC Output Sink Current into
OB-Port in the LOW State I
OL
100 mA
DC Input Diode Current (I
IK
)
V
I
< 0V −50 mA
DC Output Diode Current (I
OK
)
V
O
< 0V −50 mA
V
O
> V
CC
+50 mA
ESD Rating > 2000V
Storage Temperature (T
STG
) −65°C to +150°C
Supply Voltage V
CC
3.15V to 3.45V
Bus Termination Voltage (V
TT
)
GTLP 1.47V to 1.53V
GTL 1.14V to 1.26V
V
REF
0.98V to 1.02V
Input Voltage (V
I
) on INA-Port
and Control Pins 0.0V to 3.45V
HIGH Level Output Current (I
OH
)
OA-Port −24 mA
LOW Level Output Current (I
OL
)
OA-Port +24 mA
OB-Port +50 mA
Operating Temperature (T
A
) −40°C to +85°C
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