Dell 1464, 1564, 1764 Schematics

1

2

3

4

5

6

UM3B/UM6B SYSTEM BLOCK DIAGRAM

7

8

A A

THERMAL

SMSC1422

PG 35

CLOCK

SLG8SP585VTR
(QFN-32)

PG 15

Arrandale

DDR3-SODIMM1

RVS Type

DDR3-SODIMM2

B B

RVS Type

PG 13

PG 14

Dual Channel DDR3
800/1066 1.5V

( rPGA 989 )

PG 3,4,5,6

POWER

+1.5V_SUS/+0.75V_DDR_VTT
+1.05V_PCH
+1.05V_VTT

POWER

AC/BATT
CONNECTOR

PG 53

SYSTEM
RESET CIRCUIT

BATT
CHARGER

RUN POWER SW

+3.3V_SUS/+5V_SUS
+5V/+3.3V/+1.8V

PG 47
PG 48
PG 49

CPU VRREGULATOR
DC/DC

+3.3V_ALW/+5V_ALW/
+15V_ALW

PG 42

PG 45

PG 52

PG 51

PG 46

DMI X 4FDI

SATA-ODD

SATA-HDD

PG 32

PG 32

USB conn x 1

PG 31

Bluetooth BTB Conn

C C

BT365

Camera

PG 30

PG 40

SATA

SATA

USB2.0

PCH

USB2.0

(HM55)

USB2.0

IHDA

AUDIO/AMP

ALC269Q-GR

A- MIC
conn

PG 36

D D

1

Audio
SPK conn

PG 36 PG 40

PG 36

DB CONN
PG26

Audio
Jacks x2

DB

USER
INTERFACE

PG 34

2

KBC

ITE8502

SPI PS/2

FLASH
1Mbytes

PG 28

3

LPC

PG 27

PG 7,8,9,10,11,12

SPI

FLASH
4Mbytes

PG 28

17X8

Keyboard

Touchpad

PG 33

4

PG 33

LVDS

TMDS

VGA

PCIE 2.0

PCIE 2.0
USB2.0

PCIE 2.0
USB2.0

USB2.0

USB2.0

LEVEL SHIFTER
PI3VDP411LSZDE

DB CONN

PG26

VER :C3B
PWA:
PWB:

5

USB2.0

USB2.0

PG 23

6

Panel Connector

HDMI CONN.

CRT CONN.

PG 24

PG 23

PG 25

LOM

RTL8103E

MINI-CARD

WLAN

MINI-CARD

WWAN

CARD READER

RTS5159

DB

USB conn x 2

Title

Title

Title

Schematic Block Diagram1

Schematic Block Diagram1

Schematic Block Diagram1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

UM3B/UM6B 1C

UM3B/UM6B 1C

UM3B/UM6B 1C

Date: Sheet of

Date: Sheet of

Date: Sheet of

PG 37

PG 32

PG 31

PG 32

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

7

1 59Wednesday, September 30, 2009

1 59Wednesday, September 30, 2009

1 59Wednesday, September 30, 2009

8

1

2

3

4

5

6

7

8

Table of Contents Power States

PAGE DESCRIPTION

1

Schematic Block Diagram

2

Front Page

3-6

Clarksfield/Auburndale

7-12

PCH

13-14

A A

B B

DDRIII SO-DIMM(204P)

15

Clock Generator

16-22

BLANK PAGE

23

HDMI CONN

24

LCD CONN

25

CRT CONN

26

DB CONN
SIO (ITE8502)

27
28

FLASH / RTC

29

MINI-Card (WWAN)

30

MINI-Card (WLAN\WPAN)

31

USB

32

SATA (HDD & CD_ROM)
TP / KEYBOARD

33
34

PWR SWITCH / /LED

FAN / THERMAL

35

CODEC ALC269

36

LAN(RTL8103M/RJ-45)

37
38

System Reset Circuit
BLANK PAGE

39
40

1.8V_RUN(RT9018/RT9024)

41

Charger (MAX8731)

42

3V/5V (TPS51427A)

43

1.5_DDR/0.75(TPS51116)

44451.05V_PCH(TPS51218)

POWER PLANE

+PWR_SRC
+RTC_CELL

10V~+19V

+3.0V~+3.3V

24,30,45,46,47,48,49,50,51
08,11,29,30

DESCRIPTION

MAIN POWER
RTC

LARGE POWER S0~S537,46,52,53 MAIN POWER+5V+5V_ALW2
+5V_ALW
+3.3V_ALW
+5V_SUS
+3.3V_SUS
+1.5V_SUS
+0.75V_DDR_VTT
+5V_RUN
+3.3V_RUN
+1.8V_RUN
+1.05V_VTT 03,05,10,11,49,60+1.1V
+1.5V_RUN
+5V_HDD

+5V

+5V
+3.3V
+1.5V
+0.75V
+5V
+3.3V
+1.8V

+1.5V
+5V

13,33,44,46,47,48,49,50,51,52
29,30,35,36,37,42,44,45,46,47,51,52,53
11,33,34,37,51,52

07,08,09,10,11,13,14,19,24,28,29,37,41,42,44
,48,49,50,52

03,05,13,14,47,50,52
13,14,47,52
11,18,24,25,35,36,38,39,40,51,52

3,7,8,9,10,11,13,14,15,17,24,25,26,28,29,30
,31,32,33,35,37,38,39,40,41,42,46,51,52,60

05,11,44,52

11,28,31,32,52
35

LARGE POWER

8051 POWER 3.3V_ALW_ON S0~S5+3.3V

SLP_S5# CTRLD POWER

SLP_S5# CTRLD POWER

SODIMM POWER

SODIMM POWER

SLP_S3# CTRLD POWER

SLP_S3# CTRLD POWER

SDVO POWER

CPU POWER RUN_ON

Express Card/Min Card

HDD Power
+1.05V_PCH PCH POWER+1.05V 08,09,11,15,48 RUN_ON
+VCC_CORE
+LCDVCC
+5V_MOD

+0.7V~+1.77V

+3.3V
+5V

05,51
24
35

CPU CORE POWER

LCD Power

MOD Power

1.05_VTT(TPS51218)

46

GFX_VCORE (MAX17028)
CPU CORE(MAX17036)

47

Run Power Switch

48

DCin & Batt

C C

49
50

PAD & SCREW

51

EMI CAP

52

SMBUS BLOCK
THERMAL MAP

54

Power Block Diagram

55

Power sequence Block

56

XDP

GND PLANE PAGE

GND

ALL53

DESCRIPTION

57
58
59
60

CONTROL
SIGNAL

ALW_ON

SUS_ON
SUS_ON
SUS_ON
RUN_ON
RUN_ON
RUN_ON
RUN_ON

RUN_ON
HDDC_EN

IMVP_VR_ON
LCDVCC_TST_EN

& ENVDD
MODC_EN

ACTIVE INVOLTAGE PAGE

S0~S5
S0~S5

S0~S5

D D

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

1

2

3

4

5

6

Date: Sheet of

COMPUTER

Index & Power Status

Index & Power Status

Index & Power Status

UM3B/UM6B 1A

UM3B/UM6B 1A

UM3B/UM6B 1A

7

2 59Wednesday, September 30, 2009

2 59Wednesday, September 30, 2009

2 59Wednesday, September 30, 2009

8

5

U9A

U9A

FDI_TXN0
FDI_TXN1
FDI_TXN2
FDI_TXN3
FDI_TXN4
FDI_TXN5
FDI_TXN6
FDI_TXN7

FDI_TXP0
FDI_TXP1
FDI_TXP2
FDI_TXP3
FDI_TXP4
FDI_TXP5
FDI_TXP6
FDI_TXP7

A24

DMI_RX#[0]

C23

DMI_RX#[1]

B22

DMI_RX#[2]

A21

DMI_RX#[3]

B24

DMI_RX[0]

D23

DMI_RX[1]

B23

DMI_RX[2]

A22

DMI_RX[3]

D24

DMI_TX#[0]

G24

DMI_TX#[1]

F23

DMI_TX#[2]

H23

DMI_TX#[3]

D25

DMI_TX[0]

F24

DMI_TX[1]

E23

DMI_TX[2]

G23

DMI_TX[3]

E22

FDI_TX#[0]

D21

FDI_TX#[1]

D19

FDI_TX#[2]

D18

FDI_TX#[3]

G21

FDI_TX#[4]

E19

FDI_TX#[5]

F21

FDI_TX#[6]

G18

FDI_TX#[7]

D22

FDI_TX[0]

C21

FDI_TX[1]

D20

FDI_TX[2]

C18

FDI_TX[3]

G22

FDI_TX[4]

E20

FDI_TX[5]

F20

FDI_TX[6]

G19

FDI_TX[7]

F17

FDI_FSYNC[0]

E17

FDI_FSYNC[1]

C17

FDI_INT

F18

FDI_LSYNC[0]

D17

FDI_LSYNC[1]

Clarksfield/Auburndale

Clarksfield/Auburndale

DMI_TXN0[7]
DMI_TXN1[7]
DMI_TXN2[7]

D D

C C

B B

DMI_TXN3[7]
DMI_TXP0[7]

DMI_TXP1[7]
DMI_TXP2[7]
DMI_TXP3[7]

DMI_RXN0[7]
DMI_RXN1[7]
DMI_RXN2[7]
DMI_RXN3[7]

DMI_RXP0[7]
DMI_RXP1[7]
DMI_RXP2[7]
DMI_RXP3[7]

FDI_TXN[7:0][7]

FDI_TXP[7:0][7]

FDI_FSYNC0[7]
FDI_FSYNC1[7]

FDI_INT[7]

FDI_LSYNC0[7]
FDI_LSYNC1[7]

PEG_ICOMPI

PEG_ICOMPO

PEG_RCOMPO

PEG_RBIAS
PEG_RX#[0]

PEG_RX#[1]
PEG_RX#[2]

DMI Intel(R) FDI

DMI Intel(R) FDI

PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]

PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]

PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]

PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]

PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]

PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]

PCI EXPRESS -- GRAPHICS

PCI EXPRESS -- GRAPHICS

PEG_TX#[15]

PEG_TX[0]

PEG_TX[1]

PEG_TX[2]

PEG_TX[3]

PEG_TX[4]

PEG_TX[5]

PEG_TX[6]

PEG_TX[7]

PEG_TX[8]

PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]

B26
A26
B27
A25

K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31

J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30

L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26

L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25

PEG_ICOMPI

4

R244 49.9/FR244 49.9/F

R245 750/FR245 750/F

+1.5V_SUS

R164

R164

1.1K/F

1.1K/F

R161

R161
3K/F

3K/F

PM_DRAM_PWRGD

3

U9B

H_COMP3
H_COMP2
H_COMP1
H_COMP0

H_CPUDET#[27]

H_CATERR#

H_PECI[10]

H_THERM[10]

PM_SYNC[7]

H_PWRGOOD[10]

PM_DRAM_PWRGD[7]

H_VTTPWRGD[38]

PLTRST#[9,27,29,30,37]

R160 1.5K/FR160 1.5K/F

H_PECI

H_PROCHOT#

H_CPURST#

PM_DRAM_PWRGD

R159

R159
750/F

750/F

U9B

AT23

COMP3

AT24

COMP2

G16

COMP1

AT26

COMP0

AH24

SKTOCC#

AK14

CATERR#

AT15

PECI

AN26

PROCHOT#

AK15

THERMTRIP#

AP26

RESET_OBS#

AL15

PM_SYNC

AN14

VCCPWRGOOD_1

AN27

VCCPWRGOOD_0

AK13

SM_DRAMPWROK

AM15

VTTPWRGOOD

AM26

TAPPWRGOOD

AL14

RSTIN#

Clarksfield/Auburndale

Clarksfield/Auburndale

2

MISC THERMAL

MISC THERMAL

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CLOCKS

CLOCKS

SM_DRAMRST#

PM_EXT_TS#[0]
PM_EXT_TS#[1]

DDR3

MISC

DDR3

MISC

PWR MANAGEMENT

PWR MANAGEMENT

JTAG & BPM

JTAG & BPM

BCLK

BCLK#

BCLK_ITP

BCLK_ITP#

PEG_CLK

PEG_CLK#

SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]

PRDY#

PREQ#

TRST#

TDI_M

TDO_M

DBR#

BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]

A16
B16

AR30
AT30

E16
D16

A18
A17

F6

SM_RCOMP_0

AL1

SM_RCOMP_1

AM1

SM_RCOMP_2

AN1
AN15

AP15

AT28
AP27

AN28

TCK

AP28

TMS

XDP_TRST#

AT27
AT29

TDI

AR27

TDO

XDP_TDI_M

AR29

XDP_TDO_M

AP29

DBRESET#

AN25

AJ22
AK22
AK24
AJ24
AJ25
AH22
AK23
AH23

CRB use a 1k pull-up to 3.3V_S for DBR#
TRST# use a 51ohm pull down.

CLK_CPU_BCLK [10]
CLK_CPU_BCLK# [10]

T29T29
T30T30

CLK_PCIE_3GPLL [9]
CLK_PCIE_3GPLL# [9]

DREFSSCLK [9]
DREFSSCLK# [9]

DDR3_DRAMRST# [13,14]

R163 10KR163 10K
R151 10KR151 10K

R295 51R295 51

R284 SJ_0402R284 SJ_0402

DBRESET#

112

2

1

12

R162,R147 Remove 8/13 Ray

12

R149

R149

*12.4K/F_NC

*12.4K/F_NC

+3.3V_RUN

R313 1KR313 1K

+1.05V_VTT

PM_EXTTS#0 [13]
PM_EXTTS#1 [14]

Processor
Pullups

H_CATERR#
H_PROCHOT#
H_CPURST#

A A

5

R139

R139

49.9/F

49.9/F

+1.05V_VTT

R138

R138

49.9/F

49.9/F

R131

R131
*68_NC

*68_NC

Processor Compensation Signals

H_COMP0
H_COMP1
H_COMP2
H_COMP3

R133

R133

R119

R119

49.9/F

49.9/F

49.9/F

49.9/F

R122

R122

R120

R120

20/F

20/F

20/F

20/F

4

DDR3 Compensation Signals

SM_RCOMP_2
SM_RCOMP_1
SM_RCOMP_0

R143

R143
130/F

130/F

R142

R142

24.9/F

24.9/F

R141

R141
100/F

100/F

3

Layout Note: Place
these resistors
near Processor

DDR3_DRAMRST# H_PWRGOOD

2

C507

C507

0.01U

0.01U

C508

C508

0.01U

0.01U

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

COMPUTER

AUBURNDA 1/4

AUBURNDA 1/4

AUBURNDA 1/4

UM3B/UM6B 1A

UM3B/UM6B 1A

UM3B/UM6B 1A

1

3 59Friday, October 02, 2009

3 59Friday, October 02, 2009

3 59Friday, October 02, 2009

5

4

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (DDR3)

U9D

U9C

U9C

U9D

AA6

SA_CK[0]

AA7

SA_CK#[0]

M_A_DQ[63:0][13]

D D

C C

B B

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

M_A_BS0[13]
M_A_BS1[13]
M_A_BS2[13]

M_A_CAS#[13]
M_A_RAS#[13]
M_A_WE#[13]

C10

D10

H10

G10

AH5
AF5
AK6
AK7
AF6
AG5

AJ10
AL10

AK12

AK8

AK11

AN8

AM10

AR11
AL11

AM9

AN9
AT11
AP12

AM12

AN12

AM13

AT14
AT12
AL13
AR14
AP14

AC3

AB2

AE1

AB3

AE9

A10

B10
E10

F10

J10

AJ7
AJ6

AJ9

AL7
AL8

C7
A7

A8
D8

E6
F7
E9
B7
E7
C6

G8
K7

J8

G7

J7

L7
M6
M8

L9

L6
K8
N8
P9

U7

SA_DQ[0]
SA_DQ[1]
SA_DQ[2]
SA_DQ[3]
SA_DQ[4]
SA_DQ[5]
SA_DQ[6]
SA_DQ[7]
SA_DQ[8]
SA_DQ[9]
SA_DQ[10]
SA_DQ[11]
SA_DQ[12]
SA_DQ[13]
SA_DQ[14]
SA_DQ[15]
SA_DQ[16]
SA_DQ[17]
SA_DQ[18]
SA_DQ[19]
SA_DQ[20]
SA_DQ[21]
SA_DQ[22]
SA_DQ[23]
SA_DQ[24]
SA_DQ[25]
SA_DQ[26]
SA_DQ[27]
SA_DQ[28]
SA_DQ[29]
SA_DQ[30]
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
SA_DQ[38]
SA_DQ[39]
SA_DQ[40]
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
SA_DQ[45]
SA_DQ[46]
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]

SA_BS[0]
SA_BS[1]
SA_BS[2]

SA_CAS#
SA_RAS#
SA_WE#

SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_CKE[0]

SA_CK[1]
SA_CK#[1]
SA_CKE[1]

SA_CS#[0]
SA_CS#[1]

SA_ODT[0]
SA_ODT[1]

SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]

SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]

SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]

SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]

P7

Y6
Y5
P6

AE2
AE8

AD8
AF9

B9
D7
H7
M7
AG6
AM7
AN10
AN13

C9
F8
J9
N9
AH7
AK9
AP11
AT13

C8
F9
H9
M9
AH8
AK10
AN11
AR13

Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9

M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

M_A_CLK0 [13]
M_A_CLK0# [13]
M_A_CKE0 [13]

M_A_CLK1 [13]
M_A_CLK1# [13]
M_A_CKE1 [13]

M_A_CS0# [13]
M_A_CS1# [13]

M_A_ODT0 [13]
M_A_ODT1 [13]

M_A_DM[7:0] [13]

M_A_DQS#[7:0] [13]

M_A_DQS[7:0] [13]

M_A_A[15:0] [13]

M_B_DQ[63:0][14]

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

M_B_BS0[14]
M_B_BS1[14]
M_B_BS2[14]

M_B_CAS#[14]
M_B_RAS#[14]
M_B_WE#[14]

AF3
AG1

AK1
AG4
AG3

AH4
AK3

AK4
AM6
AN2

AK5

AK2
AM4
AM3

AP3
AN5

AT4
AN6
AN4
AN3

AT5

AT6
AN7

AP6

AP8

AT9

AT7

AP9

AR10
AT10

AB1

AC5

AC6

AJ3

AJ4

W5

B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2

J6

J3
G1
G5

J2

J1

J5
K2

L3
M1
K5
K4
M4
N5

R7

Y7

SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]

SB_BS[0]
SB_BS[1]
SB_BS[2]

SB_CAS#
SB_RAS#
SB_WE#

SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]

DDR SYSTEM MEMORY - B

DDR SYSTEM MEMORY - B

SB_CK[0]
SB_CK#[0]
SB_CKE[0]

SB_CK[1]
SB_CK#[1]
SB_CKE[1]

SB_CS#[0]
SB_CS#[1]

SB_ODT[0]
SB_ODT[1]

SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]

SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]

SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]

SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]

W8
W9
M3

V7
V6
M2

AB8
AD6

AC7
AD1

D4
E1
H3
K1
AH1
AL2
AR4
AT8

D5
F4
J4
L4
AH2
AL4
AR5
AR8

C5
E3
H4
M5
AG2
AL5
AP5
AR7

U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1

M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

M_B_CLK0 [14]
M_B_CLK0# [14]
M_B_CKE0 [14]

M_B_CLK1 [14]
M_B_CLK1# [14]
M_B_CKE1 [14]

M_B_CS0# [14]
M_B_CS1# [14]

M_B_ODT0 [14]
M_B_ODT1 [14]

M_B_DM[7:0] [14]

M_B_DQS#[7:0] [14]

M_B_DQS[7:0] [14]

M_B_A[15:0] [14]

Clarksfield/Auburndale

Clarksfield/Auburndale

Clarksfield/Auburndale

A A

Channel A DQ[15,32,48,54], DM[5]
Requires minimum 12mils spacing
with all other signals, including data signals.

5

Channel B DQ[16,18,36,42,56,57,60,61,62]
Requires minimum 12mils spacing
with all other signals, including data signals.

4

3

Clarksfield/Auburndale

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

COMPUTER

AUBURNDA 2/4

AUBURNDA 2/4

AUBURNDA 2/4

UM3B/UM6B 1A

UM3B/UM6B 1A

UM3B/UM6B 1A

4 59Friday, October 02, 2009

4 59Friday, October 02, 2009

4 59Friday, October 02, 2009

1

5

U9F

CPU Core Power

+VCC_CORE

D D

C C

B B

A A

U9F

AG35

VCC1

AG34

VCC2

AG33

VCC3

AG32

VCC4

AG31

VCC5

AG30

VCC6

AG29

VCC7

AG28

VCC8

AG27

VCC9

AG26

VCC10

AF35

VCC11

AF34

VCC12

AF33

VCC13

AF32

VCC14

AF31

VCC15

AF30

VCC16

AF29

VCC17

AF28

VCC18

AF27

VCC19

AF26

VCC20

AD35

VCC21

AD34

VCC22

AD33

VCC23

AD32

VCC24

AD31

VCC25

AD30

VCC26

AD29

VCC27

AD28

VCC28

AD27

VCC29

AD26

VCC30

AC35

VCC31

AC34

VCC32

AC33

VCC33

AC32

VCC34

AC31

VCC35

AC30

VCC36

AC29

VCC37

AC28

VCC38

AC27

VCC39

AC26

VCC40

AA35

VCC41

AA34

VCC42

AA33

VCC43

AA32

VCC44

AA31

VCC45

AA30

VCC46

AA29

VCC47

AA28

VCC48

AA27

VCC49

AA26

VCC50

Y35

VCC51

Y34

VCC52

Y33

VCC53

Y32

VCC54

Y31

VCC55

Y30

VCC56

Y29

VCC57

Y28

VCC58

Y27

VCC59

Y26

VCC60

V35

VCC61

V34

VCC62

V33

VCC63

V32

VCC64

V31

VCC65

V30

VCC66

V29

VCC67

V28

VCC68

V27

VCC69

V26

VCC70

U35

VCC71

U34

VCC72

U33

VCC73

U32

VCC74

U31

VCC75

U30

VCC76

U29

VCC77

U28

VCC78

U27

VCC79

U26

VCC80

R35

VCC81

R34

VCC82

R33

VCC83

R32

VCC84

R31

VCC85

R30

VCC86

R29

VCC87

R28

VCC88

R27

VCC89

R26

VCC90

P35

VCC91

P34

VCC92

P33

VCC93

P32

VCC94

P31

VCC95

P30

VCC96

P29

VCC97

P28

VCC98

P27

VCC99

P26

VCC100

Clarksfield/Auburndale

Clarksfield/Auburndale

AH14

VTT0_1

AH12

VTT0_2

AH11

VTT0_3

AH10

VTT0_4

J14

VTT0_5

J13

VTT0_6

H14

VTT0_7

H12

VTT0_8

G14

VTT0_9

G13

VTT0_10

G12

VTT0_11

G11

VTT0_12

F14

VTT0_13

F13

VTT0_14

F12

VTT0_15

F11

VTT0_16

E14

VTT0_17

E12

VTT0_18

D14

VTT0_19

D13

VTT0_20

D12

VTT0_21

D11

VTT0_22

C14

VTT0_23

C13

VTT0_24

C12

VTT0_25

C11

VTT0_26

B14

VTT0_27

B12

VTT0_28

A14

VTT0_29

A13

VTT0_30

A12

VTT0_31
VTT0_32

VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44

PSI#

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

VTT_SELECT

ISENSE

VCC_SENSE
VSS_SENSE

VTT_SENSE

A11

AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15

AN33

VID0

AK35

VID1

AK33

VID2

AK34

VID3

AL35

VID4

AL33

VID5

AM33

VID6

AM35

DPRSLPVR

AM34

G15

AN35

AJ34
AJ35

B15

TP_VSS_SENSE_VTT

A15

1.1V RAIL POWER

1.1V RAIL POWER

CPU CORE SUPPLY

CPU CORE SUPPLY

POWER

POWER

PROC_DPRSLPVR

CPU VIDS

CPU VIDS

VSS_SENSE_VTT

SENSE LINES

SENSE LINES

AUBURNDALE/CLARKSFIELD PROCESSOR (POWER)

5

C348

C348
10U

10U

C160

C160
22U

22U

C353

C353
22U

22U

4

C169

C169
10U

10U

+1.05V_VTT

C162

C162
22U

22U

C158

C158
22U

22U

H_PSI# [47]

VID0 [47]
VID1 [47]
VID2 [47]
VID3 [47]
VID4 [47]
VID5 [47]
VID6 [47]
DPRSLPVR [47]

T40T40

I_MON [47]

T50T50
T49T49

4

C170

C170
*10U_NC

*10U_NC

C354

C354
*22U_NC

*22U_NC

C161

C161

C173

C173

*10U_NC

*10U_NC

10U

10U

+VCC_GFX_CORE

+

+

C157

C157
330U

330U

7343

7343

2.5

2.5

+1.05V_VTT

C171

C171
10U

10U

C177

C177
22U

22U

+1.05V_VTT

C346

C346
22U

22U

+VCC_CORE

Close to CPU

R240

R240
100/F

100/F

R241

R241
100/F

100/F

+1.05V_VTT

C350

C350

C163

C163

*10U_NC

*10U_NC

*10U_NC

*10U_NC

C174

C174

C175

C175

10U

10U

22U

22U

C349

C349
22U

22U

C347

C347
*22U_NC

*22U_NC

VCCSENSE [47]
VSSSENSE [47]

C342

C342
22U

22U

C351

C351
*10U_NC

*10U_NC

C176

C176
10U

10U

C166

C166
22U

22U

C345

C345
*22U_NC

*22U_NC

3

2

AUBURNDALE/CLARKSFIELD PROCESSOR (GRAPHICS POWER)

U9G

U9G

AT21

VAXG1

AT19

VAXG2

AT18

VAXG3

AT16

VAXG4

AR21

VAXG5

AR19

VAXG6

AR18

VAXG7

AR16

VAXG8

AP21

VAXG9

AP19

VAXG10

AP18

VAXG11

AP16

VAXG12

AN21

VAXG13

AN19

VAXG14

AN18

VAXG15

AN16

VAXG16

AM21

VAXG17

AM19

VAXG18

AM18

VAXG19

AM16

VAXG20

AL21

VAXG21

AL19

VAXG22

AL18

VAXG23

AL16

VAXG24

AK21

VAXG25

AK19

VAXG26

AK18

VAXG27

AK16

VAXG28

AJ21

VAXG29

AJ19

VAXG30

AJ18

VAXG31

AJ16

VAXG32

AH21

VAXG33

AH19

VAXG34

AH18

VAXG35

AH16

VAXG36

J24

VTT1_45

J23

VTT1_46

H25

VTT1_47

K26

VTT1_48

J27

VTT1_49

J26

VTT1_50

J25

VTT1_51

H27

VTT1_52

G28

VTT1_53

G27

VTT1_54

G26

VTT1_55

F26

VTT1_56

E26

VTT1_57

E25

VTT1_58

Clarksfield/Auburndale

Clarksfield/Auburndale

3

VAXG_SENSE

VSSAXG_SENSE

SENSE

LINES

SENSE

LINES

GRAPHICS

GRAPHICS

GFX_DPRSLPVR

GRAPHICS VIDs

GRAPHICS VIDs

FDI PEG & DMI

FDI PEG & DMI

POWER

POWER

DDR3 - 1.5V RAILS

DDR3 - 1.5V RAILS

1.1V1.8V

1.1V1.8V

VID0
VID1
VID2
VID3
VID4
VID5
VID6
DPRSLPVR
H_PSI#

GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]

GFX_VR_EN

GFX_IMON

VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8

VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18

VTT0_59
VTT0_60
VTT0_61
VTT0_62

VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68

VCCPLL1
VCCPLL2
VCCPLL3

R2581KR258
1K

R249

R249
*1K_NC

*1K_NC

R2571KR257
1K

R248

R248
*1K_NC

*1K_NC

AR22
AT22

AM22
AP22
AN22
AP23
AM23
AP24
AN24

AR25
AT25
AM24

AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1

P10
N10
L10
K10

J22
J20
J18
H21
H20
H19

L26
L27
M26

R2641KR264
1K

R255

R255
*1K_NC

*1K_NC

+1.05V_VTT

R259

R259
*1K_NC

*1K_NC

R2501KR250
1K

GFXVR_EN

C1881UC188
1U

C1371UC137
1U

R260

R260
*1K_NC

*1K_NC

R2511KR251
1K

C168

C168
*10U_NC

*10U_NC

C341

C341
22U

22U

VCC_AXG_SENSE [46]
VSS_AXG_SENSE [46]

GFXVR_VID_0 [46]
GFXVR_VID_1 [46]
GFXVR_VID_2 [46]
GFXVR_VID_3 [46]
GFXVR_VID_4 [46]
GFXVR_VID_5 [46]
GFXVR_VID_6 [46]

R134 4.7K/FR134 4.7K/F

GFXVR_DPRSLPVR [46]

R246 *1K/F_NCR246 *1K/F_NC

C1891UC189

C1911UC191

1U

1U

+

+

C167

C167
10U

10U

C344

C344
22U

22U

C1391UC139

C149

C149

1U

2.2U

2.2U

R262

R262

R2611KR261

*1K_NC

*1K_NC

1K

R2531KR253

R252

R252

1K

*1K_NC

*1K_NC

2

C1901UC190
1U

+

+

C194

C194
330U

330U

7343

7343

2.5

2.5

+1.05V_VTT

C343

C343
*330U_NC

*330U_NC

7343

7343

2.5

2.5

+1.8V_RUN

C148

C148

4.7U/6.3V

4.7U/6.3V

R2631KR263
1K

R254

R254
*1K_NC

*1K_NC

+1.5V_SUS

C1921UC192
1U

C193

C193
22U

22U

C360

C360
22U

22U

R265

R265
*1K_NC

*1K_NC

R2561KR256
1K

C187

C187
22U

22U

GFXVR_EN [46]

+VCC_CORE

1

GFXVR_IMON [46]

C367

C367
*22U_NC

*22U_NC

C370

C370
22U

22U

C143

C143

C153

C153

10U

10U

10U

10U

C152

C152

C366

C366

10U

10U

10U

10U

+

+

C129

C129
*470U_NC

*470U_NC

Title

Title

Title

AUBURNDA 3/4

AUBURNDA 3/4

AUBURNDA 3/4

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

UM3B/UM6B 1A

UM3B/UM6B 1A

UM3B/UM6B 1A

Date: Sheet of

Date: Sheet of

Date: Sheet of

C355

C355

C145

C145

22U

22U

*22U_NC

*22U_NC

C140

C140

C132

C132

22U

22U

22U

22U

C131

C131

C151

C151

*10U_NC

*10U_NC

10U

10U

C365

C365

C150

C150

10U

10U

10U

10U

+

+

C155

C155
330U

330U

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

1

C144

C144
10U

10U

C142

C142
*10U_NC

*10U_NC

C147

C147
22U

22U

C141

C141
22U

22U

C357

C357
10U

10U

C368

C368
10U

10U

5 59Friday, October 02, 2009

5 59Friday, October 02, 2009

5 59Friday, October 02, 2009

C146

C146
22U

22U

C372

C372
*22U_NC

*22U_NC

C359

C359
10U

10U

C154

C154
10U

10U

C371

C371
22U

22U

C369

C369
*22U_NC

*22U_NC

C358

C358
*10U_NC

*10U_NC

C356

C356
*10U_NC

*10U_NC

5

4

3

2

1

AUBURNDALE/CLARKSFIELD PROCESSOR (GND) AUBURNDALE/CLARKSFIELD PROCESSOR( RESERVED, CFG)

U9H

U9H

AT20

VSS1

AT17

VSS2

AR31

VSS3

AR28

VSS4

AR26

VSS5

AR24

VSS6

AR23

VSS7

AR20

VSS8

AR17

D D

C C

B B

VSS9

AR15

VSS10

AR12

VSS11

AR9

VSS12

AR6

VSS13

AR3

VSS14

AP20

VSS15

AP17

VSS16

AP13

VSS17

AP10

VSS18

AP7

VSS19

AP4

VSS20

AP2

VSS21

AN34

VSS22

AN31

VSS23

AN23

VSS24

AN20

VSS25

AN17

VSS26

AM29

VSS27

AM27

VSS28

AM25

VSS29

AM20

VSS30

AM17

VSS31

AM14

VSS32

AM11

VSS33

AM8

VSS34

AM5

VSS35

AM2

VSS36

AL34

VSS37

AL31

VSS38

AL23

VSS39

AL20

VSS40

AL17

VSS41

AL12

VSS42

AL9

VSS43

AL6

VSS44

AL3

VSS45

AK29

VSS46

AK27

VSS47

AK25

VSS48

AK20

VSS49

AK17

VSS50

AJ31

VSS51

AJ23

VSS52

AJ20

VSS53

AJ17

VSS54

AJ14

VSS55

AJ11

VSS56

AJ8

VSS57

AJ5

VSS58

AJ2

VSS59

AH35

VSS60

AH34

VSS61

AH33

VSS62

AH32

VSS63

AH31

VSS64

AH30

VSS65

AH29

VSS66

AH28

VSS67

AH27

VSS68

AH26

VSS69

AH20

VSS70

AH17

VSS71

AH13

VSS72

AH9

VSS73

AH6

VSS74

AH3

VSS75

AG10

VSS76

AF8

VSS77

AF4

VSS78

AF2

VSS79

AE35

VSS80

Clarksfield/Auburndale

Clarksfield/Auburndale

VSS

VSS

VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98

VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160

AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30

U9I

U9I

K27

VSS161

K9

VSS162

K6

VSS163

K3

VSS164

J32

VSS165

J30

VSS166

J21

VSS167

J19

VSS168

H35

VSS169

H32

VSS170

H28

VSS171

H26

VSS172

H24

VSS173

H22

VSS174

H18

VSS175

H15

VSS176

H13

VSS177

H11

VSS178

H8

VSS179

H5

VSS180

H2

VSS181

G34

VSS182

G31

VSS183

G20

VSS184

G9

VSS185

G6

VSS186

G3

VSS187

F30

VSS188

F27

VSS189

F25

VSS190

F22

VSS191

F19

VSS192

F16

VSS193

E35

VSS194

E32

VSS195

E29

VSS196

E24

VSS197

E21

VSS198

E18

VSS199

E13

VSS200

E11

VSS201

E8

VSS202

E5

VSS203

E2

VSS204

D33

VSS205

D30

VSS206

D26

VSS207

D9

VSS208

D6

VSS209

D3

VSS210

C34

VSS211

C32

VSS212

C29

VSS213

C28

VSS214

C24

VSS215

C22

VSS216

C20

VSS217

C19

VSS218

C16

VSS219

B31

VSS220

B25

VSS221

B21

VSS222

B18

VSS223

B17

VSS224

B13

VSS225

B11

VSS226

B8

VSS227

B6

VSS228

B4

VSS229

A29

VSS230

A27

VSS231

A23

VSS232

A9

VSS233

Clarksfield/Auburndale

Clarksfield/Auburndale

VSS

VSS

NCTF

NCTF

VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7

AT35
AT1
AR34
B34
B2
B1
A35

+M_VREF_DQ_DIMM0
+M_VREF_DQ_DIMM1

T35

T35

PAD

PAD

T36

T36

PAD

PAD

T38

T38

PAD

PAD

T37

T37

PAD

PAD

R130 *0_NCR130 *0_NC
R243 *0_NCR243 *0_NC

CFG0

CFG3
CFG4

CFG7

TP_RSVD17_R
TP_RSVD18_R

U9E

U9E

AP25

RSVD1

AL25

RSVD2

AL24

RSVD3

AL22

RSVD4

AJ33

RSVD5

AG9

RSVD6

M27

RSVD7

L28

RSVD8

J17

SA_DIMM_VREF

H17

SB_DIMM_VREF

G25

RSVD11

G17

RSVD12

E31

RSVD13

E30

RSVD14

AM30

CFG[0]

AM28

CFG[1]

AP31

CFG[2]

AL32

CFG[3]

AL30

CFG[4]

AM31

CFG[5]

AN29

CFG[6]

AM32

CFG[7]

AK32

CFG[8]

AK31

CFG[9]

AK28

CFG[10]

AJ28

CFG[11]

AN30

CFG[12]

AN32

CFG[13]

AJ32

CFG[14]

AJ29

CFG[15]

AJ30

CFG[16]

AK30

CFG[17]

H16

RSVD_TP_86

B19

RSVD15

A19

RSVD16

A20

RSVD17

B20

RSVD18

U9

RSVD19

T9

RSVD20

AC9

RSVD21

AB9

RSVD22

C1

RSVD_NCTF_23

A3

RSVD_NCTF_24

J29

RSVD26

J28

RSVD27

A34

RSVD_NCTF_28

A33

RSVD_NCTF_29

C35

RSVD_NCTF_30

B35

RSVD_NCTF_31

Clarksfield/Auburndale

Clarksfield/Auburndale

RESERVED

RESERVED

RSVD32
RSVD33

RSVD34
RSVD35

RSVD36

RSVD_NCTF_37

RSVD38
RSVD39

RSVD_NCTF_40
RSVD_NCTF_41

RSVD_NCTF_42
RSVD_NCTF_43

RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52

RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57

RSVD58

RSVD_TP_59
RSVD_TP_60

KEY
RSVD62
RSVD63
RSVD64
RSVD65

RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75

RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85

VSS

AJ13
AJ12

AH25
AK26

AL26
AR2

AJ26
AJ27

AP1
AT2

AT3
AR1

AL28
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32

E15
F15
A2
D15
C15

RSVD64_R

AJ15

RSVD65_R

AH15

No need to pull down RSVD17, 18, 64, & 65,
these resistors are for intel internal test only.

AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3

V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9

AP34

R136 *0_NCR136 *0_NC
R137 *0_NCR137 *0_NC

2

Can be left NC is Intel CRM

R242

R242

2

implementation; ESD/DG

SJ_0402

SJ_0402

1

recommendation to GND

1

A A

The Clarkfield processor's PCI Express interface may
not meet PCI Express 2.0 jitter specifications. Intel
recommends placing a 3.01K +/- 5% pull down resistor to
VSS on CFG[7] pin for both rPGA and BGA components.
This pull down resistor should be removed when this
issue is fixed.

5

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

4

3

2

Date: Sheet of

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

AUBURNDA 4/4

AUBURNDA 4/4

AUBURNDA 4/4

UM3B/UM6B 1A

UM3B/UM6B 1A

UM3B/UM6B 1A

1

6 59Wednesday, September 30, 2009

6 59Wednesday, September 30, 2009

6 59Wednesday, September 30, 2009

5

4

3

2

1

IBEX PEAK-M (DMI,FDI,GPIO)

U11C

U11C

DMI_RXN0[3]

D D

C C

B B

A A

DMI_RXN1[3]
DMI_RXN2[3]
DMI_RXN3[3]

DMI_RXP0[3]
DMI_RXP1[3]
DMI_RXP2[3]
DMI_RXP3[3]

DMI_TXN0[3]
DMI_TXN1[3]
DMI_TXN2[3]
DMI_TXN3[3]

DMI_TXP0[3]
DMI_TXP1[3]
DMI_TXP2[3]
DMI_TXP3[3]

+1.05V_PCH

PCH_PWRGD[27,35]

PM_DRAM_PW RGD[3]

ICH_RSMRST#[27]

SUS_PWR_ACK[27]

SIO_PWRBTN#[27]

AC_PRESENT[27]

CLKRUN# DPB_HPD_Q
LCD_DDCDAT
LCD_DDCCLK
L_CTRL_CLK
L_CTRL_DATA
XDP_DBRESET#

PM_RI#
PM_BATLOW#
PCIE_WAKE#

R356 10K/FR356 10K/F
R88 2.2KR88 2.2K
R90 2.2KR90 2.2K
R91 10K/FR91 10K/F
R96 10K/FR96 10K/F

R452 10K/FR452 10K/F

R315 10K/FR315 10K/F
R324 8.2K/FR324 8.2K/F
R62 1KR62 1K

R305 49.9/FR305 49.9/F

+3.3V_RUN

12
12

+3.3V_SUS

5

DMI_ZCOMP

XDP_DBRESET#

LAN_RST#

ICH_RSMRST#

PM_BATLOW#

PM_RI#

PCH_PWRGD
ICH_RSMRST#
LAN_RST#

BC24

DMI0RXN

BJ22

DMI1RXN

AW20

DMI2RXN

BJ20

DMI3RXN

BD24

DMI0RXP

BG22

DMI1RXP

BA20

DMI2RXP

BG20

DMI3RXP

BE22

DMI0TXN

BF21

DMI1TXN

BD20

DMI2TXN

BE18

DMI3TXN

BD22

DMI0TXP

BH21

DMI1TXP

BC20

DMI2TXP

BD18

DMI3TXP

BH25

DMI_ZCOMP

BF25

DMI_IRCOMP

T6

SYS_RESET#

M6

SYS_PWROK

B17

PWROK

K5

MEPWROK

A10

LAN_RST#

D9

DRAMPWROK

C16

RSMRST#

M1

SUS_PWR_DN_ACK / GPIO30

P5

PWRBTN#

P7

ACPRESENT / GPIO31

A6

BATLOW# / GPIO72

F14

RI#

IbexPeak-M_R1P0

IbexPeak-M_R1P0

R51 10K/FR51 10K/F
R300 10K/FR300 10K/F
R316 10K/FR316 10K/F

DMI

FDI

DMI

FDI

CLKRUN# / GPIO32

SUS_STAT# / GPIO61

SUSCLK / GPIO62

SLP_S5# / GPIO63

System Power Management

System Power Management

SLP_LAN# / GPIO29

Close to VGA side

PANEL_BKEN

4

FDI_FSYNC0
FDI_FSYNC1
FDI_LSYNC0
FDI_LSYNC1

VGA_BLU
VGA_GRN
VGA_RED

ENVDD

FDI_RXN0
FDI_RXN1
FDI_RXN2
FDI_RXN3
FDI_RXN4
FDI_RXN5
FDI_RXN6
FDI_RXN7

FDI_RXP0
FDI_RXP1
FDI_RXP2
FDI_RXP3
FDI_RXP4
FDI_RXP5
FDI_RXP6
FDI_RXP7

FDI_INT

WAKE#

SLP_S4#

SLP_S3#

SLP_M#

TP23

PMSYNCH

R271 150/FR271 150/F
R274 150/FR274 150/F
R275 150/FR275 150/F
R89 100KR89 100K
R87 100KR87 100K

BA18
BH17
BD16
BJ16
BA16
BE14
BA14
BC12

BB18
BF17
BC16
BG16
AW16
BD14
BB14
BD12

BJ14
BF13
BH13
BJ12
BG14

J12

Y1

P8

F3

E4

H7

P12

K8

N2

BJ10

F6

PCIE_WAKE#

CLKRUN#

RSV_LPCPD#

ICH_SUSCLK

SIO_SLP_S5#

SLP_S4#_R

SIO_SLP_S3#

SLP_M#_R

PM_SLP_LAN#_R

12
12
12
12
12

FDI_TXN0 [3]
FDI_TXN1 [3]
FDI_TXN2 [3]
FDI_TXN3 [3]
FDI_TXN4 [3]
FDI_TXN5 [3]
FDI_TXN6 [3]
FDI_TXN7 [3]

FDI_TXP0 [3]
FDI_TXP1 [3]
FDI_TXP2 [3]
FDI_TXP3 [3]
FDI_TXP4 [3]
FDI_TXP5 [3]
FDI_TXP6 [3]
FDI_TXP7 [3]

FDI_INT [3]
FDI_FSYNC0 [3]
FDI_FSYNC1 [3]
FDI_LSYNC0 [3]
FDI_LSYNC1 [3]

PCIE_WAKE# [37]

CLKRUN# [27]

T8T8

T59T59

SIO_SLP_S5# [27]

T6T6

SIO_SLP_S3# [27]

T3T3

PM_SYNC [3]

T2T2

PANEL_BKEN[27]

ENVDD[24]

BIA_PWM[24]

LCD_DDCCLK[24]
LCD_DDCDAT[24]

T19

T19

LCD_ACLK-[24]
LCD_ACLK+[24]

LCD_A0-[24]
LCD_A1-[24]
LCD_A2-[24]

T28

T28

LCD_A0+[24]
LCD_A1+[24]
LCD_A2+[24]

T22

T22

LCD_BCLK-[24]
LCD_BCLK+[24]

LCD_B0-[24]
LCD_B1-[24]
LCD_B2-[24]

T24

T24

LCD_B0+[24]
LCD_B1+[24]
LCD_B2+[24]

T27

T27

VGA_BLU[25]
VGA_GRN[25]
VGA_RED[25]

G_CLK_DDC2[25]
G_DAT_DDC2[25]

VGAHSYNC[25]
VGAVSYNC[25]

PANEL_BKEN
ENVDD

LCD_DDCCLK
LCD_DDCDAT

L_CTRL_CLK
L_CTRL_DATA

R76 2.37KR76 2.37K

LVDS_VBG

PAD

PAD

LVDSA_DATA#3

PAD

PAD

LVDSA_DATA3

PAD

PAD

LVDSB_DATA#3

PAD

PAD

LVDSB_DATA3

PAD

PAD

R272 33R272 33
R273 33R273 33

R82 1KR82 1K

VGA_BLU
VGA_GRN
VGA_RED

For UMA HDMI Function

+3.3V_RUN

DPB_LANE0_N
DPB_LANE0_P

DPB_LANE1_N
DPB_LANE1_P

DPB_LANE2_N
DPB_LANE2_P

DPB_LANE3_N
DPB_LANE3_P

3

IBEX PEAK-M (LVDS,DDI)

U11D

U11D

T48
T47

Y48

AB48

Y45

AB46

V48

AP39
AP41

AT43
AT42

AV53
AV51

BB47
BA52
AY48
AV47

BB48
BA50
AY49
AV48

AP48
AP47

AY53
AT49
AU52
AT53

AY51
AT48
AU50
AT51

AA52
AB53
AD53

V51
V53

Y53
Y51

AD48
AB51

1 2

R98 2.2KR98 2.2K

1 2

R92 2.2KR92 2.2K

C106 0.1UC106 0.1U
C104 0.1UC104 0.1U

C95 0.1UC95 0.1U
C99 0.1UC99 0.1U

C86 0.1UC86 0.1U
C82 0.1UC82 0.1U

C69 0.1UC69 0.1U
C73 0.1UC73 0.1U

L_BKLTEN
L_VDD_EN

L_BKLTCTL
L_DDC_CLK

L_DDC_DATA
L_CTRL_CLK

L_CTRL_DATA
LVD_IBG

LVD_VBG
LVD_VREFH

LVD_VREFL

LVDSA_CLK#
LVDSA_CLK

LVDSA_DATA#0
LVDSA_DATA#1
LVDSA_DATA#2
LVDSA_DATA#3

LVDSA_DATA0
LVDSA_DATA1
LVDSA_DATA2
LVDSA_DATA3

LVDSB_CLK#
LVDSB_CLK

LVDSB_DATA#0
LVDSB_DATA#1
LVDSB_DATA#2
LVDSB_DATA#3

LVDSB_DATA0
LVDSB_DATA1
LVDSB_DATA2
LVDSB_DATA3

CRT_BLUE
CRT_GREEN
CRT_RED

CRT_DDC_CLK
CRT_DDC_DATA

CRT_HSYNC
CRT_VSYNC

DAC_IREF
CRT_IRTN

IbexPeak-M_R1P0

IbexPeak-M_R1P0

LVDS

LVDS

CRT

CRT

MB_HDMID_SCL
MB_HDMID_SDA

2

SDVO_TVCLKINN
SDVO_TVCLKINP

SDVO_STALLN
SDVO_STALLP

SDVO_INTN
SDVO_INTP

SDVO_CTRLCLK

SDVO_CTRLDATA

DDPB_AUXN
DDPB_AUXP

DDPB_HPD

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPC_AUXN
DDPC_AUXP

DDPC_HPD

Digital Display Interface

Digital Display Interface

DDPD_CTRLCLK

DDPD_CTRLDATA

DDPD_AUXN
DDPD_AUXP

DDPD_HPD

HDMID_DATA2_N [23]
HDMID_DATA2_P [23]

HDMID_DATA1_N [23]
HDMID_DATA1_P [23]

HDMID_DATA0_N [23]
HDMID_DATA0_P [23]

HDMID_CLK_N [23]
HDMID_CLK_P [23]

DDPB_0N
DDPB_0P
DDPB_1N
DDPB_1P
DDPB_2N
DDPB_2P
DDPB_3N
DDPB_3P

DDPC_0N
DDPC_0P
DDPC_1N
DDPC_1P
DDPC_2N
DDPC_2P
DDPC_3N
DDPC_3P

DDPD_0N
DDPD_0P
DDPD_1N
DDPD_1P
DDPD_2N
DDPD_2P
DDPD_3N
DDPD_3P

BJ46
BG46

BJ48
BG48

BF45
BH45

MB_HDMID_SCL

T51

MB_HDMID_SDA

T53

R95 *1K_NCR95 *1K_NC

BG44

R291 *1K_NCR291 *1K_NC

BJ44

DPB_HPD_Q

AU38

DPB_LANE0_N

BD42

DPB_LANE0_P

BC42

DPB_LANE1_N

BJ42

DPB_LANE1_P

BG42

DPB_LANE2_N

BB40

DPB_LANE2_P

BA40

DPB_LANE3_N

AW38

DPB_LANE3_P

BA38

Y49
AB49

BE44
BD44
AV40

BE40
BD40
BF41
BH41
BD38
BC38
BB36
BA36

U50
U52

BC46
BD46
AT38

BJ40
BG40
BJ38
BG38
BF37
BH37
BE36
BD36

+5V_RUN

1

R294

R294
100K

100K

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

COMPUTER

IBEX PEAK-M 2/6

IBEX PEAK-M 2/6

IBEX PEAK-M 2/6

UM3B/UM6B 1A

UM3B/UM6B 1A

UM3B/UM6B 1A

Q18

Q18

2

2N7002K-T1-E3

2N7002K-T1-E3

MB_HDMID_SCL [23]
MB_HDMID_SDA [23]

3

1

+1.05V_PCH

MB_HDMID_HPD [23]

7 59Friday, October 02, 2009

7 59Friday, October 02, 2009

7 59Friday, October 02, 2009

Display port BDisplay port CDisplay port D

SDVO

5

+RTC_CELL

R308 20K/FR308 20K/F

D D

R348

R348
20K

20K

R346

R346
10K

10K

5

R288 33R288 33

C172

C172
*27P_NC

*27P_NC

50

50

R290 33R290 33
R278 33R278 33
R292 33R292 33

No Reboot strap.

SPKR

PCH_JTAG_TMS
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_RST#

NC all Res. when
PCH is
production stage.

Low = Default.
High = No Reboot.

Res. of TDO
PCH ES1 stage : NC
PCH ES2 stage : pop

ICH_AZ_CODEC_BITCLK[36]

ICH_AZ_CODEC_SYNC[36]
ICH_AZ_CODEC_RST #[27,36]

C C

ICH_AZ_CODEC_SDOUT[36]

Place all series terms close to PCH except for SDIN input
lines,which should be close to source.Placement of R773, R775,
R776 & R777 should equal distance to the T split trace point.
Basically, keep the same distance from T for all series
termination resistors.

+3.3V_RUN

R329

R329
200

200

R333

R333
100

100

SPKR

1 2

R339 *1K_NCR339 *1K_NC

+3.3V_SUS

R351

R351
200

200

R347

R347
100

100

Res. of TDI near PCH

R344

R344
200

200

R349

R349
100

100

B B

A A

R2981MR298
1M

ACZ_BIT_CLK

ACZ_SYNC

ACZ_RST#

ACZ_SDOUT

R293 20K/FR293 20K/F

INTVRMEN(Internal Voltage Regulator Enable) :
This signal enables the internal 1.05 V regulators.
This signal must be always pulled-up to VccRTC.

Flash Descriptor Security Override

GPIO33

Note : GPIO33 is a signal used for Flash
Descriptor Security Override/ME Debug
Mode.This signal should be only asserted
lowthrough an external pull-down in
manufacturing or debug environments
ONLY.

Note : Only pop when PCH is production
stage & need "JTAG boundary Scan".
Remember to depop XDP side Res.

C3841UC384

1U

Low = Enabled
High = Disabled

R332 51R332 51

4

C3931UC393

4

1U

PCH_JTAG_TCK_BUF

3

C394

C394

18P/50V

18P/50V

23

R307

R307

Y3

10M

32.768KHZY332.768KHZ

C395

C395

18P/50V

18P/50V

Cap values depend on Xtal

+RTC_CELL

JTAG
Test Pads are need to put on
the same side of mother board.

R310 330KR310 330K

ICH_AZ_CODEC_SDIN0[36]

10M

4 1

RTC_X1
RTC_X2

RTC_RST#
SRTC_RST#
SM_INTRUDER#

PCH_INVRMEN

ACZ_BIT_CLK
ACZ_SYNC

SPKR[36]

SPKR
ACZ_RST#

ACZ_SDOUT

GPIO33

T13T13
T12T12

PCH_JTAG_TCK_BUF

T60T60

PCH_JTAG_TMS

T62T62

PCH_JTAG_TDI

T63T63

PCH_JTAG_TDO

T58T58
T61T61

SPI_CLK[28]
SPI_CS0#[28]

SPI_SI[28]

SPI_SO[28]

SPI_CLK
SPI_CS0#
SPI_CS1#

T4T4

SPI_SI
SPI_SO

3

IBEX PEAK-M (HDA,JTAG,SATA)

U11A

U11A

B13

RTCX1

D13

RTCX2

C14

RTCRST#

D17

SRTCRST#

A16

INTRUDER#

A14

INTVRMEN

A30

HDA_BCLK

D29

HDA_SYNC

P1

SPKR

C30

HDA_RST#

G30

HDA_SDIN0

F30

HDA_SDIN1

E32

HDA_SDIN2

F32

HDA_SDIN3

B29

HDA_SDO

H32

HDA_DOCK_EN# / GPIO33

J30

HDA_DOCK_RST# / GPIO13

M3

JTAG_TCK

K3

JTAG_TMS

K1

JTAG_TDI

J2

JTAG_TDO

J4

TRST#

BA2

SPI_CLK

AV3

SPI_CS0#

AY3

SPI_CS1#

AY1

SPI_MOSI

AV1

SPI_MISO

IbexPeak-M_R1P0

IbexPeak-M_R1P0

RTCIHDA

RTCIHDA

SPI JTAG

SPI JTAG

+3.3V_RUN

FWH4 / LFRAME#

LDRQ1# / GPIO23

LPC

LPC

SATA

SATA

SATA0GP / GPIO21
SATA1GP / GPIO19

R40 *1K_NCR40 *1K_NC

D33

FWH0 / LAD0

B33

FWH1 / LAD1

C32

FWH2 / LAD2

A32

FWH3 / LAD3

C34
A34

LDRQ0#

F34
AB9

SERIRQ

AK7

SATA0RXN

AK6

SATA0RXP

AK11

SATA0TXN

AK9

SATA0TXP

AH6

SATA1RXN

AH5

SATA1RXP

AH9

SATA1TXN

AH8

SATA1TXP

AF11

SATA2RXN

AF9

SATA2RXP

AF7

SATA2TXN

AF6

SATA2TXP

AH3

SATA3RXN

AH1

SATA3RXP

AF3

SATA3TXN

AF1

SATA3TXP

AD9

SATA4RXN

AD8

SATA4RXP

AD6

SATA4TXN

AD5

SATA4TXP

AD3

SATA5RXN

AD1

SATA5RXP

AB3

SATA5TXN

AB1

SATA5TXP

AF16

SATAICOMPO

AF15

SATAICOMPI

T3

SATALED#

Y9
V1

iTPM ENABLE/DISABLE

SPI_SI

2

IRQ_SERIRQ [27]

SATA_RX0- [32]
SATA_RX0+ [32]
SATA_TX0- [32]
SATA_TX0+ [32]

SATA_RX1- [32]
SATA_RX1+ [32]
SATA_TX1- [32]
SATA_TX1+ [32]

SATA port 2/3 are not support in HM55 .
They are only in PM 55

SATA_COMPPCH_JTAG_RST#

R68 37.4/FR68 37.4/F

R354 10K/FR354 10K/F

1 2

R48 10K/FR48 10K/F

1 2

R337 10K/FR337 10K/F

1 2

TPM Function
Enable Mount
Disable NC

2

+3.3V_RUN

(Default)

+1.05V_PCH

SATA_ACT# [27]

S

S

S

S
p

p

p

p

A

A

A

A
i

i

i

i

T

T

T

T
n

n

n

n

A

A

A

A
1

1

1

1

A

A

A

A

_

_

_

_

8

8

8

8

C

C

C

C
T

T

T

T
P

P

P

P

#

#

#

#

(

(

(

(

G

G

G

G
8

8

8

8

c

c

c

c
o

o

o

o
P

P

P

P

n

n

n

n
G

G

G

G

n

n

n

n
2

2

2

2

e

e

e

e
7

7

7

7

c

c

c

c
t

t

t

t

)

)

)

)

t

t

t

t
o

o

o

o

E

E

E

E
C

C

C

C

1

LPC_LAD0 [27,30]
LPC_LAD1 [27,30]
LPC_LAD2 [27,30]
LPC_LAD3 [27,30]

LPC_LFRAME# [27,30]

SATA HDD

SATA ODD

Distance between the PCH and
cap on the "P" signal should be
identical distace between the
PCH and cap on the "N" signal
for the same pair.

+3.3V_RUN

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

COMPUTER

IBEX PEAK-M 1/6

IBEX PEAK-M 1/6

IBEX PEAK-M 1/6

UM3B/UM6B 1A

UM3B/UM6B 1A

UM3B/UM6B 1A

1

8 59Friday, October 02, 2009

8 59Friday, October 02, 2009

8 59Friday, October 02, 2009

5

4

3

2

1

IBEX PEAK-M (PCI,USB,NVRAM)

Place TX DC blocking caps close PCH.

U11E

U11E

H40

AD0

N34

AD1

C44

AD2

A38

AD3

C36

AD4

J34

AD5

A40

AD6

D45

D D

PCI_PIRQA#

T17T17

PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

T51T51

C C

USB_MCARD1_DET#[30]

BT_DET#[30]

PCIRST#:
DG(V1.0) P277
Can be left unconnected.

PAR:
SC(V1.0) P36
Can be left unconnected
if not using PCI.

PME:
DG(V1.0) P277
Can be left unconnected.

CLK_LPC_DEBUG[30]

B B

CLK_PCI_8502[27]

CLKOUT_PCI[0..4]:
22 ohm series resistor is recommend
(single & double load) on PDG v1.1

Reserve capacitor pads for
improving WWAN.

CLK_LPC_DEBUG
CLK_PCI_8502

Non-iAMT

A A

C51 *0.047U_NC

C51 *0.047U_NC

PCI_PLTRST#

0214

R93 33R93 33
R94 33R94 33

CLK_PCI_FB CLK_PCI_FB_C

R86 33R86 33

50

50 R282 8.2K/FR282 8.2K/FR432.2K/F R432.2K/F

C117 *27P_NC

C117 *27P_NC

50

50

C118 *27P_NC

C118 *27P_NC

Add Buffers as needed for
Loading and fanout concerns.

+3.3V_SUS

5

U4

U4

2

10

10

1

*TC7SZ32FU(T5L,F,T)_NC

*TC7SZ32FU(T5L,F,T)_NC

R61 SJ_0402R61 SJ_0402

2

112

T52T52

T21T21
T20T20
T14T14
T25T25

T26T26

T5T5

T9T9

RSV_SMBALERT#
RSV_ICH_CL_RST1#
ICH_SMBCLK
ICH_SMBDATA
SMB_CLK_ME0
SMB_DATA_ME0
SMB_CLK_ME1
SMB_DATA_ME1
LPD_SPI_INTR#

PEG_CLKREQ#

4

5

PCI_REQ0#
HDMI_PWR_CTRL
SB_WWAN_PCIE_RST#
USB_MCARD1_DET#

GNT0#
GNT#1
GNT#2
GNT#3

PCH_IRQH_GPIO2
SB_WLAN_PCIE_RST#
BT_DET#
PCH_IRQH_GPIO5

PCI_RST#
PCI_SERR#

PCI_PERR#

PCI_IRDY#
PCI_DEVSEL#

PCI_FRAME#
PCI_PLOCK#
PCI_STOP#

PCI_TRDY#
PME#
PCI_PLTRST#

CLK_LPC_DEBUG_C

CLK_PCI_8502_C

PLTRST# [3,27,29,30,37]

E36
H48
E40
C40
M48
M45
F53
M40
M43

J36
K48
F40
C42
K46
M51

J52
K51
L34
F42

J40
G46
F44
M47
H36

J50
G42
H47
G34

G38
H51
B37
A44

F51
A46
B45
M53

F48
K45
F36
H53

B41
K53
A36
A48

K6

E44
E50

A42
H44
F46
C46

D49
D41

C48

M7

D5
N52

P53
P46
P51
P48

IbexPeak-M_R1P0

IbexPeak-M_R1P0

+3.3V_SUS

R31710K/F R31710K/F
R5910K/F R5910K/F
R3192.2K/F R3192.2K/F
R3202.2K/F R3202.2K/F
R3212.2K/F R3212.2K/F

R502.2K/F R502.2K/F
R602.2K/F R602.2K/F
R31810K/F R31810K/F

R33010K/F R33010K/F

AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

C/BE0#
C/BE1#
C/BE2#
C/BE3#

PIRQA#
PIRQB#
PIRQC#
PIRQD#

REQ0#
REQ1# / GPIO50
REQ2# / GPIO52
REQ3# / GPIO54

GNT0#
GNT1# / GPIO51
GNT2# / GPIO53
GNT3# / GPIO55

PIRQE# / GPIO2
PIRQF# / GPIO3
PIRQG# / GPIO4
PIRQH# / GPIO5

PCIRST#
SERR#

PERR#

IRDY#
PAR
DEVSEL#
FRAME#

PLOCK#
STOP#

TRDY#
PME#
PLTRST#
CLKOUT_PCI0

CLKOUT_PCI1
CLKOUT_PCI2
CLKOUT_PCI3
CLKOUT_PCI4

NV_DQ10 / NV_IO10
NV_DQ11 / NV_IO11

NVRAM

NVRAM

NV_DQ12 / NV_IO12
NV_DQ13 / NV_IO13
NV_DQ14 / NV_IO14
NV_DQ15 / NV_IO15

PCI

PCI

USB

USB

BT_DET#
PCH_IRQH_GPIO2
SB_WWAN_PCIE_RST#
SB_WLAN_PCIE_RST#

OC7#
OC5#
OC4#
OC3#

+3.3V_SUS

PCH_IRQH_GPIO5
PCI_REQ0#
PCI_PIRQB#

USB_MCARD1_DET#

+3.3V_RUN

PCI_STOP#
PCI_PIRQA#
PCI_PIRQC#
PCI_IRDY#

+3.3V_RUN

NV_DQ0 / NV_IO0
NV_DQ1 / NV_IO1
NV_DQ2 / NV_IO2
NV_DQ3 / NV_IO3
NV_DQ4 / NV_IO4
NV_DQ5 / NV_IO5
NV_DQ6 / NV_IO6
NV_DQ7 / NV_IO7
NV_DQ8 / NV_IO8
NV_DQ9 / NV_IO9

NV_WR#0_RE#
NV_WR#1_RE#

NV_CE#0
NV_CE#1
NV_CE#2
NV_CE#3

NV_DQS0
NV_DQS1

NV_ALE

NV_CLE

NV_RCOMP

NV_RB#

NV_WE#_CK0
NV_WE#_CK1

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N

USBP9P
USBP10N
USBP10P
USBP11N
USBP11P
USBP12N
USBP12P
USBP13N
USBP13P

USBRBIAS#

USBRBIAS

OC0# / GPIO59
OC1# / GPIO40
OC2# / GPIO41
OC3# / GPIO42
OC4# / GPIO43

OC5# / GPIO9
OC6# / GPIO10
OC7# / GPIO14

RP3

RP3

6
7
8
9

10

10P8R-8.2K

10P8R-8.2K

RP9

RP9

6
7
8
9

10

10P8R-8.2K

10P8R-8.2K

RP4

RP4

6
7
8
9

10

10P8R-8.2K

10P8R-8.2K

4

AY9
BD1
AP15
BD8

AV9
BG8

AP7
AP6
AT6
AT9
BB1
AV6
BB3
BA4
BE4
BB6
BD6
BB7
BC8
BJ8
BJ6
BG6

BD3
AY6

AU2
AV7
AY8

AY5
AV11

BF5

H18
J18
A18
C18
N20
P20
J20
L20
F20
G20
A20
C20
M22
N22
B21
D21
H22
J22
E22
F22
A22
C22
G24
H24
L24
M24
A24
C24

B25
D25

N16
J16
F16
L16
E14
G16
F12
T15

NV_ALE [10]
NV_CLE [10]

ICH_USBP0- [26]
ICH_USBP0+ [26]
ICH_USBP1- [26]
ICH_USBP1+ [26]
ICH_USBP2- [31]
ICH_USBP2+ [31]
ICH_USBP3- [31]
ICH_USBP3+ [31]
ICH_USBP4- [30]
ICH_USBP4+ [30]
ICH_USBP5- [29]
ICH_USBP5+ [29]

USB port 6/7 are not support in HM55 .
They are only in PM 55

ICH_USBP8- [30]
ICH_USBP8+ [30]

ICH_USBP11- [24]
ICH_USBP11+ [24]
ICH_USBP12- [26]
ICH_USBP12+ [26]

USB_BIAS

R299 22.6/FR299 22.6/F

OC0#
OC1#
OC2#
OC3#
OC4#
OC5#
OC6#
OC7#

OC0#~OC7#:
DG(V1.0)P214
Pin Default Port Mapping
OC0# Port0,Port1
OC1# Port2,Port3

R280 8.2K/FR280 8.2K/F
R277 8.2K/FR277 8.2K/F
R270 8.2K/FR270 8.2K/F

5
4
3
2
1

5
4
3
2
1

5
4
3
2
1

+3.3V_SUS

OC2#
OC6#
OC1#
OC0#

+3.3V_RUN

PCI_TRDY#
PCI_FRAME#
HDMI_PWR_CTRL
PCI_PIRQD#

+3.3V_RUN

PCI_SERR#
PCI_PERR#
PCI_PLOCK#
PCI_DEVSEL#

OC0# [26]
OC1# [31]

+3.3V_RUN

Right Side pair to DB
Right Side pair to DB

Left Side pair
Left Side pair for 17"

Mini Card (WLAN)
Mini Card (WWAN)

Mini Card (WPAN)
Express Card

Camera
Card reader

Note : place these
resistors near to PCIe
Slots

PCIE Clock Request

PCIECLKRQ{0,3,4,5,6,7}# should have a
10K pull-up to +V3.3A.PCIECLKRQ{1,2}
should have a 10K pull-up to +3.3S

MiniWWAN

MiniWLAN

LOM

+3.3V_SUS

+3.3V_RUN

MiniWLAN

MiniWWAN

10/100 LOM

R314 10KR314 10K
R53 10KR53 10K
R42 10KR42 10K
R52 10KR52 10K
R323 10KR323 10K

R358 10KR358 10K
R352 10KR352 10K

3

PCIE_RX6-/GLAN_RX-[37]
PCIE_RX6+/GLAN_RX+[37]
PCIE_TX6-/GLAN_TX-[37]
PCIE_TX6+/GLAN_TX+[37]

PCIE_RX1-[29]
PCIE_RX1+[29]
PCIE_TX1-[29]
PCIE_TX1+[29]

PCIE_RX2-[30]
PCIE_RX2+[30]
PCIE_TX2-[30]
PCIE_TX2+[30]

CLK_PCIE_MINI1#[30]
CLK_PCIE_MINI1[30]

MINI1CLK_REQ#[30]

CLK_PCIE_MINI2#[29]
CLK_PCIE_MINI2[29]

MINI2CLK_REQ#[29]

CLK_PCIE_LOM#[37]
CLK_PCIE_LOM[37]

LOM_CLK_REQ#[37]

MINI2CLK_REQ#
CARD_CLK_REQ#
CLK_PCIE_REQ5#
CLK_PEG0_REQ#
LOM_CLK_REQ#

MINI1CLK_REQ#
CLK_PCIE_REQ2#

C387 0.1UC387 0.1U
C388 0.1UC388 0.1U

C79 0.1UC79 0.1U
C84 0.1UC84 0.1U

C92 0.1UC92 0.1U
C88 0.1UC88 0.1U

CLK_PCIE_REQ5#

IBEX PEAK-M (PCI-E,SMBUS,CLK)

U11B

U11B

BG30

PERN1

BJ30

PCIE_TXN1_C
PCIE_TXP1_C

PCIE_TXN2_C
PCIE_TXP2_C

PCIE_TXN6_C
PCIE_TXP6_C

CLK_PEG0_REQ#

MINI1CLK_REQ#

CLK_PCIE_REQ2#

MINI2CLK_REQ#

CARD_CLK_REQ#

LOM_CLK_REQ#

SMB_CLK_ME1

SMB_DATA_ME1

PERP1

BF29

PETN1

BH29

PETP1

AW30

PERN2

BA30

PERP2

BC30

PETN2

BD30

PETP2

AU30

PERN3

AT30

PERP3

AU32

PETN3

AV32

PETP3

BA32

PERN4

BB32

PERP4

BD32

PETN4

BE32

PETP4

BF33

PERN5

BH33

PERP5

BG32

PETN5

BJ32

PETP5

BA34

PERN6

AW34

PERP6

BC34

PETN6

BD34

PETP6

AT34

PERN7

AU34

PERP7

AU36

PETN7

AV36

PETP7

BG34

PERN8

BJ34

PERP8

BG36

PETN8

BJ36

PETP8

AK48

CLKOUT_PCIE0N

AK47

CLKOUT_PCIE0P

P9

PCIECLKRQ0# / GPIO73

AM43

CLKOUT_PCIE1N

AM45

CLKOUT_PCIE1P

U4

PCIECLKRQ1# / GPIO18

AM47

CLKOUT_PCIE2N

AM48

CLKOUT_PCIE2P

N4

PCIECLKRQ2# / GPIO20

AH42

CLKOUT_PCIE3N

AH41

CLKOUT_PCIE3P

A8

PCIECLKRQ3# / GPIO25

AM51

CLKOUT_PCIE4N

AM53

CLKOUT_PCIE4P

M9

PCIECLKRQ4# / GPIO26

AJ50

CLKOUT_PCIE5N

AJ52

CLKOUT_PCIE5P

H6

PCIECLKRQ5# / GPIO44

AK53

CLKOUT_PEG_B_N

AK51

CLKOUT_PEG_B_P

P13

PEG_B_CLKRQ# / GPIO56

IbexPeak-M_R1P0

IbexPeak-M_R1P0

CLKOUT_PEG_A_P/N,CLKOUT_PEG_B_P/N,
CLKOUT_DMI_P/N,support GEN-1 and GEN-2

+3.3V_SUS

+3.3V_SUS

2

Q6

Q6

2

2N7002W-7-F

2N7002W-7-F

31

Q7

Q7

2

2N7002W-7-F

2N7002W-7-F

31

PCI-E*

PCI-E*

SML0ALERT# / GPIO60

SML1ALERT# / GPIO74

SMBus

SMBus

Link

Link

Controller

Controller

PEG_A_CLKRQ# / GPIO47

PEG

PEG

CLKOUT_DP_N / CLKOUT_BCLK1_N
CLKOUT_DP_P / CLKOUT_BCLK1_P

From CLK BUFFER

From CLK BUFFER

CLKIN_SATA_N / CKSSCD_N
CLKIN_SATA_P / CKSSCD_P

CLKOUTFLEX0 / GPIO64

CLKOUTFLEX1 / GPIO65

CLKOUTFLEX2 / GPIO66

CLKOUTFLEX3 / GPIO67

Clock Flex

Clock Flex

SMBCLK1 [27]

SMBDAT1 [27]

RSV_SMBALERT#

SMBALERT# / GPIO11

SML1CLK / GPIO58

SML1DATA / GPIO75

CLKOUT_PEG_A_N
CLKOUT_PEG_A_P

CLKOUT_DMI_N
CLKOUT_DMI_P

CLKIN_BCLK_N
CLKIN_BCLK_P

CLKIN_DOT_96N
CLKIN_DOT_96P

CLKIN_PCILOOPBACK

XCLK_RCOMP

B9

ICH_SMBCLK

H14

SMBCLK

SMBDATA

SML0CLK

SML0DATA

CL_CLK1
CL_DATA1
CL_RST1#

CLKIN_DMI_N

CLKIN_DMI_P

REFCLK14IN

XTAL25_IN

XTAL25_OUT

ICH_SMBDATA

C8

RSV_ICH_CL_RST1#

J14

SMB_CLK_ME0

C6

SMB_DATA_ME0

G8

LPD_SPI_INTR#

M14

SMB_CLK_ME1

E10

SMB_DATA_ME1

G12

T13
T11
T9

PEG_CLKREQ#

H1

AD43
AD45

AN4
AN2

AT1
AT3

AW24
BA24

AP3
AP1

F18
E18

AH13
AH12

P41

CLK_PCI_FB

J42

XTAL25_IN

AH51

XTAL25_OUT

AH53

XCLK_RCOMP

AF38

CLK_FLEX0

T45

CLK_FLEX1

P43

CLK_FLEX2

T42

CLK_FLEX3

N50

CLKOUTFLEX3:
EDS(V1.0) :support 48MHz
33MHz and 14.31818MHz.

CLKOUTFLEX[0..3]:
PDG v1.1: 22 ohm series resistor is
recommend (PCI & non PCI routing,
single & double load)

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

COMPUTER

IBEX PEAK-M 3/6

IBEX PEAK-M 3/6

IBEX PEAK-M 3/6

UM3B/UM6B 1A

UM3B/UM6B 1A

UM3B/UM6B 1A

CLKIN_PCILOOPBACK:
PDG (V1.1): 22 ohm series resistor
is recommend

R99 *0_NCR99 *0_NC

R77 90.9/FR77 90.9/F

T16T16

T18T18

T15T15

T23T23

1

T56T56

ICH_SMBCLK [30]
ICH_SMBDATA [30]

T7T7

T11T11

SML0CLK/SML0DATA:
DG(V1.1) P255: The 82577 SMBus
signals
(SMB_DATA and SMB_CLK) cannot be
connected to any other
devices other than the PCH.
Connect the SMB_DATA and SMB_CLK
pins
to the PCH SML0DATA and SML0CLK
pins,
respectively.

CLK_PCIE_3GPLL# [3]
CLK_PCIE_3GPLL [3]

DREFSSCLK# [3]
DREFSSCLK [3]

CLK_BUF_PCIE_3GPLL# [15]
CLK_BUF_PCIE_3GPLL [15]

CLK_BUF_BCLK_N [15]
CLK_BUF_BCLK_P [15]

CLK_BUF_DREFCLK# [15]
CLK_BUF_DREFCLK [15]

CLK_SATA_DREFSSCLK# [15]
CLK_SATA_DREFSSCLK [15]

CLK_ICH_14M [15]

0214

+1.05V_PCH

XTAL25_OUT

R4551MR455
1M

XTAL25_IN

C122

C122

Y2

2 1

25MHzY225MHz

C121

27P

27P

50

50

NPO

NPO

C121

27P

27P

NPO

NPO

9 59Friday, October 02, 2009

9 59Friday, October 02, 2009

9 59Friday, October 02, 2009

50

50

5

4

3

2

1

IBEX PEAK-M (GPIO,VSS_NCTF,RSVD)

U11F

S_GPIO

T10T10

112

SIO_EXT_SMI#
SIO_EXT_SCI#
SIO_EXT_WAKE#

LAN_PHY_PWR_CTRL

SATA4GP
PCIE_MCARD1_DET#_R

2

PCIE_MCARD2_DET#

GPIO27
TP_PCH_GPIO28
USB_MCARD2_DET#

GPIO35
SATA2GP
SATA3GP
WLAN_RADIO_DIS#
BT_RADIO_DIS#
GPIO45
GPIO46
WWAN_RADIO_DIS#
CRIT_TEMP_REP#
GPIO57

SIO_EXT_SMI#[27]
SIO_EXT_SCI#[27]

PCIE_MCARD2_DET#[29]

SIO_EXT_WAKE#[27]

USB_MCARD2_DET#[29]

WLAN_RADIO_DIS#[30]

R83 SJ_0402R83 SJ_0402

R46 *10K_NCR46 *10K_NC

R39 10K/FR39 10K/F

D D

PCIE_MCARD1_DET#[30]

GPIO24 register not cleared by CF9h reset event.
GPIO27 reserve for internal VR.

BT_RADIO_DIS#[30]

C C

WWAN_RADIO_DIS#[29]

CRIT_TEMP_REP#[27]

B B

U11F

Y3

BMBUSY# / GPIO0

C38

TACH1 / GPIO1

D37

TACH2 / GPIO6

J32

TACH3 / GPIO7

F10

GPIO8

K9

LAN_PHY_PWR_CTRL / GPIO12

T7

GPIO15

AA2

SATA4GP / GPIO16

F38

TACH0 / GPIO17

Y7

SCLOCK / GPIO22

H10

GPIO24

AB12

GPIO27

V13

GPIO28

M11

STP_PCI# / GPIO34

V6

SATACLKREQ# / GPIO35

AB7

SATA2GP / GPIO36

AB13

SATA3GP / GPIO37

V3

SLOAD / GPIO38

P3

SDATAOUT0 / GPIO39

H3

PCIECLKRQ6# / GPIO45

F1

PCIECLKRQ7# / GPIO46

AB6

SDATAOUT1 / GPIO48

AA4

SATA5GP / GPIO49

F8

GPIO57

A4

VSS_NCTF_1

A49

VSS_NCTF_2

A5

VSS_NCTF_3

A50

VSS_NCTF_4

A52

VSS_NCTF_5

A53

VSS_NCTF_6

B2

VSS_NCTF_7

B4

VSS_NCTF_8

B52

VSS_NCTF_9

B53

VSS_NCTF_10

BE1

VSS_NCTF_11

BE53

VSS_NCTF_12

BF1

VSS_NCTF_13

BF53

VSS_NCTF_14

BH1

VSS_NCTF_15

BH2

VSS_NCTF_16

BH52

VSS_NCTF_17

BH53

VSS_NCTF_18

BJ1

VSS_NCTF_19

BJ2

VSS_NCTF_20

BJ4

VSS_NCTF_21

BJ49

VSS_NCTF_22

BJ5

VSS_NCTF_23

BJ50

VSS_NCTF_24

BJ52

VSS_NCTF_25

BJ53

VSS_NCTF_26

D1

VSS_NCTF_27

D2

VSS_NCTF_28

D53

VSS_NCTF_29

E1

VSS_NCTF_30

E53

VSS_NCTF_31

IbexPeak-M_R1P0

IbexPeak-M_R1P0

MISC

MISC

CLKOUT_BCLK0_N / CLKOUT_PCIE8N
CLKOUT_BCLK0_P / CLKOUT_PCIE8P

GPIO

GPIO

CPU

CPU

NCTF

NCTF

RSVD

RSVD

CLKOUT_PCIE6N
CLKOUT_PCIE6P

CLKOUT_PCIE7N
CLKOUT_PCIE7P

A20GATE

PECI

RCIN#

PROCPWRGD

THRMTRIP#

TP10
TP11
TP12
TP13
TP14
TP15
TP16
TP17
TP18
TP19
NC_1
NC_2
NC_3
NC_4
NC_5

INIT3_3V#

TP24

AH45
AH46

AF48
AF47

U2

AM3
AM1
BG10
T1
BE10
BD10

PCH_THRMTRIP#_R

R64 56/FR64 56/F

SIO_A20GATE [27]

CLK_CPU_BCLK# [3]
CLK_CPU_BCLK [3]
H_PECI [3]
SIO_RCIN# [27]
H_PWRGOOD [3]

+1.05V_VTT

R67

R67
56/F

56/F

H_THERM [3]

(Both these should be close to PCH)

BA22

TP1

AW22

TP2

BB22

TP3

AY45

TP4

AY46

TP5

AV43

TP6

AV45

TP7

AF13

TP8

M18

TP9

N18
AJ24
AK41
AK42
M32
N32
M30
N30
H12
AA23
AB45
AB38
AB42
AB41
T39

P6
C10

DMI Termination Voltage

NV_CLE

NV_ALE[9]
NV_CLE[9]

Danbury Technology Enabled

NV_ALE

TP_PCH_GPIO28
GPIO45
GPIO46
GPIO57
LAN_PHY_PWR_CTRL

SIO_EXT_SMI#
SIO_EXT_SCI#
SIO_EXT_WAKE#
PCIE_MCARD2_DET#

PCIE_MCARD1_DET#_R

WLAN_RADIO_DIS#
BT_RADIO_DIS#

SIO_RCIN#
SIO_A20GATE
SATA2GP
CRIT_TEMP_REP#
SATA3GP
SATA4GP
USB_MCARD2_DET#

Set to Vcc when LOW
Set to Vcc/2 when HIGH

R58 *1K_NCR58 *1K_NC
R56 *1K_NCR56 *1K_NC

High = Enable
Low = Disable

R41 10K/FR41 10K/F
R326 10K/FR326 10K/F
R45 10K/FR45 10K/F
R55 10K/FR55 10K/F
R44 10K/FR44 10K/F

R78 10K/FR78 10K/F
R81 10K/FR81 10K/F
R75 10K/FR75 10K/F
R38 10K/FR38 10K/F

R80 10K/FR80 10K/F
R353 10K/FR353 10K/F
R355 10K/FR355 10K/F

R338 10K/FR338 10K/F
R359 10K/FR359 10K/F
R47 10K/FR47 10K/F
R334 10K/FR334 10K/F
R49 10K/FR49 10K/F
R335 10K/FR335 10K/F
R54 10K/FR54 10K/F

+3.3V_SUS

+3.3V_RUN

+NVRAM_VCCQ

+3.3V_RUN

BMBUSY#:
If not used, require a weak pull-up (8.2- KΩ to 10 kΩ) to Vcc3_3.

A A

S_GPIO

WWAN_RADIO_DIS#

R336 10K/FR336 10K/F
R36 10K/FR36 10K/F

WWAN_RADIO_DIS# 1-X High = Strong (Default)

5

4

3

CRB(V1.0)P28: it has 1K PU and 100 ohm on this net for validation purpose.

BMBUSY#:(Intel feedback)
Follow CRB checklist, 1K is
for intel BIOS validation purpose.

Title

Title

Title

IBEX PEAK-M 4/6

IBEX PEAK-M 4/6

IBEX PEAK-M 4/6

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

UM3B/UM6B 1A

UM3B/UM6B 1A

UM3B/UM6B 1A

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

10 59Friday, October 02, 2009

10 59Friday, October 02, 2009

10 59Friday, October 02, 2009

1

5

U11G

IBEX PEAK-M (POWER)

D D

VCCAPLLEXP = 100mA max

VCCAPLLEXP:
This pin can be left as no connect in
On-Die VR enabled mode (default).

+1.05V_PCH

+1.05V_PCH = 3.208A max

C C

+1.05V_PCH

L35 *1uH_NCL35 *1uH_NC

C52

C52
10U

10U

10

10
805

805

+1.05V_PCH

+1.05V_PCH

C811UC81
1U

+3.3V_RUN

VCCCORE=1.524A max

C54

C54

C661UC66

10U

10U

10

10

1U

805

805

+1.05V_LAN_VCCAPLL_EXP

C390

C390
*10U_NC

*10U_NC

C801UC80

C681UC68

1U

C711UC71

1U

1U

VCC3_3 = 0.357A max

C91

C91

0.1U

0.1U

VCCFDIPLL = 100mA max

+1.05V_PCH

B B

A A

L36 *1uH_NCL36 *1uH_NC

5

VCCVRM = 0.035A max

+1.5VS_1.8VS

+1.05V_VCCFDIPLL

+1.05V_PCH

C399

C399
*10U_NC

*10U_NC

VCCIO = 3.208A max

+1.05V_PCH

U11G

AB24

VCCCORE[1]

AB26

VCCCORE[2]

AB28

VCCCORE[3]

AD26

VCCCORE[4]

AD28

VCCCORE[5]

AF26

VCCCORE[6]

AF28

VCCCORE[7]

AF30

VCCCORE[8]

AF31

VCCCORE[9]

AH26

VCCCORE[10]

AH28

VCCCORE[11]

AH30

VCCCORE[12]

AH31

VCCCORE[13]

AJ30

VCCCORE[14]

AJ31

VCCCORE[15]

AK24

VCCIO[24]

BJ24

VCCAPLLEXP

AN20

VCCIO[25]

AN22

VCCIO[26]

AN23

VCCIO[27]

AN24

VCCIO[28]

AN26

VCCIO[29]

AN28

VCCIO[30]

BJ26

VCCIO[31]

BJ28

VCCIO[32]

AT26

VCCIO[33]

AT28

VCCIO[34]

AU26

VCCIO[35]

AU28

VCCIO[36]

AV26

VCCIO[37]

AV28

VCCIO[38]

AW26

VCCIO[39]

AW28

VCCIO[40]

BA26

VCCIO[41]

BA28

VCCIO[42]

BB26

VCCIO[43]

BB28

VCCIO[44]

BC26

VCCIO[45]

BC28

VCCIO[46]

BD26

VCCIO[47]

BD28

VCCIO[48]

BE26

VCCIO[49]

BE28

VCCIO[50]

BG26

VCCIO[51]

BG28

VCCIO[52]

BH27

VCCIO[53]

AN30

VCCIO[54]

AN31

VCCIO[55]

AN35

VCC3_3[1]

AT22

VCCVRM[1]

BJ18

VCCFDIPLL

AM23

VCCIO[1]

IbexPeak-M_R1P0

IbexPeak-M_R1P0

R345 SJ_0402R345 SJ_0402

+1.8V_RUN

R350 SJ_0805R350 SJ_0805

+3.3V_RUN

L11 10uHL11 10uH

R69 *0_NCR69 *0_NC
R328 *0_NCR328 *0_NC

R343 *0_NCR343 *0_NC

+1.05V_PCH

PCH EDS(V1.0) P84
+NVRAM_VCCQ:

1.8 V supply for Dual Channel NAND interface.
This power is supplied by core
well. If unused, this pin should
be connected to Vcc3_3.

4

POWER

POWER

VCC CORE

VCC CORE

PCI E*

PCI E*

2

112

2

112

+1.1V_VCCADPLLA

+

+

C123

C123
220U

220U

3528

3528

+1.1V_VCCADPLLB

+

+

C120

C120
220U

220U

3528

3528

4

+VCCA_DAC_1_2

AE50

VCCADAC[1]

AE52

VCCADAC[2]

AF53

VSSA_DAC[1]
VSSA_DAC[2]

VCCALVDS

VSSA_LVDS

VCC3_3[2]
VCC3_3[3]
VCC3_3[4]

VCCVRM[2]

VCCDMI[1]
VCCDMI[2]

VCCPNAND[1]
VCCPNAND[2]
VCCPNAND[3]
VCCPNAND[4]
VCCPNAND[5]
VCCPNAND[6]
VCCPNAND[7]
VCCPNAND[8]
VCCPNAND[9]

VCCME3_3[1]
VCCME3_3[2]
VCCME3_3[3]
VCCME3_3[4]

AF51

AH38
AH39

AP43
AP45
AT46
AT45

AB34
AB35
AD35

VCCVRM = 0.035A max

AT24

VCCDMI = 0.061A max

AT16
AU16

AM16
AK16

VCCPNAND = 0.156A max

AK20
AK19
AK15
AK13
AM12
AM13
AM15

VCCME3_3 = 0.085A max

AM8
AM9
AP11
AP9

CRTLVDS

CRTLVDS

VCCTX_LVDS[1]
VCCTX_LVDS[2]
VCCTX_LVDS[3]
VCCTX_LVDS[4]

HVCMOS

HVCMOS

DMI

DMI

NAND / SPI

NAND / SPI

FDI

FDI

VCCME3_3:
EDS(V1.0)P84:supply for the Intel Management Engine.This is a separate power plane
that may or may not be powered in S3–S5 states.
This plane must be on in S0
and other times the Intel Management Engine is used.

+1.5VS_1.8VS+1.5V_RUN

+NVRAM_VCCQ

C1161UC116
1U

C1141UC114
1U

C376

C376

C383

C383

0.1U

0.1U

0.01U

0.01U

+3.3V_RUN

C105

C105

C100

C100

0.01U

0.01U

0.01U

0.01U

+3.3V_RUN

C97

C97

0.1U

0.1U

+1.5VS_1.8VS

R65 SJ_0402R65 SJ_0402

C581UC58
1U

+NVRAM_VCCQ

C57

C57

0.1U

0.1U

+3.3V_RUN

C94

C94

0.1U

0.1U

12

C375

C375
10U

10U

6.3

6.3

+1.05V_PCH

L14 0.1uHL14 0.1uH
C126

C126
22U

22U

VCC3_3 = 0.357A max

2

112

R66 *0_NCR66 *0_NC

C112

C112
22U

22U

805

805
4

4

L33 *10uH_NCL33 *10uH_NC

VCCME = 1.998A max

+1.05V_PCH

+1.05V_PCH

+1.05V_VTT
+1.05V_PCH

3

L32

L32

1 2

BLM18PG181SN1

BLM18PG181SN1

VCCACLK = 100mA max

+1.8V_RUN

C721UC72

1U

C53

C53

C55

C55

22U

22U

C48 0.1UC48 0.1U

+1.5VS_1.8VS

VCCADPLLA = 0.072A max

+1.1V_VCCADPLLA

VCCADPLLB = 0.073A max

+1.1V_VCCADPLLB

VCCIO = 3.208A max

+1.05V_PCH

VCCSUS3_3 = 0.163A max

+3.3V_SUS

VCC3_3 = 0.357A max

+3.3V_RUN

V_CPU>1mA

+1.05V_VTT

C63

C63

4.7U

4.7U

+RTC_CELL

VCCRTC = 2mA max

3

VCCADAC = 100mA max

+3.3V_RUN

+1.1V_LAN_VCCA_CLK

C382

C382

C380

C380

*1U_NC

*1U_NC

*10U_NC

*10U_NC

DCPSUSBYP

C65

C65

0.1U

0.1U

C981UC98

22U

22U

1U

DCPRTC

C831UC83

C901UC90

C1031UC103

1U

1U

1U

DCPSST

C47 0.1UC47 0.1U

DCPSUS

C64 0.1UC64 0.1U

C74

C74

0.1U

0.1U

C93

C93

0.1U

0.1U

C61

C61

C62

C62

0.1U

0.1U

0.1U

0.1U

C402

C402
C4001UC400
1U

0.1U

0.1U

C405

C405

0.1U

0.1U

AP51
AP53

AF23
AF24

AD38
AD39
AD41
AF43
AF41
AF42

AU24

BB51
BB53

BD51
BD53

AH23
AJ35
AH35

AF34
AH34
AF32

AT18

AU18

U11J

U11J

VCCACLK[1]
VCCACLK[2]

VCCLAN[1]
VCCLAN[2]

Y20

DCPSUSBYP

VCCME[1]
VCCME[2]
VCCME[3]
VCCME[4]
VCCME[5]
VCCME[6]

V39

VCCME[7]

V41

VCCME[8]

V42

VCCME[9]

Y39

VCCME[10]

Y41

VCCME[11]

Y42

VCCME[12]

V9

DCPRTC

VCCVRM[3]

VCCADPLLA[1]
VCCADPLLA[2]

VCCADPLLB[1]
VCCADPLLB[2]

VCCIO[21]
VCCIO[22]
VCCIO[23]

VCCIO[2]
VCCIO[3]
VCCIO[4]

V12

DCPSST

Y22

DCPSUS

P18

VCCSUS3_3[29]

U19

VCCSUS3_3[30]

U20

VCCSUS3_3[31]

U22

VCCSUS3_3[32]

V15

VCC3_3[5]

V16

VCC3_3[6]

Y16

VCC3_3[7]

V_CPU_IO[1]

V_CPU_IO[2]

A12

VCCRTC

IbexPeak-M_R1P0

IbexPeak-M_R1P0

POWER

POWER

USB

USB

Clock and Miscellaneous

Clock and Miscellaneous

PCI/GPIO/LPC

PCI/GPIO/LPC

SATA

SATA

CPU

CPU

RTC PCI/GPIO/LPC

RTC PCI/GPIO/LPC

HDA

HDA

2

VCCIO[5]
VCCIO[6]
VCCIO[7]
VCCIO[8]

VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]
VCCSUS3_3[5]
VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]

VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]
VCCSUS3_3[21]
VCCSUS3_3[22]
VCCSUS3_3[23]
VCCSUS3_3[24]
VCCSUS3_3[25]
VCCSUS3_3[26]
VCCSUS3_3[27]

VCCSUS3_3[28]

VCCIO[56]

V5REF_SUS

V5REF

VCC3_3[8]

VCC3_3[9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]

VCC3_3[14]

VCCSATAPLL[1]
VCCSATAPLL[2]

VCCIO[9]

VCCVRM[4]

VCCIO[10]

VCCIO[11]

VCCIO[12]

VCCIO[13]

VCCIO[14]

VCCIO[15]

VCCIO[16]

VCCIO[17]

VCCIO[18]

VCCIO[19]

VCCIO[20]
VCCME[13]

VCCME[14]
VCCME[15]
VCCME[16]

VCCSUSHDA

2

V24
V26
Y24
Y26

V28
U28
U26
U24
P28
P26
N28
N26
M28
M26
L28
L26
J28
J26
H28
H26
G28
G26
F28
F26
E28
E26
C28
C26
B27
A28
A26

U23
V23
F24

K49

J38
L38
M36
N36
P36
U35

AD13

AK3
AK1

AH22

AT20

AH19
AD20
AF22
AD19

AF20
AF19
AH20

AB19
AB20
AB22
AD22

AA34
Y34
Y35
AA35

L30

+V5REF_SUS

+V5REF

C50

C50
*1U_NC

*1U_NC

C761UC76
1U

C77

C77

C75

C75

0.1U

0.1U

0.1U

0.1U

VCCIO = 3.208A max

+1.05V_PCH

R70 100R70 100
D11 SDM10K45-7-FD11 SDM10K45-7-F

C671UC67
1U

R97 100R97 100

D12 SDM10K45-7-FD12 SDM10K45-7-F
C1151UC115
1U

C87

C87

0.1U

0.1U

C59

C59

0.1U

0.1U

+1.05V_VCCSATAPLL

C49

C49
*10U_NC

*10U_NC

VCCVRM = 0.035A max

+1.5VS_1.8VS

VCCME = 1.998A max

+1.05V_PCH

R72 SJ_0402R72 SJ_0402

112

C851UC85
1UL12 10uHL12 10uH

1

VCCIO = 3.208A max

+1.05V_PCH

VCCSUS3_3 = 0.163A max

+3.3V_SUS

1 2

21

1 2

21

+3.3V_RUN

L10 *10uH_NCL10 *10uH_NC

+5V_SUS

V5REF_SUS>1mA

+3.3V_SUS

V5REF>1mA

+5V_RUN
+3.3V_RUN

VCC3_3 = 0.357A max

+1.05V_PCH

VCCIO = 3.208A max

+1.05V_PCH

C781UC78
1U

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

VCCSUSHDA = 6mA max

+3.3V_SUS

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

IBEX PEAK-M 5/6

IBEX PEAK-M 5/6

IBEX PEAK-M 5/6

UM3B/UM6B 1A

UM3B/UM6B 1A

UM3B/UM6B 1A

1

11 59W ednesday, September 30, 2009

11 59W ednesday, September 30, 2009

11 59W ednesday, September 30, 2009

5

IBEX PEAK-M (GND)

U11H

U11H

D D

C C

B B

AB16

AA19
AA20
AA22

AM19

AA24
AA26
AA28
AA30
AA31
AA32
AB11
AB15
AB23
AB30
AB31
AB32
AB39
AB43
AB47

AC52
AD11
AD12
AD16
AD23
AD30
AD31
AD32
AD34
AU22
AD42
AD46
AD49

AF12
AH49
AF35

AP13
AN34
AF45
AF46
AF49

AG52
AH11
AH15
AH16
AH24
AH32
AV18
AH43
AH47

AJ19
AJ20

AJ22
AJ23
AJ26
AJ28
AJ32
AJ34

AK12
AM41
AN19
AK26
AK22
AK23
AK28

AB5
AB8
AC2

AD7
AE2
AE4

Y13

AU4

AF5
AF8

AG2

AH7

AJ2

AT5
AJ4

VSS[0]
VSS[1]

VSS[2]
VSS[3]
VSS[4]
VSS[5]
VSS[6]
VSS[7]
VSS[8]
VSS[9]
VSS[10]
VSS[11]
VSS[12]
VSS[13]
VSS[14]
VSS[15]
VSS[16]
VSS[17]
VSS[18]
VSS[19]
VSS[20]
VSS[21]
VSS[22]
VSS[23]
VSS[24]
VSS[25]
VSS[26]
VSS[27]
VSS[28]
VSS[29]
VSS[30]
VSS[31]
VSS[32]
VSS[33]
VSS[34]
VSS[35]
VSS[36]
VSS[37]
VSS[38]
VSS[39]
VSS[40]
VSS[41]
VSS[42]
VSS[43]
VSS[44]
VSS[45]
VSS[46]
VSS[47]
VSS[48]
VSS[49]
VSS[50]
VSS[51]
VSS[52]
VSS[53]
VSS[54]
VSS[55]
VSS[56]
VSS[57]
VSS[58]
VSS[59]
VSS[60]
VSS[61]
VSS[62]
VSS[63]
VSS[64]
VSS[65]
VSS[66]
VSS[67]
VSS[68]
VSS[69]
VSS[70]
VSS[71]
VSS[72]
VSS[73]
VSS[74]
VSS[75]
VSS[76]
VSS[77]
VSS[78]
VSS[79]

IbexPeak-M_R1P0

IbexPeak-M_R1P0

VSS[80]
VSS[81]
VSS[82]
VSS[83]
VSS[84]
VSS[85]
VSS[86]
VSS[87]
VSS[88]
VSS[89]
VSS[90]
VSS[91]
VSS[92]
VSS[93]
VSS[94]
VSS[95]
VSS[96]
VSS[97]
VSS[98]

VSS[99]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]

AK30
AK31
AK32
AK34
AK35
AK38
AK43
AK46
AK49
AK5
AK8
AL2
AL52
AM11
BB44
AD24
AM20
AM22
AM24
AM26
AM28
BA42
AM30
AM31
AM32
AM34
AM35
AM38
AM39
AM42
AU20
AM46
AV22
AM49
AM7
AA50
BB10
AN32
AN50
AN52
AP12
AP42
AP46
AP49
AP5
AP8
AR2
AR52
AT11
BA12
AH48
AT32
AT36
AT41
AT47
AT7
AV12
AV16
AV20
AV24
AV30
AV34
AV38
AV42
AV46
AV49
AV5
AV8
AW14
AW18
AW2
BF9
AW32
AW36
AW40
AW52
AY11
AY43
AY47

4

BG12

BG18
BG24

BG50

BB12
BB16
BB20
BB24
BB30
BB34
BB38
BB42
BB49

BC10
BC14
BC18

BC22
BC32
BC36
BC40
BC44
BC52

BD48
BD49

BE12
BE16
BE20
BE24
BE30
BE34
BE38
BE42
BE46
BE48
BE50

BF49
BF51

BH11
BH15
BH19
BH23
BH31
BH35
BH39
BH43
BH47

AF39

AY7
B11
B15
B19
B23
B31
B35
B39
B43
B47

B7

BB5

BC2

BH9

BD5

BE6
BE8
BF3

BG4

BH7
C12
C50
D51
E12
E16
E20
E24
E30
E34
E38
E42
E46
E48

E6
E8

F49

F5
G10
G14
G18

G2
G22
G32
G36
G40
G44
G52

H16
H20
H30
H34
H38
H42

U11I

U11I

VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]
VSS[199]
VSS[200]
VSS[201]
VSS[202]
VSS[203]
VSS[204]
VSS[205]
VSS[206]
VSS[207]
VSS[208]
VSS[209]
VSS[210]
VSS[211]
VSS[212]
VSS[213]
VSS[214]
VSS[215]
VSS[216]
VSS[217]
VSS[218]
VSS[219]
VSS[220]
VSS[221]
VSS[222]
VSS[223]
VSS[224]
VSS[225]
VSS[226]
VSS[227]
VSS[228]
VSS[229]
VSS[230]
VSS[231]
VSS[232]
VSS[233]
VSS[234]
VSS[235]
VSS[236]
VSS[237]
VSS[238]
VSS[239]
VSS[240]
VSS[241]
VSS[242]
VSS[243]
VSS[244]
VSS[245]
VSS[246]
VSS[247]
VSS[248]
VSS[249]
VSS[250]
VSS[251]
VSS[252]
VSS[253]
VSS[254]
VSS[255]
VSS[256]
VSS[257]
VSS[258]

IbexPeak-M_R1P0

IbexPeak-M_R1P0

VSS[259]
VSS[260]
VSS[261]
VSS[262]
VSS[263]
VSS[264]
VSS[265]
VSS[266]
VSS[267]
VSS[268]
VSS[269]
VSS[270]
VSS[271]
VSS[272]
VSS[273]
VSS[274]
VSS[275]
VSS[276]
VSS[277]
VSS[278]
VSS[279]
VSS[280]
VSS[281]
VSS[282]
VSS[283]
VSS[284]
VSS[285]
VSS[286]
VSS[287]
VSS[288]
VSS[289]
VSS[290]
VSS[291]
VSS[292]
VSS[293]
VSS[294]
VSS[295]
VSS[296]
VSS[297]
VSS[298]
VSS[299]
VSS[300]
VSS[301]
VSS[302]
VSS[303]
VSS[304]
VSS[305]
VSS[306]
VSS[307]
VSS[308]
VSS[309]
VSS[310]
VSS[311]
VSS[312]
VSS[313]
VSS[314]
VSS[315]
VSS[316]
VSS[317]
VSS[318]
VSS[319]
VSS[320]
VSS[321]
VSS[322]
VSS[323]
VSS[324]
VSS[325]
VSS[326]
VSS[327]
VSS[328]
VSS[329]
VSS[330]
VSS[331]
VSS[332]
VSS[333]
VSS[334]
VSS[335]
VSS[336]
VSS[337]
VSS[338]
VSS[339]
VSS[340]
VSS[341]
VSS[342]
VSS[343]
VSS[344]
VSS[345]
VSS[346]
VSS[347]
VSS[348]
VSS[349]
VSS[350]
VSS[351]
VSS[352]
VSS[353]
VSS[354]
VSS[355]
VSS[356]
VSS[366]

H49
H5
J24
K11
K43
K47
K7
L14
L18
L2
L22
L32
L36
L40
L52
M12
M16
M20
N38
M34
M38
M42
M46
M49
M5
M8
N24
P11
AD15
P22
P30
P32
P34
P42
P45
P47
R2
R52
T12
T41
T46
T49
T5
T8
U30
U31
U32
U34
P38
V11
P16
V19
V20
V22
V30
V31
V32
V34
V35
V38
V43
V45
V46
V47
V49
V5
V7
V8
W2
W52
Y11
Y12
Y15
Y19
Y23
Y28
Y30
Y31
Y32
Y38
Y43
Y46
P49
Y5
Y6
Y8
P24
T43
AD51
AT8
AD47
Y47
AT12
AM6
AT13
AM5
AK45
AK39
AV14

3

2

1

A A

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

COMPUTER

IBEX PEA K-M 6/6

IBEX PEA K-M 6/6

IBEX PEA K-M 6/6

UM3B/UM6B 1A

UM3B/UM6B 1A

UM3B/UM6B 1A

1

12 59Wednesday, S eptember 30 , 2009

12 59Wednesday, S eptember 30 , 2009

12 59Wednesday, S eptember 30 , 2009

5

M_A_A[15:0][4]

D D

M_A_BS0[4]
M_A_BS1[4]
M_A_BS2[4]
M_A_CS0#[4]
M_A_CS1#[4]
M_A_CLK0[4]
M_A_CLK0#[4]
M_A_CLK1[4]
M_A_CLK1#[4]
M_A_CKE0[4]
M_A_CKE1[4]
M_A_CAS#[4]
M_A_RAS#[4]

R216 10K/F_4R216 10K/F_4
R215 10K/F_4R215 10K/F_4

C C

B B

M_A_WE#[4]

WLAN_SMBCLK[14,29,30]
WLAN_SMBDATA[14,29,30]

M_A_ODT0[4]
M_A_ODT1[4]

M_A_DM[7:0][4]

M_A_DQS[7:0][4]

M_A_DQS#[7:0][4]

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15

DIMM0_SA0

DIMM0_SA1
WLAN_SMBCLK
WLAN_SMBDATA

M_A_DM0

M_A_DM1

M_A_DM2

M_A_DM3

M_A_DM4

M_A_DM5

M_A_DM6

M_A_DM7

M_A_DQS0

M_A_DQS1

M_A_DQS2

M_A_DQS3

M_A_DQS4

M_A_DQS5

M_A_DQS6

M_A_DQS7

M_A_DQS#0

M_A_DQS#1

M_A_DQS#2

M_A_DQS#3

M_A_DQS#4

M_A_DQS#5

M_A_DQS#6

M_A_DQS#7

98
97
96
95
92
91
90
86
89
85

107

84
83

119

80
78

109
108

79
114
121
101
103
102
104

73

74
115
110
113
197
201
202
200

116
120

11

28

46

63
136
153
170
187

12

29

47

64
137
154
171
188

10

27

45

62
135
152
169
186

4

JDIM2A

JDIM2A

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

ODT0
ODT1

DM0
DM1
DM2
DM3
DM4
DM5
DM6

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

DM7
DQS0

DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

AS0A626-JASG-7H

AS0A626-JASG-7H

3

+1.5V_SUS

PM_EXTTS#0

75
76
81
82
87
88
93
94

99
100
105
106
111
112
117
118
123
124

199

77
122
125

198

30

1

126

2
3
8

9
13
14
19
20
25
26
31
32
37
38
43

+1.5V_SUS

M_A_DQ[63:0] [4]

PM_EXTTS#0[3]

DDR3_DRAMRST#[3,14]

+DDR_VTTREF

R210

R210
1K/F

1K/F

12

R212

R212
1K/F

1K/F

+3.3V_RUN

+SMDDR_VREF_DQ0

+SMDDR_VREF_DIMM0

R214

R214

+SMDDR_VREF_DIMM0

*0_NC

*0_NC

C294

C294

0.1U

0.1U

16

16

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

(204P)

(204P)

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

JDIM2B

JDIM2B

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

VDDSPD
NC1

NC2
NCTEST

EVENT#
RESET#

VREF_DQ
VREF_CA

VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15

AS0A626-JASG-7H

AS0A626-JASG-7H

2

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

(204P)

(204P)

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

VTT1
VTT2

1

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

203
204

G1

G1

G2

G2

+0.75V_DDR_VTT

+1.5V_SUS

C320

C320
10U

10U

C269

C269

10U

10U

+3.3V_RUN

C264

C264

2.2U/6.3V/0603

2.2U/6.3V/0603

A A

Place these Caps near So-Dimm1.

C319

C319
10U

10U

C301

C301

C297

C297

10U

10U

10U

10U

+0.75V_DDR_VTT

C262

C262

0.1U

0.1U

5

C322

C322
10U

10U

C3171UC317
1U

C321

C321

0.1U

0.1U

C266

C266

0.1U

0.1U

C3061UC306
1U

C299

C299

0.1U

0.1U

C296

C296

0.1U

0.1U

C272

C272

0.1U

0.1U

C2731UC273
1U

+

+

C323

C323
330U

330U

7343

7343

2.5

2.5

C2861UC286
1U

+SMDDR_VREF_DIMM0

C304

C304

2.2U/6.3V/0603

2.2U/6.3V/0603

C285

C285

0.1U

0.1U

C303

C303
10U

10U

10

10
805

805

4

C283

C283
10U

10U

10

10
805

805

C305

C305

0.1U

0.1U

C311

C311

2.2U/6.3V/0603

2.2U/6.3V/0603

C312

C312
10U

10U

10

10
805

805

+1.5V_SUS +DDR_VTTREF

R225

R225
1K/F

1K/F

12

R226

R226
1K/F

1K/F

3

M1 VREF M3 VREF

R222

R222
*0_NC

*0_NC

R219 SJ_0603R219 SJ_0603

C330

C330

0.1U

0.1U

16

16

+SMDDR_VREF_DQ0

2

112

+SMDDR_VREF_DQ0 +M_VREF_DQ_DIMM0

R220 *0_NCR220 *0_NC

2

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

COMPUTER

DDR3 DIMM-0

DDR3 DIMM-0

DDR3 DIMM-0

UM3B/UM6B 1A

UM3B/UM6B 1A

UM3B/UM6B 1A

13 59Friday, October 02, 2009

13 59Friday, October 02, 2009

13 59Friday, October 02, 2009

1

5

M_B_A[15:0][4]

D D

M_B_BS0[4]
M_B_BS1[4]
M_B_BS2[4]
M_B_CS0#[4]
M_B_CS1#[4]
M_B_CLK0[4]
M_B_CLK0#[4]
M_B_CLK1[4]
M_B_CLK1#[4]
M_B_CKE0[4]
M_B_CKE1[4]
M_B_CAS#[4]
M_B_RAS#[4]

R209 10K/F_4R209 10K/F_4
R211 10K/F_4R211 10K/F_4

+3.3V_RUN

C C

B B

M_B_WE#[4]

WLAN_SMBCLK[13,29,30]
WLAN_SMBDATA[13,29,30]

M_B_ODT0[4]
M_B_ODT1[4]

M_B_DM[7:0][4]

M_B_DQS[7:0][4]

M_B_DQS#[7:0][4]

M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15

DIMM1_SA0

DIMM1_SA1
WLAN_SMBCLK
WLAN_SMBDATA

M_B_DM0

M_B_DM1

M_B_DM2

M_B_DM3

M_B_DM4

M_B_DM5

M_B_DM6

M_B_DM7

M_B_DQS0

M_B_DQS1

M_B_DQS2

M_B_DQS3

M_B_DQS4

M_B_DQS5

M_B_DQS6

M_B_DQS7

M_B_DQS#0

M_B_DQS#1

M_B_DQS#2

M_B_DQS#3

M_B_DQS#4

M_B_DQS#5

M_B_DQS#6

M_B_DQS#7

98
97
96
95
92
91
90
86
89
85

107

84
83

119

80
78

109
108

79
114
121
101
103
102
104

73

74
115
110
113
197
201
202
200

116
120

11

28

46

63
136
153
170
187

12

29

47

64
137
154
171
188

10

27

45

62
135
152
169
186

JDIM3A

JDIM3A

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12/BC#
A13
A14
A15

BA0
BA1
BA2
S0#
S1#
CK0
CK0#
CK1
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SA0
SA1
SCL
SDA

ODT0
ODT1

DM0
DM1
DM2
DM3
DM4
DM5
DM6

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

DM7
DQS0

DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7

AS0A626-N2SN-7H

AS0A626-N2SN-7H

4

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

(204P)

(204P)

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

M_B_DQ0M_B_A0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

3

M_B_DQ[63:0] [4]

DDR3_DRAMRST#[3,13]

+SMDDR_VREF_DIMM1

+DDR_VTTREF+1.5V_SUS

R186

R186
1K/F

1K/F

12

R184

R184
1K/F

1K/F

PM_EXTTS#1[3]

+SMDDR_VREF_DQ1

R205

R205
*0_NC

*0_NC

+SMDDR_VREF_DIMM1

C249

C249

0.1U

0.1U

16

16

+3.3V_RUN

+1.5V_SUS

PM_EXTTS#1

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

199

VDDSPD

77

NC1

122

NC2

125

NCTEST

198

EVENT#

30

RESET#

1

VREF_DQ

126

VREF_CA

2

VSS1

3

VSS2

8

VSS3

9

VSS4

13

VSS5

14

VSS6

19

VSS7

20

VSS8

25

VSS9

26

VSS10

31

VSS11

32

VSS12

37

VSS13

38

VSS14

43

VSS15

2

JDIM3B

JDIM3B

PC2100 DDR3 SDRAM SO-DIMM

PC2100 DDR3 SDRAM SO-DIMM

AS0A626-N2SN-7H

AS0A626-N2SN-7H

(204P)

(204P)

VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52

VTT1
VTT2

1

44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196

203
204

G1

G1

G2

G2

+0.75V_DDR_VTT

+1.5V_SUS

C235

C235
10U

10U

C298

C298
10U

10U

+3.3V_RUN

C314

C314

2.2U/6.3V/0603

2.2U/6.3V/0603

A A

Place these Caps near So-Dimm2.

C265

C265
10U

10U

C238

C238

C234

C234

10U

10U

10U

10U

+0.75V_DDR_VTT

C316

C316

0.1U

0.1U

5

C270

C270
10U

10U

C3071UC307
1U

C239

C239

0.1U

0.1U

C267

C267

0.1U

0.1U

C2581UC258
1U

C240

C240

0.1U

0.1U

C300

C300

0.1U

0.1U

C271

C271

0.1U

0.1U

C3081UC308
1U

+

+

C224

C224
*330U_NC

*330U_NC

7343

7343

2.5

2.5

C2871UC287
1U

+SMDDR_VREF_DIMM1

C233

C233

2.2U/6.3V/0603

2.2U/6.3V/0603

C243

C243

0.1U

0.1U

C259

C259
10U

10U

10

10
805

805

4

C302

C302
10U

10U

10

10
805

805

C252

C252

0.1U

0.1U

C242

C242

2.2U/6.3V/0603

2.2U/6.3V/0603

C284

C284
10U

10U

10

10
805

805

+1.5V_SUS +DDR_VTTREF

R223

R223
1K/F

1K/F

12

R224

R224
1K/F

1K/F

C329

C329

0.1U

0.1U

16

16

3

M1 VREF M3 VREF

R221

R221
*0_NC

*0_NC

R218 SJ_0603R218 SJ_0603

112

2

+SMDDR_VREF_DQ1+SMDDR_VREF_DQ1

+M_VREF_DQ_DIMM1

R217 *0_NCR217 *0_NC

2

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

COMPUTER

DDR3 DIMM-1

DDR3 DIMM-1

DDR3 DIMM-1

UM3B/UM6B 1A

UM3B/UM6B 1A

UM3B/UM6B 1A

14 59Friday, October 02, 2009

14 59Friday, October 02, 2009

14 59Friday, October 02, 2009

1

5

4

3

2

1

+3.3V_RUN

L37 BLM21PG600SN1D

L37 BLM21PG600SN1D

805

D D

C C

805

CLK_ICH_14M[9]

IDT: 0.1uFx5pcs, 10uFx1pcs

C392

C392

C409

C409

10U

10U

0.1U

0.1U

0.1uF near the every power pin.

+3.3V_RUN

CLK_ICH_14M

Place the 33 ohm
resistors close to the CK 505

C397

C397

C408

C408

0.1U

0.1U

0.1U

0.1U

R312 10KR312 10K
R322 33R322 33

U12

U12

C406

C406

0.1U

0.1U

+3.3V_CLK_VDD

+VDDIO_CLK

CK_PWRGD
CPU_SEL

XTAL_OUT
XTAL_IN

SMBDAT2
SMBCLK2

1

VDD_USB

5

VDD_LCD

17

VDD_SRC

24

VDD_CPU

29

VDD_REF

15

VDD_SRC_IO

18

VDD_CPU_IO

9

VSS_SATA

2

VSS_USB

8

VSS_LCD

12

VSS_SRC

21

VSS_CPU

26

VSS_REF

16

CPU_STOP#

25

CK_PWRGD/PD#_3.3

30

REF_0/CPU_SEL

27

XOUT

28

XIN

31

SDATA

32

SCLK

SLG8SP585VTR

SLG8SP585VTR

CK505

CK505

QFN32

QFN32

CPU-0

CPU-0#

CPU-1

CPU-1#

DOT96T_LPR
DOT96C_LPR

SRC-1

SRC-1#

SATA

SATA#

27MHz_nonSS

27MHz_SS

GND

23
22

20
19

3
4

13
14

10
11

6
7

33

40mil

C396

C396

0.1U

0.1U

SMBDAT2[27,35]
SMBCLK2[27,35]

Place within 0.5" of CLKGEN

CLK_BUF_BCLK_P
CLK_BUF_BCLK_N

CLK_BUF_DREFCLK
CLK_BUF_DREFCLK#

CLK_BUF_PCIE_3GPLL
CLK_BUF_PCIE_3GPLL#

CLK_SATA_DREFSSCLK
CLK_SATA_DREFSSCLK#

Realtek: 0.1uFx3pcs, 22uFx1pcs

CLK_BUF_BCLK_P [9]
CLK_BUF_BCLK_N [9]

CLK_BUF_DREFCLK [9]
CLK_BUF_DREFCLK# [9]

CLK_BUF_PCIE_3GPLL [9]
CLK_BUF_PCIE_3GPLL# [9]

CLK_SATA_DREFSSCLK [9]
CLK_SATA_DREFSSCLK# [9]

IDT: 0.1uFx2pcs, 10uFx1pcs

Realtek: 0.1uFx6pcs, 22uFx1pcs

+3.3V_RUN

Add capacitor pads for improving WWAN.

C410

C410

*27P_NC

*27P_NC

50

50

CLK_ICH_14M

Y4

XTAL_IN XTAL_OUT

C404

C404
33P

33P

50

50

Y4

21

14.318MHZ

14.318MHZ
C401

C401
33P

33P

1 2

50

50

R309 *0_NCR309 *0_NC

+1.05V_PCH

R306 0R306 0

SLG,IDT: +1.05V

B B

Realtek: +3.3V

L34 BLM21PG600SN1D

L34 BLM21PG600SN1D

805

805

HP: 10u x2pcs

Place each 0.1uF cap as close as
possible to each VDD IO pin. Place
the 10uF caps on the VDD_IO plane.

C391

C391
10U

10U

+VDDIO_CLK

40mil

C403

C403

0.1U

0.1U

C398

C398

0.1U

0.1U

+VDDIO_CLK:
SLG date sheet (V0.2) P15: Min 1.05V,Max3.465V.

+3.3V_RUN

R327

R327
*4.7K_NC

*4.7K_NC

1 2

CPU_SEL

R325

R325

4.7K

4.7K

1 2

A A

C407

C407
*10P/50V_NC

*10P/50V_NC

EMI Capacitor

5

PIN 30 CPU_0 CPU_1

0(default)

1(0.7V-1.5V)

133MHz

100MHz 100MHz

133MHz

CPU_SEL:
SLG date sheet (V0.2) P15:
High Voltage: Min 0.7V, Max 1.5V.
Low Voltage: Min Vss-0.3V, Max 0.35V.
Realtek date sheet(V1.2) P11:
High Voltage: Min 0.7V, Max 1.5V.
Low Voltage: Min Vss-0.3V, Max 0.35V.
IDT date sheet(V0.7) P10:
High Voltage: Min 0.7V, Max 1.5V.
Low Voltage: Min Vss-0.3V, Max 0.35V.

4

+3.3V_RUN

31

VR_PWRGD_CLKEN#[47]

3

2

Realtek date sheet(V1.2) P11: Min 1.05V,Max 3.3V.
IDT date sheet(V0.7) P10: Min 0.9975V,Max 3.465V.

R311

R311
10K

10K

CK_PWRGD

Q10

Q10
2N7002W-7-F

2N7002W-7-F

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

COMPUTER

Clock Generator

Clock Generator

Clock Generator

UM3B/UM6B 1A

UM3B/UM6B 1A

UM3B/UM6B 1A

15 59Friday, October 02, 2009

15 59Friday, October 02, 2009

15 59Friday, October 02, 2009

1

5

D D

C C

4

3

2

1

BLANK PAGE FOR PAGE
NUMBER SAME AS DISCRETE

B B

A A

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

VGA-M92-XT (PCIe)

VGA-M92-XT (PCIe)

VGA-M92-XT (PCIe)

UM3B/UM6B 1A

UM3B/UM6B 1A

UM3B/UM6B 1A

1

16 59Wednesday, September 30, 2009

16 59Wednesday, September 30, 2009

16 59Wednesday, September 30, 2009

5

D D

C C

4

3

2

1

BLANK PAGE FOR PAGE
NUMBER SAME AS DISCRETE

B B

A A

QUANTA

QUANTA

QUANTA
COMPUTER

COMPUTER

COMPUTER

Title

Title

Title

VGA-M92-XT (PCIe)

VGA-M92-XT (PCIe)

VGA-M92-XT (PCIe)

Size Docum ent Number Rev

Size Docum ent Number Rev

Size Docum ent Number Rev

UM3B/UM6B 1A

UM3B/UM6B 1A

UM3B/UM6B 1A

Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

1

17 59W ednesday, September 30, 2009

17 59W ednesday, September 30, 2009

17 59W ednesday, September 30, 2009