STMicroelectronis unique "Single Feature Size™"
strip-based process. The resulting transistor
shows extremely high packing density for low onresistance, rugged avalanche characteristics and
less critical alignment steps therefore a remarkable manufacturing reproducibility.
APPLICATIONS
■ DC-DC & DC-AC COVERTERS
■ DC MOTOR CONTROL (DISK DRIVERS, etc.)
■ SYNCHRONOUS RECTIFICATION
2
3
2
1
SOT-223
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
V
DS
V
DGR
V
GS
(
I
•)
D
I
D
(
I
••)
DM
P
tot
dv/dt
E
AS
T
stg
T
j
(
Pulse wi dth limited by safe operating area.
••)
(
Current limited by the package
•)
.
Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)
60V
60V
Gate- source Voltage± 16V
Drain Current (continuous) at TC = 25°C
Drain Current (continuous) at TC = 100°C
4A
2.9A
Drain Current (pulsed)16A
Total Dissipation at TC = 25°C
3.3W
Derating Factor0.026W/°C
(1)
Peak Diode Recovery voltage slope10V/ns
(2)
Single Pulse Avalanche Energy200mJ
Storage Temperature
Operating Junction Temperature
≤ 3A, di/dt ≤150A/µs , VDD ≤ V
(1) I
SD
(2) Starting Tj = 25 oC, ID = 4A, VDD = 30V
-55 to 150°C
(BR)DSS
, Tj ≤ T
JMAX
1/8December 2002
Page 2
STN3NF06L
THERMA L D ATA
Rthj-pcb
Rthj-pcb
T
(*) When Mounted on FR-4 board with 1 inch
(**) When Mounted on minimum footprint
Thermal Resistance Junction-PCB (*)
Thermal Resistance Junction-PCB (**)
Maximum Lead Temperature For Soldering Purpose
l
(for 10 sec. 1.6 mm from case)
2
pad, 2 oz of Cu a nd t [ 10 sec
Max
Max
Typ
38
100
260
°C/W
°C/W
°C
ELECTRICAL CHARACTERISTICS (T
= 25 °C unless otherwise specified)
case
OFF
SymbolParameterTest ConditionsMin.Typ.Max.Unit
I
= 250 µA, VGS = 0
D
V
= Max Rating
DS
V
= Max Rating TC = 125°C
DS
= ± 16 V
V
GS
60V
1
10
±100nA
ON
V
(BR)DSS
I
DSS
I
GSS
(*)
Drain-source
Breakdown Voltage
Zero Gate Voltage
Drain Current (V
GS
Gate-body Leakage
Current (V
DS
= 0)
= 0)
SymbolParameterTest ConditionsMin.Typ.Max.Unit
V
V
GS(th)
R
DS(on)
Gate Threshold Voltage
Static Drain-source On
Resistance
= VGS I
DS
= 10 VID = 1.5 A
V
GS
V
= 5 VID = 1.5 A
GS
= 250 µA
D
12.8V
0.07
0.085
0.10
0.12
DYNAMIC
SymbolParameterTest ConditionsMin.Typ.Max.Unit
(*)
g
fs
C
iss
C
oss
C
rss
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
= 15 VID = 1.5 A
DS
= 25V, f = 1 MHz, VGS = 0
V
DS
3S
340
63
30
µA
µA
Ω
Ω
pF
pF
pF
2/8
Page 3
STN3NF06L
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
SymbolParameterTest ConditionsMin.Typ.Max.Unit
= 30 V ID = 1.5 A
t
d(on)
Turn-on Delay Time
t
r
Rise Time
V
DD
R
= 4.7 Ω VGS = 5 V
G
(Resistive Load, Figure 3)
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
= 48V ID = 3A V
V
DD
GS
= 5V
SWITCHING OFF
SymbolParameterTest ConditionsMin.Typ.Max.Unit
= 30 V ID = 1.5 A
t
d(off)
Turn-off Delay Time
t
f
Fall Time
V
DD
R
= 4.7Ω, V
G
GS
= 5 V
(Resistive Load, Figure 3)
SOURCE DRAIN DIODE
SymbolParameterTest ConditionsMin.Typ.Max.Unit
I
SD
I
SDM
V
SD
t
rr
Q
rr
I
RRM
(*)
Pulsed: P ul se duration = 300 µs, duty cycle 1.5 %.
(
•)Pulse width limited by s afe operating area.
Source-drain Current
(•)
Source-drain Current (pulsed)
(*)
Forward On Voltage
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
= 4 A VGS = 0
SD
= 4 Adi/dt = 100A/µs
I
SD
V
= 25 VTj = 150°C
DD
(see test circuit, Figure 5)
9
25
7
1.5
2.8
20
10
50
88
3.5
9nC
4
16
1.5V
ns
ns
nC
nC
ns
ns
A
A
ns
nC
A
Safe Operating Area
Thermal Impedance
3/8
Page 4
STN3NF06L
Output CharacteristicsTransfer Characteristics
TransconductanceStatic Drain-source On Resistance
Gate Charge vs Gate-source VoltageCapacitance Variations
4/8
Page 5
STN3NF06L
Normalized Gate Threshold Voltage vs TemperatureNormalized on Resistance vs Temperature
Source-drain Diode Forward CharacteristicsNormalized Breakdown Voltage vs Temperature.
..
5/8
Page 6
STN3NF06L
Fig. 1: Unclamped Inductive Load Test CircuitFig. 1: Unclamped Inductive Load Test CircuitFig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive
Load
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
6/8
Page 7
SOT-223 MECHANICAL DATA
STN3NF06L
DIM.
MIN.TYP.MAX.MIN.TYP.MAX.
a2.272.32.3389.490.691.7
b4.574.64.63179.9181.1182.3
c0.20.40.67.915.723.6
d 0.630.650.6724.825.626.4
e11.51.61.759.16366.9
e40.3212.6
f2.933.1114.2118.1122.1
g0.670.70.7326.427.628.7
l16.777.3263.8275.6287.4
l23.53.53.7137.8137.8145.7
L6.36.56.7248255.9263.8
mmmils
l1
e1
L
a
b
f
C
B
C
E
g
d
l2
c
e4
P008B
7/8
Page 8
STN3NF06L
Information furnished is believed to be accurate an d rel i able. However, STMicroelectro ni cs assumes no responsibility for the consequen ces
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implic ation or otherwise under any patent or patent ri ghts of STM i croelectr onics. Sp ecifications mentioned in thi s publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics product s are not
authorized for use as cri tical comp onents in lif e support devi ces or systems without express written approv al of STMicroel ectronics.
The ST log o i s registered trademark of STMicroelectronics
2002 STMi croelectronics - All Ri ghts Rese rved
All other names are the property of their respective ow ners.
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Singapor e - S pai n - Sweden - S witzerland - United Kingdom - United States.
STMicroelect ro n ics GRO UP OF COMPANI ES
http://www.st.com
8/8
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