Datasheet LA6545M Datasheet (SANYO)

Ordering number : ENN6296

42800RM (OT) No. 6296-1/7

Overview

The LA6545M is a 4-channel bridge (BTL) driver
developed for use in CD-ROM systems.

Functions

• Bridge connected (BTL) four-channel power amplifier

•VCE(residual voltage) minimized (channels 1 and 2) by
using two power supplies.

•IOmax: 1.0 A

• Muting circuit provided (output on/off control)

(MUTE pin: low for output off, high for output on.
MUTE1: controls channels 1, 2, and 3, MUTE2:
controls channel 4.)

• Thermal protection (shutdown) circuit

• Separated output stage power supply (VS1: channels 1
and 2, VS2: channels 3 and 4)

Package Dimensions

unit: mm

3129-MFP36SLF

0.25

15.3

118

36

19

0.85

0.4

0.8

2.5max

2.250.1

7.9

9.2

10.5

0.65

SANYO: MFP36SLF

[LA6545M]

LA6545M

SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

Four-Channel Bridge (BTL) Driver for CD-ROM

Monolithic Linear IC

Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.

0.4

0.8

1.2

0.9

2.1

1.6

2.0

2.4

0
–20 0 20 40 60 75 80 100

Allowable power dissipation, Pdmax — W

Pd max — Ta

Ambient temperature, Ta — °C

PCB: 76.1 × 114.3 × 1.6 mm3,
glass epoxy

1.26

0.54

Mounted on a PCB

Independent IC

Parameter Symbol Conditions Ratings Unit

Maximum supply voltage 1 V

CC

max VCC≥ VS1, 2 14 V

Maximum supply voltage 2 V

S

max VS1, 2, VCC≥ VS1, 2 14 V

Input voltage V

IN

max Each of the input pins VIN1 to VIN413V

MUTE pin voltage V

MUTE

max 13 V

Allowable power dissipation Pd max

Independent IC 0.9 W

Mounted on the specified PCB (76.1 × 114.3 × 1.6 mm3, glass epoxy) 2.1 W
Operating temperature Topr –20 to +75 °C
Storage temperature Tstg –55 to +150 °C

Specifications

Maximum Ratings at Ta = 25°C

No. 6296-2/7

LA6545M

Parameter Symbol Conditions Ratings Unit

Operating supply voltage

V

CC

VCC≥ VS1, 2 4 to 13 V

V

S

1, 2

V

S

1 and VS2 are the output stage power supply.

4 to 13 V

V

CC

≥ VS1 and VS2

Recommended Operating Conditions at Ta = 25°C

Parameter Symbol Conditions

Ratings

Unit

min typ max

V

CC

no load current drain 1 ICC-ON Output on (MUTE1 and MUTE2: high), V

CC

10 25 mA

V

CC

no load current drain 2 ICC-OFF Output off (MUTE1 and MUTE2: low), V

CC

4mA

VS1 no load current drain 1 I

S

1-ON Output on (MUTE1 and MUTE2: high), VS12030mA

VS1 no load current drain 2 I

S

2-OFF Output off (MUTE1 and MUTE2: low), VS14mA

VS2 no load current drain 1 I

S

2-ON Output on (MUTE1 and MUTE2: high), VS22030mA

VS2 no load current drain 2 I

S

2-OFF Output off (MUTE1 and MUTE2: low), VS24mA

Output offset voltage V

OF

1 to 4

Potential difference between the + and – outputs for each

–50 +50 mV

channel

Input voltage range 1 V

IN

1 Input voltage range for each channel 0 VS1V

Output voltage 1 VO1

I

O

= 700 mA, the difference between the outputs for

4 4.5 V

channels 1 and 2

Output voltage 2 VO2

IO= 700 mA, the difference between the outputs for

10.5 11 V

channels 3 and 4

Closed circuit voltage gain

VG1 The BTL amplifier voltage gain for channels 1 and 2 5 7 9 dB
VG2 The BTL amplifier voltage gain for channels 3 and 4 12 14 16 dB

Slew rate SR This value is doubled when measured across 0.5 V/µs

the outputs. *

1

Muting on voltage V

MUTE

MUTE1 and MUTE2. The voltage at which the output

1.5 2 V

turns on. *

2

Electrical Characteristics at Ta = 25°C, VCC= VS2 = 12 V, VS1 = 5 V, V

REF

= 1.65 V

Notes 1. Design guarantee value.

2. The MUTE1, and MUTE2 pins turn the output on when high and off when low. When the output is off, the outputs will be in the high-impedance
state.
The figure below shows the relationship between the channels and the MUTE pins and between the channels and the power supplies.

System Figure

MUTE2

CH1 (7 dB)

CH2 (7 dB)

MUTE1

CH3 (14 dB)

CH4 (14 dB)

VS1

A12688

VS2

Block Diagram and Pin Assignment

No. 6296-3/7

LA6545M

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

RF

RF

(NC)

VSS2

VSS2-OUT

MUTE1

MUTE1
(channels 1, 2, and 3)

MUTE2
(channel 4)

11 kΩ

12.5 kΩ

VIN1

VG1

VIN2

VG2

VIN3

VG3

VIN4

VG4

MUTE2

V

CC

RF

RF

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

RF

RF

VSS1

VSS1-OUT

VO1

+

VO1

–

VS1

VO2

+

VO2

–

VO3

+

VO3

–

VS2

VO4

+

VO4

–

V

REF

OUT

V

REF

IN

RF

RF

–
+

–
+

–
+

–
+

11 kΩ

12.5 kΩ

–
+

11 kΩ

12.5 kΩ

–
+

11 kΩ

27.5 kΩ

–
+

Input stage power supply

(all channels)

VS1 power supply

(channels 1 and 2)

VS2 power supply
(channels 3 and 4)

Thermal shutdown circuit

MUTE1

Channels 1, 2 and 3 output on/off

MUTE2

Channel 4 output on/off

A12689

No. 6296-4/7

LA6545M

Pin Functions

Pin No. Pin Function

1 RF Substrate (lowest potential)
2 RF Substrate (lowest potential)
3 (NC) Unused.
4V

SS

2 Connect to VS2.

5V

SS

2-OUT Output stage reference voltage output ((VS2-VBE)/2, typical)
6 MUTE1 Channels 1, 2, and 3 output on/off control
7V

IN

1 Channel 1 input
8 VG1 Channel 1 input (gain adjustment)
9V

IN

2 Channel 2 input

10 VG2 Channel 2 input (gain adjustment)
11 V

IN

3 Channel 3 input

12 VG3 Channel 3 input (gain adjustment)
13 V

IN

4 Channel 4 input

14 VG4 Channel 4 input (adjustment)
15 MUTE2 Channel 4 on/off control
16 V

CC

Power supply
17 RF Substrate (lowest potential)
18 RF Substrate (lowest potential)
19 RF Substrate (lowest potential)
20 RF Substrate (lowest potential)
21 V

REF

IN Reference voltage input (V

REF

1 buffer amplifier input)

22 V

REF

OUT Reference voltage output (V

REF

1 buffer amplifier output)

23 V

O

4

–

Channel 4 inverted output
24 V

O

4

+

Channel 4 noninverted output
25 V

S

2 Channes 3 and 4 output stage power supply

26 V

O

3

–

Channel 3 inverted output
27 V

O

3

+

Channel 3 noninverted output
28 V

O

2

–

Channel 2 inverted output
29 V

O

2

+

Channel 2 noninverted output
30 V

S

1 Channels 1 and 2 output stage power supply

31 V

O

1

–

Channel 1 inverted output
32 V

O

1

+

Channel 1 noninverted output
33 V

SS

1-OUT Output stage reference voltage (Outputs VSS/2: typical) (V

REF

2 buffer amplifier output)

34 V

SS

1 Connect to VS1. (VSS1 - OUT is generated by a resistor divider.)
35 RF Substrate (lowest potential)
36 RF Substrate (lowest potential)

Sample Application Circuit

No. 6296-5/7

LA6545M

A12690

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

RF

RF

(NC)

VSS2

VSS2-OUT

MUTE1

MUTE1

MUTE2

VIN1

VG1

VIN2

VG2

VIN3

VG3

VIN4

VG4

MUTE2

V

CC

RF

RF

36

35

34

33

32

31

30

29

28

27

26

25

24

23

22

21

20

19

RF

RF

VSS1

VSS1-OUT

VO1

+

VO1

–

VS1

VO2

+

VO2

–

VO3

+

VO3

–

VS2

VO4

+

VO4

–

V

REF

OUT

V

REF

IN

RF

RF

Focus input

Tracking input

Sled input

Loading input

Tracking coil

V

REF

V

CC

(12 V)

VS(5V)

Focus coil

Loading motor

Sled motor

M

M

LA6545M

Gain setting

Gain setting

Gain setting

Gain setting

No. 6296-6/7

LA6545M

Pin Description

Pin No. Pin Symbol Function Equivalent circuit

Inputs for each channel

7
8

9
10
11
12
13
14

V

IN

*

VG*

(Input)

V

IN

1
VG1
V

IN

2
VG2
V

IN

3
VG3
V

IN

4
VG4

V

IN

VG

RF

11 k

Ω

V

REF

OUT

V

CC

A12691

713

911

1014

812

Outputs for each channel

32
31
29
28
27
26
24
23

V

O

*

(Output)

V

O

1

+

VO1

–

VO2

+

VO2

–

VO3

+

VO3

–

VO4

+

VO4

–

23 24 26 27
28 29 31 32

VS

VO

RF

V

CC

A12692

Output on/off control

6

15

MUTE

MUTE1
MUTE2

100 k

Ω

100 k

Ω

V

CC

RF

MUTE1, 2

A12693

15

6

PS No. 6296-7/7

LA6545M

Gain Setting (Functions of the Input and Gain Adjustment Pins)
The figures present overviews of the VINand VG pin circuits. (These are the same as the block diagrams.)

1. Consider resistors (11 kΩ, typical) to be inserted between the VINand VG pins. This should be seen as being the

same as the operational amplifier noninverting input (V

IN

+

).

2. If the VG pins are not used, and only the VINpins are used, the BTL gain (across the V

O

+

and V

O

-

outputs) will be 7
dB for channels 1 and 2 (amplifier units: 1 dB + BTL: 6 dB) and 14 dB for channels 3 and 4 (amplifier units: 8 dB +
BTL: 6 dB).
If the VINpins are not used and 11 kΩ external resistors are attached to the VG pins, input to the opposite ends of
those resistors will result in equivalent circuit operation. However, the VINpins should be used and the gain set to
minimize the I/O gain temperature characteristics.

Offset Voltage
This IC includes built-in level shifting circuits. For input to which V

REF

is applied as a reference, the output is referenced
to the voltage VSS1/2 (V) for channels 1 and 2, and the output is referenced to the voltage (VSS2 – VBE(0.7))/2 (V) for
channels 3 and 4.

This catalog provides information as of April, 2000. Specifications and information herein are subject to
change without notice.

Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer’s
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer’s products or equipment.

SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.

In the event that any or all SANYO products (including technical data, services) described or contained
herein are controlled under any of applicable local export control laws and regulations, such products must
not be exported without obtaining the export license from the authorities concerned in accordance with the
above law.

No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co., Ltd.

Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the “Delivery Specification”
for the SANYO product that you intend to use.

Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.

12.5 kΩ

VIN1, 2

VG1, 2

VIN3, 4

VG3, 4

11 kΩ

11 kΩ

–
+

27.5 kΩ

–
+

A12694