Datasheet FDS8333C Datasheet (Fairchild Semiconductor)

Page 1
August 2002
G
FDS8333C
FDS8333C
30V N & P-Channel PowerTrench MOSFETs
General Description
These devices are well suited for low voltage and battery powered applications where low in-line power loss and fast switching are required.
D2
D
D2
D
D1
D
D1
D
SO-8
Pin 1
SO-8
S1
S2
G1
S
S
S
Absolute Maximum Ratings T
G2
=25
A
Features
Q1 4.1 A, 30V. R R
Q2 –3.4 A, 30V. R R
Low gate charge
High performance trench technology for extremely
low R
High power and handling capability in a widely used surface mount package.
o
C unless otherwise noted
DS(ON)
= 80 mΩ @ VGS = 10 V
DS(ON)
= 130 mΩ @ VGS = 4.5 V
DS(ON)
= 130 mΩ @ VGS = –10 V
DS(ON)
= 200 mΩ @ VGS = –4.5 V
DS(ON)
.
Q2
5 6
Q1
7 8
4 3 2 1
Symbol Parameter Q1 Q2 Units
V
Drain-Source Voltage 30 –30 V
DSS
V
Gate-Source Voltage ±16 ±20
GSS
ID Drain Current – Continuous (Note 1a) 4.1 –3.4 A – Pulsed 20 –20 PD
TJ, T
STG
Power Dissipation for Dual Operation 2 Power Dissipation for Single Operation (Note 1a)
(Note 1b) 1 (Note 1c) 0.9
Operating and Storage Junction Temperature Range –55 to +150 °C
1.6 W
Thermal Characteristics
R
Thermal Resistance, Junction-to-Ambient (Note 1a)
θJA
R
Thermal Resistance, Junction-to-Case (Note 1)
θJC
78 40
°C/W
Package Marking and Ordering Information
Device Marking Device Reel Size Tape width Quantity
FDS8333C FDS8333C 7’’ 12mm 2500 units
2002 Fairchild Semiconductor Corporation FDS8333C Rev C (W)
Page 2
Q1
FDS8333C
Electrical Characteristics T
Symbol Off Characteristics
BV
Drain–Source Breakdown Voltage
DSS
BVDSS TJ
I
Zero Gate Voltage Drain Current
DSS
I
GSSF
I
GSSF
Breakdown Voltage Temperature Coefficient
/I
Gate–Body Leakage, Forward
GSSR
/I
Gate–Body Leakage, Reverse
GSSR
On Characteristics (Note 2)
V
GS(th)
VGS(th)TJ
R
DS(on)
I
D(on)
gFS Q1
Gate Threshold Voltage
Gate Threshold Voltage Temperature Coefficient
Q1
Static Drain–Source On–Resistance
Q1
On–State Drain Current
Forward Transconductance
Parameter Test Conditions Min Typ Max Units
Q1 Q2
Q2
Q2
Q2
= 25°C unless otherwise noted
A
Q1
VGS = 0 V, ID = 250 µA VGS = 0 V, ID = –250 µA ID = 250 µA,Ref. to 25°C ID = –250 µA,Ref. to 25°C VDS = 24 V, VGS = 0 V VDS = –24 V, VGS = 0 V VGS = ± 16 V, VDS = 0 V VGS = ± 20V , VDS = 0 V
Q2 Q1 Q2
Q2
30
–30
V
25
–22
1
–1
±100 ±100
VDS = VGS, ID = 250 µA 1 1.7 3 VDS = VGS, ID = –250 µA –1 –1.8 –3 ID = 250 µA,Ref. To 25°C Q1
ID = –250 µA,Ref. to 25°C Q2 VGS = 10 V, ID = 4.1 A VGS = 4.5 V, ID = 3.2 A
VGS = 10 V, ID = 4.1 A TJ=125°C VGS = –10 V, ID = –3.4 A
VGS = – 4.5 V, ID = –2.5 A VGS = –10V,ID = –3.4A, TJ=125°C
VGS = 10 V, VDS = 5 V VGS = –10 V, VDS = –5 V VDS = 5 V ID = 4.1 A VDS = –5 V ID = –3.4A
–4.2
3.7
67
130
81
145
103
105
167 147
130 200
220 10 –5
9 5
80
mV/°C
µA nA
nA
V
mV/°C
m
A
S
Dynamic Characteristics
C
Q1
iss
C
oss
C
Q1
rss
RG Q1
Input Capacitance
Q2
Q1
Output Capacitance
Q2
Reverse Transfer Capacitance
Q2
Gate Resistance
Q2
Switching Characteristics (Note 2)
t
Q1
d(on)
tr Q1
t
d(off)
tf Q1
Qg Q1
Qgs Q1
Qgd Q1
Turn–On Delay Time
Q2
Turn–On Rise Time
Q2
Q1
Turn–Off Delay Time
Q2
Turn–Off Fall Time
Q2
Total Gate Charge
Q2
Gate–Source Charge
Q2
Gate–Drain Charge
Q2
VDS=10 V, V VDS=–10 V, V VDS=10 V, V
VDS=–10 V, V VDS=10 V, V VDS=–10 V, V
= 0 V, f=1.0MHz 282
GS
= 0 V, f=1.0MHz
GS
= 0 V, f=1.0MHz
GS
= 0 V, f=1.0MHz
GS
= 0 V, f=1.0MHz
GS
= 0 V, f=1.0MHz
GS
VGS= 15 mV, f=1.0MHz VGS=–15 mV, f=1.0MHz
For Q1: V
=10 V, I
DS
VGS= 4.5 V, R
DS
GEN
= 1 A
= 6
For Q2: V
=–10 V, I
DS
VGS= –4.5 V, R
= –1 A
DS
GEN
= 6
For Q1: V
=10 V, I
DS
VGS= 4.5 V, R
= 4.1 A
DS
GEN
= 6
For Q2: V
=–10 V, I
DS
= –3.4 A
DS
VGS= –4.5 V,
185 49 56 20 26
2.3 –9.6
4.5 9
4.5 9 6 12 13 23 19 34 11 20
1.5 3 2 4
4.7 6.6
4.1 5.7
0.9
0.8
0.6
0.4
pF
pF
pF
ns
ns
ns
ns
nC
nC
nC
FDS8333C Rev C (W)
Page 3
FDS8333C
Electrical Characteristics T
Symbol
Parameter Test Conditions Min Typ Max Units
= 25°C unless otherwise noted
A
Drain–Source Diode Characteristics and Maximum Ratings
VSD Q1
trr Q1
Qrr Q1
Notes:
1. R
θJA
the drain pins. R
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
Drain–Source Diode Forward Voltage
Diode Reverse Recovery Time
Diode Reverse Recovery Charge
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
is guaranteed by design while R
θJC
a) 78°C/W when
θCA
mounted on a
0.5in2 pad of 2 oz copper
is determined by the user's board design.
VGS = 0 V, IS = 1.3 A (Note 2) VGS = 0 V, IS = –1.3 A (Note 2)
Q2
IF = 4.1 A, diF/dt = 100 A/µs IF = –3.4 A, diF/dt = 100 A/µs
Q2
IF = 4.1 A, diF/dt = 100 A/µs IF = –3.4 A, diF/dt = 100 A/µs
Q2
b) 125°C/W when
mounted on a
0.02 in2 pad of 2 oz copper
0.8 1.2
0.8 –1.2
16.3
14.5
26.7
21.1
c) 135°C/W when
mounted on a minimum pad.
V
nS
nC
FDS8333C Rev C (W)
Page 4
= 10V
= 10V
C
=5V
= 0V
FDS8333C
Typical Characteristics: N-Channel
10
V
GS
6.0V
8
6
4
, DRAIN CURRENT (A)
D
I
2
0
0 1 2 3
4.5V
3.5V
VDS, DRAIN-SOURCE VOLTAGE (V)
3.0V
2
VGS = 3.0V
1.8
1.6
1.4
, NORMALIZED
1.2
DS(ON)
R
1
DRAIN-SOURCE ON-RESISTANCE
0.8 0 2 4 6 8 10
3.5V
4.0V
4.5V
ID, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.6
ID = 4.1A
V
GS
1.4
1.2
, NORMALIZED
1
DS(ON)
R
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
0.25
0.15
, ON-RESISTANCE (OHM)
DS(ON)
R
0.05
0.2
o
TA = 125
0.1 TA = 25oC
2 4 6 8 10
VGS, GATE TO SOURCE VOLTAGE (V)
6.0V 10V
ID = 2 A
Figure 3. On-Resistance Variation
withTemperature.
10
V
DS
8
6
4
, DRAIN CURRENT (A)
D
I
2
0
1.5 2 2.5 3 3.5 4
VGS, GATE TO SOURCE VOLTAGE (V)
TA =-55oC
Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation
125oC
25oC
Figure 4. On-Resistance Variation with
100
10
1
0.1
0.01
0.001
, REVERSE DRAIN CURRENT (A)
S
I
0.0001
0.2 0.4 0.6 0.8 1 1.2
with Source Current and Temperature.
Gate-to-Source Voltage.
V
GS
TA = 125oC
25oC
VSD, BODY DIODE FORWARD VOLTAGE (V)
-55oC
FDS8333C Rev C (W)
Page 5
OSS
100µs
FDS8333C
Typical Characteristics: N-Channel (continued)
10
ID = 4.1A
8
6
4
2
, GATE-SOURCE VOLTAGE (V)
GS
V
0
0 1 2 3 4 5
Qg, GATE CHARGE (nC)
VDS = 5V
10V
15V
400
300
200
CAPACITANCE (pF)
100
0
0 5 10 15 20 25 30
C
C
RSS
VDS, DRAIN TO SOURCE VOLTAGE (V)
C
ISS
Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.
100
R
LIMIT
DS(ON)
10
1
VGS = 10V
SINGLE PULSE
, DRAIN CURRENT (A)
0.1
D
I
R
= 135oC/W
θJA
TA = 25oC
0.01
0.1 1 10 100
VDS, DRAIN-SOURCE VOLTAGE (V)
10s
DC
1s
100ms
1ms
10ms
50
40
30
20
10
P(pk), PEAK TRANSIENT POWER (W)
0
0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)
SINGLE PULSE
R
= 135°C/W
JA
θ
TA = 25°C
f = 1MHz
VGS = 0 V
Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum
Power Dissipation.
FDS8333C Rev C (W)
Page 6
-4.0V
C
FDS8333C
Typical Characteristics: P-Channel
10
VGS = -10V
8
6
4
, DRAIN CURRENT (A)
D
-I
2
0
0 1 2 3 4 5
-6.0V
-4.5V
-4.0V
-3.5V
-VDS, DRAIN-SOURCE VOLTAGE (V)
3
VGS = -3.5V
2.5
2
-4.5V
, NORMALIZED
1.5
DS(ON)
R
1
DRAIN-SOURCE ON-RESISTANCE
0.5 0 2 4 6 8 10
-ID, DRAIN CURRENT (A)
-5.0V
-6.0V
Figure 11. On-Region Characteristics. Figure 12. On-Resistance Variation with
1.6 ID = -3.4A
VGS =-10V
1.4
1.2
, NORMALIZED
1
DS(ON)
R
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50 -25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
, ON-RESISTANCE (OHM)
R
Drain Current and Gate Voltage.
0.4
0.3
TA = 125oC
0.2
o
0.1
DS(ON)
0
2 4 6 8 10
TA = 25
-VGS, GATE TO SOURCE VOLTAGE (V)
-10V
ID = -1.7A
Figure 13. On-Resistance Variation
withTemperature.
5
VDS = -5V
4
3
2
, DRAIN CURRENT (A)
D
-I
1
0
1.5 2.5 3.5 4.5
-VGS, GATE TO SOURCE VOLTAGE (V)
TA = -55oC
125oC
Figure 15. Transfer Characteristics. Figure 16. Body Diode Forward Voltage Variation
25oC
Figure 14. On-Resistance Variation with
10
1
0.1
0.01
0.001
, REVERSE DRAIN CURRENT (A)
S
-I
0.0001 0 0.2 0.4 0.6 0.8 1 1.2 1.4
with Source Current and Temperature.
Gate-to-Source Voltage.
VGS = 0V
TA = 125oC
25oC
-55oC
-VSD , BODY DIODE FORWARD VOLTAGE (V)
FDS8333C Rev C (W)
Page 7
-15V
r(t), NORMALIZED EFFECTIVE TRANSIENT
P(pk)
SINGLE PULSE
0.01
0.02
D = 0.5
FDS8333C
Typical Characteristics: P-Channel (continued)
10
ID = -3.4A
8
6
4
2
, GATE-SOURCE VOLTAGE (V)
GS
-V
0
0 1 2 3 4 5
Qg, GATE CHARGE (nC)
VDS = -5V
-10V
300
250
200
150
100
CAPACITANCE (pF)
50
C
RSS
0
0 5 10 15 20 25 30
C
ISS
C
OSS
-VDS, DRAIN TO SOURCE VOLTAGE (V)
Figure 17. Gate Charge Characteristics. Figure 18. Capacitance Characteristics.
100
R
LIMIT
DS(ON)
10
1
VGS = -10V
SINGLE PULSE
, DRAIN CURRENT (A)
D
0.1
-I
R
= 135oC/W
θJA
TA = 25oC
0.01
0.1 1 10 100
-VDS, DRAIN-SOURCE VOLTAGE (V)
10s
DC
100ms
1s
10ms
1ms
100µs
50
SINGLE PULSE
R
= 135°C/W
40
30
20
10
P(pk), PEAK TRANSIENT POWER (W)
0
0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)
θJA
TA = 25°C
f = 1MHz
VGS = 0 V
Figure 19. Maximum Safe Operating Area. Figure 20. Single Pulse Maximum
Power Dissipation.
1
RθJA(t) = r(t) * RθJA
0.2
0.1
0.01
THERMAL RESISTANCE
0.1
0.05
RθJA = 135oC/W
t1
t
2
TJ - TA = P * R
Duty Cycle, D = t1 / t
0.001
0.0001 0.001 0.01 0.1 1 10 100 1000
t1, TIME (sec)
Figure 21. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design.
JA(t)
θ
2
FDS8333C Rev C (W)
Page 8
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx ActiveArray Bottomless CoolFET CROSSVOL T DOME EcoSPARK E2CMOS EnSigna
TM
TM
FACT FACT Quiet Series
â
FAST FASTr FRFET GlobalOptoisolator GTO HiSeC
I2C Across the board. Around the world. The Power Franchise Programmable Active Droop
ImpliedDisconnect ISOPLANAR LittleFET MicroFET MicroPak MICROWIRE MSX MSXPro OCX OCXPro OPTOLOGIC
â
OPTOPLANAR
PACMAN POP Power247 PowerTrench
â
QFET QS QT Optoelectronics Quiet Series RapidConfigure RapidConnect SILENT SWITCHER SMART START
SPM Stealth SuperSOT-3 SuperSOT-6 SuperSOT-8 SyncFET TinyLogic TruTranslation UHC UltraFET
â
VCX
â
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Formative or In Design
First Production
Full Production
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or
effectiveness.
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I1
Loading...