Datasheet FDS6984S Datasheet (Fairchild Semiconductor)

PRELIMINARY

FDS6984S

Dual Notebook Power Supply N-Channel PowerTrench SyncFET

May 2000

™

General Description

The FDS6984S is designed to replace two single SO-8 MOSFETs and Schottky diode in synchronous DC:DC power supplies that provide various peripheral voltages for notebook computers and other battery powered electronic devices. FDS6984S contains two unique 30V, N-channel, logic level, PowerTrench MOSFETs designed to maximize power conversion efficiency.

The high-side switch (Q1) is designed with specific emphasis on reducing switching losses while the lowside switch (Q2) is optimized to reduce conduction losses. Q2 also includes an integrated Schottky diode

Features

• Q2: Optimized to minimize conduction losses Includes SyncFET Schottky diode

8.5A, 30V R

• Q1: Optimized for low switching losses Low gate charge ( 5 nC typical)

5.5A, 30V R R

= 0.019Ω @ V

DS(on)

R

= 0.027Ω @ V

DS(on)

= 0.040Ω @ V

DS(on)

= 0.055Ω @ V

DS(on)

= 10V

GS

= 4.5V

GS

= 10V

GS

= 4.5V

GS

using Fairchild’s monolithic SyncFET technology.

4 3 2 1

Absolute Maximum Ratings T

= 25°C unless otherwise noted

A

5

Q1

6 7

Q2

8

Symbol Parameter Q2 Q1 Units

V

DSS

V

GSS

I

D

P

D

TJ, T

STG

Drain-Source Voltage 30 30 V Gate-Source Voltage

±20 ±20

Drain Current - Continuous (Note 1a) 8.5 5.5 A

- Pulsed 30 20 Power Dissipation for Dual Operation 2 W Power Dissipation for Single Operation (Note 1a) 1.6

(Note 1b) (Note 1c)

1

0.9

Operating and Storage Junction Temperature Range -55 to +150

V

°C

Thermal Characteristics

R

θJA

R

θJC

Thermal Resistance, Junction-to-Ambient (Note 1a) 78 Thermal Resistance, Junction-to-Case (Note 1) 40

Package Marking and Ordering Information

Device Marking Device Reel Size Tape width Quantity

FDS6984S FDS6984S 13” 12mm 2500 units

2000 Fairchild Semiconductor Corporation

°C/W °C/W

FDS6984S Rev B(W)

Electrical Characteristics T

FDS6984S

= 25°C unless otherwise noted

A

Symbol Parameter Test Conditions Type Min Typ Max Units Off Characteristics

VGS = 0 V, ID = 1 mA Q2 30BV VGS = 0 V, ID = 250 µA Q1 30

VDS = 24 V, VGS = 0 V Q2

Q1

1000

1

V

µA

I

DSS

I

GSSF

I

GSSR

DSS

Drain-Source Breakdown Voltage

Zero Gate Voltage Drain Current

Gate-Body Leakage, Forward VGS = 20 V, VDS = 0 V All 100 nA Gate-Body Leakage, Reverse VGS = -20 V, VDS = 0 V All -100 nA

On Characteristics (Note 2)

V

GS(th)

∆VGS(th) ∆T

R

DS(on)

I

D(on)

g

FS

Gate Threshold Voltage VDS = VGS, ID = 1 mA

VDS = VGS, ID = 250 µA

Gate Threshold Voltage Temperature Coefficient

J

Static Drain-Source On-Resistance

ID = 1 mA, Referenced to 25°C ID = 250 uA, Referenced to 25°C VGS = 10 V, ID = 8.5 A

VGS = 10 V, ID = 8.5 A, TJ = 125°C VGS = 4.5 V, ID = 7 A

VGS = 10 V, ID = 5.5 A VGS = 10 V, ID = 5.5 A, TJ = 125°C VGS = 4.5 V, ID = 4.6 A

On-State Drain Current VGS = 10 V, VDS = 5 V Q2Q130 Forward Transconductance VDS = 5 V, ID = 8.5 A

VDS = 5 V, ID = 5.5 A

Q2Q11

1

Q2 -6 Q1 -4 Q2 16

24 23

Q1 35

53 48

20 Q2 Q1

26 40

19 32 27

40 60 55

3

V

3

mV/°C

mΩ

A S

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance Q2

VDS = 15 V, VGS = 0 V, f = 1.0 MHz

Q1

Output Capacitance Q2

Q1

Reverse Transfer Capacitance

Q2 Q1

1233

462 344

113 106

40

pF pF pF

Switching Characteristics (Note 2)

t t t t Q Q Q

d(on)

r

d(off)

f

g

gs

gd

Turn-On Delay Time Q2

VDD = 15 V, ID = 1 A, VGS = 10V, R

GEN

= 6 Ω

Q1

Turn-On Rise Time Q2

Q1

Turn-Off Delay Time Q2

Q1

Turn-Off Fall Time

Q2 Q1

Total Gate Charge Q2

Q2 VDS = 15 V, ID = 8.5 A, VGS =5V

Q1

Gate-Source Charge Q2 Gate-Drain Charge

Q1 VDS = 15 V, ID = 5.5 A,VGS = 5 V

Q1 Q2 Q1

8

1618ns

10

5

1025ns

14 25

4034ns

21 11

2014ns

7

11

8.51812 5

2.4 4

3.1

nC nC nC

FDS6680S Rev B (W)

Electrical Characteristics (continued) T

FDS6984S

= 25°C unless otherwise noted

A

Symbol Parameter Test Conditions Type Min Typ Max Units Drain–Source Diode Characteristics and Maximum Ratings

I

S

t

rr

Q

rr

V

SD

Notes:

1. R

θJA

the drain pins. R

Maximum Continuous Drain-Source Diode Forward Current Q2

Q1

Reverse Recovery Time 17 Reverse Recovery Charge

Drain-Source Diode Forward Voltage

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of

is guaranteed by design while R

θJC

IF = 10A, diF/dt = 300 A/µs (Note 3)

VGS = 0 V, IS = 3.5 A (Note 2) VGS = 0 V, IS = 1.3 A (Note 2)Q2Q1

is determined by the user's board design.

θCA

Q2

12.5 nC

0.74

0.5

3.0

1.3 ns

0.7

1.2

A

V

a) 78°/W when

mounted on a

0.5 in2 pad of 2 oz copper

Scale 1 : 1 on letter size paper

2. 2. See “SyncFET Schottky body diode characteristics” below.

3. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%

b) 125°/W when

mounted on a .02 in pad of 2 oz copper

2

c) 135°/W when mounted on a

minimum pad.

FDS6680S Rev B (W)

Typical Characteristics: Q2

5.0V

4.0V

3.5V

6.0V

8.0V

10V

5.0V

VDS = 5V

TA = 125oC

25oC

-55oC

FDS6984S

50

VGS = 10V

40

30

20

10

0

0 1 2 3

VDS, DRAIN-SOURCE VOLTAGE (V)

2.6 VGS = 4.0V

2.2

1.8

1.4

1

0.6

0 10 20 30 40 50

ID, DRAIN CURRENT (A)

Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with

Drain Current and Gate Voltage.

1.9 ID = 10A

VGS = 10V

1.6

1.3

1

0.7

0.4

-50 -25 0 25 50 75 100 125 150

TJ, JUNCTION TEMPERATURE (oC)

0.06

0.05

0.04

0.03

0.02

0.01

0

2 4 6 8 10

TA = 25oC

VGS, GATE TO SOURCE VOLTAGE (V)

TA = 125oC

ID = 5A

Figure 3. On-Resistance Variation with

Temperature.

50

40

30

20

10

0

1.5 2.5 3.5 4.5 5.5

VGS, GATE TO SOURCE VOLTAGE (V)

TA = -55oC

o

Figure 4. On-Resistance Variation with

Gate-to-Source Voltage.

10

VGS = 0V

1

0.1

0.01

0.001 0 0.2 0.4 0.6 0.8

VSD, BODY DIODE FORWARD VOLTAGE (V)

Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation

with Source Current and Temperature.

FDS6680S Rev B (W)

Typical Characteristics: Q2

ID =10A

VDS = 5V

15V

10V

VGS = 0 V

DC

10s

1s

µ

10ms

1ms

FDS6984S

10

8

6

4

2

0

0 3 6 9 12 15 18 21

Qg, GATE CHARGE (nC)

2000

1600

1200

800

400

0

0 5 10 15 20 25 30

VDS, DRAIN TO SOURCE VOLTAGE (V)

CISS

COSS

CRSS

Figure 7. Gate Charge Characteristics. Figure 8. Capacitance Characteristics.

100

RDS(ON) LIMIT

10

100ms

1

VGS = 10V

SINGLE PULSE

0.1

0.01

0.1 1 10 100

θ

R

JA = 135

TA = 25oC

o

C/W

VDS, DRAIN-SOURCE VOLTAGE (V)

50

40

30

20

10

0

0.001 0.01 0.1 1 10 100 1000

t1, TIME (sec)

SINGLE PULSE RθJA = 135°C/W

TA = 25°C

f = 1MHz

Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum

Power Dissipation.

FDS6680S Rev B (W)

Typical Characteristics Q1

4.0V

3.5V

4.5

5.0

6.0

4.0V

3.5V

10V

4.5V

5.0V

6.0V

125oC

TA = 125oC

25oC

-55oC

FDS6984S

40

VGS = 10V

30

20

10

0

0 1 2 3 4 5

VDS, DRAIN-SOURCE VOLTAGE (V)

3.0

3

VGS = 3.0V

2.5

2

1.5

1

0.5 0 10 20 30

ID, DRAIN CURRENT (A)

Figure 11. On-Region Characteristics. Figure 12. On-Resistance Variation with

Drain Current and Gate Voltage.

1.8 ID = 4.6A

VGS = 10V

1.6

1.4

1.2

1

0.8

0.6

-50 -25 0 25 50 75 100 125 150

TJ, JUNCTION TEMPERATURE (oC)

0.2

ID = 2.3 A

0.15

0.1

0.05

0

2.5 3 3.5 4 4.5 5

TA = 25oC

VGS, GATE TO SOURCE VOLTAGE (V)

TA = 125oC

Figure 13. On-Resistance Variation with

Temperature.

25

VDS = 5V

20

15

10

5

0

1 2 3 4 5

VGS, GATE TO SOURCE VOLTAGE (V)

TA = -55oC

25oC

Figure 14. On-Resistance Variation with

Gate-to-Source Voltage.

100

VGS = 0V

10

1

0.1

0.01

0.001 0 0.2 0.4 0.6 0.8 1 1.2 1.4

VSD, BODY DIODE FORWARD VOLTAGE (V)

Figure 15. Transfer Characteristics. Figure 16. Body Diode Forward Voltage Variation

with Source Current and Temperature.

FDS6680S Rev B (W)

Typical Characteristics Q1

15V

10V

VGS = 0 V

DC

10s

10ms

TA = 25°C

FDS6984S

10

ID = 4.6A

8

6

4

2

0

0 2 4 6 8 10

Qg, GATE CHARGE (nC)

VDS = 5V

700

600

500

400

300

200

100

0

0 5 10 15 20 25 30

CISS

COSS

CRSS

VDS, DRAIN TO SOURCE VOLTAGE (V)

f = 1MHz

Figure 17. Gate Charge Characteristics. Figure 18. Capacitance Characteristics.

100

RDS(ON) LIMIT

10

100ms

1

VGS = 10V

0.1

SINGLE PULSE

o

θ

R

JA = 135

C/W

TA = 25oC

0.01

0.1 1 10 100

VDS, DRAIN-SOURCE VOLTAGE (V)

100µs

30

20

10

0

0.01 0.1 1 10 100

t1, TIME (sec)

SINGLE PULSE

θ

R

JA = 135°C/W

Figure 19. Maximum Safe Operating Area. Figure 20. Single Pulse Maximum

Power Dissipation.

1

0.5

0.2

0.1

0.05

0.02

0.01

0.005

r(t), NORMALIZED EFFECTIVE

0.002

TRANSIENT THERMAL RESISTANCE

0.001

0.0001 0.001 0.01 0.1 1 10 100 300

D = 0.5

0.2

0.1

0.05

0.02

0.01 Single Pulse

t , TIME (sec)

1

R (t) = r(t) * R

θ

JA

R = 135°C/W

θ

JA

P(pk)

t

1

t

2

T - T = P * R (t)

J

A

Duty Cycle, D = t /t

θ

JA

1 2

θ

JA

Figure 21. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design.

FDS6680S Rev B (W)

Typical Characteristics (continued)

10nS/DIV

FDS6984S

125oC

25oC

0V

SyncFET Schottky Body Diode Characteristics

Fairchild’s SyncFET process embeds a Schottky diode in parallel with PowerTrench MOSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. Figure 12 shows the reverse recovery characteristic of the FDS6690S.

0.1

0.01

0.001

0.0001

3A/DIV

Figure 12. FDS6690S SyncFET body diode reverse recovery characteristic.

For comparison purposes, Figure 13 shows the reverse recovery characteristics of the body diode of an equivalent size MOSFET produced without SyncFET (FDS6690A).

3A/DIV

0.00001 0 10 20 30

VDS, REVERSE VOLTAGE (V)

Figure 13. Non-SyncFET (FDS6690A) body

diode reverse recovery characteristic.

FDS6680S Rev B (W)

SO-8 Tape and Reel Data and Package Dimensions

SOIC(8lds) Packaging Configuration: Figure 1.0

ELECTROSTATIC

SENSITIVE DEVICES

DO NOT SHIP OR STORE NEAR STRONG ELECTROSTATIC

ELECTROMAGNETIC, MAGNETIC OR RADIOACTIVE FIELDS

TNR DATE PT NUMBER PEEL STRENGTH MIN ______________gms

Customized Label

Packaging Option Packaging type

Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg)

Note/Comments

MAX _____________ gms

ESD Label

SOIC (8lds) Packaging Information

Standard

(no flow code)

TNR

2,500 95 4,000

13" Dia

343x64x343 530x130x83 343x64x343

5,000 30,000 8,000

0.0774 0.0774 0.0774 0.0774

0.6060 - 0.9696 0.1182

L86Z F011

Rail/Tube-TNR

13" Dia

Embossed Car rier Tape

Antistatic Cover Tape

Static Dissipative

F63TNR Label

D84Z TNR

500

7" Dia

184x18 7x47

1,000

F

NDS

9959

852

SOIC-8 Unit Orientation

343mm x 342mm x 64mm

Stand a r d In t e rm ed iate box

Packaging Description:

SOIC-8 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2,500 uni t s pe r 13" o r 33 0c m d ia met er reel . Th e reel s ar e dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 units per 7" or 177cm di ameter reel. This and some o ther options are further described in the Packaging Information table.

These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in di ff ere nt siz es depe nd in g on th e num be r of pa rts shippe d.

F

NDS

9959

F

NDS

9959

F

NDS

852

F

NDS 9959

852

Pin 1

F63TNR Label sample

LOT: CBVK741B019

FSID: FDS9953A

D/C1: D9842 QTY1: SPEC REV: D/C2: QTY2: CPN:

QTY: 2500

SPEC:

N/F: F (F63TNR)3

SOIC(8lds) Tape Leader and Trailer Configuration: Figure 2.0

Carrier Tape

Cover Tape

Trailer Tape 640mm minimum or 80 empty pockets

F63TNLab el

ESD Label

Components

ESD Label

F63TNLabel

Leader Tape 1680mm minimum or 210 empty pockets

July 1999, Rev. B

SO-8 Tape and Reel Data and Package Dimensions, continued

SOIC(8lds) Embossed Carrier Tape Configuration: Figure 3.0

T

K0

Wc

B0

P0

D0

E1

F

W

E2

Tc

A0

D1

P1

User Direction of Feed

Dimensions are in millimeter

Pkg type

(8lds)

SOIC

(12mm)

Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481

SOIC(8lds) Reel Configuration: Figure 4.0

A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc

6.50

5.30

12.0

1.55

1.60

1.75

10.25

+/-0.10

+/-0.3

+/-0.05

+/-0.10

rotational and lateral movement requirements (see sketches A, B, and C).

B0

20 deg maximum component rotation

Sketch A (Side or Front Sectional View)

Component Rotation

5.50

min

+/-0.05

20 deg maximum

A0

Sketch B (Top View)

Component Rotation

W1 Measured at Hub

8.0 +/-0.1

Typical component cavity center line

Typical component center line

Dim A

Max

4.0 +/-0.1

0.450

2.1 +/-0.10

0.5mm maximum

Sketch C (Top View)

Component lateral movement

+/-

0.150

9.2 +/-0.3

0.5mm maximum

0.06 +/-0.02

Dim A

max

Tape Size

12mm 7" Dia

12mm 13" Dia

 1998 Fairchild Semiconductor Corporation

Reel

Option

Dim N

Diameter Option

7"

See detail AA

B Min

Dim C

13" Diameter Option

See detail AA

W2 max Measured at Hub

Dim D

W3

min

DETAIL AA

Dimensions are in inches and millimeters

Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)

7.00

0.059

177.8

13.00 330

1.5

0.059

1.5

512 +0.020/-0.0 08 13 +0.5/-0.2

0.795

2.165550.488 +0.078/-0.000

20.2

0.795

7.00

20.2

178

12.4 +2/0

0.488 +0.078/-0.000

12.4 +2/0

0.724

18.4

0.724

18.4

0.469 – 0.606

11.9 – 15.4

0.469 – 0.606

11.9 – 15.4

July 1999, Rev. B

SO-8 Tape and Reel Data and Package Dimensions, continued

SOIC-8 (FS PKG Code S1)

1 : 1

Scale 1:1 on letter size paper

Dimensions show n below are in:

inches [millimeters]

Part Weight per unit (gram): 0.0774

9

September 1998, Rev. A

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ Bottomless™ CoolFET™ CROSSVOLT™

2

CMOS

E

TM

FACT™ FACT Quiet Series™



FAST FASTr™ GTO™

HiSeC™ ISOPLANAR™ MICROWIRE™ POP™ PowerTrench



QFET™ QS™

Quiet Series™ SuperSOT™-3 SuperSOT™-6

SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or

effectiveness.

PRODUCT STA TUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

Formative or In Design

First Production

Full Production

Not In Production

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Rev. E

SuperSOTTM-8 Tape and Reel Data and Package Dimensions

SSOT-8 Packaging Configuration: Figure 1.0

Customized Label

F63TNR Label

Emboss ed Carrier Tape

Antistatic Cover Tape

Static Dissipative

852

F

831N

Packaging Description:

SSOT-8 parts are shipped in tape. The carrier tape is made from a di ssi pati ve (c arbo n fi lled) po lycarbon ate resin. The cov er tap e is a mu lt ilayer film (Heat Act ivat ed Adhesiv e in nat ure) prim aril y c omp osed of po lyes ter film , adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standar d option are ship ped wi th 3,000 u n i ts per 13" or 330c m d i a m et er re el . The r e el s are dark blue in color and is made of po ly s t yr ene plas ti c (antistatic c oated). Other option comes in 500 units per 7" or 177c m diam eter reel. This and s ome o ther opt ion s are furth er described in th e Packaging Information table.

These full reels are in dividu ally barc ode labeled and placed in side a standard intermediat e box (illus trated in figur e 1.0) made of recyc lable corrugat ed brown paper. One box cont ains t wo reels maxi mum. And t hese bo xes are placed ins ide a barc ode labeled shipp ing bo x whic h co m e s i n di ff e r e n t sizes de pe ndin g on t he nu mbe r of part s sh i pped.

852

F

831N

F

831N

852

F

831N

852

F

831N

Pin 1

SSOT-8 Packaging Information

Packaging Option Packaging type

Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg)

Note/Comments

184mm x 187mm x 47mm

Stan dard

(no flow c ode)

TNR 3,000 500

13" Dia

343x64x343 184x187x47

6,000 1,000

0.0416 0.0416

0.5615 0.0980

D84Z

TNR

7" Dia

F63TNR Label

Pizza Box for D84Z Option

SSOT-8 Tape Leader and Trailer Configuration: Figure 2.0

F63TNR Label

SSOT-8 Unit Orientation

343mm x 342mm x 64mm

Inter mediate bo x for Standard

and L 99Z Options

F63TNR Label sampl e

LOT: CBVK7 41B019

FSID: FDR835N

D/C1: D9842 QTY1: SPEC REV: D/C2: QTY2: CPN:

F63TNR Label

QTY: 3000

SPEC:

N/F: F (F63TNR)3

Carrier Tape

Cover Tape

Tr ailer Tape 300mm mi nimum or 38 empty pockets

Components

Leader Tape 500mm mi nimum or 62 empty poc k ets

August 1999, Rev. C

SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued

SSOT-8 Embossed Carrier Tape Configuration: Figure 3.0

T

K0

Wc

B0

P0

D0

E1

F

W

E2

Tc

A0

D1

P1

User Direction of Feed

Dimensions are in millimeter

Pkg type

SSOT-8

(12mm)

Notes: A0, B0, and K0 dimensions are determined with respec t to the EIA/Jedec RS-481

rotational and lateral movement requi rements (see sketches A, B, and C).

SSOT-8 Reel Configuration: Figur e 4.0

A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc

4.47

5.00

12.0

1.55

1.50

1.75

10.25

5.50

+/-0.10

20 deg maximum component rotation

Sketc h A (Side or Front Sectional View)

Component Rotation

+/-0.3

+/-0.05

+/-0.10

B0

min

A0

Sketc h B (Top View)

Component Rotation

8.0

+/-0.05

+/-0.1

20 deg maximum

Typical component cavity center line

Typical component center line

W1 Measured at Hub

Dim A

Max

4.0 +/-0.1

1.37

0.280 +/-0.150

9.5 +/-0.025

0.5mm maximum

+/-0.10

0.5mm maximum

Sketc h C (Top View)

Component lateral movement

0.06 +/-0.02

Dim A

max

13" Diameter Option

Tape Size

12mm 7" Di a

12mm 13" Dia

 1998 Fairchild Semiconductor Corporation

Reel

Option

Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)

7.00

177.8

13.00 330

0.059

1.5

0.059

1.5

Dim N

See detail AA

W3

W2 max Measured at Hub

Dimensions are in inches and millimeters

512 +0.020/-0.008 13 +0.5/-0.2

0.795

20.2

0.795

20.2

5.906 150

7.00 178

Dim D

min

0.488 +0.078/-0.000

12.4 +2/0

0.488 +0.078/-0.000

12.4 +2/0

Diameter Option

7"

DETAIL AA

0.724

18.4

0.724

18.4

See detail AA

B Min

Dim C

0.469 – 0.606

11.9 – 15.4

0.469 – 0.606

11.9 – 15.4

July 1999, Rev. C

SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued

SuperSOT-8 (FS PKG Code 34, 35)

1 : 1

Scale 1:1 on letter size paper

Dimensio ns shown below are in:

inches [mil lime ters ]

Part Weight per unit (gram): 0.0416

September 1998, Rev. A

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ Bottomless™ CoolFET™ CROSSVOLT™

2

CMOS

E

TM

FACT™ FACT Quiet Series™



FAST FASTr™ GTO™

HiSeC™ ISOPLANAR™ MICROWIRE™ POP™ PowerTrench



QFET™ QS™

Quiet Series™ SuperSOT™-3 SuperSOT™-6

SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ VCX™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or

effectiveness.

PRODUCT STA TUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

Formative or In Design

First Production

Full Production

Not In Production

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Rev. E