High power and handling capability in a widely used surface
mount package
Absolute Maximum Ratings
= 0.030 Ω @ V
DS(on)
= 0.044 Ω @ V
DS(on)
= 0.052 Ω @ V
DS(on)
= 0.080 Ω @ V
DS(on)
D1
SO-8
D1
D2
Pin 1
D2
= 10V
GS
= 4.5V
GS
= -10V
GS
= -4.5V
GS
S1
G2
S2
G1
T
= 25°C unless otherwise noted
A
General Description
These dual N- and P-Channel enhancement mode power field
effect transistors are produced using Fairchild Semiconductor’s
advanced PowerTrench process that has been especially
tailored to minimize on-state ressitance and yet maintain
superior switching performance.
These devices are well suited for low voltage and battery
powered applications where low in-line power loss and fast
switching are required.
Q2
5
6
Q1
7
8
4
3
2
1
SymbolParameterQ1Q2Units
V
DSS
V
GSS
I
D
P
D
T
, T
J
Thermal Characteristics
R
JA
R
JC
Drain-Source Voltage 30 -30 V
Gate-Source Voltage
Drain Current– Continuous(Note 1a)7-5A
– Pulsed20-20
Power Dissipation for Dual Operation2W
Power Dissipation for Single Operation(Note 1a)1.6
(Note 1b)1
(Note 1c)0.9
Operating and Storage Junction Temperature Range-55 to +150
Maximum Continuous Drain-Source Diode Forward CurrentQ1
Q2
Drain-Source Diode Forward
Voltage
Diode Reverse Recovery TimeQ1
Diode Reverse Recovery ChargeQ1
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins.
is guaranteed by design while R
a) 78°/W when mounted
is determined by the user's board design.
θCA
2
on a 0.5 in
copper
pad of 2 oz
VGS = 0 V, IS = 1.3 A (Note 2)
VGS = 0 V, IS = -1.3 A (Note 2)
IF = 7 A, diF/dt = 100 A/µs
Q2
IF = -5 A, diF/dt = 100 A/µs
b) 125°/W when mounted
on a .02 in
copper
2
pad of 2 oz
Q1
Q2
Q1
Q2
Q2
0.75
-0.88
19
19
1.3
-1.3
1.2
-1.2
9
6
c) 135°/W when mounted
on a minimum pad.
nS
nC
A
V
®
MOSFET
FDS8962C Rev. A1
3www.fairchildsemi.com
Page 4
Typical Characteristics: Q1 (N-Channel)
FDS8962C Dual N & P-Channel PowerTrench
20
VGS = 10.0V
16
6.0V
12
8
, DRAIN CURRENT (A)
D
I
4
0
00.511.52
4.0V
4.5V
V
, DRAIN-SOURCE VOLTAGE (V)
DS
3.5V
3.0V
Figure 1. On-Region Characteristics.
1.6
ID = 7A
V
= 10.0V
GS
1.4
1.2
, NORMALIZED
1
DS(ON)
R
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50-250255075100125150
TJ, JUNCTION TEMPERATURE (°C)
2.2
1.8
VGS = 3.5V
1.4
, NORMALIZED
DS(ON)
R
1
DRAIN-SOURCE ON-RESISTANCE
0.6
04 8121620
4.0
4.5V
, DRAIN CURRENT (A)
I
D
5.0
6.0V
10.0V
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
0.08
0.07
0.06
0.05
0.04
, ON-RESISTANCE (OHM)
0.03
TA = 25°C
DS(ON)
0.02
R
0.01
246810
TA = 125°C
V
, GATE TO SOURCE VOLTAGE (V)
GS
ID = 3.5A
®
MOSFET
Figure 3. On-Resistance Variation with
Temperature.
20
VDS = 5V
16
12
8
, DRAIN CURRENT (A)
D
I
4
0
1.522.533.54
V
GS
TA = 125°C
, GATE TO SOURCE VOLTAGE (V)
-55°C
25°C
Figure 5. Transfer Characteristics.Figure 6. Body Diode Forward Voltage Variation
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
100
VGS = 0V
10
1
0.1
0.01
0.001
, REVERSE DRAIN CURRENT (A)
S
I
0.0001
00.20.40.60.811.2
TA = 125°C
25°C
, BODY DIODE FORWARD VOLTAGE (V)
V
SD
-55°C
with Source Current and Temperature.
FDS8962C Rev. A1
4www.fairchildsemi.com
Page 5
Typical Characteristics: Q1 (N-Channel)
FDS8962C Dual N & P-Channel PowerTrench
10
ID = 7A
8
6
4
2
, GATE-SOURCE VOLTAGE (V)
GS
V
0
024681012
, GATE CHARGE (nC)
Q
g
VDS = 10V
20V
15V
Figure 7. Gate Charge Characteristics.
100
R
LIMIT
DS(ON)
10
1
, DRAIN CURRENT (A)
D
I
0.01
VGS = 10V
SINGLE PULSE
0.1
θ
R
= 135°C/W
JA
T
= 25°C
A
0.1110100
V
DS
10s
DC
, DRAIN-SOURCE VOLTAGE (V)
1s
10ms
100ms
100µs
1ms
800
f = 1MHz
V
GS
600
C
iss
400
C
CAPACITANCE (pF)
200
C
rss
0
05101520
V
oss
, DRAIN TO SOURCE VOLTAGE (V)
DS
Figure 8. Capacitance Characteristics.
50
SINGLE PULSE
θ
R
= 135°C/W
40
30
20
10
P(pk), PEAK TRANSIENT POWER (W)
0
0.0010.010.11101001000
t
, TIME (sec)
1
JA
T
A
= 25°C
= 0 V
®
MOSFET
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
FDS8962C Rev. A1
5www.fairchildsemi.com
Page 6
Typical Characteristics: Q2 (P-Channel)
FDS8962C Dual N & P-Channel PowerTrench
30
VGS = -10V
20
10
, DRAIN CURRENT (A)
D
-I
0
0123456
-6.0V
-5.0V
-4.5V
-4.0V
-3.5V
-VDS, DRAIN TO SOURCE VOLTAGE (V)
-3.0V
Figure 11. On-Region Characteristics.
1.6
ID = -5A
V
= -10V
GS
1.4
1.2
, NORMALIZED
1
DS(ON)
R
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50-250255075100125150
TJ, JUNCTION TEMPERATURE (°C)
2
1.8
VGS=-4.0V
1.6
1.4
, NORMALIZED
1.2
DS(ON)
R
1
DRAIN-SOURCE ON-RESISTANCE
0.8
0612182430
-4.5V
-5.0V
-6.0V
-ID, DRAIN CURRENT (A)
-7.0V
-8.0V
-10V
Figure 12. On-Resistance Variation with
Drain Current and Gate Voltage.
0.25
0.2
0.15
0.1
, ON-RESISTANCE (OHM)
TA = 25°C
0.05
DS(ON)
R
0
246810
TA = 125°C
, GATE TO SOURCE VOLTAGE (V)
-V
GS
ID = -2.5A
®
MOSFET
Figure 13. On-Resistance Variation with
Temperature.
15
VDS = -5V
12
9
6
, DRAIN CURRENT (A)
D
3
-I
0
11.522.533.544.5
, GATE TO SOURCE VOLTAGE (V)
-V
GS
TA = -55oC
125oC
Figure 15. Transfer Characteristics.
25oC
Figure 14. On-Resistance Variation with
Gate-to-Source Voltage.
100
VGS =0V
10
1
0.1
0.01
0.001
, REVERSE DRAIN CURRENT (A)
S
-I
0.0001
00.20.40.60.811.21.4
TA = 125oC
25oC
-55oC
-V
, BODY DIODE FORWARD VOLTAGE (V)
SD
Figure 16. Body Diode Forward Voltage Variation
with Source Current and Temperature.
FDS8962C Rev. A1
6www.fairchildsemi.com
Page 7
Typical Characteristics: Q2 (P-Channel)
FDS8962C Dual N & P-Channel PowerTrench
10
ID = -5A
8
VDS = -5V
-10V
-15V
6
4
2
, GATE-SOURCE VOLTAGE (V)
GS
-V
0
0246810
, GATE CHARGE (nC)
Q
g
Figure 17. Gate Charge Characteristics.
100
R
LIMIT
DS(ON)
10
1
VGS = -10V
SINGLE PULSE
, DRAIN CURRENT (A)
0.1
D
θ
R
= 125°C/W
-I
JA
T
= 25°C
A
0.01
0.1110100
DC
10s
1s
100ms
10ms
-VDS, DRAIN-SOURCE VOLTAGE (V)
100µs
1ms
800
700
600
500
400
300
CAPACITANCE (pF)
200
100
0
051015202530
C
oss
C
rss
-V
, DRAIN TO SOURCE VOLTAGE (V)
DS
C
f = 1 MHz
= 0 V
V
GS
iss
Figure 18. Capacitance Characteristics.
50
40
30
20
10
P(pk), PEAK TRANSIENT POWER (W)
0
0.0010.010.11101001000
t
, TIME (sec)
1
SINGLE PULSE
θ
R
= 125°C/W
JA
T
= 25°C
A
®
MOSFET
Figure 19. Maximum Safe Operating Area.
Figure 20. Single Pulse Maximum
Power Dissipation.
1
D = 0.5
0.2
0.1
0.01
0.1
0.05
0.02
0.01
SINGLE PULSE
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
0.001
0.00010.0010.010.11101001000
, TIME (sec)
t
1
θ
R
(t) = r(t) * R
JA
θ
R
= 135°C/W
JA
P(pk)
t
1
T
- TA = P * R
J
Duty Cycle, D = t
Figure 21. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
θ
JA
t
2
θ
(t)
JA
/ t
1
2
FDS8962C Rev. A1
7www.fairchildsemi.com
Page 8
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not
intended to be an exhaustive list of all such trademarks.
ACEx™
ActiveArray™
Bottomless™
Build it Now™
CoolFET™
CROSSVOLT™
DOME™
EcoSPARK™
2
CMOS™
E
EnSigna™
FACT™
FACT Quiet Series™
Across the board. Around the world.™
The Power Franchise
Programmable Active Droop™
®
FAST
FASTr™
FPS™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE
SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS,
SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
PreliminaryFirst ProductionThis datasheet contains preliminary data, and
No Identification NeededFull ProductionThis datasheet contains final specifications. Fairchild
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
ObsoleteNot In ProductionThis datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I19
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